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SAME54P20A Test Project
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PortGroup hardware registers. More...
#include <port.h>
Data Fields | |
| __IO PORT_DIR_Type | DIR |
| Offset: 0x00 (R/W 32) Data Direction. | |
| __IO PORT_DIRCLR_Type | DIRCLR |
| Offset: 0x04 (R/W 32) Data Direction Clear. | |
| __IO PORT_DIRSET_Type | DIRSET |
| Offset: 0x08 (R/W 32) Data Direction Set. | |
| __IO PORT_DIRTGL_Type | DIRTGL |
| Offset: 0x0C (R/W 32) Data Direction Toggle. | |
| __IO PORT_OUT_Type | OUT |
| Offset: 0x10 (R/W 32) Data Output Value. | |
| __IO PORT_OUTCLR_Type | OUTCLR |
| Offset: 0x14 (R/W 32) Data Output Value Clear. | |
| __IO PORT_OUTSET_Type | OUTSET |
| Offset: 0x18 (R/W 32) Data Output Value Set. | |
| __IO PORT_OUTTGL_Type | OUTTGL |
| Offset: 0x1C (R/W 32) Data Output Value Toggle. | |
| __I PORT_IN_Type | IN |
| Offset: 0x20 (R/ 32) Data Input Value. | |
| __IO PORT_CTRL_Type | CTRL |
| Offset: 0x24 (R/W 32) Control. | |
| __O PORT_WRCONFIG_Type | WRCONFIG |
| Offset: 0x28 ( /W 32) Write Configuration. | |
| __IO PORT_EVCTRL_Type | EVCTRL |
| Offset: 0x2C (R/W 32) Event Input Control. | |
| __IO PORT_PMUX_Type | PMUX [16] |
| Offset: 0x30 (R/W 8) Peripheral Multiplexing. | |
| __IO PORT_PINCFG_Type | PINCFG [32] |
| Offset: 0x40 (R/W 8) Pin Configuration. | |
| RoReg8 | Reserved1 [0x20] |
1.8.20