Instance description for SERCOM2. More...

Macros
#define	REG_SERCOM2_I2CM_CTRLA ((RwReg )0x41012000UL)
	(SERCOM2) I2CM Control A

#define	REG_SERCOM2_I2CM_CTRLB ((RwReg )0x41012004UL)
	(SERCOM2) I2CM Control B

#define	REG_SERCOM2_I2CM_CTRLC ((RwReg )0x41012008UL)
	(SERCOM2) I2CM Control C

#define	REG_SERCOM2_I2CM_BAUD ((RwReg )0x4101200CUL)
	(SERCOM2) I2CM Baud Rate

#define	REG_SERCOM2_I2CM_INTENCLR ((RwReg8 )0x41012014UL)
	(SERCOM2) I2CM Interrupt Enable Clear

#define	REG_SERCOM2_I2CM_INTENSET ((RwReg8 )0x41012016UL)
	(SERCOM2) I2CM Interrupt Enable Set

#define	REG_SERCOM2_I2CM_INTFLAG ((RwReg8 )0x41012018UL)
	(SERCOM2) I2CM Interrupt Flag Status and Clear

#define	REG_SERCOM2_I2CM_STATUS ((RwReg16)0x4101201AUL)
	(SERCOM2) I2CM Status

#define	REG_SERCOM2_I2CM_SYNCBUSY ((RoReg )0x4101201CUL)
	(SERCOM2) I2CM Synchronization Busy

#define	REG_SERCOM2_I2CM_ADDR ((RwReg )0x41012024UL)
	(SERCOM2) I2CM Address

#define	REG_SERCOM2_I2CM_DATA ((RwReg )0x41012028UL)
	(SERCOM2) I2CM Data

#define	REG_SERCOM2_I2CM_DBGCTRL ((RwReg8 )0x41012030UL)
	(SERCOM2) I2CM Debug Control

#define	REG_SERCOM2_I2CS_CTRLA ((RwReg )0x41012000UL)
	(SERCOM2) I2CS Control A

#define	REG_SERCOM2_I2CS_CTRLB ((RwReg )0x41012004UL)
	(SERCOM2) I2CS Control B

#define	REG_SERCOM2_I2CS_CTRLC ((RwReg )0x41012008UL)
	(SERCOM2) I2CS Control C

#define	REG_SERCOM2_I2CS_INTENCLR ((RwReg8 )0x41012014UL)
	(SERCOM2) I2CS Interrupt Enable Clear

#define	REG_SERCOM2_I2CS_INTENSET ((RwReg8 )0x41012016UL)
	(SERCOM2) I2CS Interrupt Enable Set

#define	REG_SERCOM2_I2CS_INTFLAG ((RwReg8 )0x41012018UL)
	(SERCOM2) I2CS Interrupt Flag Status and Clear

#define	REG_SERCOM2_I2CS_STATUS ((RwReg16)0x4101201AUL)
	(SERCOM2) I2CS Status

#define	REG_SERCOM2_I2CS_SYNCBUSY ((RoReg )0x4101201CUL)
	(SERCOM2) I2CS Synchronization Busy

#define	REG_SERCOM2_I2CS_LENGTH ((RwReg16)0x41012022UL)
	(SERCOM2) I2CS Length

#define	REG_SERCOM2_I2CS_ADDR ((RwReg )0x41012024UL)
	(SERCOM2) I2CS Address

#define	REG_SERCOM2_I2CS_DATA ((RwReg )0x41012028UL)
	(SERCOM2) I2CS Data

#define	REG_SERCOM2_SPI_CTRLA ((RwReg )0x41012000UL)
	(SERCOM2) SPI Control A

#define	REG_SERCOM2_SPI_CTRLB ((RwReg )0x41012004UL)
	(SERCOM2) SPI Control B

#define	REG_SERCOM2_SPI_CTRLC ((RwReg )0x41012008UL)
	(SERCOM2) SPI Control C

#define	REG_SERCOM2_SPI_BAUD ((RwReg8 )0x4101200CUL)
	(SERCOM2) SPI Baud Rate

#define	REG_SERCOM2_SPI_INTENCLR ((RwReg8 )0x41012014UL)
	(SERCOM2) SPI Interrupt Enable Clear

#define	REG_SERCOM2_SPI_INTENSET ((RwReg8 )0x41012016UL)
	(SERCOM2) SPI Interrupt Enable Set

#define	REG_SERCOM2_SPI_INTFLAG ((RwReg8 )0x41012018UL)
	(SERCOM2) SPI Interrupt Flag Status and Clear

#define	REG_SERCOM2_SPI_STATUS ((RwReg16)0x4101201AUL)
	(SERCOM2) SPI Status

#define	REG_SERCOM2_SPI_SYNCBUSY ((RoReg )0x4101201CUL)
	(SERCOM2) SPI Synchronization Busy

#define	REG_SERCOM2_SPI_LENGTH ((RwReg16)0x41012022UL)
	(SERCOM2) SPI Length

#define	REG_SERCOM2_SPI_ADDR ((RwReg )0x41012024UL)
	(SERCOM2) SPI Address

#define	REG_SERCOM2_SPI_DATA ((RwReg )0x41012028UL)
	(SERCOM2) SPI Data

#define	REG_SERCOM2_SPI_DBGCTRL ((RwReg8 )0x41012030UL)
	(SERCOM2) SPI Debug Control

#define	REG_SERCOM2_USART_CTRLA ((RwReg )0x41012000UL)
	(SERCOM2) USART Control A

#define	REG_SERCOM2_USART_CTRLB ((RwReg )0x41012004UL)
	(SERCOM2) USART Control B

#define	REG_SERCOM2_USART_CTRLC ((RwReg )0x41012008UL)
	(SERCOM2) USART Control C

#define	REG_SERCOM2_USART_BAUD ((RwReg16)0x4101200CUL)
	(SERCOM2) USART Baud Rate

#define	REG_SERCOM2_USART_RXPL ((RwReg8 )0x4101200EUL)
	(SERCOM2) USART Receive Pulse Length

#define	REG_SERCOM2_USART_INTENCLR ((RwReg8 )0x41012014UL)
	(SERCOM2) USART Interrupt Enable Clear

#define	REG_SERCOM2_USART_INTENSET ((RwReg8 )0x41012016UL)
	(SERCOM2) USART Interrupt Enable Set

#define	REG_SERCOM2_USART_INTFLAG ((RwReg8 )0x41012018UL)
	(SERCOM2) USART Interrupt Flag Status and Clear

#define	REG_SERCOM2_USART_STATUS ((RwReg16)0x4101201AUL)
	(SERCOM2) USART Status

#define	REG_SERCOM2_USART_SYNCBUSY ((RoReg )0x4101201CUL)
	(SERCOM2) USART Synchronization Busy

#define	REG_SERCOM2_USART_RXERRCNT ((RoReg8 )0x41012020UL)
	(SERCOM2) USART Receive Error Count

#define	REG_SERCOM2_USART_LENGTH ((RwReg16)0x41012022UL)
	(SERCOM2) USART Length

#define	REG_SERCOM2_USART_DATA ((RwReg )0x41012028UL)
	(SERCOM2) USART Data

#define	REG_SERCOM2_USART_DBGCTRL ((RwReg8 )0x41012030UL)
	(SERCOM2) USART Debug Control

#define	SERCOM2_CLK_REDUCTION 1

#define	SERCOM2_DLY_COMPENSATION 1

#define	SERCOM2_DMA 1

#define	SERCOM2_DMAC_ID_RX 8

#define	SERCOM2_DMAC_ID_TX 9

#define	SERCOM2_FIFO_DEPTH_POWER 1

#define	SERCOM2_GCLK_ID_CORE 23

#define	SERCOM2_GCLK_ID_SLOW 3

#define	SERCOM2_INT_MSB 6

#define	SERCOM2_I2CM 1

#define	SERCOM2_I2CS 1

#define	SERCOM2_I2CS_AUTO_ACK 1

#define	SERCOM2_I2CS_GROUP_CMD 1

#define	SERCOM2_I2CS_SDASETUP_CNT_SIZE 8

#define	SERCOM2_I2CS_SDASETUP_SIZE 4

#define	SERCOM2_I2CS_SUDAT 1

#define	SERCOM2_I2C_FASTMP 1

#define	SERCOM2_I2C_HSMODE 1

#define	SERCOM2_I2C_SCLSM_MODE 1

#define	SERCOM2_I2C_SMB_TIMEOUTS 1

#define	SERCOM2_I2C_TENBIT_ADR 1

#define	SERCOM2_PMSB 3

#define	SERCOM2_RETENTION_SUPPORT 0

#define	SERCOM2_SE_CNT 1

#define	SERCOM2_SPI 1

#define	SERCOM2_SPI_HW_SS_CTRL 1

#define	SERCOM2_SPI_ICSPACE_EXT 1

#define	SERCOM2_SPI_OZMO 0

#define	SERCOM2_SPI_WAKE_ON_SSL 1

#define	SERCOM2_TTBIT_EXTENSION 1

#define	SERCOM2_USART 1

#define	SERCOM2_USART_AUTOBAUD 1

#define	SERCOM2_USART_COLDET 1

#define	SERCOM2_USART_FLOW_CTRL 1

#define	SERCOM2_USART_FRAC_BAUD 1

#define	SERCOM2_USART_IRDA 1

#define	SERCOM2_USART_ISO7816 1

#define	SERCOM2_USART_LIN_MASTER 1

#define	SERCOM2_USART_RS485 1

#define	SERCOM2_USART_SAMPA_EXT 1

#define	SERCOM2_USART_SAMPR_EXT 1

Detailed Description

Instance description for SERCOM2.

\asf_license_start

Definition in file sercom2.h.

Macros

Detailed Description