adc0.h File Reference

Instance description for ADC0. More...

Go to the source code of this file.

Macros
#define	REG_ADC0_CTRLA   (*(RwReg16*)0x43001C00UL)
	(ADC0) Control A
#define	REG_ADC0_EVCTRL   (*(RwReg8 *)0x43001C02UL)
	(ADC0) Event Control
#define	REG_ADC0_DBGCTRL   (*(RwReg8 *)0x43001C03UL)
	(ADC0) Debug Control
#define	REG_ADC0_INPUTCTRL   (*(RwReg16*)0x43001C04UL)
	(ADC0) Input Control
#define	REG_ADC0_CTRLB   (*(RwReg16*)0x43001C06UL)
	(ADC0) Control B
#define	REG_ADC0_REFCTRL   (*(RwReg8 *)0x43001C08UL)
	(ADC0) Reference Control
#define	REG_ADC0_AVGCTRL   (*(RwReg8 *)0x43001C0AUL)
	(ADC0) Average Control
#define	REG_ADC0_SAMPCTRL   (*(RwReg8 *)0x43001C0BUL)
	(ADC0) Sample Time Control
#define	REG_ADC0_WINLT   (*(RwReg16*)0x43001C0CUL)
	(ADC0) Window Monitor Lower Threshold
#define	REG_ADC0_WINUT   (*(RwReg16*)0x43001C0EUL)
	(ADC0) Window Monitor Upper Threshold
#define	REG_ADC0_GAINCORR   (*(RwReg16*)0x43001C10UL)
	(ADC0) Gain Correction
#define	REG_ADC0_OFFSETCORR   (*(RwReg16*)0x43001C12UL)
	(ADC0) Offset Correction
#define	REG_ADC0_SWTRIG   (*(RwReg8 *)0x43001C14UL)
	(ADC0) Software Trigger
#define	REG_ADC0_INTENCLR   (*(RwReg8 *)0x43001C2CUL)
	(ADC0) Interrupt Enable Clear
#define	REG_ADC0_INTENSET   (*(RwReg8 *)0x43001C2DUL)
	(ADC0) Interrupt Enable Set
#define	REG_ADC0_INTFLAG   (*(RwReg8 *)0x43001C2EUL)
	(ADC0) Interrupt Flag Status and Clear
#define	REG_ADC0_STATUS   (*(RoReg8 *)0x43001C2FUL)
	(ADC0) Status
#define	REG_ADC0_SYNCBUSY   (*(RoReg *)0x43001C30UL)
	(ADC0) Synchronization Busy
#define	REG_ADC0_DSEQDATA   (*(WoReg *)0x43001C34UL)
	(ADC0) DMA Sequencial Data
#define	REG_ADC0_DSEQCTRL   (*(RwReg *)0x43001C38UL)
	(ADC0) DMA Sequential Control
#define	REG_ADC0_DSEQSTAT   (*(RoReg *)0x43001C3CUL)
	(ADC0) DMA Sequencial Status
#define	REG_ADC0_RESULT   (*(RoReg16*)0x43001C40UL)
	(ADC0) Result Conversion Value
#define	REG_ADC0_RESS   (*(RoReg16*)0x43001C44UL)
	(ADC0) Last Sample Result
#define	REG_ADC0_CALIB   (*(RwReg16*)0x43001C48UL)
	(ADC0) Calibration
#define	ADC0_BANDGAP   27
#define	ADC0_CTAT   29
#define	ADC0_DMAC_ID_RESRDY   68
#define	ADC0_DMAC_ID_SEQ   69
#define	ADC0_EXTCHANNEL_MSB   15
#define	ADC0_GCLK_ID   40
#define	ADC0_MASTER_SLAVE_MODE   1
#define	ADC0_OPAMP2   0
#define	ADC0_OPAMP01   0
#define	ADC0_PTAT   28
#define	ADC0_TOUCH_IMPLEMENTED   1

Detailed Description

Instance description for ADC0.

Copyright (c) 2019 Microchip Technology Inc.

\asf_license_start

Definition in file adc0.h.