SAME54P20A Test Project
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Instance description for TC3. More...
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Macros | |
#define | REG_TC3_CTRLA (*(RwReg *)0x4101C000UL) |
(TC3) Control A | |
#define | REG_TC3_CTRLBCLR (*(RwReg8 *)0x4101C004UL) |
(TC3) Control B Clear | |
#define | REG_TC3_CTRLBSET (*(RwReg8 *)0x4101C005UL) |
(TC3) Control B Set | |
#define | REG_TC3_EVCTRL (*(RwReg16*)0x4101C006UL) |
(TC3) Event Control | |
#define | REG_TC3_INTENCLR (*(RwReg8 *)0x4101C008UL) |
(TC3) Interrupt Enable Clear | |
#define | REG_TC3_INTENSET (*(RwReg8 *)0x4101C009UL) |
(TC3) Interrupt Enable Set | |
#define | REG_TC3_INTFLAG (*(RwReg8 *)0x4101C00AUL) |
(TC3) Interrupt Flag Status and Clear | |
#define | REG_TC3_STATUS (*(RwReg8 *)0x4101C00BUL) |
(TC3) Status | |
#define | REG_TC3_WAVE (*(RwReg8 *)0x4101C00CUL) |
(TC3) Waveform Generation Control | |
#define | REG_TC3_DRVCTRL (*(RwReg8 *)0x4101C00DUL) |
(TC3) Control C | |
#define | REG_TC3_DBGCTRL (*(RwReg8 *)0x4101C00FUL) |
(TC3) Debug Control | |
#define | REG_TC3_SYNCBUSY (*(RoReg *)0x4101C010UL) |
(TC3) Synchronization Status | |
#define | REG_TC3_COUNT16_COUNT (*(RwReg16*)0x4101C014UL) |
(TC3) COUNT16 Count | |
#define | REG_TC3_COUNT16_CC0 (*(RwReg16*)0x4101C01CUL) |
(TC3) COUNT16 Compare and Capture 0 | |
#define | REG_TC3_COUNT16_CC1 (*(RwReg16*)0x4101C01EUL) |
(TC3) COUNT16 Compare and Capture 1 | |
#define | REG_TC3_COUNT16_CCBUF0 (*(RwReg16*)0x4101C030UL) |
(TC3) COUNT16 Compare and Capture Buffer 0 | |
#define | REG_TC3_COUNT16_CCBUF1 (*(RwReg16*)0x4101C032UL) |
(TC3) COUNT16 Compare and Capture Buffer 1 | |
#define | REG_TC3_COUNT32_COUNT (*(RwReg *)0x4101C014UL) |
(TC3) COUNT32 Count | |
#define | REG_TC3_COUNT32_CC0 (*(RwReg *)0x4101C01CUL) |
(TC3) COUNT32 Compare and Capture 0 | |
#define | REG_TC3_COUNT32_CC1 (*(RwReg *)0x4101C020UL) |
(TC3) COUNT32 Compare and Capture 1 | |
#define | REG_TC3_COUNT32_CCBUF0 (*(RwReg *)0x4101C030UL) |
(TC3) COUNT32 Compare and Capture Buffer 0 | |
#define | REG_TC3_COUNT32_CCBUF1 (*(RwReg *)0x4101C034UL) |
(TC3) COUNT32 Compare and Capture Buffer 1 | |
#define | REG_TC3_COUNT8_COUNT (*(RwReg8 *)0x4101C014UL) |
(TC3) COUNT8 Count | |
#define | REG_TC3_COUNT8_PER (*(RwReg8 *)0x4101C01BUL) |
(TC3) COUNT8 Period | |
#define | REG_TC3_COUNT8_CC0 (*(RwReg8 *)0x4101C01CUL) |
(TC3) COUNT8 Compare and Capture 0 | |
#define | REG_TC3_COUNT8_CC1 (*(RwReg8 *)0x4101C01DUL) |
(TC3) COUNT8 Compare and Capture 1 | |
#define | REG_TC3_COUNT8_PERBUF (*(RwReg8 *)0x4101C02FUL) |
(TC3) COUNT8 Period Buffer | |
#define | REG_TC3_COUNT8_CCBUF0 (*(RwReg8 *)0x4101C030UL) |
(TC3) COUNT8 Compare and Capture Buffer 0 | |
#define | REG_TC3_COUNT8_CCBUF1 (*(RwReg8 *)0x4101C031UL) |
(TC3) COUNT8 Compare and Capture Buffer 1 | |
#define | TC3_CC_NUM 2 |
#define | TC3_DMAC_ID_MC_0 54 |
#define | TC3_DMAC_ID_MC_1 55 |
#define | TC3_DMAC_ID_MC_LSB 54 |
#define | TC3_DMAC_ID_MC_MSB 55 |
#define | TC3_DMAC_ID_MC_SIZE 2 |
#define | TC3_DMAC_ID_OVF 53 |
#define | TC3_EXT 0 |
#define | TC3_GCLK_ID 26 |
#define | TC3_MASTER_SLAVE_MODE 2 |
#define | TC3_OW_NUM 2 |
Instance description for TC3.
Copyright (c) 2019 Microchip Technology Inc.
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Definition in file tc3.h.