SAME54P20A Test Project
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Instance description for TC1. More...
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Macros | |
#define | REG_TC1_CTRLA (*(RwReg *)0x40003C00UL) |
(TC1) Control A | |
#define | REG_TC1_CTRLBCLR (*(RwReg8 *)0x40003C04UL) |
(TC1) Control B Clear | |
#define | REG_TC1_CTRLBSET (*(RwReg8 *)0x40003C05UL) |
(TC1) Control B Set | |
#define | REG_TC1_EVCTRL (*(RwReg16*)0x40003C06UL) |
(TC1) Event Control | |
#define | REG_TC1_INTENCLR (*(RwReg8 *)0x40003C08UL) |
(TC1) Interrupt Enable Clear | |
#define | REG_TC1_INTENSET (*(RwReg8 *)0x40003C09UL) |
(TC1) Interrupt Enable Set | |
#define | REG_TC1_INTFLAG (*(RwReg8 *)0x40003C0AUL) |
(TC1) Interrupt Flag Status and Clear | |
#define | REG_TC1_STATUS (*(RwReg8 *)0x40003C0BUL) |
(TC1) Status | |
#define | REG_TC1_WAVE (*(RwReg8 *)0x40003C0CUL) |
(TC1) Waveform Generation Control | |
#define | REG_TC1_DRVCTRL (*(RwReg8 *)0x40003C0DUL) |
(TC1) Control C | |
#define | REG_TC1_DBGCTRL (*(RwReg8 *)0x40003C0FUL) |
(TC1) Debug Control | |
#define | REG_TC1_SYNCBUSY (*(RoReg *)0x40003C10UL) |
(TC1) Synchronization Status | |
#define | REG_TC1_COUNT16_COUNT (*(RwReg16*)0x40003C14UL) |
(TC1) COUNT16 Count | |
#define | REG_TC1_COUNT16_CC0 (*(RwReg16*)0x40003C1CUL) |
(TC1) COUNT16 Compare and Capture 0 | |
#define | REG_TC1_COUNT16_CC1 (*(RwReg16*)0x40003C1EUL) |
(TC1) COUNT16 Compare and Capture 1 | |
#define | REG_TC1_COUNT16_CCBUF0 (*(RwReg16*)0x40003C30UL) |
(TC1) COUNT16 Compare and Capture Buffer 0 | |
#define | REG_TC1_COUNT16_CCBUF1 (*(RwReg16*)0x40003C32UL) |
(TC1) COUNT16 Compare and Capture Buffer 1 | |
#define | REG_TC1_COUNT32_COUNT (*(RwReg *)0x40003C14UL) |
(TC1) COUNT32 Count | |
#define | REG_TC1_COUNT32_CC0 (*(RwReg *)0x40003C1CUL) |
(TC1) COUNT32 Compare and Capture 0 | |
#define | REG_TC1_COUNT32_CC1 (*(RwReg *)0x40003C20UL) |
(TC1) COUNT32 Compare and Capture 1 | |
#define | REG_TC1_COUNT32_CCBUF0 (*(RwReg *)0x40003C30UL) |
(TC1) COUNT32 Compare and Capture Buffer 0 | |
#define | REG_TC1_COUNT32_CCBUF1 (*(RwReg *)0x40003C34UL) |
(TC1) COUNT32 Compare and Capture Buffer 1 | |
#define | REG_TC1_COUNT8_COUNT (*(RwReg8 *)0x40003C14UL) |
(TC1) COUNT8 Count | |
#define | REG_TC1_COUNT8_PER (*(RwReg8 *)0x40003C1BUL) |
(TC1) COUNT8 Period | |
#define | REG_TC1_COUNT8_CC0 (*(RwReg8 *)0x40003C1CUL) |
(TC1) COUNT8 Compare and Capture 0 | |
#define | REG_TC1_COUNT8_CC1 (*(RwReg8 *)0x40003C1DUL) |
(TC1) COUNT8 Compare and Capture 1 | |
#define | REG_TC1_COUNT8_PERBUF (*(RwReg8 *)0x40003C2FUL) |
(TC1) COUNT8 Period Buffer | |
#define | REG_TC1_COUNT8_CCBUF0 (*(RwReg8 *)0x40003C30UL) |
(TC1) COUNT8 Compare and Capture Buffer 0 | |
#define | REG_TC1_COUNT8_CCBUF1 (*(RwReg8 *)0x40003C31UL) |
(TC1) COUNT8 Compare and Capture Buffer 1 | |
#define | TC1_CC_NUM 2 |
#define | TC1_DMAC_ID_MC_0 48 |
#define | TC1_DMAC_ID_MC_1 49 |
#define | TC1_DMAC_ID_MC_LSB 48 |
#define | TC1_DMAC_ID_MC_MSB 49 |
#define | TC1_DMAC_ID_MC_SIZE 2 |
#define | TC1_DMAC_ID_OVF 47 |
#define | TC1_EXT 0 |
#define | TC1_GCLK_ID 9 |
#define | TC1_MASTER_SLAVE_MODE 2 |
#define | TC1_OW_NUM 2 |
Instance description for TC1.
Copyright (c) 2019 Microchip Technology Inc.
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Definition in file tc1.h.