DMAC Descriptor SRAM registers. More...

#include <dmac.h>

Data Fields
__IO DMAC_BTCTRL_Type	BTCTRL
	Offset: 0x00 (R/W 16) Block Transfer Control.

__IO DMAC_BTCNT_Type	BTCNT
	Offset: 0x02 (R/W 16) Block Transfer Count.

__IO DMAC_SRCADDR_Type	SRCADDR
	Offset: 0x04 (R/W 32) Block Transfer Source Address.

__IO DMAC_DSTADDR_Type	DSTADDR
	Offset: 0x08 (R/W 32) Block Transfer Destination Address.

__IO DMAC_DESCADDR_Type	DESCADDR
	Offset: 0x0C (R/W 32) Next Descriptor Address.

Detailed Description

DMAC Descriptor SRAM registers.

Definition at line 1395 of file dmac.h.

The documentation for this struct was generated from the following file:

/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/dmac.h

Data Fields