PAC hardware registers. More...

#include <pac.h>

Data Fields
__IO PAC_WRCTRL_Type	WRCTRL
	Offset: 0x00 (R/W 32) Write control.

__IO PAC_EVCTRL_Type	EVCTRL
	Offset: 0x04 (R/W 8) Event control.

RoReg8	Reserved1 [0x3]

__IO PAC_INTENCLR_Type	INTENCLR
	Offset: 0x08 (R/W 8) Interrupt enable clear.

__IO PAC_INTENSET_Type	INTENSET
	Offset: 0x09 (R/W 8) Interrupt enable set.

RoReg8	Reserved2 [0x6]

__IO PAC_INTFLAGAHB_Type	INTFLAGAHB
	Offset: 0x10 (R/W 32) Bridge interrupt flag status.

__IO PAC_INTFLAGA_Type	INTFLAGA
	Offset: 0x14 (R/W 32) Peripheral interrupt flag status - Bridge A.

__IO PAC_INTFLAGB_Type	INTFLAGB
	Offset: 0x18 (R/W 32) Peripheral interrupt flag status - Bridge B.

__IO PAC_INTFLAGC_Type	INTFLAGC
	Offset: 0x1C (R/W 32) Peripheral interrupt flag status - Bridge C.

__IO PAC_INTFLAGD_Type	INTFLAGD
	Offset: 0x20 (R/W 32) Peripheral interrupt flag status - Bridge D.

RoReg8	Reserved3 [0x10]

__I PAC_STATUSA_Type	STATUSA
	Offset: 0x34 (R/ 32) Peripheral write protection status - Bridge A.

__I PAC_STATUSB_Type	STATUSB
	Offset: 0x38 (R/ 32) Peripheral write protection status - Bridge B.

__I PAC_STATUSC_Type	STATUSC
	Offset: 0x3C (R/ 32) Peripheral write protection status - Bridge C.

__I PAC_STATUSD_Type	STATUSD
	Offset: 0x40 (R/ 32) Peripheral write protection status - Bridge D.

Detailed Description

PAC hardware registers.

Definition at line 664 of file pac.h.

The documentation for this struct was generated from the following file:

/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/pac.h

Data Fields