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419 lines
54 KiB
HTML
419 lines
54 KiB
HTML
4 years ago
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/sercom1.h File Reference</title>
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<div id="projectname">SAME54P20A Test Project
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">sercom1.h File Reference</div> </div>
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<div class="contents">
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<p>Instance description for SERCOM1.
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<a href="#details">More...</a></p>
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<p><a href="sercom1_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a1f4864a1692a6cf6f340d63cefbcd67b"><td class="memItemLeft" align="right" valign="top"><a id="a1f4864a1692a6cf6f340d63cefbcd67b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a1f4864a1692a6cf6f340d63cefbcd67b">REG_SERCOM1_I2CM_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003400UL)</td></tr>
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<tr class="memdesc:a1f4864a1692a6cf6f340d63cefbcd67b"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Control A <br /></td></tr>
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<tr class="separator:a1f4864a1692a6cf6f340d63cefbcd67b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac5fab4a155a1babd4992b857be11c100"><td class="memItemLeft" align="right" valign="top"><a id="ac5fab4a155a1babd4992b857be11c100"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ac5fab4a155a1babd4992b857be11c100">REG_SERCOM1_I2CM_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003404UL)</td></tr>
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<tr class="memdesc:ac5fab4a155a1babd4992b857be11c100"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Control B <br /></td></tr>
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<tr class="separator:ac5fab4a155a1babd4992b857be11c100"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae47fe1e8bbc8c51fd4f2e245fa92b360"><td class="memItemLeft" align="right" valign="top"><a id="ae47fe1e8bbc8c51fd4f2e245fa92b360"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ae47fe1e8bbc8c51fd4f2e245fa92b360">REG_SERCOM1_I2CM_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003408UL)</td></tr>
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<tr class="memdesc:ae47fe1e8bbc8c51fd4f2e245fa92b360"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Control C <br /></td></tr>
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<tr class="separator:ae47fe1e8bbc8c51fd4f2e245fa92b360"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abaf9ae88713e4a82e596e92dadd1bf03"><td class="memItemLeft" align="right" valign="top"><a id="abaf9ae88713e4a82e596e92dadd1bf03"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#abaf9ae88713e4a82e596e92dadd1bf03">REG_SERCOM1_I2CM_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4000340CUL)</td></tr>
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<tr class="memdesc:abaf9ae88713e4a82e596e92dadd1bf03"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Baud Rate <br /></td></tr>
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<tr class="separator:abaf9ae88713e4a82e596e92dadd1bf03"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5dfcb413654f9f3689542eb2209c959b"><td class="memItemLeft" align="right" valign="top"><a id="a5dfcb413654f9f3689542eb2209c959b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a5dfcb413654f9f3689542eb2209c959b">REG_SERCOM1_I2CM_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003414UL)</td></tr>
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<tr class="memdesc:a5dfcb413654f9f3689542eb2209c959b"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a5dfcb413654f9f3689542eb2209c959b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad7d5b3fa53af6e044c7af32afc91c02d"><td class="memItemLeft" align="right" valign="top"><a id="ad7d5b3fa53af6e044c7af32afc91c02d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ad7d5b3fa53af6e044c7af32afc91c02d">REG_SERCOM1_I2CM_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003416UL)</td></tr>
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<tr class="memdesc:ad7d5b3fa53af6e044c7af32afc91c02d"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Interrupt Enable Set <br /></td></tr>
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<tr class="separator:ad7d5b3fa53af6e044c7af32afc91c02d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b3648287f5a031c397ab0a60e827eab"><td class="memItemLeft" align="right" valign="top"><a id="a3b3648287f5a031c397ab0a60e827eab"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a3b3648287f5a031c397ab0a60e827eab">REG_SERCOM1_I2CM_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003418UL)</td></tr>
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<tr class="memdesc:a3b3648287f5a031c397ab0a60e827eab"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a3b3648287f5a031c397ab0a60e827eab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5bd25040ba886cbabec42f2f998282ce"><td class="memItemLeft" align="right" valign="top"><a id="a5bd25040ba886cbabec42f2f998282ce"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a5bd25040ba886cbabec42f2f998282ce">REG_SERCOM1_I2CM_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000341AUL)</td></tr>
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<tr class="memdesc:a5bd25040ba886cbabec42f2f998282ce"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Status <br /></td></tr>
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<tr class="separator:a5bd25040ba886cbabec42f2f998282ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad29e88bc3fc4a8590535d2eb9731c3d9"><td class="memItemLeft" align="right" valign="top"><a id="ad29e88bc3fc4a8590535d2eb9731c3d9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ad29e88bc3fc4a8590535d2eb9731c3d9">REG_SERCOM1_I2CM_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4000341CUL)</td></tr>
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<tr class="memdesc:ad29e88bc3fc4a8590535d2eb9731c3d9"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Synchronization Busy <br /></td></tr>
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<tr class="separator:ad29e88bc3fc4a8590535d2eb9731c3d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ebd89c076dd2a7dec490348ba050c1c"><td class="memItemLeft" align="right" valign="top"><a id="a2ebd89c076dd2a7dec490348ba050c1c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a2ebd89c076dd2a7dec490348ba050c1c">REG_SERCOM1_I2CM_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003424UL)</td></tr>
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<tr class="memdesc:a2ebd89c076dd2a7dec490348ba050c1c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Address <br /></td></tr>
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<tr class="separator:a2ebd89c076dd2a7dec490348ba050c1c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0f99fcf0734e26c565aa3dc223b184e5"><td class="memItemLeft" align="right" valign="top"><a id="a0f99fcf0734e26c565aa3dc223b184e5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a0f99fcf0734e26c565aa3dc223b184e5">REG_SERCOM1_I2CM_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003428UL)</td></tr>
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<tr class="memdesc:a0f99fcf0734e26c565aa3dc223b184e5"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Data <br /></td></tr>
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<tr class="separator:a0f99fcf0734e26c565aa3dc223b184e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a950e5a6bd044a201431e41b2f23e4093"><td class="memItemLeft" align="right" valign="top"><a id="a950e5a6bd044a201431e41b2f23e4093"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a950e5a6bd044a201431e41b2f23e4093">REG_SERCOM1_I2CM_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003430UL)</td></tr>
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||
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<tr class="memdesc:a950e5a6bd044a201431e41b2f23e4093"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CM Debug Control <br /></td></tr>
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<tr class="separator:a950e5a6bd044a201431e41b2f23e4093"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a74a4bdd692da706ae88ffa8d401f5a69"><td class="memItemLeft" align="right" valign="top"><a id="a74a4bdd692da706ae88ffa8d401f5a69"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a74a4bdd692da706ae88ffa8d401f5a69">REG_SERCOM1_I2CS_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003400UL)</td></tr>
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<tr class="memdesc:a74a4bdd692da706ae88ffa8d401f5a69"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Control A <br /></td></tr>
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<tr class="separator:a74a4bdd692da706ae88ffa8d401f5a69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a391465e31c6525f63fc6a0ea30027801"><td class="memItemLeft" align="right" valign="top"><a id="a391465e31c6525f63fc6a0ea30027801"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a391465e31c6525f63fc6a0ea30027801">REG_SERCOM1_I2CS_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003404UL)</td></tr>
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||
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<tr class="memdesc:a391465e31c6525f63fc6a0ea30027801"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Control B <br /></td></tr>
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<tr class="separator:a391465e31c6525f63fc6a0ea30027801"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab50915735b30a171ab714b1a21df7a82"><td class="memItemLeft" align="right" valign="top"><a id="ab50915735b30a171ab714b1a21df7a82"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ab50915735b30a171ab714b1a21df7a82">REG_SERCOM1_I2CS_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003408UL)</td></tr>
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<tr class="memdesc:ab50915735b30a171ab714b1a21df7a82"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Control C <br /></td></tr>
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<tr class="separator:ab50915735b30a171ab714b1a21df7a82"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3bb9435d8f9c2b1c0dd8aef9d318ab8e"><td class="memItemLeft" align="right" valign="top"><a id="a3bb9435d8f9c2b1c0dd8aef9d318ab8e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a3bb9435d8f9c2b1c0dd8aef9d318ab8e">REG_SERCOM1_I2CS_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003414UL)</td></tr>
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<tr class="memdesc:a3bb9435d8f9c2b1c0dd8aef9d318ab8e"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a3bb9435d8f9c2b1c0dd8aef9d318ab8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a90802b460ffb01bb3ed09278dda07d3e"><td class="memItemLeft" align="right" valign="top"><a id="a90802b460ffb01bb3ed09278dda07d3e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a90802b460ffb01bb3ed09278dda07d3e">REG_SERCOM1_I2CS_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003416UL)</td></tr>
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||
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<tr class="memdesc:a90802b460ffb01bb3ed09278dda07d3e"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a90802b460ffb01bb3ed09278dda07d3e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6edfbd4f825a36bb95aff598488d07f7"><td class="memItemLeft" align="right" valign="top"><a id="a6edfbd4f825a36bb95aff598488d07f7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a6edfbd4f825a36bb95aff598488d07f7">REG_SERCOM1_I2CS_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003418UL)</td></tr>
|
||
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<tr class="memdesc:a6edfbd4f825a36bb95aff598488d07f7"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a6edfbd4f825a36bb95aff598488d07f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab27ee81a16ede9f28cc55123e2037572"><td class="memItemLeft" align="right" valign="top"><a id="ab27ee81a16ede9f28cc55123e2037572"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ab27ee81a16ede9f28cc55123e2037572">REG_SERCOM1_I2CS_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000341AUL)</td></tr>
|
||
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<tr class="memdesc:ab27ee81a16ede9f28cc55123e2037572"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Status <br /></td></tr>
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<tr class="separator:ab27ee81a16ede9f28cc55123e2037572"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1584461f858aa8bb121e804c3dcd45cc"><td class="memItemLeft" align="right" valign="top"><a id="a1584461f858aa8bb121e804c3dcd45cc"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a1584461f858aa8bb121e804c3dcd45cc">REG_SERCOM1_I2CS_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4000341CUL)</td></tr>
|
||
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<tr class="memdesc:a1584461f858aa8bb121e804c3dcd45cc"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Synchronization Busy <br /></td></tr>
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<tr class="separator:a1584461f858aa8bb121e804c3dcd45cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00491602e509f98b73c2e3a18c542b50"><td class="memItemLeft" align="right" valign="top"><a id="a00491602e509f98b73c2e3a18c542b50"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a00491602e509f98b73c2e3a18c542b50">REG_SERCOM1_I2CS_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003422UL)</td></tr>
|
||
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<tr class="memdesc:a00491602e509f98b73c2e3a18c542b50"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Length <br /></td></tr>
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<tr class="separator:a00491602e509f98b73c2e3a18c542b50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a35bef2c7fde0a4813fc8d4ab951fa49d"><td class="memItemLeft" align="right" valign="top"><a id="a35bef2c7fde0a4813fc8d4ab951fa49d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a35bef2c7fde0a4813fc8d4ab951fa49d">REG_SERCOM1_I2CS_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003424UL)</td></tr>
|
||
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<tr class="memdesc:a35bef2c7fde0a4813fc8d4ab951fa49d"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Address <br /></td></tr>
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<tr class="separator:a35bef2c7fde0a4813fc8d4ab951fa49d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a743f0850f4f756974fa114727d5e3fee"><td class="memItemLeft" align="right" valign="top"><a id="a743f0850f4f756974fa114727d5e3fee"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a743f0850f4f756974fa114727d5e3fee">REG_SERCOM1_I2CS_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003428UL)</td></tr>
|
||
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<tr class="memdesc:a743f0850f4f756974fa114727d5e3fee"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) I2CS Data <br /></td></tr>
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<tr class="separator:a743f0850f4f756974fa114727d5e3fee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5e9e4533863d756fff346fab9b410b07"><td class="memItemLeft" align="right" valign="top"><a id="a5e9e4533863d756fff346fab9b410b07"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a5e9e4533863d756fff346fab9b410b07">REG_SERCOM1_SPI_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003400UL)</td></tr>
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||
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<tr class="memdesc:a5e9e4533863d756fff346fab9b410b07"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Control A <br /></td></tr>
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<tr class="separator:a5e9e4533863d756fff346fab9b410b07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0b714b1b27f5dd36074aa310e07283db"><td class="memItemLeft" align="right" valign="top"><a id="a0b714b1b27f5dd36074aa310e07283db"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a0b714b1b27f5dd36074aa310e07283db">REG_SERCOM1_SPI_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003404UL)</td></tr>
|
||
|
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<tr class="memdesc:a0b714b1b27f5dd36074aa310e07283db"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Control B <br /></td></tr>
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<tr class="separator:a0b714b1b27f5dd36074aa310e07283db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1376dc9ffb5f1e5bf4a06af8ca69bf72"><td class="memItemLeft" align="right" valign="top"><a id="a1376dc9ffb5f1e5bf4a06af8ca69bf72"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a1376dc9ffb5f1e5bf4a06af8ca69bf72">REG_SERCOM1_SPI_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003408UL)</td></tr>
|
||
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<tr class="memdesc:a1376dc9ffb5f1e5bf4a06af8ca69bf72"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Control C <br /></td></tr>
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<tr class="separator:a1376dc9ffb5f1e5bf4a06af8ca69bf72"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a40154ff2d8ad0a33f00ffedd14276927"><td class="memItemLeft" align="right" valign="top"><a id="a40154ff2d8ad0a33f00ffedd14276927"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a40154ff2d8ad0a33f00ffedd14276927">REG_SERCOM1_SPI_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000340CUL)</td></tr>
|
||
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<tr class="memdesc:a40154ff2d8ad0a33f00ffedd14276927"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Baud Rate <br /></td></tr>
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<tr class="separator:a40154ff2d8ad0a33f00ffedd14276927"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa855247941f722c4d2a8da0e3ebb03e4"><td class="memItemLeft" align="right" valign="top"><a id="aa855247941f722c4d2a8da0e3ebb03e4"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#aa855247941f722c4d2a8da0e3ebb03e4">REG_SERCOM1_SPI_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003414UL)</td></tr>
|
||
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<tr class="memdesc:aa855247941f722c4d2a8da0e3ebb03e4"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:aa855247941f722c4d2a8da0e3ebb03e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a596e6d68bdc7bb659456fd4cbb5594ba"><td class="memItemLeft" align="right" valign="top"><a id="a596e6d68bdc7bb659456fd4cbb5594ba"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a596e6d68bdc7bb659456fd4cbb5594ba">REG_SERCOM1_SPI_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003416UL)</td></tr>
|
||
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<tr class="memdesc:a596e6d68bdc7bb659456fd4cbb5594ba"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a596e6d68bdc7bb659456fd4cbb5594ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae0542107fc07c61e680022066d759283"><td class="memItemLeft" align="right" valign="top"><a id="ae0542107fc07c61e680022066d759283"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ae0542107fc07c61e680022066d759283">REG_SERCOM1_SPI_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003418UL)</td></tr>
|
||
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<tr class="memdesc:ae0542107fc07c61e680022066d759283"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:ae0542107fc07c61e680022066d759283"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af774fc6a10405c3c6fec3c59578b799c"><td class="memItemLeft" align="right" valign="top"><a id="af774fc6a10405c3c6fec3c59578b799c"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#af774fc6a10405c3c6fec3c59578b799c">REG_SERCOM1_SPI_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000341AUL)</td></tr>
|
||
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<tr class="memdesc:af774fc6a10405c3c6fec3c59578b799c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Status <br /></td></tr>
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||
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<tr class="separator:af774fc6a10405c3c6fec3c59578b799c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a690bc624bdc7e38006f458665db089d1"><td class="memItemLeft" align="right" valign="top"><a id="a690bc624bdc7e38006f458665db089d1"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a690bc624bdc7e38006f458665db089d1">REG_SERCOM1_SPI_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4000341CUL)</td></tr>
|
||
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<tr class="memdesc:a690bc624bdc7e38006f458665db089d1"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Synchronization Busy <br /></td></tr>
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<tr class="separator:a690bc624bdc7e38006f458665db089d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad7e85009a95b35a36905426d9e9c841f"><td class="memItemLeft" align="right" valign="top"><a id="ad7e85009a95b35a36905426d9e9c841f"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ad7e85009a95b35a36905426d9e9c841f">REG_SERCOM1_SPI_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003422UL)</td></tr>
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||
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<tr class="memdesc:ad7e85009a95b35a36905426d9e9c841f"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Length <br /></td></tr>
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||
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<tr class="separator:ad7e85009a95b35a36905426d9e9c841f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4ac9033918033137e78e7a2dfff1408d"><td class="memItemLeft" align="right" valign="top"><a id="a4ac9033918033137e78e7a2dfff1408d"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a4ac9033918033137e78e7a2dfff1408d">REG_SERCOM1_SPI_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003424UL)</td></tr>
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||
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<tr class="memdesc:a4ac9033918033137e78e7a2dfff1408d"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Address <br /></td></tr>
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||
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<tr class="separator:a4ac9033918033137e78e7a2dfff1408d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8b80abfdbc8d1a93325c401705fe6706"><td class="memItemLeft" align="right" valign="top"><a id="a8b80abfdbc8d1a93325c401705fe6706"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a8b80abfdbc8d1a93325c401705fe6706">REG_SERCOM1_SPI_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003428UL)</td></tr>
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||
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<tr class="memdesc:a8b80abfdbc8d1a93325c401705fe6706"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Data <br /></td></tr>
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||
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<tr class="separator:a8b80abfdbc8d1a93325c401705fe6706"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a08ee462b08d893279eb04a3837d81582"><td class="memItemLeft" align="right" valign="top"><a id="a08ee462b08d893279eb04a3837d81582"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a08ee462b08d893279eb04a3837d81582">REG_SERCOM1_SPI_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003430UL)</td></tr>
|
||
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<tr class="memdesc:a08ee462b08d893279eb04a3837d81582"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) SPI Debug Control <br /></td></tr>
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||
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<tr class="separator:a08ee462b08d893279eb04a3837d81582"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a910fc7111c0d79cfe78a67c0aaf99ee2"><td class="memItemLeft" align="right" valign="top"><a id="a910fc7111c0d79cfe78a67c0aaf99ee2"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a910fc7111c0d79cfe78a67c0aaf99ee2">REG_SERCOM1_USART_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003400UL)</td></tr>
|
||
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<tr class="memdesc:a910fc7111c0d79cfe78a67c0aaf99ee2"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Control A <br /></td></tr>
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||
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<tr class="separator:a910fc7111c0d79cfe78a67c0aaf99ee2"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a72346b05ccd2ff5518470aa2200f41b3"><td class="memItemLeft" align="right" valign="top"><a id="a72346b05ccd2ff5518470aa2200f41b3"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a72346b05ccd2ff5518470aa2200f41b3">REG_SERCOM1_USART_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003404UL)</td></tr>
|
||
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<tr class="memdesc:a72346b05ccd2ff5518470aa2200f41b3"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Control B <br /></td></tr>
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||
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<tr class="separator:a72346b05ccd2ff5518470aa2200f41b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a26869cfe74fc0ef4a902081bf2489801"><td class="memItemLeft" align="right" valign="top"><a id="a26869cfe74fc0ef4a902081bf2489801"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a26869cfe74fc0ef4a902081bf2489801">REG_SERCOM1_USART_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003408UL)</td></tr>
|
||
|
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<tr class="memdesc:a26869cfe74fc0ef4a902081bf2489801"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Control C <br /></td></tr>
|
||
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<tr class="separator:a26869cfe74fc0ef4a902081bf2489801"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:af933180c3aa6efe60c66c341e8c24ad2"><td class="memItemLeft" align="right" valign="top"><a id="af933180c3aa6efe60c66c341e8c24ad2"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#af933180c3aa6efe60c66c341e8c24ad2">REG_SERCOM1_USART_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000340CUL)</td></tr>
|
||
|
|
<tr class="memdesc:af933180c3aa6efe60c66c341e8c24ad2"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Baud Rate <br /></td></tr>
|
||
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<tr class="separator:af933180c3aa6efe60c66c341e8c24ad2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:a4d0a7083ef2c94bbb832b1c82b6ad7d5"><td class="memItemLeft" align="right" valign="top"><a id="a4d0a7083ef2c94bbb832b1c82b6ad7d5"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a4d0a7083ef2c94bbb832b1c82b6ad7d5">REG_SERCOM1_USART_RXPL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000340EUL)</td></tr>
|
||
|
|
<tr class="memdesc:a4d0a7083ef2c94bbb832b1c82b6ad7d5"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Receive Pulse Length <br /></td></tr>
|
||
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<tr class="separator:a4d0a7083ef2c94bbb832b1c82b6ad7d5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a75545c253dde32fd37739d7b8a208d99"><td class="memItemLeft" align="right" valign="top"><a id="a75545c253dde32fd37739d7b8a208d99"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a75545c253dde32fd37739d7b8a208d99">REG_SERCOM1_USART_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003414UL)</td></tr>
|
||
|
|
<tr class="memdesc:a75545c253dde32fd37739d7b8a208d99"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Interrupt Enable Clear <br /></td></tr>
|
||
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<tr class="separator:a75545c253dde32fd37739d7b8a208d99"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ae4f2c06602f5d58464d1b1dd9d6e6b85"><td class="memItemLeft" align="right" valign="top"><a id="ae4f2c06602f5d58464d1b1dd9d6e6b85"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ae4f2c06602f5d58464d1b1dd9d6e6b85">REG_SERCOM1_USART_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003416UL)</td></tr>
|
||
|
|
<tr class="memdesc:ae4f2c06602f5d58464d1b1dd9d6e6b85"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Interrupt Enable Set <br /></td></tr>
|
||
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<tr class="separator:ae4f2c06602f5d58464d1b1dd9d6e6b85"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a90f73decbad3f125f9fa663ed5c43e13"><td class="memItemLeft" align="right" valign="top"><a id="a90f73decbad3f125f9fa663ed5c43e13"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a90f73decbad3f125f9fa663ed5c43e13">REG_SERCOM1_USART_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003418UL)</td></tr>
|
||
|
|
<tr class="memdesc:a90f73decbad3f125f9fa663ed5c43e13"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Interrupt Flag Status and Clear <br /></td></tr>
|
||
|
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<tr class="separator:a90f73decbad3f125f9fa663ed5c43e13"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:a54f6807687d8d8aec420372fac25ed51"><td class="memItemLeft" align="right" valign="top"><a id="a54f6807687d8d8aec420372fac25ed51"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a54f6807687d8d8aec420372fac25ed51">REG_SERCOM1_USART_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000341AUL)</td></tr>
|
||
|
|
<tr class="memdesc:a54f6807687d8d8aec420372fac25ed51"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Status <br /></td></tr>
|
||
|
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<tr class="separator:a54f6807687d8d8aec420372fac25ed51"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:ad9b0dea3beeabfc505b42aace6d73d04"><td class="memItemLeft" align="right" valign="top"><a id="ad9b0dea3beeabfc505b42aace6d73d04"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#ad9b0dea3beeabfc505b42aace6d73d04">REG_SERCOM1_USART_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4000341CUL)</td></tr>
|
||
|
|
<tr class="memdesc:ad9b0dea3beeabfc505b42aace6d73d04"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Synchronization Busy <br /></td></tr>
|
||
|
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<tr class="separator:ad9b0dea3beeabfc505b42aace6d73d04"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a94ef8bfbac37e1e0566a743cc2360cd0"><td class="memItemLeft" align="right" valign="top"><a id="a94ef8bfbac37e1e0566a743cc2360cd0"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a94ef8bfbac37e1e0566a743cc2360cd0">REG_SERCOM1_USART_RXERRCNT</a>   (*(<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> *)0x40003420UL)</td></tr>
|
||
|
|
<tr class="memdesc:a94ef8bfbac37e1e0566a743cc2360cd0"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Receive Error Count <br /></td></tr>
|
||
|
|
<tr class="separator:a94ef8bfbac37e1e0566a743cc2360cd0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a953ca7cab28b8ce291918cb1be12308c"><td class="memItemLeft" align="right" valign="top"><a id="a953ca7cab28b8ce291918cb1be12308c"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a953ca7cab28b8ce291918cb1be12308c">REG_SERCOM1_USART_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003422UL)</td></tr>
|
||
|
|
<tr class="memdesc:a953ca7cab28b8ce291918cb1be12308c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Length <br /></td></tr>
|
||
|
|
<tr class="separator:a953ca7cab28b8ce291918cb1be12308c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a752096865699d86360574f22e0168e5e"><td class="memItemLeft" align="right" valign="top"><a id="a752096865699d86360574f22e0168e5e"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a752096865699d86360574f22e0168e5e">REG_SERCOM1_USART_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003428UL)</td></tr>
|
||
|
|
<tr class="memdesc:a752096865699d86360574f22e0168e5e"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Data <br /></td></tr>
|
||
|
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<tr class="separator:a752096865699d86360574f22e0168e5e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a6c6aabfd8035dbe7511c4f30e5b3c697"><td class="memItemLeft" align="right" valign="top"><a id="a6c6aabfd8035dbe7511c4f30e5b3c697"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom1_8h.html#a6c6aabfd8035dbe7511c4f30e5b3c697">REG_SERCOM1_USART_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003430UL)</td></tr>
|
||
|
|
<tr class="memdesc:a6c6aabfd8035dbe7511c4f30e5b3c697"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM1) USART Debug Control <br /></td></tr>
|
||
|
|
<tr class="separator:a6c6aabfd8035dbe7511c4f30e5b3c697"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a96d45dde2ac8227ec35892983e00d20f"><td class="memItemLeft" align="right" valign="top"><a id="a96d45dde2ac8227ec35892983e00d20f"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_CLK_REDUCTION</b>   1</td></tr>
|
||
|
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<tr class="separator:a96d45dde2ac8227ec35892983e00d20f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a9603aa2a95f697b25299e5c4070e5a50"><td class="memItemLeft" align="right" valign="top"><a id="a9603aa2a95f697b25299e5c4070e5a50"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_DLY_COMPENSATION</b>   1</td></tr>
|
||
|
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<tr class="separator:a9603aa2a95f697b25299e5c4070e5a50"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a529ed4bf63959d6fbf15921ef406b6bb"><td class="memItemLeft" align="right" valign="top"><a id="a529ed4bf63959d6fbf15921ef406b6bb"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_DMA</b>   1</td></tr>
|
||
|
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<tr class="separator:a529ed4bf63959d6fbf15921ef406b6bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:afbc2d8e28643a3c810fc5f0dbaf56604"><td class="memItemLeft" align="right" valign="top"><a id="afbc2d8e28643a3c810fc5f0dbaf56604"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_DMAC_ID_RX</b>   6</td></tr>
|
||
|
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<tr class="separator:afbc2d8e28643a3c810fc5f0dbaf56604"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:acb019d23314c2c31c719d1a42365fcf3"><td class="memItemLeft" align="right" valign="top"><a id="acb019d23314c2c31c719d1a42365fcf3"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_DMAC_ID_TX</b>   7</td></tr>
|
||
|
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<tr class="separator:acb019d23314c2c31c719d1a42365fcf3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a1d83c7786cc4d5f47bfa0813245f501d"><td class="memItemLeft" align="right" valign="top"><a id="a1d83c7786cc4d5f47bfa0813245f501d"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_FIFO_DEPTH_POWER</b>   1</td></tr>
|
||
|
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<tr class="separator:a1d83c7786cc4d5f47bfa0813245f501d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:ae8fdad44d3ab6342ad66664ac803514c"><td class="memItemLeft" align="right" valign="top"><a id="ae8fdad44d3ab6342ad66664ac803514c"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_GCLK_ID_CORE</b>   8</td></tr>
|
||
|
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<tr class="separator:ae8fdad44d3ab6342ad66664ac803514c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:aa03f1aafbc33251ecb582fc82b094e6e"><td class="memItemLeft" align="right" valign="top"><a id="aa03f1aafbc33251ecb582fc82b094e6e"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_GCLK_ID_SLOW</b>   3</td></tr>
|
||
|
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<tr class="separator:aa03f1aafbc33251ecb582fc82b094e6e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:adb556c2d1ad6a8c9796f9b9239f7261f"><td class="memItemLeft" align="right" valign="top"><a id="adb556c2d1ad6a8c9796f9b9239f7261f"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_INT_MSB</b>   6</td></tr>
|
||
|
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<tr class="separator:adb556c2d1ad6a8c9796f9b9239f7261f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:a6ad53bd959d84fd08db129e22a5659d8"><td class="memItemLeft" align="right" valign="top"><a id="a6ad53bd959d84fd08db129e22a5659d8"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CM</b>   1</td></tr>
|
||
|
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<tr class="separator:a6ad53bd959d84fd08db129e22a5659d8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:afa292c040ef3398d30f40a6607aade14"><td class="memItemLeft" align="right" valign="top"><a id="afa292c040ef3398d30f40a6607aade14"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CS</b>   1</td></tr>
|
||
|
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<tr class="separator:afa292c040ef3398d30f40a6607aade14"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:accac6d81edfb318f728879ea5409e0af"><td class="memItemLeft" align="right" valign="top"><a id="accac6d81edfb318f728879ea5409e0af"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CS_AUTO_ACK</b>   1</td></tr>
|
||
|
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<tr class="separator:accac6d81edfb318f728879ea5409e0af"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:ace0481ff6c93d193765ed8cafb445ef0"><td class="memItemLeft" align="right" valign="top"><a id="ace0481ff6c93d193765ed8cafb445ef0"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CS_GROUP_CMD</b>   1</td></tr>
|
||
|
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<tr class="separator:ace0481ff6c93d193765ed8cafb445ef0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:a53cec53249f81d48974cff6f593fbfc1"><td class="memItemLeft" align="right" valign="top"><a id="a53cec53249f81d48974cff6f593fbfc1"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CS_SDASETUP_CNT_SIZE</b>   8</td></tr>
|
||
|
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<tr class="separator:a53cec53249f81d48974cff6f593fbfc1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a4a8279e8e505d141d759c9af38733e3c"><td class="memItemLeft" align="right" valign="top"><a id="a4a8279e8e505d141d759c9af38733e3c"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CS_SDASETUP_SIZE</b>   4</td></tr>
|
||
|
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<tr class="separator:a4a8279e8e505d141d759c9af38733e3c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a6f99b2f629036da7919b8a09cbb6ca18"><td class="memItemLeft" align="right" valign="top"><a id="a6f99b2f629036da7919b8a09cbb6ca18"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2CS_SUDAT</b>   1</td></tr>
|
||
|
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<tr class="separator:a6f99b2f629036da7919b8a09cbb6ca18"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a0c37ddd1240688d1bf52ea1ddc200196"><td class="memItemLeft" align="right" valign="top"><a id="a0c37ddd1240688d1bf52ea1ddc200196"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2C_FASTMP</b>   1</td></tr>
|
||
|
|
<tr class="separator:a0c37ddd1240688d1bf52ea1ddc200196"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a10dded7a580c7fd1a5403b7ed30d7bce"><td class="memItemLeft" align="right" valign="top"><a id="a10dded7a580c7fd1a5403b7ed30d7bce"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2C_HSMODE</b>   1</td></tr>
|
||
|
|
<tr class="separator:a10dded7a580c7fd1a5403b7ed30d7bce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:aae7177eaa0cbfa619a92f741c2bcdb8c"><td class="memItemLeft" align="right" valign="top"><a id="aae7177eaa0cbfa619a92f741c2bcdb8c"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2C_SCLSM_MODE</b>   1</td></tr>
|
||
|
|
<tr class="separator:aae7177eaa0cbfa619a92f741c2bcdb8c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a26005d42ece9f311674daf0945e203bc"><td class="memItemLeft" align="right" valign="top"><a id="a26005d42ece9f311674daf0945e203bc"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2C_SMB_TIMEOUTS</b>   1</td></tr>
|
||
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<tr class="memitem:a1d0dd5d8964d7f4fff0c2f4932e11c1a"><td class="memItemLeft" align="right" valign="top"><a id="a1d0dd5d8964d7f4fff0c2f4932e11c1a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_I2C_TENBIT_ADR</b>   1</td></tr>
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<tr class="separator:a1d0dd5d8964d7f4fff0c2f4932e11c1a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad970303aac38bb675ce347113138bdb0"><td class="memItemLeft" align="right" valign="top"><a id="ad970303aac38bb675ce347113138bdb0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_PMSB</b>   3</td></tr>
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<tr class="separator:ad970303aac38bb675ce347113138bdb0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7a0c22ebdc211da4d1c113e6937d427d"><td class="memItemLeft" align="right" valign="top"><a id="a7a0c22ebdc211da4d1c113e6937d427d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_RETENTION_SUPPORT</b>   0</td></tr>
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<tr class="separator:a7a0c22ebdc211da4d1c113e6937d427d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9645af199707910483d393b15c9c6284"><td class="memItemLeft" align="right" valign="top"><a id="a9645af199707910483d393b15c9c6284"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_SE_CNT</b>   1</td></tr>
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<tr class="separator:a9645af199707910483d393b15c9c6284"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1891ae46c4ad7111fb78a5b61a750e9"><td class="memItemLeft" align="right" valign="top"><a id="ae1891ae46c4ad7111fb78a5b61a750e9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_SPI</b>   1</td></tr>
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<tr class="separator:ae1891ae46c4ad7111fb78a5b61a750e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac5e4d7879769198009d9a0eb2a8ddf04"><td class="memItemLeft" align="right" valign="top"><a id="ac5e4d7879769198009d9a0eb2a8ddf04"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_SPI_HW_SS_CTRL</b>   1</td></tr>
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<tr class="separator:ac5e4d7879769198009d9a0eb2a8ddf04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6d9c040575fbec572a57dd3b5339e35f"><td class="memItemLeft" align="right" valign="top"><a id="a6d9c040575fbec572a57dd3b5339e35f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_SPI_ICSPACE_EXT</b>   1</td></tr>
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<tr class="separator:a6d9c040575fbec572a57dd3b5339e35f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ce7559dd6f8963e6e4902c79bcdf6a9"><td class="memItemLeft" align="right" valign="top"><a id="a2ce7559dd6f8963e6e4902c79bcdf6a9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_SPI_OZMO</b>   0</td></tr>
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<tr class="separator:a2ce7559dd6f8963e6e4902c79bcdf6a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad8da36118d0fc40a5b848376bf52d614"><td class="memItemLeft" align="right" valign="top"><a id="ad8da36118d0fc40a5b848376bf52d614"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_SPI_WAKE_ON_SSL</b>   1</td></tr>
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<tr class="separator:ad8da36118d0fc40a5b848376bf52d614"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af7d5953223f136b7d75c42009269738b"><td class="memItemLeft" align="right" valign="top"><a id="af7d5953223f136b7d75c42009269738b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_TTBIT_EXTENSION</b>   1</td></tr>
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<tr class="separator:af7d5953223f136b7d75c42009269738b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5ad4bf5b275834125d6379acf772a485"><td class="memItemLeft" align="right" valign="top"><a id="a5ad4bf5b275834125d6379acf772a485"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART</b>   1</td></tr>
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<tr class="separator:a5ad4bf5b275834125d6379acf772a485"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab261f276edf181bfb61c860347af0e9a"><td class="memItemLeft" align="right" valign="top"><a id="ab261f276edf181bfb61c860347af0e9a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_AUTOBAUD</b>   1</td></tr>
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<tr class="separator:ab261f276edf181bfb61c860347af0e9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7821eb8e95521e7a15175ac07d9a8e74"><td class="memItemLeft" align="right" valign="top"><a id="a7821eb8e95521e7a15175ac07d9a8e74"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_COLDET</b>   1</td></tr>
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<tr class="separator:a7821eb8e95521e7a15175ac07d9a8e74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3980061b705a02b99404c384438ce0ef"><td class="memItemLeft" align="right" valign="top"><a id="a3980061b705a02b99404c384438ce0ef"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_FLOW_CTRL</b>   1</td></tr>
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<tr class="separator:a3980061b705a02b99404c384438ce0ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a926bf491c82e34ee6cdda004debb87c6"><td class="memItemLeft" align="right" valign="top"><a id="a926bf491c82e34ee6cdda004debb87c6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_FRAC_BAUD</b>   1</td></tr>
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<tr class="separator:a926bf491c82e34ee6cdda004debb87c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a03a0e07911bb4b671a666cc9ce405949"><td class="memItemLeft" align="right" valign="top"><a id="a03a0e07911bb4b671a666cc9ce405949"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_IRDA</b>   1</td></tr>
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<tr class="separator:a03a0e07911bb4b671a666cc9ce405949"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac8b817cf273fbb0a2b5d3ab4214d7841"><td class="memItemLeft" align="right" valign="top"><a id="ac8b817cf273fbb0a2b5d3ab4214d7841"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_ISO7816</b>   1</td></tr>
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<tr class="separator:ac8b817cf273fbb0a2b5d3ab4214d7841"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf2518558334406196eb80bc55a4847b"><td class="memItemLeft" align="right" valign="top"><a id="acf2518558334406196eb80bc55a4847b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_LIN_MASTER</b>   1</td></tr>
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<tr class="separator:acf2518558334406196eb80bc55a4847b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa2f239ba4bf16904eabfa0dffe547c67"><td class="memItemLeft" align="right" valign="top"><a id="aa2f239ba4bf16904eabfa0dffe547c67"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_RS485</b>   1</td></tr>
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<tr class="separator:aa2f239ba4bf16904eabfa0dffe547c67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af7a079c4b653d12d499e5c6dd090500e"><td class="memItemLeft" align="right" valign="top"><a id="af7a079c4b653d12d499e5c6dd090500e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_SAMPA_EXT</b>   1</td></tr>
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<tr class="separator:af7a079c4b653d12d499e5c6dd090500e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2f4f0eb7030965740e0c5241ef0b2fc6"><td class="memItemLeft" align="right" valign="top"><a id="a2f4f0eb7030965740e0c5241ef0b2fc6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM1_USART_SAMPR_EXT</b>   1</td></tr>
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<tr class="separator:a2f4f0eb7030965740e0c5241ef0b2fc6"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
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<div class="textblock"><p>Instance description for SERCOM1. </p>
|
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="sercom1_8h_source.html">sercom1.h</a>.</p>
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</div></div><!-- contents -->
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<!-- start footer part -->
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<hr class="footer"/><address class="footer"><small>
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Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
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</small></address>
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</body>
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</html>
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