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287 lines
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287 lines
34 KiB
HTML
4 years ago
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/tcc0.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">tcc0.h File Reference</div> </div>
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<p>Instance description for TCC0.
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<a href="#details">More...</a></p>
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<p><a href="tcc0_8h_source.html">Go to the source code of this file.</a></p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a1f56c0e830610bfc8c4301f63b813e80"><td class="memItemLeft" align="right" valign="top"><a id="a1f56c0e830610bfc8c4301f63b813e80"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a1f56c0e830610bfc8c4301f63b813e80">REG_TCC0_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016000UL)</td></tr>
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<tr class="memdesc:a1f56c0e830610bfc8c4301f63b813e80"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Control A <br /></td></tr>
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<tr class="separator:a1f56c0e830610bfc8c4301f63b813e80"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7167c4fcd469e66ad42c0a9265066eba"><td class="memItemLeft" align="right" valign="top"><a id="a7167c4fcd469e66ad42c0a9265066eba"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a7167c4fcd469e66ad42c0a9265066eba">REG_TCC0_CTRLBCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41016004UL)</td></tr>
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<tr class="memdesc:a7167c4fcd469e66ad42c0a9265066eba"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Control B Clear <br /></td></tr>
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<tr class="separator:a7167c4fcd469e66ad42c0a9265066eba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9f91f7fd473ef30569ad9c748864f3c1"><td class="memItemLeft" align="right" valign="top"><a id="a9f91f7fd473ef30569ad9c748864f3c1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a9f91f7fd473ef30569ad9c748864f3c1">REG_TCC0_CTRLBSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41016005UL)</td></tr>
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<tr class="memdesc:a9f91f7fd473ef30569ad9c748864f3c1"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Control B Set <br /></td></tr>
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<tr class="separator:a9f91f7fd473ef30569ad9c748864f3c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad12e74951448d865aecf208fb76d46c7"><td class="memItemLeft" align="right" valign="top"><a id="ad12e74951448d865aecf208fb76d46c7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#ad12e74951448d865aecf208fb76d46c7">REG_TCC0_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x41016008UL)</td></tr>
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<tr class="memdesc:ad12e74951448d865aecf208fb76d46c7"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Synchronization Busy <br /></td></tr>
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<tr class="separator:ad12e74951448d865aecf208fb76d46c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab3d8e37144c8544c57de2f9354881af6"><td class="memItemLeft" align="right" valign="top"><a id="ab3d8e37144c8544c57de2f9354881af6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#ab3d8e37144c8544c57de2f9354881af6">REG_TCC0_FCTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101600CUL)</td></tr>
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<tr class="memdesc:ab3d8e37144c8544c57de2f9354881af6"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Recoverable Fault A Configuration <br /></td></tr>
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<tr class="separator:ab3d8e37144c8544c57de2f9354881af6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3e82b63cd5b5717afdb8a5367600ab35"><td class="memItemLeft" align="right" valign="top"><a id="a3e82b63cd5b5717afdb8a5367600ab35"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a3e82b63cd5b5717afdb8a5367600ab35">REG_TCC0_FCTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016010UL)</td></tr>
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<tr class="memdesc:a3e82b63cd5b5717afdb8a5367600ab35"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Recoverable Fault B Configuration <br /></td></tr>
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<tr class="separator:a3e82b63cd5b5717afdb8a5367600ab35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b3702b80c2ea5b0b6c96e235ba3fd47"><td class="memItemLeft" align="right" valign="top"><a id="a3b3702b80c2ea5b0b6c96e235ba3fd47"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a3b3702b80c2ea5b0b6c96e235ba3fd47">REG_TCC0_WEXCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016014UL)</td></tr>
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<tr class="memdesc:a3b3702b80c2ea5b0b6c96e235ba3fd47"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Waveform Extension Configuration <br /></td></tr>
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<tr class="separator:a3b3702b80c2ea5b0b6c96e235ba3fd47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7012404b12accd00d325f7d44f47d201"><td class="memItemLeft" align="right" valign="top"><a id="a7012404b12accd00d325f7d44f47d201"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a7012404b12accd00d325f7d44f47d201">REG_TCC0_DRVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016018UL)</td></tr>
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<tr class="memdesc:a7012404b12accd00d325f7d44f47d201"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Driver Control <br /></td></tr>
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<tr class="separator:a7012404b12accd00d325f7d44f47d201"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a12089f69737b0d173085cd9a10a39007"><td class="memItemLeft" align="right" valign="top"><a id="a12089f69737b0d173085cd9a10a39007"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a12089f69737b0d173085cd9a10a39007">REG_TCC0_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4101601EUL)</td></tr>
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<tr class="memdesc:a12089f69737b0d173085cd9a10a39007"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Debug Control <br /></td></tr>
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<tr class="separator:a12089f69737b0d173085cd9a10a39007"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a291dc420fe89a8f64b5f7595fff350ce"><td class="memItemLeft" align="right" valign="top"><a id="a291dc420fe89a8f64b5f7595fff350ce"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a291dc420fe89a8f64b5f7595fff350ce">REG_TCC0_EVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016020UL)</td></tr>
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<tr class="memdesc:a291dc420fe89a8f64b5f7595fff350ce"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Event Control <br /></td></tr>
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<tr class="separator:a291dc420fe89a8f64b5f7595fff350ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4a8085ad41af940842d4e6fa315e64b8"><td class="memItemLeft" align="right" valign="top"><a id="a4a8085ad41af940842d4e6fa315e64b8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a4a8085ad41af940842d4e6fa315e64b8">REG_TCC0_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016024UL)</td></tr>
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<tr class="memdesc:a4a8085ad41af940842d4e6fa315e64b8"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a4a8085ad41af940842d4e6fa315e64b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a16fcec76af657a3e9bebb6fe67fc691d"><td class="memItemLeft" align="right" valign="top"><a id="a16fcec76af657a3e9bebb6fe67fc691d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a16fcec76af657a3e9bebb6fe67fc691d">REG_TCC0_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016028UL)</td></tr>
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<tr class="memdesc:a16fcec76af657a3e9bebb6fe67fc691d"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a16fcec76af657a3e9bebb6fe67fc691d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad7cfbcbbf271b717b5aad74559a82591"><td class="memItemLeft" align="right" valign="top"><a id="ad7cfbcbbf271b717b5aad74559a82591"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#ad7cfbcbbf271b717b5aad74559a82591">REG_TCC0_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101602CUL)</td></tr>
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||
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<tr class="memdesc:ad7cfbcbbf271b717b5aad74559a82591"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:ad7cfbcbbf271b717b5aad74559a82591"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed82ff5ae8800131c9024713723432ea"><td class="memItemLeft" align="right" valign="top"><a id="aed82ff5ae8800131c9024713723432ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#aed82ff5ae8800131c9024713723432ea">REG_TCC0_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016030UL)</td></tr>
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<tr class="memdesc:aed82ff5ae8800131c9024713723432ea"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Status <br /></td></tr>
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<tr class="separator:aed82ff5ae8800131c9024713723432ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad4ec4b4914420f77e12894d137675e56"><td class="memItemLeft" align="right" valign="top"><a id="ad4ec4b4914420f77e12894d137675e56"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#ad4ec4b4914420f77e12894d137675e56">REG_TCC0_COUNT</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016034UL)</td></tr>
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<tr class="memdesc:ad4ec4b4914420f77e12894d137675e56"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Count <br /></td></tr>
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<tr class="separator:ad4ec4b4914420f77e12894d137675e56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5d6e3f0ebf014ee8f418c4ecb2db0411"><td class="memItemLeft" align="right" valign="top"><a id="a5d6e3f0ebf014ee8f418c4ecb2db0411"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a5d6e3f0ebf014ee8f418c4ecb2db0411">REG_TCC0_PATT</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x41016038UL)</td></tr>
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<tr class="memdesc:a5d6e3f0ebf014ee8f418c4ecb2db0411"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Pattern <br /></td></tr>
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<tr class="separator:a5d6e3f0ebf014ee8f418c4ecb2db0411"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:a75eec947876d33c20b90d58491ddbd1d"><td class="memItemLeft" align="right" valign="top"><a id="a75eec947876d33c20b90d58491ddbd1d"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a75eec947876d33c20b90d58491ddbd1d">REG_TCC0_WAVE</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101603CUL)</td></tr>
|
||
|
|
<tr class="memdesc:a75eec947876d33c20b90d58491ddbd1d"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Waveform Control <br /></td></tr>
|
||
|
|
<tr class="separator:a75eec947876d33c20b90d58491ddbd1d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a13d1251e032783cf584cc130fa076293"><td class="memItemLeft" align="right" valign="top"><a id="a13d1251e032783cf584cc130fa076293"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a13d1251e032783cf584cc130fa076293">REG_TCC0_PER</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016040UL)</td></tr>
|
||
|
|
<tr class="memdesc:a13d1251e032783cf584cc130fa076293"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Period <br /></td></tr>
|
||
|
|
<tr class="separator:a13d1251e032783cf584cc130fa076293"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a7c2ef52bf209e4b62b948805d8697625"><td class="memItemLeft" align="right" valign="top"><a id="a7c2ef52bf209e4b62b948805d8697625"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a7c2ef52bf209e4b62b948805d8697625">REG_TCC0_CC0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016044UL)</td></tr>
|
||
|
|
<tr class="memdesc:a7c2ef52bf209e4b62b948805d8697625"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture 0 <br /></td></tr>
|
||
|
|
<tr class="separator:a7c2ef52bf209e4b62b948805d8697625"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a93e21d3c17fde3639b32a4d0afe7533e"><td class="memItemLeft" align="right" valign="top"><a id="a93e21d3c17fde3639b32a4d0afe7533e"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a93e21d3c17fde3639b32a4d0afe7533e">REG_TCC0_CC1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016048UL)</td></tr>
|
||
|
|
<tr class="memdesc:a93e21d3c17fde3639b32a4d0afe7533e"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture 1 <br /></td></tr>
|
||
|
|
<tr class="separator:a93e21d3c17fde3639b32a4d0afe7533e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:ae6b036c8155abdc365a3a38acb546578"><td class="memItemLeft" align="right" valign="top"><a id="ae6b036c8155abdc365a3a38acb546578"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#ae6b036c8155abdc365a3a38acb546578">REG_TCC0_CC2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101604CUL)</td></tr>
|
||
|
|
<tr class="memdesc:ae6b036c8155abdc365a3a38acb546578"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture 2 <br /></td></tr>
|
||
|
|
<tr class="separator:ae6b036c8155abdc365a3a38acb546578"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:abde7ae0589f3b0235df287b0909c49c2"><td class="memItemLeft" align="right" valign="top"><a id="abde7ae0589f3b0235df287b0909c49c2"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#abde7ae0589f3b0235df287b0909c49c2">REG_TCC0_CC3</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016050UL)</td></tr>
|
||
|
|
<tr class="memdesc:abde7ae0589f3b0235df287b0909c49c2"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture 3 <br /></td></tr>
|
||
|
|
<tr class="separator:abde7ae0589f3b0235df287b0909c49c2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:ae76bb63302e1c7839f49949104f49903"><td class="memItemLeft" align="right" valign="top"><a id="ae76bb63302e1c7839f49949104f49903"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#ae76bb63302e1c7839f49949104f49903">REG_TCC0_CC4</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016054UL)</td></tr>
|
||
|
|
<tr class="memdesc:ae76bb63302e1c7839f49949104f49903"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture 4 <br /></td></tr>
|
||
|
|
<tr class="separator:ae76bb63302e1c7839f49949104f49903"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a6224fc2b6d08d337e0ced80a9a50f5fc"><td class="memItemLeft" align="right" valign="top"><a id="a6224fc2b6d08d337e0ced80a9a50f5fc"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a6224fc2b6d08d337e0ced80a9a50f5fc">REG_TCC0_CC5</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016058UL)</td></tr>
|
||
|
|
<tr class="memdesc:a6224fc2b6d08d337e0ced80a9a50f5fc"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture 5 <br /></td></tr>
|
||
|
|
<tr class="separator:a6224fc2b6d08d337e0ced80a9a50f5fc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a32d55e4742123cf33bf5884f83879327"><td class="memItemLeft" align="right" valign="top"><a id="a32d55e4742123cf33bf5884f83879327"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a32d55e4742123cf33bf5884f83879327">REG_TCC0_PATTBUF</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x41016064UL)</td></tr>
|
||
|
|
<tr class="memdesc:a32d55e4742123cf33bf5884f83879327"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Pattern Buffer <br /></td></tr>
|
||
|
|
<tr class="separator:a32d55e4742123cf33bf5884f83879327"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a6b20471c3267dcd031402672c81f8561"><td class="memItemLeft" align="right" valign="top"><a id="a6b20471c3267dcd031402672c81f8561"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a6b20471c3267dcd031402672c81f8561">REG_TCC0_PERBUF</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101606CUL)</td></tr>
|
||
|
|
<tr class="memdesc:a6b20471c3267dcd031402672c81f8561"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Period Buffer <br /></td></tr>
|
||
|
|
<tr class="separator:a6b20471c3267dcd031402672c81f8561"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a6865ea9f3c0e33000830919d2a1de6ea"><td class="memItemLeft" align="right" valign="top"><a id="a6865ea9f3c0e33000830919d2a1de6ea"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a6865ea9f3c0e33000830919d2a1de6ea">REG_TCC0_CCBUF0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016070UL)</td></tr>
|
||
|
|
<tr class="memdesc:a6865ea9f3c0e33000830919d2a1de6ea"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture Buffer 0 <br /></td></tr>
|
||
|
|
<tr class="separator:a6865ea9f3c0e33000830919d2a1de6ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a7587dcb903166da29fcba9c7102252ce"><td class="memItemLeft" align="right" valign="top"><a id="a7587dcb903166da29fcba9c7102252ce"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a7587dcb903166da29fcba9c7102252ce">REG_TCC0_CCBUF1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016074UL)</td></tr>
|
||
|
|
<tr class="memdesc:a7587dcb903166da29fcba9c7102252ce"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture Buffer 1 <br /></td></tr>
|
||
|
|
<tr class="separator:a7587dcb903166da29fcba9c7102252ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:aa6c9470a8d907f45fbc5bbf3f20116b7"><td class="memItemLeft" align="right" valign="top"><a id="aa6c9470a8d907f45fbc5bbf3f20116b7"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#aa6c9470a8d907f45fbc5bbf3f20116b7">REG_TCC0_CCBUF2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016078UL)</td></tr>
|
||
|
|
<tr class="memdesc:aa6c9470a8d907f45fbc5bbf3f20116b7"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture Buffer 2 <br /></td></tr>
|
||
|
|
<tr class="separator:aa6c9470a8d907f45fbc5bbf3f20116b7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a0662625f279bdcbd05796b8b4bc39406"><td class="memItemLeft" align="right" valign="top"><a id="a0662625f279bdcbd05796b8b4bc39406"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#a0662625f279bdcbd05796b8b4bc39406">REG_TCC0_CCBUF3</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101607CUL)</td></tr>
|
||
|
|
<tr class="memdesc:a0662625f279bdcbd05796b8b4bc39406"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture Buffer 3 <br /></td></tr>
|
||
|
|
<tr class="separator:a0662625f279bdcbd05796b8b4bc39406"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:aa98a9dc105ee92a7d5a6cdd94c92991b"><td class="memItemLeft" align="right" valign="top"><a id="aa98a9dc105ee92a7d5a6cdd94c92991b"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#aa98a9dc105ee92a7d5a6cdd94c92991b">REG_TCC0_CCBUF4</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016080UL)</td></tr>
|
||
|
|
<tr class="memdesc:aa98a9dc105ee92a7d5a6cdd94c92991b"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture Buffer 4 <br /></td></tr>
|
||
|
|
<tr class="separator:aa98a9dc105ee92a7d5a6cdd94c92991b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:acacaefe8c7e65e2c112b4d6c5ba7a9a9"><td class="memItemLeft" align="right" valign="top"><a id="acacaefe8c7e65e2c112b4d6c5ba7a9a9"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc0_8h.html#acacaefe8c7e65e2c112b4d6c5ba7a9a9">REG_TCC0_CCBUF5</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41016084UL)</td></tr>
|
||
|
|
<tr class="memdesc:acacaefe8c7e65e2c112b4d6c5ba7a9a9"><td class="mdescLeft"> </td><td class="mdescRight">(TCC0) Compare and Capture Buffer 5 <br /></td></tr>
|
||
|
|
<tr class="separator:acacaefe8c7e65e2c112b4d6c5ba7a9a9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a7d48144902b5aa4e94212381edf39c98"><td class="memItemLeft" align="right" valign="top"><a id="a7d48144902b5aa4e94212381edf39c98"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_CC_NUM</b>   6</td></tr>
|
||
|
|
<tr class="separator:a7d48144902b5aa4e94212381edf39c98"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:aa176aaf23c7b71afee7f9d5a5b0ff740"><td class="memItemLeft" align="right" valign="top"><a id="aa176aaf23c7b71afee7f9d5a5b0ff740"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DITHERING</b>   1</td></tr>
|
||
|
|
<tr class="separator:aa176aaf23c7b71afee7f9d5a5b0ff740"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a7ae310103281fb34f460ac45aaf2efbc"><td class="memItemLeft" align="right" valign="top"><a id="a7ae310103281fb34f460ac45aaf2efbc"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_0</b>   23</td></tr>
|
||
|
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<tr class="separator:a7ae310103281fb34f460ac45aaf2efbc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:aa80a6af1053a0cd6e509ed66f975d139"><td class="memItemLeft" align="right" valign="top"><a id="aa80a6af1053a0cd6e509ed66f975d139"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_1</b>   24</td></tr>
|
||
|
|
<tr class="separator:aa80a6af1053a0cd6e509ed66f975d139"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:aa79268c6eb50004098bfcbef133dfb90"><td class="memItemLeft" align="right" valign="top"><a id="aa79268c6eb50004098bfcbef133dfb90"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_2</b>   25</td></tr>
|
||
|
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<tr class="separator:aa79268c6eb50004098bfcbef133dfb90"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:ac4fad42f6874e343274d908b163147f0"><td class="memItemLeft" align="right" valign="top"><a id="ac4fad42f6874e343274d908b163147f0"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_3</b>   26</td></tr>
|
||
|
|
<tr class="separator:ac4fad42f6874e343274d908b163147f0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:ab07d34eab26f65b8eb6ce0f613e7c1a7"><td class="memItemLeft" align="right" valign="top"><a id="ab07d34eab26f65b8eb6ce0f613e7c1a7"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_4</b>   27</td></tr>
|
||
|
|
<tr class="separator:ab07d34eab26f65b8eb6ce0f613e7c1a7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a7ce7b5ee3cc445fe3c7539c5e66d4be6"><td class="memItemLeft" align="right" valign="top"><a id="a7ce7b5ee3cc445fe3c7539c5e66d4be6"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_5</b>   28</td></tr>
|
||
|
|
<tr class="separator:a7ce7b5ee3cc445fe3c7539c5e66d4be6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a432221b9f07865d32e861adbdd2fb617"><td class="memItemLeft" align="right" valign="top"><a id="a432221b9f07865d32e861adbdd2fb617"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_LSB</b>   23</td></tr>
|
||
|
|
<tr class="separator:a432221b9f07865d32e861adbdd2fb617"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a563a730cdb0cc95ec34b1de37bd3b1af"><td class="memItemLeft" align="right" valign="top"><a id="a563a730cdb0cc95ec34b1de37bd3b1af"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_MSB</b>   28</td></tr>
|
||
|
|
<tr class="separator:a563a730cdb0cc95ec34b1de37bd3b1af"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a1441a03706c8fcef5ea2b7d3f3f83555"><td class="memItemLeft" align="right" valign="top"><a id="a1441a03706c8fcef5ea2b7d3f3f83555"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_MC_SIZE</b>   6</td></tr>
|
||
|
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<tr class="separator:a1441a03706c8fcef5ea2b7d3f3f83555"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
|
<tr class="memitem:a029b26c8ad4add21b1d36aa29292da6c"><td class="memItemLeft" align="right" valign="top"><a id="a029b26c8ad4add21b1d36aa29292da6c"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DMAC_ID_OVF</b>   22</td></tr>
|
||
|
|
<tr class="separator:a029b26c8ad4add21b1d36aa29292da6c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:aebf71bfd9b22108fc988883b5aa98ff7"><td class="memItemLeft" align="right" valign="top"><a id="aebf71bfd9b22108fc988883b5aa98ff7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_DTI</b>   1</td></tr>
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<tr class="separator:aebf71bfd9b22108fc988883b5aa98ff7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a479b65a32832469d699fc4262250b6af"><td class="memItemLeft" align="right" valign="top"><a id="a479b65a32832469d699fc4262250b6af"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_EXT</b>   31</td></tr>
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<tr class="separator:a479b65a32832469d699fc4262250b6af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a83a8865de75fe2f5604a1033c61eb828"><td class="memItemLeft" align="right" valign="top"><a id="a83a8865de75fe2f5604a1033c61eb828"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_GCLK_ID</b>   25</td></tr>
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<tr class="separator:a83a8865de75fe2f5604a1033c61eb828"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9b09829e4073058d5eb49053378b37a4"><td class="memItemLeft" align="right" valign="top"><a id="a9b09829e4073058d5eb49053378b37a4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_MASTER_SLAVE_MODE</b>   1</td></tr>
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<tr class="separator:a9b09829e4073058d5eb49053378b37a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0c5e573aefea4195dff987da80466ec3"><td class="memItemLeft" align="right" valign="top"><a id="a0c5e573aefea4195dff987da80466ec3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_OTMX</b>   1</td></tr>
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<tr class="separator:a0c5e573aefea4195dff987da80466ec3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a16b6eb2330aa661c595c27c82b905430"><td class="memItemLeft" align="right" valign="top"><a id="a16b6eb2330aa661c595c27c82b905430"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_OW_NUM</b>   8</td></tr>
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<tr class="separator:a16b6eb2330aa661c595c27c82b905430"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8830c3eba6282f3b56f8ec5363026a1f"><td class="memItemLeft" align="right" valign="top"><a id="a8830c3eba6282f3b56f8ec5363026a1f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_PG</b>   1</td></tr>
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<tr class="separator:a8830c3eba6282f3b56f8ec5363026a1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4cce0763373cf84011f2dbd02cfcc334"><td class="memItemLeft" align="right" valign="top"><a id="a4cce0763373cf84011f2dbd02cfcc334"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_SIZE</b>   24</td></tr>
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<tr class="separator:a4cce0763373cf84011f2dbd02cfcc334"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b833710478595066002cae44e75d72c"><td class="memItemLeft" align="right" valign="top"><a id="a3b833710478595066002cae44e75d72c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC0_SWAP</b>   1</td></tr>
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<tr class="separator:a3b833710478595066002cae44e75d72c"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Instance description for TCC0. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="tcc0_8h_source.html">tcc0.h</a>.</p>
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</div></div><!-- contents -->
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<!-- start footer part -->
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<hr class="footer"/><address class="footer"><small>
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Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
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</small></address>
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</body>
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</html>
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