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246 lines
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246 lines
27 KiB
HTML
4 years ago
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/tcc2.h File Reference</title>
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<div id="projectname">SAME54P20A Test Project
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">tcc2.h File Reference</div> </div>
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<div class="contents">
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<p>Instance description for TCC2.
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<a href="#details">More...</a></p>
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<p><a href="tcc2_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ae9e265f8eab902b132b7207477c11186"><td class="memItemLeft" align="right" valign="top"><a id="ae9e265f8eab902b132b7207477c11186"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#ae9e265f8eab902b132b7207477c11186">REG_TCC2_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C00UL)</td></tr>
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<tr class="memdesc:ae9e265f8eab902b132b7207477c11186"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Control A <br /></td></tr>
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<tr class="separator:ae9e265f8eab902b132b7207477c11186"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a075cb438518cad995f7a3dd37c448380"><td class="memItemLeft" align="right" valign="top"><a id="a075cb438518cad995f7a3dd37c448380"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a075cb438518cad995f7a3dd37c448380">REG_TCC2_CTRLBCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x42000C04UL)</td></tr>
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<tr class="memdesc:a075cb438518cad995f7a3dd37c448380"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Control B Clear <br /></td></tr>
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<tr class="separator:a075cb438518cad995f7a3dd37c448380"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa15939ad1687ab0adc3d83bc0421f506"><td class="memItemLeft" align="right" valign="top"><a id="aa15939ad1687ab0adc3d83bc0421f506"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#aa15939ad1687ab0adc3d83bc0421f506">REG_TCC2_CTRLBSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x42000C05UL)</td></tr>
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<tr class="memdesc:aa15939ad1687ab0adc3d83bc0421f506"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Control B Set <br /></td></tr>
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<tr class="separator:aa15939ad1687ab0adc3d83bc0421f506"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4294afbc8227d1e091ef5e5a6443efbc"><td class="memItemLeft" align="right" valign="top"><a id="a4294afbc8227d1e091ef5e5a6443efbc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a4294afbc8227d1e091ef5e5a6443efbc">REG_TCC2_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000C08UL)</td></tr>
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<tr class="memdesc:a4294afbc8227d1e091ef5e5a6443efbc"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Synchronization Busy <br /></td></tr>
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<tr class="separator:a4294afbc8227d1e091ef5e5a6443efbc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6f52c4617f6f91738c05b8d2d2beee31"><td class="memItemLeft" align="right" valign="top"><a id="a6f52c4617f6f91738c05b8d2d2beee31"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a6f52c4617f6f91738c05b8d2d2beee31">REG_TCC2_FCTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C0CUL)</td></tr>
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<tr class="memdesc:a6f52c4617f6f91738c05b8d2d2beee31"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Recoverable Fault A Configuration <br /></td></tr>
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<tr class="separator:a6f52c4617f6f91738c05b8d2d2beee31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9c29c4da47c83ae031454c7c537e1ce3"><td class="memItemLeft" align="right" valign="top"><a id="a9c29c4da47c83ae031454c7c537e1ce3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a9c29c4da47c83ae031454c7c537e1ce3">REG_TCC2_FCTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C10UL)</td></tr>
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<tr class="memdesc:a9c29c4da47c83ae031454c7c537e1ce3"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Recoverable Fault B Configuration <br /></td></tr>
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<tr class="separator:a9c29c4da47c83ae031454c7c537e1ce3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aee89f60d78a3bf8f64dc6f0a0f15fdc3"><td class="memItemLeft" align="right" valign="top"><a id="aee89f60d78a3bf8f64dc6f0a0f15fdc3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#aee89f60d78a3bf8f64dc6f0a0f15fdc3">REG_TCC2_WEXCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C14UL)</td></tr>
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<tr class="memdesc:aee89f60d78a3bf8f64dc6f0a0f15fdc3"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Waveform Extension Configuration <br /></td></tr>
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<tr class="separator:aee89f60d78a3bf8f64dc6f0a0f15fdc3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad9337b877daf46a084d33f5f21b3221b"><td class="memItemLeft" align="right" valign="top"><a id="ad9337b877daf46a084d33f5f21b3221b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#ad9337b877daf46a084d33f5f21b3221b">REG_TCC2_DRVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C18UL)</td></tr>
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<tr class="memdesc:ad9337b877daf46a084d33f5f21b3221b"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Driver Control <br /></td></tr>
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<tr class="separator:ad9337b877daf46a084d33f5f21b3221b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa7d0cdfab16794c96ca3cce2df2c0092"><td class="memItemLeft" align="right" valign="top"><a id="aa7d0cdfab16794c96ca3cce2df2c0092"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#aa7d0cdfab16794c96ca3cce2df2c0092">REG_TCC2_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x42000C1EUL)</td></tr>
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<tr class="memdesc:aa7d0cdfab16794c96ca3cce2df2c0092"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Debug Control <br /></td></tr>
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<tr class="separator:aa7d0cdfab16794c96ca3cce2df2c0092"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa38e633ea3d0c8c576256fa9e39e953b"><td class="memItemLeft" align="right" valign="top"><a id="aa38e633ea3d0c8c576256fa9e39e953b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#aa38e633ea3d0c8c576256fa9e39e953b">REG_TCC2_EVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C20UL)</td></tr>
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<tr class="memdesc:aa38e633ea3d0c8c576256fa9e39e953b"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Event Control <br /></td></tr>
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<tr class="separator:aa38e633ea3d0c8c576256fa9e39e953b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb953dfa443311185ac2e9d13433504c"><td class="memItemLeft" align="right" valign="top"><a id="abb953dfa443311185ac2e9d13433504c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#abb953dfa443311185ac2e9d13433504c">REG_TCC2_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C24UL)</td></tr>
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<tr class="memdesc:abb953dfa443311185ac2e9d13433504c"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:abb953dfa443311185ac2e9d13433504c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0e9765b809332e5e12cf6f627fade991"><td class="memItemLeft" align="right" valign="top"><a id="a0e9765b809332e5e12cf6f627fade991"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a0e9765b809332e5e12cf6f627fade991">REG_TCC2_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C28UL)</td></tr>
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<tr class="memdesc:a0e9765b809332e5e12cf6f627fade991"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a0e9765b809332e5e12cf6f627fade991"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aadc2b213b137de696fc3e4634d6b0b9c"><td class="memItemLeft" align="right" valign="top"><a id="aadc2b213b137de696fc3e4634d6b0b9c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#aadc2b213b137de696fc3e4634d6b0b9c">REG_TCC2_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C2CUL)</td></tr>
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<tr class="memdesc:aadc2b213b137de696fc3e4634d6b0b9c"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:aadc2b213b137de696fc3e4634d6b0b9c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa695c68491b44f7c48c410d58753a592"><td class="memItemLeft" align="right" valign="top"><a id="aa695c68491b44f7c48c410d58753a592"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#aa695c68491b44f7c48c410d58753a592">REG_TCC2_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C30UL)</td></tr>
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<tr class="memdesc:aa695c68491b44f7c48c410d58753a592"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Status <br /></td></tr>
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<tr class="separator:aa695c68491b44f7c48c410d58753a592"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae37cb55b57014f401eb313802928f290"><td class="memItemLeft" align="right" valign="top"><a id="ae37cb55b57014f401eb313802928f290"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#ae37cb55b57014f401eb313802928f290">REG_TCC2_COUNT</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C34UL)</td></tr>
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<tr class="memdesc:ae37cb55b57014f401eb313802928f290"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Count <br /></td></tr>
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<tr class="separator:ae37cb55b57014f401eb313802928f290"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a55f6ac089fdec116b0d252605505177c"><td class="memItemLeft" align="right" valign="top"><a id="a55f6ac089fdec116b0d252605505177c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a55f6ac089fdec116b0d252605505177c">REG_TCC2_WAVE</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C3CUL)</td></tr>
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<tr class="memdesc:a55f6ac089fdec116b0d252605505177c"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Waveform Control <br /></td></tr>
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<tr class="separator:a55f6ac089fdec116b0d252605505177c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9a2062df26765f326ebf4986b5fbf1d4"><td class="memItemLeft" align="right" valign="top"><a id="a9a2062df26765f326ebf4986b5fbf1d4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a9a2062df26765f326ebf4986b5fbf1d4">REG_TCC2_PER</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C40UL)</td></tr>
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<tr class="memdesc:a9a2062df26765f326ebf4986b5fbf1d4"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Period <br /></td></tr>
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<tr class="separator:a9a2062df26765f326ebf4986b5fbf1d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a56cb68200f9ab70d563be4034c082a0c"><td class="memItemLeft" align="right" valign="top"><a id="a56cb68200f9ab70d563be4034c082a0c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a56cb68200f9ab70d563be4034c082a0c">REG_TCC2_CC0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C44UL)</td></tr>
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||
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<tr class="memdesc:a56cb68200f9ab70d563be4034c082a0c"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Compare and Capture 0 <br /></td></tr>
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<tr class="separator:a56cb68200f9ab70d563be4034c082a0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1cdbad1339a6d67872c1d7f3a438aa9d"><td class="memItemLeft" align="right" valign="top"><a id="a1cdbad1339a6d67872c1d7f3a438aa9d"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a1cdbad1339a6d67872c1d7f3a438aa9d">REG_TCC2_CC1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C48UL)</td></tr>
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||
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<tr class="memdesc:a1cdbad1339a6d67872c1d7f3a438aa9d"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Compare and Capture 1 <br /></td></tr>
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<tr class="separator:a1cdbad1339a6d67872c1d7f3a438aa9d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69e0cc1294cfbfba88d1a6c25f4bad6f"><td class="memItemLeft" align="right" valign="top"><a id="a69e0cc1294cfbfba88d1a6c25f4bad6f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a69e0cc1294cfbfba88d1a6c25f4bad6f">REG_TCC2_CC2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C4CUL)</td></tr>
|
||
|
<tr class="memdesc:a69e0cc1294cfbfba88d1a6c25f4bad6f"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Compare and Capture 2 <br /></td></tr>
|
||
|
<tr class="separator:a69e0cc1294cfbfba88d1a6c25f4bad6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a81ff00582dbc8c4c837208faf3c6b417"><td class="memItemLeft" align="right" valign="top"><a id="a81ff00582dbc8c4c837208faf3c6b417"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a81ff00582dbc8c4c837208faf3c6b417">REG_TCC2_PERBUF</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C6CUL)</td></tr>
|
||
|
<tr class="memdesc:a81ff00582dbc8c4c837208faf3c6b417"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Period Buffer <br /></td></tr>
|
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<tr class="separator:a81ff00582dbc8c4c837208faf3c6b417"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afdc508d0cefb89e5c277406f74aa39ac"><td class="memItemLeft" align="right" valign="top"><a id="afdc508d0cefb89e5c277406f74aa39ac"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#afdc508d0cefb89e5c277406f74aa39ac">REG_TCC2_CCBUF0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C70UL)</td></tr>
|
||
|
<tr class="memdesc:afdc508d0cefb89e5c277406f74aa39ac"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Compare and Capture Buffer 0 <br /></td></tr>
|
||
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<tr class="separator:afdc508d0cefb89e5c277406f74aa39ac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
<tr class="memitem:ab9eb11f61475566635701139d7c068bb"><td class="memItemLeft" align="right" valign="top"><a id="ab9eb11f61475566635701139d7c068bb"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#ab9eb11f61475566635701139d7c068bb">REG_TCC2_CCBUF1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C74UL)</td></tr>
|
||
|
<tr class="memdesc:ab9eb11f61475566635701139d7c068bb"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Compare and Capture Buffer 1 <br /></td></tr>
|
||
|
<tr class="separator:ab9eb11f61475566635701139d7c068bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
<tr class="memitem:a780b15b5671ce5903ca103eaa61d8497"><td class="memItemLeft" align="right" valign="top"><a id="a780b15b5671ce5903ca103eaa61d8497"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc2_8h.html#a780b15b5671ce5903ca103eaa61d8497">REG_TCC2_CCBUF2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000C78UL)</td></tr>
|
||
|
<tr class="memdesc:a780b15b5671ce5903ca103eaa61d8497"><td class="mdescLeft"> </td><td class="mdescRight">(TCC2) Compare and Capture Buffer 2 <br /></td></tr>
|
||
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<tr class="separator:a780b15b5671ce5903ca103eaa61d8497"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:adaecf6a447e83a1ac2a55d1ca379eaae"><td class="memItemLeft" align="right" valign="top"><a id="adaecf6a447e83a1ac2a55d1ca379eaae"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_CC_NUM</b>   3</td></tr>
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||
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<tr class="separator:adaecf6a447e83a1ac2a55d1ca379eaae"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
<tr class="memitem:a7c58d7fabc284245c9a683b552dfdd49"><td class="memItemLeft" align="right" valign="top"><a id="a7c58d7fabc284245c9a683b552dfdd49"></a>
|
||
|
#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DITHERING</b>   0</td></tr>
|
||
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<tr class="separator:a7c58d7fabc284245c9a683b552dfdd49"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
<tr class="memitem:adb171edbaf6aacb632dbe9050ec86b03"><td class="memItemLeft" align="right" valign="top"><a id="adb171edbaf6aacb632dbe9050ec86b03"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_MC_0</b>   35</td></tr>
|
||
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<tr class="separator:adb171edbaf6aacb632dbe9050ec86b03"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a859b883362a1b224b8bba2897af2ad87"><td class="memItemLeft" align="right" valign="top"><a id="a859b883362a1b224b8bba2897af2ad87"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_MC_1</b>   36</td></tr>
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||
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<tr class="separator:a859b883362a1b224b8bba2897af2ad87"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a4635586a32957368a647f2816b97aba6"><td class="memItemLeft" align="right" valign="top"><a id="a4635586a32957368a647f2816b97aba6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_MC_2</b>   37</td></tr>
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<tr class="separator:a4635586a32957368a647f2816b97aba6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a91068dc25132c0960bff5cc99c84ff3e"><td class="memItemLeft" align="right" valign="top"><a id="a91068dc25132c0960bff5cc99c84ff3e"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_MC_LSB</b>   35</td></tr>
|
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<tr class="separator:a91068dc25132c0960bff5cc99c84ff3e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ac712fbaac554986273fbb11ec0fa3e44"><td class="memItemLeft" align="right" valign="top"><a id="ac712fbaac554986273fbb11ec0fa3e44"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_MC_MSB</b>   37</td></tr>
|
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<tr class="separator:ac712fbaac554986273fbb11ec0fa3e44"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a3ebf98a049837942acd8967f40d6e46c"><td class="memItemLeft" align="right" valign="top"><a id="a3ebf98a049837942acd8967f40d6e46c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_MC_SIZE</b>   3</td></tr>
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<tr class="separator:a3ebf98a049837942acd8967f40d6e46c"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a4a402579f864934560e5076d58f99427"><td class="memItemLeft" align="right" valign="top"><a id="a4a402579f864934560e5076d58f99427"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DMAC_ID_OVF</b>   34</td></tr>
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<tr class="separator:a4a402579f864934560e5076d58f99427"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a606815be8687a0a58900522d90ed1dc1"><td class="memItemLeft" align="right" valign="top"><a id="a606815be8687a0a58900522d90ed1dc1"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_DTI</b>   0</td></tr>
|
||
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<tr class="separator:a606815be8687a0a58900522d90ed1dc1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:aeeaf95dc40dbf14c534d74335a9a91f6"><td class="memItemLeft" align="right" valign="top"><a id="aeeaf95dc40dbf14c534d74335a9a91f6"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_EXT</b>   1</td></tr>
|
||
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<tr class="separator:aeeaf95dc40dbf14c534d74335a9a91f6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:aaff56702369cf35f36444a76942fe08e"><td class="memItemLeft" align="right" valign="top"><a id="aaff56702369cf35f36444a76942fe08e"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_GCLK_ID</b>   29</td></tr>
|
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<tr class="separator:aaff56702369cf35f36444a76942fe08e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:aba7331e28167c79d8fadfcb660e0f070"><td class="memItemLeft" align="right" valign="top"><a id="aba7331e28167c79d8fadfcb660e0f070"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_MASTER_SLAVE_MODE</b>   0</td></tr>
|
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<tr class="separator:aba7331e28167c79d8fadfcb660e0f070"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:af00ba555cb690667e907fe192d71637f"><td class="memItemLeft" align="right" valign="top"><a id="af00ba555cb690667e907fe192d71637f"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_OTMX</b>   1</td></tr>
|
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<tr class="separator:af00ba555cb690667e907fe192d71637f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a980c62efac8b285b4eb0e823c0d6f58f"><td class="memItemLeft" align="right" valign="top"><a id="a980c62efac8b285b4eb0e823c0d6f58f"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_OW_NUM</b>   3</td></tr>
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||
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<tr class="separator:a980c62efac8b285b4eb0e823c0d6f58f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a1ec9df304f617a2126bbbaa366a837ea"><td class="memItemLeft" align="right" valign="top"><a id="a1ec9df304f617a2126bbbaa366a837ea"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_PG</b>   0</td></tr>
|
||
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<tr class="separator:a1ec9df304f617a2126bbbaa366a837ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a7c0e6e31eb8a72543eda0f967ffe64a9"><td class="memItemLeft" align="right" valign="top"><a id="a7c0e6e31eb8a72543eda0f967ffe64a9"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_SIZE</b>   16</td></tr>
|
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<tr class="separator:a7c0e6e31eb8a72543eda0f967ffe64a9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ae6317f07d8e1bd65b346c3dfd3984ef3"><td class="memItemLeft" align="right" valign="top"><a id="ae6317f07d8e1bd65b346c3dfd3984ef3"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TCC2_SWAP</b>   0</td></tr>
|
||
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<tr class="separator:ae6317f07d8e1bd65b346c3dfd3984ef3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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</table>
|
||
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||
|
<div class="textblock"><p>Instance description for TCC2. </p>
|
||
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
|
||
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<p>\asf_license_start </p>
|
||
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|
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<p class="definition">Definition in file <a class="el" href="tcc2_8h_source.html">tcc2.h</a>.</p>
|
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</div></div><!-- contents -->
|
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<!-- start footer part -->
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<hr class="footer"/><address class="footer"><small>
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Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
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</small></address>
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</body>
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</html>
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