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108 lines
4.7 KiB
HTML
108 lines
4.7 KiB
HTML
4 years ago
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<title>Attr Example - GNU Compiler Collection (GCC) Internals</title>
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<meta name="description" content="GNU Compiler Collection (GCC) Internals">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Insn-Attributes.html#Insn-Attributes" title="Insn Attributes">
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<link rel="prev" href="Tagging-Insns.html#Tagging-Insns" title="Tagging Insns">
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<link rel="next" href="Insn-Lengths.html#Insn-Lengths" title="Insn Lengths">
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<!--
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Copyright (C) 1988-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3 or
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any later version published by the Free Software Foundation; with the
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Invariant Sections being ``Funding Free Software'', the Front-Cover
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(see below). A copy of the license is included in the section entitled
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``GNU Free Documentation License''.
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(a) The FSF's Front-Cover Text is:
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A GNU Manual
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(b) The FSF's Back-Cover Text is:
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You have freedom to copy and modify this GNU Manual, like GNU
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</head>
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<body>
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<div class="node">
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<a name="Attr-Example"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="Insn-Lengths.html#Insn-Lengths">Insn Lengths</a>,
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Previous: <a rel="previous" accesskey="p" href="Tagging-Insns.html#Tagging-Insns">Tagging Insns</a>,
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Up: <a rel="up" accesskey="u" href="Insn-Attributes.html#Insn-Attributes">Insn Attributes</a>
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<hr>
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</div>
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<h4 class="subsection">16.19.4 Example of Attribute Specifications</h4>
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<p><a name="index-attribute-specifications-example-3766"></a><a name="index-attribute-specifications-3767"></a>
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The judicious use of defaulting is important in the efficient use of
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insn attributes. Typically, insns are divided into <dfn>types</dfn> and an
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attribute, customarily called <code>type</code>, is used to represent this
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value. This attribute is normally used only to define the default value
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for other attributes. An example will clarify this usage.
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<p>Assume we have a RISC machine with a condition code and in which only
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full-word operations are performed in registers. Let us assume that we
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can divide all insns into loads, stores, (integer) arithmetic
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operations, floating point operations, and branches.
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<p>Here we will concern ourselves with determining the effect of an insn on
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the condition code and will limit ourselves to the following possible
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effects: The condition code can be set unpredictably (clobbered), not
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be changed, be set to agree with the results of the operation, or only
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changed if the item previously set into the condition code has been
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modified.
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<p>Here is part of a sample <samp><span class="file">md</span></samp> file for such a machine:
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<pre class="smallexample"> (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
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(define_attr "cc" "clobber,unchanged,set,change0"
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(cond [(eq_attr "type" "load")
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(const_string "change0")
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(eq_attr "type" "store,branch")
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(const_string "unchanged")
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(eq_attr "type" "arith")
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(if_then_else (match_operand:SI 0 "" "")
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(const_string "set")
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(const_string "clobber"))]
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(const_string "clobber")))
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=r,r,m")
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(match_operand:SI 1 "general_operand" "r,m,r"))]
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""
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"@
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move %0,%1
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load %0,%1
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store %0,%1"
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[(set_attr "type" "arith,load,store")])
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</pre>
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<p>Note that we assume in the above example that arithmetic operations
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performed on quantities smaller than a machine word clobber the condition
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code since they will set the condition code to a value corresponding to the
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full-word result.
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</body></html>
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