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76 lines
3.5 KiB
HTML
76 lines
3.5 KiB
HTML
4 years ago
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<title>Z8000-Addressing - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Z8000-Syntax.html#Z8000-Syntax" title="Z8000 Syntax">
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<link rel="prev" href="Z8000_002dRegs.html#Z8000_002dRegs" title="Z8000-Regs">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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--></style>
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</head>
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<body>
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<div class="node">
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<a name="Z8000-Addressing"></a>
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<a name="Z8000_002dAddressing"></a>
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<p>
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Previous: <a rel="previous" accesskey="p" href="Z8000_002dRegs.html#Z8000_002dRegs">Z8000-Regs</a>,
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Up: <a rel="up" accesskey="u" href="Z8000-Syntax.html#Z8000-Syntax">Z8000 Syntax</a>
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<hr>
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</div>
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<h5 class="subsubsection">9.54.2.3 Addressing Modes</h5>
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<p><a name="index-addressing-modes_002c-Z8000-2537"></a><a name="index-Z800-addressing-modes-2538"></a>as understands the following addressing modes for the Z8000:
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<dl>
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<dt><code>rl</code><var>n</var><dt><code>rh</code><var>n</var><dt><code>r</code><var>n</var><dt><code>rr</code><var>n</var><dt><code>rq</code><var>n</var><dd>Register direct: 8bit, 16bit, 32bit, and 64bit registers.
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<br><dt><code>@r</code><var>n</var><dt><code>@rr</code><var>n</var><dd>Indirect register: @rr<var>n</var> in segmented mode, @r<var>n</var> in unsegmented
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mode.
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<br><dt><var>addr</var><dd>Direct: the 16 bit or 24 bit address (depending on whether the assembler
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is in segmented or unsegmented mode) of the operand is in the instruction.
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<br><dt><code>address(r</code><var>n</var><code>)</code><dd>Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
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the final address in memory of the operand.
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<br><dt><code>r</code><var>n</var><code>(#</code><var>imm</var><code>)</code><dt><code>rr</code><var>n</var><code>(#</code><var>imm</var><code>)</code><dd>Base Address: the 16 or 24 bit register is added to the 16 bit sign
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extended immediate displacement to produce the final address in memory
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of the operand.
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<br><dt><code>r</code><var>n</var><code>(r</code><var>m</var><code>)</code><dt><code>rr</code><var>n</var><code>(r</code><var>m</var><code>)</code><dd>Base Index: the 16 or 24 bit register r<var>n</var> or rr<var>n</var> is added to
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the sign extended 16 bit index register r<var>m</var> to produce the final
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address in memory of the operand.
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<br><dt><code>#</code><var>xx</var><dd>Immediate data <var>xx</var>.
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</dl>
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</body></html>
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