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386 lines
51 KiB
HTML
386 lines
51 KiB
HTML
4 years ago
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/pcc.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
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<div class="summary">
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<a href="#nested-classes">Data Structures</a> |
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<a href="#define-members">Macros</a> </div>
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<div class="headertitle">
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<div class="title">pcc.h File Reference</div> </div>
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</div><!--header-->
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<div class="contents">
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<p>Component description for PCC.
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<a href="#details">More...</a></p>
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<p><a href="component_2pcc_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__MR__Type.html">PCC_MR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__IER__Type.html">PCC_IER_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__IDR__Type.html">PCC_IDR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__IMR__Type.html">PCC_IMR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__ISR__Type.html">PCC_ISR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__RHR__Type.html">PCC_RHR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__WPMR__Type.html">PCC_WPMR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__WPSR__Type.html">PCC_WPSR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html">Pcc</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">PCC hardware registers. <a href="structPcc.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a4e35cb21ead84aa814bd6dfa9eaf8079"><td class="memItemLeft" align="right" valign="top"><a id="a4e35cb21ead84aa814bd6dfa9eaf8079"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_U2017</b></td></tr>
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<tr class="separator:a4e35cb21ead84aa814bd6dfa9eaf8079"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6003465897a211f506b05560ee55e796"><td class="memItemLeft" align="right" valign="top"><a id="a6003465897a211f506b05560ee55e796"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>REV_PCC</b>   0x110</td></tr>
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<tr class="separator:a6003465897a211f506b05560ee55e796"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abe16c7b5f0364b3c92b50af9ddcdace5"><td class="memItemLeft" align="right" valign="top"><a id="abe16c7b5f0364b3c92b50af9ddcdace5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#abe16c7b5f0364b3c92b50af9ddcdace5">PCC_MR_OFFSET</a>   0x00</td></tr>
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<tr class="memdesc:abe16c7b5f0364b3c92b50af9ddcdace5"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR offset) Mode Register <br /></td></tr>
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<tr class="separator:abe16c7b5f0364b3c92b50af9ddcdace5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad8d7c7ba1405078359dc204d5ab172f7"><td class="memItemLeft" align="right" valign="top"><a id="ad8d7c7ba1405078359dc204d5ab172f7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ad8d7c7ba1405078359dc204d5ab172f7">PCC_MR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ad8d7c7ba1405078359dc204d5ab172f7"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR reset_value) Mode Register <br /></td></tr>
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<tr class="separator:ad8d7c7ba1405078359dc204d5ab172f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa2f688df32f65aee98dd6faa104a00e8"><td class="memItemLeft" align="right" valign="top"><a id="aa2f688df32f65aee98dd6faa104a00e8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aa2f688df32f65aee98dd6faa104a00e8">PCC_MR_PCEN_Pos</a>   0</td></tr>
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<tr class="memdesc:aa2f688df32f65aee98dd6faa104a00e8"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Parallel Capture Enable <br /></td></tr>
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<tr class="separator:aa2f688df32f65aee98dd6faa104a00e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8fe695a65bd1a5ce347525f29f900ad8"><td class="memItemLeft" align="right" valign="top"><a id="a8fe695a65bd1a5ce347525f29f900ad8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_PCEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#aa2f688df32f65aee98dd6faa104a00e8">PCC_MR_PCEN_Pos</a>)</td></tr>
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<tr class="separator:a8fe695a65bd1a5ce347525f29f900ad8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a32db4f441363770b323326ba3447a8e4"><td class="memItemLeft" align="right" valign="top"><a id="a32db4f441363770b323326ba3447a8e4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4">PCC_MR_DSIZE_Pos</a>   4</td></tr>
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<tr class="memdesc:a32db4f441363770b323326ba3447a8e4"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Data size <br /></td></tr>
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<tr class="separator:a32db4f441363770b323326ba3447a8e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a54bdaabba09f689578e4806e08e1b99e"><td class="memItemLeft" align="right" valign="top"><a id="a54bdaabba09f689578e4806e08e1b99e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_DSIZE_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4">PCC_MR_DSIZE_Pos</a>)</td></tr>
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<tr class="separator:a54bdaabba09f689578e4806e08e1b99e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a75c89a3c1245ee1c3015b62755ba0103"><td class="memItemLeft" align="right" valign="top"><a id="a75c89a3c1245ee1c3015b62755ba0103"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_DSIZE</b>(value)   (PCC_MR_DSIZE_Msk & ((value) << <a class="el" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4">PCC_MR_DSIZE_Pos</a>))</td></tr>
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<tr class="separator:a75c89a3c1245ee1c3015b62755ba0103"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a44db3b3e5e54997723ffee9ac5a57c93"><td class="memItemLeft" align="right" valign="top"><a id="a44db3b3e5e54997723ffee9ac5a57c93"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a44db3b3e5e54997723ffee9ac5a57c93">PCC_MR_SCALE_Pos</a>   8</td></tr>
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<tr class="memdesc:a44db3b3e5e54997723ffee9ac5a57c93"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Scale data <br /></td></tr>
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<tr class="separator:a44db3b3e5e54997723ffee9ac5a57c93"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:accd888e142e4ccd5c9db08c8d64460a5"><td class="memItemLeft" align="right" valign="top"><a id="accd888e142e4ccd5c9db08c8d64460a5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_SCALE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#a44db3b3e5e54997723ffee9ac5a57c93">PCC_MR_SCALE_Pos</a>)</td></tr>
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<tr class="separator:accd888e142e4ccd5c9db08c8d64460a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ada2ec39d94e76b1bf98ec0cb906acd17"><td class="memItemLeft" align="right" valign="top"><a id="ada2ec39d94e76b1bf98ec0cb906acd17"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ada2ec39d94e76b1bf98ec0cb906acd17">PCC_MR_ALWYS_Pos</a>   9</td></tr>
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<tr class="memdesc:ada2ec39d94e76b1bf98ec0cb906acd17"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Always Sampling <br /></td></tr>
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<tr class="separator:ada2ec39d94e76b1bf98ec0cb906acd17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afb2247de4b60fc9166f0157ed1623480"><td class="memItemLeft" align="right" valign="top"><a id="afb2247de4b60fc9166f0157ed1623480"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_ALWYS</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#ada2ec39d94e76b1bf98ec0cb906acd17">PCC_MR_ALWYS_Pos</a>)</td></tr>
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<tr class="separator:afb2247de4b60fc9166f0157ed1623480"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6227f3ab181a9d3cb91508ae485141c4"><td class="memItemLeft" align="right" valign="top"><a id="a6227f3ab181a9d3cb91508ae485141c4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a6227f3ab181a9d3cb91508ae485141c4">PCC_MR_HALFS_Pos</a>   10</td></tr>
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<tr class="memdesc:a6227f3ab181a9d3cb91508ae485141c4"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Half Sampling <br /></td></tr>
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<tr class="separator:a6227f3ab181a9d3cb91508ae485141c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a08de4d5286995f8b36587bce63f22dc8"><td class="memItemLeft" align="right" valign="top"><a id="a08de4d5286995f8b36587bce63f22dc8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_HALFS</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#a6227f3ab181a9d3cb91508ae485141c4">PCC_MR_HALFS_Pos</a>)</td></tr>
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<tr class="separator:a08de4d5286995f8b36587bce63f22dc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a339418d5c6f6fe8622bd94174d9af5cb"><td class="memItemLeft" align="right" valign="top"><a id="a339418d5c6f6fe8622bd94174d9af5cb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a339418d5c6f6fe8622bd94174d9af5cb">PCC_MR_FRSTS_Pos</a>   11</td></tr>
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<tr class="memdesc:a339418d5c6f6fe8622bd94174d9af5cb"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) First sample <br /></td></tr>
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<tr class="memitem:aca03521adb6d0ec4c8d338d20f404234"><td class="memItemLeft" align="right" valign="top"><a id="aca03521adb6d0ec4c8d338d20f404234"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_FRSTS</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#a339418d5c6f6fe8622bd94174d9af5cb">PCC_MR_FRSTS_Pos</a>)</td></tr>
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<tr class="memitem:aaf4ad3c430637f8bbbd1acbe60f3dd85"><td class="memItemLeft" align="right" valign="top"><a id="aaf4ad3c430637f8bbbd1acbe60f3dd85"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85">PCC_MR_ISIZE_Pos</a>   16</td></tr>
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<tr class="memdesc:aaf4ad3c430637f8bbbd1acbe60f3dd85"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Input Data Size <br /></td></tr>
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<tr class="memitem:af824daf541253256e2e139a458f165c8"><td class="memItemLeft" align="right" valign="top"><a id="af824daf541253256e2e139a458f165c8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_ISIZE_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85">PCC_MR_ISIZE_Pos</a>)</td></tr>
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<tr class="memitem:a73bda88faa35a47b7e6a83a398142503"><td class="memItemLeft" align="right" valign="top"><a id="a73bda88faa35a47b7e6a83a398142503"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_ISIZE</b>(value)   (PCC_MR_ISIZE_Msk & ((value) << <a class="el" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85">PCC_MR_ISIZE_Pos</a>))</td></tr>
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<tr class="memitem:ad600b9b7c54609930d89c9f9a5d4dbc2"><td class="memItemLeft" align="right" valign="top"><a id="ad600b9b7c54609930d89c9f9a5d4dbc2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2">PCC_MR_CID_Pos</a>   30</td></tr>
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<tr class="memdesc:ad600b9b7c54609930d89c9f9a5d4dbc2"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) Clear If Disabled <br /></td></tr>
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<tr class="memitem:ac991bc569bd92f8a5f2b751fd12ace12"><td class="memItemLeft" align="right" valign="top"><a id="ac991bc569bd92f8a5f2b751fd12ace12"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_CID_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2">PCC_MR_CID_Pos</a>)</td></tr>
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<tr class="memitem:ae6c8bcb01c6b74d51288500d6c499ed0"><td class="memItemLeft" align="right" valign="top"><a id="ae6c8bcb01c6b74d51288500d6c499ed0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_MR_CID</b>(value)   (PCC_MR_CID_Msk & ((value) << <a class="el" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2">PCC_MR_CID_Pos</a>))</td></tr>
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<tr class="memitem:ac13de15c80e7865e8cfccaad7b1a41cc"><td class="memItemLeft" align="right" valign="top"><a id="ac13de15c80e7865e8cfccaad7b1a41cc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac13de15c80e7865e8cfccaad7b1a41cc">PCC_MR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xC0070F31)</td></tr>
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<tr class="memdesc:ac13de15c80e7865e8cfccaad7b1a41cc"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_MR) MASK Register <br /></td></tr>
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<tr class="separator:ac13de15c80e7865e8cfccaad7b1a41cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a04455cec5fbea18cff02cda1a99e0a4d"><td class="memItemLeft" align="right" valign="top"><a id="a04455cec5fbea18cff02cda1a99e0a4d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a04455cec5fbea18cff02cda1a99e0a4d">PCC_IER_OFFSET</a>   0x04</td></tr>
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<tr class="memdesc:a04455cec5fbea18cff02cda1a99e0a4d"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IER offset) Interrupt Enable Register <br /></td></tr>
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<tr class="separator:a04455cec5fbea18cff02cda1a99e0a4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab8e7dc5a7151033a244edcc2330b0a56"><td class="memItemLeft" align="right" valign="top"><a id="ab8e7dc5a7151033a244edcc2330b0a56"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ab8e7dc5a7151033a244edcc2330b0a56">PCC_IER_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ab8e7dc5a7151033a244edcc2330b0a56"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IER reset_value) Interrupt Enable Register <br /></td></tr>
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<tr class="separator:ab8e7dc5a7151033a244edcc2330b0a56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e23f175cc1ec773591acc46cfe0bd0f"><td class="memItemLeft" align="right" valign="top"><a id="a8e23f175cc1ec773591acc46cfe0bd0f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a8e23f175cc1ec773591acc46cfe0bd0f">PCC_IER_DRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:a8e23f175cc1ec773591acc46cfe0bd0f"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IER) Data Ready Interrupt Enable <br /></td></tr>
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<tr class="separator:a8e23f175cc1ec773591acc46cfe0bd0f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a323e64e0e6ee3942cb5e856f1fdbb318"><td class="memItemLeft" align="right" valign="top"><a id="a323e64e0e6ee3942cb5e856f1fdbb318"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_IER_DRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#a8e23f175cc1ec773591acc46cfe0bd0f">PCC_IER_DRDY_Pos</a>)</td></tr>
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<tr class="separator:a323e64e0e6ee3942cb5e856f1fdbb318"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac6f2728ea8a412b211def673ecb65e78"><td class="memItemLeft" align="right" valign="top"><a id="ac6f2728ea8a412b211def673ecb65e78"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac6f2728ea8a412b211def673ecb65e78">PCC_IER_OVRE_Pos</a>   1</td></tr>
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<tr class="memdesc:ac6f2728ea8a412b211def673ecb65e78"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IER) Overrun Error Interrupt Enable <br /></td></tr>
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<tr class="separator:ac6f2728ea8a412b211def673ecb65e78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4168f13e664b1d7b2c0561874f5a9c85"><td class="memItemLeft" align="right" valign="top"><a id="a4168f13e664b1d7b2c0561874f5a9c85"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_IER_OVRE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#ac6f2728ea8a412b211def673ecb65e78">PCC_IER_OVRE_Pos</a>)</td></tr>
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<tr class="separator:a4168f13e664b1d7b2c0561874f5a9c85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a72a1d200817a6f738f11e5d838e86f32"><td class="memItemLeft" align="right" valign="top"><a id="a72a1d200817a6f738f11e5d838e86f32"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a72a1d200817a6f738f11e5d838e86f32">PCC_IER_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
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<tr class="memdesc:a72a1d200817a6f738f11e5d838e86f32"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IER) MASK Register <br /></td></tr>
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<tr class="separator:a72a1d200817a6f738f11e5d838e86f32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a46c605907efe863e46261c68f9e638ca"><td class="memItemLeft" align="right" valign="top"><a id="a46c605907efe863e46261c68f9e638ca"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a46c605907efe863e46261c68f9e638ca">PCC_IDR_OFFSET</a>   0x08</td></tr>
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<tr class="memdesc:a46c605907efe863e46261c68f9e638ca"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IDR offset) Interrupt Disable Register <br /></td></tr>
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<tr class="separator:a46c605907efe863e46261c68f9e638ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2df4f3c107c1da36f799050997f0d22e"><td class="memItemLeft" align="right" valign="top"><a id="a2df4f3c107c1da36f799050997f0d22e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a2df4f3c107c1da36f799050997f0d22e">PCC_IDR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a2df4f3c107c1da36f799050997f0d22e"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IDR reset_value) Interrupt Disable Register <br /></td></tr>
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<tr class="separator:a2df4f3c107c1da36f799050997f0d22e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af10dc873f13b918c69a05fb61bf4a34c"><td class="memItemLeft" align="right" valign="top"><a id="af10dc873f13b918c69a05fb61bf4a34c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#af10dc873f13b918c69a05fb61bf4a34c">PCC_IDR_DRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:af10dc873f13b918c69a05fb61bf4a34c"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IDR) Data Ready Interrupt Disable <br /></td></tr>
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<tr class="separator:af10dc873f13b918c69a05fb61bf4a34c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac839cf4f5ca672d9642b8888bba8daa4"><td class="memItemLeft" align="right" valign="top"><a id="ac839cf4f5ca672d9642b8888bba8daa4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_IDR_DRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#af10dc873f13b918c69a05fb61bf4a34c">PCC_IDR_DRDY_Pos</a>)</td></tr>
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<tr class="separator:ac839cf4f5ca672d9642b8888bba8daa4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aecc0e350756dae83a40c32f9c2395cc7"><td class="memItemLeft" align="right" valign="top"><a id="aecc0e350756dae83a40c32f9c2395cc7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aecc0e350756dae83a40c32f9c2395cc7">PCC_IDR_OVRE_Pos</a>   1</td></tr>
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<tr class="memdesc:aecc0e350756dae83a40c32f9c2395cc7"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IDR) Overrun Error Interrupt Disable <br /></td></tr>
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<tr class="separator:aecc0e350756dae83a40c32f9c2395cc7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a57be997be6bb41970a01bf610815d072"><td class="memItemLeft" align="right" valign="top"><a id="a57be997be6bb41970a01bf610815d072"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_IDR_OVRE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#aecc0e350756dae83a40c32f9c2395cc7">PCC_IDR_OVRE_Pos</a>)</td></tr>
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<tr class="separator:a57be997be6bb41970a01bf610815d072"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af8f8036f039e5d26c2e529a8a838cb5c"><td class="memItemLeft" align="right" valign="top"><a id="af8f8036f039e5d26c2e529a8a838cb5c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#af8f8036f039e5d26c2e529a8a838cb5c">PCC_IDR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
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<tr class="memdesc:af8f8036f039e5d26c2e529a8a838cb5c"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IDR) MASK Register <br /></td></tr>
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<tr class="separator:af8f8036f039e5d26c2e529a8a838cb5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a70b6c9a36ef4245cdae57c55af4aaaad"><td class="memItemLeft" align="right" valign="top"><a id="a70b6c9a36ef4245cdae57c55af4aaaad"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a70b6c9a36ef4245cdae57c55af4aaaad">PCC_IMR_OFFSET</a>   0x0C</td></tr>
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<tr class="memdesc:a70b6c9a36ef4245cdae57c55af4aaaad"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IMR offset) Interrupt Mask Register <br /></td></tr>
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<tr class="separator:a70b6c9a36ef4245cdae57c55af4aaaad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6862a1b82b634ed667aa69783d74ee8a"><td class="memItemLeft" align="right" valign="top"><a id="a6862a1b82b634ed667aa69783d74ee8a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a6862a1b82b634ed667aa69783d74ee8a">PCC_IMR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a6862a1b82b634ed667aa69783d74ee8a"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IMR reset_value) Interrupt Mask Register <br /></td></tr>
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<tr class="separator:a6862a1b82b634ed667aa69783d74ee8a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a728fea4b29b9eae92b782315e5f313dd"><td class="memItemLeft" align="right" valign="top"><a id="a728fea4b29b9eae92b782315e5f313dd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a728fea4b29b9eae92b782315e5f313dd">PCC_IMR_DRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:a728fea4b29b9eae92b782315e5f313dd"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IMR) Data Ready Interrupt Mask <br /></td></tr>
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<tr class="separator:a728fea4b29b9eae92b782315e5f313dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8d5d6dd219c9ebdcac7380f30956e7b5"><td class="memItemLeft" align="right" valign="top"><a id="a8d5d6dd219c9ebdcac7380f30956e7b5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_IMR_DRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#a728fea4b29b9eae92b782315e5f313dd">PCC_IMR_DRDY_Pos</a>)</td></tr>
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<tr class="memitem:a6410ef9d1ca48b9f676dafc28772f323"><td class="memItemLeft" align="right" valign="top"><a id="a6410ef9d1ca48b9f676dafc28772f323"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a6410ef9d1ca48b9f676dafc28772f323">PCC_IMR_OVRE_Pos</a>   1</td></tr>
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<tr class="memdesc:a6410ef9d1ca48b9f676dafc28772f323"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IMR) Overrun Error Interrupt Mask <br /></td></tr>
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<tr class="memitem:a578b997681663d59350bea64994c40ca"><td class="memItemLeft" align="right" valign="top"><a id="a578b997681663d59350bea64994c40ca"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_IMR_OVRE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#a6410ef9d1ca48b9f676dafc28772f323">PCC_IMR_OVRE_Pos</a>)</td></tr>
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<tr class="separator:a578b997681663d59350bea64994c40ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac0c0568b06fcac79024c81d71a7c9a79"><td class="memItemLeft" align="right" valign="top"><a id="ac0c0568b06fcac79024c81d71a7c9a79"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac0c0568b06fcac79024c81d71a7c9a79">PCC_IMR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
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<tr class="memdesc:ac0c0568b06fcac79024c81d71a7c9a79"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_IMR) MASK Register <br /></td></tr>
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<tr class="separator:ac0c0568b06fcac79024c81d71a7c9a79"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1efffb83b9583b99be0e5b62bece6f4"><td class="memItemLeft" align="right" valign="top"><a id="ae1efffb83b9583b99be0e5b62bece6f4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ae1efffb83b9583b99be0e5b62bece6f4">PCC_ISR_OFFSET</a>   0x10</td></tr>
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<tr class="memdesc:ae1efffb83b9583b99be0e5b62bece6f4"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_ISR offset) Interrupt Status Register <br /></td></tr>
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<tr class="memitem:a5c496d2c30fa3c1e15b0add8ef7eb6f6"><td class="memItemLeft" align="right" valign="top"><a id="a5c496d2c30fa3c1e15b0add8ef7eb6f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a5c496d2c30fa3c1e15b0add8ef7eb6f6">PCC_ISR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a5c496d2c30fa3c1e15b0add8ef7eb6f6"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_ISR reset_value) Interrupt Status Register <br /></td></tr>
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<tr class="separator:a5c496d2c30fa3c1e15b0add8ef7eb6f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac0dd9b90a1744f753b1a4b0556f51901"><td class="memItemLeft" align="right" valign="top"><a id="ac0dd9b90a1744f753b1a4b0556f51901"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac0dd9b90a1744f753b1a4b0556f51901">PCC_ISR_DRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:ac0dd9b90a1744f753b1a4b0556f51901"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_ISR) Data Ready Interrupt Status <br /></td></tr>
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<tr class="separator:ac0dd9b90a1744f753b1a4b0556f51901"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac7d9e281b96b7f04609e17bfc7d1f9c"><td class="memItemLeft" align="right" valign="top"><a id="aac7d9e281b96b7f04609e17bfc7d1f9c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_ISR_DRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#ac0dd9b90a1744f753b1a4b0556f51901">PCC_ISR_DRDY_Pos</a>)</td></tr>
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<tr class="separator:aac7d9e281b96b7f04609e17bfc7d1f9c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa0b359eb2325727f0763430233540c52"><td class="memItemLeft" align="right" valign="top"><a id="aa0b359eb2325727f0763430233540c52"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aa0b359eb2325727f0763430233540c52">PCC_ISR_OVRE_Pos</a>   1</td></tr>
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<tr class="memdesc:aa0b359eb2325727f0763430233540c52"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_ISR) Overrun Error Interrupt Status <br /></td></tr>
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<tr class="memitem:a147306a765379c071be6468ead13c45d"><td class="memItemLeft" align="right" valign="top"><a id="a147306a765379c071be6468ead13c45d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_ISR_OVRE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#aa0b359eb2325727f0763430233540c52">PCC_ISR_OVRE_Pos</a>)</td></tr>
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<tr class="separator:a147306a765379c071be6468ead13c45d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2b75d8ba5be63620debdf4ef98098ca0"><td class="memItemLeft" align="right" valign="top"><a id="a2b75d8ba5be63620debdf4ef98098ca0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a2b75d8ba5be63620debdf4ef98098ca0">PCC_ISR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
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<tr class="memdesc:a2b75d8ba5be63620debdf4ef98098ca0"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_ISR) MASK Register <br /></td></tr>
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<tr class="separator:a2b75d8ba5be63620debdf4ef98098ca0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7769f078892febe675944a3acec20067"><td class="memItemLeft" align="right" valign="top"><a id="a7769f078892febe675944a3acec20067"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a7769f078892febe675944a3acec20067">PCC_RHR_OFFSET</a>   0x14</td></tr>
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<tr class="memdesc:a7769f078892febe675944a3acec20067"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_RHR offset) Reception Holding Register <br /></td></tr>
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<tr class="separator:a7769f078892febe675944a3acec20067"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a36d1b49b7e277c4f39c636f6574c39db"><td class="memItemLeft" align="right" valign="top"><a id="a36d1b49b7e277c4f39c636f6574c39db"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a36d1b49b7e277c4f39c636f6574c39db">PCC_RHR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a36d1b49b7e277c4f39c636f6574c39db"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_RHR reset_value) Reception Holding Register <br /></td></tr>
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<tr class="separator:a36d1b49b7e277c4f39c636f6574c39db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a90662ce7f86b63b830c1a883f9762f3c"><td class="memItemLeft" align="right" valign="top"><a id="a90662ce7f86b63b830c1a883f9762f3c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c">PCC_RHR_RDATA_Pos</a>   0</td></tr>
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<tr class="memdesc:a90662ce7f86b63b830c1a883f9762f3c"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_RHR) Reception Data <br /></td></tr>
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<tr class="separator:a90662ce7f86b63b830c1a883f9762f3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1e1d6af9bc62b70038bff87d68287a55"><td class="memItemLeft" align="right" valign="top"><a id="a1e1d6af9bc62b70038bff87d68287a55"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_RHR_RDATA_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) << <a class="el" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c">PCC_RHR_RDATA_Pos</a>)</td></tr>
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<tr class="separator:a1e1d6af9bc62b70038bff87d68287a55"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a31947bd41d8319d57a2c5dccec46fed3"><td class="memItemLeft" align="right" valign="top"><a id="a31947bd41d8319d57a2c5dccec46fed3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_RHR_RDATA</b>(value)   (PCC_RHR_RDATA_Msk & ((value) << <a class="el" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c">PCC_RHR_RDATA_Pos</a>))</td></tr>
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<tr class="separator:a31947bd41d8319d57a2c5dccec46fed3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5234737701963b81b4a99c293a4ff0ce"><td class="memItemLeft" align="right" valign="top"><a id="a5234737701963b81b4a99c293a4ff0ce"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a5234737701963b81b4a99c293a4ff0ce">PCC_RHR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
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<tr class="memdesc:a5234737701963b81b4a99c293a4ff0ce"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_RHR) MASK Register <br /></td></tr>
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<tr class="separator:a5234737701963b81b4a99c293a4ff0ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1b38544917f4b7e3bfa9b60014b1c4d6"><td class="memItemLeft" align="right" valign="top"><a id="a1b38544917f4b7e3bfa9b60014b1c4d6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a1b38544917f4b7e3bfa9b60014b1c4d6">PCC_WPMR_OFFSET</a>   0xE0</td></tr>
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<tr class="memdesc:a1b38544917f4b7e3bfa9b60014b1c4d6"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPMR offset) Write Protection Mode Register <br /></td></tr>
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<tr class="separator:a1b38544917f4b7e3bfa9b60014b1c4d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a159781cbe8254f1ca45799575ab17ca6"><td class="memItemLeft" align="right" valign="top"><a id="a159781cbe8254f1ca45799575ab17ca6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a159781cbe8254f1ca45799575ab17ca6">PCC_WPMR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a159781cbe8254f1ca45799575ab17ca6"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPMR reset_value) Write Protection Mode Register <br /></td></tr>
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<tr class="separator:a159781cbe8254f1ca45799575ab17ca6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe9e54d60083e19457da5b5c70a8b1c6"><td class="memItemLeft" align="right" valign="top"><a id="afe9e54d60083e19457da5b5c70a8b1c6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#afe9e54d60083e19457da5b5c70a8b1c6">PCC_WPMR_WPEN_Pos</a>   0</td></tr>
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<tr class="memdesc:afe9e54d60083e19457da5b5c70a8b1c6"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPMR) Write Protection Enable <br /></td></tr>
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<tr class="separator:afe9e54d60083e19457da5b5c70a8b1c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7de95ebe0ecf7a8c14b56b7f3a4a6643"><td class="memItemLeft" align="right" valign="top"><a id="a7de95ebe0ecf7a8c14b56b7f3a4a6643"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_WPMR_WPEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#afe9e54d60083e19457da5b5c70a8b1c6">PCC_WPMR_WPEN_Pos</a>)</td></tr>
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<tr class="separator:a7de95ebe0ecf7a8c14b56b7f3a4a6643"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae607ff7b99d4271d80b2c057d2a4025f"><td class="memItemLeft" align="right" valign="top"><a id="ae607ff7b99d4271d80b2c057d2a4025f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f">PCC_WPMR_WPKEY_Pos</a>   8</td></tr>
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<tr class="memdesc:ae607ff7b99d4271d80b2c057d2a4025f"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPMR) Write Protection Key <br /></td></tr>
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<tr class="separator:ae607ff7b99d4271d80b2c057d2a4025f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a80cf2a1ff25d4898df75ac446ab5d162"><td class="memItemLeft" align="right" valign="top"><a id="a80cf2a1ff25d4898df75ac446ab5d162"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_WPMR_WPKEY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFF) << <a class="el" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f">PCC_WPMR_WPKEY_Pos</a>)</td></tr>
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<tr class="separator:a80cf2a1ff25d4898df75ac446ab5d162"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9b7746fc032bb65282172c792639b1e0"><td class="memItemLeft" align="right" valign="top"><a id="a9b7746fc032bb65282172c792639b1e0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_WPMR_WPKEY</b>(value)   (PCC_WPMR_WPKEY_Msk & ((value) << <a class="el" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f">PCC_WPMR_WPKEY_Pos</a>))</td></tr>
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<tr class="separator:a9b7746fc032bb65282172c792639b1e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a81169f2799b6df95807e3a521d309948"><td class="memItemLeft" align="right" valign="top"><a id="a81169f2799b6df95807e3a521d309948"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a81169f2799b6df95807e3a521d309948">PCC_WPMR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFF01)</td></tr>
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<tr class="memdesc:a81169f2799b6df95807e3a521d309948"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPMR) MASK Register <br /></td></tr>
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<tr class="separator:a81169f2799b6df95807e3a521d309948"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a76a394c01142bde41e7ce1a4e7285043"><td class="memItemLeft" align="right" valign="top"><a id="a76a394c01142bde41e7ce1a4e7285043"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a76a394c01142bde41e7ce1a4e7285043">PCC_WPSR_OFFSET</a>   0xE4</td></tr>
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<tr class="memdesc:a76a394c01142bde41e7ce1a4e7285043"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPSR offset) Write Protection Status Register <br /></td></tr>
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<tr class="separator:a76a394c01142bde41e7ce1a4e7285043"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a923c7a70b7e03ba5cc13a498ef90def3"><td class="memItemLeft" align="right" valign="top"><a id="a923c7a70b7e03ba5cc13a498ef90def3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a923c7a70b7e03ba5cc13a498ef90def3">PCC_WPSR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a923c7a70b7e03ba5cc13a498ef90def3"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPSR reset_value) Write Protection Status Register <br /></td></tr>
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<tr class="separator:a923c7a70b7e03ba5cc13a498ef90def3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaefc795cdf28abca9a95827f69faf668"><td class="memItemLeft" align="right" valign="top"><a id="aaefc795cdf28abca9a95827f69faf668"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aaefc795cdf28abca9a95827f69faf668">PCC_WPSR_WPVS_Pos</a>   0</td></tr>
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<tr class="memdesc:aaefc795cdf28abca9a95827f69faf668"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPSR) Write Protection Violation Source <br /></td></tr>
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<tr class="separator:aaefc795cdf28abca9a95827f69faf668"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a50e2c3b4d2c3730f08679174b76cefbf"><td class="memItemLeft" align="right" valign="top"><a id="a50e2c3b4d2c3730f08679174b76cefbf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_WPSR_WPVS</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2pcc_8h.html#aaefc795cdf28abca9a95827f69faf668">PCC_WPSR_WPVS_Pos</a>)</td></tr>
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<tr class="separator:a50e2c3b4d2c3730f08679174b76cefbf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00c53e3b7428569d5d6a701b97c76ed1"><td class="memItemLeft" align="right" valign="top"><a id="a00c53e3b7428569d5d6a701b97c76ed1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1">PCC_WPSR_WPVSRC_Pos</a>   8</td></tr>
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<tr class="memdesc:a00c53e3b7428569d5d6a701b97c76ed1"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPSR) Write Protection Violation Status <br /></td></tr>
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<tr class="separator:a00c53e3b7428569d5d6a701b97c76ed1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0a7866929ccdf909716f5f986207affc"><td class="memItemLeft" align="right" valign="top"><a id="a0a7866929ccdf909716f5f986207affc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_WPSR_WPVSRC_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) << <a class="el" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1">PCC_WPSR_WPVSRC_Pos</a>)</td></tr>
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<tr class="separator:a0a7866929ccdf909716f5f986207affc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69b5500e434250255422cafc71c1d426"><td class="memItemLeft" align="right" valign="top"><a id="a69b5500e434250255422cafc71c1d426"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PCC_WPSR_WPVSRC</b>(value)   (PCC_WPSR_WPVSRC_Msk & ((value) << <a class="el" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1">PCC_WPSR_WPVSRC_Pos</a>))</td></tr>
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<tr class="separator:a69b5500e434250255422cafc71c1d426"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a28ee2303726b788111a300f04de2fd1d"><td class="memItemLeft" align="right" valign="top"><a id="a28ee2303726b788111a300f04de2fd1d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a28ee2303726b788111a300f04de2fd1d">PCC_WPSR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFF01)</td></tr>
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<tr class="memdesc:a28ee2303726b788111a300f04de2fd1d"><td class="mdescLeft"> </td><td class="mdescRight">(PCC_WPSR) MASK Register <br /></td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Component description for PCC. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="component_2pcc_8h_source.html">pcc.h</a>.</p>
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