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<a name="Assembly-Floating-Point"></a>
<div class="header">
<p>
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<hr>
<a name="Floating-Point"></a>
<h4 class="subsection">15.8.6 Floating Point</h4>
<a name="index-Assembly-floating-Point"></a>
<p>Floating point arithmetic is used in GMP for multiplications on CPUs with poor
integer multipliers. It&rsquo;s mostly useful for <code>mpn_mul_1</code>,
<code>mpn_addmul_1</code> and <code>mpn_submul_1</code> on 64-bit machines, and
<code>mpn_mul_basecase</code> on both 32-bit and 64-bit machines.
</p>
<p>With IEEE 53-bit double precision floats, integer multiplications producing up
to 53 bits will give exact results. Breaking a 64x64 multiplication
into eight 16x<em>32-&gt;48</em> bit pieces is convenient. With
some care though six 21x<em>32-&gt;53</em> bit products can be
used, if one of the lower two 21-bit pieces also uses the sign bit.
</p>
<p>For the <code>mpn_mul_1</code> family of functions on a 64-bit machine, the
invariant single limb is split at the start, into 3 or 4 pieces. Inside the
loop, the bignum operand is split into 32-bit pieces. Fast conversion of
these unsigned 32-bit pieces to floating point is highly machine-dependent.
In some cases, reading the data into the integer unit, zero-extending to
64-bits, then transferring to the floating point unit back via memory is the
only option.
</p>
<p>Converting partial products back to 64-bit limbs is usually best done as a
signed conversion. Since all values are smaller than <em>2^53</em>, signed
and unsigned are the same, but most processors lack unsigned conversions.
</p>
<br>
<br>
<p>Here is a diagram showing 16x32 bit products for an <code>mpn_mul_1</code> or
<code>mpn_addmul_1</code> with a 64-bit limb. The single limb operand V is split
into four 16-bit parts. The multi-limb operand U is split in the loop into
two 32-bit parts.
</p>
<div class="example">
<pre class="example"> +---+---+---+---+
|v48|v32|v16|v00| V operand
+---+---+---+---+
+-------+---+---+
x | u32 | u00 | U operand (one limb)
+---------------+
---------------------------------
+-----------+
| u00 x v00 | p00 48-bit products
+-----------+
+-----------+
| u00 x v16 | p16
+-----------+
+-----------+
| u00 x v32 | p32
+-----------+
+-----------+
| u00 x v48 | p48
+-----------+
+-----------+
| u32 x v00 | r32
+-----------+
+-----------+
| u32 x v16 | r48
+-----------+
+-----------+
| u32 x v32 | r64
+-----------+
+-----------+
| u32 x v48 | r80
+-----------+
</pre></div>
<p><em>p32</em> and <em>r32</em> can be summed using floating-point addition, and
likewise <em>p48</em> and <em>r48</em>. <em>p00</em> and <em>p16</em> can be summed
with <em>r64</em> and <em>r80</em> from the previous iteration.
</p>
<p>For each loop then, four 49-bit quantities are transferred to the integer unit,
aligned as follows,
</p>
<div class="example">
<pre class="example">|-----64bits----|-----64bits----|
+------------+
| p00 + r64' | i00
+------------+
+------------+
| p16 + r80' | i16
+------------+
+------------+
| p32 + r32 | i32
+------------+
+------------+
| p48 + r48 | i48
+------------+
</pre></div>
<p>The challenge then is to sum these efficiently and add in a carry limb,
generating a low 64-bit result limb and a high 33-bit carry limb (<em>i48</em>
extends 33 bits into the high half).
</p>
<hr>
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<p>
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