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121 lines
5.9 KiB
HTML
121 lines
5.9 KiB
HTML
4 years ago
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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- This manual describes how to install and use the GNU multiple precision
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arithmetic library, version 6.1.0.
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Copyright 1991, 1993-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document under
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the terms of the GNU Free Documentation License, Version 1.3 or any later
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version published by the Free Software Foundation; with no Invariant Sections,
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with the Front-Cover Texts being "A GNU Manual", and with the Back-Cover
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Texts being "You have freedom to copy and modify this GNU Manual, like GNU
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software". A copy of the license is included in
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GNU Free Documentation License. -->
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<!-- Created by GNU Texinfo 6.4, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>Assembly Cache Handling (GNU MP 6.1.0)</title>
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<meta name="description" content="How to install and use the GNU multiple precision arithmetic library, version 6.1.0.">
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<meta name="keywords" content="Assembly Cache Handling (GNU MP 6.1.0)">
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<meta name="resource-type" content="document">
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<meta name="distribution" content="global">
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<meta name="Generator" content="makeinfo">
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<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index">
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<link href="Assembly-Coding.html#Assembly-Coding" rel="up" title="Assembly Coding">
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<link href="Assembly-Functional-Units.html#Assembly-Functional-Units" rel="next" title="Assembly Functional Units">
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<link href="Assembly-Carry-Propagation.html#Assembly-Carry-Propagation" rel="prev" title="Assembly Carry Propagation">
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<style type="text/css">
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-->
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</style>
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</head>
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<body lang="en">
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<a name="Assembly-Cache-Handling"></a>
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<div class="header">
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<p>
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Next: <a href="Assembly-Functional-Units.html#Assembly-Functional-Units" accesskey="n" rel="next">Assembly Functional Units</a>, Previous: <a href="Assembly-Carry-Propagation.html#Assembly-Carry-Propagation" accesskey="p" rel="prev">Assembly Carry Propagation</a>, Up: <a href="Assembly-Coding.html#Assembly-Coding" accesskey="u" rel="up">Assembly Coding</a> [<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Cache-Handling"></a>
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<h4 class="subsection">15.8.4 Cache Handling</h4>
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<a name="index-Assembly-cache-handling"></a>
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<p>GMP aims to perform well both on operands that fit entirely in L1 cache and
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those which don’t.
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</p>
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<p>Basic routines like <code>mpn_add_n</code> or <code>mpn_lshift</code> are often used on
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large operands, so L2 and main memory performance is important for them.
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<code>mpn_mul_1</code> and <code>mpn_addmul_1</code> are mostly used for multiply and
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square basecases, so L1 performance matters most for them, unless assembly
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versions of <code>mpn_mul_basecase</code> and <code>mpn_sqr_basecase</code> exist, in
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which case the remaining uses are mostly for larger operands.
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</p>
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<p>For L2 or main memory operands, memory access times will almost certainly be
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more than the calculation time. The aim therefore is to maximize memory
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throughput, by starting a load of the next cache line while processing the
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contents of the previous one. Clearly this is only possible if the chip has a
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lock-up free cache or some sort of prefetch instruction. Most current chips
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have both these features.
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</p>
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<p>Prefetching sources combines well with loop unrolling, since a prefetch can be
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initiated once per unrolled loop (or more than once if the loop covers more
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than one cache line).
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</p>
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<p>On CPUs without write-allocate caches, prefetching destinations will ensure
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individual stores don’t go further down the cache hierarchy, limiting
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bandwidth. Of course for calculations which are slow anyway, like
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<code>mpn_divrem_1</code>, write-throughs might be fine.
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</p>
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<p>The distance ahead to prefetch will be determined by memory latency versus
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throughput. The aim of course is to have data arriving continuously, at peak
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throughput. Some CPUs have limits on the number of fetches or prefetches in
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progress.
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</p>
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<p>If a special prefetch instruction doesn’t exist then a plain load can be used,
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but in that case care must be taken not to attempt to read past the end of an
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operand, since that might produce a segmentation violation.
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</p>
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<p>Some CPUs or systems have hardware that detects sequential memory accesses and
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initiates suitable cache movements automatically, making life easy.
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</p>
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<hr>
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<div class="header">
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<p>
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Next: <a href="Assembly-Functional-Units.html#Assembly-Functional-Units" accesskey="n" rel="next">Assembly Functional Units</a>, Previous: <a href="Assembly-Carry-Propagation.html#Assembly-Carry-Propagation" accesskey="p" rel="prev">Assembly Carry Propagation</a>, Up: <a href="Assembly-Coding.html#Assembly-Coding" accesskey="u" rel="up">Assembly Coding</a> [<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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</html>
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