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195 lines
9.1 KiB
HTML
195 lines
9.1 KiB
HTML
4 years ago
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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3 or
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any later version published by the Free Software Foundation; with the
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Invariant Sections being "Free Software" and "Free Software Needs
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Free Documentation", with the Front-Cover Texts being "A GNU Manual,"
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and with the Back-Cover Texts as in (a) below.
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(a) The FSF's Back-Cover Text is: "You are free to copy and modify
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this GNU Manual. Buying copies from GNU Press supports the FSF in
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developing GNU and promoting software freedom." -->
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<!-- Created by GNU Texinfo 6.4, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>i386 (Debugging with GDB)</title>
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<meta name="description" content="i386 (Debugging with GDB)">
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<meta name="keywords" content="i386 (Debugging with GDB)">
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<meta name="resource-type" content="document">
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<meta name="distribution" content="global">
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<meta name="Generator" content="makeinfo">
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<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Architectures.html#Architectures" rel="up" title="Architectures">
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<link href="Alpha.html#Alpha" rel="next" title="Alpha">
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<link href="AArch64.html#AArch64" rel="prev" title="AArch64">
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</style>
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</head>
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<body lang="en">
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<a name="i386"></a>
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<div class="header">
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<p>
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Next: <a href="Alpha.html#Alpha" accesskey="n" rel="next">Alpha</a>, Previous: <a href="AArch64.html#AArch64" accesskey="p" rel="prev">AArch64</a>, Up: <a href="Architectures.html#Architectures" accesskey="u" rel="up">Architectures</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="x86-Architecture_002dspecific-Issues"></a>
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<h4 class="subsection">21.4.2 x86 Architecture-specific Issues</h4>
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<dl compact="compact">
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<dt><code>set struct-convention <var>mode</var></code></dt>
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<dd><a name="index-set-struct_002dconvention"></a>
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<a name="index-struct-return-convention"></a>
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<a name="index-struct_002funion-returned-in-registers"></a>
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<p>Set the convention used by the inferior to return <code>struct</code>s and
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<code>union</code>s from functions to <var>mode</var>. Possible values of
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<var>mode</var> are <code>"pcc"</code>, <code>"reg"</code>, and <code>"default"</code> (the
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default). <code>"default"</code> or <code>"pcc"</code> means that <code>struct</code>s
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are returned on the stack, while <code>"reg"</code> means that a
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<code>struct</code> or a <code>union</code> whose size is 1, 2, 4, or 8 bytes will
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be returned in a register.
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</p>
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</dd>
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<dt><code>show struct-convention</code></dt>
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<dd><a name="index-show-struct_002dconvention"></a>
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<p>Show the current setting of the convention to return <code>struct</code>s
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from functions.
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</p></dd>
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</dl>
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<a name="Intel-Memory-Protection-Extensions-_0028MPX_0029_002e"></a>
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<h4 class="subsubsection">21.4.2.1 Intel <em>Memory Protection Extensions</em> (MPX).</h4>
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<a name="index-Intel-Memory-Protection-Extensions-_0028MPX_0029_002e"></a>
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<p>Memory Protection Extension (MPX) adds the bound registers ‘<samp>BND0</samp>’
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<a name="DOCF16" href="#FOOT16"><sup>16</sup></a> through ‘<samp>BND3</samp>’. Bound registers store a pair of 64-bit values
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which are the lower bound and upper bound. Bounds are effective addresses or
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memory locations. The upper bounds are architecturally represented in 1’s
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complement form. A bound having lower bound = 0, and upper bound = 0
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(1’s complement of all bits set) will allow access to the entire address space.
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</p>
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<p>‘<samp>BND0</samp>’ through ‘<samp>BND3</samp>’ are represented in <small>GDB</small> as ‘<samp>bnd0raw</samp>’
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through ‘<samp>bnd3raw</samp>’. Pseudo registers ‘<samp>bnd0</samp>’ through ‘<samp>bnd3</samp>’
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display the upper bound performing the complement of one operation on the
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upper bound value, i.e. when upper bound in ‘<samp>bnd0raw</samp>’ is 0 in the
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<small>GDB</small> ‘<samp>bnd0</samp>’ it will be <code>0xfff…</code>. In this sense it
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can also be noted that the upper bounds are inclusive.
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</p>
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<p>As an example, assume that the register BND0 holds bounds for a pointer having
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access allowed for the range between 0x32 and 0x71. The values present on
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bnd0raw and bnd registers are presented as follows:
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</p>
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<div class="smallexample">
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<pre class="smallexample"> bnd0raw = {0x32, 0xffffffff8e}
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bnd0 = {lbound = 0x32, ubound = 0x71} : size 64
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</pre></div>
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<p>This way the raw value can be accessed via bnd0raw…bnd3raw. Any
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change on bnd0…bnd3 or bnd0raw…bnd3raw is reflect on its
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counterpart. When the bnd0…bnd3 registers are displayed via
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Python, the display includes the memory size, in bits, accessible to
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the pointer.
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</p>
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<p>Bounds can also be stored in bounds tables, which are stored in
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application memory. These tables store bounds for pointers by specifying
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the bounds pointer’s value along with its bounds. Evaluating and changing
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bounds located in bound tables is therefore interesting while investigating
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bugs on MPX context. <small>GDB</small> provides commands for this purpose:
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</p>
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<dl compact="compact">
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<dt><code>show mpx bound <var>pointer</var></code></dt>
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<dd><a name="index-show-mpx-bound"></a>
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<p>Display bounds of the given <var>pointer</var>.
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</p>
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</dd>
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<dt><code>set mpx bound <var>pointer</var>, <var>lbound</var>, <var>ubound</var></code></dt>
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<dd><a name="index-set-mpx-bound"></a>
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<p>Set the bounds of a pointer in the bound table.
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This command takes three parameters: <var>pointer</var> is the pointers
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whose bounds are to be changed, <var>lbound</var> and <var>ubound</var> are new values
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for lower and upper bounds respectively.
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</p></dd>
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</dl>
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<p>When you call an inferior function on an Intel MPX enabled program,
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GDB sets the inferior’s bound registers to the init (disabled) state
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before calling the function. As a consequence, bounds checks for the
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pointer arguments passed to the function will always pass.
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</p>
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<p>This is necessary because when you call an inferior function, the
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program is usually in the middle of the execution of other function.
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Since at that point bound registers are in an arbitrary state, not
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clearing them would lead to random bound violations in the called
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function.
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</p>
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<p>You can still examine the influence of the bound registers on the
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execution of the called function by stopping the execution of the
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called function at its prologue, setting bound registers, and
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continuing the execution. For example:
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</p>
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<div class="smallexample">
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<pre class="smallexample"> $ break *upper
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Breakpoint 2 at 0x4009de: file i386-mpx-call.c, line 47.
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$ print upper (a, b, c, d, 1)
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Breakpoint 2, upper (a=0x0, b=0x6e0000005b, c=0x0, d=0x0, len=48)....
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$ print $bnd0
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{lbound = 0x0, ubound = ffffffff} : size -1
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</pre></div>
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<p>At this last step the value of bnd0 can be changed for investigation of bound
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violations caused along the execution of the call. In order to know how to
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set the bound registers or bound table for the call consult the ABI.
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</p>
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<div class="footnote">
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<hr>
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<h4 class="footnotes-heading">Footnotes</h4>
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<h3><a name="FOOT16" href="#DOCF16">(16)</a></h3>
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<p>The register named with capital letters represent the architecture
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registers.</p>
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</div>
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<hr>
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<div class="header">
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<p>
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Next: <a href="Alpha.html#Alpha" accesskey="n" rel="next">Alpha</a>, Previous: <a href="AArch64.html#AArch64" accesskey="p" rel="prev">AArch64</a>, Up: <a href="Architectures.html#Architectures" accesskey="u" rel="up">Architectures</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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</html>
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