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216 lines
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HTML
216 lines
11 KiB
HTML
4 years ago
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Permission is granted to copy, distribute and/or modify this document
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"GNU Free Documentation License".
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(a) The FSF's Front-Cover Text is:
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A GNU Manual
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<!-- Created by GNU Texinfo 6.4, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>S/390 System z Built-in Functions (Using the GNU Compiler Collection (GCC))</title>
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<meta name="description" content="S/390 System z Built-in Functions (Using the GNU Compiler Collection (GCC))">
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<meta name="keywords" content="S/390 System z Built-in Functions (Using the GNU Compiler Collection (GCC))">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Target-Builtins.html#Target-Builtins" rel="up" title="Target Builtins">
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<link href="SH-Built_002din-Functions.html#SH-Built_002din-Functions" rel="next" title="SH Built-in Functions">
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<link href="RX-Built_002din-Functions.html#RX-Built_002din-Functions" rel="prev" title="RX Built-in Functions">
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<a name="S_002f390-System-z-Built_002din-Functions"></a>
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<div class="header">
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<p>
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Next: <a href="SH-Built_002din-Functions.html#SH-Built_002din-Functions" accesskey="n" rel="next">SH Built-in Functions</a>, Previous: <a href="RX-Built_002din-Functions.html#RX-Built_002din-Functions" accesskey="p" rel="prev">RX Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="S_002f390-System-z-Built_002din-Functions-1"></a>
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<h4 class="subsection">6.59.26 S/390 System z Built-in Functions</h4>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftbegin"></a>Built-in Function: <em>int</em> <strong>__builtin_tbegin</strong> <em>(void*)</em></dt>
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<dd><p>Generates the <code>tbegin</code> machine instruction starting a
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non-constrained hardware transaction. If the parameter is non-NULL the
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memory area is used to store the transaction diagnostic buffer and
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will be passed as first operand to <code>tbegin</code>. This buffer can be
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defined using the <code>struct __htm_tdb</code> C struct defined in
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<code>htmintrin.h</code> and must reside on a double-word boundary. The
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second tbegin operand is set to <code>0xff0c</code>. This enables
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save/restore of all GPRs and disables aborts for FPR and AR
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manipulations inside the transaction body. The condition code set by
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the tbegin instruction is returned as integer value. The tbegin
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instruction by definition overwrites the content of all FPRs. The
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compiler will generate code which saves and restores the FPRs. For
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soft-float code it is recommended to used the <code>*_nofloat</code>
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variant. In order to prevent a TDB from being written it is required
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to pass a constant zero value as parameter. Passing a zero value
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through a variable is not sufficient. Although modifications of
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access registers inside the transaction will not trigger an
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transaction abort it is not supported to actually modify them. Access
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registers do not get saved when entering a transaction. They will have
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undefined state when reaching the abort code.
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</p></dd></dl>
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<p>Macros for the possible return codes of tbegin are defined in the
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<code>htmintrin.h</code> header file:
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</p>
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<dl compact="compact">
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<dt><code>_HTM_TBEGIN_STARTED</code></dt>
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<dd><p><code>tbegin</code> has been executed as part of normal processing. The
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transaction body is supposed to be executed.
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</p></dd>
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<dt><code>_HTM_TBEGIN_INDETERMINATE</code></dt>
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<dd><p>The transaction was aborted due to an indeterminate condition which
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might be persistent.
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</p></dd>
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<dt><code>_HTM_TBEGIN_TRANSIENT</code></dt>
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<dd><p>The transaction aborted due to a transient failure. The transaction
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should be re-executed in that case.
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</p></dd>
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<dt><code>_HTM_TBEGIN_PERSISTENT</code></dt>
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<dd><p>The transaction aborted due to a persistent failure. Re-execution
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under same circumstances will not be productive.
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</p></dd>
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</dl>
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<dl>
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<dt><a name="index-_005fHTM_005fFIRST_005fUSER_005fABORT_005fCODE"></a>Macro: <strong>_HTM_FIRST_USER_ABORT_CODE</strong></dt>
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<dd><p>The <code>_HTM_FIRST_USER_ABORT_CODE</code> defined in <code>htmintrin.h</code>
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specifies the first abort code which can be used for
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<code>__builtin_tabort</code>. Values below this threshold are reserved for
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machine use.
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</p></dd></dl>
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<dl>
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<dt><a name="index-struct-_005f_005fhtm_005ftdb"></a>Data type: <strong>struct __htm_tdb</strong></dt>
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<dd><p>The <code>struct __htm_tdb</code> defined in <code>htmintrin.h</code> describes
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the structure of the transaction diagnostic block as specified in the
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Principles of Operation manual chapter 5-91.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftbegin_005fnofloat"></a>Built-in Function: <em>int</em> <strong>__builtin_tbegin_nofloat</strong> <em>(void*)</em></dt>
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<dd><p>Same as <code>__builtin_tbegin</code> but without FPR saves and restores.
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Using this variant in code making use of FPRs will leave the FPRs in
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undefined state when entering the transaction abort handler code.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftbegin_005fretry"></a>Built-in Function: <em>int</em> <strong>__builtin_tbegin_retry</strong> <em>(void*, int)</em></dt>
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<dd><p>In addition to <code>__builtin_tbegin</code> a loop for transient failures
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is generated. If tbegin returns a condition code of 2 the transaction
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will be retried as often as specified in the second argument. The
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perform processor assist instruction is used to tell the CPU about the
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number of fails so far.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftbegin_005fretry_005fnofloat"></a>Built-in Function: <em>int</em> <strong>__builtin_tbegin_retry_nofloat</strong> <em>(void*, int)</em></dt>
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<dd><p>Same as <code>__builtin_tbegin_retry</code> but without FPR saves and
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restores. Using this variant in code making use of FPRs will leave
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the FPRs in undefined state when entering the transaction abort
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handler code.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftbeginc"></a>Built-in Function: <em>void</em> <strong>__builtin_tbeginc</strong> <em>(void)</em></dt>
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<dd><p>Generates the <code>tbeginc</code> machine instruction starting a constrained
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hardware transaction. The second operand is set to <code>0xff08</code>.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftend"></a>Built-in Function: <em>int</em> <strong>__builtin_tend</strong> <em>(void)</em></dt>
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<dd><p>Generates the <code>tend</code> machine instruction finishing a transaction
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and making the changes visible to other threads. The condition code
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generated by tend is returned as integer value.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftabort"></a>Built-in Function: <em>void</em> <strong>__builtin_tabort</strong> <em>(int)</em></dt>
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<dd><p>Generates the <code>tabort</code> machine instruction with the specified
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abort code. Abort codes from 0 through 255 are reserved and will
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result in an error message.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftx_005fassist"></a>Built-in Function: <em>void</em> <strong>__builtin_tx_assist</strong> <em>(int)</em></dt>
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<dd><p>Generates the <code>ppa rX,rY,1</code> machine instruction. Where the
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integer parameter is loaded into rX and a value of zero is loaded into
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rY. The integer parameter specifies the number of times the
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transaction repeatedly aborted.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005ftx_005fnesting_005fdepth"></a>Built-in Function: <em>int</em> <strong>__builtin_tx_nesting_depth</strong> <em>(void)</em></dt>
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<dd><p>Generates the <code>etnd</code> machine instruction. The current nesting
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depth is returned as integer value. For a nesting depth of 0 the code
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is not executed as part of an transaction.
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</p></dd></dl>
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<dl>
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<dt><a name="index-_005f_005fbuiltin_005fnon_005ftx_005fstore"></a>Built-in Function: <em>void</em> <strong>__builtin_non_tx_store</strong> <em>(uint64_t *, uint64_t)</em></dt>
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<dd>
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<p>Generates the <code>ntstg</code> machine instruction. The second argument
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is written to the first arguments location. The store operation will
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not be rolled-back in case of an transaction abort.
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</p></dd></dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="SH-Built_002din-Functions.html#SH-Built_002din-Functions" accesskey="n" rel="next">SH Built-in Functions</a>, Previous: <a href="RX-Built_002din-Functions.html#RX-Built_002din-Functions" accesskey="p" rel="prev">RX Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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