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<a name="S12Z_002dSyntax"></a>
<div class="header">
<p>
Next: <a href="S12Z_002dDirectives.html#S12Z_002dDirectives" accesskey="n" rel="next">S12Z-Directives</a>, Previous: <a href="S12Z_002dOpts.html#S12Z_002dOpts" accesskey="p" rel="prev">S12Z-Opts</a>, Up: <a href="S12Z_002dDependent.html#S12Z_002dDependent" accesskey="u" rel="up">S12Z-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Syntax-18"></a>
<h4 class="subsection">9.23.2 Syntax</h4>
<a name="index-S12Z-syntax"></a>
<a name="index-syntax_002c-S12Z"></a>
<p>In the S12Z syntax, the instruction name comes first and it may
be followed by one or by several operands.
In most cases the maximum number of operands is three.
Some instructions accept and (in certain situations require) a suffix
indicating the size of the operand.
The suffix is separated from the instruction name by a period (&lsquo;<samp>.</samp>&rsquo;)
and may be one of &lsquo;<samp>b</samp>&rsquo;, &lsquo;<samp>w</samp>&rsquo;, &lsquo;<samp>p</samp>&rsquo; or &lsquo;<samp>l</samp>&rsquo; indicating
&lsquo;byte&rsquo; (a single byte), &lsquo;word&rsquo; (2 bytes), &lsquo;pointer&rsquo; (3 bytes) or &lsquo;long&rsquo; (4 bytes)
respectively.
Operands are separated by a comma (&lsquo;<samp>,</samp>&rsquo;).
A comma however does not act as a separator if it appears within parentheses
(&lsquo;<samp>()</samp>&rsquo;) or within square brackets (&lsquo;<samp>[]</samp>&rsquo;).
<code>as</code> will complain if too many, too few or inappropriate operands
are specified for a given instruction.
The MRI mode is not supported for this architecture.
Example:
</p>
<div class="smallexample">
<pre class="smallexample"> bset.b 0xA98, #5
mov.b #6, 0x2409
ld d0, #4
mov.l (d0, x), 0x2409
inc d0
cmp d0, #12
blt *-4
lea x, 0x2409
st y, (1, x)
</pre></div>
<a name="index-line-comment-character_002c-S12Z"></a>
<a name="index-S12Z-line-comment-character"></a>
<p>The presence of a &lsquo;<samp>;</samp>&rsquo; character anywhere
on a line indicates the start of a comment that extends to the end of
that line.
</p>
<p>A &lsquo;<samp>*</samp>&rsquo; or a &lsquo;<samp>#</samp>&rsquo; character at the start of a line also
introduces a line comment, but these characters do not work elsewhere
on the line. If the first character of the line is a &lsquo;<samp>#</samp>&rsquo; then as
well as starting a comment, the line could also be logical line number
directive (see <a href="Comments.html#Comments">Comments</a>) or a preprocessor control command
(see <a href="Preprocessing.html#Preprocessing">Preprocessing</a>).
</p>
<a name="index-line-separator_002c-S12Z"></a>
<a name="index-statement-separator_002c-S12Z"></a>
<a name="index-S12Z-line-separator"></a>
<p>The S12Z assembler does not currently support a line separator
character.
</p>
<a name="index-S12Z-addressing-modes"></a>
<a name="index-addressing-modes_002c-S12Z"></a>
<p>The following addressing modes are understood for the S12Z.
</p><dl compact="compact">
<dt><em>Immediate</em></dt>
<dd><p>&lsquo;<samp>#<var>number</var></samp>&rsquo;
</p>
</dd>
<dt><em>Immediate Bit Field</em></dt>
<dd><p>&lsquo;<samp>#<var>width</var>:<var>offset</var></samp>&rsquo;
</p>
<p>Bit field instructions in the immediate mode require the width and offset to
be specified.
The <var>width</var> pararmeter specifies the number of bits in the field.
It should be a number in the range [1,32].
<var>Offset</var> determines the position within the field where the operation
should start.
It should be a number in the range [0,31].
</p>
</dd>
<dt><em>Relative</em></dt>
<dd><p>&lsquo;<samp>*<var>symbol</var></samp>&rsquo;, or &lsquo;<samp>*[+-]<var>digits</var></samp>&rsquo;
</p>
<p>Program counter relative addresses have a width of 15 bits.
Thus, they must be within the range [-32768, 32767].
</p>
</dd>
<dt><em>Register</em></dt>
<dd><p>&lsquo;<samp><var>reg</var></samp>&rsquo;
</p>
<p>Some instructions accept a register as an operand.
In general, <var>reg</var> may be a data register (&lsquo;<samp>D0</samp>&rsquo;, &lsquo;<samp>D1</samp>&rsquo; &hellip;
&lsquo;<samp>D7</samp>&rsquo;), the <var>X</var> register or the <var>Y</var> register.
</p>
<p>A few instructions accept as an argument the stack pointer
register (&lsquo;<samp>S</samp>&rsquo;), and/or the program counter (&lsquo;<samp>P</samp>&rsquo;).
</p>
<p>Some very special instructions accept arguments which refer to the
condition code register. For these arguments the syntax is
&lsquo;<samp>CCR</samp>&rsquo;, &lsquo;<samp>CCH</samp>&rsquo; or &lsquo;<samp>CCL</samp>&rsquo; which refer to the complete condition code register, the condition code register high byte and the condition code register low byte respectively.
</p>
</dd>
<dt><em>Absolute Direct</em></dt>
<dd><p>&lsquo;<samp><var>symbol</var></samp>&rsquo;, or &lsquo;<samp><var>digits</var></samp>&rsquo;
</p>
</dd>
<dt><em>Absolute Indirect</em></dt>
<dd><p>&lsquo;<samp>[<var>symbol</var></samp>&rsquo;, or &lsquo;<samp><var>digits</var>]</samp>&rsquo;
</p>
</dd>
<dt><em>Constant Offset Indexed</em></dt>
<dd><p>&lsquo;<samp>(<var>number</var>,<var>reg</var>)</samp>&rsquo;
</p>
<p><var>Reg</var> may be either &lsquo;<samp>X</samp>&rsquo;, &lsquo;<samp>Y</samp>&rsquo;, &lsquo;<samp>S</samp>&rsquo; or
&lsquo;<samp>P</samp>&rsquo; or one of the data registers &lsquo;<samp>D0</samp>&rsquo;, &lsquo;<samp>D1</samp>&rsquo; &hellip;
&lsquo;<samp>D7</samp>&rsquo;.
If any of the registers &lsquo;<samp>D2</samp>&rsquo; &hellip; &lsquo;<samp>D5</samp>&rsquo; are specified, then the
register value is treated as a signed value.
Otherwise it is treated as unsigned.
<var>Number</var> may be any integer in the range [-8388608,8388607].
</p>
</dd>
<dt><em>Offset Indexed Indirect</em></dt>
<dd><p>&lsquo;<samp>[<var>number</var>,<var>reg</var>]</samp>&rsquo;
</p>
<p><var>Reg</var> may be either &lsquo;<samp>X</samp>&rsquo;, &lsquo;<samp>Y</samp>&rsquo;, &lsquo;<samp>S</samp>&rsquo; or
&lsquo;<samp>P</samp>&rsquo;.
<var>Number</var> may be any integer in the range [-8388608,8388607].
</p>
</dd>
<dt><em>Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement</em></dt>
<dd><p>&lsquo;<samp>-<var>reg</var></samp>&rsquo;,
&lsquo;<samp>+<var>reg</var></samp>&rsquo;,
&lsquo;<samp><var>reg</var>-</samp>&rsquo; or
&lsquo;<samp><var>reg</var>+</samp>&rsquo;
</p>
<p>This addressing mode is typically used to access a value at an address,
and simultaneously to increment/decrement the register pointing to that
address.
Thus <var>reg</var> may be any of the 24 bit registers &lsquo;<samp>X</samp>&rsquo;, &lsquo;<samp>Y</samp>&rsquo;, or
&lsquo;<samp>S</samp>&rsquo;.
Pre-increment and post-decrement are not available for
register &lsquo;<samp>S</samp>&rsquo; (only post-increment and pre-decrement are available).
</p>
</dd>
<dt><em>Register Offset Direct</em></dt>
<dd><p>&lsquo;<samp>(<var>data-reg</var>,<var>reg</var>)</samp>&rsquo;
</p>
<p><var>Reg</var> can be either &lsquo;<samp>X</samp>&rsquo;, &lsquo;<samp>Y</samp>&rsquo;, or &lsquo;<samp>S</samp>&rsquo;.
<var>Data-reg</var>
must be one of the data registers &lsquo;<samp>D0</samp>&rsquo;, &lsquo;<samp>D1</samp>&rsquo; &hellip; &lsquo;<samp>D7</samp>&rsquo;.
If any of the registers &lsquo;<samp>D2</samp>&rsquo; &hellip; &lsquo;<samp>D5</samp>&rsquo; are specified, then
the register value is treated as a signed value.
Otherwise it is treated as unsigned.
</p>
</dd>
<dt><em>Register Offset Indirect</em></dt>
<dd><p>&lsquo;<samp>[<var>data-reg</var>,<var>reg</var>]</samp>&rsquo;
</p>
<p><var>Reg</var> can be either &lsquo;<samp>X</samp>&rsquo; or &lsquo;<samp>Y</samp>&rsquo;.
<var>Data-reg</var>
must be one of the data registers &lsquo;<samp>D0</samp>&rsquo;, &lsquo;<samp>D1</samp>&rsquo; &hellip; &lsquo;<samp>D7</samp>&rsquo;.
If any of the registers &lsquo;<samp>D2</samp>&rsquo; &hellip; &lsquo;<samp>D5</samp>&rsquo; are specified, then
the register value is treated as a signed value.
Otherwise it is treated as unsigned.
</p>
</dd>
</dl>
<p>For example:
</p>
<div class="smallexample">
<pre class="smallexample"> trap #197
bra *+49
bra .L0
jmp 0xFE0034
jmp [0xFD0012]
inc.b (4,x)
dec.w [4,y]
clr.p (-s)
neg.l (d0, s)
com.b [d1, x]
jsr (45, d0)
psh cch
</pre></div>
<hr>
<div class="header">
<p>
Next: <a href="S12Z_002dDirectives.html#S12Z_002dDirectives" accesskey="n" rel="next">S12Z-Directives</a>, Previous: <a href="S12Z_002dOpts.html#S12Z_002dOpts" accesskey="p" rel="prev">S12Z-Opts</a>, Up: <a href="S12Z_002dDependent.html#S12Z_002dDependent" accesskey="u" rel="up">S12Z-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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