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143 lines
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143 lines
6.1 KiB
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4 years ago
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<title>x86 transactional memory intrinsics - Using the GNU Compiler Collection (GCC)</title>
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<div class="node">
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<a name="x86-transactional-memory-intrinsics"></a>
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<p>
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Previous: <a rel="previous" accesskey="p" href="x86-Built_002din-Functions.html#x86-Built_002din-Functions">x86 Built-in Functions</a>,
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Up: <a rel="up" accesskey="u" href="Target-Builtins.html#Target-Builtins">Target Builtins</a>
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<hr>
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</div>
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<h4 class="subsection">6.58.31 x86 Transactional Memory Intrinsics</h4>
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<p>These hardware transactional memory intrinsics for x86 allow you to use
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memory transactions with RTM (Restricted Transactional Memory).
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This support is enabled with the <samp><span class="option">-mrtm</span></samp> option.
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For using HLE (Hardware Lock Elision) see
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<a href="x86-specific-memory-model-extensions-for-transactional-memory.html#x86-specific-memory-model-extensions-for-transactional-memory">x86 specific memory model extensions for transactional memory</a> instead.
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<p>A memory transaction commits all changes to memory in an atomic way,
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as visible to other threads. If the transaction fails it is rolled back
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and all side effects discarded.
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<p>Generally there is no guarantee that a memory transaction ever succeeds
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and suitable fallback code always needs to be supplied.
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<div class="defun">
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— RTM Function: unsigned <b>_xbegin</b> ()<var><a name="index-g_t_005fxbegin-4151"></a></var><br>
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<blockquote><p>Start a RTM (Restricted Transactional Memory) transaction.
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Returns <code>_XBEGIN_STARTED</code> when the transaction
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started successfully (note this is not 0, so the constant has to be
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explicitly tested).
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<p>If the transaction aborts, all side-effects
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are undone and an abort code encoded as a bit mask is returned.
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The following macros are defined:
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<dl>
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<dt><code>_XABORT_EXPLICIT</code><dd>Transaction was explicitly aborted with <code>_xabort</code>. The parameter passed
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to <code>_xabort</code> is available with <code>_XABORT_CODE(status)</code>.
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<br><dt><code>_XABORT_RETRY</code><dd>Transaction retry is possible.
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<br><dt><code>_XABORT_CONFLICT</code><dd>Transaction abort due to a memory conflict with another thread.
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<br><dt><code>_XABORT_CAPACITY</code><dd>Transaction abort due to the transaction using too much memory.
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<br><dt><code>_XABORT_DEBUG</code><dd>Transaction abort due to a debug trap.
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<br><dt><code>_XABORT_NESTED</code><dd>Transaction abort in an inner nested transaction.
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</dl>
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<p>There is no guarantee
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any transaction ever succeeds, so there always needs to be a valid
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fallback path.
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</p></blockquote></div>
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<div class="defun">
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— RTM Function: void <b>_xend</b> ()<var><a name="index-g_t_005fxend-4152"></a></var><br>
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<blockquote><p>Commit the current transaction. When no transaction is active this faults.
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All memory side-effects of the transaction become visible
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to other threads in an atomic manner.
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</p></blockquote></div>
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<div class="defun">
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— RTM Function: int <b>_xtest</b> ()<var><a name="index-g_t_005fxtest-4153"></a></var><br>
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<blockquote><p>Return a nonzero value if a transaction is currently active, otherwise 0.
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</p></blockquote></div>
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<div class="defun">
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— RTM Function: void <b>_xabort</b> (<var>status</var>)<var><a name="index-g_t_005fxabort-4154"></a></var><br>
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<blockquote><p>Abort the current transaction. When no transaction is active this is a no-op.
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The <var>status</var> is an 8-bit constant; its value is encoded in the return
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value from <code>_xbegin</code>.
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</p></blockquote></div>
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<p>Here is an example showing handling for <code>_XABORT_RETRY</code>
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and a fallback path for other failures:
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<pre class="smallexample"> #include <immintrin.h>
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int n_tries, max_tries;
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unsigned status = _XABORT_EXPLICIT;
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...
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for (n_tries = 0; n_tries < max_tries; n_tries++)
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{
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status = _xbegin ();
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if (status == _XBEGIN_STARTED || !(status & _XABORT_RETRY))
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break;
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}
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if (status == _XBEGIN_STARTED)
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{
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... transaction code...
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_xend ();
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}
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else
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{
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... non-transactional fallback path...
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}
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</pre>
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<p class="noindent">Note that, in most cases, the transactional and non-transactional code
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must synchronize together to ensure consistency.
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