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789 lines
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789 lines
122 KiB
HTML
4 years ago
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/supc.h File Reference</title>
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<div id="projectname">SAME54P20A Test Project
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<div id="nav-path" class="navpath">
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<ul>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
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<div class="header">
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<div class="summary">
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<a href="#nested-classes">Data Structures</a> |
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<a href="#define-members">Macros</a> </div>
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<div class="headertitle">
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<div class="title">supc.h File Reference</div> </div>
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<div class="contents">
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<p>Component description for SUPC.
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<a href="#details">More...</a></p>
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<p><a href="component_2supc_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__INTENCLR__Type.html">SUPC_INTENCLR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__INTENSET__Type.html">SUPC_INTENSET_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__INTFLAG__Type.html">SUPC_INTFLAG_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__STATUS__Type.html">SUPC_STATUS_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__BOD33__Type.html">SUPC_BOD33_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__VREG__Type.html">SUPC_VREG_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__VREF__Type.html">SUPC_VREF_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__BBPS__Type.html">SUPC_BBPS_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__BKOUT__Type.html">SUPC_BKOUT_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionSUPC__BKIN__Type.html">SUPC_BKIN_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structSupc.html">Supc</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">SUPC hardware registers. <a href="structSupc.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a3bc69c33dc95f7ee74c0cf0edc2586be"><td class="memItemLeft" align="right" valign="top"><a id="a3bc69c33dc95f7ee74c0cf0edc2586be"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_U2407</b></td></tr>
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<tr class="separator:a3bc69c33dc95f7ee74c0cf0edc2586be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea0564089f160af52b58fe11aea0a7e4"><td class="memItemLeft" align="right" valign="top"><a id="aea0564089f160af52b58fe11aea0a7e4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>REV_SUPC</b>   0x110</td></tr>
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<tr class="separator:aea0564089f160af52b58fe11aea0a7e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a862c0a414e75785fcadd029c283721b9"><td class="memItemLeft" align="right" valign="top"><a id="a862c0a414e75785fcadd029c283721b9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a862c0a414e75785fcadd029c283721b9">SUPC_INTENCLR_OFFSET</a>   0x00</td></tr>
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<tr class="memdesc:a862c0a414e75785fcadd029c283721b9"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a862c0a414e75785fcadd029c283721b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab643753c16be95790e1c97f36a2d00f2"><td class="memItemLeft" align="right" valign="top"><a id="ab643753c16be95790e1c97f36a2d00f2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ab643753c16be95790e1c97f36a2d00f2">SUPC_INTENCLR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ab643753c16be95790e1c97f36a2d00f2"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:ab643753c16be95790e1c97f36a2d00f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a954d19abdcfd11670af385240501a3f9"><td class="memItemLeft" align="right" valign="top"><a id="a954d19abdcfd11670af385240501a3f9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a954d19abdcfd11670af385240501a3f9">SUPC_INTENCLR_BOD33RDY_Pos</a>   0</td></tr>
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<tr class="memdesc:a954d19abdcfd11670af385240501a3f9"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR) BOD33 Ready <br /></td></tr>
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<tr class="separator:a954d19abdcfd11670af385240501a3f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b8d4b2d67e301bfafdc1654f2b2b4b1"><td class="memItemLeft" align="right" valign="top"><a id="a3b8d4b2d67e301bfafdc1654f2b2b4b1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENCLR_BOD33RDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a954d19abdcfd11670af385240501a3f9">SUPC_INTENCLR_BOD33RDY_Pos</a>)</td></tr>
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<tr class="separator:a3b8d4b2d67e301bfafdc1654f2b2b4b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4d834c9e64f232b72df54e3c57a1e856"><td class="memItemLeft" align="right" valign="top"><a id="a4d834c9e64f232b72df54e3c57a1e856"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a4d834c9e64f232b72df54e3c57a1e856">SUPC_INTENCLR_BOD33DET_Pos</a>   1</td></tr>
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<tr class="memdesc:a4d834c9e64f232b72df54e3c57a1e856"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR) BOD33 Detection <br /></td></tr>
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<tr class="separator:a4d834c9e64f232b72df54e3c57a1e856"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2815d22f9e264a700d2cd9788beec488"><td class="memItemLeft" align="right" valign="top"><a id="a2815d22f9e264a700d2cd9788beec488"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENCLR_BOD33DET</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a4d834c9e64f232b72df54e3c57a1e856">SUPC_INTENCLR_BOD33DET_Pos</a>)</td></tr>
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<tr class="separator:a2815d22f9e264a700d2cd9788beec488"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afd5b33166fc69676fd0792359ee79f79"><td class="memItemLeft" align="right" valign="top"><a id="afd5b33166fc69676fd0792359ee79f79"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#afd5b33166fc69676fd0792359ee79f79">SUPC_INTENCLR_B33SRDY_Pos</a>   2</td></tr>
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<tr class="memdesc:afd5b33166fc69676fd0792359ee79f79"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR) BOD33 Synchronization Ready <br /></td></tr>
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<tr class="separator:afd5b33166fc69676fd0792359ee79f79"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:accd875af2e17b06e61a90c0d2d27118d"><td class="memItemLeft" align="right" valign="top"><a id="accd875af2e17b06e61a90c0d2d27118d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENCLR_B33SRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#afd5b33166fc69676fd0792359ee79f79">SUPC_INTENCLR_B33SRDY_Pos</a>)</td></tr>
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<tr class="separator:accd875af2e17b06e61a90c0d2d27118d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acd94ac4558ec49e0fff41f22ae82d121"><td class="memItemLeft" align="right" valign="top"><a id="acd94ac4558ec49e0fff41f22ae82d121"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#acd94ac4558ec49e0fff41f22ae82d121">SUPC_INTENCLR_VREGRDY_Pos</a>   8</td></tr>
|
||
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<tr class="memdesc:acd94ac4558ec49e0fff41f22ae82d121"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR) Voltage Regulator Ready <br /></td></tr>
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<tr class="separator:acd94ac4558ec49e0fff41f22ae82d121"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a72e7479dfd0b00ff145739a39daf0b2c"><td class="memItemLeft" align="right" valign="top"><a id="a72e7479dfd0b00ff145739a39daf0b2c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENCLR_VREGRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#acd94ac4558ec49e0fff41f22ae82d121">SUPC_INTENCLR_VREGRDY_Pos</a>)</td></tr>
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<tr class="separator:a72e7479dfd0b00ff145739a39daf0b2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c8604b4d2609d6b82ea0a6b230cc09a"><td class="memItemLeft" align="right" valign="top"><a id="a8c8604b4d2609d6b82ea0a6b230cc09a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a8c8604b4d2609d6b82ea0a6b230cc09a">SUPC_INTENCLR_VCORERDY_Pos</a>   10</td></tr>
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<tr class="memdesc:a8c8604b4d2609d6b82ea0a6b230cc09a"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR) VDDCORE Ready <br /></td></tr>
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<tr class="separator:a8c8604b4d2609d6b82ea0a6b230cc09a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a370f2074aa3fe3f4529cf5bbc83711b2"><td class="memItemLeft" align="right" valign="top"><a id="a370f2074aa3fe3f4529cf5bbc83711b2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENCLR_VCORERDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a8c8604b4d2609d6b82ea0a6b230cc09a">SUPC_INTENCLR_VCORERDY_Pos</a>)</td></tr>
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<tr class="memitem:a06458e4ed63f79761f95064da8896f5b"><td class="memItemLeft" align="right" valign="top"><a id="a06458e4ed63f79761f95064da8896f5b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a06458e4ed63f79761f95064da8896f5b">SUPC_INTENCLR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000507)</td></tr>
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<tr class="memdesc:a06458e4ed63f79761f95064da8896f5b"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENCLR) MASK Register <br /></td></tr>
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<tr class="memitem:ac6edb7e9d646fce1d152b001eb7c3498"><td class="memItemLeft" align="right" valign="top"><a id="ac6edb7e9d646fce1d152b001eb7c3498"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ac6edb7e9d646fce1d152b001eb7c3498">SUPC_INTENSET_OFFSET</a>   0x04</td></tr>
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<tr class="memdesc:ac6edb7e9d646fce1d152b001eb7c3498"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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<tr class="memitem:ade21ffefb957ba393b2251437347bd30"><td class="memItemLeft" align="right" valign="top"><a id="ade21ffefb957ba393b2251437347bd30"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ade21ffefb957ba393b2251437347bd30">SUPC_INTENSET_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ade21ffefb957ba393b2251437347bd30"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:ade21ffefb957ba393b2251437347bd30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac69cfc3d29da8df911624bea5c6ab276"><td class="memItemLeft" align="right" valign="top"><a id="ac69cfc3d29da8df911624bea5c6ab276"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ac69cfc3d29da8df911624bea5c6ab276">SUPC_INTENSET_BOD33RDY_Pos</a>   0</td></tr>
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<tr class="memdesc:ac69cfc3d29da8df911624bea5c6ab276"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET) BOD33 Ready <br /></td></tr>
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<tr class="separator:ac69cfc3d29da8df911624bea5c6ab276"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1d2bc4dfde491e5a98c28a08dc4f8ec0"><td class="memItemLeft" align="right" valign="top"><a id="a1d2bc4dfde491e5a98c28a08dc4f8ec0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENSET_BOD33RDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#ac69cfc3d29da8df911624bea5c6ab276">SUPC_INTENSET_BOD33RDY_Pos</a>)</td></tr>
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<tr class="separator:a1d2bc4dfde491e5a98c28a08dc4f8ec0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6217695225807518cf2378fae92dcf6d"><td class="memItemLeft" align="right" valign="top"><a id="a6217695225807518cf2378fae92dcf6d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a6217695225807518cf2378fae92dcf6d">SUPC_INTENSET_BOD33DET_Pos</a>   1</td></tr>
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<tr class="memdesc:a6217695225807518cf2378fae92dcf6d"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET) BOD33 Detection <br /></td></tr>
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<tr class="separator:a6217695225807518cf2378fae92dcf6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a11c1660310dc76a7f0139f670d0645c5"><td class="memItemLeft" align="right" valign="top"><a id="a11c1660310dc76a7f0139f670d0645c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENSET_BOD33DET</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a6217695225807518cf2378fae92dcf6d">SUPC_INTENSET_BOD33DET_Pos</a>)</td></tr>
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<tr class="separator:a11c1660310dc76a7f0139f670d0645c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab709d13b11235927bc34d9b00ad23b9"><td class="memItemLeft" align="right" valign="top"><a id="aab709d13b11235927bc34d9b00ad23b9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aab709d13b11235927bc34d9b00ad23b9">SUPC_INTENSET_B33SRDY_Pos</a>   2</td></tr>
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<tr class="memdesc:aab709d13b11235927bc34d9b00ad23b9"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET) BOD33 Synchronization Ready <br /></td></tr>
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<tr class="separator:aab709d13b11235927bc34d9b00ad23b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4cba093130f6444af129216443472c8e"><td class="memItemLeft" align="right" valign="top"><a id="a4cba093130f6444af129216443472c8e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENSET_B33SRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#aab709d13b11235927bc34d9b00ad23b9">SUPC_INTENSET_B33SRDY_Pos</a>)</td></tr>
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<tr class="separator:a4cba093130f6444af129216443472c8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00dc8c27e11d3e23195aeb5ad0fe2ec5"><td class="memItemLeft" align="right" valign="top"><a id="a00dc8c27e11d3e23195aeb5ad0fe2ec5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a00dc8c27e11d3e23195aeb5ad0fe2ec5">SUPC_INTENSET_VREGRDY_Pos</a>   8</td></tr>
|
||
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<tr class="memdesc:a00dc8c27e11d3e23195aeb5ad0fe2ec5"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET) Voltage Regulator Ready <br /></td></tr>
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<tr class="separator:a00dc8c27e11d3e23195aeb5ad0fe2ec5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa98a8f5d4305943d118c13b42e236f16"><td class="memItemLeft" align="right" valign="top"><a id="aa98a8f5d4305943d118c13b42e236f16"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENSET_VREGRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a00dc8c27e11d3e23195aeb5ad0fe2ec5">SUPC_INTENSET_VREGRDY_Pos</a>)</td></tr>
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<tr class="separator:aa98a8f5d4305943d118c13b42e236f16"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5bf08743cfe61bf1be9c16ef7fa1f0d8"><td class="memItemLeft" align="right" valign="top"><a id="a5bf08743cfe61bf1be9c16ef7fa1f0d8"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a5bf08743cfe61bf1be9c16ef7fa1f0d8">SUPC_INTENSET_VCORERDY_Pos</a>   10</td></tr>
|
||
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<tr class="memdesc:a5bf08743cfe61bf1be9c16ef7fa1f0d8"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET) VDDCORE Ready <br /></td></tr>
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<tr class="separator:a5bf08743cfe61bf1be9c16ef7fa1f0d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aedf44a5f4faf98c30b2301a0485546f0"><td class="memItemLeft" align="right" valign="top"><a id="aedf44a5f4faf98c30b2301a0485546f0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTENSET_VCORERDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a5bf08743cfe61bf1be9c16ef7fa1f0d8">SUPC_INTENSET_VCORERDY_Pos</a>)</td></tr>
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<tr class="separator:aedf44a5f4faf98c30b2301a0485546f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac930c399ced8d8461880977b8a0c9ae7"><td class="memItemLeft" align="right" valign="top"><a id="ac930c399ced8d8461880977b8a0c9ae7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ac930c399ced8d8461880977b8a0c9ae7">SUPC_INTENSET_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000507)</td></tr>
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<tr class="memdesc:ac930c399ced8d8461880977b8a0c9ae7"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTENSET) MASK Register <br /></td></tr>
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<tr class="separator:ac930c399ced8d8461880977b8a0c9ae7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4a1936e3961dcf8381f7aefdc7c731e6"><td class="memItemLeft" align="right" valign="top"><a id="a4a1936e3961dcf8381f7aefdc7c731e6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a4a1936e3961dcf8381f7aefdc7c731e6">SUPC_INTFLAG_OFFSET</a>   0x08</td></tr>
|
||
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<tr class="memdesc:a4a1936e3961dcf8381f7aefdc7c731e6"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a4a1936e3961dcf8381f7aefdc7c731e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a60a6836752746b29b54cdc022db491d7"><td class="memItemLeft" align="right" valign="top"><a id="a60a6836752746b29b54cdc022db491d7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a60a6836752746b29b54cdc022db491d7">SUPC_INTFLAG_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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||
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<tr class="memdesc:a60a6836752746b29b54cdc022db491d7"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a60a6836752746b29b54cdc022db491d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af80966801c44d7af52664d4a6f42cb3d"><td class="memItemLeft" align="right" valign="top"><a id="af80966801c44d7af52664d4a6f42cb3d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#af80966801c44d7af52664d4a6f42cb3d">SUPC_INTFLAG_BOD33RDY_Pos</a>   0</td></tr>
|
||
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<tr class="memdesc:af80966801c44d7af52664d4a6f42cb3d"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG) BOD33 Ready <br /></td></tr>
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<tr class="separator:af80966801c44d7af52664d4a6f42cb3d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7cf2f913df94b7cf9c193503922bf268"><td class="memItemLeft" align="right" valign="top"><a id="a7cf2f913df94b7cf9c193503922bf268"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTFLAG_BOD33RDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#af80966801c44d7af52664d4a6f42cb3d">SUPC_INTFLAG_BOD33RDY_Pos</a>)</td></tr>
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<tr class="separator:a7cf2f913df94b7cf9c193503922bf268"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad6a0ea7c9faa1134b7acb761f8ce7f70"><td class="memItemLeft" align="right" valign="top"><a id="ad6a0ea7c9faa1134b7acb761f8ce7f70"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ad6a0ea7c9faa1134b7acb761f8ce7f70">SUPC_INTFLAG_BOD33DET_Pos</a>   1</td></tr>
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||
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<tr class="memdesc:ad6a0ea7c9faa1134b7acb761f8ce7f70"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG) BOD33 Detection <br /></td></tr>
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<tr class="separator:ad6a0ea7c9faa1134b7acb761f8ce7f70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d25686a47446eb2335de6b412d02222"><td class="memItemLeft" align="right" valign="top"><a id="a2d25686a47446eb2335de6b412d02222"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTFLAG_BOD33DET</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#ad6a0ea7c9faa1134b7acb761f8ce7f70">SUPC_INTFLAG_BOD33DET_Pos</a>)</td></tr>
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<tr class="separator:a2d25686a47446eb2335de6b412d02222"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9ba8d2269aee5eaf5767eafc21a25a45"><td class="memItemLeft" align="right" valign="top"><a id="a9ba8d2269aee5eaf5767eafc21a25a45"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a9ba8d2269aee5eaf5767eafc21a25a45">SUPC_INTFLAG_B33SRDY_Pos</a>   2</td></tr>
|
||
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<tr class="memdesc:a9ba8d2269aee5eaf5767eafc21a25a45"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG) BOD33 Synchronization Ready <br /></td></tr>
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||
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<tr class="separator:a9ba8d2269aee5eaf5767eafc21a25a45"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a511f8d67374736e9ec3593da5d715825"><td class="memItemLeft" align="right" valign="top"><a id="a511f8d67374736e9ec3593da5d715825"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTFLAG_B33SRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a9ba8d2269aee5eaf5767eafc21a25a45">SUPC_INTFLAG_B33SRDY_Pos</a>)</td></tr>
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<tr class="separator:a511f8d67374736e9ec3593da5d715825"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a21172349ab663fd4936c424e182852c4"><td class="memItemLeft" align="right" valign="top"><a id="a21172349ab663fd4936c424e182852c4"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a21172349ab663fd4936c424e182852c4">SUPC_INTFLAG_VREGRDY_Pos</a>   8</td></tr>
|
||
|
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<tr class="memdesc:a21172349ab663fd4936c424e182852c4"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG) Voltage Regulator Ready <br /></td></tr>
|
||
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<tr class="separator:a21172349ab663fd4936c424e182852c4"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:abff73db59e317d2d7df11152b80643a0"><td class="memItemLeft" align="right" valign="top"><a id="abff73db59e317d2d7df11152b80643a0"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTFLAG_VREGRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a21172349ab663fd4936c424e182852c4">SUPC_INTFLAG_VREGRDY_Pos</a>)</td></tr>
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<tr class="separator:abff73db59e317d2d7df11152b80643a0"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:aaeba608dacc3c599875844b88ba14df5"><td class="memItemLeft" align="right" valign="top"><a id="aaeba608dacc3c599875844b88ba14df5"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aaeba608dacc3c599875844b88ba14df5">SUPC_INTFLAG_VCORERDY_Pos</a>   10</td></tr>
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||
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<tr class="memdesc:aaeba608dacc3c599875844b88ba14df5"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG) VDDCORE Ready <br /></td></tr>
|
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<tr class="separator:aaeba608dacc3c599875844b88ba14df5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea99bb490d53060e92d7e2d3301a03ff"><td class="memItemLeft" align="right" valign="top"><a id="aea99bb490d53060e92d7e2d3301a03ff"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_INTFLAG_VCORERDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#aaeba608dacc3c599875844b88ba14df5">SUPC_INTFLAG_VCORERDY_Pos</a>)</td></tr>
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<tr class="memitem:a051957abcc7254347a25132c1e090521"><td class="memItemLeft" align="right" valign="top"><a id="a051957abcc7254347a25132c1e090521"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a051957abcc7254347a25132c1e090521">SUPC_INTFLAG_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000507)</td></tr>
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<tr class="memdesc:a051957abcc7254347a25132c1e090521"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_INTFLAG) MASK Register <br /></td></tr>
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<tr class="separator:a051957abcc7254347a25132c1e090521"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4617aca8bde40b6eb9b020c5e70e6d60"><td class="memItemLeft" align="right" valign="top"><a id="a4617aca8bde40b6eb9b020c5e70e6d60"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a4617aca8bde40b6eb9b020c5e70e6d60">SUPC_STATUS_OFFSET</a>   0x0C</td></tr>
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<tr class="memdesc:a4617aca8bde40b6eb9b020c5e70e6d60"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS offset) Power and Clocks Status <br /></td></tr>
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<tr class="separator:a4617aca8bde40b6eb9b020c5e70e6d60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a765bc7bc8c1ca7e33adb522877a83b47"><td class="memItemLeft" align="right" valign="top"><a id="a765bc7bc8c1ca7e33adb522877a83b47"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a765bc7bc8c1ca7e33adb522877a83b47">SUPC_STATUS_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a765bc7bc8c1ca7e33adb522877a83b47"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS reset_value) Power and Clocks Status <br /></td></tr>
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<tr class="separator:a765bc7bc8c1ca7e33adb522877a83b47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af28b8cca5834986d6ad4d40e0dbc65ea"><td class="memItemLeft" align="right" valign="top"><a id="af28b8cca5834986d6ad4d40e0dbc65ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#af28b8cca5834986d6ad4d40e0dbc65ea">SUPC_STATUS_BOD33RDY_Pos</a>   0</td></tr>
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<tr class="memdesc:af28b8cca5834986d6ad4d40e0dbc65ea"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS) BOD33 Ready <br /></td></tr>
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<tr class="separator:af28b8cca5834986d6ad4d40e0dbc65ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac8eebe54b0d54fc3f749aedb8c20523"><td class="memItemLeft" align="right" valign="top"><a id="aac8eebe54b0d54fc3f749aedb8c20523"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_STATUS_BOD33RDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#af28b8cca5834986d6ad4d40e0dbc65ea">SUPC_STATUS_BOD33RDY_Pos</a>)</td></tr>
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<tr class="separator:aac8eebe54b0d54fc3f749aedb8c20523"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a714440cf06994c73315b516b72c45fd3"><td class="memItemLeft" align="right" valign="top"><a id="a714440cf06994c73315b516b72c45fd3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a714440cf06994c73315b516b72c45fd3">SUPC_STATUS_BOD33DET_Pos</a>   1</td></tr>
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<tr class="memdesc:a714440cf06994c73315b516b72c45fd3"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS) BOD33 Detection <br /></td></tr>
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<tr class="separator:a714440cf06994c73315b516b72c45fd3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a567f8f04ec2fbd46c024e22798d7d0f2"><td class="memItemLeft" align="right" valign="top"><a id="a567f8f04ec2fbd46c024e22798d7d0f2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_STATUS_BOD33DET</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a714440cf06994c73315b516b72c45fd3">SUPC_STATUS_BOD33DET_Pos</a>)</td></tr>
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<tr class="separator:a567f8f04ec2fbd46c024e22798d7d0f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a02dfae77377b222f7184a37406bd3ed9"><td class="memItemLeft" align="right" valign="top"><a id="a02dfae77377b222f7184a37406bd3ed9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a02dfae77377b222f7184a37406bd3ed9">SUPC_STATUS_B33SRDY_Pos</a>   2</td></tr>
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<tr class="memdesc:a02dfae77377b222f7184a37406bd3ed9"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS) BOD33 Synchronization Ready <br /></td></tr>
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<tr class="separator:a02dfae77377b222f7184a37406bd3ed9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acdb92ad3d9283b941b94829bf088c039"><td class="memItemLeft" align="right" valign="top"><a id="acdb92ad3d9283b941b94829bf088c039"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_STATUS_B33SRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a02dfae77377b222f7184a37406bd3ed9">SUPC_STATUS_B33SRDY_Pos</a>)</td></tr>
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<tr class="separator:acdb92ad3d9283b941b94829bf088c039"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a450b4ee943dc677770fc3b4553280839"><td class="memItemLeft" align="right" valign="top"><a id="a450b4ee943dc677770fc3b4553280839"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a450b4ee943dc677770fc3b4553280839">SUPC_STATUS_VREGRDY_Pos</a>   8</td></tr>
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<tr class="memdesc:a450b4ee943dc677770fc3b4553280839"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS) Voltage Regulator Ready <br /></td></tr>
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<tr class="separator:a450b4ee943dc677770fc3b4553280839"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4e94d2591081ee6401f74650537b4e96"><td class="memItemLeft" align="right" valign="top"><a id="a4e94d2591081ee6401f74650537b4e96"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_STATUS_VREGRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a450b4ee943dc677770fc3b4553280839">SUPC_STATUS_VREGRDY_Pos</a>)</td></tr>
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<tr class="separator:a4e94d2591081ee6401f74650537b4e96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e2da182cb656e1be25d3f719b006cd4"><td class="memItemLeft" align="right" valign="top"><a id="a9e2da182cb656e1be25d3f719b006cd4"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a9e2da182cb656e1be25d3f719b006cd4">SUPC_STATUS_VCORERDY_Pos</a>   10</td></tr>
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||
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<tr class="memdesc:a9e2da182cb656e1be25d3f719b006cd4"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS) VDDCORE Ready <br /></td></tr>
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<tr class="separator:a9e2da182cb656e1be25d3f719b006cd4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9c94fb0928c147d9c049d23bcee4b41"><td class="memItemLeft" align="right" valign="top"><a id="ae9c94fb0928c147d9c049d23bcee4b41"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_STATUS_VCORERDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a9e2da182cb656e1be25d3f719b006cd4">SUPC_STATUS_VCORERDY_Pos</a>)</td></tr>
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<tr class="separator:ae9c94fb0928c147d9c049d23bcee4b41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acaccc4b9e1b787f7d567610ed042bb68"><td class="memItemLeft" align="right" valign="top"><a id="acaccc4b9e1b787f7d567610ed042bb68"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#acaccc4b9e1b787f7d567610ed042bb68">SUPC_STATUS_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000507)</td></tr>
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||
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<tr class="memdesc:acaccc4b9e1b787f7d567610ed042bb68"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_STATUS) MASK Register <br /></td></tr>
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<tr class="separator:acaccc4b9e1b787f7d567610ed042bb68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a49a799aaafe952446af4eae5679e0444"><td class="memItemLeft" align="right" valign="top"><a id="a49a799aaafe952446af4eae5679e0444"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a49a799aaafe952446af4eae5679e0444">SUPC_BOD33_OFFSET</a>   0x10</td></tr>
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||
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<tr class="memdesc:a49a799aaafe952446af4eae5679e0444"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33 offset) BOD33 Control <br /></td></tr>
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<tr class="separator:a49a799aaafe952446af4eae5679e0444"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aba0a023335662f4a3c7efedb5439c0cd"><td class="memItemLeft" align="right" valign="top"><a id="aba0a023335662f4a3c7efedb5439c0cd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aba0a023335662f4a3c7efedb5439c0cd">SUPC_BOD33_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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||
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<tr class="memdesc:aba0a023335662f4a3c7efedb5439c0cd"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33 reset_value) BOD33 Control <br /></td></tr>
|
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<tr class="separator:aba0a023335662f4a3c7efedb5439c0cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6c2cdcd3f5977215335972b1df0c0f09"><td class="memItemLeft" align="right" valign="top"><a id="a6c2cdcd3f5977215335972b1df0c0f09"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a6c2cdcd3f5977215335972b1df0c0f09">SUPC_BOD33_ENABLE_Pos</a>   1</td></tr>
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<tr class="memdesc:a6c2cdcd3f5977215335972b1df0c0f09"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Enable <br /></td></tr>
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<tr class="separator:a6c2cdcd3f5977215335972b1df0c0f09"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a27e30203e4099f621d7f8b934d18a50b"><td class="memItemLeft" align="right" valign="top"><a id="a27e30203e4099f621d7f8b934d18a50b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a6c2cdcd3f5977215335972b1df0c0f09">SUPC_BOD33_ENABLE_Pos</a>)</td></tr>
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<tr class="separator:a27e30203e4099f621d7f8b934d18a50b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e1dbd232c21c8618d6ee2ea49c093ad"><td class="memItemLeft" align="right" valign="top"><a id="a8e1dbd232c21c8618d6ee2ea49c093ad"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>   2</td></tr>
|
||
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<tr class="memdesc:a8e1dbd232c21c8618d6ee2ea49c093ad"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Action when Threshold Crossed <br /></td></tr>
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<tr class="separator:a8e1dbd232c21c8618d6ee2ea49c093ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a44ce373b3a66b6d4afd392e75d4d8650"><td class="memItemLeft" align="right" valign="top"><a id="a44ce373b3a66b6d4afd392e75d4d8650"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ACTION_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>)</td></tr>
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||
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<tr class="separator:a44ce373b3a66b6d4afd392e75d4d8650"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a8d669801950011ea112f5990a13afe1f"><td class="memItemLeft" align="right" valign="top"><a id="a8d669801950011ea112f5990a13afe1f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ACTION</b>(value)   (SUPC_BOD33_ACTION_Msk & ((value) << <a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>))</td></tr>
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<tr class="separator:a8d669801950011ea112f5990a13afe1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afc3d193080f968fdcb16a5f927097593"><td class="memItemLeft" align="right" valign="top"><a id="afc3d193080f968fdcb16a5f927097593"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#afc3d193080f968fdcb16a5f927097593">SUPC_BOD33_ACTION_NONE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
|
||
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<tr class="memdesc:afc3d193080f968fdcb16a5f927097593"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) No action <br /></td></tr>
|
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<tr class="separator:afc3d193080f968fdcb16a5f927097593"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ab8c0721cf662d300e2a5acb1d517a1d4"><td class="memItemLeft" align="right" valign="top"><a id="ab8c0721cf662d300e2a5acb1d517a1d4"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ab8c0721cf662d300e2a5acb1d517a1d4">SUPC_BOD33_ACTION_RESET_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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||
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<tr class="memdesc:ab8c0721cf662d300e2a5acb1d517a1d4"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) The BOD33 generates a reset <br /></td></tr>
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||
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<tr class="separator:ab8c0721cf662d300e2a5acb1d517a1d4"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a233a44ba6e1e663e692832cf2bb74afe"><td class="memItemLeft" align="right" valign="top"><a id="a233a44ba6e1e663e692832cf2bb74afe"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a233a44ba6e1e663e692832cf2bb74afe">SUPC_BOD33_ACTION_INT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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||
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<tr class="memdesc:a233a44ba6e1e663e692832cf2bb74afe"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) The BOD33 generates an interrupt <br /></td></tr>
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<tr class="separator:a233a44ba6e1e663e692832cf2bb74afe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a154a98779bef7cb80f43330e6d981d1a"><td class="memItemLeft" align="right" valign="top"><a id="a154a98779bef7cb80f43330e6d981d1a"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a154a98779bef7cb80f43330e6d981d1a">SUPC_BOD33_ACTION_BKUP_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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||
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<tr class="memdesc:a154a98779bef7cb80f43330e6d981d1a"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) The BOD33 puts the device in backup sleep mode <br /></td></tr>
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<tr class="memitem:a0e22ab7c5552aaadf0059be505ed5f35"><td class="memItemLeft" align="right" valign="top"><a id="a0e22ab7c5552aaadf0059be505ed5f35"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ACTION_NONE</b>   (<a class="el" href="component_2supc_8h.html#afc3d193080f968fdcb16a5f927097593">SUPC_BOD33_ACTION_NONE_Val</a> << <a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>)</td></tr>
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<tr class="separator:a0e22ab7c5552aaadf0059be505ed5f35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1b2dc8e7ed96216dc1d17d776b67f377"><td class="memItemLeft" align="right" valign="top"><a id="a1b2dc8e7ed96216dc1d17d776b67f377"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ACTION_RESET</b>   (<a class="el" href="component_2supc_8h.html#ab8c0721cf662d300e2a5acb1d517a1d4">SUPC_BOD33_ACTION_RESET_Val</a> << <a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>)</td></tr>
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<tr class="separator:a1b2dc8e7ed96216dc1d17d776b67f377"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9f48e763543d9afd1d38e110681ff4b9"><td class="memItemLeft" align="right" valign="top"><a id="a9f48e763543d9afd1d38e110681ff4b9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ACTION_INT</b>   (<a class="el" href="component_2supc_8h.html#a233a44ba6e1e663e692832cf2bb74afe">SUPC_BOD33_ACTION_INT_Val</a> << <a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>)</td></tr>
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<tr class="separator:a9f48e763543d9afd1d38e110681ff4b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa015886bf61e5cf5a82621ec55436124"><td class="memItemLeft" align="right" valign="top"><a id="aa015886bf61e5cf5a82621ec55436124"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_ACTION_BKUP</b>   (<a class="el" href="component_2supc_8h.html#a154a98779bef7cb80f43330e6d981d1a">SUPC_BOD33_ACTION_BKUP_Val</a> << <a class="el" href="component_2supc_8h.html#a8e1dbd232c21c8618d6ee2ea49c093ad">SUPC_BOD33_ACTION_Pos</a>)</td></tr>
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<tr class="separator:aa015886bf61e5cf5a82621ec55436124"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4a8dff4a124b3db4f0fc4d1278ed6359"><td class="memItemLeft" align="right" valign="top"><a id="a4a8dff4a124b3db4f0fc4d1278ed6359"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a4a8dff4a124b3db4f0fc4d1278ed6359">SUPC_BOD33_STDBYCFG_Pos</a>   4</td></tr>
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<tr class="memdesc:a4a8dff4a124b3db4f0fc4d1278ed6359"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Configuration in Standby mode <br /></td></tr>
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<tr class="separator:a4a8dff4a124b3db4f0fc4d1278ed6359"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aec0339fce1e4f251d81fd8890baea187"><td class="memItemLeft" align="right" valign="top"><a id="aec0339fce1e4f251d81fd8890baea187"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_STDBYCFG</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a4a8dff4a124b3db4f0fc4d1278ed6359">SUPC_BOD33_STDBYCFG_Pos</a>)</td></tr>
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<tr class="separator:aec0339fce1e4f251d81fd8890baea187"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a01cbe9b7d7833fa8ca247b4527ecbde8"><td class="memItemLeft" align="right" valign="top"><a id="a01cbe9b7d7833fa8ca247b4527ecbde8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a01cbe9b7d7833fa8ca247b4527ecbde8">SUPC_BOD33_RUNSTDBY_Pos</a>   5</td></tr>
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<tr class="memdesc:a01cbe9b7d7833fa8ca247b4527ecbde8"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Run in Standby mode <br /></td></tr>
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<tr class="separator:a01cbe9b7d7833fa8ca247b4527ecbde8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa399f45530f8144e9196784e3625de89"><td class="memItemLeft" align="right" valign="top"><a id="aa399f45530f8144e9196784e3625de89"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_RUNSTDBY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a01cbe9b7d7833fa8ca247b4527ecbde8">SUPC_BOD33_RUNSTDBY_Pos</a>)</td></tr>
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<tr class="separator:aa399f45530f8144e9196784e3625de89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad92350a06e56bb9323f6c19b0324c62a"><td class="memItemLeft" align="right" valign="top"><a id="ad92350a06e56bb9323f6c19b0324c62a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ad92350a06e56bb9323f6c19b0324c62a">SUPC_BOD33_RUNHIB_Pos</a>   6</td></tr>
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||
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<tr class="memdesc:ad92350a06e56bb9323f6c19b0324c62a"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Run in Hibernate mode <br /></td></tr>
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<tr class="separator:ad92350a06e56bb9323f6c19b0324c62a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a84f02e3ff766cb684aee793b18ba7b94"><td class="memItemLeft" align="right" valign="top"><a id="a84f02e3ff766cb684aee793b18ba7b94"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_RUNHIB</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#ad92350a06e56bb9323f6c19b0324c62a">SUPC_BOD33_RUNHIB_Pos</a>)</td></tr>
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<tr class="separator:a84f02e3ff766cb684aee793b18ba7b94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a53db2caae11323b5b339d18acc5c9148"><td class="memItemLeft" align="right" valign="top"><a id="a53db2caae11323b5b339d18acc5c9148"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a53db2caae11323b5b339d18acc5c9148">SUPC_BOD33_RUNBKUP_Pos</a>   7</td></tr>
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||
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<tr class="memdesc:a53db2caae11323b5b339d18acc5c9148"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Run in Backup mode <br /></td></tr>
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||
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<tr class="separator:a53db2caae11323b5b339d18acc5c9148"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abec58488eb085062b9cc57f56d3c1718"><td class="memItemLeft" align="right" valign="top"><a id="abec58488eb085062b9cc57f56d3c1718"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_RUNBKUP</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a53db2caae11323b5b339d18acc5c9148">SUPC_BOD33_RUNBKUP_Pos</a>)</td></tr>
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||
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<tr class="separator:abec58488eb085062b9cc57f56d3c1718"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a40994235f4a9f35dbb33c7ff867f432f"><td class="memItemLeft" align="right" valign="top"><a id="a40994235f4a9f35dbb33c7ff867f432f"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a40994235f4a9f35dbb33c7ff867f432f">SUPC_BOD33_HYST_Pos</a>   8</td></tr>
|
||
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<tr class="memdesc:a40994235f4a9f35dbb33c7ff867f432f"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Hysteresis value <br /></td></tr>
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<tr class="separator:a40994235f4a9f35dbb33c7ff867f432f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a279e4d20f1c9cb5da2e37fa7b719c771"><td class="memItemLeft" align="right" valign="top"><a id="a279e4d20f1c9cb5da2e37fa7b719c771"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_HYST_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) << <a class="el" href="component_2supc_8h.html#a40994235f4a9f35dbb33c7ff867f432f">SUPC_BOD33_HYST_Pos</a>)</td></tr>
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<tr class="separator:a279e4d20f1c9cb5da2e37fa7b719c771"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aba540349067ceb293cb6292e330f6910"><td class="memItemLeft" align="right" valign="top"><a id="aba540349067ceb293cb6292e330f6910"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_HYST</b>(value)   (SUPC_BOD33_HYST_Msk & ((value) << <a class="el" href="component_2supc_8h.html#a40994235f4a9f35dbb33c7ff867f432f">SUPC_BOD33_HYST_Pos</a>))</td></tr>
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<tr class="separator:aba540349067ceb293cb6292e330f6910"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a749aed0ecd13c1a62c80e107cfe7e31f"><td class="memItemLeft" align="right" valign="top"><a id="a749aed0ecd13c1a62c80e107cfe7e31f"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>   12</td></tr>
|
||
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<tr class="memdesc:a749aed0ecd13c1a62c80e107cfe7e31f"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Prescaler Select <br /></td></tr>
|
||
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<tr class="separator:a749aed0ecd13c1a62c80e107cfe7e31f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85b0ac36adc71b04e51d744a805bc082"><td class="memItemLeft" align="right" valign="top"><a id="a85b0ac36adc71b04e51d744a805bc082"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="separator:a85b0ac36adc71b04e51d744a805bc082"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a511239a65316a3f195a9dc419e9eff3d"><td class="memItemLeft" align="right" valign="top"><a id="a511239a65316a3f195a9dc419e9eff3d"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL</b>(value)   (SUPC_BOD33_PSEL_Msk & ((value) << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>))</td></tr>
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<tr class="separator:a511239a65316a3f195a9dc419e9eff3d"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a77863b79aa62adf9d220e2719c990a57"><td class="memItemLeft" align="right" valign="top"><a id="a77863b79aa62adf9d220e2719c990a57"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a77863b79aa62adf9d220e2719c990a57">SUPC_BOD33_PSEL_NODIV_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
|
||
|
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<tr class="memdesc:a77863b79aa62adf9d220e2719c990a57"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Not divided <br /></td></tr>
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<tr class="separator:a77863b79aa62adf9d220e2719c990a57"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a296753b7af0e528a1e3cb2bb50795d3b"><td class="memItemLeft" align="right" valign="top"><a id="a296753b7af0e528a1e3cb2bb50795d3b"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a296753b7af0e528a1e3cb2bb50795d3b">SUPC_BOD33_PSEL_DIV4_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
|
||
|
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<tr class="memdesc:a296753b7af0e528a1e3cb2bb50795d3b"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 4 <br /></td></tr>
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||
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<tr class="separator:a296753b7af0e528a1e3cb2bb50795d3b"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:ae1a6fa310bec936ae5cdc61ad935ba08"><td class="memItemLeft" align="right" valign="top"><a id="ae1a6fa310bec936ae5cdc61ad935ba08"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae1a6fa310bec936ae5cdc61ad935ba08">SUPC_BOD33_PSEL_DIV8_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
|
||
|
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<tr class="memdesc:ae1a6fa310bec936ae5cdc61ad935ba08"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 8 <br /></td></tr>
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||
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<tr class="separator:ae1a6fa310bec936ae5cdc61ad935ba08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ad3b22142b28b58c363efc9305f4116e5"><td class="memItemLeft" align="right" valign="top"><a id="ad3b22142b28b58c363efc9305f4116e5"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ad3b22142b28b58c363efc9305f4116e5">SUPC_BOD33_PSEL_DIV16_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
|
||
|
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<tr class="memdesc:ad3b22142b28b58c363efc9305f4116e5"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 16 <br /></td></tr>
|
||
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<tr class="separator:ad3b22142b28b58c363efc9305f4116e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ae457def5029205484b89fc8f2f00f2dd"><td class="memItemLeft" align="right" valign="top"><a id="ae457def5029205484b89fc8f2f00f2dd"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae457def5029205484b89fc8f2f00f2dd">SUPC_BOD33_PSEL_DIV32_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
|
||
|
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<tr class="memdesc:ae457def5029205484b89fc8f2f00f2dd"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 32 <br /></td></tr>
|
||
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<tr class="separator:ae457def5029205484b89fc8f2f00f2dd"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:af0abecaf750f836e619ff4b5b8d3ea25"><td class="memItemLeft" align="right" valign="top"><a id="af0abecaf750f836e619ff4b5b8d3ea25"></a>
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||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#af0abecaf750f836e619ff4b5b8d3ea25">SUPC_BOD33_PSEL_DIV64_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
|
||
|
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<tr class="memdesc:af0abecaf750f836e619ff4b5b8d3ea25"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 64 <br /></td></tr>
|
||
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<tr class="separator:af0abecaf750f836e619ff4b5b8d3ea25"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:ad1c45a9c7423dd4967f6e0f68ee33383"><td class="memItemLeft" align="right" valign="top"><a id="ad1c45a9c7423dd4967f6e0f68ee33383"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ad1c45a9c7423dd4967f6e0f68ee33383">SUPC_BOD33_PSEL_DIV128_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
|
||
|
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<tr class="memdesc:ad1c45a9c7423dd4967f6e0f68ee33383"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 128 <br /></td></tr>
|
||
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<tr class="separator:ad1c45a9c7423dd4967f6e0f68ee33383"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a446e919241877b5edb121c7cd614ba1a"><td class="memItemLeft" align="right" valign="top"><a id="a446e919241877b5edb121c7cd614ba1a"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a446e919241877b5edb121c7cd614ba1a">SUPC_BOD33_PSEL_DIV256_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
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<tr class="memdesc:a446e919241877b5edb121c7cd614ba1a"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Divide clock by 256 <br /></td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_NODIV</b>   (<a class="el" href="component_2supc_8h.html#a77863b79aa62adf9d220e2719c990a57">SUPC_BOD33_PSEL_NODIV_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV4</b>   (<a class="el" href="component_2supc_8h.html#a296753b7af0e528a1e3cb2bb50795d3b">SUPC_BOD33_PSEL_DIV4_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="memitem:a10a35f1eb4e4137220b5c563d79e5fcc"><td class="memItemLeft" align="right" valign="top"><a id="a10a35f1eb4e4137220b5c563d79e5fcc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV8</b>   (<a class="el" href="component_2supc_8h.html#ae1a6fa310bec936ae5cdc61ad935ba08">SUPC_BOD33_PSEL_DIV8_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV16</b>   (<a class="el" href="component_2supc_8h.html#ad3b22142b28b58c363efc9305f4116e5">SUPC_BOD33_PSEL_DIV16_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="memitem:a2e5eb372f23ced040b0965f6f196757b"><td class="memItemLeft" align="right" valign="top"><a id="a2e5eb372f23ced040b0965f6f196757b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV32</b>   (<a class="el" href="component_2supc_8h.html#ae457def5029205484b89fc8f2f00f2dd">SUPC_BOD33_PSEL_DIV32_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="memitem:a1cec91d5977083e9635879f97faab270"><td class="memItemLeft" align="right" valign="top"><a id="a1cec91d5977083e9635879f97faab270"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV64</b>   (<a class="el" href="component_2supc_8h.html#af0abecaf750f836e619ff4b5b8d3ea25">SUPC_BOD33_PSEL_DIV64_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="memitem:a1e71a02a954d79a928f0432b5e8262b3"><td class="memItemLeft" align="right" valign="top"><a id="a1e71a02a954d79a928f0432b5e8262b3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV128</b>   (<a class="el" href="component_2supc_8h.html#ad1c45a9c7423dd4967f6e0f68ee33383">SUPC_BOD33_PSEL_DIV128_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="memitem:a8018833b1b3907322335931cb5e795c5"><td class="memItemLeft" align="right" valign="top"><a id="a8018833b1b3907322335931cb5e795c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_PSEL_DIV256</b>   (<a class="el" href="component_2supc_8h.html#a446e919241877b5edb121c7cd614ba1a">SUPC_BOD33_PSEL_DIV256_Val</a> << <a class="el" href="component_2supc_8h.html#a749aed0ecd13c1a62c80e107cfe7e31f">SUPC_BOD33_PSEL_Pos</a>)</td></tr>
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<tr class="memitem:ab4d56f6b465db566d13204d5b244d876"><td class="memItemLeft" align="right" valign="top"><a id="ab4d56f6b465db566d13204d5b244d876"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ab4d56f6b465db566d13204d5b244d876">SUPC_BOD33_LEVEL_Pos</a>   16</td></tr>
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<tr class="memdesc:ab4d56f6b465db566d13204d5b244d876"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Threshold Level for VDD <br /></td></tr>
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<tr class="memitem:acf458f8beff11d1265c428cac97c2178"><td class="memItemLeft" align="right" valign="top"><a id="acf458f8beff11d1265c428cac97c2178"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_LEVEL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2supc_8h.html#ab4d56f6b465db566d13204d5b244d876">SUPC_BOD33_LEVEL_Pos</a>)</td></tr>
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<tr class="memitem:ab428ef2d5921d49846398192ed460259"><td class="memItemLeft" align="right" valign="top"><a id="ab428ef2d5921d49846398192ed460259"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_LEVEL</b>(value)   (SUPC_BOD33_LEVEL_Msk & ((value) << <a class="el" href="component_2supc_8h.html#ab4d56f6b465db566d13204d5b244d876">SUPC_BOD33_LEVEL_Pos</a>))</td></tr>
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<tr class="memitem:a5676f8935526e82503cf43612bb2effe"><td class="memItemLeft" align="right" valign="top"><a id="a5676f8935526e82503cf43612bb2effe"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a5676f8935526e82503cf43612bb2effe">SUPC_BOD33_VBATLEVEL_Pos</a>   24</td></tr>
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<tr class="memdesc:a5676f8935526e82503cf43612bb2effe"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) Threshold Level in battery backup sleep mode for VBAT <br /></td></tr>
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<tr class="memitem:a83b7663fb5133af125108ac79f797b5d"><td class="memItemLeft" align="right" valign="top"><a id="a83b7663fb5133af125108ac79f797b5d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_VBATLEVEL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2supc_8h.html#a5676f8935526e82503cf43612bb2effe">SUPC_BOD33_VBATLEVEL_Pos</a>)</td></tr>
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<tr class="memitem:a551f4eb5faf62450d74108bc8987143f"><td class="memItemLeft" align="right" valign="top"><a id="a551f4eb5faf62450d74108bc8987143f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BOD33_VBATLEVEL</b>(value)   (SUPC_BOD33_VBATLEVEL_Msk & ((value) << <a class="el" href="component_2supc_8h.html#a5676f8935526e82503cf43612bb2effe">SUPC_BOD33_VBATLEVEL_Pos</a>))</td></tr>
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<tr class="separator:a551f4eb5faf62450d74108bc8987143f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a59d9a345100060d6d76bf0d682b16a6f"><td class="memItemLeft" align="right" valign="top"><a id="a59d9a345100060d6d76bf0d682b16a6f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a59d9a345100060d6d76bf0d682b16a6f">SUPC_BOD33_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF7FFE)</td></tr>
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<tr class="memdesc:a59d9a345100060d6d76bf0d682b16a6f"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BOD33) MASK Register <br /></td></tr>
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<tr class="memitem:a826e1de659bad9b908978ff4c16039e2"><td class="memItemLeft" align="right" valign="top"><a id="a826e1de659bad9b908978ff4c16039e2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a826e1de659bad9b908978ff4c16039e2">SUPC_VREG_OFFSET</a>   0x18</td></tr>
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<tr class="memdesc:a826e1de659bad9b908978ff4c16039e2"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG offset) VREG Control <br /></td></tr>
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<tr class="memitem:a34bef1f4485a43ee14e1f35872176644"><td class="memItemLeft" align="right" valign="top"><a id="a34bef1f4485a43ee14e1f35872176644"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a34bef1f4485a43ee14e1f35872176644">SUPC_VREG_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000002)</td></tr>
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<tr class="memdesc:a34bef1f4485a43ee14e1f35872176644"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG reset_value) VREG Control <br /></td></tr>
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<tr class="memitem:a02f034caa03f4c23c28006bec76b4ebf"><td class="memItemLeft" align="right" valign="top"><a id="a02f034caa03f4c23c28006bec76b4ebf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a02f034caa03f4c23c28006bec76b4ebf">SUPC_VREG_ENABLE_Pos</a>   1</td></tr>
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<tr class="memdesc:a02f034caa03f4c23c28006bec76b4ebf"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) Enable <br /></td></tr>
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<tr class="memitem:a0f5d73e477b0e4791d17587824160648"><td class="memItemLeft" align="right" valign="top"><a id="a0f5d73e477b0e4791d17587824160648"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a02f034caa03f4c23c28006bec76b4ebf">SUPC_VREG_ENABLE_Pos</a>)</td></tr>
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<tr class="separator:a0f5d73e477b0e4791d17587824160648"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aef51119ae72407e4a6761def82082aad"><td class="memItemLeft" align="right" valign="top"><a id="aef51119ae72407e4a6761def82082aad"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aef51119ae72407e4a6761def82082aad">SUPC_VREG_SEL_Pos</a>   2</td></tr>
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<tr class="memdesc:aef51119ae72407e4a6761def82082aad"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) Voltage Regulator Selection <br /></td></tr>
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<tr class="memitem:a69a7ed2b6d745a76a3475b8b3e1b2be2"><td class="memItemLeft" align="right" valign="top"><a id="a69a7ed2b6d745a76a3475b8b3e1b2be2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_SEL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#aef51119ae72407e4a6761def82082aad">SUPC_VREG_SEL_Pos</a>)</td></tr>
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<tr class="separator:a69a7ed2b6d745a76a3475b8b3e1b2be2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab56bc9d465d19632b2e4f93f09276909"><td class="memItemLeft" align="right" valign="top"><a id="ab56bc9d465d19632b2e4f93f09276909"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ab56bc9d465d19632b2e4f93f09276909">SUPC_VREG_SEL_LDO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:ab56bc9d465d19632b2e4f93f09276909"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) LDO selection <br /></td></tr>
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<tr class="separator:ab56bc9d465d19632b2e4f93f09276909"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9dfc17663996e43efccd747abb491ceb"><td class="memItemLeft" align="right" valign="top"><a id="a9dfc17663996e43efccd747abb491ceb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a9dfc17663996e43efccd747abb491ceb">SUPC_VREG_SEL_BUCK_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a9dfc17663996e43efccd747abb491ceb"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) Buck selection <br /></td></tr>
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<tr class="separator:a9dfc17663996e43efccd747abb491ceb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1cc290d4cb47348e2e8145d1ad5b0bc"><td class="memItemLeft" align="right" valign="top"><a id="ae1cc290d4cb47348e2e8145d1ad5b0bc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_SEL_LDO</b>   (<a class="el" href="component_2supc_8h.html#ab56bc9d465d19632b2e4f93f09276909">SUPC_VREG_SEL_LDO_Val</a> << <a class="el" href="component_2supc_8h.html#aef51119ae72407e4a6761def82082aad">SUPC_VREG_SEL_Pos</a>)</td></tr>
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<tr class="separator:ae1cc290d4cb47348e2e8145d1ad5b0bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac28fb9d9d6737b04e66bb5a99902159a"><td class="memItemLeft" align="right" valign="top"><a id="ac28fb9d9d6737b04e66bb5a99902159a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_SEL_BUCK</b>   (<a class="el" href="component_2supc_8h.html#a9dfc17663996e43efccd747abb491ceb">SUPC_VREG_SEL_BUCK_Val</a> << <a class="el" href="component_2supc_8h.html#aef51119ae72407e4a6761def82082aad">SUPC_VREG_SEL_Pos</a>)</td></tr>
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<tr class="memitem:a318ce66e3174d06d51b2af24fe659121"><td class="memItemLeft" align="right" valign="top"><a id="a318ce66e3174d06d51b2af24fe659121"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a318ce66e3174d06d51b2af24fe659121">SUPC_VREG_RUNBKUP_Pos</a>   7</td></tr>
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<tr class="memdesc:a318ce66e3174d06d51b2af24fe659121"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) Run in Backup mode <br /></td></tr>
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<tr class="separator:a318ce66e3174d06d51b2af24fe659121"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab0c3f5de3bccf5b6104a6ebba22c4a9f"><td class="memItemLeft" align="right" valign="top"><a id="ab0c3f5de3bccf5b6104a6ebba22c4a9f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_RUNBKUP</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a318ce66e3174d06d51b2af24fe659121">SUPC_VREG_RUNBKUP_Pos</a>)</td></tr>
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<tr class="separator:ab0c3f5de3bccf5b6104a6ebba22c4a9f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea9704f9aadbe147d225b6dc992cea93"><td class="memItemLeft" align="right" valign="top"><a id="aea9704f9aadbe147d225b6dc992cea93"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aea9704f9aadbe147d225b6dc992cea93">SUPC_VREG_VSEN_Pos</a>   16</td></tr>
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<tr class="memdesc:aea9704f9aadbe147d225b6dc992cea93"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) Voltage Scaling Enable <br /></td></tr>
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<tr class="separator:aea9704f9aadbe147d225b6dc992cea93"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad21c9ded4fc381de106c9f3f4f8d8897"><td class="memItemLeft" align="right" valign="top"><a id="ad21c9ded4fc381de106c9f3f4f8d8897"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_VSEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#aea9704f9aadbe147d225b6dc992cea93">SUPC_VREG_VSEN_Pos</a>)</td></tr>
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<tr class="separator:ad21c9ded4fc381de106c9f3f4f8d8897"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab46d7794eb9801eb6683c799a0fb9c00"><td class="memItemLeft" align="right" valign="top"><a id="ab46d7794eb9801eb6683c799a0fb9c00"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ab46d7794eb9801eb6683c799a0fb9c00">SUPC_VREG_VSPER_Pos</a>   24</td></tr>
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<tr class="memdesc:ab46d7794eb9801eb6683c799a0fb9c00"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) Voltage Scaling Period <br /></td></tr>
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<tr class="separator:ab46d7794eb9801eb6683c799a0fb9c00"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a36637a2ddc7ad25ad8aeda88bac470a5"><td class="memItemLeft" align="right" valign="top"><a id="a36637a2ddc7ad25ad8aeda88bac470a5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_VSPER_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2supc_8h.html#ab46d7794eb9801eb6683c799a0fb9c00">SUPC_VREG_VSPER_Pos</a>)</td></tr>
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<tr class="separator:a36637a2ddc7ad25ad8aeda88bac470a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abc3f982814cb50855efb73657ba1d0f1"><td class="memItemLeft" align="right" valign="top"><a id="abc3f982814cb50855efb73657ba1d0f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREG_VSPER</b>(value)   (SUPC_VREG_VSPER_Msk & ((value) << <a class="el" href="component_2supc_8h.html#ab46d7794eb9801eb6683c799a0fb9c00">SUPC_VREG_VSPER_Pos</a>))</td></tr>
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<tr class="separator:abc3f982814cb50855efb73657ba1d0f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0abb6eb2870ec646e6723177c379bc76"><td class="memItemLeft" align="right" valign="top"><a id="a0abb6eb2870ec646e6723177c379bc76"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a0abb6eb2870ec646e6723177c379bc76">SUPC_VREG_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07010086)</td></tr>
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<tr class="memdesc:a0abb6eb2870ec646e6723177c379bc76"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREG) MASK Register <br /></td></tr>
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<tr class="separator:a0abb6eb2870ec646e6723177c379bc76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae0f1bf32312e0b14839e36f9b0550848"><td class="memItemLeft" align="right" valign="top"><a id="ae0f1bf32312e0b14839e36f9b0550848"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae0f1bf32312e0b14839e36f9b0550848">SUPC_VREF_OFFSET</a>   0x1C</td></tr>
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||
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<tr class="memdesc:ae0f1bf32312e0b14839e36f9b0550848"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF offset) VREF Control <br /></td></tr>
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<tr class="separator:ae0f1bf32312e0b14839e36f9b0550848"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa872fab9aa218e3779ff6946e8600c67"><td class="memItemLeft" align="right" valign="top"><a id="aa872fab9aa218e3779ff6946e8600c67"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aa872fab9aa218e3779ff6946e8600c67">SUPC_VREF_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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||
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<tr class="memdesc:aa872fab9aa218e3779ff6946e8600c67"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF reset_value) VREF Control <br /></td></tr>
|
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<tr class="separator:aa872fab9aa218e3779ff6946e8600c67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f95de0a40088162ff965e5f256f0346"><td class="memItemLeft" align="right" valign="top"><a id="a4f95de0a40088162ff965e5f256f0346"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a4f95de0a40088162ff965e5f256f0346">SUPC_VREF_TSEN_Pos</a>   1</td></tr>
|
||
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<tr class="memdesc:a4f95de0a40088162ff965e5f256f0346"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) Temperature Sensor Output Enable <br /></td></tr>
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<tr class="separator:a4f95de0a40088162ff965e5f256f0346"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a4a892d3233a220f8c3f6e9fea82eb936"><td class="memItemLeft" align="right" valign="top"><a id="a4a892d3233a220f8c3f6e9fea82eb936"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_TSEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a4f95de0a40088162ff965e5f256f0346">SUPC_VREF_TSEN_Pos</a>)</td></tr>
|
||
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<tr class="separator:a4a892d3233a220f8c3f6e9fea82eb936"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a80ad3fd2d67f85d288df7d2f3a814e17"><td class="memItemLeft" align="right" valign="top"><a id="a80ad3fd2d67f85d288df7d2f3a814e17"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a80ad3fd2d67f85d288df7d2f3a814e17">SUPC_VREF_VREFOE_Pos</a>   2</td></tr>
|
||
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<tr class="memdesc:a80ad3fd2d67f85d288df7d2f3a814e17"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) Voltage Reference Output Enable <br /></td></tr>
|
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<tr class="separator:a80ad3fd2d67f85d288df7d2f3a814e17"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a70c3ea52ac7e7244a7f3a6963ef218ba"><td class="memItemLeft" align="right" valign="top"><a id="a70c3ea52ac7e7244a7f3a6963ef218ba"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_VREFOE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a80ad3fd2d67f85d288df7d2f3a814e17">SUPC_VREF_VREFOE_Pos</a>)</td></tr>
|
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<tr class="separator:a70c3ea52ac7e7244a7f3a6963ef218ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeebf2de104682a541f26380a018749b5"><td class="memItemLeft" align="right" valign="top"><a id="aeebf2de104682a541f26380a018749b5"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aeebf2de104682a541f26380a018749b5">SUPC_VREF_TSSEL_Pos</a>   3</td></tr>
|
||
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<tr class="memdesc:aeebf2de104682a541f26380a018749b5"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) Temperature Sensor Selection <br /></td></tr>
|
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<tr class="separator:aeebf2de104682a541f26380a018749b5"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a3b103026042c7c3e1ca64b38caf217f5"><td class="memItemLeft" align="right" valign="top"><a id="a3b103026042c7c3e1ca64b38caf217f5"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_TSSEL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#aeebf2de104682a541f26380a018749b5">SUPC_VREF_TSSEL_Pos</a>)</td></tr>
|
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<tr class="separator:a3b103026042c7c3e1ca64b38caf217f5"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a718ae44121dcea1e98ba492001b73be7"><td class="memItemLeft" align="right" valign="top"><a id="a718ae44121dcea1e98ba492001b73be7"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a718ae44121dcea1e98ba492001b73be7">SUPC_VREF_RUNSTDBY_Pos</a>   6</td></tr>
|
||
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<tr class="memdesc:a718ae44121dcea1e98ba492001b73be7"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) Run during Standby <br /></td></tr>
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<tr class="separator:a718ae44121dcea1e98ba492001b73be7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7f0442e396aaf1a1c8129cbb86ad259c"><td class="memItemLeft" align="right" valign="top"><a id="a7f0442e396aaf1a1c8129cbb86ad259c"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_RUNSTDBY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a718ae44121dcea1e98ba492001b73be7">SUPC_VREF_RUNSTDBY_Pos</a>)</td></tr>
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<tr class="separator:a7f0442e396aaf1a1c8129cbb86ad259c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1cb13ba7ba5f665fd6c50988ffda189"><td class="memItemLeft" align="right" valign="top"><a id="ae1cb13ba7ba5f665fd6c50988ffda189"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae1cb13ba7ba5f665fd6c50988ffda189">SUPC_VREF_ONDEMAND_Pos</a>   7</td></tr>
|
||
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<tr class="memdesc:ae1cb13ba7ba5f665fd6c50988ffda189"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) On Demand Contrl <br /></td></tr>
|
||
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<tr class="separator:ae1cb13ba7ba5f665fd6c50988ffda189"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a64e87db219eec84cf003f316d7c8d188"><td class="memItemLeft" align="right" valign="top"><a id="a64e87db219eec84cf003f316d7c8d188"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_ONDEMAND</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#ae1cb13ba7ba5f665fd6c50988ffda189">SUPC_VREF_ONDEMAND_Pos</a>)</td></tr>
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<tr class="separator:a64e87db219eec84cf003f316d7c8d188"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ad4360a3a50810b54b6e54cc7685f7cf5"><td class="memItemLeft" align="right" valign="top"><a id="ad4360a3a50810b54b6e54cc7685f7cf5"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>   16</td></tr>
|
||
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<tr class="memdesc:ad4360a3a50810b54b6e54cc7685f7cf5"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) Voltage Reference Selection <br /></td></tr>
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<tr class="separator:ad4360a3a50810b54b6e54cc7685f7cf5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ace0ce1ef32c4b91e9aafdf489f362d2c"><td class="memItemLeft" align="right" valign="top"><a id="ace0ce1ef32c4b91e9aafdf489f362d2c"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
|
||
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<tr class="separator:ace0ce1ef32c4b91e9aafdf489f362d2c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a206456b0b5f4f491db2e2723dd3f33ac"><td class="memItemLeft" align="right" valign="top"><a id="a206456b0b5f4f491db2e2723dd3f33ac"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL</b>(value)   (SUPC_VREF_SEL_Msk & ((value) << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>))</td></tr>
|
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<tr class="separator:a206456b0b5f4f491db2e2723dd3f33ac"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a0d57396e9b9b3f7ecb97e25581e7a00c"><td class="memItemLeft" align="right" valign="top"><a id="a0d57396e9b9b3f7ecb97e25581e7a00c"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a0d57396e9b9b3f7ecb97e25581e7a00c">SUPC_VREF_SEL_1V0_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
|
||
|
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<tr class="memdesc:a0d57396e9b9b3f7ecb97e25581e7a00c"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 1.0V voltage reference typical value <br /></td></tr>
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||
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<tr class="separator:a0d57396e9b9b3f7ecb97e25581e7a00c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a06478b9c3dd3f4382725fbb5c1642545"><td class="memItemLeft" align="right" valign="top"><a id="a06478b9c3dd3f4382725fbb5c1642545"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a06478b9c3dd3f4382725fbb5c1642545">SUPC_VREF_SEL_1V1_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
|
||
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<tr class="memdesc:a06478b9c3dd3f4382725fbb5c1642545"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 1.1V voltage reference typical value <br /></td></tr>
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||
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<tr class="separator:a06478b9c3dd3f4382725fbb5c1642545"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa85e43982e3779c28a68111dfc626364"><td class="memItemLeft" align="right" valign="top"><a id="aa85e43982e3779c28a68111dfc626364"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aa85e43982e3779c28a68111dfc626364">SUPC_VREF_SEL_1V2_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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||
|
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<tr class="memdesc:aa85e43982e3779c28a68111dfc626364"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 1.2V voltage reference typical value <br /></td></tr>
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<tr class="separator:aa85e43982e3779c28a68111dfc626364"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad21e79e28bf7d79cfd9ee92ba389b6b4"><td class="memItemLeft" align="right" valign="top"><a id="ad21e79e28bf7d79cfd9ee92ba389b6b4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ad21e79e28bf7d79cfd9ee92ba389b6b4">SUPC_VREF_SEL_1V25_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:ad21e79e28bf7d79cfd9ee92ba389b6b4"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 1.25V voltage reference typical value <br /></td></tr>
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<tr class="memitem:ae0d754e14d6933674da87fcce4943a05"><td class="memItemLeft" align="right" valign="top"><a id="ae0d754e14d6933674da87fcce4943a05"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae0d754e14d6933674da87fcce4943a05">SUPC_VREF_SEL_2V0_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
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<tr class="memdesc:ae0d754e14d6933674da87fcce4943a05"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 2.0V voltage reference typical value <br /></td></tr>
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<tr class="separator:ae0d754e14d6933674da87fcce4943a05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a940bdd6d316685f44a2fdea57ec06829"><td class="memItemLeft" align="right" valign="top"><a id="a940bdd6d316685f44a2fdea57ec06829"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a940bdd6d316685f44a2fdea57ec06829">SUPC_VREF_SEL_2V2_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
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<tr class="memdesc:a940bdd6d316685f44a2fdea57ec06829"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 2.2V voltage reference typical value <br /></td></tr>
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<tr class="separator:a940bdd6d316685f44a2fdea57ec06829"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa7e78450b8097200c0b04af2bb712e72"><td class="memItemLeft" align="right" valign="top"><a id="aa7e78450b8097200c0b04af2bb712e72"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aa7e78450b8097200c0b04af2bb712e72">SUPC_VREF_SEL_2V4_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
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<tr class="memdesc:aa7e78450b8097200c0b04af2bb712e72"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 2.4V voltage reference typical value <br /></td></tr>
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<tr class="separator:aa7e78450b8097200c0b04af2bb712e72"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a55e502a549ceeb45df2dcae2250a9007"><td class="memItemLeft" align="right" valign="top"><a id="a55e502a549ceeb45df2dcae2250a9007"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a55e502a549ceeb45df2dcae2250a9007">SUPC_VREF_SEL_2V5_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
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<tr class="memdesc:a55e502a549ceeb45df2dcae2250a9007"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) 2.5V voltage reference typical value <br /></td></tr>
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<tr class="separator:a55e502a549ceeb45df2dcae2250a9007"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8db2aafbf9f44640e84d26c763e49d5a"><td class="memItemLeft" align="right" valign="top"><a id="a8db2aafbf9f44640e84d26c763e49d5a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_1V0</b>   (<a class="el" href="component_2supc_8h.html#a0d57396e9b9b3f7ecb97e25581e7a00c">SUPC_VREF_SEL_1V0_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:a8db2aafbf9f44640e84d26c763e49d5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a93ce4387427569192d19bf2cfd81e6fc"><td class="memItemLeft" align="right" valign="top"><a id="a93ce4387427569192d19bf2cfd81e6fc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_1V1</b>   (<a class="el" href="component_2supc_8h.html#a06478b9c3dd3f4382725fbb5c1642545">SUPC_VREF_SEL_1V1_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:a93ce4387427569192d19bf2cfd81e6fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4e84d49e30fb3fb7c561ba10cd7db141"><td class="memItemLeft" align="right" valign="top"><a id="a4e84d49e30fb3fb7c561ba10cd7db141"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_1V2</b>   (<a class="el" href="component_2supc_8h.html#aa85e43982e3779c28a68111dfc626364">SUPC_VREF_SEL_1V2_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:a4e84d49e30fb3fb7c561ba10cd7db141"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aae6cf103ecc78ce8a13a8b212617f84b"><td class="memItemLeft" align="right" valign="top"><a id="aae6cf103ecc78ce8a13a8b212617f84b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_1V25</b>   (<a class="el" href="component_2supc_8h.html#ad21e79e28bf7d79cfd9ee92ba389b6b4">SUPC_VREF_SEL_1V25_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:aae6cf103ecc78ce8a13a8b212617f84b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aabb430c9f532d25e4e1eda0df48ea755"><td class="memItemLeft" align="right" valign="top"><a id="aabb430c9f532d25e4e1eda0df48ea755"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_2V0</b>   (<a class="el" href="component_2supc_8h.html#ae0d754e14d6933674da87fcce4943a05">SUPC_VREF_SEL_2V0_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:aabb430c9f532d25e4e1eda0df48ea755"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a64bcc935f96e91376c1d2c34307b037a"><td class="memItemLeft" align="right" valign="top"><a id="a64bcc935f96e91376c1d2c34307b037a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_2V2</b>   (<a class="el" href="component_2supc_8h.html#a940bdd6d316685f44a2fdea57ec06829">SUPC_VREF_SEL_2V2_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:a64bcc935f96e91376c1d2c34307b037a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7d22da3388a0aa3c120468fc0bb8e3ed"><td class="memItemLeft" align="right" valign="top"><a id="a7d22da3388a0aa3c120468fc0bb8e3ed"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_2V4</b>   (<a class="el" href="component_2supc_8h.html#aa7e78450b8097200c0b04af2bb712e72">SUPC_VREF_SEL_2V4_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:a7d22da3388a0aa3c120468fc0bb8e3ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c318784e614cf739a8499283fbbf2c2"><td class="memItemLeft" align="right" valign="top"><a id="a8c318784e614cf739a8499283fbbf2c2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_VREF_SEL_2V5</b>   (<a class="el" href="component_2supc_8h.html#a55e502a549ceeb45df2dcae2250a9007">SUPC_VREF_SEL_2V5_Val</a> << <a class="el" href="component_2supc_8h.html#ad4360a3a50810b54b6e54cc7685f7cf5">SUPC_VREF_SEL_Pos</a>)</td></tr>
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<tr class="separator:a8c318784e614cf739a8499283fbbf2c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae86e359610418b463f43b71c7e206645"><td class="memItemLeft" align="right" valign="top"><a id="ae86e359610418b463f43b71c7e206645"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae86e359610418b463f43b71c7e206645">SUPC_VREF_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000F00CE)</td></tr>
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<tr class="memdesc:ae86e359610418b463f43b71c7e206645"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_VREF) MASK Register <br /></td></tr>
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<tr class="separator:ae86e359610418b463f43b71c7e206645"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a03f47f9f7eda052c03200ca320e8d819"><td class="memItemLeft" align="right" valign="top"><a id="a03f47f9f7eda052c03200ca320e8d819"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a03f47f9f7eda052c03200ca320e8d819">SUPC_BBPS_OFFSET</a>   0x20</td></tr>
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<tr class="memdesc:a03f47f9f7eda052c03200ca320e8d819"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS offset) Battery Backup Power Switch <br /></td></tr>
|
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<tr class="separator:a03f47f9f7eda052c03200ca320e8d819"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a71668cb5dfa35c9463a81f539493a38a"><td class="memItemLeft" align="right" valign="top"><a id="a71668cb5dfa35c9463a81f539493a38a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a71668cb5dfa35c9463a81f539493a38a">SUPC_BBPS_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a71668cb5dfa35c9463a81f539493a38a"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS reset_value) Battery Backup Power Switch <br /></td></tr>
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<tr class="separator:a71668cb5dfa35c9463a81f539493a38a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afb7f9d16c3342e20e279e40f0c5a8d06"><td class="memItemLeft" align="right" valign="top"><a id="afb7f9d16c3342e20e279e40f0c5a8d06"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#afb7f9d16c3342e20e279e40f0c5a8d06">SUPC_BBPS_CONF_Pos</a>   0</td></tr>
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||
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<tr class="memdesc:afb7f9d16c3342e20e279e40f0c5a8d06"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS) Battery Backup Configuration <br /></td></tr>
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<tr class="separator:afb7f9d16c3342e20e279e40f0c5a8d06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a77291fdb98cdca34beb505d661273d8b"><td class="memItemLeft" align="right" valign="top"><a id="a77291fdb98cdca34beb505d661273d8b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BBPS_CONF</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#afb7f9d16c3342e20e279e40f0c5a8d06">SUPC_BBPS_CONF_Pos</a>)</td></tr>
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<tr class="separator:a77291fdb98cdca34beb505d661273d8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4829c246da4871a2e4901ab004043caa"><td class="memItemLeft" align="right" valign="top"><a id="a4829c246da4871a2e4901ab004043caa"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a4829c246da4871a2e4901ab004043caa">SUPC_BBPS_CONF_BOD33_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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||
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<tr class="memdesc:a4829c246da4871a2e4901ab004043caa"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS) The power switch is handled by the BOD33 <br /></td></tr>
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<tr class="separator:a4829c246da4871a2e4901ab004043caa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3385481afbf71b502d4177f93c2925ea"><td class="memItemLeft" align="right" valign="top"><a id="a3385481afbf71b502d4177f93c2925ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a3385481afbf71b502d4177f93c2925ea">SUPC_BBPS_CONF_FORCED_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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||
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<tr class="memdesc:a3385481afbf71b502d4177f93c2925ea"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS) In Backup Domain, the backup domain is always supplied by battery backup power <br /></td></tr>
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<tr class="separator:a3385481afbf71b502d4177f93c2925ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a95a559d01ba2fc571a0b168874a76dd5"><td class="memItemLeft" align="right" valign="top"><a id="a95a559d01ba2fc571a0b168874a76dd5"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BBPS_CONF_BOD33</b>   (<a class="el" href="component_2supc_8h.html#a4829c246da4871a2e4901ab004043caa">SUPC_BBPS_CONF_BOD33_Val</a> << <a class="el" href="component_2supc_8h.html#afb7f9d16c3342e20e279e40f0c5a8d06">SUPC_BBPS_CONF_Pos</a>)</td></tr>
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<tr class="separator:a95a559d01ba2fc571a0b168874a76dd5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a800bba14616d3ba6a693e0117ea3029d"><td class="memItemLeft" align="right" valign="top"><a id="a800bba14616d3ba6a693e0117ea3029d"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BBPS_CONF_FORCED</b>   (<a class="el" href="component_2supc_8h.html#a3385481afbf71b502d4177f93c2925ea">SUPC_BBPS_CONF_FORCED_Val</a> << <a class="el" href="component_2supc_8h.html#afb7f9d16c3342e20e279e40f0c5a8d06">SUPC_BBPS_CONF_Pos</a>)</td></tr>
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<tr class="separator:a800bba14616d3ba6a693e0117ea3029d"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a9a04f5fce811216278d892056e995525"><td class="memItemLeft" align="right" valign="top"><a id="a9a04f5fce811216278d892056e995525"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a9a04f5fce811216278d892056e995525">SUPC_BBPS_WAKEEN_Pos</a>   2</td></tr>
|
||
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<tr class="memdesc:a9a04f5fce811216278d892056e995525"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS) Wake Enable <br /></td></tr>
|
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<tr class="separator:a9a04f5fce811216278d892056e995525"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a45d41d542fa35ecfde05f072420a392e"><td class="memItemLeft" align="right" valign="top"><a id="a45d41d542fa35ecfde05f072420a392e"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BBPS_WAKEEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2supc_8h.html#a9a04f5fce811216278d892056e995525">SUPC_BBPS_WAKEEN_Pos</a>)</td></tr>
|
||
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<tr class="separator:a45d41d542fa35ecfde05f072420a392e"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a1fe35d1f68d52aeddb77d4d7a6ac33d0"><td class="memItemLeft" align="right" valign="top"><a id="a1fe35d1f68d52aeddb77d4d7a6ac33d0"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a1fe35d1f68d52aeddb77d4d7a6ac33d0">SUPC_BBPS_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
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||
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<tr class="memdesc:a1fe35d1f68d52aeddb77d4d7a6ac33d0"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BBPS) MASK Register <br /></td></tr>
|
||
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<tr class="separator:a1fe35d1f68d52aeddb77d4d7a6ac33d0"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:acabb137b25d157dfcb4e0712f19c83b2"><td class="memItemLeft" align="right" valign="top"><a id="acabb137b25d157dfcb4e0712f19c83b2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#acabb137b25d157dfcb4e0712f19c83b2">SUPC_BKOUT_OFFSET</a>   0x24</td></tr>
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<tr class="memdesc:acabb137b25d157dfcb4e0712f19c83b2"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT offset) Backup Output Control <br /></td></tr>
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<tr class="separator:acabb137b25d157dfcb4e0712f19c83b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9509091226d1b8669c9f6eaef1f51bb"><td class="memItemLeft" align="right" valign="top"><a id="ae9509091226d1b8669c9f6eaef1f51bb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ae9509091226d1b8669c9f6eaef1f51bb">SUPC_BKOUT_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ae9509091226d1b8669c9f6eaef1f51bb"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT reset_value) Backup Output Control <br /></td></tr>
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<tr class="separator:ae9509091226d1b8669c9f6eaef1f51bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac8c7e3a15971f0ada2eb12816807fbed"><td class="memItemLeft" align="right" valign="top"><a id="ac8c7e3a15971f0ada2eb12816807fbed"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#ac8c7e3a15971f0ada2eb12816807fbed">SUPC_BKOUT_EN_Pos</a>   0</td></tr>
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<tr class="memdesc:ac8c7e3a15971f0ada2eb12816807fbed"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT) Enable Output <br /></td></tr>
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<tr class="separator:ac8c7e3a15971f0ada2eb12816807fbed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac205cb6299c1eb098048e1188a868a1b"><td class="memItemLeft" align="right" valign="top"><a id="ac205cb6299c1eb098048e1188a868a1b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_EN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2supc_8h.html#ac8c7e3a15971f0ada2eb12816807fbed">SUPC_BKOUT_EN_Pos</a>)</td></tr>
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<tr class="separator:ac205cb6299c1eb098048e1188a868a1b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acb663a3e169059aafa3129bb32664e1e"><td class="memItemLeft" align="right" valign="top"><a id="acb663a3e169059aafa3129bb32664e1e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_EN</b>(value)   (SUPC_BKOUT_EN_Msk & ((value) << <a class="el" href="component_2supc_8h.html#ac8c7e3a15971f0ada2eb12816807fbed">SUPC_BKOUT_EN_Pos</a>))</td></tr>
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<tr class="separator:acb663a3e169059aafa3129bb32664e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aedbc4f6fd0e8fc76d6a43a499a4ec2b3"><td class="memItemLeft" align="right" valign="top"><a id="aedbc4f6fd0e8fc76d6a43a499a4ec2b3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aedbc4f6fd0e8fc76d6a43a499a4ec2b3">SUPC_BKOUT_CLR_Pos</a>   8</td></tr>
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<tr class="memdesc:aedbc4f6fd0e8fc76d6a43a499a4ec2b3"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT) Clear Output <br /></td></tr>
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||
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<tr class="separator:aedbc4f6fd0e8fc76d6a43a499a4ec2b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8df12262d448166d6c4fd23af22202f5"><td class="memItemLeft" align="right" valign="top"><a id="a8df12262d448166d6c4fd23af22202f5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_CLR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2supc_8h.html#aedbc4f6fd0e8fc76d6a43a499a4ec2b3">SUPC_BKOUT_CLR_Pos</a>)</td></tr>
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<tr class="separator:a8df12262d448166d6c4fd23af22202f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab2757a2e0584167870b8f54c27b2b372"><td class="memItemLeft" align="right" valign="top"><a id="ab2757a2e0584167870b8f54c27b2b372"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_CLR</b>(value)   (SUPC_BKOUT_CLR_Msk & ((value) << <a class="el" href="component_2supc_8h.html#aedbc4f6fd0e8fc76d6a43a499a4ec2b3">SUPC_BKOUT_CLR_Pos</a>))</td></tr>
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<tr class="separator:ab2757a2e0584167870b8f54c27b2b372"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:aa9ccc9bebfce68ff2654716bee7a5170"><td class="memItemLeft" align="right" valign="top"><a id="aa9ccc9bebfce68ff2654716bee7a5170"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aa9ccc9bebfce68ff2654716bee7a5170">SUPC_BKOUT_SET_Pos</a>   16</td></tr>
|
||
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<tr class="memdesc:aa9ccc9bebfce68ff2654716bee7a5170"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT) Set Output <br /></td></tr>
|
||
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<tr class="separator:aa9ccc9bebfce68ff2654716bee7a5170"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ae05760eb679cb4ee7c580d33a5015800"><td class="memItemLeft" align="right" valign="top"><a id="ae05760eb679cb4ee7c580d33a5015800"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_SET_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2supc_8h.html#aa9ccc9bebfce68ff2654716bee7a5170">SUPC_BKOUT_SET_Pos</a>)</td></tr>
|
||
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<tr class="separator:ae05760eb679cb4ee7c580d33a5015800"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:adf4072f001124aa1219b003a0da33ead"><td class="memItemLeft" align="right" valign="top"><a id="adf4072f001124aa1219b003a0da33ead"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_SET</b>(value)   (SUPC_BKOUT_SET_Msk & ((value) << <a class="el" href="component_2supc_8h.html#aa9ccc9bebfce68ff2654716bee7a5170">SUPC_BKOUT_SET_Pos</a>))</td></tr>
|
||
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<tr class="separator:adf4072f001124aa1219b003a0da33ead"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a41b7dbf537a1cc2a51f191d2664e67dc"><td class="memItemLeft" align="right" valign="top"><a id="a41b7dbf537a1cc2a51f191d2664e67dc"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a41b7dbf537a1cc2a51f191d2664e67dc">SUPC_BKOUT_RTCTGL_Pos</a>   24</td></tr>
|
||
|
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<tr class="memdesc:a41b7dbf537a1cc2a51f191d2664e67dc"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT) RTC Toggle Output <br /></td></tr>
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||
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<tr class="separator:a41b7dbf537a1cc2a51f191d2664e67dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a31e70e0cc9d396b912f13f1245796e6b"><td class="memItemLeft" align="right" valign="top"><a id="a31e70e0cc9d396b912f13f1245796e6b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_RTCTGL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2supc_8h.html#a41b7dbf537a1cc2a51f191d2664e67dc">SUPC_BKOUT_RTCTGL_Pos</a>)</td></tr>
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||
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<tr class="separator:a31e70e0cc9d396b912f13f1245796e6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa48737be39df3807d99cd960d4a02366"><td class="memItemLeft" align="right" valign="top"><a id="aa48737be39df3807d99cd960d4a02366"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKOUT_RTCTGL</b>(value)   (SUPC_BKOUT_RTCTGL_Msk & ((value) << <a class="el" href="component_2supc_8h.html#a41b7dbf537a1cc2a51f191d2664e67dc">SUPC_BKOUT_RTCTGL_Pos</a>))</td></tr>
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<tr class="separator:aa48737be39df3807d99cd960d4a02366"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8ff4b16b535f918f7cfcb99246a7b576"><td class="memItemLeft" align="right" valign="top"><a id="a8ff4b16b535f918f7cfcb99246a7b576"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a8ff4b16b535f918f7cfcb99246a7b576">SUPC_BKOUT_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03030303)</td></tr>
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||
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<tr class="memdesc:a8ff4b16b535f918f7cfcb99246a7b576"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKOUT) MASK Register <br /></td></tr>
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<tr class="separator:a8ff4b16b535f918f7cfcb99246a7b576"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac86df69c8754044d83b44bb51b0276c"><td class="memItemLeft" align="right" valign="top"><a id="aac86df69c8754044d83b44bb51b0276c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#aac86df69c8754044d83b44bb51b0276c">SUPC_BKIN_OFFSET</a>   0x28</td></tr>
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||
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<tr class="memdesc:aac86df69c8754044d83b44bb51b0276c"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKIN offset) Backup Input Control <br /></td></tr>
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<tr class="separator:aac86df69c8754044d83b44bb51b0276c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e61aa482eb05aeebadde3aaa2337151"><td class="memItemLeft" align="right" valign="top"><a id="a9e61aa482eb05aeebadde3aaa2337151"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a9e61aa482eb05aeebadde3aaa2337151">SUPC_BKIN_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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||
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<tr class="memdesc:a9e61aa482eb05aeebadde3aaa2337151"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKIN reset_value) Backup Input Control <br /></td></tr>
|
||
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<tr class="separator:a9e61aa482eb05aeebadde3aaa2337151"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0c3e739bf612572843aeeed08421d891"><td class="memItemLeft" align="right" valign="top"><a id="a0c3e739bf612572843aeeed08421d891"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a0c3e739bf612572843aeeed08421d891">SUPC_BKIN_BKIN_Pos</a>   0</td></tr>
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||
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<tr class="memdesc:a0c3e739bf612572843aeeed08421d891"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKIN) Backup Input Value <br /></td></tr>
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<tr class="separator:a0c3e739bf612572843aeeed08421d891"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a1b6de61bd111f7cedd3e3810850aa1d2"><td class="memItemLeft" align="right" valign="top"><a id="a1b6de61bd111f7cedd3e3810850aa1d2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKIN_BKIN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2supc_8h.html#a0c3e739bf612572843aeeed08421d891">SUPC_BKIN_BKIN_Pos</a>)</td></tr>
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<tr class="separator:a1b6de61bd111f7cedd3e3810850aa1d2"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:abb85c1ceeacf4b50bed121bd77697450"><td class="memItemLeft" align="right" valign="top"><a id="abb85c1ceeacf4b50bed121bd77697450"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>SUPC_BKIN_BKIN</b>(value)   (SUPC_BKIN_BKIN_Msk & ((value) << <a class="el" href="component_2supc_8h.html#a0c3e739bf612572843aeeed08421d891">SUPC_BKIN_BKIN_Pos</a>))</td></tr>
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<tr class="separator:abb85c1ceeacf4b50bed121bd77697450"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2deecf9ddafe40fadb42754307362861"><td class="memItemLeft" align="right" valign="top"><a id="a2deecf9ddafe40fadb42754307362861"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2supc_8h.html#a2deecf9ddafe40fadb42754307362861">SUPC_BKIN_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
|
||
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<tr class="memdesc:a2deecf9ddafe40fadb42754307362861"><td class="mdescLeft"> </td><td class="mdescRight">(SUPC_BKIN) MASK Register <br /></td></tr>
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<tr class="separator:a2deecf9ddafe40fadb42754307362861"><td class="memSeparator" colspan="2"> </td></tr>
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||
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||
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<div class="textblock"><p>Component description for SUPC. </p>
|
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="component_2supc_8h_source.html">supc.h</a>.</p>
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</div></div><!-- contents -->
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<!-- start footer part -->
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</small></address>
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