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129 lines
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129 lines
9.4 KiB
HTML
4 years ago
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<title>i386-Mnemonics - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="i386_002dDependent.html#i386_002dDependent" title="i386-Dependent">
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<link rel="prev" href="i386_002dSyntax.html#i386_002dSyntax" title="i386-Syntax">
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<link rel="next" href="i386_002dRegs.html#i386_002dRegs" title="i386-Regs">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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--></style>
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</head>
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<body>
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<div class="node">
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<a name="i386-Mnemonics"></a>
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<a name="i386_002dMnemonics"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="i386_002dRegs.html#i386_002dRegs">i386-Regs</a>,
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Previous: <a rel="previous" accesskey="p" href="i386_002dSyntax.html#i386_002dSyntax">i386-Syntax</a>,
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Up: <a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.15.4 i386-Mnemonics</h4>
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<h5 class="subsubsection">9.15.4.1 Instruction Naming</h5>
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<p><a name="index-i386-instruction-naming-1077"></a><a name="index-instruction-naming_002c-i386-1078"></a><a name="index-x86_002d64-instruction-naming-1079"></a><a name="index-instruction-naming_002c-x86_002d64-1080"></a>
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Instruction mnemonics are suffixed with one character modifiers which
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specify the size of operands. The letters ‘<samp><span class="samp">b</span></samp>’, ‘<samp><span class="samp">w</span></samp>’, ‘<samp><span class="samp">l</span></samp>’
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and ‘<samp><span class="samp">q</span></samp>’ specify byte, word, long and quadruple word operands. If
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no suffix is specified by an instruction then <code>as</code> tries to
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fill in the missing suffix based on the destination register operand
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(the last one by convention). Thus, ‘<samp><span class="samp">mov %ax, %bx</span></samp>’ is equivalent
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to ‘<samp><span class="samp">movw %ax, %bx</span></samp>’; also, ‘<samp><span class="samp">mov $1, %bx</span></samp>’ is equivalent to
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‘<samp><span class="samp">movw $1, bx</span></samp>’. Note that this is incompatible with the AT&T Unix
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assembler which assumes that a missing mnemonic suffix implies long
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operand size. (This incompatibility does not affect compiler output
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since compilers always explicitly specify the mnemonic suffix.)
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<p>Almost all instructions have the same names in AT&T and Intel format.
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There are a few exceptions. The sign extend and zero extend
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instructions need two sizes to specify them. They need a size to
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sign/zero extend <em>from</em> and a size to zero extend <em>to</em>. This
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is accomplished by using two instruction mnemonic suffixes in AT&T
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syntax. Base names for sign extend and zero extend are
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‘<samp><span class="samp">movs...</span></samp>’ and ‘<samp><span class="samp">movz...</span></samp>’ in AT&T syntax (‘<samp><span class="samp">movsx</span></samp>’
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and ‘<samp><span class="samp">movzx</span></samp>’ in Intel syntax). The instruction mnemonic suffixes
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are tacked on to this base name, the <em>from</em> suffix before the
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<em>to</em> suffix. Thus, ‘<samp><span class="samp">movsbl %al, %edx</span></samp>’ is AT&T syntax for
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“move sign extend <em>from</em> %al <em>to</em> %edx.” Possible suffixes,
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thus, are ‘<samp><span class="samp">bl</span></samp>’ (from byte to long), ‘<samp><span class="samp">bw</span></samp>’ (from byte to word),
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‘<samp><span class="samp">wl</span></samp>’ (from word to long), ‘<samp><span class="samp">bq</span></samp>’ (from byte to quadruple word),
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‘<samp><span class="samp">wq</span></samp>’ (from word to quadruple word), and ‘<samp><span class="samp">lq</span></samp>’ (from long to
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quadruple word).
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<p><a name="index-encoding-options_002c-i386-1081"></a><a name="index-encoding-options_002c-x86_002d64-1082"></a>
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Different encoding options can be specified via optional mnemonic
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suffix. ‘<samp><span class="samp">.s</span></samp>’ suffix swaps 2 register operands in encoding when
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moving from one register to another. ‘<samp><span class="samp">.d8</span></samp>’ or ‘<samp><span class="samp">.d32</span></samp>’ suffix
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prefers 8bit or 32bit displacement in encoding.
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<p><a name="index-conversion-instructions_002c-i386-1083"></a><a name="index-i386-conversion-instructions-1084"></a><a name="index-conversion-instructions_002c-x86_002d64-1085"></a><a name="index-x86_002d64-conversion-instructions-1086"></a>The Intel-syntax conversion instructions
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<ul>
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<li>‘<samp><span class="samp">cbw</span></samp>’ — sign-extend byte in ‘<samp><span class="samp">%al</span></samp>’ to word in ‘<samp><span class="samp">%ax</span></samp>’,
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<li>‘<samp><span class="samp">cwde</span></samp>’ — sign-extend word in ‘<samp><span class="samp">%ax</span></samp>’ to long in ‘<samp><span class="samp">%eax</span></samp>’,
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<li>‘<samp><span class="samp">cwd</span></samp>’ — sign-extend word in ‘<samp><span class="samp">%ax</span></samp>’ to long in ‘<samp><span class="samp">%dx:%ax</span></samp>’,
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<li>‘<samp><span class="samp">cdq</span></samp>’ — sign-extend dword in ‘<samp><span class="samp">%eax</span></samp>’ to quad in ‘<samp><span class="samp">%edx:%eax</span></samp>’,
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<li>‘<samp><span class="samp">cdqe</span></samp>’ — sign-extend dword in ‘<samp><span class="samp">%eax</span></samp>’ to quad in ‘<samp><span class="samp">%rax</span></samp>’
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(x86-64 only),
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<li>‘<samp><span class="samp">cqo</span></samp>’ — sign-extend quad in ‘<samp><span class="samp">%rax</span></samp>’ to octuple in
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‘<samp><span class="samp">%rdx:%rax</span></samp>’ (x86-64 only),
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</ul>
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<p class="noindent">are called ‘<samp><span class="samp">cbtw</span></samp>’, ‘<samp><span class="samp">cwtl</span></samp>’, ‘<samp><span class="samp">cwtd</span></samp>’, ‘<samp><span class="samp">cltd</span></samp>’, ‘<samp><span class="samp">cltq</span></samp>’, and
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‘<samp><span class="samp">cqto</span></samp>’ in AT&T naming. <code>as</code> accepts either naming for these
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instructions.
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<p><a name="index-jump-instructions_002c-i386-1087"></a><a name="index-call-instructions_002c-i386-1088"></a><a name="index-jump-instructions_002c-x86_002d64-1089"></a><a name="index-call-instructions_002c-x86_002d64-1090"></a>Far call/jump instructions are ‘<samp><span class="samp">lcall</span></samp>’ and ‘<samp><span class="samp">ljmp</span></samp>’ in
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AT&T syntax, but are ‘<samp><span class="samp">call far</span></samp>’ and ‘<samp><span class="samp">jump far</span></samp>’ in Intel
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convention.
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<h5 class="subsubsection">9.15.4.2 AT&T Mnemonic versus Intel Mnemonic</h5>
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<p><a name="index-i386-mnemonic-compatibility-1091"></a><a name="index-mnemonic-compatibility_002c-i386-1092"></a>
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<code>as</code> supports assembly using Intel mnemonic.
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<code>.intel_mnemonic</code> selects Intel mnemonic with Intel syntax, and
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<code>.att_mnemonic</code> switches back to the usual AT&T mnemonic with AT&T
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syntax for compatibility with the output of <code>gcc</code>.
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Several x87 instructions, ‘<samp><span class="samp">fadd</span></samp>’, ‘<samp><span class="samp">fdiv</span></samp>’, ‘<samp><span class="samp">fdivp</span></samp>’,
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‘<samp><span class="samp">fdivr</span></samp>’, ‘<samp><span class="samp">fdivrp</span></samp>’, ‘<samp><span class="samp">fmul</span></samp>’, ‘<samp><span class="samp">fsub</span></samp>’, ‘<samp><span class="samp">fsubp</span></samp>’,
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‘<samp><span class="samp">fsubr</span></samp>’ and ‘<samp><span class="samp">fsubrp</span></samp>’, are implemented in AT&T System V/386
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assembler with different mnemonics from those in Intel IA32 specification.
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<code>gcc</code> generates those instructions with AT&T mnemonic.
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</body></html>
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