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64 lines
3.8 KiB
C
64 lines
3.8 KiB
C
4 years ago
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/**
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* \brief Component description for PAC
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*
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* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
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*
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* Subject to your compliance with these terms, you may use Microchip software and any derivatives
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* exclusively with Microchip products. It is your responsibility to comply with third party license
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* terms applicable to your use of third party software (including open source software) that may
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* accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY,
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* APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND
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* FITNESS FOR A PARTICULAR PURPOSE.
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*
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* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
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* MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT
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* EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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*/
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/* file generated from device description version 2019-11-25T06:55:46Z */
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#ifndef _SAMD21_PAC_COMPONENT_H_
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#define _SAMD21_PAC_COMPONENT_H_
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/* ************************************************************************** */
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/* SOFTWARE API DEFINITION FOR PAC */
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/* ************************************************************************** */
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/* -------- PAC_WPCLR : (PAC Offset: 0x00) (R/W 32) Write Protection Clear -------- */
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#define PAC_WPCLR_RESETVALUE _U_(0x00) /**< (PAC_WPCLR) Write Protection Clear Reset Value */
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#define PAC_WPCLR_WP_Pos _U_(1) /**< (PAC_WPCLR) Write Protection Clear Position */
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#define PAC_WPCLR_WP_Msk (_U_(0x7FFFFFFF) << PAC_WPCLR_WP_Pos) /**< (PAC_WPCLR) Write Protection Clear Mask */
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#define PAC_WPCLR_WP(value) (PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos))
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#define PAC_WPCLR_Msk _U_(0xFFFFFFFE) /**< (PAC_WPCLR) Register Mask */
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/* -------- PAC_WPSET : (PAC Offset: 0x04) (R/W 32) Write Protection Set -------- */
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#define PAC_WPSET_RESETVALUE _U_(0x00) /**< (PAC_WPSET) Write Protection Set Reset Value */
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#define PAC_WPSET_WP_Pos _U_(1) /**< (PAC_WPSET) Write Protection Set Position */
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#define PAC_WPSET_WP_Msk (_U_(0x7FFFFFFF) << PAC_WPSET_WP_Pos) /**< (PAC_WPSET) Write Protection Set Mask */
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#define PAC_WPSET_WP(value) (PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos))
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#define PAC_WPSET_Msk _U_(0xFFFFFFFE) /**< (PAC_WPSET) Register Mask */
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/** \brief PAC register offsets definitions */
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#define PAC_WPCLR_REG_OFST (0x00) /**< (PAC_WPCLR) Write Protection Clear Offset */
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#define PAC_WPSET_REG_OFST (0x04) /**< (PAC_WPSET) Write Protection Set Offset */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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/** \brief PAC register API structure */
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typedef struct
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{ /* Peripheral Access Controller */
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__IO uint32_t PAC_WPCLR; /**< Offset: 0x00 (R/W 32) Write Protection Clear */
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__IO uint32_t PAC_WPSET; /**< Offset: 0x04 (R/W 32) Write Protection Set */
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} pac_registers_t;
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _SAMD21_PAC_COMPONENT_H_ */
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