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162 lines
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4 years ago
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<div class="summary">
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="title">TcCount16 Struct Reference</div> </div>
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<div class="contents">
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<p>TC_COUNT16 hardware registers.
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<a href="structTcCount16.html#details">More...</a></p>
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<p><code>#include <<a class="el" href="tc_8h_source.html">tc.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:a95d341d2612817272305505427408ed0"><td class="memItemLeft" align="right" valign="top"><a id="a95d341d2612817272305505427408ed0"></a>
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__IO <a class="el" href="unionTC__CTRLA__Type.html">TC_CTRLA_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a95d341d2612817272305505427408ed0">CTRLA</a></td></tr>
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<tr class="memdesc:a95d341d2612817272305505427408ed0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00 (R/W 32) Control A. <br /></td></tr>
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<tr class="memitem:a9b86c67d0b2da1e57b3b79ef728cd8fb"><td class="memItemLeft" align="right" valign="top"><a id="a9b86c67d0b2da1e57b3b79ef728cd8fb"></a>
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__IO <a class="el" href="unionTC__CTRLBCLR__Type.html">TC_CTRLBCLR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a9b86c67d0b2da1e57b3b79ef728cd8fb">CTRLBCLR</a></td></tr>
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<tr class="memdesc:a9b86c67d0b2da1e57b3b79ef728cd8fb"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x04 (R/W 8) Control B Clear. <br /></td></tr>
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__IO <a class="el" href="unionTC__CTRLBSET__Type.html">TC_CTRLBSET_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a88bbb63998950bc7726d01c9ea1a42c6">CTRLBSET</a></td></tr>
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<tr class="memdesc:a88bbb63998950bc7726d01c9ea1a42c6"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x05 (R/W 8) Control B Set. <br /></td></tr>
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<tr class="memitem:a1e1467c54c95c2d5832ff38e39ad1a6a"><td class="memItemLeft" align="right" valign="top"><a id="a1e1467c54c95c2d5832ff38e39ad1a6a"></a>
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__IO <a class="el" href="unionTC__EVCTRL__Type.html">TC_EVCTRL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a1e1467c54c95c2d5832ff38e39ad1a6a">EVCTRL</a></td></tr>
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<tr class="memdesc:a1e1467c54c95c2d5832ff38e39ad1a6a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x06 (R/W 16) Event Control. <br /></td></tr>
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__IO <a class="el" href="unionTC__INTENCLR__Type.html">TC_INTENCLR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#ad1def93d6f20cbb31783a6a84bd4dffd">INTENCLR</a></td></tr>
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<tr class="memdesc:ad1def93d6f20cbb31783a6a84bd4dffd"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x08 (R/W 8) Interrupt Enable Clear. <br /></td></tr>
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__IO <a class="el" href="unionTC__INTENSET__Type.html">TC_INTENSET_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a6e801d2cfa907ef718181d562516d25b">INTENSET</a></td></tr>
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<tr class="memdesc:a6e801d2cfa907ef718181d562516d25b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x09 (R/W 8) Interrupt Enable Set. <br /></td></tr>
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__IO <a class="el" href="unionTC__INTFLAG__Type.html">TC_INTFLAG_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a6d2ddddf3183bc1cedc965ee936b4f13">INTFLAG</a></td></tr>
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<tr class="memdesc:a6d2ddddf3183bc1cedc965ee936b4f13"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0A (R/W 8) Interrupt Flag Status and Clear. <br /></td></tr>
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__IO <a class="el" href="unionTC__STATUS__Type.html">TC_STATUS_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#ad63decc5af36afb4a4163fde9dabc499">STATUS</a></td></tr>
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<tr class="memdesc:ad63decc5af36afb4a4163fde9dabc499"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0B (R/W 8) Status. <br /></td></tr>
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__IO <a class="el" href="unionTC__WAVE__Type.html">TC_WAVE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#aa9cde664debc82d67004ac5b39726128">WAVE</a></td></tr>
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<tr class="memdesc:aa9cde664debc82d67004ac5b39726128"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0C (R/W 8) Waveform Generation Control. <br /></td></tr>
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<tr class="memitem:a0844fd3262b5252bd39cbeee073d603e"><td class="memItemLeft" align="right" valign="top"><a id="a0844fd3262b5252bd39cbeee073d603e"></a>
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__IO <a class="el" href="unionTC__DRVCTRL__Type.html">TC_DRVCTRL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a0844fd3262b5252bd39cbeee073d603e">DRVCTRL</a></td></tr>
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<tr class="memdesc:a0844fd3262b5252bd39cbeee073d603e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0D (R/W 8) Control C. <br /></td></tr>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0x1]</td></tr>
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<tr class="separator:a702e88cd2051f296b7fff2417004c5a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8ed8f485b991e76d4abcf63e1c12545b"><td class="memItemLeft" align="right" valign="top"><a id="a8ed8f485b991e76d4abcf63e1c12545b"></a>
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__IO <a class="el" href="unionTC__DBGCTRL__Type.html">TC_DBGCTRL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a8ed8f485b991e76d4abcf63e1c12545b">DBGCTRL</a></td></tr>
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<tr class="memdesc:a8ed8f485b991e76d4abcf63e1c12545b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0F (R/W 8) Debug Control. <br /></td></tr>
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<tr class="separator:a8ed8f485b991e76d4abcf63e1c12545b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a763938a9ce3f6e22befb898291c0e662"><td class="memItemLeft" align="right" valign="top"><a id="a763938a9ce3f6e22befb898291c0e662"></a>
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__I <a class="el" href="unionTC__SYNCBUSY__Type.html">TC_SYNCBUSY_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a763938a9ce3f6e22befb898291c0e662">SYNCBUSY</a></td></tr>
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<tr class="memdesc:a763938a9ce3f6e22befb898291c0e662"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x10 (R/ 32) Synchronization Status. <br /></td></tr>
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<tr class="separator:a763938a9ce3f6e22befb898291c0e662"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acb9a47b2d1577305b71748c3e6a0d418"><td class="memItemLeft" align="right" valign="top"><a id="acb9a47b2d1577305b71748c3e6a0d418"></a>
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__IO <a class="el" href="unionTC__COUNT16__COUNT__Type.html">TC_COUNT16_COUNT_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#acb9a47b2d1577305b71748c3e6a0d418">COUNT</a></td></tr>
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<tr class="memdesc:acb9a47b2d1577305b71748c3e6a0d418"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x14 (R/W 16) COUNT16 Count. <br /></td></tr>
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<tr class="memitem:a10d933b3ed025e01204352edd88204f6"><td class="memItemLeft" align="right" valign="top"><a id="a10d933b3ed025e01204352edd88204f6"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved2</b> [0x6]</td></tr>
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<tr class="separator:a10d933b3ed025e01204352edd88204f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1380092d24a966edf4024957566b0b74"><td class="memItemLeft" align="right" valign="top"><a id="a1380092d24a966edf4024957566b0b74"></a>
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__IO <a class="el" href="unionTC__COUNT16__CC__Type.html">TC_COUNT16_CC_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a1380092d24a966edf4024957566b0b74">CC</a> [2]</td></tr>
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<tr class="memdesc:a1380092d24a966edf4024957566b0b74"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1C (R/W 16) COUNT16 Compare and Capture. <br /></td></tr>
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<tr class="memitem:a0e3698a4f3ccd6b1ba1ecba35710d2ea"><td class="memItemLeft" align="right" valign="top"><a id="a0e3698a4f3ccd6b1ba1ecba35710d2ea"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved3</b> [0x10]</td></tr>
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<tr class="separator:a0e3698a4f3ccd6b1ba1ecba35710d2ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a583f4c0bf178a75e00d1d7215744759f"><td class="memItemLeft" align="right" valign="top"><a id="a583f4c0bf178a75e00d1d7215744759f"></a>
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__IO <a class="el" href="unionTC__COUNT16__CCBUF__Type.html">TC_COUNT16_CCBUF_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structTcCount16.html#a583f4c0bf178a75e00d1d7215744759f">CCBUF</a> [2]</td></tr>
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<tr class="memdesc:a583f4c0bf178a75e00d1d7215744759f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x30 (R/W 16) COUNT16 Compare and Capture Buffer. <br /></td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>TC_COUNT16 hardware registers. </p>
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<p class="definition">Definition at line <a class="el" href="tc_8h_source.html#l00795">795</a> of file <a class="el" href="tc_8h_source.html">tc.h</a>.</p>
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</div><hr/>The documentation for this struct was generated from the following file:<ul>
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<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="tc_8h_source.html">tc.h</a></li>
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</ul>
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</div><!-- contents -->
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<hr class="footer"/><address class="footer"><small>
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