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111 lines
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111 lines
7.5 KiB
HTML
4 years ago
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<title>s390 Mnemonics - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="s390-Syntax.html#s390-Syntax" title="s390 Syntax">
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<link rel="prev" href="s390-Register.html#s390-Register" title="s390 Register">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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</head>
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<div class="node">
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<a name="s390-Mnemonics"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="s390-Operands.html#s390-Operands">s390 Operands</a>,
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Previous: <a rel="previous" accesskey="p" href="s390-Register.html#s390-Register">s390 Register</a>,
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Up: <a rel="up" accesskey="u" href="s390-Syntax.html#s390-Syntax">s390 Syntax</a>
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<hr>
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</div>
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<h5 class="subsubsection">9.38.3.2 Instruction Mnemonics</h5>
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<p><a name="index-instruction-mnemonics_002c-s390-1893"></a><a name="index-s390-instruction-mnemonics-1894"></a>
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All instructions documented in the Principles of Operation are supported
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with the mnemonic and order of operands as described.
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The instruction mnemonic identifies the instruction format
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(<a href="s390-Formats.html#s390-Formats">s390 Formats</a>) and the specific operation code for the instruction.
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For example, the ‘<samp><span class="samp">lr</span></samp>’ mnemonic denotes the instruction format ‘<samp><span class="samp">RR</span></samp>’
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with the operation code ‘<samp><span class="samp">0x18</span></samp>’.
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<p>The definition of the various mnemonics follows a scheme, where the first
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character usually hint at the type of the instruction:
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<pre class="display">
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<p><table summary=""><tr align="left"><td valign="top">a </td><td valign="top">add instruction, for example ‘<samp><span class="samp">al</span></samp>’ for add logical 32-bit
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<br></td></tr><tr align="left"><td valign="top">b </td><td valign="top">branch instruction, for example ‘<samp><span class="samp">bc</span></samp>’ for branch on condition
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<br></td></tr><tr align="left"><td valign="top">c </td><td valign="top">compare or convert instruction, for example ‘<samp><span class="samp">cr</span></samp>’ for compare
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register 32-bit
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<br></td></tr><tr align="left"><td valign="top">d </td><td valign="top">divide instruction, for example ‘<samp><span class="samp">dlr</span></samp>’ devide logical register
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64-bit to 32-bit
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<br></td></tr><tr align="left"><td valign="top">i </td><td valign="top">insert instruction, for example ‘<samp><span class="samp">ic</span></samp>’ insert character
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<br></td></tr><tr align="left"><td valign="top">l </td><td valign="top">load instruction, for example ‘<samp><span class="samp">ltr</span></samp>’ load and test register
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<br></td></tr><tr align="left"><td valign="top">mv </td><td valign="top">move instruction, for example ‘<samp><span class="samp">mvc</span></samp>’ move character
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<br></td></tr><tr align="left"><td valign="top">m </td><td valign="top">multiply instruction, for example ‘<samp><span class="samp">mh</span></samp>’ multiply halfword
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<br></td></tr><tr align="left"><td valign="top">n </td><td valign="top">and instruction, for example ‘<samp><span class="samp">ni</span></samp>’ and immediate
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<br></td></tr><tr align="left"><td valign="top">o </td><td valign="top">or instruction, for example ‘<samp><span class="samp">oc</span></samp>’ or character
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<br></td></tr><tr align="left"><td valign="top">sla, sll </td><td valign="top">shift left single instruction
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<br></td></tr><tr align="left"><td valign="top">sra, srl </td><td valign="top">shift right single instruction
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<br></td></tr><tr align="left"><td valign="top">st </td><td valign="top">store instruction, for example ‘<samp><span class="samp">stm</span></samp>’ store multiple
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<br></td></tr><tr align="left"><td valign="top">s </td><td valign="top">subtract instruction, for example ‘<samp><span class="samp">slr</span></samp>’ subtract
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logical 32-bit
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<br></td></tr><tr align="left"><td valign="top">t </td><td valign="top">test or translate instruction, of example ‘<samp><span class="samp">tm</span></samp>’ test under mask
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<br></td></tr><tr align="left"><td valign="top">x </td><td valign="top">exclusive or instruction, for example ‘<samp><span class="samp">xc</span></samp>’ exclusive or
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character
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<br></td></tr></table>
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</pre>
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<p>Certain characters at the end of the mnemonic may describe a property
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of the instruction:
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<pre class="display">
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<p><table summary=""><tr align="left"><td valign="top">c </td><td valign="top">the instruction uses a 8-bit character operand
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<br></td></tr><tr align="left"><td valign="top">f </td><td valign="top">the instruction extends a 32-bit operand to 64 bit
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<br></td></tr><tr align="left"><td valign="top">g </td><td valign="top">the operands are treated as 64-bit values
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<br></td></tr><tr align="left"><td valign="top">h </td><td valign="top">the operand uses a 16-bit halfword operand
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<br></td></tr><tr align="left"><td valign="top">i </td><td valign="top">the instruction uses an immediate operand
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<br></td></tr><tr align="left"><td valign="top">l </td><td valign="top">the instruction uses unsigned, logical operands
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<br></td></tr><tr align="left"><td valign="top">m </td><td valign="top">the instruction uses a mask or operates on multiple values
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<br></td></tr><tr align="left"><td valign="top">r </td><td valign="top">if r is the last character, the instruction operates on registers
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<br></td></tr><tr align="left"><td valign="top">y </td><td valign="top">the instruction uses 20-bit displacements
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<br></td></tr></table>
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</pre>
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<p>There are many exceptions to the scheme outlined in the above lists, in
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particular for the priviledged instructions. For non-priviledged
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instruction it works quite well, for example the instruction ‘<samp><span class="samp">clgfr</span></samp>’
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c: compare instruction, l: unsigned operands, g: 64-bit operands,
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f: 32- to 64-bit extension, r: register operands. The instruction compares
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an 64-bit value in a register with the zero extended 32-bit value from
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a second register.
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For a complete list of all mnemonics see appendix B in the Principles
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of Operation.
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</body></html>
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