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130 lines
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130 lines
8.0 KiB
HTML
4 years ago
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<html lang="en">
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<title>RX-Opts - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="RX_002dDependent.html#RX_002dDependent" title="RX-Dependent">
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<link rel="next" href="RX_002dModifiers.html#RX_002dModifiers" title="RX-Modifiers">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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--></style>
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</head>
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<body>
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<div class="node">
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<a name="RX-Opts"></a>
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<a name="RX_002dOpts"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="RX_002dModifiers.html#RX_002dModifiers">RX-Modifiers</a>,
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Up: <a rel="up" accesskey="u" href="RX_002dDependent.html#RX_002dDependent">RX-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.37.1 RX Options</h4>
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<p><a name="index-options_002c-RX-1838"></a><a name="index-RX-options-1839"></a>
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The Renesas RX port of <code>as</code> has a few target specfic
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command line options:
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<a name="index-g_t_0040samp_007b_002dm32bit_002ddoubles_007d-1840"></a>
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<dl><dt><code>-m32bit-doubles</code><dd>This option controls the ABI and indicates to use a 32-bit float ABI.
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It has no effect on the assembled instructions, but it does influence
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the behaviour of the ‘<samp><span class="samp">.double</span></samp>’ pseudo-op.
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This is the default.
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<p><a name="index-g_t_0040samp_007b_002dm64bit_002ddoubles_007d-1841"></a><br><dt><code>-m64bit-doubles</code><dd>This option controls the ABI and indicates to use a 64-bit float ABI.
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It has no effect on the assembled instructions, but it does influence
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the behaviour of the ‘<samp><span class="samp">.double</span></samp>’ pseudo-op.
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<p><a name="index-g_t_0040samp_007b_002dmbig_002dendian_007d-1842"></a><br><dt><code>-mbig-endian</code><dd>This option controls the ABI and indicates to use a big-endian data
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ABI. It has no effect on the assembled instructions, but it does
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influence the behaviour of the ‘<samp><span class="samp">.short</span></samp>’, ‘<samp><span class="samp">.hword</span></samp>’, ‘<samp><span class="samp">.int</span></samp>’,
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‘<samp><span class="samp">.word</span></samp>’, ‘<samp><span class="samp">.long</span></samp>’, ‘<samp><span class="samp">.quad</span></samp>’ and ‘<samp><span class="samp">.octa</span></samp>’ pseudo-ops.
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<p><a name="index-g_t_0040samp_007b_002dmlittle_002dendian_007d-1843"></a><br><dt><code>-mlittle-endian</code><dd>This option controls the ABI and indicates to use a little-endian data
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ABI. It has no effect on the assembled instructions, but it does
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influence the behaviour of the ‘<samp><span class="samp">.short</span></samp>’, ‘<samp><span class="samp">.hword</span></samp>’, ‘<samp><span class="samp">.int</span></samp>’,
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‘<samp><span class="samp">.word</span></samp>’, ‘<samp><span class="samp">.long</span></samp>’, ‘<samp><span class="samp">.quad</span></samp>’ and ‘<samp><span class="samp">.octa</span></samp>’ pseudo-ops.
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This is the default.
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<p><a name="index-g_t_0040samp_007b_002dmuse_002dconventional_002dsection_002dnames_007d-1844"></a><br><dt><code>-muse-conventional-section-names</code><dd>This option controls the default names given to the code (.text),
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initialised data (.data) and uninitialised data sections (.bss).
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<p><a name="index-g_t_0040samp_007b_002dmuse_002drenesas_002dsection_002dnames_007d-1845"></a><br><dt><code>-muse-renesas-section-names</code><dd>This option controls the default names given to the code (.P),
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initialised data (.D_1) and uninitialised data sections (.B_1).
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This is the default.
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<p><a name="index-g_t_0040samp_007b_002dmsmall_002ddata_002dlimit_007d-1846"></a><br><dt><code>-msmall-data-limit</code><dd>This option tells the assembler that the small data limit feature of
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the RX port of GCC is being used. This results in the assembler
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generating an undefined reference to a symbol called <code>__gp</code> for
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use by the relocations that are needed to support the small data limit
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feature. This option is not enabled by default as it would otherwise
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pollute the symbol table.
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<p><a name="index-g_t_0040samp_007b_002dmpid_007d-1847"></a><br><dt><code>-mpid</code><dd>This option tells the assembler that the position independent data of the
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RX port of GCC is being used. This results in the assembler
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generating an undefined reference to a symbol called <code>__pid_base</code>,
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and also setting the RX_PID flag bit in the e_flags field of the ELF
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header of the object file.
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<p><a name="index-g_t_0040samp_007b_002dmint_002dregister_007d-1848"></a><br><dt><code>-mint-register=</code><var>num</var><dd>This option tells the assembler how many registers have been reserved
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for use by interrupt handlers. This is needed in order to compute the
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correct values for the <code>%gpreg</code> and <code>%pidreg</code> meta registers.
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<p><a name="index-g_t_0040samp_007b_002dmgcc_002dabi_007d-1849"></a><br><dt><code>-mgcc-abi</code><dd>This option tells the assembler that the old GCC ABI is being used by
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the assembled code. With this version of the ABI function arguments
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that are passed on the stack are aligned to a 32-bit boundary.
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<p><a name="index-g_t_0040samp_007b_002dmrx_002dabi_007d-1850"></a><br><dt><code>-mrx-abi</code><dd>This option tells the assembler that the official RX ABI is being used
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by the assembled code. With this version of the ABI function
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arguments that are passed on the stack are aligned to their natural
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alignments. This option is the default.
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<p><a name="index-g_t_0040samp_007b_002dmcpu_003d_007d-1851"></a><br><dt><code>-mcpu=</code><var>name</var><dd>This option tells the assembler the target CPU type. Currently the
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<code>rx200</code>, <code>rx600</code> and <code>rx610</code> are recognised as valid
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cpu names. Attempting to assemble an instruction not supported by the
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indicated cpu type will result in an error message being generated.
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<p><a name="index-g_t_0040samp_007b_002dmno_002dallow_002dstring_002dinsns_007d-1852"></a><br><dt><code>-mno-allow-string-insns</code><dd>This option tells the assembler to mark the object file that it is
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building as one that does not use the string instructions
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<code>SMOVF</code>, <code>SCMPU</code>, <code>SMOVB</code>, <code>SMOVU</code>, <code>SUNTIL</code>
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<code>SWHILE</code> or the <code>RMPA</code> instruction. In addition the mark
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tells the linker to complain if an attempt is made to link the binary
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with another one that does use any of these instructions.
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<p>Note - the inverse of this option, <code>-mallow-string-insns</code>, is
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not needed. The assembler automatically detects the use of the
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the instructions in the source code and labels the resulting
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object file appropriately. If no string instructions are detected
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then the object file is labelled as being one that can be linked with
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either string-using or string-banned object files.
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</dl>
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</body></html>
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