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139 lines
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139 lines
8.2 KiB
HTML
4 years ago
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<html lang="en">
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<head>
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<title>M68HC11-Syntax - Using as</title>
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<meta http-equiv="Content-Type" content="text/html">
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<meta name="description" content="Using as">
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<meta name="generator" content="makeinfo 4.13">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="M68HC11_002dDependent.html#M68HC11_002dDependent" title="M68HC11-Dependent">
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<link rel="prev" href="M68HC11_002dOpts.html#M68HC11_002dOpts" title="M68HC11-Opts">
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<link rel="next" href="M68HC11_002dModifiers.html#M68HC11_002dModifiers" title="M68HC11-Modifiers">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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-->
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<style type="text/css"><!--
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--></style>
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</head>
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<body>
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<div class="node">
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<a name="M68HC11-Syntax"></a>
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<a name="M68HC11_002dSyntax"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="M68HC11_002dModifiers.html#M68HC11_002dModifiers">M68HC11-Modifiers</a>,
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Previous: <a rel="previous" accesskey="p" href="M68HC11_002dOpts.html#M68HC11_002dOpts">M68HC11-Opts</a>,
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Up: <a rel="up" accesskey="u" href="M68HC11_002dDependent.html#M68HC11_002dDependent">M68HC11-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.24.2 Syntax</h4>
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<p><a name="index-M68HC11-syntax-1409"></a><a name="index-syntax_002c-M68HC11-1410"></a>
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In the M68HC11 syntax, the instruction name comes first and it may
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be followed by one or several operands (up to three). Operands are
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separated by comma (‘<samp><span class="samp">,</span></samp>’). In the normal mode,
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<code>as</code> will complain if too many operands are specified for
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a given instruction. In the MRI mode (turned on with ‘<samp><span class="samp">-M</span></samp>’ option),
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it will treat them as comments. Example:
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<pre class="smallexample"> inx
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lda #23
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bset 2,x #4
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brclr *bot #8 foo
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</pre>
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<p><a name="index-line-comment-character_002c-M68HC11-1411"></a><a name="index-M68HC11-line-comment-character-1412"></a>The presence of a ‘<samp><span class="samp">;</span></samp>’ character or a ‘<samp><span class="samp">!</span></samp>’ character anywhere
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on a line indicates the start of a comment that extends to the end of
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that line.
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<p>A ‘<samp><span class="samp">*</span></samp>’ or a ‘<samp><span class="samp">#</span></samp>’ character at the start of a line also
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introduces a line comment, but these characters do not work elsewhere
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on the line. If the first character of the line is a ‘<samp><span class="samp">#</span></samp>’ then as
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well as starting a comment, the line could also be logical line number
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directive (see <a href="Comments.html#Comments">Comments</a>) or a preprocessor control command
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(see <a href="Preprocessing.html#Preprocessing">Preprocessing</a>).
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<p><a name="index-line-separator_002c-M68HC11-1413"></a><a name="index-statement-separator_002c-M68HC11-1414"></a><a name="index-M68HC11-line-separator-1415"></a>The M68HC11 assembler does not currently support a line separator
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character.
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<p><a name="index-M68HC11-addressing-modes-1416"></a><a name="index-addressing-modes_002c-M68HC11-1417"></a>The following addressing modes are understood for 68HC11 and 68HC12:
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<dl>
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<dt><dfn>Immediate</dfn><dd>‘<samp><span class="samp">#</span><var>number</var></samp>’
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<br><dt><dfn>Address Register</dfn><dd>‘<samp><var>number</var><span class="samp">,X</span></samp>’, ‘<samp><var>number</var><span class="samp">,Y</span></samp>’
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<p>The <var>number</var> may be omitted in which case 0 is assumed.
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<br><dt><dfn>Direct Addressing mode</dfn><dd>‘<samp><span class="samp">*</span><var>symbol</var></samp>’, or ‘<samp><span class="samp">*</span><var>digits</var></samp>’
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<br><dt><dfn>Absolute</dfn><dd>‘<samp><var>symbol</var></samp>’, or ‘<samp><var>digits</var></samp>’
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</dl>
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<p>The M68HC12 has other more complex addressing modes. All of them
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are supported and they are represented below:
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<dl>
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<dt><dfn>Constant Offset Indexed Addressing Mode</dfn><dd>‘<samp><var>number</var><span class="samp">,</span><var>reg</var></samp>’
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<p>The <var>number</var> may be omitted in which case 0 is assumed.
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The register can be either ‘<samp><span class="samp">X</span></samp>’, ‘<samp><span class="samp">Y</span></samp>’, ‘<samp><span class="samp">SP</span></samp>’ or
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‘<samp><span class="samp">PC</span></samp>’. The assembler will use the smaller post-byte definition
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according to the constant value (5-bit constant offset, 9-bit constant
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offset or 16-bit constant offset). If the constant is not known by
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the assembler it will use the 16-bit constant offset post-byte and the value
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will be resolved at link time.
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<br><dt><dfn>Offset Indexed Indirect</dfn><dd>‘<samp><span class="samp">[</span><var>number</var><span class="samp">,</span><var>reg</var><span class="samp">]</span></samp>’
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<p>The register can be either ‘<samp><span class="samp">X</span></samp>’, ‘<samp><span class="samp">Y</span></samp>’, ‘<samp><span class="samp">SP</span></samp>’ or ‘<samp><span class="samp">PC</span></samp>’.
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<br><dt><dfn>Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement</dfn><dd>‘<samp><var>number</var><span class="samp">,-</span><var>reg</var></samp>’
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‘<samp><var>number</var><span class="samp">,+</span><var>reg</var></samp>’
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‘<samp><var>number</var><span class="samp">,</span><var>reg</var><span class="samp">-</span></samp>’
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‘<samp><var>number</var><span class="samp">,</span><var>reg</var><span class="samp">+</span></samp>’
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<p>The number must be in the range ‘<samp><span class="samp">-8</span></samp>’..‘<samp><span class="samp">+8</span></samp>’ and must not be 0.
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The register can be either ‘<samp><span class="samp">X</span></samp>’, ‘<samp><span class="samp">Y</span></samp>’, ‘<samp><span class="samp">SP</span></samp>’ or ‘<samp><span class="samp">PC</span></samp>’.
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<br><dt><dfn>Accumulator Offset</dfn><dd>‘<samp><var>acc</var><span class="samp">,</span><var>reg</var></samp>’
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<p>The accumulator register can be either ‘<samp><span class="samp">A</span></samp>’, ‘<samp><span class="samp">B</span></samp>’ or ‘<samp><span class="samp">D</span></samp>’.
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The register can be either ‘<samp><span class="samp">X</span></samp>’, ‘<samp><span class="samp">Y</span></samp>’, ‘<samp><span class="samp">SP</span></samp>’ or ‘<samp><span class="samp">PC</span></samp>’.
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<br><dt><dfn>Accumulator D offset indexed-indirect</dfn><dd>‘<samp><span class="samp">[D,</span><var>reg</var><span class="samp">]</span></samp>’
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<p>The register can be either ‘<samp><span class="samp">X</span></samp>’, ‘<samp><span class="samp">Y</span></samp>’, ‘<samp><span class="samp">SP</span></samp>’ or ‘<samp><span class="samp">PC</span></samp>’.
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</dl>
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<p>For example:
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<pre class="smallexample"> ldab 1024,sp
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ldd [10,x]
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orab 3,+x
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stab -2,y-
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ldx a,pc
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sty [d,sp]
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</pre>
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</body></html>
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