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<h4 class="subsection">9.27.5 Directives to override the ISA level</h4>
<p><a name="index-MIPS-ISA-override-1496"></a><a name="index-g_t_0040code_007b_002eset-mips_0040var_007bn_007d_007d-1497"></a><span class="sc">gnu</span> <code>as</code> supports an additional directive to change
the MIPS Instruction Set Architecture level on the fly: <code>.set
mips</code><var>n</var>. <var>n</var> should be a number from 0 to 5, or 32, 32r2, 32r3,
32r5, 32r6, 64, 64r2, 64r3, 64r5 or 64r6.
The values other than 0 make the assembler accept instructions
for the corresponding ISA level, from that point on in the
assembly. <code>.set mips</code><var>n</var> affects not only which instructions
are permitted, but also how certain macros are expanded. <code>.set
mips0</code> restores the ISA level to its original level: either the
level you selected with command line options, or the default for your
configuration. You can use this feature to permit specific MIPS III
instructions while assembling in 32 bit mode. Use this directive with
care!
<p><a name="index-MIPS-CPU-override-1498"></a><a name="index-g_t_0040code_007b_002eset-arch_003d_0040var_007bcpu_007d_007d-1499"></a>The <code>.set arch=</code><var>cpu</var> directive provides even finer control.
It changes the effective CPU target and allows the assembler to use
instructions specific to a particular CPU. All CPUs supported by the
&lsquo;<samp><span class="samp">-march</span></samp>&rsquo; command line option are also selectable by this directive.
The original value is restored by <code>.set arch=default</code>.
<p>The directive <code>.set mips16</code> puts the assembler into MIPS 16 mode,
in which it will assemble instructions for the MIPS 16 processor. Use
<code>.set nomips16</code> to return to normal 32 bit mode.
<p>Traditional MIPS assemblers do not support this directive.
<p>The directive <code>.set micromips</code> puts the assembler into microMIPS mode,
in which it will assemble instructions for the microMIPS processor. Use
<code>.set nomicromips</code> to return to normal 32 bit mode.
<p>Traditional MIPS assemblers do not support this directive.
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