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106 lines
5.5 KiB
HTML
106 lines
5.5 KiB
HTML
4 years ago
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<title>Visium Options - Using the GNU Compiler Collection (GCC)</title>
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<meta name="description" content="Using the GNU Compiler Collection (GCC)">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Submodel-Options.html#Submodel-Options" title="Submodel Options">
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<link rel="prev" href="VAX-Options.html#VAX-Options" title="VAX Options">
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<link rel="next" href="VMS-Options.html#VMS-Options" title="VMS Options">
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Copyright (C) 1988-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3 or
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any later version published by the Free Software Foundation; with the
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Invariant Sections being ``Funding Free Software'', the Front-Cover
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(see below). A copy of the license is included in the section entitled
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(a) The FSF's Front-Cover Text is:
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A GNU Manual
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(b) The FSF's Back-Cover Text is:
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</head>
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<body>
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<div class="node">
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<a name="Visium-Options"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="VMS-Options.html#VMS-Options">VMS Options</a>,
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Previous: <a rel="previous" accesskey="p" href="VAX-Options.html#VAX-Options">VAX Options</a>,
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Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel-Options">Submodel Options</a>
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<hr>
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</div>
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<h4 class="subsection">3.17.50 Visium Options</h4>
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<p><a name="index-Visium-options-2633"></a>
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<dl>
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<dt><code>-mdebug</code><dd><a name="index-mdebug-2634"></a>A program which performs file I/O and is destined to run on an MCM target
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should be linked with this option. It causes the libraries libc.a and
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libdebug.a to be linked. The program should be run on the target under
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the control of the GDB remote debugging stub.
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<br><dt><code>-msim</code><dd><a name="index-msim-2635"></a>A program which performs file I/O and is destined to run on the simulator
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should be linked with option. This causes libraries libc.a and libsim.a to
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be linked.
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<br><dt><code>-mfpu</code><dt><code>-mhard-float</code><dd><a name="index-mfpu-2636"></a><a name="index-mhard_002dfloat-2637"></a>Generate code containing floating-point instructions. This is the
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default.
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<br><dt><code>-mno-fpu</code><dt><code>-msoft-float</code><dd><a name="index-mno_002dfpu-2638"></a><a name="index-msoft_002dfloat-2639"></a>Generate code containing library calls for floating-point.
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<p><samp><span class="option">-msoft-float</span></samp> changes the calling convention in the output file;
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therefore, it is only useful if you compile <em>all</em> of a program with
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this option. In particular, you need to compile <samp><span class="file">libgcc.a</span></samp>, the
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library that comes with GCC, with <samp><span class="option">-msoft-float</span></samp> in order for
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this to work.
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<br><dt><code>-mcpu=</code><var>cpu_type</var><dd><a name="index-mcpu-2640"></a>Set the instruction set, register set, and instruction scheduling parameters
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for machine type <var>cpu_type</var>. Supported values for <var>cpu_type</var> are
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‘<samp><span class="samp">mcm</span></samp>’, ‘<samp><span class="samp">gr5</span></samp>’ and ‘<samp><span class="samp">gr6</span></samp>’.
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<p>‘<samp><span class="samp">mcm</span></samp>’ is a synonym of ‘<samp><span class="samp">gr5</span></samp>’ present for backward compatibility.
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<p>By default (unless configured otherwise), GCC generates code for the GR5
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variant of the Visium architecture.
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<p>With <samp><span class="option">-mcpu=gr6</span></samp>, GCC generates code for the GR6 variant of the Visium
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architecture. The only difference from GR5 code is that the compiler will
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generate block move instructions.
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<br><dt><code>-mtune=</code><var>cpu_type</var><dd><a name="index-mtune-2641"></a>Set the instruction scheduling parameters for machine type <var>cpu_type</var>,
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but do not set the instruction set or register set that the option
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<samp><span class="option">-mcpu=</span><var>cpu_type</var></samp> would.
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<br><dt><code>-msv-mode</code><dd><a name="index-msv_002dmode-2642"></a>Generate code for the supervisor mode, where there are no restrictions on
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the access to general registers. This is the default.
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<br><dt><code>-muser-mode</code><dd><a name="index-muser_002dmode-2643"></a>Generate code for the user mode, where the access to some general registers
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is forbidden: on the GR5, registers r24 to r31 cannot be accessed in this
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mode; on the GR6, only registers r29 to r31 are affected.
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</dl>
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</body></html>
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