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Igloo/testdir/.igloo/testdir.lss

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testdir.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000264 00000000 00000000 00010000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .relocate 00000000 20000000 20000000 00010264 2**0
CONTENTS
2 .bss 0000001c 20000000 20000000 00020000 2**2
ALLOC
3 .stack 00002004 2000001c 2000001c 00020000 2**0
ALLOC
4 .ARM.attributes 00000028 00000000 00000000 00010264 2**0
CONTENTS, READONLY
5 .comment 0000001e 00000000 00000000 0001028c 2**0
CONTENTS, READONLY
6 .debug_info 000007f6 00000000 00000000 000102aa 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
7 .debug_abbrev 000002a3 00000000 00000000 00010aa0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
8 .debug_aranges 00000048 00000000 00000000 00010d43 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
9 .debug_ranges 000000f0 00000000 00000000 00010d8b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
10 .debug_macro 00012b53 00000000 00000000 00010e7b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
11 .debug_line 000007ad 00000000 00000000 000239ce 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
12 .debug_str 00093ff8 00000000 00000000 0002417b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_frame 000000d8 00000000 00000000 000b8174 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_loc 0000027c 00000000 00000000 000b824c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
00000000 <exception_table>:
0: 20 20 00 20 fd 00 00 00 f9 00 00 00 f9 00 00 00 . ............
...
2c: f9 00 00 00 00 00 00 00 00 00 00 00 f9 00 00 00 ................
3c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
4c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
5c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
6c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
7c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
8c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
9c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
ac: f9 00 00 00 ....
000000b0 <__do_global_dtors_aux>:
b0: b510 push {r4, lr}
b2: 4c06 ldr r4, [pc, #24] ; (cc <__do_global_dtors_aux+0x1c>)
b4: 7823 ldrb r3, [r4, #0]
b6: 2b00 cmp r3, #0
b8: d107 bne.n ca <__do_global_dtors_aux+0x1a>
ba: 4b05 ldr r3, [pc, #20] ; (d0 <__do_global_dtors_aux+0x20>)
bc: 2b00 cmp r3, #0
be: d002 beq.n c6 <__do_global_dtors_aux+0x16>
c0: 4804 ldr r0, [pc, #16] ; (d4 <__do_global_dtors_aux+0x24>)
c2: e000 b.n c6 <__do_global_dtors_aux+0x16>
c4: bf00 nop
c6: 2301 movs r3, #1
c8: 7023 strb r3, [r4, #0]
ca: bd10 pop {r4, pc}
cc: 20000000 .word 0x20000000
d0: 00000000 .word 0x00000000
d4: 00000264 .word 0x00000264
000000d8 <frame_dummy>:
d8: 4b04 ldr r3, [pc, #16] ; (ec <frame_dummy+0x14>)
da: b510 push {r4, lr}
dc: 2b00 cmp r3, #0
de: d003 beq.n e8 <frame_dummy+0x10>
e0: 4903 ldr r1, [pc, #12] ; (f0 <frame_dummy+0x18>)
e2: 4804 ldr r0, [pc, #16] ; (f4 <frame_dummy+0x1c>)
e4: e000 b.n e8 <frame_dummy+0x10>
e6: bf00 nop
e8: bd10 pop {r4, pc}
ea: 46c0 nop ; (mov r8, r8)
ec: 00000000 .word 0x00000000
f0: 20000004 .word 0x20000004
f4: 00000264 .word 0x00000264
000000f8 <Dummy_Handler>:
/**
* \brief Default interrupt handler for unused IRQs.
*/
void Dummy_Handler(void)
{
while (1) {
f8: e7fe b.n f8 <Dummy_Handler>
...
000000fc <Reset_Handler>:
if (pSrc != pDest) {
fc: 4913 ldr r1, [pc, #76] ; (14c <Reset_Handler+0x50>)
fe: 4814 ldr r0, [pc, #80] ; (150 <Reset_Handler+0x54>)
{
100: b510 push {r4, lr}
if (pSrc != pDest) {
102: 4281 cmp r1, r0
104: d00a beq.n 11c <Reset_Handler+0x20>
*pDest++ = *pSrc++;
106: 4b13 ldr r3, [pc, #76] ; (154 <Reset_Handler+0x58>)
108: 1ec4 subs r4, r0, #3
10a: 2200 movs r2, #0
10c: 42a3 cmp r3, r4
10e: d303 bcc.n 118 <Reset_Handler+0x1c>
110: 3303 adds r3, #3
112: 1a1a subs r2, r3, r0
114: 0892 lsrs r2, r2, #2
116: 0092 lsls r2, r2, #2
118: 4b0f ldr r3, [pc, #60] ; (158 <Reset_Handler+0x5c>)
11a: 4798 blx r3
*pDest++ = 0;
11c: 480f ldr r0, [pc, #60] ; (15c <Reset_Handler+0x60>)
11e: 4b10 ldr r3, [pc, #64] ; (160 <Reset_Handler+0x64>)
120: 1ec1 subs r1, r0, #3
122: 2200 movs r2, #0
124: 4299 cmp r1, r3
126: d803 bhi.n 130 <Reset_Handler+0x34>
128: 3303 adds r3, #3
12a: 1a1a subs r2, r3, r0
12c: 0892 lsrs r2, r2, #2
12e: 0092 lsls r2, r2, #2
130: 2100 movs r1, #0
132: 4b0c ldr r3, [pc, #48] ; (164 <Reset_Handler+0x68>)
134: 4798 blx r3
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
136: 22ff movs r2, #255 ; 0xff
138: 4b0b ldr r3, [pc, #44] ; (168 <Reset_Handler+0x6c>)
13a: 4393 bics r3, r2
13c: 4a0b ldr r2, [pc, #44] ; (16c <Reset_Handler+0x70>)
13e: 6093 str r3, [r2, #8]
__libc_init_array();
140: 4b0b ldr r3, [pc, #44] ; (170 <Reset_Handler+0x74>)
142: 4798 blx r3
main();
144: 4b0b ldr r3, [pc, #44] ; (174 <Reset_Handler+0x78>)
146: 4798 blx r3
while (1);
148: e7fe b.n 148 <Reset_Handler+0x4c>
14a: 46c0 nop ; (mov r8, r8)
14c: 00000264 .word 0x00000264
150: 20000000 .word 0x20000000
154: 20000000 .word 0x20000000
158: 00000221 .word 0x00000221
15c: 20000000 .word 0x20000000
160: 2000001c .word 0x2000001c
164: 00000233 .word 0x00000233
168: 00000000 .word 0x00000000
16c: e000ed00 .word 0xe000ed00
170: 000001d9 .word 0x000001d9
174: 00000179 .word 0x00000179
00000178 <main>:
void init_pin(int port, int pin)
{
uint32_t* dir_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_DIR_OFF));
*dir_reg |= (1 << pin);
178: 4a13 ldr r2, [pc, #76] ; (1c8 <main+0x50>)
17a: 4b14 ldr r3, [pc, #80] ; (1cc <main+0x54>)
17c: 6811 ldr r1, [r2, #0]
}
void clr_pin(int port, int pin)
{
uint32_t* out_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_OUT_OFF));
*out_reg &= ~(1 << pin);
17e: 2080 movs r0, #128 ; 0x80
*dir_reg |= (1 << pin);
180: 430b orrs r3, r1
*out_reg &= ~(1 << pin);
182: 2102 movs r1, #2
{
184: b530 push {r4, r5, lr}
*dir_reg |= (1 << pin);
186: 6013 str r3, [r2, #0]
*out_reg &= ~(1 << pin);
188: 4c11 ldr r4, [pc, #68] ; (1d0 <main+0x58>)
18a: 4a12 ldr r2, [pc, #72] ; (1d4 <main+0x5c>)
18c: 05c0 lsls r0, r0, #23
18e: 25fa movs r5, #250 ; 0xfa
190: 6813 ldr r3, [r2, #0]
192: 006d lsls r5, r5, #1
194: 438b bics r3, r1
196: 4303 orrs r3, r0
198: 6013 str r3, [r2, #0]
{
19a: 2364 movs r3, #100 ; 0x64
asm volatile("nop");
19c: 46c0 nop ; (mov r8, r8)
for(i=0;i<100;i++)
19e: 3b01 subs r3, #1
1a0: 2b00 cmp r3, #0
1a2: d1fb bne.n 19c <main+0x24>
for(;n>0;n--)
1a4: 3d01 subs r5, #1
1a6: 2d00 cmp r5, #0
1a8: d1f7 bne.n 19a <main+0x22>
*out_reg |= (1 << pin);
1aa: 25fa movs r5, #250 ; 0xfa
*out_reg &= ~(1 << pin);
1ac: 6813 ldr r3, [r2, #0]
*out_reg |= (1 << pin);
1ae: 006d lsls r5, r5, #1
*out_reg &= ~(1 << pin);
1b0: 4023 ands r3, r4
*out_reg |= (1 << pin);
1b2: 430b orrs r3, r1
1b4: 6013 str r3, [r2, #0]
*out_reg &= ~(1 << pin);
1b6: 2364 movs r3, #100 ; 0x64
asm volatile("nop");
1b8: 46c0 nop ; (mov r8, r8)
for(i=0;i<100;i++)
1ba: 3b01 subs r3, #1
1bc: 2b00 cmp r3, #0
1be: d1fb bne.n 1b8 <main+0x40>
for(;n>0;n--)
1c0: 3d01 subs r5, #1
1c2: 2d00 cmp r5, #0
1c4: d1f7 bne.n 1b6 <main+0x3e>
1c6: e7e2 b.n 18e <main+0x16>
1c8: 41004480 .word 0x41004480
1cc: 40000002 .word 0x40000002
1d0: bfffffff .word 0xbfffffff
1d4: 41004490 .word 0x41004490
000001d8 <__libc_init_array>:
1d8: b570 push {r4, r5, r6, lr}
1da: 2600 movs r6, #0
1dc: 4d0c ldr r5, [pc, #48] ; (210 <__libc_init_array+0x38>)
1de: 4c0d ldr r4, [pc, #52] ; (214 <__libc_init_array+0x3c>)
1e0: 1b64 subs r4, r4, r5
1e2: 10a4 asrs r4, r4, #2
1e4: 42a6 cmp r6, r4
1e6: d109 bne.n 1fc <__libc_init_array+0x24>
1e8: 2600 movs r6, #0
1ea: f000 f82b bl 244 <_init>
1ee: 4d0a ldr r5, [pc, #40] ; (218 <__libc_init_array+0x40>)
1f0: 4c0a ldr r4, [pc, #40] ; (21c <__libc_init_array+0x44>)
1f2: 1b64 subs r4, r4, r5
1f4: 10a4 asrs r4, r4, #2
1f6: 42a6 cmp r6, r4
1f8: d105 bne.n 206 <__libc_init_array+0x2e>
1fa: bd70 pop {r4, r5, r6, pc}
1fc: 00b3 lsls r3, r6, #2
1fe: 58eb ldr r3, [r5, r3]
200: 4798 blx r3
202: 3601 adds r6, #1
204: e7ee b.n 1e4 <__libc_init_array+0xc>
206: 00b3 lsls r3, r6, #2
208: 58eb ldr r3, [r5, r3]
20a: 4798 blx r3
20c: 3601 adds r6, #1
20e: e7f2 b.n 1f6 <__libc_init_array+0x1e>
210: 00000250 .word 0x00000250
214: 00000250 .word 0x00000250
218: 00000250 .word 0x00000250
21c: 00000254 .word 0x00000254
00000220 <memcpy>:
220: 2300 movs r3, #0
222: b510 push {r4, lr}
224: 429a cmp r2, r3
226: d100 bne.n 22a <memcpy+0xa>
228: bd10 pop {r4, pc}
22a: 5ccc ldrb r4, [r1, r3]
22c: 54c4 strb r4, [r0, r3]
22e: 3301 adds r3, #1
230: e7f8 b.n 224 <memcpy+0x4>
00000232 <memset>:
232: 0003 movs r3, r0
234: 1882 adds r2, r0, r2
236: 4293 cmp r3, r2
238: d100 bne.n 23c <memset+0xa>
23a: 4770 bx lr
23c: 7019 strb r1, [r3, #0]
23e: 3301 adds r3, #1
240: e7f9 b.n 236 <memset+0x4>
...
00000244 <_init>:
244: b5f8 push {r3, r4, r5, r6, r7, lr}
246: 46c0 nop ; (mov r8, r8)
248: bcf8 pop {r3, r4, r5, r6, r7}
24a: bc08 pop {r3}
24c: 469e mov lr, r3
24e: 4770 bx lr
00000250 <__frame_dummy_init_array_entry>:
250: 00d9 0000 ....
00000254 <_fini>:
254: b5f8 push {r3, r4, r5, r6, r7, lr}
256: 46c0 nop ; (mov r8, r8)
258: bcf8 pop {r3, r4, r5, r6, r7}
25a: bc08 pop {r3}
25c: 469e mov lr, r3
25e: 4770 bx lr
00000260 <__do_global_dtors_aux_fini_array_entry>:
260: 00b1 0000 ....
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