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329 lines
11 KiB
Plaintext
329 lines
11 KiB
Plaintext
4 years ago
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testdir.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .text 00000278 00000000 00000000 00010000 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .relocate 00000000 20000000 20000000 00010278 2**0
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CONTENTS
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2 .bss 0000001c 20000000 20000000 00020000 2**2
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ALLOC
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3 .stack 00002004 2000001c 2000001c 00020000 2**0
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ALLOC
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4 .ARM.attributes 00000028 00000000 00000000 00010278 2**0
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CONTENTS, READONLY
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5 .comment 0000001e 00000000 00000000 000102a0 2**0
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CONTENTS, READONLY
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6 .debug_info 000007fa 00000000 00000000 000102be 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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7 .debug_abbrev 0000028b 00000000 00000000 00010ab8 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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8 .debug_aranges 00000048 00000000 00000000 00010d43 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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9 .debug_ranges 00000118 00000000 00000000 00010d8b 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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10 .debug_macro 00012b53 00000000 00000000 00010ea3 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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11 .debug_line 000007b8 00000000 00000000 000239f6 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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12 .debug_str 00093ff8 00000000 00000000 000241ae 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_frame 000000d8 00000000 00000000 000b81a8 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_loc 0000027c 00000000 00000000 000b8280 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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00000000 <exception_table>:
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0: 20 20 00 20 fd 00 00 00 f9 00 00 00 f9 00 00 00 . ............
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...
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2c: f9 00 00 00 00 00 00 00 00 00 00 00 f9 00 00 00 ................
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3c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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4c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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5c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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6c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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7c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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8c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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9c: f9 00 00 00 f9 00 00 00 f9 00 00 00 f9 00 00 00 ................
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ac: f9 00 00 00 ....
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000000b0 <__do_global_dtors_aux>:
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b0: b510 push {r4, lr}
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b2: 4c06 ldr r4, [pc, #24] ; (cc <__do_global_dtors_aux+0x1c>)
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b4: 7823 ldrb r3, [r4, #0]
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b6: 2b00 cmp r3, #0
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b8: d107 bne.n ca <__do_global_dtors_aux+0x1a>
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ba: 4b05 ldr r3, [pc, #20] ; (d0 <__do_global_dtors_aux+0x20>)
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bc: 2b00 cmp r3, #0
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be: d002 beq.n c6 <__do_global_dtors_aux+0x16>
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c0: 4804 ldr r0, [pc, #16] ; (d4 <__do_global_dtors_aux+0x24>)
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c2: e000 b.n c6 <__do_global_dtors_aux+0x16>
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c4: bf00 nop
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c6: 2301 movs r3, #1
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c8: 7023 strb r3, [r4, #0]
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ca: bd10 pop {r4, pc}
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cc: 20000000 .word 0x20000000
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d0: 00000000 .word 0x00000000
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d4: 00000278 .word 0x00000278
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000000d8 <frame_dummy>:
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d8: 4b04 ldr r3, [pc, #16] ; (ec <frame_dummy+0x14>)
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da: b510 push {r4, lr}
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dc: 2b00 cmp r3, #0
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de: d003 beq.n e8 <frame_dummy+0x10>
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e0: 4903 ldr r1, [pc, #12] ; (f0 <frame_dummy+0x18>)
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e2: 4804 ldr r0, [pc, #16] ; (f4 <frame_dummy+0x1c>)
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e4: e000 b.n e8 <frame_dummy+0x10>
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e6: bf00 nop
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e8: bd10 pop {r4, pc}
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ea: 46c0 nop ; (mov r8, r8)
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ec: 00000000 .word 0x00000000
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f0: 20000004 .word 0x20000004
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f4: 00000278 .word 0x00000278
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000000f8 <Dummy_Handler>:
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/**
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* \brief Default interrupt handler for unused IRQs.
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*/
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void Dummy_Handler(void)
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{
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while (1) {
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f8: e7fe b.n f8 <Dummy_Handler>
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...
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000000fc <Reset_Handler>:
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if (pSrc != pDest) {
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fc: 4913 ldr r1, [pc, #76] ; (14c <Reset_Handler+0x50>)
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fe: 4814 ldr r0, [pc, #80] ; (150 <Reset_Handler+0x54>)
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{
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100: b510 push {r4, lr}
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if (pSrc != pDest) {
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102: 4281 cmp r1, r0
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104: d00a beq.n 11c <Reset_Handler+0x20>
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*pDest++ = *pSrc++;
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106: 4b13 ldr r3, [pc, #76] ; (154 <Reset_Handler+0x58>)
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108: 1ec4 subs r4, r0, #3
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10a: 2200 movs r2, #0
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10c: 42a3 cmp r3, r4
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10e: d303 bcc.n 118 <Reset_Handler+0x1c>
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110: 3303 adds r3, #3
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112: 1a1a subs r2, r3, r0
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114: 0892 lsrs r2, r2, #2
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116: 0092 lsls r2, r2, #2
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118: 4b0f ldr r3, [pc, #60] ; (158 <Reset_Handler+0x5c>)
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11a: 4798 blx r3
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*pDest++ = 0;
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11c: 480f ldr r0, [pc, #60] ; (15c <Reset_Handler+0x60>)
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11e: 4b10 ldr r3, [pc, #64] ; (160 <Reset_Handler+0x64>)
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120: 1ec1 subs r1, r0, #3
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122: 2200 movs r2, #0
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124: 4299 cmp r1, r3
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126: d803 bhi.n 130 <Reset_Handler+0x34>
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128: 3303 adds r3, #3
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12a: 1a1a subs r2, r3, r0
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12c: 0892 lsrs r2, r2, #2
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12e: 0092 lsls r2, r2, #2
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130: 2100 movs r1, #0
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132: 4b0c ldr r3, [pc, #48] ; (164 <Reset_Handler+0x68>)
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134: 4798 blx r3
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SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
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136: 22ff movs r2, #255 ; 0xff
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138: 4b0b ldr r3, [pc, #44] ; (168 <Reset_Handler+0x6c>)
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13a: 4393 bics r3, r2
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13c: 4a0b ldr r2, [pc, #44] ; (16c <Reset_Handler+0x70>)
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13e: 6093 str r3, [r2, #8]
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__libc_init_array();
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140: 4b0b ldr r3, [pc, #44] ; (170 <Reset_Handler+0x74>)
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142: 4798 blx r3
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main();
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144: 4b0b ldr r3, [pc, #44] ; (174 <Reset_Handler+0x78>)
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146: 4798 blx r3
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while (1);
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148: e7fe b.n 148 <Reset_Handler+0x4c>
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14a: 46c0 nop ; (mov r8, r8)
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14c: 00000278 .word 0x00000278
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150: 20000000 .word 0x20000000
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154: 20000000 .word 0x20000000
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158: 00000235 .word 0x00000235
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15c: 20000000 .word 0x20000000
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160: 2000001c .word 0x2000001c
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164: 00000247 .word 0x00000247
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168: 00000000 .word 0x00000000
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16c: e000ed00 .word 0xe000ed00
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170: 000001ed .word 0x000001ed
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174: 00000179 .word 0x00000179
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00000178 <main>:
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}
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int main()
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{
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178: b530 push {r4, r5, lr}
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void init_pin(int port, int pin)
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{
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uint32_t* dir_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_DIR_OFF));
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*dir_reg |= (1 << pin);
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17a: 2580 movs r5, #128 ; 0x80
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17c: 2402 movs r4, #2
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17e: 4a16 ldr r2, [pc, #88] ; (1d8 <main+0x60>)
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180: 00ad lsls r5, r5, #2
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182: 6813 ldr r3, [r2, #0]
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184: 432b orrs r3, r5
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186: 6013 str r3, [r2, #0]
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188: 4a14 ldr r2, [pc, #80] ; (1dc <main+0x64>)
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18a: 6813 ldr r3, [r2, #0]
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18c: 4323 orrs r3, r4
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18e: 6013 str r3, [r2, #0]
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}
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void set_pin(int port, int pin)
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{
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uint32_t* out_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_OUT_OFF));
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*out_reg |= (1 << pin);
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190: 4b13 ldr r3, [pc, #76] ; (1e0 <main+0x68>)
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}
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void clr_pin(int port, int pin)
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{
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uint32_t* out_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_OUT_OFF));
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*out_reg &= ~(1 << pin);
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192: 4a14 ldr r2, [pc, #80] ; (1e4 <main+0x6c>)
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194: 20fa movs r0, #250 ; 0xfa
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*out_reg |= (1 << pin);
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196: 6819 ldr r1, [r3, #0]
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*out_reg &= ~(1 << pin);
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198: 0040 lsls r0, r0, #1
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*out_reg |= (1 << pin);
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19a: 4329 orrs r1, r5
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19c: 6019 str r1, [r3, #0]
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*out_reg &= ~(1 << pin);
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19e: 6811 ldr r1, [r2, #0]
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1a0: 43a1 bics r1, r4
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1a2: 6011 str r1, [r2, #0]
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{
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1a4: 2164 movs r1, #100 ; 0x64
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asm volatile("nop");
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1a6: 46c0 nop ; (mov r8, r8)
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for(i=0;i<100;i++)
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1a8: 3901 subs r1, #1
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1aa: 2900 cmp r1, #0
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1ac: d1fb bne.n 1a6 <main+0x2e>
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for(;n>0;n--)
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1ae: 3801 subs r0, #1
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1b0: 2800 cmp r0, #0
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1b2: d1f7 bne.n 1a4 <main+0x2c>
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*out_reg &= ~(1 << pin);
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1b4: 6818 ldr r0, [r3, #0]
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1b6: 490c ldr r1, [pc, #48] ; (1e8 <main+0x70>)
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1b8: 4001 ands r1, r0
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*out_reg |= (1 << pin);
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1ba: 20fa movs r0, #250 ; 0xfa
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*out_reg &= ~(1 << pin);
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1bc: 6019 str r1, [r3, #0]
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*out_reg |= (1 << pin);
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1be: 6811 ldr r1, [r2, #0]
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1c0: 0040 lsls r0, r0, #1
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1c2: 4321 orrs r1, r4
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1c4: 6011 str r1, [r2, #0]
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*out_reg &= ~(1 << pin);
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1c6: 2164 movs r1, #100 ; 0x64
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asm volatile("nop");
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1c8: 46c0 nop ; (mov r8, r8)
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for(i=0;i<100;i++)
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1ca: 3901 subs r1, #1
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1cc: 2900 cmp r1, #0
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1ce: d1fb bne.n 1c8 <main+0x50>
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for(;n>0;n--)
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1d0: 3801 subs r0, #1
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1d2: 2800 cmp r0, #0
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1d4: d1f7 bne.n 1c6 <main+0x4e>
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1d6: e7dd b.n 194 <main+0x1c>
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1d8: 41004400 .word 0x41004400
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1dc: 41004480 .word 0x41004480
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1e0: 41004410 .word 0x41004410
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1e4: 41004490 .word 0x41004490
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1e8: fffffdff .word 0xfffffdff
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000001ec <__libc_init_array>:
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1ec: b570 push {r4, r5, r6, lr}
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1ee: 2600 movs r6, #0
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1f0: 4d0c ldr r5, [pc, #48] ; (224 <__libc_init_array+0x38>)
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1f2: 4c0d ldr r4, [pc, #52] ; (228 <__libc_init_array+0x3c>)
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1f4: 1b64 subs r4, r4, r5
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1f6: 10a4 asrs r4, r4, #2
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1f8: 42a6 cmp r6, r4
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1fa: d109 bne.n 210 <__libc_init_array+0x24>
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1fc: 2600 movs r6, #0
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1fe: f000 f82b bl 258 <_init>
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202: 4d0a ldr r5, [pc, #40] ; (22c <__libc_init_array+0x40>)
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204: 4c0a ldr r4, [pc, #40] ; (230 <__libc_init_array+0x44>)
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206: 1b64 subs r4, r4, r5
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208: 10a4 asrs r4, r4, #2
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20a: 42a6 cmp r6, r4
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20c: d105 bne.n 21a <__libc_init_array+0x2e>
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20e: bd70 pop {r4, r5, r6, pc}
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210: 00b3 lsls r3, r6, #2
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212: 58eb ldr r3, [r5, r3]
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214: 4798 blx r3
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216: 3601 adds r6, #1
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218: e7ee b.n 1f8 <__libc_init_array+0xc>
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21a: 00b3 lsls r3, r6, #2
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21c: 58eb ldr r3, [r5, r3]
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21e: 4798 blx r3
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220: 3601 adds r6, #1
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222: e7f2 b.n 20a <__libc_init_array+0x1e>
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224: 00000264 .word 0x00000264
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228: 00000264 .word 0x00000264
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22c: 00000264 .word 0x00000264
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230: 00000268 .word 0x00000268
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00000234 <memcpy>:
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234: 2300 movs r3, #0
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236: b510 push {r4, lr}
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238: 429a cmp r2, r3
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23a: d100 bne.n 23e <memcpy+0xa>
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23c: bd10 pop {r4, pc}
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23e: 5ccc ldrb r4, [r1, r3]
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|
240: 54c4 strb r4, [r0, r3]
|
||
|
|
242: 3301 adds r3, #1
|
||
|
|
244: e7f8 b.n 238 <memcpy+0x4>
|
||
|
|
|
||
|
|
00000246 <memset>:
|
||
|
|
246: 0003 movs r3, r0
|
||
|
|
248: 1882 adds r2, r0, r2
|
||
|
|
24a: 4293 cmp r3, r2
|
||
|
|
24c: d100 bne.n 250 <memset+0xa>
|
||
|
|
24e: 4770 bx lr
|
||
|
|
250: 7019 strb r1, [r3, #0]
|
||
|
|
252: 3301 adds r3, #1
|
||
|
|
254: e7f9 b.n 24a <memset+0x4>
|
||
|
|
...
|
||
|
|
|
||
|
|
00000258 <_init>:
|
||
|
|
258: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
|
|
25a: 46c0 nop ; (mov r8, r8)
|
||
|
|
25c: bcf8 pop {r3, r4, r5, r6, r7}
|
||
|
|
25e: bc08 pop {r3}
|
||
|
|
260: 469e mov lr, r3
|
||
|
|
262: 4770 bx lr
|
||
|
|
|
||
|
|
00000264 <__frame_dummy_init_array_entry>:
|
||
|
|
264: 00d9 0000 ....
|
||
|
|
|
||
|
|
00000268 <_fini>:
|
||
|
|
268: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
|
|
26a: 46c0 nop ; (mov r8, r8)
|
||
|
|
26c: bcf8 pop {r3, r4, r5, r6, r7}
|
||
|
|
26e: bc08 pop {r3}
|
||
|
|
270: 469e mov lr, r3
|
||
|
|
272: 4770 bx lr
|
||
|
|
|
||
|
|
00000274 <__do_global_dtors_aux_fini_array_entry>:
|
||
|
|
274: 00b1 0000 ....
|