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618 lines
18 KiB
C
618 lines
18 KiB
C
/**
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* \file
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*
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* \brief SAM WDT
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*
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* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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#ifdef _SAME54_WDT_COMPONENT_
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#ifndef _HRI_WDT_E54_H_INCLUDED_
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#define _HRI_WDT_E54_H_INCLUDED_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdbool.h>
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#include <hal_atomic.h>
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#if defined(ENABLE_WDT_CRITICAL_SECTIONS)
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#define WDT_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER()
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#define WDT_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE()
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#else
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#define WDT_CRITICAL_SECTION_ENTER()
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#define WDT_CRITICAL_SECTION_LEAVE()
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#endif
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typedef uint32_t hri_wdt_syncbusy_reg_t;
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typedef uint8_t hri_wdt_clear_reg_t;
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typedef uint8_t hri_wdt_config_reg_t;
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typedef uint8_t hri_wdt_ctrla_reg_t;
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typedef uint8_t hri_wdt_ewctrl_reg_t;
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typedef uint8_t hri_wdt_intenset_reg_t;
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typedef uint8_t hri_wdt_intflag_reg_t;
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static inline void hri_wdt_wait_for_sync(const void *const hw, hri_wdt_syncbusy_reg_t reg)
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{
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while (((Wdt *)hw)->SYNCBUSY.reg & reg) {
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};
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}
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static inline bool hri_wdt_is_syncing(const void *const hw, hri_wdt_syncbusy_reg_t reg)
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{
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return ((Wdt *)hw)->SYNCBUSY.reg & reg;
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}
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static inline bool hri_wdt_get_INTFLAG_EW_bit(const void *const hw)
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{
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return (((Wdt *)hw)->INTFLAG.reg & WDT_INTFLAG_EW) >> WDT_INTFLAG_EW_Pos;
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}
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static inline void hri_wdt_clear_INTFLAG_EW_bit(const void *const hw)
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{
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((Wdt *)hw)->INTFLAG.reg = WDT_INTFLAG_EW;
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}
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static inline bool hri_wdt_get_interrupt_EW_bit(const void *const hw)
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{
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return (((Wdt *)hw)->INTFLAG.reg & WDT_INTFLAG_EW) >> WDT_INTFLAG_EW_Pos;
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}
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static inline void hri_wdt_clear_interrupt_EW_bit(const void *const hw)
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{
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((Wdt *)hw)->INTFLAG.reg = WDT_INTFLAG_EW;
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}
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static inline hri_wdt_intflag_reg_t hri_wdt_get_INTFLAG_reg(const void *const hw, hri_wdt_intflag_reg_t mask)
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{
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uint8_t tmp;
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tmp = ((Wdt *)hw)->INTFLAG.reg;
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tmp &= mask;
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return tmp;
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}
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static inline hri_wdt_intflag_reg_t hri_wdt_read_INTFLAG_reg(const void *const hw)
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{
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return ((Wdt *)hw)->INTFLAG.reg;
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}
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static inline void hri_wdt_clear_INTFLAG_reg(const void *const hw, hri_wdt_intflag_reg_t mask)
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{
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((Wdt *)hw)->INTFLAG.reg = mask;
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}
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static inline void hri_wdt_set_INTEN_EW_bit(const void *const hw)
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{
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((Wdt *)hw)->INTENSET.reg = WDT_INTENSET_EW;
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}
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static inline bool hri_wdt_get_INTEN_EW_bit(const void *const hw)
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{
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return (((Wdt *)hw)->INTENSET.reg & WDT_INTENSET_EW) >> WDT_INTENSET_EW_Pos;
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}
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static inline void hri_wdt_write_INTEN_EW_bit(const void *const hw, bool value)
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{
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if (value == 0x0) {
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((Wdt *)hw)->INTENCLR.reg = WDT_INTENSET_EW;
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} else {
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((Wdt *)hw)->INTENSET.reg = WDT_INTENSET_EW;
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}
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}
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static inline void hri_wdt_clear_INTEN_EW_bit(const void *const hw)
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{
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((Wdt *)hw)->INTENCLR.reg = WDT_INTENSET_EW;
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}
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static inline void hri_wdt_set_INTEN_reg(const void *const hw, hri_wdt_intenset_reg_t mask)
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{
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((Wdt *)hw)->INTENSET.reg = mask;
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}
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static inline hri_wdt_intenset_reg_t hri_wdt_get_INTEN_reg(const void *const hw, hri_wdt_intenset_reg_t mask)
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{
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uint8_t tmp;
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tmp = ((Wdt *)hw)->INTENSET.reg;
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tmp &= mask;
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return tmp;
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}
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static inline hri_wdt_intenset_reg_t hri_wdt_read_INTEN_reg(const void *const hw)
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{
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return ((Wdt *)hw)->INTENSET.reg;
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}
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static inline void hri_wdt_write_INTEN_reg(const void *const hw, hri_wdt_intenset_reg_t data)
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{
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((Wdt *)hw)->INTENSET.reg = data;
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((Wdt *)hw)->INTENCLR.reg = ~data;
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}
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static inline void hri_wdt_clear_INTEN_reg(const void *const hw, hri_wdt_intenset_reg_t mask)
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{
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((Wdt *)hw)->INTENCLR.reg = mask;
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}
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static inline bool hri_wdt_get_SYNCBUSY_ENABLE_bit(const void *const hw)
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{
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return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ENABLE) >> WDT_SYNCBUSY_ENABLE_Pos;
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}
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static inline bool hri_wdt_get_SYNCBUSY_WEN_bit(const void *const hw)
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{
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return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_WEN) >> WDT_SYNCBUSY_WEN_Pos;
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}
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static inline bool hri_wdt_get_SYNCBUSY_ALWAYSON_bit(const void *const hw)
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{
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return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ALWAYSON) >> WDT_SYNCBUSY_ALWAYSON_Pos;
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}
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static inline bool hri_wdt_get_SYNCBUSY_CLEAR_bit(const void *const hw)
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{
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return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_CLEAR) >> WDT_SYNCBUSY_CLEAR_Pos;
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}
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static inline hri_wdt_syncbusy_reg_t hri_wdt_get_SYNCBUSY_reg(const void *const hw, hri_wdt_syncbusy_reg_t mask)
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{
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uint32_t tmp;
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tmp = ((Wdt *)hw)->SYNCBUSY.reg;
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tmp &= mask;
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return tmp;
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}
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static inline hri_wdt_syncbusy_reg_t hri_wdt_read_SYNCBUSY_reg(const void *const hw)
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{
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return ((Wdt *)hw)->SYNCBUSY.reg;
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}
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static inline void hri_wdt_set_CTRLA_ENABLE_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg |= WDT_CTRLA_ENABLE;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline bool hri_wdt_get_CTRLA_ENABLE_bit(const void *const hw)
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{
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uint8_t tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp = (tmp & WDT_CTRLA_ENABLE) >> WDT_CTRLA_ENABLE_Pos;
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return (bool)tmp;
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}
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static inline void hri_wdt_write_CTRLA_ENABLE_bit(const void *const hw, bool value)
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{
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uint8_t tmp;
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WDT_CRITICAL_SECTION_ENTER();
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp &= ~WDT_CTRLA_ENABLE;
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tmp |= value << WDT_CTRLA_ENABLE_Pos;
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((Wdt *)hw)->CTRLA.reg = tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_clear_CTRLA_ENABLE_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg &= ~WDT_CTRLA_ENABLE;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_toggle_CTRLA_ENABLE_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg ^= WDT_CTRLA_ENABLE;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_set_CTRLA_WEN_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg |= WDT_CTRLA_WEN;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline bool hri_wdt_get_CTRLA_WEN_bit(const void *const hw)
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{
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uint8_t tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp = (tmp & WDT_CTRLA_WEN) >> WDT_CTRLA_WEN_Pos;
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return (bool)tmp;
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}
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static inline void hri_wdt_write_CTRLA_WEN_bit(const void *const hw, bool value)
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{
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uint8_t tmp;
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WDT_CRITICAL_SECTION_ENTER();
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp &= ~WDT_CTRLA_WEN;
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tmp |= value << WDT_CTRLA_WEN_Pos;
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((Wdt *)hw)->CTRLA.reg = tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_clear_CTRLA_WEN_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg &= ~WDT_CTRLA_WEN;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_toggle_CTRLA_WEN_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg ^= WDT_CTRLA_WEN;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_set_CTRLA_ALWAYSON_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg |= WDT_CTRLA_ALWAYSON;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline bool hri_wdt_get_CTRLA_ALWAYSON_bit(const void *const hw)
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{
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uint8_t tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp = (tmp & WDT_CTRLA_ALWAYSON) >> WDT_CTRLA_ALWAYSON_Pos;
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return (bool)tmp;
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}
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static inline void hri_wdt_write_CTRLA_ALWAYSON_bit(const void *const hw, bool value)
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{
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uint8_t tmp;
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WDT_CRITICAL_SECTION_ENTER();
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp &= ~WDT_CTRLA_ALWAYSON;
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tmp |= value << WDT_CTRLA_ALWAYSON_Pos;
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((Wdt *)hw)->CTRLA.reg = tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_clear_CTRLA_ALWAYSON_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg &= ~WDT_CTRLA_ALWAYSON;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_toggle_CTRLA_ALWAYSON_bit(const void *const hw)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg ^= WDT_CTRLA_ALWAYSON;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_set_CTRLA_reg(const void *const hw, hri_wdt_ctrla_reg_t mask)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg |= mask;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline hri_wdt_ctrla_reg_t hri_wdt_get_CTRLA_reg(const void *const hw, hri_wdt_ctrla_reg_t mask)
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{
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uint8_t tmp;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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tmp = ((Wdt *)hw)->CTRLA.reg;
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tmp &= mask;
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return tmp;
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}
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static inline void hri_wdt_write_CTRLA_reg(const void *const hw, hri_wdt_ctrla_reg_t data)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg = data;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_clear_CTRLA_reg(const void *const hw, hri_wdt_ctrla_reg_t mask)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg &= ~mask;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline void hri_wdt_toggle_CTRLA_reg(const void *const hw, hri_wdt_ctrla_reg_t mask)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CTRLA.reg ^= mask;
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline hri_wdt_ctrla_reg_t hri_wdt_read_CTRLA_reg(const void *const hw)
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{
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hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_ENABLE | WDT_SYNCBUSY_WEN | WDT_SYNCBUSY_ALWAYSON);
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return ((Wdt *)hw)->CTRLA.reg;
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}
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static inline void hri_wdt_set_CONFIG_PER_bf(const void *const hw, hri_wdt_config_reg_t mask)
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{
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WDT_CRITICAL_SECTION_ENTER();
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((Wdt *)hw)->CONFIG.reg |= WDT_CONFIG_PER(mask);
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WDT_CRITICAL_SECTION_LEAVE();
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}
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static inline hri_wdt_config_reg_t hri_wdt_get_CONFIG_PER_bf(const void *const hw, hri_wdt_config_reg_t mask)
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{
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uint8_t tmp;
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tmp = ((Wdt *)hw)->CONFIG.reg;
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tmp = (tmp & WDT_CONFIG_PER(mask)) >> WDT_CONFIG_PER_Pos;
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return tmp;
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}
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static inline void hri_wdt_write_CONFIG_PER_bf(const void *const hw, hri_wdt_config_reg_t data)
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{
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uint8_t tmp;
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WDT_CRITICAL_SECTION_ENTER();
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tmp = ((Wdt *)hw)->CONFIG.reg;
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tmp &= ~WDT_CONFIG_PER_Msk;
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tmp |= WDT_CONFIG_PER(data);
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((Wdt *)hw)->CONFIG.reg = tmp;
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WDT_CRITICAL_SECTION_LEAVE();
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}
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|
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static inline void hri_wdt_clear_CONFIG_PER_bf(const void *const hw, hri_wdt_config_reg_t mask)
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|
{
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|
WDT_CRITICAL_SECTION_ENTER();
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|
((Wdt *)hw)->CONFIG.reg &= ~WDT_CONFIG_PER(mask);
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|
WDT_CRITICAL_SECTION_LEAVE();
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|
}
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|
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static inline void hri_wdt_toggle_CONFIG_PER_bf(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
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|
WDT_CRITICAL_SECTION_ENTER();
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|
((Wdt *)hw)->CONFIG.reg ^= WDT_CONFIG_PER(mask);
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|
WDT_CRITICAL_SECTION_LEAVE();
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|
}
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|
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static inline hri_wdt_config_reg_t hri_wdt_read_CONFIG_PER_bf(const void *const hw)
|
|
{
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|
uint8_t tmp;
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|
tmp = ((Wdt *)hw)->CONFIG.reg;
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|
tmp = (tmp & WDT_CONFIG_PER_Msk) >> WDT_CONFIG_PER_Pos;
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|
return tmp;
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|
}
|
|
|
|
static inline void hri_wdt_set_CONFIG_WINDOW_bf(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
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|
((Wdt *)hw)->CONFIG.reg |= WDT_CONFIG_WINDOW(mask);
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|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_config_reg_t hri_wdt_get_CONFIG_WINDOW_bf(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
uint8_t tmp;
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|
tmp = ((Wdt *)hw)->CONFIG.reg;
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|
tmp = (tmp & WDT_CONFIG_WINDOW(mask)) >> WDT_CONFIG_WINDOW_Pos;
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|
return tmp;
|
|
}
|
|
|
|
static inline void hri_wdt_write_CONFIG_WINDOW_bf(const void *const hw, hri_wdt_config_reg_t data)
|
|
{
|
|
uint8_t tmp;
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
tmp = ((Wdt *)hw)->CONFIG.reg;
|
|
tmp &= ~WDT_CONFIG_WINDOW_Msk;
|
|
tmp |= WDT_CONFIG_WINDOW(data);
|
|
((Wdt *)hw)->CONFIG.reg = tmp;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_clear_CONFIG_WINDOW_bf(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CONFIG.reg &= ~WDT_CONFIG_WINDOW(mask);
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_toggle_CONFIG_WINDOW_bf(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CONFIG.reg ^= WDT_CONFIG_WINDOW(mask);
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_config_reg_t hri_wdt_read_CONFIG_WINDOW_bf(const void *const hw)
|
|
{
|
|
uint8_t tmp;
|
|
tmp = ((Wdt *)hw)->CONFIG.reg;
|
|
tmp = (tmp & WDT_CONFIG_WINDOW_Msk) >> WDT_CONFIG_WINDOW_Pos;
|
|
return tmp;
|
|
}
|
|
|
|
static inline void hri_wdt_set_CONFIG_reg(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CONFIG.reg |= mask;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_config_reg_t hri_wdt_get_CONFIG_reg(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
uint8_t tmp;
|
|
tmp = ((Wdt *)hw)->CONFIG.reg;
|
|
tmp &= mask;
|
|
return tmp;
|
|
}
|
|
|
|
static inline void hri_wdt_write_CONFIG_reg(const void *const hw, hri_wdt_config_reg_t data)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CONFIG.reg = data;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_clear_CONFIG_reg(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CONFIG.reg &= ~mask;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_toggle_CONFIG_reg(const void *const hw, hri_wdt_config_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CONFIG.reg ^= mask;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_config_reg_t hri_wdt_read_CONFIG_reg(const void *const hw)
|
|
{
|
|
return ((Wdt *)hw)->CONFIG.reg;
|
|
}
|
|
|
|
static inline void hri_wdt_set_EWCTRL_EWOFFSET_bf(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg |= WDT_EWCTRL_EWOFFSET(mask);
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_ewctrl_reg_t hri_wdt_get_EWCTRL_EWOFFSET_bf(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
uint8_t tmp;
|
|
tmp = ((Wdt *)hw)->EWCTRL.reg;
|
|
tmp = (tmp & WDT_EWCTRL_EWOFFSET(mask)) >> WDT_EWCTRL_EWOFFSET_Pos;
|
|
return tmp;
|
|
}
|
|
|
|
static inline void hri_wdt_write_EWCTRL_EWOFFSET_bf(const void *const hw, hri_wdt_ewctrl_reg_t data)
|
|
{
|
|
uint8_t tmp;
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
tmp = ((Wdt *)hw)->EWCTRL.reg;
|
|
tmp &= ~WDT_EWCTRL_EWOFFSET_Msk;
|
|
tmp |= WDT_EWCTRL_EWOFFSET(data);
|
|
((Wdt *)hw)->EWCTRL.reg = tmp;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_clear_EWCTRL_EWOFFSET_bf(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg &= ~WDT_EWCTRL_EWOFFSET(mask);
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_toggle_EWCTRL_EWOFFSET_bf(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg ^= WDT_EWCTRL_EWOFFSET(mask);
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_ewctrl_reg_t hri_wdt_read_EWCTRL_EWOFFSET_bf(const void *const hw)
|
|
{
|
|
uint8_t tmp;
|
|
tmp = ((Wdt *)hw)->EWCTRL.reg;
|
|
tmp = (tmp & WDT_EWCTRL_EWOFFSET_Msk) >> WDT_EWCTRL_EWOFFSET_Pos;
|
|
return tmp;
|
|
}
|
|
|
|
static inline void hri_wdt_set_EWCTRL_reg(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg |= mask;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_ewctrl_reg_t hri_wdt_get_EWCTRL_reg(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
uint8_t tmp;
|
|
tmp = ((Wdt *)hw)->EWCTRL.reg;
|
|
tmp &= mask;
|
|
return tmp;
|
|
}
|
|
|
|
static inline void hri_wdt_write_EWCTRL_reg(const void *const hw, hri_wdt_ewctrl_reg_t data)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg = data;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_clear_EWCTRL_reg(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg &= ~mask;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline void hri_wdt_toggle_EWCTRL_reg(const void *const hw, hri_wdt_ewctrl_reg_t mask)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->EWCTRL.reg ^= mask;
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
static inline hri_wdt_ewctrl_reg_t hri_wdt_read_EWCTRL_reg(const void *const hw)
|
|
{
|
|
return ((Wdt *)hw)->EWCTRL.reg;
|
|
}
|
|
|
|
static inline void hri_wdt_write_CLEAR_reg(const void *const hw, hri_wdt_clear_reg_t data)
|
|
{
|
|
WDT_CRITICAL_SECTION_ENTER();
|
|
((Wdt *)hw)->CLEAR.reg = data;
|
|
hri_wdt_wait_for_sync(hw, WDT_SYNCBUSY_CLEAR);
|
|
WDT_CRITICAL_SECTION_LEAVE();
|
|
}
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* _HRI_WDT_E54_H_INCLUDED */
|
|
#endif /* _SAME54_WDT_COMPONENT_ */
|