/** * \file * * \brief Component description for HMATRIXB * * Copyright (c) 2019 Microchip Technology Inc. * * \asf_license_start * * \page License * * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * \asf_license_stop * */ #ifndef _SAME54_HMATRIXB_COMPONENT_ #define _SAME54_HMATRIXB_COMPONENT_ /* ========================================================================== */ /** SOFTWARE API DEFINITION FOR HMATRIXB */ /* ========================================================================== */ /** \addtogroup SAME54_HMATRIXB HSB Matrix */ /*@{*/ #define HMATRIXB_I7638 #define REV_HMATRIXB 0x214 /* -------- HMATRIXB_PRAS : (HMATRIXB Offset: 0x080) (R/W 32) PRS Priority A for Slave -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { uint32_t reg; /*!< Type used for register access */ } HMATRIXB_PRAS_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ #define HMATRIXB_PRAS_OFFSET 0x080 /**< \brief (HMATRIXB_PRAS offset) Priority A for Slave */ #define HMATRIXB_PRAS_RESETVALUE _U_(0x00000000) /**< \brief (HMATRIXB_PRAS reset_value) Priority A for Slave */ #define HMATRIXB_PRAS_MASK _U_(0x00000000) /**< \brief (HMATRIXB_PRAS) MASK Register */ /* -------- HMATRIXB_PRBS : (HMATRIXB Offset: 0x084) (R/W 32) PRS Priority B for Slave -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { uint32_t reg; /*!< Type used for register access */ } HMATRIXB_PRBS_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ #define HMATRIXB_PRBS_OFFSET 0x084 /**< \brief (HMATRIXB_PRBS offset) Priority B for Slave */ #define HMATRIXB_PRBS_RESETVALUE _U_(0x00000000) /**< \brief (HMATRIXB_PRBS reset_value) Priority B for Slave */ #define HMATRIXB_PRBS_MASK _U_(0x00000000) /**< \brief (HMATRIXB_PRBS) MASK Register */ /** \brief HmatrixbPrs hardware registers */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef struct { __IO HMATRIXB_PRAS_Type PRAS; /**< \brief Offset: 0x000 (R/W 32) Priority A for Slave */ __IO HMATRIXB_PRBS_Type PRBS; /**< \brief Offset: 0x004 (R/W 32) Priority B for Slave */ } HmatrixbPrs; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /** \brief HMATRIXB hardware registers */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef struct { RoReg8 Reserved1[0x80]; HmatrixbPrs Prs[16]; /**< \brief Offset: 0x080 HmatrixbPrs groups */ } Hmatrixb; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /*@}*/ #endif /* _SAME54_HMATRIXB_COMPONENT_ */