EESchema Schematic File Version 4 EELAYER 30 0 EELAYER END $Descr A 11000 8500 encoding utf-8 Sheet 1 5 Title "Project Oracle" Date "2020-03-16" Rev "v0.1" Comp "" Comment1 "" Comment2 "" Comment3 "" Comment4 "" $EndDescr $Sheet S 5800 3900 3000 2000 U 5E7872D3 F0 "s_Power" 50 F1 "Power.sch" 50 $EndSheet Text Notes 800 1500 0 50 ~ 0 Brain -- ATSAME54P20A will controll peripherals, \nincluding an IO extender which,\n will handler the control of the screen \n(mikroe board with SSD1963)\n\n\nEverything in this schematic is relative to the \nbrain. As in, MASTER means brain. Text GLabel 900 6250 0 50 Input ~ 0 g_3v3 Text GLabel 1800 6250 0 50 Input ~ 0 g_5v $Sheet S 5750 850 3100 2000 U 5E8589A7 F0 "s_SCREEN_INTF" 50 F1 "SCREEN_INTF.sch" 50 F2 "MASTER_SPI_CLK" I L 5750 1100 50 F3 "MASTER_SPI_MISO" I L 5750 1200 50 F4 "MASTER_SPI_MOSI" I L 5750 1300 50 F5 "~IO_EXPANDER_CS" I L 5750 1450 50 F6 "~TFT_CS" I L 5750 1550 50 F7 "~TFT_RD" I L 5750 1650 50 F8 "~TFT_WR" I L 5750 1750 50 F9 "TFT_RSDC" I L 5750 1850 50 F10 "~TFT_RST" I L 5750 2000 50 F11 "TFT_STB" I L 5750 2100 50 F12 "TFT_TOUCH_SDA" I L 5750 2200 50 F13 "TFT_TOUCH_SCL" I L 5750 2300 50 F14 "TFT_TOUCH_INT" I L 5750 2550 50 F15 "TFT_TE" I L 5750 2650 50 $EndSheet Wire Wire Line 900 6250 950 6250 $Comp L power:+3V3 #PWR0101 U 1 1 5E97BC15 P 1200 6250 F 0 "#PWR0101" H 1200 6100 50 0001 C CNN F 1 "+3V3" H 1215 6423 50 0000 C CNN F 2 "" H 1200 6250 50 0001 C CNN F 3 "" H 1200 6250 50 0001 C CNN 1 1200 6250 1 0 0 -1 $EndComp $Comp L power:+5V #PWR0102 U 1 1 5E97C21D P 2150 6250 F 0 "#PWR0102" H 2150 6100 50 0001 C CNN F 1 "+5V" H 2165 6423 50 0000 C CNN F 2 "" H 2150 6250 50 0001 C CNN F 3 "" H 2150 6250 50 0001 C CNN 1 2150 6250 1 0 0 -1 $EndComp $Comp L power:PWR_FLAG #FLG0101 U 1 1 5E97C674 P 950 5850 F 0 "#FLG0101" H 950 5925 50 0001 C CNN F 1 "PWR_FLAG" H 950 6023 50 0000 C CNN F 2 "" H 950 5850 50 0001 C CNN F 3 "~" H 950 5850 50 0001 C CNN 1 950 5850 1 0 0 -1 $EndComp Wire Wire Line 950 6250 950 5850 Connection ~ 950 6250 Wire Wire Line 950 6250 1200 6250 $Comp L power:GND #PWR0103 U 1 1 5E97DBEE P 2600 6250 F 0 "#PWR0103" H 2600 6000 50 0001 C CNN F 1 "GND" H 2605 6077 50 0000 C CNN F 2 "" H 2600 6250 50 0001 C CNN F 3 "" H 2600 6250 50 0001 C CNN 1 2600 6250 1 0 0 -1 $EndComp Wire Wire Line 1800 6250 1900 6250 $Comp L power:PWR_FLAG #FLG0102 U 1 1 5E97F87F P 1900 5850 F 0 "#FLG0102" H 1900 5925 50 0001 C CNN F 1 "PWR_FLAG" H 1900 6023 50 0000 C CNN F 2 "" H 1900 5850 50 0001 C CNN F 3 "~" H 1900 5850 50 0001 C CNN 1 1900 5850 1 0 0 -1 $EndComp Wire Wire Line 1900 6250 1900 5850 Connection ~ 1900 6250 Wire Wire Line 1900 6250 2150 6250 $Comp L power:PWR_FLAG #FLG0103 U 1 1 5E980A5B P 2600 5850 F 0 "#FLG0103" H 2600 5925 50 0001 C CNN F 1 "PWR_FLAG" H 2600 6023 50 0000 C CNN F 2 "" H 2600 5850 50 0001 C CNN F 3 "~" H 2600 5850 50 0001 C CNN 1 2600 5850 1 0 0 -1 $EndComp Wire Wire Line 2600 6250 2600 5850 Text Label 4050 1150 0 50 ~ 0 DEBUG_TX Wire Wire Line 4000 1150 4050 1150 Wire Wire Line 4000 1250 4050 1250 Text Label 4050 1250 0 50 ~ 0 DEBUG_RX Wire Wire Line 4000 1350 4050 1350 Wire Wire Line 4000 1450 4050 1450 Wire Wire Line 4000 1550 4050 1550 Wire Wire Line 4000 1650 4050 1650 Wire Wire Line 4000 1750 4050 1750 Wire Wire Line 4000 1850 4050 1850 Wire Wire Line 4000 1950 4050 1950 Wire Wire Line 4000 2050 4050 2050 Text Label 4050 1350 0 50 ~ 0 MASTER_SPI_MOSI Text Label 4050 1450 0 50 ~ 0 MASTER_SPI_MISO Text Label 4050 1550 0 50 ~ 0 MASTER_SPI_CLK Text Label 4050 1650 0 50 ~ 0 ~TFT_CS Text Label 5700 1300 2 50 ~ 0 MASTER_SPI_MOSI Wire Wire Line 5700 1200 5750 1200 Text Label 5700 1200 2 50 ~ 0 MASTER_SPI_MISO Wire Wire Line 5700 1300 5750 1300 Text Label 5700 1100 2 50 ~ 0 MASTER_SPI_CLK Wire Wire Line 5700 1100 5750 1100 Text Label 5700 1550 2 50 ~ 0 ~TFT_CS Wire Wire Line 5700 1550 5750 1550 Text Label 4050 1950 0 50 ~ 0 MASTER_I2C_SDA Text Label 4050 2050 0 50 ~ 0 MASTER_I2C_SCL Text Label 5700 2200 2 50 ~ 0 MASTER_I2C_SDA Text Label 5700 2300 2 50 ~ 0 MASTER_I2C_SCL Wire Wire Line 5750 2200 5700 2200 Wire Wire Line 5750 2300 5700 2300 Wire Wire Line 3950 3550 4050 3550 Wire Wire Line 3950 3450 4050 3450 Text Label 4050 3550 0 50 ~ 0 DEBUG_RX Text Label 4050 3450 0 50 ~ 0 DEBUG_TX $Sheet S 650 3350 3300 1900 U 5E7C0F59 F0 "s_USB_INTF.sch" 50 F1 "USB_INTF.sch" 50 F2 "DEBUG_TX" I R 3950 3450 50 F3 "DEBUG_RX" I R 3950 3550 50 F4 "FTDI_5V" I R 3950 3750 50 F5 "FTDI_3V3" I R 3950 3850 50 $EndSheet $Sheet S 750 800 3250 2350 U 5E805E4F F0 "s_BRAIN" 50 F1 "BRAIN.sch" 50 F2 "DEBUG_TX" I R 4000 1150 50 F3 "DEBUG_RX" I R 4000 1250 50 F4 "MASTER_SPI_MOSI" I R 4000 1350 50 F5 "MASTER_SPI_MISO" I R 4000 1450 50 F6 "MASTER_SPI_CLK" I R 4000 1550 50 F7 "~FLASH_MEM_CS" I R 4000 1750 50 F8 "MASTER_I2C_SDA" I R 4000 1950 50 F9 "MASTER_I2C_SCL" I R 4000 2050 50 F10 "~IO_EXPANDER_CS" I R 4000 1850 50 F11 "~TFT_CS" I R 4000 1650 50 F12 "~TFT_WR" I R 4000 2150 50 F13 "~TFT_RD" I R 4000 2250 50 F14 "TFT_RSDC" I R 4000 2350 50 F15 "~TFT_RST" I R 4000 2450 50 $EndSheet $EndSCHEMATC