diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/.vs/oracle_test_d21/v14/.atsuo b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/.vs/oracle_test_d21/v14/.atsuo
index 5e36b96..629acd8 100644
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diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.bin b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.bin
index 1ba3b57..8f67c58 100644
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diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.elf b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.elf
index c14fb81..3fbeea0 100644
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index 11bb2f0..503976f 100644
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diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.lss b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.lss
index ed8171f..fac8e83 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.lss
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.lss
@@ -3,37 +3,37 @@ oracle_test_d21.elf:     file format elf32-littlearm
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         0001cb10  00000000  00000000  00010000  2**2
+  0 .text         0001c9a0  00000000  00000000  00010000  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .ARM.exidx    00000008  0001cb10  0001cb10  0002cb10  2**2
+  1 .ARM.exidx    00000008  0001c9a0  0001c9a0  0002c9a0  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  2 .relocate     000000c4  20000000  0001cb18  00030000  2**2
+  2 .relocate     000000c4  20000000  0001c9a8  00030000  2**2
                   CONTENTS, ALLOC, LOAD, CODE
-  3 .bss          00004d70  200000c8  0001cbe0  000300c4  2**3
+  3 .bss          00004d70  200000c8  0001ca70  000300c4  2**3
                   ALLOC
-  4 .stack        00002000  20004e38  00021950  000300c4  2**0
+  4 .stack        00002000  20004e38  000217e0  000300c4  2**0
                   ALLOC
   5 .ARM.attributes 00000028  00000000  00000000  000300c4  2**0
                   CONTENTS, READONLY
   6 .comment      00000059  00000000  00000000  000300ec  2**0
                   CONTENTS, READONLY
-  7 .debug_info   0008aaaa  00000000  00000000  00030145  2**0
+  7 .debug_info   00089e2c  00000000  00000000  00030145  2**0
                   CONTENTS, READONLY, DEBUGGING
-  8 .debug_abbrev 0000bbd3  00000000  00000000  000babef  2**0
+  8 .debug_abbrev 0000bbb5  00000000  00000000  000b9f71  2**0
                   CONTENTS, READONLY, DEBUGGING
-  9 .debug_aranges 000017e0  00000000  00000000  000c67c2  2**0
+  9 .debug_aranges 000017e0  00000000  00000000  000c5b26  2**0
                   CONTENTS, READONLY, DEBUGGING
- 10 .debug_ranges 00003230  00000000  00000000  000c7fa2  2**0
+ 10 .debug_ranges 00003230  00000000  00000000  000c7306  2**0
                   CONTENTS, READONLY, DEBUGGING
- 11 .debug_macro  0002642b  00000000  00000000  000cb1d2  2**0
+ 11 .debug_macro  0002642b  00000000  00000000  000ca536  2**0
                   CONTENTS, READONLY, DEBUGGING
- 12 .debug_line   000310b5  00000000  00000000  000f15fd  2**0
+ 12 .debug_line   00030f4b  00000000  00000000  000f0961  2**0
                   CONTENTS, READONLY, DEBUGGING
- 13 .debug_str    0009fce7  00000000  00000000  001226b2  2**0
+ 13 .debug_str    0009fce3  00000000  00000000  001218ac  2**0
                   CONTENTS, READONLY, DEBUGGING
- 14 .debug_frame  00004794  00000000  00000000  001c239c  2**2
+ 14 .debug_frame  000047b8  00000000  00000000  001c1590  2**2
                   CONTENTS, READONLY, DEBUGGING
- 15 .debug_loc    0003d5da  00000000  00000000  001c6b30  2**0
+ 15 .debug_loc    0003cca8  00000000  00000000  001c5d48  2**0
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -77,7 +77,7 @@ void _lv_gc_clear_roots(void)
       ce:	bd10      	pop	{r4, pc}
       d0:	200000c8 	.word	0x200000c8
       d4:	00000000 	.word	0x00000000
-      d8:	0001cb18 	.word	0x0001cb18
+      d8:	0001c9a8 	.word	0x0001c9a8
 
 000000dc <frame_dummy>:
       dc:	4b08      	ldr	r3, [pc, #32]	; (100 <frame_dummy+0x24>)
@@ -100,8 +100,8 @@ void _lv_gc_clear_roots(void)
       fe:	e7f9      	b.n	f4 <frame_dummy+0x18>
      100:	00000000 	.word	0x00000000
      104:	200000cc 	.word	0x200000cc
-     108:	0001cb18 	.word	0x0001cb18
-     10c:	0001cb18 	.word	0x0001cb18
+     108:	0001c9a8 	.word	0x0001c9a8
+     10c:	0001c9a8 	.word	0x0001c9a8
      110:	00000000 	.word	0x00000000
 
 00000114 <p_time_init>:
@@ -259,9 +259,9 @@ __STATIC_FORCEINLINE void __DMB(void)
      1be:	46c0      	nop			; (mov r8, r8)
      1c0:	00001345 	.word	0x00001345
      1c4:	2000000c 	.word	0x2000000c
-     1c8:	000178c9 	.word	0x000178c9
-     1cc:	00017859 	.word	0x00017859
-     1d0:	000177a5 	.word	0x000177a5
+     1c8:	00017759 	.word	0x00017759
+     1cc:	000176e9 	.word	0x000176e9
+     1d0:	000175c5 	.word	0x000175c5
      1d4:	00000115 	.word	0x00000115
      1d8:	00001861 	.word	0x00001861
      1dc:	0001696d 	.word	0x0001696d
@@ -269,9 +269,9 @@ __STATIC_FORCEINLINE void __DMB(void)
      1e4:	200000f0 	.word	0x200000f0
      1e8:	0000f4c1 	.word	0x0000f4c1
      1ec:	0000f45d 	.word	0x0000f45d
-     1f0:	00017489 	.word	0x00017489
+     1f0:	000172a9 	.word	0x000172a9
      1f4:	0000f4e1 	.word	0x0000f4e1
-     1f8:	000179c5 	.word	0x000179c5
+     1f8:	00017855 	.word	0x00017855
 
 000001fc <oracle_service>:
 
@@ -302,7 +302,7 @@ void oracle_service(void)
      224:	000010cd 	.word	0x000010cd
      228:	00001b57 	.word	0x00001b57
      22c:	00001b58 	.word	0x00001b58
-     230:	00017cdd 	.word	0x00017cdd
+     230:	00017b6d 	.word	0x00017b6d
      234:	20000001 	.word	0x20000001
      238:	0001135d 	.word	0x0001135d
 
@@ -590,7 +590,7 @@ enum status_code _sercom_get_sync_baud_val(
      3a6:	0352      	lsls	r2, r2, #13
      3a8:	432a      	orrs	r2, r5
      3aa:	e7db      	b.n	364 <_sercom_get_async_baud_val+0x44>
-     3ac:	00017d1d 	.word	0x00017d1d
+     3ac:	00017bad 	.word	0x00017bad
      3b0:	0000023d 	.word	0x0000023d
 
 000003b4 <sercom_set_gclk_generator>:
@@ -895,7 +895,7 @@ uint8_t _sercom_get_sercom_inst_index(
 			return i;
      5a8:	b2d8      	uxtb	r0, r3
      5aa:	e7fa      	b.n	5a2 <_sercom_get_sercom_inst_index+0x2a>
-     5ac:	00018834 	.word	0x00018834
+     5ac:	000186c4 	.word	0x000186c4
 
 000005b0 <usart_init>:
  */
@@ -2661,7 +2661,7 @@ uint32_t system_clock_source_get_hz(
 }
      e14:	bd10      	pop	{r4, pc}
      e16:	46c0      	nop			; (mov r8, r8)
-     e18:	0001884c 	.word	0x0001884c
+     e18:	000186dc 	.word	0x000186dc
      e1c:	200026b8 	.word	0x200026b8
      e20:	40000800 	.word	0x40000800
      e24:	007a1200 	.word	0x007a1200
@@ -2831,7 +2831,7 @@ enum status_code system_clock_source_enable(
      f04:	2000      	movs	r0, #0
 }
      f06:	4770      	bx	lr
-     f08:	00018870 	.word	0x00018870
+     f08:	00018700 	.word	0x00018700
      f0c:	40000800 	.word	0x40000800
      f10:	200026b8 	.word	0x200026b8
 
@@ -3343,7 +3343,7 @@ uint32_t system_gclk_gen_get_hz(
     1148:	00000d9d 	.word	0x00000d9d
     114c:	40000c08 	.word	0x40000c08
     1150:	00000ced 	.word	0x00000ced
-    1154:	000179f1 	.word	0x000179f1
+    1154:	00017881 	.word	0x00017881
 
 00001158 <system_gclk_chan_enable>:
  *
@@ -3958,7 +3958,7 @@ void Dummy_Handler(void)
     141a:	4b0e      	ldr	r3, [pc, #56]	; (1454 <Reset_Handler+0xe0>)
     141c:	4798      	blx	r3
     141e:	e7fe      	b.n	141e <Reset_Handler+0xaa>
-    1420:	0001cb18 	.word	0x0001cb18
+    1420:	0001c9a8 	.word	0x0001c9a8
     1424:	20000000 	.word	0x20000000
     1428:	200000c4 	.word	0x200000c4
     142c:	20000004 	.word	0x20000004
@@ -3970,8 +3970,8 @@ void Dummy_Handler(void)
     1444:	41005000 	.word	0x41005000
     1448:	41004800 	.word	0x41004800
     144c:	41004000 	.word	0x41004000
-    1450:	00017f45 	.word	0x00017f45
-    1454:	000179dd 	.word	0x000179dd
+    1450:	00017dd5 	.word	0x00017dd5
+    1454:	0001786d 	.word	0x0001786d
 
 00001458 <_sbrk>:
 extern void _exit(int status);
@@ -4062,7 +4062,7 @@ void lv_debug_log_error(const char * msg, uint64_t value)
 }
     14a0:	e7f7      	b.n	1492 <lv_debug_log_error+0xe>
     14a2:	46c0      	nop			; (mov r8, r8)
-    14a4:	00017ff1 	.word	0x00017ff1
+    14a4:	00017e81 	.word	0x00017e81
     14a8:	00010c8d 	.word	0x00010c8d
 
 000014ac <lv_disp_get_scr_act>:
@@ -4528,7 +4528,7 @@ static void obj_to_foreground(lv_obj_t * obj)
     1730:	00001675 	.word	0x00001675
     1734:	0001061d 	.word	0x0001061d
     1738:	0000147d 	.word	0x0000147d
-    173c:	00018894 	.word	0x00018894
+    173c:	00018724 	.word	0x00018724
     1740:	00001485 	.word	0x00001485
 
 00001744 <lv_group_get_focused>:
@@ -4828,7 +4828,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     18e4:	20004d68 	.word	0x20004d68
     18e8:	000105b9 	.word	0x000105b9
     18ec:	20000030 	.word	0x20000030
-    18f0:	000188a2 	.word	0x000188a2
+    18f0:	00018732 	.word	0x00018732
     18f4:	00014491 	.word	0x00014491
     18f8:	00011c51 	.word	0x00011c51
     18fc:	0000429d 	.word	0x0000429d
@@ -4867,7 +4867,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     193c:	4788      	blx	r1
     193e:	e7fe      	b.n	193e <lv_obj_set_click+0x2a>
     1940:	0000147d 	.word	0x0000147d
-    1944:	000188fc 	.word	0x000188fc
+    1944:	0001878c 	.word	0x0001878c
     1948:	00001485 	.word	0x00001485
 
 0000194c <lv_event_send_func>:
@@ -4990,7 +4990,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     19fc:	200026dc 	.word	0x200026dc
     1a00:	0000176d 	.word	0x0000176d
     1a04:	00001a11 	.word	0x00001a11
-    1a08:	000188fc 	.word	0x000188fc
+    1a08:	0001878c 	.word	0x0001878c
     1a0c:	00001485 	.word	0x00001485
 
 00001a10 <lv_event_send>:
@@ -5027,7 +5027,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     1a40:	e7fc      	b.n	1a3c <lv_event_send+0x2c>
     1a42:	46c0      	nop			; (mov r8, r8)
     1a44:	0000147d 	.word	0x0000147d
-    1a48:	000188fc 	.word	0x000188fc
+    1a48:	0001878c 	.word	0x0001878c
     1a4c:	00001485 	.word	0x00001485
     1a50:	0000194d 	.word	0x0000194d
 
@@ -5078,7 +5078,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
 }
     1a92:	bd10      	pop	{r4, pc}
     1a94:	0000147d 	.word	0x0000147d
-    1a98:	000188fc 	.word	0x000188fc
+    1a98:	0001878c 	.word	0x0001878c
     1a9c:	00001485 	.word	0x00001485
 
 00001aa0 <lv_obj_get_parent>:
@@ -5102,7 +5102,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     1ab8:	4788      	blx	r1
     1aba:	e7fe      	b.n	1aba <lv_obj_get_parent+0x1a>
     1abc:	0000147d 	.word	0x0000147d
-    1ac0:	000188fc 	.word	0x000188fc
+    1ac0:	0001878c 	.word	0x0001878c
     1ac4:	00001485 	.word	0x00001485
 
 00001ac8 <lv_obj_get_screen>:
@@ -5137,7 +5137,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     1af2:	46c0      	nop			; (mov r8, r8)
     1af4:	0000147d 	.word	0x0000147d
     1af8:	00001aa1 	.word	0x00001aa1
-    1afc:	000188fc 	.word	0x000188fc
+    1afc:	0001878c 	.word	0x0001878c
     1b00:	00001485 	.word	0x00001485
 
 00001b04 <lv_obj_get_disp>:
@@ -5215,7 +5215,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     1b7c:	20004cc4 	.word	0x20004cc4
     1b80:	0001066d 	.word	0x0001066d
     1b84:	00010685 	.word	0x00010685
-    1b88:	000188fc 	.word	0x000188fc
+    1b88:	0001878c 	.word	0x0001878c
     1b8c:	00001485 	.word	0x00001485
 
 00001b90 <lv_obj_get_child>:
@@ -5252,7 +5252,7 @@ static void refresh_children_position(lv_obj_t * obj, lv_coord_t x_diff, lv_coor
     1bbe:	e7f4      	b.n	1baa <lv_obj_get_child+0x1a>
     1bc0:	0000147d 	.word	0x0000147d
     1bc4:	00010685 	.word	0x00010685
-    1bc8:	000188fc 	.word	0x000188fc
+    1bc8:	0001878c 	.word	0x0001878c
     1bcc:	00001485 	.word	0x00001485
     1bd0:	0001066d 	.word	0x0001066d
 
@@ -5298,7 +5298,7 @@ LV_ATTRIBUTE_FAST_MEM static inline void * _lv_memcpy_small(void * dst, const vo
     1c00:	e7fe      	b.n	1c00 <lv_obj_get_coords+0x2c>
     1c02:	46c0      	nop			; (mov r8, r8)
     1c04:	0000147d 	.word	0x0000147d
-    1c08:	000188fc 	.word	0x000188fc
+    1c08:	0001878c 	.word	0x0001878c
     1c0c:	00001485 	.word	0x00001485
 
 00001c10 <lv_obj_get_x>:
@@ -5336,7 +5336,7 @@ LV_ATTRIBUTE_FAST_MEM static inline void * _lv_memcpy_small(void * dst, const vo
     1c40:	e7fb      	b.n	1c3a <lv_obj_get_x+0x2a>
     1c42:	46c0      	nop			; (mov r8, r8)
     1c44:	0000147d 	.word	0x0000147d
-    1c48:	000188fc 	.word	0x000188fc
+    1c48:	0001878c 	.word	0x0001878c
     1c4c:	00001485 	.word	0x00001485
     1c50:	00001aa1 	.word	0x00001aa1
 
@@ -5375,7 +5375,7 @@ LV_ATTRIBUTE_FAST_MEM static inline void * _lv_memcpy_small(void * dst, const vo
     1c84:	e7fb      	b.n	1c7e <lv_obj_get_y+0x2a>
     1c86:	46c0      	nop			; (mov r8, r8)
     1c88:	0000147d 	.word	0x0000147d
-    1c8c:	000188fc 	.word	0x000188fc
+    1c8c:	0001878c 	.word	0x0001878c
     1c90:	00001485 	.word	0x00001485
     1c94:	00001aa1 	.word	0x00001aa1
 
@@ -5410,7 +5410,7 @@ static inline lv_coord_t lv_area_get_width(const lv_area_t * area_p)
     1cb8:	4788      	blx	r1
     1cba:	e7fe      	b.n	1cba <lv_obj_get_width+0x22>
     1cbc:	0000147d 	.word	0x0000147d
-    1cc0:	000188fc 	.word	0x000188fc
+    1cc0:	0001878c 	.word	0x0001878c
     1cc4:	00001485 	.word	0x00001485
 
 00001cc8 <lv_obj_get_height>:
@@ -5444,7 +5444,7 @@ static inline lv_coord_t lv_area_get_height(const lv_area_t * area_p)
     1ce8:	4788      	blx	r1
     1cea:	e7fe      	b.n	1cea <lv_obj_get_height+0x22>
     1cec:	0000147d 	.word	0x0000147d
-    1cf0:	000188fc 	.word	0x000188fc
+    1cf0:	0001878c 	.word	0x0001878c
     1cf4:	00001485 	.word	0x00001485
 
 00001cf8 <lv_obj_get_style_list>:
@@ -5735,7 +5735,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     1ea4:	e7fe      	b.n	1ea4 <lv_obj_get_hidden+0x20>
     1ea6:	46c0      	nop			; (mov r8, r8)
     1ea8:	0000147d 	.word	0x0000147d
-    1eac:	000188fc 	.word	0x000188fc
+    1eac:	0001878c 	.word	0x0001878c
     1eb0:	00001485 	.word	0x00001485
 
 00001eb4 <lv_obj_invalidate_area>:
@@ -5869,7 +5869,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     1f7c:	e7ad      	b.n	1eda <lv_obj_invalidate_area+0x26>
     1f7e:	46c0      	nop			; (mov r8, r8)
     1f80:	0000147d 	.word	0x0000147d
-    1f84:	000188fc 	.word	0x000188fc
+    1f84:	0001878c 	.word	0x0001878c
     1f88:	00001485 	.word	0x00001485
     1f8c:	00001e85 	.word	0x00001e85
     1f90:	00001ac9 	.word	0x00001ac9
@@ -5941,7 +5941,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     2006:	46c0      	nop			; (mov r8, r8)
     2008:	0000147d 	.word	0x0000147d
     200c:	00001eb5 	.word	0x00001eb5
-    2010:	000188fc 	.word	0x000188fc
+    2010:	0001878c 	.word	0x0001878c
     2014:	00001485 	.word	0x00001485
 
 00002018 <lv_obj_move_foreground>:
@@ -5995,7 +5995,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     2064:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     2066:	46c0      	nop			; (mov r8, r8)
     2068:	0000147d 	.word	0x0000147d
-    206c:	000188fc 	.word	0x000188fc
+    206c:	0001878c 	.word	0x0001878c
     2070:	00001485 	.word	0x00001485
     2074:	00001aa1 	.word	0x00001aa1
     2078:	0001066d 	.word	0x0001066d
@@ -6112,7 +6112,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     2134:	00001fb1 	.word	0x00001fb1
     2138:	00001bd5 	.word	0x00001bd5
     213c:	00001809 	.word	0x00001809
-    2140:	000188fc 	.word	0x000188fc
+    2140:	0001878c 	.word	0x0001878c
     2144:	00001485 	.word	0x00001485
 
 00002148 <lv_obj_align>:
@@ -6228,7 +6228,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     21fc:	46a2      	mov	sl, r4
     21fe:	bdf0      	pop	{r4, r5, r6, r7, pc}
     2200:	0000147d 	.word	0x0000147d
-    2204:	000188fc 	.word	0x000188fc
+    2204:	0001878c 	.word	0x0001878c
     2208:	00001485 	.word	0x00001485
     220c:	00001aa1 	.word	0x00001aa1
     2210:	0000ff41 	.word	0x0000ff41
@@ -6659,13 +6659,13 @@ static void trans_anim_ready_cb(lv_anim_t * a)
             break;
     24ba:	e707      	b.n	22cc <lv_obj_align_origo+0xb4>
     24bc:	0000147d 	.word	0x0000147d
-    24c0:	000188fc 	.word	0x000188fc
+    24c0:	0001878c 	.word	0x0001878c
     24c4:	00001485 	.word	0x00001485
     24c8:	00001c11 	.word	0x00001c11
     24cc:	00001c55 	.word	0x00001c55
     24d0:	00001c99 	.word	0x00001c99
     24d4:	00001cc9 	.word	0x00001cc9
-    24d8:	000188a4 	.word	0x000188a4
+    24d8:	00018734 	.word	0x00018734
     24dc:	00001aa1 	.word	0x00001aa1
     24e0:	00002085 	.word	0x00002085
 
@@ -6722,7 +6722,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     2536:	e7eb      	b.n	2510 <lv_obj_realign+0x2c>
     2538:	0000147d 	.word	0x0000147d
     253c:	00002219 	.word	0x00002219
-    2540:	000188fc 	.word	0x000188fc
+    2540:	0001878c 	.word	0x0001878c
     2544:	00001485 	.word	0x00001485
     2548:	00002149 	.word	0x00002149
 
@@ -6890,7 +6890,7 @@ static void trans_anim_ready_cb(lv_anim_t * a)
     2656:	e7dd      	b.n	2614 <lv_obj_refresh_style+0x88>
     2658:	0000147d 	.word	0x0000147d
     265c:	00001fb1 	.word	0x00001fb1
-    2660:	000188fc 	.word	0x000188fc
+    2660:	0001878c 	.word	0x0001878c
     2664:	00001485 	.word	0x00001485
     2668:	00008081 	.word	0x00008081
     266c:	00008080 	.word	0x00008080
@@ -7273,7 +7273,7 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     28d4:	4788      	blx	r1
     28d6:	e7fe      	b.n	28d6 <lv_obj_get_base_dir+0x1a>
     28d8:	0000147d 	.word	0x0000147d
-    28dc:	000188fc 	.word	0x000188fc
+    28dc:	0001878c 	.word	0x0001878c
     28e0:	00001485 	.word	0x00001485
 
 000028e4 <lv_obj_create>:
@@ -7848,11 +7848,11 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     2c9c:	e03a      	b.n	2d14 <lv_obj_create+0x430>
     2c9e:	46c0      	nop			; (mov r8, r8)
     2ca0:	0000147d 	.word	0x0000147d
-    2ca4:	000188fc 	.word	0x000188fc
+    2ca4:	0001878c 	.word	0x0001878c
     2ca8:	00001485 	.word	0x00001485
     2cac:	0000f609 	.word	0x0000f609
     2cb0:	000105cd 	.word	0x000105cd
-    2cb4:	00018894 	.word	0x00018894
+    2cb4:	00018724 	.word	0x00018724
     2cb8:	0001104d 	.word	0x0001104d
     2cbc:	00003e41 	.word	0x00003e41
     2cc0:	000039e1 	.word	0x000039e1
@@ -7868,7 +7868,7 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     2ce8:	00002085 	.word	0x00002085
     2cec:	0000f665 	.word	0x0000f665
     2cf0:	000028bd 	.word	0x000028bd
-    2cf4:	000179f1 	.word	0x000179f1
+    2cf4:	00017881 	.word	0x00017881
     2cf8:	00011c69 	.word	0x00011c69
     if(parent != NULL) {
     2cfc:	4653      	mov	r3, sl
@@ -7926,7 +7926,7 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     2d50:	4788      	blx	r1
     2d52:	e7fe      	b.n	2d52 <lv_obj_is_protected+0x26>
     2d54:	0000147d 	.word	0x0000147d
-    2d58:	000188fc 	.word	0x000188fc
+    2d58:	0001878c 	.word	0x0001878c
     2d5c:	00001485 	.word	0x00001485
 
 00002d60 <lv_obj_get_state>:
@@ -7972,7 +7972,7 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     2d9c:	e7ec      	b.n	2d78 <lv_obj_get_state+0x18>
     2d9e:	46c0      	nop			; (mov r8, r8)
     2da0:	0000147d 	.word	0x0000147d
-    2da4:	000188fc 	.word	0x000188fc
+    2da4:	0001878c 	.word	0x0001878c
     2da8:	00001485 	.word	0x00001485
     2dac:	00001a55 	.word	0x00001a55
 
@@ -8195,7 +8195,7 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     2f04:	000058b5 	.word	0x000058b5
     2f08:	00001aa1 	.word	0x00001aa1
     2f0c:	ffff80ff 	.word	0xffff80ff
-    2f10:	000188f8 	.word	0x000188f8
+    2f10:	00018788 	.word	0x00018788
 
 00002f14 <_lv_obj_get_style_opa>:
 {
@@ -8406,7 +8406,7 @@ LV_ATTRIBUTE_FAST_MEM static inline lv_color_t lv_color_mix(lv_color_t c1, lv_co
     3068:	ffff80ff 	.word	0xffff80ff
     306c:	0000808e 	.word	0x0000808e
     3070:	00011c5d 	.word	0x00011c5d
-    3074:	0001c8d8 	.word	0x0001c8d8
+    3074:	0001c768 	.word	0x0001c768
 
 00003078 <trans_anim_start_cb>:
 {
@@ -9012,7 +9012,7 @@ static inline void lv_anim_set_ready_cb(lv_anim_t * a, lv_anim_ready_cb_t ready_
     3414:	4788      	blx	r1
     3416:	e7fe      	b.n	3416 <lv_obj_set_state+0x32a>
     3418:	0000147d 	.word	0x0000147d
-    341c:	000188fc 	.word	0x000188fc
+    341c:	0001878c 	.word	0x0001878c
     3420:	00001485 	.word	0x00001485
     3424:	00002db1 	.word	0x00002db1
     3428:	00004cf5 	.word	0x00004cf5
@@ -9030,11 +9030,11 @@ static inline void lv_anim_set_ready_cb(lv_anim_t * a, lv_anim_ready_cb_t ready_
     3458:	00004fb5 	.word	0x00004fb5
     345c:	00007fff 	.word	0x00007fff
     3460:	00001c99 	.word	0x00001c99
-    3464:	00018894 	.word	0x00018894
+    3464:	00018724 	.word	0x00018724
     3468:	00002e71 	.word	0x00002e71
     346c:	00004e55 	.word	0x00004e55
     3470:	00002fc1 	.word	0x00002fc1
-    3474:	00017f8d 	.word	0x00017f8d
+    3474:	00017e1d 	.word	0x00017e1d
     3478:	00005109 	.word	0x00005109
     for(part = 0; part < _LV_OBJ_PART_REAL_LAST; part++) {
     347c:	9b00      	ldr	r3, [sp, #0]
@@ -9230,7 +9230,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(TRANSITION_PROP_6, transition_prop_6, lv_style_int
     35ae:	46c0      	nop			; (mov r8, r8)
     35b0:	0000147d 	.word	0x0000147d
     35b4:	000030ed 	.word	0x000030ed
-    35b8:	000188fc 	.word	0x000188fc
+    35b8:	0001878c 	.word	0x0001878c
     35bc:	00001485 	.word	0x00001485
 
 000035c0 <lv_obj_clear_state>:
@@ -9267,7 +9267,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(TRANSITION_PROP_6, transition_prop_6, lv_style_int
     35ee:	46c0      	nop			; (mov r8, r8)
     35f0:	0000147d 	.word	0x0000147d
     35f4:	000030ed 	.word	0x000030ed
-    35f8:	000188fc 	.word	0x000188fc
+    35f8:	0001878c 	.word	0x0001878c
     35fc:	00001485 	.word	0x00001485
 
 00003600 <lv_obj_get_group>:
@@ -9291,7 +9291,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(TRANSITION_PROP_6, transition_prop_6, lv_style_int
     3618:	4788      	blx	r1
     361a:	e7fe      	b.n	361a <lv_obj_get_group+0x1a>
     361c:	0000147d 	.word	0x0000147d
-    3620:	000188fc 	.word	0x000188fc
+    3620:	0001878c 	.word	0x0001878c
     3624:	00001485 	.word	0x00001485
 
 00003628 <lv_obj_is_focused>:
@@ -9328,7 +9328,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(TRANSITION_PROP_6, transition_prop_6, lv_style_int
     3656:	e7f6      	b.n	3646 <lv_obj_is_focused+0x1e>
     3658:	0000147d 	.word	0x0000147d
     365c:	00001745 	.word	0x00001745
-    3660:	000188fc 	.word	0x000188fc
+    3660:	0001878c 	.word	0x0001878c
     3664:	00001485 	.word	0x00001485
 
 00003668 <lv_obj_handle_get_type_signal>:
@@ -10736,7 +10736,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(OUTLINE_PAD, outline_pad, lv_style_int_t, _int, sc
     3f28:	e7b0      	b.n	3e8c <lv_obj_signal+0x4c>
     3f2a:	46c0      	nop			; (mov r8, r8)
     3f2c:	00001dd5 	.word	0x00001dd5
-    3f30:	0001890c 	.word	0x0001890c
+    3f30:	0001879c 	.word	0x0001879c
     3f34:	00003669 	.word	0x00003669
     3f38:	00002d2d 	.word	0x00002d2d
     3f3c:	00003c35 	.word	0x00003c35
@@ -11967,7 +11967,7 @@ static void lv_refr_vdb_flush(void)
     4710:	0000f63d 	.word	0x0000f63d
     4714:	000041f9 	.word	0x000041f9
     4718:	0000f725 	.word	0x0000f725
-    471c:	000179f1 	.word	0x000179f1
+    471c:	00017881 	.word	0x00017881
             if(y2 == row_last) disp_refr->driver.buffer->last_part = 1;
     4720:	42af      	cmp	r7, r5
     4722:	d01c      	beq.n	475e <_lv_disp_refr_task+0x3a2>
@@ -12463,7 +12463,7 @@ void _lv_style_list_remove_style(lv_style_list_t * list, lv_style_t * style)
     4a08:	00010e45 	.word	0x00010e45
     4a0c:	0000147d 	.word	0x0000147d
     4a10:	00010b39 	.word	0x00010b39
-    4a14:	00018894 	.word	0x00018894
+    4a14:	00018724 	.word	0x00018724
     4a18:	00001485 	.word	0x00001485
 
 00004a1c <_lv_style_list_add_style>:
@@ -12559,7 +12559,7 @@ void _lv_style_list_remove_style(lv_style_list_t * list, lv_style_t * style)
     4ab0:	3fffffff 	.word	0x3fffffff
     4ab4:	3ffffffe 	.word	0x3ffffffe
     4ab8:	00010e45 	.word	0x00010e45
-    4abc:	00018894 	.word	0x00018894
+    4abc:	00018724 	.word	0x00018724
     4ac0:	00001485 	.word	0x00001485
 
 00004ac4 <get_alloc_local_style>:
@@ -12647,7 +12647,7 @@ static lv_style_t * get_alloc_local_style(lv_style_list_t * list)
     4b34:	0000147d 	.word	0x0000147d
     4b38:	0000494d 	.word	0x0000494d
     4b3c:	00004a1d 	.word	0x00004a1d
-    4b40:	00018894 	.word	0x00018894
+    4b40:	00018724 	.word	0x00018724
     4b44:	00001485 	.word	0x00001485
 
 00004b48 <lv_style_reset>:
@@ -13143,7 +13143,7 @@ static lv_style_t * get_alloc_local_style(lv_style_list_t * list)
     4e40:	00004b5d 	.word	0x00004b5d
     4e44:	00010e45 	.word	0x00010e45
     4e48:	0000147d 	.word	0x0000147d
-    4e4c:	00018894 	.word	0x00018894
+    4e4c:	00018724 	.word	0x00018724
     4e50:	00001485 	.word	0x00001485
 
 00004e54 <_lv_style_set_color>:
@@ -13355,7 +13355,7 @@ static lv_style_t * get_alloc_local_style(lv_style_list_t * list)
     4fa0:	00004b5d 	.word	0x00004b5d
     4fa4:	00010e45 	.word	0x00010e45
     4fa8:	0000147d 	.word	0x0000147d
-    4fac:	00018894 	.word	0x00018894
+    4fac:	00018724 	.word	0x00018724
     4fb0:	00001485 	.word	0x00001485
 
 00004fb4 <_lv_style_set_opa>:
@@ -13560,7 +13560,7 @@ static lv_style_t * get_alloc_local_style(lv_style_list_t * list)
     50f4:	00004b5d 	.word	0x00004b5d
     50f8:	00010e45 	.word	0x00010e45
     50fc:	0000147d 	.word	0x0000147d
-    5100:	00018894 	.word	0x00018894
+    5100:	00018724 	.word	0x00018724
     5104:	00001485 	.word	0x00001485
 
 00005108 <_lv_style_set_ptr>:
@@ -13786,7 +13786,7 @@ static lv_style_t * get_alloc_local_style(lv_style_list_t * list)
     5270:	00004b5d 	.word	0x00004b5d
     5274:	00010e45 	.word	0x00010e45
     5278:	0000147d 	.word	0x0000147d
-    527c:	00018894 	.word	0x00018894
+    527c:	00018724 	.word	0x00018724
     5280:	00001485 	.word	0x00001485
 
 00005284 <_lv_style_get_int>:
@@ -14667,7 +14667,7 @@ static lv_style_t * get_alloc_local_style(lv_style_list_t * list)
     57cc:	0000147d 	.word	0x0000147d
     57d0:	0000494d 	.word	0x0000494d
     57d4:	00004a1d 	.word	0x00004a1d
-    57d8:	00018894 	.word	0x00018894
+    57d8:	00018724 	.word	0x00018724
     57dc:	00001485 	.word	0x00001485
 
 000057e0 <_lv_style_list_get_int>:
@@ -20324,7 +20324,7 @@ static inline bool _lv_img_buf_transform(lv_img_transform_dsc_t * dsc, lv_coord_
     7d10:	0000d0ed 	.word	0x0000d0ed
     7d14:	0000d20d 	.word	0x0000d20d
     7d18:	0000d615 	.word	0x0000d615
-    7d1c:	00018914 	.word	0x00018914
+    7d1c:	000187a4 	.word	0x000187a4
     7d20:	fffff81f 	.word	0xfffff81f
     7d24:	0000a625 	.word	0x0000a625
     7d28:	0001104d 	.word	0x0001104d
@@ -20550,7 +20550,7 @@ static void show_error(const lv_area_t * coords, const lv_area_t * clip_area, co
     7e94:	b01f      	add	sp, #124	; 0x7c
     7e96:	bdf0      	pop	{r4, r5, r6, r7, pc}
     7e98:	0000ab21 	.word	0x0000ab21
-    7e9c:	00018944 	.word	0x00018944
+    7e9c:	000187d4 	.word	0x000187d4
     7ea0:	0000abc5 	.word	0x0000abc5
     7ea4:	000081c5 	.word	0x000081c5
     7ea8:	00008215 	.word	0x00008215
@@ -20627,7 +20627,7 @@ static void show_error(const lv_area_t * coords, const lv_area_t * clip_area, co
     7f0c:	2000      	movs	r0, #0
 }
     7f0e:	4770      	bx	lr
-    7f10:	00018918 	.word	0x00018918
+    7f10:	000187a8 	.word	0x000187a8
 
 00007f14 <lv_img_cf_is_chroma_keyed>:
     switch(cf) {
@@ -20960,7 +20960,7 @@ static void show_error(const lv_area_t * coords, const lv_area_t * clip_area, co
     8126:	4b0c      	ldr	r3, [pc, #48]	; (8158 <lv_draw_img+0x218>)
     8128:	4798      	blx	r3
     812a:	e718      	b.n	7f5e <lv_draw_img+0x1e>
-    812c:	00018948 	.word	0x00018948
+    812c:	000187d8 	.word	0x000187d8
     8130:	00007e5d 	.word	0x00007e5d
     8134:	0000da69 	.word	0x0000da69
     8138:	00007f15 	.word	0x00007f15
@@ -21072,7 +21072,7 @@ static uint8_t hex_char_to_num(char hex)
     81ba:	0010      	movs	r0, r2
     81bc:	4770      	bx	lr
     81be:	46c0      	nop			; (mov r8, r8)
-    81c0:	00018950 	.word	0x00018950
+    81c0:	000187e0 	.word	0x000187e0
 
 000081c4 <lv_draw_label_dsc_init>:
 {
@@ -21677,10 +21677,10 @@ static inline lv_color_t lv_color_make(uint8_t r, uint8_t g, uint8_t b)
     85ac:	000117c9 	.word	0x000117c9
     85b0:	fffffc00 	.word	0xfffffc00
     85b4:	0000ab21 	.word	0x0000ab21
-    85b8:	00018968 	.word	0x00018968
+    85b8:	000187f8 	.word	0x000187f8
     85bc:	00011a41 	.word	0x00011a41
     85c0:	00009101 	.word	0x00009101
-    85c4:	00017b05 	.word	0x00017b05
+    85c4:	00017995 	.word	0x00017995
     85c8:	0000817d 	.word	0x0000817d
     85cc:	fffff81f 	.word	0xfffff81f
                     sel_coords.x1 = pos.x;
@@ -22178,14 +22178,14 @@ static inline lv_color_t lv_color_make(uint8_t r, uint8_t g, uint8_t b)
     890c:	2300      	movs	r3, #0
     890e:	e77f      	b.n	8810 <lv_draw_label+0x5fc>
     8910:	0000abc5 	.word	0x0000abc5
-    8914:	00018984 	.word	0x00018984
-    8918:	00018970 	.word	0x00018970
-    891c:	00017b05 	.word	0x00017b05
+    8914:	00018814 	.word	0x00018814
+    8918:	00018800 	.word	0x00018800
+    891c:	00017995 	.word	0x00017995
     8920:	00010ec1 	.word	0x00010ec1
     8924:	000043b1 	.word	0x000043b1
     8928:	0000f709 	.word	0x0000f709
     892c:	0000a6c1 	.word	0x0000a6c1
-    8930:	00018974 	.word	0x00018974
+    8930:	00018804 	.word	0x00018804
     8934:	fffff81f 	.word	0xfffff81f
     8938:	9a05      	ldr	r2, [sp, #20]
     893a:	4693      	mov	fp, r2
@@ -22720,12 +22720,12 @@ static inline lv_color_t lv_color_make(uint8_t r, uint8_t g, uint8_t b)
     8ca8:	0000e769 	.word	0x0000e769
     8cac:	0000e761 	.word	0x0000e761
     8cb0:	0000e759 	.word	0x0000e759
-    8cb4:	0001896c 	.word	0x0001896c
-    8cb8:	00018984 	.word	0x00018984
-    8cbc:	00018970 	.word	0x00018970
+    8cb4:	000187fc 	.word	0x000187fc
+    8cb8:	00018814 	.word	0x00018814
+    8cbc:	00018800 	.word	0x00018800
     8cc0:	20002bb4 	.word	0x20002bb4
     8cc4:	20002ab0 	.word	0x20002ab0
-    8cc8:	00018974 	.word	0x00018974
+    8cc8:	00018804 	.word	0x00018804
     8ccc:	20002bb0 	.word	0x20002bb0
     8cd0:	465c      	mov	r4, fp
     8cd2:	9b19      	ldr	r3, [sp, #100]	; 0x64
@@ -24041,8 +24041,8 @@ LV_ATTRIBUTE_FAST_MEM void lv_draw_line(const lv_point_t * point1, const lv_poin
     9514:	970a      	str	r7, [sp, #40]	; 0x28
     9516:	e050      	b.n	95ba <lv_draw_line+0x48a>
     9518:	0000fc0f 	.word	0x0000fc0f
-    951c:	00017b05 	.word	0x00017b05
-    9520:	00018a84 	.word	0x00018a84
+    951c:	00017995 	.word	0x00017995
+    9520:	00018914 	.word	0x00018914
     9524:	0000a6e5 	.word	0x0000a6e5
     9528:	0000a5ed 	.word	0x0000a5ed
     952c:	000043b1 	.word	0x000043b1
@@ -24053,7 +24053,7 @@ LV_ATTRIBUTE_FAST_MEM void lv_draw_line(const lv_point_t * point1, const lv_poin
     9540:	0000a625 	.word	0x0000a625
     9544:	0000a6c1 	.word	0x0000a6c1
     9548:	00005c6d 	.word	0x00005c6d
-    954c:	00017cd1 	.word	0x00017cd1
+    954c:	00017b61 	.word	0x00017b61
                         else if(dash_cnt >= dsc->dash_gap + dsc->dash_width) {
     9550:	2606      	movs	r6, #6
     9552:	5fa5      	ldrsh	r5, [r4, r6]
@@ -24598,10 +24598,10 @@ LV_ATTRIBUTE_FAST_MEM void lv_draw_line(const lv_point_t * point1, const lv_poin
     98f0:	0000a6c1 	.word	0x0000a6c1
     98f4:	0000fc0f 	.word	0x0000fc0f
     98f8:	00010ec1 	.word	0x00010ec1
-    98fc:	00017cd1 	.word	0x00017cd1
+    98fc:	00017b61 	.word	0x00017b61
     9900:	000110f1 	.word	0x000110f1
     9904:	0000a625 	.word	0x0000a625
-    9908:	00017b05 	.word	0x00017b05
+    9908:	00017995 	.word	0x00017995
     990c:	0000a6e5 	.word	0x0000a6e5
     9910:	0000a5ed 	.word	0x0000a5ed
     9914:	0000fbf3 	.word	0x0000fbf3
@@ -26731,7 +26731,7 @@ LV_ATTRIBUTE_FAST_MEM static inline void sqrt_approx(lv_sqrt_res_t * q, lv_sqrt_
     a5da:	021b      	lsls	r3, r3, #8
     a5dc:	9302      	str	r3, [sp, #8]
     a5de:	e77c      	b.n	a4da <lv_draw_mask_radius+0x532>
-    a5e0:	00017b05 	.word	0x00017b05
+    a5e0:	00017995 	.word	0x00017995
     a5e4:	0001104d 	.word	0x0001104d
     a5e8:	000109a9 	.word	0x000109a9
 
@@ -27137,7 +27137,7 @@ LV_ATTRIBUTE_FAST_MEM static inline void sqrt_approx(lv_sqrt_res_t * q, lv_sqrt_
     a846:	e7b7      	b.n	a7b8 <lv_draw_mask_line_points_init+0xd4>
     a848:	0001104d 	.word	0x0001104d
     a84c:	00009a8d 	.word	0x00009a8d
-    a850:	00017b05 	.word	0x00017b05
+    a850:	00017995 	.word	0x00017995
 
 0000a854 <lv_draw_mask_radius_init>:
 {
@@ -27596,7 +27596,7 @@ LV_ATTRIBUTE_FAST_MEM static void shadow_blur_corner(lv_coord_t size, lv_coord_t
     ab0c:	00010ec1 	.word	0x00010ec1
     ab10:	7ffffffe 	.word	0x7ffffffe
     ab14:	00010c8d 	.word	0x00010c8d
-    ab18:	00017b05 	.word	0x00017b05
+    ab18:	00017995 	.word	0x00017995
     ab1c:	00010bd5 	.word	0x00010bd5
 
 0000ab20 <lv_draw_rect_dsc_init>:
@@ -27694,7 +27694,7 @@ LV_ATTRIBUTE_FAST_MEM static void shadow_blur_corner(lv_coord_t size, lv_coord_t
     abb0:	bd10      	pop	{r4, pc}
     abb2:	46c0      	nop			; (mov r8, r8)
     abb4:	0001104d 	.word	0x0001104d
-    abb8:	00018aa8 	.word	0x00018aa8
+    abb8:	00018938 	.word	0x00018938
     abbc:	fffff81f 	.word	0xfffff81f
     abc0:	20000030 	.word	0x20000030
 
@@ -28199,7 +28199,7 @@ static inline lv_coord_t lv_area_get_height(const lv_area_t * area_p)
     af08:	00010ec1 	.word	0x00010ec1
     af0c:	0000a855 	.word	0x0000a855
     af10:	7fffffff 	.word	0x7fffffff
-    af14:	00017b05 	.word	0x00017b05
+    af14:	00017995 	.word	0x00017995
     af18:	0001104d 	.word	0x0001104d
     af1c:	000110f1 	.word	0x000110f1
     af20:	00010bd5 	.word	0x00010bd5
@@ -30631,7 +30631,7 @@ static void draw_value(const lv_area_t * coords, const lv_area_t * clip, lv_draw
     bf30:	0000a5ed 	.word	0x0000a5ed
     bf34:	00010ec1 	.word	0x00010ec1
     bf38:	fffff81f 	.word	0xfffff81f
-    bf3c:	00017b05 	.word	0x00017b05
+    bf3c:	00017995 	.word	0x00017995
     bf40:	000110f1 	.word	0x000110f1
     bf44:	0000a625 	.word	0x0000a625
                 mask_res = LV_DRAW_MASK_RES_FULL_COVER;
@@ -31110,7 +31110,7 @@ static void draw_value(const lv_area_t * coords, const lv_area_t * clip, lv_draw
     c276:	81a3      	strh	r3, [r4, #12]
     c278:	e037      	b.n	c2ea <lv_draw_rect+0x1726>
     c27a:	46c0      	nop			; (mov r8, r8)
-    c27c:	00017b05 	.word	0x00017b05
+    c27c:	00017995 	.word	0x00017995
     c280:	fffff81f 	.word	0xfffff81f
     c284:	00005c6d 	.word	0x00005c6d
     c288:	00006951 	.word	0x00006951
@@ -31450,7 +31450,7 @@ static void draw_value(const lv_area_t * coords, const lv_area_t * clip, lv_draw
     c4dc:	0000a679 	.word	0x0000a679
     c4e0:	0000a855 	.word	0x0000a855
     c4e4:	0000a5ed 	.word	0x0000a5ed
-    c4e8:	00017cd1 	.word	0x00017cd1
+    c4e8:	00017b61 	.word	0x00017b61
     c4ec:	00008215 	.word	0x00008215
     draw_area.x1 -= disp_area->x1;
     c4f0:	8a38      	ldrh	r0, [r7, #16]
@@ -33607,7 +33607,7 @@ lv_opa_t lv_img_buf_get_px_alpha(lv_img_dsc_t * dsc, lv_coord_t x, lv_coord_t y)
     d306:	1871      	adds	r1, r6, r1
     d308:	5c88      	ldrb	r0, [r1, r2]
     d30a:	e792      	b.n	d232 <lv_img_buf_get_px_alpha+0x26>
-    d30c:	00018aac 	.word	0x00018aac
+    d30c:	0001893c 	.word	0x0001893c
 
 0000d310 <_lv_img_buf_transform_init>:
 /**
@@ -33799,7 +33799,7 @@ void _lv_img_buf_transform_init(lv_img_transform_dsc_t * dsc)
     d42a:	4303      	orrs	r3, r0
     d42c:	5463      	strb	r3, [r4, r1]
     d42e:	e7d5      	b.n	d3dc <_lv_img_buf_transform_init+0xcc>
-    d430:	00017b05 	.word	0x00017b05
+    d430:	00017995 	.word	0x00017995
     d434:	00010935 	.word	0x00010935
     d438:	00007f15 	.word	0x00007f15
     d43c:	00007f29 	.word	0x00007f29
@@ -34098,7 +34098,7 @@ void _lv_img_buf_get_transformed_area(lv_area_t * res, lv_coord_t w, lv_coord_t
     d606:	46a2      	mov	sl, r4
     d608:	46ab      	mov	fp, r5
     d60a:	bdf0      	pop	{r4, r5, r6, r7, pc}
-    d60c:	00017b05 	.word	0x00017b05
+    d60c:	00017995 	.word	0x00017995
     d610:	00010935 	.word	0x00010935
 
 0000d614 <_lv_img_buf_transform_anti_alias>:
@@ -35040,7 +35040,7 @@ lv_img_cache_entry_t * _lv_img_cache_open(const void * src, lv_color_t color)
     dbc4:	20004d84 	.word	0x20004d84
     dbc8:	80000002 	.word	0x80000002
     dbcc:	00008161 	.word	0x00008161
-    dbd0:	00017fcd 	.word	0x00017fcd
+    dbd0:	00017e5d 	.word	0x00017e5d
     dbd4:	0000e685 	.word	0x0000e685
     dbd8:	0000f78d 	.word	0x0000f78d
     dbdc:	0000e59d 	.word	0x0000e59d
@@ -35224,7 +35224,7 @@ void lv_img_cache_invalidate_src(const void * src)
     dcf4:	0000147d 	.word	0x0000147d
     dcf8:	20002bb6 	.word	0x20002bb6
     dcfc:	0001104d 	.word	0x0001104d
-    dd00:	00018894 	.word	0x00018894
+    dd00:	00018724 	.word	0x00018724
     dd04:	00001485 	.word	0x00001485
 
 0000dd08 <lv_img_decoder_built_in_info>:
@@ -35870,13 +35870,13 @@ static inline lv_color_t lv_color_make(uint8_t r, uint8_t g, uint8_t b)
     e0f4:	e6b8      	b.n	de68 <lv_img_decoder_built_in_open+0x3c>
     e0f6:	46c0      	nop			; (mov r8, r8)
     e0f8:	000104f1 	.word	0x000104f1
-    e0fc:	00018acc 	.word	0x00018acc
-    e100:	00017fcd 	.word	0x00017fcd
+    e0fc:	0001895c 	.word	0x0001895c
+    e100:	00017e5d 	.word	0x00017e5d
     e104:	00010429 	.word	0x00010429
     e108:	00010a71 	.word	0x00010a71
     e10c:	0000147d 	.word	0x0000147d
     e110:	0000dde9 	.word	0x0000dde9
-    e114:	00018894 	.word	0x00018894
+    e114:	00018724 	.word	0x00018724
     e118:	00001485 	.word	0x00001485
     e11c:	0001104d 	.word	0x0001104d
     e120:	00007ee5 	.word	0x00007ee5
@@ -36517,7 +36517,7 @@ static lv_res_t lv_img_decoder_built_in_line_indexed(lv_img_decoder_dsc_t * dsc,
     e4cc:	00007ee5 	.word	0x00007ee5
     e4d0:	000103cf 	.word	0x000103cf
     e4d4:	0001038d 	.word	0x0001038d
-    e4d8:	00018abc 	.word	0x00018abc
+    e4d8:	0001894c 	.word	0x0001894c
     e4dc:	00010ec1 	.word	0x00010ec1
     e4e0:	00010bd5 	.word	0x00010bd5
         lv_fs_seek(user_data->f, ofs + 4); /*+4 to skip the header*/
@@ -36749,9 +36749,9 @@ static lv_res_t lv_img_decoder_built_in_line_indexed(lv_img_decoder_dsc_t * dsc,
     e644:	20004cd0 	.word	0x20004cd0
     e648:	0001066d 	.word	0x0001066d
     e64c:	00010685 	.word	0x00010685
-    e650:	00017ff1 	.word	0x00017ff1
+    e650:	00017e81 	.word	0x00017e81
     e654:	00010a71 	.word	0x00010a71
-    e658:	00017fe1 	.word	0x00017fe1
+    e658:	00017e71 	.word	0x00017e71
     e65c:	0001104d 	.word	0x0001104d
 
 0000e660 <lv_img_decoder_read_line>:
@@ -36845,7 +36845,7 @@ static lv_res_t lv_img_decoder_built_in_line_indexed(lv_img_decoder_dsc_t * dsc,
     e6e4:	000105cd 	.word	0x000105cd
     e6e8:	0000147d 	.word	0x0000147d
     e6ec:	0001104d 	.word	0x0001104d
-    e6f0:	00018894 	.word	0x00018894
+    e6f0:	00018724 	.word	0x00018724
     e6f4:	00001485 	.word	0x00001485
 
 0000e6f8 <_lv_img_decoder_init>:
@@ -36895,7 +36895,7 @@ static lv_res_t lv_img_decoder_built_in_line_indexed(lv_img_decoder_dsc_t * dsc,
     e744:	0000e131 	.word	0x0000e131
     e748:	0000dde9 	.word	0x0000dde9
     e74c:	0000147d 	.word	0x0000147d
-    e750:	00018894 	.word	0x00018894
+    e750:	00018724 	.word	0x00018724
     e754:	00001485 	.word	0x00001485
 
 0000e758 <lv_font_get_glyph_bitmap>:
@@ -37712,12 +37712,12 @@ static int32_t unicode_list_compare(const void * ref, const void * element)
     ec20:	20002bc4 	.word	0x20002bc4
     ec24:	20002bbd 	.word	0x20002bbd
     ec28:	00010ec1 	.word	0x00010ec1
-    ec2c:	00018af4 	.word	0x00018af4
-    ec30:	00018894 	.word	0x00018894
+    ec2c:	00018984 	.word	0x00018984
+    ec30:	00018724 	.word	0x00018724
     ec34:	00001485 	.word	0x00001485
-    ec38:	00018ad0 	.word	0x00018ad0
-    ec3c:	00018b18 	.word	0x00018b18
-    ec40:	00018b3c 	.word	0x00018b3c
+    ec38:	00018960 	.word	0x00018960
+    ec3c:	000189a8 	.word	0x000189a8
+    ec40:	000189cc 	.word	0x000189cc
         uint16_t in16 = (in[byte_pos] << 8) + in[byte_pos + 1];
     ec44:	5df2      	ldrb	r2, [r6, r7]
     ec46:	0212      	lsls	r2, r2, #8
@@ -38417,13 +38417,13 @@ static int32_t unicode_list_compare(const void * ref, const void * element)
     f078:	20002bcc 	.word	0x20002bcc
     f07c:	20002bbd 	.word	0x20002bbd
     f080:	20002bc4 	.word	0x20002bc4
-    f084:	00018b60 	.word	0x00018b60
+    f084:	000189f0 	.word	0x000189f0
     f088:	20002bc0 	.word	0x20002bc0
     f08c:	20002bbc 	.word	0x20002bbc
-    f090:	00018ba4 	.word	0x00018ba4
-    f094:	00018b80 	.word	0x00018b80
-    f098:	00018bc8 	.word	0x00018bc8
-    f09c:	00018bec 	.word	0x00018bec
+    f090:	00018a34 	.word	0x00018a34
+    f094:	00018a10 	.word	0x00018a10
+    f098:	00018a58 	.word	0x00018a58
+    f09c:	00018a7c 	.word	0x00018a7c
             bit_mask = 0x1;
     f0a0:	2301      	movs	r3, #1
     uint32_t byte_pos = bit_pos >> 3;
@@ -38749,7 +38749,7 @@ static int32_t unicode_list_compare(const void * ref, const void * element)
     f298:	2000      	movs	r0, #0
     f29a:	f7ff fb28 	bl	e8ee <lv_font_get_bitmap_fmt_txt+0x3e>
     f29e:	46c0      	nop			; (mov r8, r8)
-    f2a0:	00018c10 	.word	0x00018c10
+    f2a0:	00018aa0 	.word	0x00018aa0
     f2a4:	20002bc8 	.word	0x20002bc8
     f2a8:	20002bcc 	.word	0x20002bcc
     f2ac:	20002bbd 	.word	0x20002bbd
@@ -39319,7 +39319,7 @@ lv_disp_t * lv_disp_drv_register(lv_disp_drv_t * driver)
     f5f4:	00001915 	.word	0x00001915
     f5f8:	00001fb1 	.word	0x00001fb1
     f5fc:	0001162d 	.word	0x0001162d
-    f600:	00018894 	.word	0x00018894
+    f600:	00018724 	.word	0x00018724
     f604:	00001485 	.word	0x00001485
 
 0000f608 <lv_disp_get_default>:
@@ -39501,7 +39501,7 @@ lv_disp_size_t lv_disp_get_size_category(lv_disp_t * disp)
     f6c6:	e7de      	b.n	f686 <lv_disp_get_size_category+0x6>
     f6c8:	0000f615 	.word	0x0000f615
     f6cc:	0000f665 	.word	0x0000f665
-    f6d0:	000179f1 	.word	0x000179f1
+    f6d0:	00017881 	.word	0x00017881
     f6d4:	20002bd0 	.word	0x20002bd0
 
 0000f6d8 <lv_disp_flush_ready>:
@@ -39776,7 +39776,7 @@ lv_anim_value_t lv_anim_path_linear(const lv_anim_path_t * path, const lv_anim_t
     f7da:	2080      	movs	r0, #128	; 0x80
     f7dc:	00c0      	lsls	r0, r0, #3
     f7de:	e7f4      	b.n	f7ca <lv_anim_path_linear+0x12>
-    f7e0:	000179f1 	.word	0x000179f1
+    f7e0:	00017881 	.word	0x00017881
 
 0000f7e4 <anim_mark_list_change>:
     }
@@ -40186,7 +40186,7 @@ static void anim_mark_list_change(void)
     fa84:	bd10      	pop	{r4, pc}
     fa86:	46c0      	nop			; (mov r8, r8)
     fa88:	0001104d 	.word	0x0001104d
-    fa8c:	0001c8d8 	.word	0x0001c8d8
+    fa8c:	0001c768 	.word	0x0001c768
 
 0000fa90 <lv_anim_del>:
 {
@@ -40341,7 +40341,7 @@ static void anim_mark_list_change(void)
     fb98:	0000f7e5 	.word	0x0000f7e5
     fb9c:	0000f78d 	.word	0x0000f78d
     fba0:	20002be4 	.word	0x20002be4
-    fba4:	00018894 	.word	0x00018894
+    fba4:	00018724 	.word	0x00018724
     fba8:	00001485 	.word	0x00001485
 
 0000fbac <lv_point_within_circle>:
@@ -41380,7 +41380,7 @@ static inline lv_coord_t lv_area_get_height(const lv_area_t * area_p)
             break;
    10210:	e6c1      	b.n	ff96 <_lv_area_align+0x56>
    10212:	46c0      	nop			; (mov r8, r8)
-   10214:	0001c8e0 	.word	0x0001c8e0
+   10214:	0001c770 	.word	0x0001c770
     return (lv_coord_t)(area_p->x2 - area_p->x1 + 1);
    10218:	8882      	ldrh	r2, [r0, #4]
    1021a:	3201      	adds	r2, #1
@@ -41914,7 +41914,7 @@ static const char * lv_fs_get_real_path(const char * path)
    104d4:	000103f1 	.word	0x000103f1
    104d8:	00010a71 	.word	0x00010a71
    104dc:	0000147d 	.word	0x0000147d
-   104e0:	00018894 	.word	0x00018894
+   104e0:	00018724 	.word	0x00018724
    104e4:	00001485 	.word	0x00001485
    104e8:	00010327 	.word	0x00010327
    104ec:	00010b39 	.word	0x00010b39
@@ -41970,8 +41970,8 @@ static const char * lv_fs_get_real_path(const char * path)
    10536:	e7f6      	b.n	10526 <lv_fs_get_ext+0x36>
    10538:	4801      	ldr	r0, [pc, #4]	; (10540 <lv_fs_get_ext+0x50>)
    1053a:	e7f4      	b.n	10526 <lv_fs_get_ext+0x36>
-   1053c:	00017ff1 	.word	0x00017ff1
-   10540:	0001cab8 	.word	0x0001cab8
+   1053c:	00017e81 	.word	0x00017e81
+   10540:	0001c948 	.word	0x0001c948
 
 00010544 <node_set_next>:
  * @param ll_p pointer to linked list
@@ -42720,8 +42720,8 @@ LV_ATTRIBUTE_FAST_MEM int16_t _lv_trigo_sin(int16_t angle)
    1099a:	b200      	sxth	r0, r0
    1099c:	e7f0      	b.n	10980 <_lv_trigo_sin+0x4c>
    1099e:	46c0      	nop			; (mov r8, r8)
-   109a0:	00017cd1 	.word	0x00017cd1
-   109a4:	0001c934 	.word	0x0001c934
+   109a0:	00017b61 	.word	0x00017b61
+   109a4:	0001c7c4 	.word	0x0001c7c4
 
 000109a8 <_lv_sqrt>:
  * If root < 16: mask = 0x80
@@ -44248,7 +44248,7 @@ void lv_task_enable(bool en)
    11288:	00010685 	.word	0x00010685
    1128c:	0001061d 	.word	0x0001061d
    11290:	0000147d 	.word	0x0000147d
-   11294:	00018894 	.word	0x00018894
+   11294:	00018724 	.word	0x00018724
    11298:	00001485 	.word	0x00001485
    1129c:	000105cd 	.word	0x000105cd
    112a0:	000106d5 	.word	0x000106d5
@@ -44658,7 +44658,7 @@ static uint32_t lv_task_time_remaining(lv_task_t * task)
    11528:	0000f7a9 	.word	0x0000f7a9
    1152c:	20004c18 	.word	0x20004c18
    11530:	20004c24 	.word	0x20004c24
-   11534:	000179f1 	.word	0x000179f1
+   11534:	00017881 	.word	0x00017881
    11538:	20004c20 	.word	0x20004c20
    1153c:	20004c2c 	.word	0x20004c2c
    11540:	0001066d 	.word	0x0001066d
@@ -44791,7 +44791,7 @@ static uint32_t lv_task_time_remaining(lv_task_t * task)
    11618:	000111c1 	.word	0x000111c1
    1161c:	0000147d 	.word	0x0000147d
    11620:	00011549 	.word	0x00011549
-   11624:	00018894 	.word	0x00018894
+   11624:	00018724 	.word	0x00018724
    11628:	00001485 	.word	0x00001485
 
 0001162c <lv_task_ready>:
@@ -45481,7 +45481,7 @@ static uint32_t lv_txt_utf8_get_char_id(const char * txt, uint32_t byte_id)
    11a26:	e7f3      	b.n	11a10 <_lv_txt_get_next_line+0x248>
    11a28:	00007c18 	.word	0x00007c18
    11a2c:	20000058 	.word	0x20000058
-   11a30:	0001c9ec 	.word	0x0001c9ec
+   11a30:	0001c87c 	.word	0x0001c87c
    11a34:	0000e769 	.word	0x0000e769
    11a38:	00400009 	.word	0x00400009
    11a3c:	00011789 	.word	0x00011789
@@ -46498,7 +46498,7 @@ static void theme_apply(lv_obj_t * obj, lv_theme_style_t name)
             break;
    12018:	e645      	b.n	11ca6 <theme_apply+0x2e>
    1201a:	46c0      	nop			; (mov r8, r8)
-   1201c:	0001c9f4 	.word	0x0001c9f4
+   1201c:	0001c884 	.word	0x0001c884
    12020:	00001dd5 	.word	0x00001dd5
    12024:	00001cf9 	.word	0x00001cf9
    12028:	20004c38 	.word	0x20004c38
@@ -48967,7 +48967,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_TOP, pad_top, lv_style_int_t, _int, scalar)
    13140:	fffff800 	.word	0xfffff800
    13144:	00008189 	.word	0x00008189
    13148:	00009189 	.word	0x00009189
-   1314c:	0001ca98 	.word	0x0001ca98
+   1314c:	0001c928 	.word	0x0001c928
    13150:	0000a089 	.word	0x0000a089
    13154:	000080a9 	.word	0x000080a9
    13158:	000090a9 	.word	0x000090a9
@@ -49472,7 +49472,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_INNER, pad_inner, lv_style_int_t, _int, scalar
    13590:	e510      	b.n	12fb4 <basic_init+0xafc>
    13592:	46c0      	nop			; (mov r8, r8)
    13594:	0000f665 	.word	0x0000f665
-   13598:	000179f1 	.word	0x000179f1
+   13598:	00017881 	.word	0x00017881
    1359c:	20004c3c 	.word	0x20004c3c
    135a0:	000007b1 	.word	0x000007b1
    135a4:	000010c8 	.word	0x000010c8
@@ -49591,7 +49591,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_INNER, pad_inner, lv_style_int_t, _int, scalar
    13678:	e539      	b.n	130ee <basic_init+0xc36>
    1367a:	46c0      	nop			; (mov r8, r8)
    1367c:	0000f665 	.word	0x0000f665
-   13680:	000179f1 	.word	0x000179f1
+   13680:	00017881 	.word	0x00017881
 
 00013684 <bar_init>:
 {
@@ -49785,7 +49785,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(VALUE_COLOR, value_color, lv_color_t, _color, nons
    137c4:	20004c3c 	.word	0x20004c3c
    137c8:	00004e55 	.word	0x00004e55
    137cc:	00000449 	.word	0x00000449
-   137d0:	0001ca98 	.word	0x0001ca98
+   137d0:	0001c928 	.word	0x0001c928
    137d4:	00002029 	.word	0x00002029
 
 000137d8 <slider_init>:
@@ -50144,8 +50144,8 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(MARGIN_BOTTOM, margin_bottom, lv_style_int_t, _int
    13a58:	00007fff 	.word	0x00007fff
    13a5c:	00004cf5 	.word	0x00004cf5
    13a60:	0000f665 	.word	0x0000f665
-   13a64:	0001ca9c 	.word	0x0001ca9c
-   13a68:	000179f1 	.word	0x000179f1
+   13a64:	0001c92c 	.word	0x0001c92c
+   13a68:	00017881 	.word	0x00017881
 
 00013a6c <switch_init>:
 {
@@ -50314,12 +50314,12 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_RIGHT, pad_right, lv_style_int_t, _int, scalar
    13b88:	20004c38 	.word	0x20004c38
    13b8c:	00012495 	.word	0x00012495
    13b90:	00004fb5 	.word	0x00004fb5
-   13b94:	0001ca9c 	.word	0x0001ca9c
+   13b94:	0001c92c 	.word	0x0001c92c
    13b98:	00004e55 	.word	0x00004e55
    13b9c:	00007fff 	.word	0x00007fff
    13ba0:	00004cf5 	.word	0x00004cf5
    13ba4:	0000f665 	.word	0x0000f665
-   13ba8:	000179f1 	.word	0x000179f1
+   13ba8:	00017881 	.word	0x00017881
 
 00013bac <linemeter_init>:
 {
@@ -50625,8 +50625,8 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(SCALE_END_LINE_WIDTH, scale_end_line_width, lv_sty
    13dbc:	0000f665 	.word	0x0000f665
    13dc0:	20004c3c 	.word	0x20004c3c
    13dc4:	00004e55 	.word	0x00004e55
-   13dc8:	0001ca98 	.word	0x0001ca98
-   13dcc:	000179f1 	.word	0x000179f1
+   13dc8:	0001c928 	.word	0x0001c928
+   13dcc:	00017881 	.word	0x00017881
 
 00013dd0 <gauge_init>:
 {
@@ -51156,7 +51156,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_INNER, pad_inner, lv_style_int_t, _int, scalar
    1417c:	00004cf5 	.word	0x00004cf5
    14180:	00007fff 	.word	0x00007fff
    14184:	00004fb5 	.word	0x00004fb5
-   14188:	000179f1 	.word	0x000179f1
+   14188:	00017881 	.word	0x00017881
     lv_style_set_pad_top(&styles->gauge_main, LV_STATE_DEFAULT, LV_DPX(20));
    1418c:	2000      	movs	r0, #0
    1418e:	4b38      	ldr	r3, [pc, #224]	; (14270 <gauge_init+0x4a0>)
@@ -51281,7 +51281,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_INNER, pad_inner, lv_style_int_t, _int, scalar
    1426c:	e739      	b.n	140e2 <gauge_init+0x312>
    1426e:	46c0      	nop			; (mov r8, r8)
    14270:	0000f665 	.word	0x0000f665
-   14274:	000179f1 	.word	0x000179f1
+   14274:	00017881 	.word	0x00017881
 
 00014278 <arc_init>:
 {
@@ -51424,7 +51424,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(LINE_ROUNDED, line_rounded, bool, _int, scalar)
    1436c:	00004e55 	.word	0x00004e55
    14370:	0000f665 	.word	0x0000f665
    14374:	00004cf5 	.word	0x00004cf5
-   14378:	000179f1 	.word	0x000179f1
+   14378:	00017881 	.word	0x00017881
 
 0001437c <led_init>:
 {
@@ -51577,7 +51577,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(SHADOW_SPREAD, shadow_spread, lv_style_int_t, _int
    14480:	00010289 	.word	0x00010289
    14484:	00007fff 	.word	0x00007fff
    14488:	0000f665 	.word	0x0000f665
-   1448c:	000179f1 	.word	0x000179f1
+   1448c:	00017881 	.word	0x00017881
 
 00014490 <lv_theme_material_init>:
 {
@@ -52712,7 +52712,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(TRANSITION_PROP_6, transition_prop_6, lv_style_int
    14cd8:	00004fb5 	.word	0x00004fb5
    14cdc:	20004c38 	.word	0x20004c38
    14ce0:	0000102c 	.word	0x0000102c
-   14ce4:	0001ca9c 	.word	0x0001ca9c
+   14ce4:	0001c92c 	.word	0x0001c92c
    14ce8:	00008289 	.word	0x00008289
    14cec:	00004e55 	.word	0x00004e55
    14cf0:	20004c3c 	.word	0x20004c3c
@@ -53289,15 +53289,15 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(BORDER_SIDE, border_side, lv_border_side_t, _int,
    15118:	0000f665 	.word	0x0000f665
    1511c:	00004cf5 	.word	0x00004cf5
    15120:	20004c38 	.word	0x20004c38
-   15124:	0001caa4 	.word	0x0001caa4
+   15124:	0001c934 	.word	0x0001c934
    15128:	00005109 	.word	0x00005109
-   1512c:	0001ca9c 	.word	0x0001ca9c
+   1512c:	0001c92c 	.word	0x0001c92c
    15130:	00004e55 	.word	0x00004e55
    15134:	20004c3c 	.word	0x20004c3c
    15138:	0000818e 	.word	0x0000818e
    1513c:	00000439 	.word	0x00000439
    15140:	00007fff 	.word	0x00007fff
-   15144:	0001ca98 	.word	0x0001ca98
+   15144:	0001c928 	.word	0x0001c928
     style_init_reset(&styles->ta_placeholder);
    15148:	6820      	ldr	r0, [r4, #0]
    1514a:	30b8      	adds	r0, #184	; 0xb8
@@ -53852,7 +53852,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(TRANSFORM_WIDTH, transform_width, lv_style_int_t,
    15548:	00004e55 	.word	0x00004e55
    1554c:	20004c38 	.word	0x20004c38
    15550:	00004fb5 	.word	0x00004fb5
-   15554:	0001ca9c 	.word	0x0001ca9c
+   15554:	0001c92c 	.word	0x0001c92c
    15558:	0000f665 	.word	0x0000f665
    1555c:	00004cf5 	.word	0x00004cf5
    15560:	00001029 	.word	0x00001029
@@ -54451,13 +54451,13 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_TOP, pad_top, lv_style_int_t, _int, scalar)
    159a4:	00008089 	.word	0x00008089
    159a8:	00001029 	.word	0x00001029
    159ac:	00009089 	.word	0x00009089
-   159b0:	0001ca9c 	.word	0x0001ca9c
+   159b0:	0001c92c 	.word	0x0001c92c
    159b4:	0000808e 	.word	0x0000808e
    159b8:	00005109 	.word	0x00005109
-   159bc:	0001ca9a 	.word	0x0001ca9a
+   159bc:	0001c92a 	.word	0x0001c92a
    159c0:	000080a9 	.word	0x000080a9
    159c4:	0000102c 	.word	0x0000102c
-   159c8:	0001ca98 	.word	0x0001ca98
+   159c8:	0001c928 	.word	0x0001c928
    159cc:	00008189 	.word	0x00008189
    159d0:	00008289 	.word	0x00008289
    159d4:	00008489 	.word	0x00008489
@@ -54978,7 +54978,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_BOTTOM, pad_bottom, lv_style_int_t, _int, scal
    15dec:	00002735 	.word	0x00002735
    15df0:	00010a71 	.word	0x00010a71
    15df4:	20004d74 	.word	0x20004d74
-   15df8:	000179f1 	.word	0x000179f1
+   15df8:	00017881 	.word	0x00017881
    15dfc:	2000      	movs	r0, #0
    15dfe:	4bfc      	ldr	r3, [pc, #1008]	; (161f0 <lv_theme_material_init+0x1d60>)
    15e00:	4798      	blx	r3
@@ -55473,7 +55473,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_BOTTOM, pad_bottom, lv_style_int_t, _int, scal
    161ea:	2208      	movs	r2, #8
    161ec:	f7fe fe42 	bl	14e74 <lv_theme_material_init+0x9e4>
    161f0:	0000f665 	.word	0x0000f665
-   161f4:	000179f1 	.word	0x000179f1
+   161f4:	00017881 	.word	0x00017881
     lv_style_set_pad_left(&styles->kb_bg, LV_STATE_DEFAULT,  LV_DPX(5));
    161f8:	2000      	movs	r0, #0
    161fa:	4bf8      	ldr	r3, [pc, #992]	; (165dc <lv_theme_material_init+0x214c>)
@@ -55961,7 +55961,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_BOTTOM, pad_bottom, lv_style_int_t, _int, scal
    165d6:	f7ff f8a0 	bl	1571a <lv_theme_material_init+0x128a>
    165da:	46c0      	nop			; (mov r8, r8)
    165dc:	0000f665 	.word	0x0000f665
-   165e0:	000179f1 	.word	0x000179f1
+   165e0:	00017881 	.word	0x00017881
     lv_style_set_border_width(&styles->tabview_btns_bg, LV_STATE_DEFAULT, LV_DPX(5));
    165e4:	2000      	movs	r0, #0
    165e6:	4bdf      	ldr	r3, [pc, #892]	; (16964 <lv_theme_material_init+0x24d4>)
@@ -56393,7 +56393,7 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_BOTTOM, pad_bottom, lv_style_int_t, _int, scal
    1695e:	f7ff f931 	bl	15bc4 <lv_theme_material_init+0x1734>
    16962:	46c0      	nop			; (mov r8, r8)
    16964:	0000f665 	.word	0x0000f665
-   16968:	000179f1 	.word	0x000179f1
+   16968:	00017881 	.word	0x00017881
 
 0001696c <ssd1963_init>:
 /**********************
@@ -56402,5696 +56402,5452 @@ _LV_OBJ_STYLE_SET_GET_DECLARE(PAD_BOTTOM, pad_bottom, lv_style_int_t, _int, scal
 
 void ssd1963_init(void)
 {
-   1696c:	b570      	push	{r4, r5, r6, lr}
+   1696c:	b5f0      	push	{r4, r5, r6, r7, lr}
+   1696e:	46d6      	mov	lr, sl
+   16970:	464f      	mov	r7, r9
+   16972:	4646      	mov	r6, r8
+   16974:	b5c0      	push	{r6, r7, lr}
+	asm volatile("nop");
+   16976:	46c0      	nop			; (mov r8, r8)
+	p_gpio_parallel_wr_word(SSD1963_TFT_DATA_PORT, SSD1963_TFT_DATA_MASK, 0xAAAA);
+   16978:	4ae8      	ldr	r2, [pc, #928]	; (16d1c <ssd1963_init+0x3b0>)
+   1697a:	49e9      	ldr	r1, [pc, #932]	; (16d20 <ssd1963_init+0x3b4>)
+   1697c:	48e9      	ldr	r0, [pc, #932]	; (16d24 <ssd1963_init+0x3b8>)
+   1697e:	4bea      	ldr	r3, [pc, #936]	; (16d28 <ssd1963_init+0x3bc>)
+   16980:	4798      	blx	r3
+	asm volatile("nop");
+   16982:	46c0      	nop			; (mov r8, r8)
+	delay_ms(100);
+   16984:	2000      	movs	r0, #0
+   16986:	4be9      	ldr	r3, [pc, #932]	; (16d2c <ssd1963_init+0x3c0>)
+   16988:	469a      	mov	sl, r3
+   1698a:	4798      	blx	r3
+   1698c:	4be8      	ldr	r3, [pc, #928]	; (16d30 <ssd1963_init+0x3c4>)
+   1698e:	4699      	mov	r9, r3
+   16990:	2264      	movs	r2, #100	; 0x64
+   16992:	2300      	movs	r3, #0
+   16994:	2100      	movs	r1, #0
+   16996:	47c8      	blx	r9
+   16998:	4ee6      	ldr	r6, [pc, #920]	; (16d34 <ssd1963_init+0x3c8>)
+   1699a:	2700      	movs	r7, #0
+   1699c:	1980      	adds	r0, r0, r6
+   1699e:	4179      	adcs	r1, r7
+   169a0:	4de5      	ldr	r5, [pc, #916]	; (16d38 <ssd1963_init+0x3cc>)
+   169a2:	4ae6      	ldr	r2, [pc, #920]	; (16d3c <ssd1963_init+0x3d0>)
+   169a4:	2300      	movs	r3, #0
+   169a6:	47a8      	blx	r5
+   169a8:	4ce5      	ldr	r4, [pc, #916]	; (16d40 <ssd1963_init+0x3d4>)
+   169aa:	47a0      	blx	r4
+   169ac:	4be5      	ldr	r3, [pc, #916]	; (16d44 <ssd1963_init+0x3d8>)
+   169ae:	4698      	mov	r8, r3
+   169b0:	2310      	movs	r3, #16
+   169b2:	4642      	mov	r2, r8
+   169b4:	6193      	str	r3, [r2, #24]
+	LV_DRV_DISP_RST(1);
+	delay_ms(100);
+   169b6:	2000      	movs	r0, #0
+   169b8:	47d0      	blx	sl
+   169ba:	2264      	movs	r2, #100	; 0x64
+   169bc:	2300      	movs	r3, #0
+   169be:	2100      	movs	r1, #0
+   169c0:	47c8      	blx	r9
+   169c2:	1980      	adds	r0, r0, r6
+   169c4:	4179      	adcs	r1, r7
+   169c6:	4add      	ldr	r2, [pc, #884]	; (16d3c <ssd1963_init+0x3d0>)
+   169c8:	2300      	movs	r3, #0
+   169ca:	47a8      	blx	r5
+   169cc:	47a0      	blx	r4
+	delay_ms(100);
+   169ce:	2000      	movs	r0, #0
+   169d0:	47d0      	blx	sl
+   169d2:	2264      	movs	r2, #100	; 0x64
+   169d4:	2300      	movs	r3, #0
+   169d6:	2100      	movs	r1, #0
+   169d8:	47c8      	blx	r9
+   169da:	1980      	adds	r0, r0, r6
+   169dc:	4179      	adcs	r1, r7
+   169de:	4ad7      	ldr	r2, [pc, #860]	; (16d3c <ssd1963_init+0x3d0>)
+   169e0:	2300      	movs	r3, #0
+   169e2:	47a8      	blx	r5
+   169e4:	47a0      	blx	r4
 	} else {
 		port_base->OUTCLR.reg = pin_mask;
-   1696e:	4de9      	ldr	r5, [pc, #932]	; (16d14 <ssd1963_init+0x3a8>)
-   16970:	2320      	movs	r3, #32
-   16972:	616b      	str	r3, [r5, #20]
-    LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
-    cmd_mode = true;
-   16974:	4ce8      	ldr	r4, [pc, #928]	; (16d18 <ssd1963_init+0x3ac>)
-   16976:	3b1f      	subs	r3, #31
-   16978:	7023      	strb	r3, [r4, #0]
-
-    LV_DRV_DELAY_MS(250);
-   1697a:	2000      	movs	r0, #0
-   1697c:	4be7      	ldr	r3, [pc, #924]	; (16d1c <ssd1963_init+0x3b0>)
-   1697e:	4798      	blx	r3
-   16980:	22fa      	movs	r2, #250	; 0xfa
-   16982:	2300      	movs	r3, #0
-   16984:	2100      	movs	r1, #0
-   16986:	4ee6      	ldr	r6, [pc, #920]	; (16d20 <ssd1963_init+0x3b4>)
-   16988:	47b0      	blx	r6
-   1698a:	4ae6      	ldr	r2, [pc, #920]	; (16d24 <ssd1963_init+0x3b8>)
-   1698c:	2300      	movs	r3, #0
-   1698e:	1880      	adds	r0, r0, r2
-   16990:	4159      	adcs	r1, r3
-   16992:	4ae5      	ldr	r2, [pc, #916]	; (16d28 <ssd1963_init+0x3bc>)
-   16994:	2300      	movs	r3, #0
-   16996:	4ee5      	ldr	r6, [pc, #916]	; (16d2c <ssd1963_init+0x3c0>)
-   16998:	47b0      	blx	r6
-   1699a:	4be5      	ldr	r3, [pc, #916]	; (16d30 <ssd1963_init+0x3c4>)
-   1699c:	4798      	blx	r3
-   1699e:	2340      	movs	r3, #64	; 0x40
-   169a0:	616b      	str	r3, [r5, #20]
+   169e6:	2340      	movs	r3, #64	; 0x40
+   169e8:	4642      	mov	r2, r8
+   169ea:	6153      	str	r3, [r2, #20]
 /**
  * Command mode
  */
 static inline void ssd1963_cmd_mode(void)
 {
     if(cmd_mode == false) {
-   169a2:	7823      	ldrb	r3, [r4, #0]
-   169a4:	2b00      	cmp	r3, #0
-   169a6:	d104      	bne.n	169b2 <ssd1963_init+0x46>
-   169a8:	2220      	movs	r2, #32
-   169aa:	616a      	str	r2, [r5, #20]
+   169ec:	4bd6      	ldr	r3, [pc, #856]	; (16d48 <ssd1963_init+0x3dc>)
+   169ee:	781b      	ldrb	r3, [r3, #0]
+   169f0:	2b00      	cmp	r3, #0
+   169f2:	d105      	bne.n	16a00 <ssd1963_init+0x94>
+   169f4:	2220      	movs	r2, #32
+   169f6:	4643      	mov	r3, r8
+   169f8:	615a      	str	r2, [r3, #20]
         LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
         cmd_mode = true;
-   169ac:	3a1f      	subs	r2, #31
-   169ae:	4bda      	ldr	r3, [pc, #872]	; (16d18 <ssd1963_init+0x3ac>)
-   169b0:	701a      	strb	r2, [r3, #0]
+   169fa:	3a1f      	subs	r2, #31
+   169fc:	4bd2      	ldr	r3, [pc, #840]	; (16d48 <ssd1963_init+0x3dc>)
+   169fe:	701a      	strb	r2, [r3, #0]
 static inline void ssd1963_cmd(uint8_t cmd)
 {
 
     LV_DRV_DISP_PAR_CS(0);
     ssd1963_cmd_mode();
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   169b2:	22e2      	movs	r2, #226	; 0xe2
-   169b4:	49df      	ldr	r1, [pc, #892]	; (16d34 <ssd1963_init+0x3c8>)
-   169b6:	48e0      	ldr	r0, [pc, #896]	; (16d38 <ssd1963_init+0x3cc>)
-   169b8:	4be0      	ldr	r3, [pc, #896]	; (16d3c <ssd1963_init+0x3d0>)
-   169ba:	4798      	blx	r3
+   16a00:	2201      	movs	r2, #1
+   16a02:	49c7      	ldr	r1, [pc, #796]	; (16d20 <ssd1963_init+0x3b4>)
+   16a04:	48c7      	ldr	r0, [pc, #796]	; (16d24 <ssd1963_init+0x3b8>)
+   16a06:	4bc8      	ldr	r3, [pc, #800]	; (16d28 <ssd1963_init+0x3bc>)
+   16a08:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   169bc:	4bd5      	ldr	r3, [pc, #852]	; (16d14 <ssd1963_init+0x3a8>)
-   169be:	2240      	movs	r2, #64	; 0x40
-   169c0:	619a      	str	r2, [r3, #24]
+   16a0a:	4bce      	ldr	r3, [pc, #824]	; (16d44 <ssd1963_init+0x3d8>)
+   16a0c:	2240      	movs	r2, #64	; 0x40
+   16a0e:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   169c2:	615a      	str	r2, [r3, #20]
+   16a10:	615a      	str	r2, [r3, #20]
+    if(cmd_mode == false) {
+   16a12:	4bcd      	ldr	r3, [pc, #820]	; (16d48 <ssd1963_init+0x3dc>)
+   16a14:	781b      	ldrb	r3, [r3, #0]
+   16a16:	2b00      	cmp	r3, #0
+   16a18:	d105      	bne.n	16a26 <ssd1963_init+0xba>
+   16a1a:	3a20      	subs	r2, #32
+   16a1c:	4bc9      	ldr	r3, [pc, #804]	; (16d44 <ssd1963_init+0x3d8>)
+   16a1e:	615a      	str	r2, [r3, #20]
+        cmd_mode = true;
+   16a20:	3a1f      	subs	r2, #31
+   16a22:	4bc9      	ldr	r3, [pc, #804]	; (16d48 <ssd1963_init+0x3dc>)
+   16a24:	701a      	strb	r2, [r3, #0]
+    LV_DRV_DISP_PAR_WR_WORD(cmd);
+   16a26:	2201      	movs	r2, #1
+   16a28:	49bd      	ldr	r1, [pc, #756]	; (16d20 <ssd1963_init+0x3b4>)
+   16a2a:	48be      	ldr	r0, [pc, #760]	; (16d24 <ssd1963_init+0x3b8>)
+   16a2c:	4bbe      	ldr	r3, [pc, #760]	; (16d28 <ssd1963_init+0x3bc>)
+   16a2e:	4798      	blx	r3
+		port_base->OUTSET.reg = pin_mask;
+   16a30:	4bc4      	ldr	r3, [pc, #784]	; (16d44 <ssd1963_init+0x3d8>)
+   16a32:	2240      	movs	r2, #64	; 0x40
+   16a34:	619a      	str	r2, [r3, #24]
+		port_base->OUTCLR.reg = pin_mask;
+   16a36:	615a      	str	r2, [r3, #20]
+    if(cmd_mode == false) {
+   16a38:	4bc3      	ldr	r3, [pc, #780]	; (16d48 <ssd1963_init+0x3dc>)
+   16a3a:	781b      	ldrb	r3, [r3, #0]
+   16a3c:	2b00      	cmp	r3, #0
+   16a3e:	d105      	bne.n	16a4c <ssd1963_init+0xe0>
+   16a40:	3a20      	subs	r2, #32
+   16a42:	4bc0      	ldr	r3, [pc, #768]	; (16d44 <ssd1963_init+0x3d8>)
+   16a44:	615a      	str	r2, [r3, #20]
+        cmd_mode = true;
+   16a46:	3a1f      	subs	r2, #31
+   16a48:	4bbf      	ldr	r3, [pc, #764]	; (16d48 <ssd1963_init+0x3dc>)
+   16a4a:	701a      	strb	r2, [r3, #0]
+    LV_DRV_DISP_PAR_WR_WORD(cmd);
+   16a4c:	2201      	movs	r2, #1
+   16a4e:	49b4      	ldr	r1, [pc, #720]	; (16d20 <ssd1963_init+0x3b4>)
+   16a50:	48b4      	ldr	r0, [pc, #720]	; (16d24 <ssd1963_init+0x3b8>)
+   16a52:	4bb5      	ldr	r3, [pc, #724]	; (16d28 <ssd1963_init+0x3bc>)
+   16a54:	4798      	blx	r3
+		port_base->OUTSET.reg = pin_mask;
+   16a56:	4bbb      	ldr	r3, [pc, #748]	; (16d44 <ssd1963_init+0x3d8>)
+   16a58:	2240      	movs	r2, #64	; 0x40
+   16a5a:	619a      	str	r2, [r3, #24]
+		port_base->OUTCLR.reg = pin_mask;
+   16a5c:	615a      	str	r2, [r3, #20]
+    if(cmd_mode == false) {
+   16a5e:	4bba      	ldr	r3, [pc, #744]	; (16d48 <ssd1963_init+0x3dc>)
+   16a60:	781b      	ldrb	r3, [r3, #0]
+   16a62:	2b00      	cmp	r3, #0
+   16a64:	d105      	bne.n	16a72 <ssd1963_init+0x106>
+   16a66:	3a20      	subs	r2, #32
+   16a68:	4bb6      	ldr	r3, [pc, #728]	; (16d44 <ssd1963_init+0x3d8>)
+   16a6a:	615a      	str	r2, [r3, #20]
+        cmd_mode = true;
+   16a6c:	3a1f      	subs	r2, #31
+   16a6e:	4bb6      	ldr	r3, [pc, #728]	; (16d48 <ssd1963_init+0x3dc>)
+   16a70:	701a      	strb	r2, [r3, #0]
+    LV_DRV_DISP_PAR_WR_WORD(cmd);
+   16a72:	22e2      	movs	r2, #226	; 0xe2
+   16a74:	49aa      	ldr	r1, [pc, #680]	; (16d20 <ssd1963_init+0x3b4>)
+   16a76:	48ab      	ldr	r0, [pc, #684]	; (16d24 <ssd1963_init+0x3b8>)
+   16a78:	4bab      	ldr	r3, [pc, #684]	; (16d28 <ssd1963_init+0x3bc>)
+   16a7a:	4798      	blx	r3
+		port_base->OUTSET.reg = pin_mask;
+   16a7c:	4bb1      	ldr	r3, [pc, #708]	; (16d44 <ssd1963_init+0x3d8>)
+   16a7e:	2240      	movs	r2, #64	; 0x40
+   16a80:	619a      	str	r2, [r3, #24]
+		port_base->OUTCLR.reg = pin_mask;
+   16a82:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   169c4:	4bd4      	ldr	r3, [pc, #848]	; (16d18 <ssd1963_init+0x3ac>)
-   169c6:	781b      	ldrb	r3, [r3, #0]
-   169c8:	2b00      	cmp	r3, #0
-   169ca:	d005      	beq.n	169d8 <ssd1963_init+0x6c>
+   16a84:	4bb0      	ldr	r3, [pc, #704]	; (16d48 <ssd1963_init+0x3dc>)
+   16a86:	781b      	ldrb	r3, [r3, #0]
+   16a88:	2b00      	cmp	r3, #0
+   16a8a:	d005      	beq.n	16a98 <ssd1963_init+0x12c>
 		port_base->OUTSET.reg = pin_mask;
-   169cc:	3a20      	subs	r2, #32
-   169ce:	4bd1      	ldr	r3, [pc, #836]	; (16d14 <ssd1963_init+0x3a8>)
-   169d0:	619a      	str	r2, [r3, #24]
+   16a8c:	3a20      	subs	r2, #32
+   16a8e:	4bad      	ldr	r3, [pc, #692]	; (16d44 <ssd1963_init+0x3d8>)
+   16a90:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   169d2:	2200      	movs	r2, #0
-   169d4:	4bd0      	ldr	r3, [pc, #832]	; (16d18 <ssd1963_init+0x3ac>)
-   169d6:	701a      	strb	r2, [r3, #0]
+   16a92:	2200      	movs	r2, #0
+   16a94:	4bac      	ldr	r3, [pc, #688]	; (16d48 <ssd1963_init+0x3dc>)
+   16a96:	701a      	strb	r2, [r3, #0]
 static inline void ssd1963_data(uint8_t data)
 {
 
     LV_DRV_DISP_PAR_CS(0);
     ssd1963_data_mode();
     LV_DRV_DISP_PAR_WR_WORD(data);
-   169d8:	2223      	movs	r2, #35	; 0x23
-   169da:	49d6      	ldr	r1, [pc, #856]	; (16d34 <ssd1963_init+0x3c8>)
-   169dc:	48d6      	ldr	r0, [pc, #856]	; (16d38 <ssd1963_init+0x3cc>)
-   169de:	4bd7      	ldr	r3, [pc, #860]	; (16d3c <ssd1963_init+0x3d0>)
-   169e0:	4798      	blx	r3
-   169e2:	4bcc      	ldr	r3, [pc, #816]	; (16d14 <ssd1963_init+0x3a8>)
-   169e4:	2240      	movs	r2, #64	; 0x40
-   169e6:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   169e8:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   169ea:	4bcb      	ldr	r3, [pc, #812]	; (16d18 <ssd1963_init+0x3ac>)
-   169ec:	781b      	ldrb	r3, [r3, #0]
-   169ee:	2b00      	cmp	r3, #0
-   169f0:	d005      	beq.n	169fe <ssd1963_init+0x92>
-		port_base->OUTSET.reg = pin_mask;
-   169f2:	3a20      	subs	r2, #32
-   169f4:	4bc7      	ldr	r3, [pc, #796]	; (16d14 <ssd1963_init+0x3a8>)
-   169f6:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   169f8:	2200      	movs	r2, #0
-   169fa:	4bc7      	ldr	r3, [pc, #796]	; (16d18 <ssd1963_init+0x3ac>)
-   169fc:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   169fe:	2202      	movs	r2, #2
-   16a00:	49cc      	ldr	r1, [pc, #816]	; (16d34 <ssd1963_init+0x3c8>)
-   16a02:	48cd      	ldr	r0, [pc, #820]	; (16d38 <ssd1963_init+0x3cc>)
-   16a04:	4bcd      	ldr	r3, [pc, #820]	; (16d3c <ssd1963_init+0x3d0>)
-   16a06:	4798      	blx	r3
-   16a08:	4bc2      	ldr	r3, [pc, #776]	; (16d14 <ssd1963_init+0x3a8>)
-   16a0a:	2240      	movs	r2, #64	; 0x40
-   16a0c:	619a      	str	r2, [r3, #24]
+   16a98:	2223      	movs	r2, #35	; 0x23
+   16a9a:	49a1      	ldr	r1, [pc, #644]	; (16d20 <ssd1963_init+0x3b4>)
+   16a9c:	48a1      	ldr	r0, [pc, #644]	; (16d24 <ssd1963_init+0x3b8>)
+   16a9e:	4ba2      	ldr	r3, [pc, #648]	; (16d28 <ssd1963_init+0x3bc>)
+   16aa0:	4798      	blx	r3
+   16aa2:	4ba8      	ldr	r3, [pc, #672]	; (16d44 <ssd1963_init+0x3d8>)
+   16aa4:	2240      	movs	r2, #64	; 0x40
+   16aa6:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16a0e:	615a      	str	r2, [r3, #20]
+   16aa8:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16a10:	4bc1      	ldr	r3, [pc, #772]	; (16d18 <ssd1963_init+0x3ac>)
-   16a12:	781b      	ldrb	r3, [r3, #0]
-   16a14:	2b00      	cmp	r3, #0
-   16a16:	d005      	beq.n	16a24 <ssd1963_init+0xb8>
+   16aaa:	4ba7      	ldr	r3, [pc, #668]	; (16d48 <ssd1963_init+0x3dc>)
+   16aac:	781b      	ldrb	r3, [r3, #0]
+   16aae:	2b00      	cmp	r3, #0
+   16ab0:	d005      	beq.n	16abe <ssd1963_init+0x152>
 		port_base->OUTSET.reg = pin_mask;
-   16a18:	3a20      	subs	r2, #32
-   16a1a:	4bbe      	ldr	r3, [pc, #760]	; (16d14 <ssd1963_init+0x3a8>)
-   16a1c:	619a      	str	r2, [r3, #24]
+   16ab2:	3a20      	subs	r2, #32
+   16ab4:	4ba3      	ldr	r3, [pc, #652]	; (16d44 <ssd1963_init+0x3d8>)
+   16ab6:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16a1e:	2200      	movs	r2, #0
-   16a20:	4bbd      	ldr	r3, [pc, #756]	; (16d18 <ssd1963_init+0x3ac>)
-   16a22:	701a      	strb	r2, [r3, #0]
+   16ab8:	2200      	movs	r2, #0
+   16aba:	4ba3      	ldr	r3, [pc, #652]	; (16d48 <ssd1963_init+0x3dc>)
+   16abc:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16a24:	2204      	movs	r2, #4
-   16a26:	49c3      	ldr	r1, [pc, #780]	; (16d34 <ssd1963_init+0x3c8>)
-   16a28:	48c3      	ldr	r0, [pc, #780]	; (16d38 <ssd1963_init+0x3cc>)
-   16a2a:	4bc4      	ldr	r3, [pc, #784]	; (16d3c <ssd1963_init+0x3d0>)
-   16a2c:	4798      	blx	r3
-   16a2e:	4bb9      	ldr	r3, [pc, #740]	; (16d14 <ssd1963_init+0x3a8>)
-   16a30:	2240      	movs	r2, #64	; 0x40
-   16a32:	619a      	str	r2, [r3, #24]
+   16abe:	2202      	movs	r2, #2
+   16ac0:	4997      	ldr	r1, [pc, #604]	; (16d20 <ssd1963_init+0x3b4>)
+   16ac2:	4898      	ldr	r0, [pc, #608]	; (16d24 <ssd1963_init+0x3b8>)
+   16ac4:	4b98      	ldr	r3, [pc, #608]	; (16d28 <ssd1963_init+0x3bc>)
+   16ac6:	4798      	blx	r3
+   16ac8:	4b9e      	ldr	r3, [pc, #632]	; (16d44 <ssd1963_init+0x3d8>)
+   16aca:	2240      	movs	r2, #64	; 0x40
+   16acc:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16a34:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   16a36:	4bb8      	ldr	r3, [pc, #736]	; (16d18 <ssd1963_init+0x3ac>)
-   16a38:	781b      	ldrb	r3, [r3, #0]
-   16a3a:	2b00      	cmp	r3, #0
-   16a3c:	d105      	bne.n	16a4a <ssd1963_init+0xde>
-   16a3e:	3a20      	subs	r2, #32
-   16a40:	4bb4      	ldr	r3, [pc, #720]	; (16d14 <ssd1963_init+0x3a8>)
-   16a42:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   16a44:	3a1f      	subs	r2, #31
-   16a46:	4bb4      	ldr	r3, [pc, #720]	; (16d18 <ssd1963_init+0x3ac>)
-   16a48:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16a4a:	22e0      	movs	r2, #224	; 0xe0
-   16a4c:	49b9      	ldr	r1, [pc, #740]	; (16d34 <ssd1963_init+0x3c8>)
-   16a4e:	48ba      	ldr	r0, [pc, #744]	; (16d38 <ssd1963_init+0x3cc>)
-   16a50:	4bba      	ldr	r3, [pc, #744]	; (16d3c <ssd1963_init+0x3d0>)
-   16a52:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   16a54:	4baf      	ldr	r3, [pc, #700]	; (16d14 <ssd1963_init+0x3a8>)
-   16a56:	2240      	movs	r2, #64	; 0x40
-   16a58:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   16a5a:	615a      	str	r2, [r3, #20]
+   16ace:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16a5c:	4bae      	ldr	r3, [pc, #696]	; (16d18 <ssd1963_init+0x3ac>)
-   16a5e:	781b      	ldrb	r3, [r3, #0]
-   16a60:	2b00      	cmp	r3, #0
-   16a62:	d005      	beq.n	16a70 <ssd1963_init+0x104>
+   16ad0:	4b9d      	ldr	r3, [pc, #628]	; (16d48 <ssd1963_init+0x3dc>)
+   16ad2:	781b      	ldrb	r3, [r3, #0]
+   16ad4:	2b00      	cmp	r3, #0
+   16ad6:	d005      	beq.n	16ae4 <ssd1963_init+0x178>
 		port_base->OUTSET.reg = pin_mask;
-   16a64:	3a20      	subs	r2, #32
-   16a66:	4bab      	ldr	r3, [pc, #684]	; (16d14 <ssd1963_init+0x3a8>)
-   16a68:	619a      	str	r2, [r3, #24]
+   16ad8:	3a20      	subs	r2, #32
+   16ada:	4b9a      	ldr	r3, [pc, #616]	; (16d44 <ssd1963_init+0x3d8>)
+   16adc:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16a6a:	2200      	movs	r2, #0
-   16a6c:	4baa      	ldr	r3, [pc, #680]	; (16d18 <ssd1963_init+0x3ac>)
-   16a6e:	701a      	strb	r2, [r3, #0]
+   16ade:	2200      	movs	r2, #0
+   16ae0:	4b99      	ldr	r3, [pc, #612]	; (16d48 <ssd1963_init+0x3dc>)
+   16ae2:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16a70:	2201      	movs	r2, #1
-   16a72:	49b0      	ldr	r1, [pc, #704]	; (16d34 <ssd1963_init+0x3c8>)
-   16a74:	48b0      	ldr	r0, [pc, #704]	; (16d38 <ssd1963_init+0x3cc>)
-   16a76:	4bb1      	ldr	r3, [pc, #708]	; (16d3c <ssd1963_init+0x3d0>)
-   16a78:	4798      	blx	r3
-   16a7a:	4ca6      	ldr	r4, [pc, #664]	; (16d14 <ssd1963_init+0x3a8>)
-   16a7c:	2540      	movs	r5, #64	; 0x40
-   16a7e:	61a5      	str	r5, [r4, #24]
-    LV_DRV_DELAY_MS(1);
-   16a80:	2000      	movs	r0, #0
-   16a82:	4ba6      	ldr	r3, [pc, #664]	; (16d1c <ssd1963_init+0x3b0>)
-   16a84:	4798      	blx	r3
-   16a86:	0002      	movs	r2, r0
-   16a88:	2300      	movs	r3, #0
-   16a8a:	48a6      	ldr	r0, [pc, #664]	; (16d24 <ssd1963_init+0x3b8>)
-   16a8c:	2100      	movs	r1, #0
-   16a8e:	1880      	adds	r0, r0, r2
-   16a90:	4159      	adcs	r1, r3
-   16a92:	4aa5      	ldr	r2, [pc, #660]	; (16d28 <ssd1963_init+0x3bc>)
-   16a94:	2300      	movs	r3, #0
-   16a96:	4ea5      	ldr	r6, [pc, #660]	; (16d2c <ssd1963_init+0x3c0>)
-   16a98:	47b0      	blx	r6
-   16a9a:	4ba5      	ldr	r3, [pc, #660]	; (16d30 <ssd1963_init+0x3c4>)
-   16a9c:	4798      	blx	r3
+   16ae4:	2254      	movs	r2, #84	; 0x54
+   16ae6:	498e      	ldr	r1, [pc, #568]	; (16d20 <ssd1963_init+0x3b4>)
+   16ae8:	488e      	ldr	r0, [pc, #568]	; (16d24 <ssd1963_init+0x3b8>)
+   16aea:	4b8f      	ldr	r3, [pc, #572]	; (16d28 <ssd1963_init+0x3bc>)
+   16aec:	4798      	blx	r3
+   16aee:	4b95      	ldr	r3, [pc, #596]	; (16d44 <ssd1963_init+0x3d8>)
+   16af0:	2240      	movs	r2, #64	; 0x40
+   16af2:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16a9e:	6165      	str	r5, [r4, #20]
+   16af4:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   16aa0:	4b9d      	ldr	r3, [pc, #628]	; (16d18 <ssd1963_init+0x3ac>)
-   16aa2:	781b      	ldrb	r3, [r3, #0]
-   16aa4:	2b00      	cmp	r3, #0
-   16aa6:	d104      	bne.n	16ab2 <ssd1963_init+0x146>
-   16aa8:	2220      	movs	r2, #32
-   16aaa:	6162      	str	r2, [r4, #20]
+   16af6:	4b94      	ldr	r3, [pc, #592]	; (16d48 <ssd1963_init+0x3dc>)
+   16af8:	781b      	ldrb	r3, [r3, #0]
+   16afa:	2b00      	cmp	r3, #0
+   16afc:	d105      	bne.n	16b0a <ssd1963_init+0x19e>
+   16afe:	3a20      	subs	r2, #32
+   16b00:	4b90      	ldr	r3, [pc, #576]	; (16d44 <ssd1963_init+0x3d8>)
+   16b02:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   16aac:	3a1f      	subs	r2, #31
-   16aae:	4b9a      	ldr	r3, [pc, #616]	; (16d18 <ssd1963_init+0x3ac>)
-   16ab0:	701a      	strb	r2, [r3, #0]
+   16b04:	3a1f      	subs	r2, #31
+   16b06:	4b90      	ldr	r3, [pc, #576]	; (16d48 <ssd1963_init+0x3dc>)
+   16b08:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16ab2:	22e0      	movs	r2, #224	; 0xe0
-   16ab4:	499f      	ldr	r1, [pc, #636]	; (16d34 <ssd1963_init+0x3c8>)
-   16ab6:	48a0      	ldr	r0, [pc, #640]	; (16d38 <ssd1963_init+0x3cc>)
-   16ab8:	4ba0      	ldr	r3, [pc, #640]	; (16d3c <ssd1963_init+0x3d0>)
-   16aba:	4798      	blx	r3
+   16b0a:	22e0      	movs	r2, #224	; 0xe0
+   16b0c:	4984      	ldr	r1, [pc, #528]	; (16d20 <ssd1963_init+0x3b4>)
+   16b0e:	4885      	ldr	r0, [pc, #532]	; (16d24 <ssd1963_init+0x3b8>)
+   16b10:	4b85      	ldr	r3, [pc, #532]	; (16d28 <ssd1963_init+0x3bc>)
+   16b12:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16abc:	4b95      	ldr	r3, [pc, #596]	; (16d14 <ssd1963_init+0x3a8>)
-   16abe:	2240      	movs	r2, #64	; 0x40
-   16ac0:	619a      	str	r2, [r3, #24]
+   16b14:	4b8b      	ldr	r3, [pc, #556]	; (16d44 <ssd1963_init+0x3d8>)
+   16b16:	2240      	movs	r2, #64	; 0x40
+   16b18:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16ac2:	615a      	str	r2, [r3, #20]
+   16b1a:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16ac4:	4b94      	ldr	r3, [pc, #592]	; (16d18 <ssd1963_init+0x3ac>)
-   16ac6:	781b      	ldrb	r3, [r3, #0]
-   16ac8:	2b00      	cmp	r3, #0
-   16aca:	d005      	beq.n	16ad8 <ssd1963_init+0x16c>
+   16b1c:	4b8a      	ldr	r3, [pc, #552]	; (16d48 <ssd1963_init+0x3dc>)
+   16b1e:	781b      	ldrb	r3, [r3, #0]
+   16b20:	2b00      	cmp	r3, #0
+   16b22:	d005      	beq.n	16b30 <ssd1963_init+0x1c4>
 		port_base->OUTSET.reg = pin_mask;
-   16acc:	3a20      	subs	r2, #32
-   16ace:	4b91      	ldr	r3, [pc, #580]	; (16d14 <ssd1963_init+0x3a8>)
-   16ad0:	619a      	str	r2, [r3, #24]
+   16b24:	3a20      	subs	r2, #32
+   16b26:	4b87      	ldr	r3, [pc, #540]	; (16d44 <ssd1963_init+0x3d8>)
+   16b28:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16ad2:	2200      	movs	r2, #0
-   16ad4:	4b90      	ldr	r3, [pc, #576]	; (16d18 <ssd1963_init+0x3ac>)
-   16ad6:	701a      	strb	r2, [r3, #0]
+   16b2a:	2200      	movs	r2, #0
+   16b2c:	4b86      	ldr	r3, [pc, #536]	; (16d48 <ssd1963_init+0x3dc>)
+   16b2e:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16ad8:	2203      	movs	r2, #3
-   16ada:	4996      	ldr	r1, [pc, #600]	; (16d34 <ssd1963_init+0x3c8>)
-   16adc:	4896      	ldr	r0, [pc, #600]	; (16d38 <ssd1963_init+0x3cc>)
-   16ade:	4b97      	ldr	r3, [pc, #604]	; (16d3c <ssd1963_init+0x3d0>)
-   16ae0:	4798      	blx	r3
-   16ae2:	4c8c      	ldr	r4, [pc, #560]	; (16d14 <ssd1963_init+0x3a8>)
-   16ae4:	2540      	movs	r5, #64	; 0x40
-   16ae6:	61a5      	str	r5, [r4, #24]
-    LV_DRV_DELAY_MS(1);
-   16ae8:	2000      	movs	r0, #0
-   16aea:	4b8c      	ldr	r3, [pc, #560]	; (16d1c <ssd1963_init+0x3b0>)
-   16aec:	4798      	blx	r3
-   16aee:	0002      	movs	r2, r0
-   16af0:	2300      	movs	r3, #0
-   16af2:	488c      	ldr	r0, [pc, #560]	; (16d24 <ssd1963_init+0x3b8>)
-   16af4:	2100      	movs	r1, #0
-   16af6:	1880      	adds	r0, r0, r2
-   16af8:	4159      	adcs	r1, r3
-   16afa:	4a8b      	ldr	r2, [pc, #556]	; (16d28 <ssd1963_init+0x3bc>)
-   16afc:	2300      	movs	r3, #0
-   16afe:	4e8b      	ldr	r6, [pc, #556]	; (16d2c <ssd1963_init+0x3c0>)
-   16b00:	47b0      	blx	r6
-   16b02:	4b8b      	ldr	r3, [pc, #556]	; (16d30 <ssd1963_init+0x3c4>)
-   16b04:	4798      	blx	r3
-		port_base->OUTCLR.reg = pin_mask;
-   16b06:	6165      	str	r5, [r4, #20]
-    if(cmd_mode == false) {
-   16b08:	4b83      	ldr	r3, [pc, #524]	; (16d18 <ssd1963_init+0x3ac>)
-   16b0a:	781b      	ldrb	r3, [r3, #0]
-   16b0c:	2b00      	cmp	r3, #0
-   16b0e:	d104      	bne.n	16b1a <ssd1963_init+0x1ae>
-   16b10:	2220      	movs	r2, #32
-   16b12:	6162      	str	r2, [r4, #20]
-        cmd_mode = true;
-   16b14:	3a1f      	subs	r2, #31
-   16b16:	4b80      	ldr	r3, [pc, #512]	; (16d18 <ssd1963_init+0x3ac>)
-   16b18:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16b1a:	2201      	movs	r2, #1
-   16b1c:	4985      	ldr	r1, [pc, #532]	; (16d34 <ssd1963_init+0x3c8>)
-   16b1e:	4886      	ldr	r0, [pc, #536]	; (16d38 <ssd1963_init+0x3cc>)
-   16b20:	4b86      	ldr	r3, [pc, #536]	; (16d3c <ssd1963_init+0x3d0>)
-   16b22:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   16b24:	4c7b      	ldr	r4, [pc, #492]	; (16d14 <ssd1963_init+0x3a8>)
-   16b26:	2540      	movs	r5, #64	; 0x40
-   16b28:	61a5      	str	r5, [r4, #24]
-    LV_DRV_DELAY_MS(1);
-   16b2a:	2000      	movs	r0, #0
-   16b2c:	4b7b      	ldr	r3, [pc, #492]	; (16d1c <ssd1963_init+0x3b0>)
-   16b2e:	4798      	blx	r3
-   16b30:	0002      	movs	r2, r0
-   16b32:	2300      	movs	r3, #0
+   16b30:	2201      	movs	r2, #1
+   16b32:	497b      	ldr	r1, [pc, #492]	; (16d20 <ssd1963_init+0x3b4>)
    16b34:	487b      	ldr	r0, [pc, #492]	; (16d24 <ssd1963_init+0x3b8>)
-   16b36:	2100      	movs	r1, #0
-   16b38:	1880      	adds	r0, r0, r2
-   16b3a:	4159      	adcs	r1, r3
-   16b3c:	4a7a      	ldr	r2, [pc, #488]	; (16d28 <ssd1963_init+0x3bc>)
-   16b3e:	2300      	movs	r3, #0
-   16b40:	4e7a      	ldr	r6, [pc, #488]	; (16d2c <ssd1963_init+0x3c0>)
-   16b42:	47b0      	blx	r6
-   16b44:	4b7a      	ldr	r3, [pc, #488]	; (16d30 <ssd1963_init+0x3c4>)
-   16b46:	4798      	blx	r3
+   16b36:	4b7c      	ldr	r3, [pc, #496]	; (16d28 <ssd1963_init+0x3bc>)
+   16b38:	4798      	blx	r3
+   16b3a:	4c82      	ldr	r4, [pc, #520]	; (16d44 <ssd1963_init+0x3d8>)
+   16b3c:	2540      	movs	r5, #64	; 0x40
+   16b3e:	61a5      	str	r5, [r4, #24]
+	delay_us(100);
+   16b40:	2000      	movs	r0, #0
+   16b42:	4b7a      	ldr	r3, [pc, #488]	; (16d2c <ssd1963_init+0x3c0>)
+   16b44:	4798      	blx	r3
+   16b46:	2264      	movs	r2, #100	; 0x64
+   16b48:	2300      	movs	r3, #0
+   16b4a:	2100      	movs	r1, #0
+   16b4c:	4e78      	ldr	r6, [pc, #480]	; (16d30 <ssd1963_init+0x3c4>)
+   16b4e:	47b0      	blx	r6
+   16b50:	4a7e      	ldr	r2, [pc, #504]	; (16d4c <ssd1963_init+0x3e0>)
+   16b52:	2300      	movs	r3, #0
+   16b54:	1880      	adds	r0, r0, r2
+   16b56:	4159      	adcs	r1, r3
+   16b58:	4a7d      	ldr	r2, [pc, #500]	; (16d50 <ssd1963_init+0x3e4>)
+   16b5a:	2300      	movs	r3, #0
+   16b5c:	4e76      	ldr	r6, [pc, #472]	; (16d38 <ssd1963_init+0x3cc>)
+   16b5e:	47b0      	blx	r6
+   16b60:	4b77      	ldr	r3, [pc, #476]	; (16d40 <ssd1963_init+0x3d4>)
+   16b62:	4798      	blx	r3
 		port_base->OUTCLR.reg = pin_mask;
-   16b48:	6165      	str	r5, [r4, #20]
+   16b64:	6165      	str	r5, [r4, #20]
     if(cmd_mode == false) {
-   16b4a:	4b73      	ldr	r3, [pc, #460]	; (16d18 <ssd1963_init+0x3ac>)
-   16b4c:	781b      	ldrb	r3, [r3, #0]
-   16b4e:	2b00      	cmp	r3, #0
-   16b50:	d104      	bne.n	16b5c <ssd1963_init+0x1f0>
-   16b52:	2220      	movs	r2, #32
-   16b54:	6162      	str	r2, [r4, #20]
+   16b66:	4b78      	ldr	r3, [pc, #480]	; (16d48 <ssd1963_init+0x3dc>)
+   16b68:	781b      	ldrb	r3, [r3, #0]
+   16b6a:	2b00      	cmp	r3, #0
+   16b6c:	d104      	bne.n	16b78 <ssd1963_init+0x20c>
+   16b6e:	2220      	movs	r2, #32
+   16b70:	6162      	str	r2, [r4, #20]
         cmd_mode = true;
-   16b56:	3a1f      	subs	r2, #31
-   16b58:	4b6f      	ldr	r3, [pc, #444]	; (16d18 <ssd1963_init+0x3ac>)
-   16b5a:	701a      	strb	r2, [r3, #0]
+   16b72:	3a1f      	subs	r2, #31
+   16b74:	4b74      	ldr	r3, [pc, #464]	; (16d48 <ssd1963_init+0x3dc>)
+   16b76:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16b5c:	22e6      	movs	r2, #230	; 0xe6
-   16b5e:	4975      	ldr	r1, [pc, #468]	; (16d34 <ssd1963_init+0x3c8>)
-   16b60:	4875      	ldr	r0, [pc, #468]	; (16d38 <ssd1963_init+0x3cc>)
-   16b62:	4b76      	ldr	r3, [pc, #472]	; (16d3c <ssd1963_init+0x3d0>)
-   16b64:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   16b66:	4b6b      	ldr	r3, [pc, #428]	; (16d14 <ssd1963_init+0x3a8>)
-   16b68:	2240      	movs	r2, #64	; 0x40
-   16b6a:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   16b6c:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16b6e:	4b6a      	ldr	r3, [pc, #424]	; (16d18 <ssd1963_init+0x3ac>)
-   16b70:	781b      	ldrb	r3, [r3, #0]
-   16b72:	2b00      	cmp	r3, #0
-   16b74:	d005      	beq.n	16b82 <ssd1963_init+0x216>
+   16b78:	22e0      	movs	r2, #224	; 0xe0
+   16b7a:	4969      	ldr	r1, [pc, #420]	; (16d20 <ssd1963_init+0x3b4>)
+   16b7c:	4869      	ldr	r0, [pc, #420]	; (16d24 <ssd1963_init+0x3b8>)
+   16b7e:	4b6a      	ldr	r3, [pc, #424]	; (16d28 <ssd1963_init+0x3bc>)
+   16b80:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16b76:	3a20      	subs	r2, #32
-   16b78:	4b66      	ldr	r3, [pc, #408]	; (16d14 <ssd1963_init+0x3a8>)
-   16b7a:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16b7c:	2200      	movs	r2, #0
-   16b7e:	4b66      	ldr	r3, [pc, #408]	; (16d18 <ssd1963_init+0x3ac>)
-   16b80:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16b82:	2201      	movs	r2, #1
-   16b84:	496b      	ldr	r1, [pc, #428]	; (16d34 <ssd1963_init+0x3c8>)
-   16b86:	486c      	ldr	r0, [pc, #432]	; (16d38 <ssd1963_init+0x3cc>)
-   16b88:	4b6c      	ldr	r3, [pc, #432]	; (16d3c <ssd1963_init+0x3d0>)
-   16b8a:	4798      	blx	r3
-   16b8c:	4b61      	ldr	r3, [pc, #388]	; (16d14 <ssd1963_init+0x3a8>)
-   16b8e:	2240      	movs	r2, #64	; 0x40
-   16b90:	619a      	str	r2, [r3, #24]
+   16b82:	4b70      	ldr	r3, [pc, #448]	; (16d44 <ssd1963_init+0x3d8>)
+   16b84:	2240      	movs	r2, #64	; 0x40
+   16b86:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16b92:	615a      	str	r2, [r3, #20]
+   16b88:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16b94:	4b60      	ldr	r3, [pc, #384]	; (16d18 <ssd1963_init+0x3ac>)
-   16b96:	781b      	ldrb	r3, [r3, #0]
-   16b98:	2b00      	cmp	r3, #0
-   16b9a:	d005      	beq.n	16ba8 <ssd1963_init+0x23c>
+   16b8a:	4b6f      	ldr	r3, [pc, #444]	; (16d48 <ssd1963_init+0x3dc>)
+   16b8c:	781b      	ldrb	r3, [r3, #0]
+   16b8e:	2b00      	cmp	r3, #0
+   16b90:	d005      	beq.n	16b9e <ssd1963_init+0x232>
 		port_base->OUTSET.reg = pin_mask;
-   16b9c:	3a20      	subs	r2, #32
-   16b9e:	4b5d      	ldr	r3, [pc, #372]	; (16d14 <ssd1963_init+0x3a8>)
-   16ba0:	619a      	str	r2, [r3, #24]
+   16b92:	3a20      	subs	r2, #32
+   16b94:	4b6b      	ldr	r3, [pc, #428]	; (16d44 <ssd1963_init+0x3d8>)
+   16b96:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16ba2:	2200      	movs	r2, #0
-   16ba4:	4b5c      	ldr	r3, [pc, #368]	; (16d18 <ssd1963_init+0x3ac>)
-   16ba6:	701a      	strb	r2, [r3, #0]
+   16b98:	2200      	movs	r2, #0
+   16b9a:	4b6b      	ldr	r3, [pc, #428]	; (16d48 <ssd1963_init+0x3dc>)
+   16b9c:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16ba8:	2233      	movs	r2, #51	; 0x33
-   16baa:	4962      	ldr	r1, [pc, #392]	; (16d34 <ssd1963_init+0x3c8>)
-   16bac:	4862      	ldr	r0, [pc, #392]	; (16d38 <ssd1963_init+0x3cc>)
-   16bae:	4b63      	ldr	r3, [pc, #396]	; (16d3c <ssd1963_init+0x3d0>)
-   16bb0:	4798      	blx	r3
-   16bb2:	4b58      	ldr	r3, [pc, #352]	; (16d14 <ssd1963_init+0x3a8>)
-   16bb4:	2240      	movs	r2, #64	; 0x40
-   16bb6:	619a      	str	r2, [r3, #24]
+   16b9e:	2203      	movs	r2, #3
+   16ba0:	495f      	ldr	r1, [pc, #380]	; (16d20 <ssd1963_init+0x3b4>)
+   16ba2:	4860      	ldr	r0, [pc, #384]	; (16d24 <ssd1963_init+0x3b8>)
+   16ba4:	4b60      	ldr	r3, [pc, #384]	; (16d28 <ssd1963_init+0x3bc>)
+   16ba6:	4798      	blx	r3
+   16ba8:	4b66      	ldr	r3, [pc, #408]	; (16d44 <ssd1963_init+0x3d8>)
+   16baa:	2240      	movs	r2, #64	; 0x40
+   16bac:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16bb8:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16bba:	4b57      	ldr	r3, [pc, #348]	; (16d18 <ssd1963_init+0x3ac>)
-   16bbc:	781b      	ldrb	r3, [r3, #0]
-   16bbe:	2b00      	cmp	r3, #0
-   16bc0:	d005      	beq.n	16bce <ssd1963_init+0x262>
-		port_base->OUTSET.reg = pin_mask;
-   16bc2:	3a20      	subs	r2, #32
-   16bc4:	4b53      	ldr	r3, [pc, #332]	; (16d14 <ssd1963_init+0x3a8>)
-   16bc6:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16bc8:	2200      	movs	r2, #0
-   16bca:	4b53      	ldr	r3, [pc, #332]	; (16d18 <ssd1963_init+0x3ac>)
-   16bcc:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16bce:	2233      	movs	r2, #51	; 0x33
-   16bd0:	4958      	ldr	r1, [pc, #352]	; (16d34 <ssd1963_init+0x3c8>)
-   16bd2:	4859      	ldr	r0, [pc, #356]	; (16d38 <ssd1963_init+0x3cc>)
-   16bd4:	4b59      	ldr	r3, [pc, #356]	; (16d3c <ssd1963_init+0x3d0>)
-   16bd6:	4798      	blx	r3
-   16bd8:	4b4e      	ldr	r3, [pc, #312]	; (16d14 <ssd1963_init+0x3a8>)
-   16bda:	2240      	movs	r2, #64	; 0x40
-   16bdc:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   16bde:	615a      	str	r2, [r3, #20]
+   16bae:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   16be0:	4b4d      	ldr	r3, [pc, #308]	; (16d18 <ssd1963_init+0x3ac>)
-   16be2:	781b      	ldrb	r3, [r3, #0]
-   16be4:	2b00      	cmp	r3, #0
-   16be6:	d105      	bne.n	16bf4 <ssd1963_init+0x288>
-   16be8:	3a20      	subs	r2, #32
-   16bea:	4b4a      	ldr	r3, [pc, #296]	; (16d14 <ssd1963_init+0x3a8>)
-   16bec:	615a      	str	r2, [r3, #20]
+   16bb0:	4b65      	ldr	r3, [pc, #404]	; (16d48 <ssd1963_init+0x3dc>)
+   16bb2:	781b      	ldrb	r3, [r3, #0]
+   16bb4:	2b00      	cmp	r3, #0
+   16bb6:	d105      	bne.n	16bc4 <ssd1963_init+0x258>
+   16bb8:	3a20      	subs	r2, #32
+   16bba:	4b62      	ldr	r3, [pc, #392]	; (16d44 <ssd1963_init+0x3d8>)
+   16bbc:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   16bee:	3a1f      	subs	r2, #31
-   16bf0:	4b49      	ldr	r3, [pc, #292]	; (16d18 <ssd1963_init+0x3ac>)
-   16bf2:	701a      	strb	r2, [r3, #0]
+   16bbe:	3a1f      	subs	r2, #31
+   16bc0:	4b61      	ldr	r3, [pc, #388]	; (16d48 <ssd1963_init+0x3dc>)
+   16bc2:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16bf4:	22b0      	movs	r2, #176	; 0xb0
-   16bf6:	494f      	ldr	r1, [pc, #316]	; (16d34 <ssd1963_init+0x3c8>)
-   16bf8:	484f      	ldr	r0, [pc, #316]	; (16d38 <ssd1963_init+0x3cc>)
-   16bfa:	4b50      	ldr	r3, [pc, #320]	; (16d3c <ssd1963_init+0x3d0>)
-   16bfc:	4798      	blx	r3
+   16bc4:	22b0      	movs	r2, #176	; 0xb0
+   16bc6:	4956      	ldr	r1, [pc, #344]	; (16d20 <ssd1963_init+0x3b4>)
+   16bc8:	4856      	ldr	r0, [pc, #344]	; (16d24 <ssd1963_init+0x3b8>)
+   16bca:	4b57      	ldr	r3, [pc, #348]	; (16d28 <ssd1963_init+0x3bc>)
+   16bcc:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16bfe:	4b45      	ldr	r3, [pc, #276]	; (16d14 <ssd1963_init+0x3a8>)
-   16c00:	2240      	movs	r2, #64	; 0x40
-   16c02:	619a      	str	r2, [r3, #24]
+   16bce:	4b5d      	ldr	r3, [pc, #372]	; (16d44 <ssd1963_init+0x3d8>)
+   16bd0:	2240      	movs	r2, #64	; 0x40
+   16bd2:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16c04:	615a      	str	r2, [r3, #20]
+   16bd4:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16c06:	4b44      	ldr	r3, [pc, #272]	; (16d18 <ssd1963_init+0x3ac>)
-   16c08:	781b      	ldrb	r3, [r3, #0]
-   16c0a:	2b00      	cmp	r3, #0
-   16c0c:	d005      	beq.n	16c1a <ssd1963_init+0x2ae>
+   16bd6:	4b5c      	ldr	r3, [pc, #368]	; (16d48 <ssd1963_init+0x3dc>)
+   16bd8:	781b      	ldrb	r3, [r3, #0]
+   16bda:	2b00      	cmp	r3, #0
+   16bdc:	d005      	beq.n	16bea <ssd1963_init+0x27e>
 		port_base->OUTSET.reg = pin_mask;
-   16c0e:	3a20      	subs	r2, #32
-   16c10:	4b40      	ldr	r3, [pc, #256]	; (16d14 <ssd1963_init+0x3a8>)
-   16c12:	619a      	str	r2, [r3, #24]
+   16bde:	3a20      	subs	r2, #32
+   16be0:	4b58      	ldr	r3, [pc, #352]	; (16d44 <ssd1963_init+0x3d8>)
+   16be2:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16c14:	2200      	movs	r2, #0
-   16c16:	4b40      	ldr	r3, [pc, #256]	; (16d18 <ssd1963_init+0x3ac>)
-   16c18:	701a      	strb	r2, [r3, #0]
+   16be4:	2200      	movs	r2, #0
+   16be6:	4b58      	ldr	r3, [pc, #352]	; (16d48 <ssd1963_init+0x3dc>)
+   16be8:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16c1a:	2220      	movs	r2, #32
-   16c1c:	4945      	ldr	r1, [pc, #276]	; (16d34 <ssd1963_init+0x3c8>)
-   16c1e:	4846      	ldr	r0, [pc, #280]	; (16d38 <ssd1963_init+0x3cc>)
-   16c20:	4b46      	ldr	r3, [pc, #280]	; (16d3c <ssd1963_init+0x3d0>)
-   16c22:	4798      	blx	r3
-   16c24:	4b3b      	ldr	r3, [pc, #236]	; (16d14 <ssd1963_init+0x3a8>)
-   16c26:	2240      	movs	r2, #64	; 0x40
-   16c28:	619a      	str	r2, [r3, #24]
+   16bea:	2228      	movs	r2, #40	; 0x28
+   16bec:	494c      	ldr	r1, [pc, #304]	; (16d20 <ssd1963_init+0x3b4>)
+   16bee:	484d      	ldr	r0, [pc, #308]	; (16d24 <ssd1963_init+0x3b8>)
+   16bf0:	4b4d      	ldr	r3, [pc, #308]	; (16d28 <ssd1963_init+0x3bc>)
+   16bf2:	4798      	blx	r3
+   16bf4:	4b53      	ldr	r3, [pc, #332]	; (16d44 <ssd1963_init+0x3d8>)
+   16bf6:	2240      	movs	r2, #64	; 0x40
+   16bf8:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16c2a:	615a      	str	r2, [r3, #20]
+   16bfa:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16c2c:	4b3a      	ldr	r3, [pc, #232]	; (16d18 <ssd1963_init+0x3ac>)
-   16c2e:	781b      	ldrb	r3, [r3, #0]
-   16c30:	2b00      	cmp	r3, #0
-   16c32:	d005      	beq.n	16c40 <ssd1963_init+0x2d4>
+   16bfc:	4b52      	ldr	r3, [pc, #328]	; (16d48 <ssd1963_init+0x3dc>)
+   16bfe:	781b      	ldrb	r3, [r3, #0]
+   16c00:	2b00      	cmp	r3, #0
+   16c02:	d005      	beq.n	16c10 <ssd1963_init+0x2a4>
 		port_base->OUTSET.reg = pin_mask;
-   16c34:	3a20      	subs	r2, #32
-   16c36:	4b37      	ldr	r3, [pc, #220]	; (16d14 <ssd1963_init+0x3a8>)
-   16c38:	619a      	str	r2, [r3, #24]
+   16c04:	3a20      	subs	r2, #32
+   16c06:	4b4f      	ldr	r3, [pc, #316]	; (16d44 <ssd1963_init+0x3d8>)
+   16c08:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16c3a:	2200      	movs	r2, #0
-   16c3c:	4b36      	ldr	r3, [pc, #216]	; (16d18 <ssd1963_init+0x3ac>)
-   16c3e:	701a      	strb	r2, [r3, #0]
+   16c0a:	2200      	movs	r2, #0
+   16c0c:	4b4e      	ldr	r3, [pc, #312]	; (16d48 <ssd1963_init+0x3dc>)
+   16c0e:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16c40:	2200      	movs	r2, #0
-   16c42:	493c      	ldr	r1, [pc, #240]	; (16d34 <ssd1963_init+0x3c8>)
-   16c44:	483c      	ldr	r0, [pc, #240]	; (16d38 <ssd1963_init+0x3cc>)
-   16c46:	4b3d      	ldr	r3, [pc, #244]	; (16d3c <ssd1963_init+0x3d0>)
-   16c48:	4798      	blx	r3
-   16c4a:	4c32      	ldr	r4, [pc, #200]	; (16d14 <ssd1963_init+0x3a8>)
-   16c4c:	2540      	movs	r5, #64	; 0x40
-   16c4e:	61a5      	str	r5, [r4, #24]
+   16c10:	2220      	movs	r2, #32
+   16c12:	4943      	ldr	r1, [pc, #268]	; (16d20 <ssd1963_init+0x3b4>)
+   16c14:	4843      	ldr	r0, [pc, #268]	; (16d24 <ssd1963_init+0x3b8>)
+   16c16:	4b44      	ldr	r3, [pc, #272]	; (16d28 <ssd1963_init+0x3bc>)
+   16c18:	4798      	blx	r3
+   16c1a:	4c4a      	ldr	r4, [pc, #296]	; (16d44 <ssd1963_init+0x3d8>)
+   16c1c:	2540      	movs	r5, #64	; 0x40
+   16c1e:	61a5      	str	r5, [r4, #24]
     ssd1963_data(((SSD1963_HOR_RES - 1) >> 8) & 0X00FF); //Set HDP
-   16c50:	4b3b      	ldr	r3, [pc, #236]	; (16d40 <ssd1963_init+0x3d4>)
-   16c52:	4798      	blx	r3
-   16c54:	4b3b      	ldr	r3, [pc, #236]	; (16d44 <ssd1963_init+0x3d8>)
-   16c56:	4798      	blx	r3
-   16c58:	1e42      	subs	r2, r0, #1
-   16c5a:	1212      	asrs	r2, r2, #8
+   16c20:	4b4c      	ldr	r3, [pc, #304]	; (16d54 <ssd1963_init+0x3e8>)
+   16c22:	4798      	blx	r3
+   16c24:	4b4c      	ldr	r3, [pc, #304]	; (16d58 <ssd1963_init+0x3ec>)
+   16c26:	4798      	blx	r3
+   16c28:	1e42      	subs	r2, r0, #1
+   16c2a:	1212      	asrs	r2, r2, #8
 		port_base->OUTCLR.reg = pin_mask;
-   16c5c:	6165      	str	r5, [r4, #20]
+   16c2c:	6165      	str	r5, [r4, #20]
     if(cmd_mode != false) {
-   16c5e:	4b2e      	ldr	r3, [pc, #184]	; (16d18 <ssd1963_init+0x3ac>)
-   16c60:	781b      	ldrb	r3, [r3, #0]
-   16c62:	2b00      	cmp	r3, #0
-   16c64:	d004      	beq.n	16c70 <ssd1963_init+0x304>
+   16c2e:	4b46      	ldr	r3, [pc, #280]	; (16d48 <ssd1963_init+0x3dc>)
+   16c30:	781b      	ldrb	r3, [r3, #0]
+   16c32:	2b00      	cmp	r3, #0
+   16c34:	d004      	beq.n	16c40 <ssd1963_init+0x2d4>
 		port_base->OUTSET.reg = pin_mask;
-   16c66:	2120      	movs	r1, #32
-   16c68:	61a1      	str	r1, [r4, #24]
+   16c36:	2120      	movs	r1, #32
+   16c38:	61a1      	str	r1, [r4, #24]
         cmd_mode = false;
-   16c6a:	2100      	movs	r1, #0
-   16c6c:	4b2a      	ldr	r3, [pc, #168]	; (16d18 <ssd1963_init+0x3ac>)
-   16c6e:	7019      	strb	r1, [r3, #0]
+   16c3a:	2100      	movs	r1, #0
+   16c3c:	4b42      	ldr	r3, [pc, #264]	; (16d48 <ssd1963_init+0x3dc>)
+   16c3e:	7019      	strb	r1, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16c70:	20ff      	movs	r0, #255	; 0xff
-   16c72:	4002      	ands	r2, r0
-   16c74:	492f      	ldr	r1, [pc, #188]	; (16d34 <ssd1963_init+0x3c8>)
-   16c76:	4830      	ldr	r0, [pc, #192]	; (16d38 <ssd1963_init+0x3cc>)
-   16c78:	4b30      	ldr	r3, [pc, #192]	; (16d3c <ssd1963_init+0x3d0>)
-   16c7a:	4798      	blx	r3
-   16c7c:	4c25      	ldr	r4, [pc, #148]	; (16d14 <ssd1963_init+0x3a8>)
-   16c7e:	2540      	movs	r5, #64	; 0x40
-   16c80:	61a5      	str	r5, [r4, #24]
+   16c40:	20ff      	movs	r0, #255	; 0xff
+   16c42:	4002      	ands	r2, r0
+   16c44:	4936      	ldr	r1, [pc, #216]	; (16d20 <ssd1963_init+0x3b4>)
+   16c46:	4837      	ldr	r0, [pc, #220]	; (16d24 <ssd1963_init+0x3b8>)
+   16c48:	4b37      	ldr	r3, [pc, #220]	; (16d28 <ssd1963_init+0x3bc>)
+   16c4a:	4798      	blx	r3
+   16c4c:	4c3d      	ldr	r4, [pc, #244]	; (16d44 <ssd1963_init+0x3d8>)
+   16c4e:	2540      	movs	r5, #64	; 0x40
+   16c50:	61a5      	str	r5, [r4, #24]
     ssd1963_data((SSD1963_HOR_RES - 1) & 0X00FF);
-   16c82:	4b2f      	ldr	r3, [pc, #188]	; (16d40 <ssd1963_init+0x3d4>)
-   16c84:	4798      	blx	r3
-   16c86:	4b2f      	ldr	r3, [pc, #188]	; (16d44 <ssd1963_init+0x3d8>)
-   16c88:	4798      	blx	r3
-   16c8a:	3801      	subs	r0, #1
-   16c8c:	b2c2      	uxtb	r2, r0
+   16c52:	4b40      	ldr	r3, [pc, #256]	; (16d54 <ssd1963_init+0x3e8>)
+   16c54:	4798      	blx	r3
+   16c56:	4b40      	ldr	r3, [pc, #256]	; (16d58 <ssd1963_init+0x3ec>)
+   16c58:	4798      	blx	r3
+   16c5a:	3801      	subs	r0, #1
+   16c5c:	b2c2      	uxtb	r2, r0
 		port_base->OUTCLR.reg = pin_mask;
-   16c8e:	6165      	str	r5, [r4, #20]
+   16c5e:	6165      	str	r5, [r4, #20]
     if(cmd_mode != false) {
-   16c90:	4b21      	ldr	r3, [pc, #132]	; (16d18 <ssd1963_init+0x3ac>)
-   16c92:	781b      	ldrb	r3, [r3, #0]
-   16c94:	2b00      	cmp	r3, #0
-   16c96:	d004      	beq.n	16ca2 <ssd1963_init+0x336>
+   16c60:	4b39      	ldr	r3, [pc, #228]	; (16d48 <ssd1963_init+0x3dc>)
+   16c62:	781b      	ldrb	r3, [r3, #0]
+   16c64:	2b00      	cmp	r3, #0
+   16c66:	d004      	beq.n	16c72 <ssd1963_init+0x306>
 		port_base->OUTSET.reg = pin_mask;
-   16c98:	2120      	movs	r1, #32
-   16c9a:	61a1      	str	r1, [r4, #24]
+   16c68:	2120      	movs	r1, #32
+   16c6a:	61a1      	str	r1, [r4, #24]
         cmd_mode = false;
-   16c9c:	2100      	movs	r1, #0
-   16c9e:	4b1e      	ldr	r3, [pc, #120]	; (16d18 <ssd1963_init+0x3ac>)
-   16ca0:	7019      	strb	r1, [r3, #0]
+   16c6c:	2100      	movs	r1, #0
+   16c6e:	4b36      	ldr	r3, [pc, #216]	; (16d48 <ssd1963_init+0x3dc>)
+   16c70:	7019      	strb	r1, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16ca2:	4924      	ldr	r1, [pc, #144]	; (16d34 <ssd1963_init+0x3c8>)
-   16ca4:	4824      	ldr	r0, [pc, #144]	; (16d38 <ssd1963_init+0x3cc>)
-   16ca6:	4b25      	ldr	r3, [pc, #148]	; (16d3c <ssd1963_init+0x3d0>)
-   16ca8:	4798      	blx	r3
-   16caa:	4c1a      	ldr	r4, [pc, #104]	; (16d14 <ssd1963_init+0x3a8>)
-   16cac:	2540      	movs	r5, #64	; 0x40
-   16cae:	61a5      	str	r5, [r4, #24]
+   16c72:	492b      	ldr	r1, [pc, #172]	; (16d20 <ssd1963_init+0x3b4>)
+   16c74:	482b      	ldr	r0, [pc, #172]	; (16d24 <ssd1963_init+0x3b8>)
+   16c76:	4b2c      	ldr	r3, [pc, #176]	; (16d28 <ssd1963_init+0x3bc>)
+   16c78:	4798      	blx	r3
+   16c7a:	4c32      	ldr	r4, [pc, #200]	; (16d44 <ssd1963_init+0x3d8>)
+   16c7c:	2540      	movs	r5, #64	; 0x40
+   16c7e:	61a5      	str	r5, [r4, #24]
     ssd1963_data(((SSD1963_VER_RES - 1) >> 8) & 0X00FF); //Set VDP
-   16cb0:	4b23      	ldr	r3, [pc, #140]	; (16d40 <ssd1963_init+0x3d4>)
-   16cb2:	4798      	blx	r3
-   16cb4:	4b24      	ldr	r3, [pc, #144]	; (16d48 <ssd1963_init+0x3dc>)
-   16cb6:	4798      	blx	r3
-   16cb8:	1e42      	subs	r2, r0, #1
-   16cba:	1212      	asrs	r2, r2, #8
+   16c80:	4b34      	ldr	r3, [pc, #208]	; (16d54 <ssd1963_init+0x3e8>)
+   16c82:	4798      	blx	r3
+   16c84:	4b35      	ldr	r3, [pc, #212]	; (16d5c <ssd1963_init+0x3f0>)
+   16c86:	4798      	blx	r3
+   16c88:	1e42      	subs	r2, r0, #1
+   16c8a:	1212      	asrs	r2, r2, #8
 		port_base->OUTCLR.reg = pin_mask;
-   16cbc:	6165      	str	r5, [r4, #20]
+   16c8c:	6165      	str	r5, [r4, #20]
     if(cmd_mode != false) {
-   16cbe:	4b16      	ldr	r3, [pc, #88]	; (16d18 <ssd1963_init+0x3ac>)
-   16cc0:	781b      	ldrb	r3, [r3, #0]
-   16cc2:	2b00      	cmp	r3, #0
-   16cc4:	d004      	beq.n	16cd0 <ssd1963_init+0x364>
+   16c8e:	4b2e      	ldr	r3, [pc, #184]	; (16d48 <ssd1963_init+0x3dc>)
+   16c90:	781b      	ldrb	r3, [r3, #0]
+   16c92:	2b00      	cmp	r3, #0
+   16c94:	d004      	beq.n	16ca0 <ssd1963_init+0x334>
 		port_base->OUTSET.reg = pin_mask;
-   16cc6:	2120      	movs	r1, #32
-   16cc8:	61a1      	str	r1, [r4, #24]
+   16c96:	2120      	movs	r1, #32
+   16c98:	61a1      	str	r1, [r4, #24]
         cmd_mode = false;
-   16cca:	2100      	movs	r1, #0
-   16ccc:	4b12      	ldr	r3, [pc, #72]	; (16d18 <ssd1963_init+0x3ac>)
-   16cce:	7019      	strb	r1, [r3, #0]
+   16c9a:	2100      	movs	r1, #0
+   16c9c:	4b2a      	ldr	r3, [pc, #168]	; (16d48 <ssd1963_init+0x3dc>)
+   16c9e:	7019      	strb	r1, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16cd0:	20ff      	movs	r0, #255	; 0xff
-   16cd2:	4002      	ands	r2, r0
-   16cd4:	4917      	ldr	r1, [pc, #92]	; (16d34 <ssd1963_init+0x3c8>)
-   16cd6:	4818      	ldr	r0, [pc, #96]	; (16d38 <ssd1963_init+0x3cc>)
-   16cd8:	4b18      	ldr	r3, [pc, #96]	; (16d3c <ssd1963_init+0x3d0>)
-   16cda:	4798      	blx	r3
-   16cdc:	4c0d      	ldr	r4, [pc, #52]	; (16d14 <ssd1963_init+0x3a8>)
-   16cde:	2540      	movs	r5, #64	; 0x40
-   16ce0:	61a5      	str	r5, [r4, #24]
+   16ca0:	20ff      	movs	r0, #255	; 0xff
+   16ca2:	4002      	ands	r2, r0
+   16ca4:	491e      	ldr	r1, [pc, #120]	; (16d20 <ssd1963_init+0x3b4>)
+   16ca6:	481f      	ldr	r0, [pc, #124]	; (16d24 <ssd1963_init+0x3b8>)
+   16ca8:	4b1f      	ldr	r3, [pc, #124]	; (16d28 <ssd1963_init+0x3bc>)
+   16caa:	4798      	blx	r3
+   16cac:	4c25      	ldr	r4, [pc, #148]	; (16d44 <ssd1963_init+0x3d8>)
+   16cae:	2540      	movs	r5, #64	; 0x40
+   16cb0:	61a5      	str	r5, [r4, #24]
     ssd1963_data((SSD1963_VER_RES - 1) & 0X00FF);
-   16ce2:	4b17      	ldr	r3, [pc, #92]	; (16d40 <ssd1963_init+0x3d4>)
-   16ce4:	4798      	blx	r3
-   16ce6:	4b18      	ldr	r3, [pc, #96]	; (16d48 <ssd1963_init+0x3dc>)
-   16ce8:	4798      	blx	r3
-   16cea:	3801      	subs	r0, #1
-   16cec:	b2c2      	uxtb	r2, r0
+   16cb2:	4b28      	ldr	r3, [pc, #160]	; (16d54 <ssd1963_init+0x3e8>)
+   16cb4:	4798      	blx	r3
+   16cb6:	4b29      	ldr	r3, [pc, #164]	; (16d5c <ssd1963_init+0x3f0>)
+   16cb8:	4798      	blx	r3
+   16cba:	3801      	subs	r0, #1
+   16cbc:	b2c2      	uxtb	r2, r0
 		port_base->OUTCLR.reg = pin_mask;
-   16cee:	6165      	str	r5, [r4, #20]
+   16cbe:	6165      	str	r5, [r4, #20]
     if(cmd_mode != false) {
-   16cf0:	4b09      	ldr	r3, [pc, #36]	; (16d18 <ssd1963_init+0x3ac>)
-   16cf2:	781b      	ldrb	r3, [r3, #0]
-   16cf4:	2b00      	cmp	r3, #0
-   16cf6:	d004      	beq.n	16d02 <ssd1963_init+0x396>
+   16cc0:	4b21      	ldr	r3, [pc, #132]	; (16d48 <ssd1963_init+0x3dc>)
+   16cc2:	781b      	ldrb	r3, [r3, #0]
+   16cc4:	2b00      	cmp	r3, #0
+   16cc6:	d004      	beq.n	16cd2 <ssd1963_init+0x366>
 		port_base->OUTSET.reg = pin_mask;
-   16cf8:	2120      	movs	r1, #32
-   16cfa:	61a1      	str	r1, [r4, #24]
+   16cc8:	2120      	movs	r1, #32
+   16cca:	61a1      	str	r1, [r4, #24]
         cmd_mode = false;
-   16cfc:	2100      	movs	r1, #0
-   16cfe:	4b06      	ldr	r3, [pc, #24]	; (16d18 <ssd1963_init+0x3ac>)
-   16d00:	7019      	strb	r1, [r3, #0]
+   16ccc:	2100      	movs	r1, #0
+   16cce:	4b1e      	ldr	r3, [pc, #120]	; (16d48 <ssd1963_init+0x3dc>)
+   16cd0:	7019      	strb	r1, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16d02:	490c      	ldr	r1, [pc, #48]	; (16d34 <ssd1963_init+0x3c8>)
-   16d04:	480c      	ldr	r0, [pc, #48]	; (16d38 <ssd1963_init+0x3cc>)
-   16d06:	4b0d      	ldr	r3, [pc, #52]	; (16d3c <ssd1963_init+0x3d0>)
-   16d08:	4798      	blx	r3
-   16d0a:	4b02      	ldr	r3, [pc, #8]	; (16d14 <ssd1963_init+0x3a8>)
-   16d0c:	2240      	movs	r2, #64	; 0x40
-   16d0e:	619a      	str	r2, [r3, #24]
+   16cd2:	4913      	ldr	r1, [pc, #76]	; (16d20 <ssd1963_init+0x3b4>)
+   16cd4:	4813      	ldr	r0, [pc, #76]	; (16d24 <ssd1963_init+0x3b8>)
+   16cd6:	4b14      	ldr	r3, [pc, #80]	; (16d28 <ssd1963_init+0x3bc>)
+   16cd8:	4798      	blx	r3
+   16cda:	4b1a      	ldr	r3, [pc, #104]	; (16d44 <ssd1963_init+0x3d8>)
+   16cdc:	2240      	movs	r2, #64	; 0x40
+   16cde:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16d10:	615a      	str	r2, [r3, #20]
-   16d12:	e01b      	b.n	16d4c <ssd1963_init+0x3e0>
-   16d14:	41004400 	.word	0x41004400
-   16d18:	2000005c 	.word	0x2000005c
-   16d1c:	000010cd 	.word	0x000010cd
-   16d20:	00017d1d 	.word	0x00017d1d
-   16d24:	00001b57 	.word	0x00001b57
-   16d28:	00001b58 	.word	0x00001b58
-   16d2c:	00017cdd 	.word	0x00017cdd
-   16d30:	20000001 	.word	0x20000001
-   16d34:	1c03c3f7 	.word	0x1c03c3f7
-   16d38:	41004480 	.word	0x41004480
-   16d3c:	00017815 	.word	0x00017815
-   16d40:	0000f609 	.word	0x0000f609
-   16d44:	0000f615 	.word	0x0000f615
-   16d48:	0000f63d 	.word	0x0000f63d
+   16ce0:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16d4c:	4be5      	ldr	r3, [pc, #916]	; (170e4 <ssd1963_init+0x778>)
-   16d4e:	781b      	ldrb	r3, [r3, #0]
-   16d50:	2b00      	cmp	r3, #0
-   16d52:	d005      	beq.n	16d60 <ssd1963_init+0x3f4>
+   16ce2:	4b19      	ldr	r3, [pc, #100]	; (16d48 <ssd1963_init+0x3dc>)
+   16ce4:	781b      	ldrb	r3, [r3, #0]
+   16ce6:	2b00      	cmp	r3, #0
+   16ce8:	d005      	beq.n	16cf6 <ssd1963_init+0x38a>
 		port_base->OUTSET.reg = pin_mask;
-   16d54:	3a20      	subs	r2, #32
-   16d56:	4be4      	ldr	r3, [pc, #912]	; (170e8 <ssd1963_init+0x77c>)
-   16d58:	619a      	str	r2, [r3, #24]
+   16cea:	3a20      	subs	r2, #32
+   16cec:	4b15      	ldr	r3, [pc, #84]	; (16d44 <ssd1963_init+0x3d8>)
+   16cee:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16d5a:	2200      	movs	r2, #0
-   16d5c:	4be1      	ldr	r3, [pc, #900]	; (170e4 <ssd1963_init+0x778>)
-   16d5e:	701a      	strb	r2, [r3, #0]
+   16cf0:	2200      	movs	r2, #0
+   16cf2:	4b15      	ldr	r3, [pc, #84]	; (16d48 <ssd1963_init+0x3dc>)
+   16cf4:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16d60:	2200      	movs	r2, #0
-   16d62:	49e2      	ldr	r1, [pc, #904]	; (170ec <ssd1963_init+0x780>)
-   16d64:	48e2      	ldr	r0, [pc, #904]	; (170f0 <ssd1963_init+0x784>)
-   16d66:	4be3      	ldr	r3, [pc, #908]	; (170f4 <ssd1963_init+0x788>)
-   16d68:	4798      	blx	r3
-   16d6a:	4cdf      	ldr	r4, [pc, #892]	; (170e8 <ssd1963_init+0x77c>)
-   16d6c:	2540      	movs	r5, #64	; 0x40
-   16d6e:	61a5      	str	r5, [r4, #24]
-    LV_DRV_DELAY_MS(1);//Delay10us(5);
-   16d70:	2000      	movs	r0, #0
-   16d72:	4be1      	ldr	r3, [pc, #900]	; (170f8 <ssd1963_init+0x78c>)
-   16d74:	4798      	blx	r3
-   16d76:	0002      	movs	r2, r0
-   16d78:	2300      	movs	r3, #0
-   16d7a:	48e0      	ldr	r0, [pc, #896]	; (170fc <ssd1963_init+0x790>)
-   16d7c:	2100      	movs	r1, #0
-   16d7e:	1880      	adds	r0, r0, r2
-   16d80:	4159      	adcs	r1, r3
-   16d82:	4adf      	ldr	r2, [pc, #892]	; (17100 <ssd1963_init+0x794>)
-   16d84:	2300      	movs	r3, #0
-   16d86:	4edf      	ldr	r6, [pc, #892]	; (17104 <ssd1963_init+0x798>)
-   16d88:	47b0      	blx	r6
-   16d8a:	4bdf      	ldr	r3, [pc, #892]	; (17108 <ssd1963_init+0x79c>)
-   16d8c:	4798      	blx	r3
+   16cf6:	2200      	movs	r2, #0
+   16cf8:	4909      	ldr	r1, [pc, #36]	; (16d20 <ssd1963_init+0x3b4>)
+   16cfa:	480a      	ldr	r0, [pc, #40]	; (16d24 <ssd1963_init+0x3b8>)
+   16cfc:	4b0a      	ldr	r3, [pc, #40]	; (16d28 <ssd1963_init+0x3bc>)
+   16cfe:	4798      	blx	r3
+   16d00:	4b10      	ldr	r3, [pc, #64]	; (16d44 <ssd1963_init+0x3d8>)
+   16d02:	2240      	movs	r2, #64	; 0x40
+   16d04:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16d8e:	6165      	str	r5, [r4, #20]
+   16d06:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   16d90:	4bd4      	ldr	r3, [pc, #848]	; (170e4 <ssd1963_init+0x778>)
-   16d92:	781b      	ldrb	r3, [r3, #0]
-   16d94:	2b00      	cmp	r3, #0
-   16d96:	d104      	bne.n	16da2 <ssd1963_init+0x436>
-   16d98:	2220      	movs	r2, #32
-   16d9a:	6162      	str	r2, [r4, #20]
+   16d08:	4b0f      	ldr	r3, [pc, #60]	; (16d48 <ssd1963_init+0x3dc>)
+   16d0a:	781b      	ldrb	r3, [r3, #0]
+   16d0c:	2b00      	cmp	r3, #0
+   16d0e:	d129      	bne.n	16d64 <ssd1963_init+0x3f8>
+   16d10:	3a20      	subs	r2, #32
+   16d12:	4b0c      	ldr	r3, [pc, #48]	; (16d44 <ssd1963_init+0x3d8>)
+   16d14:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   16d9c:	3a1f      	subs	r2, #31
-   16d9e:	4bd1      	ldr	r3, [pc, #836]	; (170e4 <ssd1963_init+0x778>)
-   16da0:	701a      	strb	r2, [r3, #0]
+   16d16:	3a1f      	subs	r2, #31
+   16d18:	e022      	b.n	16d60 <ssd1963_init+0x3f4>
+   16d1a:	46c0      	nop			; (mov r8, r8)
+   16d1c:	0000aaaa 	.word	0x0000aaaa
+   16d20:	0000ffff 	.word	0x0000ffff
+   16d24:	41004480 	.word	0x41004480
+   16d28:	00017635 	.word	0x00017635
+   16d2c:	000010cd 	.word	0x000010cd
+   16d30:	00017bad 	.word	0x00017bad
+   16d34:	00001b57 	.word	0x00001b57
+   16d38:	00017b6d 	.word	0x00017b6d
+   16d3c:	00001b58 	.word	0x00001b58
+   16d40:	20000001 	.word	0x20000001
+   16d44:	41004400 	.word	0x41004400
+   16d48:	2000005c 	.word	0x2000005c
+   16d4c:	006acfbf 	.word	0x006acfbf
+   16d50:	006acfc0 	.word	0x006acfc0
+   16d54:	0000f609 	.word	0x0000f609
+   16d58:	0000f615 	.word	0x0000f615
+   16d5c:	0000f63d 	.word	0x0000f63d
+   16d60:	4be5      	ldr	r3, [pc, #916]	; (170f8 <ssd1963_init+0x78c>)
+   16d62:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16da2:	22b4      	movs	r2, #180	; 0xb4
-   16da4:	49d1      	ldr	r1, [pc, #836]	; (170ec <ssd1963_init+0x780>)
-   16da6:	48d2      	ldr	r0, [pc, #840]	; (170f0 <ssd1963_init+0x784>)
-   16da8:	4bd2      	ldr	r3, [pc, #840]	; (170f4 <ssd1963_init+0x788>)
-   16daa:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   16dac:	4bce      	ldr	r3, [pc, #824]	; (170e8 <ssd1963_init+0x77c>)
-   16dae:	2240      	movs	r2, #64	; 0x40
-   16db0:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   16db2:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16db4:	4bcb      	ldr	r3, [pc, #812]	; (170e4 <ssd1963_init+0x778>)
-   16db6:	781b      	ldrb	r3, [r3, #0]
-   16db8:	2b00      	cmp	r3, #0
-   16dba:	d005      	beq.n	16dc8 <ssd1963_init+0x45c>
+   16d64:	22f0      	movs	r2, #240	; 0xf0
+   16d66:	49e5      	ldr	r1, [pc, #916]	; (170fc <ssd1963_init+0x790>)
+   16d68:	48e5      	ldr	r0, [pc, #916]	; (17100 <ssd1963_init+0x794>)
+   16d6a:	4be6      	ldr	r3, [pc, #920]	; (17104 <ssd1963_init+0x798>)
+   16d6c:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16dbc:	3a20      	subs	r2, #32
-   16dbe:	4bca      	ldr	r3, [pc, #808]	; (170e8 <ssd1963_init+0x77c>)
-   16dc0:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16dc2:	2200      	movs	r2, #0
-   16dc4:	4bc7      	ldr	r3, [pc, #796]	; (170e4 <ssd1963_init+0x778>)
-   16dc6:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16dc8:	2202      	movs	r2, #2
-   16dca:	49c8      	ldr	r1, [pc, #800]	; (170ec <ssd1963_init+0x780>)
-   16dcc:	48c8      	ldr	r0, [pc, #800]	; (170f0 <ssd1963_init+0x784>)
-   16dce:	4bc9      	ldr	r3, [pc, #804]	; (170f4 <ssd1963_init+0x788>)
-   16dd0:	4798      	blx	r3
-   16dd2:	4bc5      	ldr	r3, [pc, #788]	; (170e8 <ssd1963_init+0x77c>)
-   16dd4:	2240      	movs	r2, #64	; 0x40
-   16dd6:	619a      	str	r2, [r3, #24]
+   16d6e:	4be6      	ldr	r3, [pc, #920]	; (17108 <ssd1963_init+0x79c>)
+   16d70:	2240      	movs	r2, #64	; 0x40
+   16d72:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16dd8:	615a      	str	r2, [r3, #20]
+   16d74:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16dda:	4bc2      	ldr	r3, [pc, #776]	; (170e4 <ssd1963_init+0x778>)
-   16ddc:	781b      	ldrb	r3, [r3, #0]
-   16dde:	2b00      	cmp	r3, #0
-   16de0:	d005      	beq.n	16dee <ssd1963_init+0x482>
+   16d76:	4be0      	ldr	r3, [pc, #896]	; (170f8 <ssd1963_init+0x78c>)
+   16d78:	781b      	ldrb	r3, [r3, #0]
+   16d7a:	2b00      	cmp	r3, #0
+   16d7c:	d005      	beq.n	16d8a <ssd1963_init+0x41e>
 		port_base->OUTSET.reg = pin_mask;
-   16de2:	3a20      	subs	r2, #32
-   16de4:	4bc0      	ldr	r3, [pc, #768]	; (170e8 <ssd1963_init+0x77c>)
-   16de6:	619a      	str	r2, [r3, #24]
+   16d7e:	3a20      	subs	r2, #32
+   16d80:	4be1      	ldr	r3, [pc, #900]	; (17108 <ssd1963_init+0x79c>)
+   16d82:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16de8:	2200      	movs	r2, #0
-   16dea:	4bbe      	ldr	r3, [pc, #760]	; (170e4 <ssd1963_init+0x778>)
-   16dec:	701a      	strb	r2, [r3, #0]
+   16d84:	2200      	movs	r2, #0
+   16d86:	4bdc      	ldr	r3, [pc, #880]	; (170f8 <ssd1963_init+0x78c>)
+   16d88:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16dee:	220d      	movs	r2, #13
-   16df0:	49be      	ldr	r1, [pc, #760]	; (170ec <ssd1963_init+0x780>)
-   16df2:	48bf      	ldr	r0, [pc, #764]	; (170f0 <ssd1963_init+0x784>)
-   16df4:	4bbf      	ldr	r3, [pc, #764]	; (170f4 <ssd1963_init+0x788>)
-   16df6:	4798      	blx	r3
-   16df8:	4bbb      	ldr	r3, [pc, #748]	; (170e8 <ssd1963_init+0x77c>)
-   16dfa:	2240      	movs	r2, #64	; 0x40
-   16dfc:	619a      	str	r2, [r3, #24]
+   16d8a:	2203      	movs	r2, #3
+   16d8c:	49db      	ldr	r1, [pc, #876]	; (170fc <ssd1963_init+0x790>)
+   16d8e:	48dc      	ldr	r0, [pc, #880]	; (17100 <ssd1963_init+0x794>)
+   16d90:	4bdc      	ldr	r3, [pc, #880]	; (17104 <ssd1963_init+0x798>)
+   16d92:	4798      	blx	r3
+   16d94:	4bdc      	ldr	r3, [pc, #880]	; (17108 <ssd1963_init+0x79c>)
+   16d96:	2240      	movs	r2, #64	; 0x40
+   16d98:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16dfe:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16e00:	4bb8      	ldr	r3, [pc, #736]	; (170e4 <ssd1963_init+0x778>)
-   16e02:	781b      	ldrb	r3, [r3, #0]
-   16e04:	2b00      	cmp	r3, #0
-   16e06:	d005      	beq.n	16e14 <ssd1963_init+0x4a8>
+   16d9a:	615a      	str	r2, [r3, #20]
+    if(cmd_mode == false) {
+   16d9c:	4bd6      	ldr	r3, [pc, #856]	; (170f8 <ssd1963_init+0x78c>)
+   16d9e:	781b      	ldrb	r3, [r3, #0]
+   16da0:	2b00      	cmp	r3, #0
+   16da2:	d105      	bne.n	16db0 <ssd1963_init+0x444>
+   16da4:	3a20      	subs	r2, #32
+   16da6:	4bd8      	ldr	r3, [pc, #864]	; (17108 <ssd1963_init+0x79c>)
+   16da8:	615a      	str	r2, [r3, #20]
+        cmd_mode = true;
+   16daa:	3a1f      	subs	r2, #31
+   16dac:	4bd2      	ldr	r3, [pc, #840]	; (170f8 <ssd1963_init+0x78c>)
+   16dae:	701a      	strb	r2, [r3, #0]
+    LV_DRV_DISP_PAR_WR_WORD(cmd);
+   16db0:	223a      	movs	r2, #58	; 0x3a
+   16db2:	49d2      	ldr	r1, [pc, #840]	; (170fc <ssd1963_init+0x790>)
+   16db4:	48d2      	ldr	r0, [pc, #840]	; (17100 <ssd1963_init+0x794>)
+   16db6:	4bd3      	ldr	r3, [pc, #844]	; (17104 <ssd1963_init+0x798>)
+   16db8:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16e08:	3a20      	subs	r2, #32
-   16e0a:	4bb7      	ldr	r3, [pc, #732]	; (170e8 <ssd1963_init+0x77c>)
-   16e0c:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16e0e:	2200      	movs	r2, #0
-   16e10:	4bb4      	ldr	r3, [pc, #720]	; (170e4 <ssd1963_init+0x778>)
-   16e12:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16e14:	2201      	movs	r2, #1
-   16e16:	49b5      	ldr	r1, [pc, #724]	; (170ec <ssd1963_init+0x780>)
-   16e18:	48b5      	ldr	r0, [pc, #724]	; (170f0 <ssd1963_init+0x784>)
-   16e1a:	4bb6      	ldr	r3, [pc, #728]	; (170f4 <ssd1963_init+0x788>)
-   16e1c:	4798      	blx	r3
-   16e1e:	4bb2      	ldr	r3, [pc, #712]	; (170e8 <ssd1963_init+0x77c>)
-   16e20:	2240      	movs	r2, #64	; 0x40
-   16e22:	619a      	str	r2, [r3, #24]
+   16dba:	4bd3      	ldr	r3, [pc, #844]	; (17108 <ssd1963_init+0x79c>)
+   16dbc:	2240      	movs	r2, #64	; 0x40
+   16dbe:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16e24:	615a      	str	r2, [r3, #20]
+   16dc0:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16e26:	4baf      	ldr	r3, [pc, #700]	; (170e4 <ssd1963_init+0x778>)
-   16e28:	781b      	ldrb	r3, [r3, #0]
-   16e2a:	2b00      	cmp	r3, #0
-   16e2c:	d005      	beq.n	16e3a <ssd1963_init+0x4ce>
+   16dc2:	4bcd      	ldr	r3, [pc, #820]	; (170f8 <ssd1963_init+0x78c>)
+   16dc4:	781b      	ldrb	r3, [r3, #0]
+   16dc6:	2b00      	cmp	r3, #0
+   16dc8:	d005      	beq.n	16dd6 <ssd1963_init+0x46a>
 		port_base->OUTSET.reg = pin_mask;
-   16e2e:	3a20      	subs	r2, #32
-   16e30:	4bad      	ldr	r3, [pc, #692]	; (170e8 <ssd1963_init+0x77c>)
-   16e32:	619a      	str	r2, [r3, #24]
+   16dca:	3a20      	subs	r2, #32
+   16dcc:	4bce      	ldr	r3, [pc, #824]	; (17108 <ssd1963_init+0x79c>)
+   16dce:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16e34:	2200      	movs	r2, #0
-   16e36:	4bab      	ldr	r3, [pc, #684]	; (170e4 <ssd1963_init+0x778>)
-   16e38:	701a      	strb	r2, [r3, #0]
+   16dd0:	2200      	movs	r2, #0
+   16dd2:	4bc9      	ldr	r3, [pc, #804]	; (170f8 <ssd1963_init+0x78c>)
+   16dd4:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16e3a:	22e0      	movs	r2, #224	; 0xe0
-   16e3c:	49ab      	ldr	r1, [pc, #684]	; (170ec <ssd1963_init+0x780>)
-   16e3e:	48ac      	ldr	r0, [pc, #688]	; (170f0 <ssd1963_init+0x784>)
-   16e40:	4bac      	ldr	r3, [pc, #688]	; (170f4 <ssd1963_init+0x788>)
-   16e42:	4798      	blx	r3
-   16e44:	4ba8      	ldr	r3, [pc, #672]	; (170e8 <ssd1963_init+0x77c>)
-   16e46:	2240      	movs	r2, #64	; 0x40
-   16e48:	619a      	str	r2, [r3, #24]
+   16dd6:	2250      	movs	r2, #80	; 0x50
+   16dd8:	49c8      	ldr	r1, [pc, #800]	; (170fc <ssd1963_init+0x790>)
+   16dda:	48c9      	ldr	r0, [pc, #804]	; (17100 <ssd1963_init+0x794>)
+   16ddc:	4bc9      	ldr	r3, [pc, #804]	; (17104 <ssd1963_init+0x798>)
+   16dde:	4798      	blx	r3
+   16de0:	4bc9      	ldr	r3, [pc, #804]	; (17108 <ssd1963_init+0x79c>)
+   16de2:	2240      	movs	r2, #64	; 0x40
+   16de4:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16e4a:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16e4c:	4ba5      	ldr	r3, [pc, #660]	; (170e4 <ssd1963_init+0x778>)
-   16e4e:	781b      	ldrb	r3, [r3, #0]
-   16e50:	2b00      	cmp	r3, #0
-   16e52:	d005      	beq.n	16e60 <ssd1963_init+0x4f4>
+   16de6:	615a      	str	r2, [r3, #20]
+    if(cmd_mode == false) {
+   16de8:	4bc3      	ldr	r3, [pc, #780]	; (170f8 <ssd1963_init+0x78c>)
+   16dea:	781b      	ldrb	r3, [r3, #0]
+   16dec:	2b00      	cmp	r3, #0
+   16dee:	d105      	bne.n	16dfc <ssd1963_init+0x490>
+   16df0:	3a20      	subs	r2, #32
+   16df2:	4bc5      	ldr	r3, [pc, #788]	; (17108 <ssd1963_init+0x79c>)
+   16df4:	615a      	str	r2, [r3, #20]
+        cmd_mode = true;
+   16df6:	3a1f      	subs	r2, #31
+   16df8:	4bbf      	ldr	r3, [pc, #764]	; (170f8 <ssd1963_init+0x78c>)
+   16dfa:	701a      	strb	r2, [r3, #0]
+    LV_DRV_DISP_PAR_WR_WORD(cmd);
+   16dfc:	22e6      	movs	r2, #230	; 0xe6
+   16dfe:	49bf      	ldr	r1, [pc, #764]	; (170fc <ssd1963_init+0x790>)
+   16e00:	48bf      	ldr	r0, [pc, #764]	; (17100 <ssd1963_init+0x794>)
+   16e02:	4bc0      	ldr	r3, [pc, #768]	; (17104 <ssd1963_init+0x798>)
+   16e04:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16e54:	3a20      	subs	r2, #32
-   16e56:	4ba4      	ldr	r3, [pc, #656]	; (170e8 <ssd1963_init+0x77c>)
-   16e58:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16e5a:	2200      	movs	r2, #0
-   16e5c:	4ba1      	ldr	r3, [pc, #644]	; (170e4 <ssd1963_init+0x778>)
-   16e5e:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16e60:	2205      	movs	r2, #5
-   16e62:	49a2      	ldr	r1, [pc, #648]	; (170ec <ssd1963_init+0x780>)
-   16e64:	48a2      	ldr	r0, [pc, #648]	; (170f0 <ssd1963_init+0x784>)
-   16e66:	4ba3      	ldr	r3, [pc, #652]	; (170f4 <ssd1963_init+0x788>)
-   16e68:	4798      	blx	r3
-   16e6a:	4b9f      	ldr	r3, [pc, #636]	; (170e8 <ssd1963_init+0x77c>)
-   16e6c:	2240      	movs	r2, #64	; 0x40
-   16e6e:	619a      	str	r2, [r3, #24]
+   16e06:	4bc0      	ldr	r3, [pc, #768]	; (17108 <ssd1963_init+0x79c>)
+   16e08:	2240      	movs	r2, #64	; 0x40
+   16e0a:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16e70:	615a      	str	r2, [r3, #20]
+   16e0c:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16e72:	4b9c      	ldr	r3, [pc, #624]	; (170e4 <ssd1963_init+0x778>)
-   16e74:	781b      	ldrb	r3, [r3, #0]
-   16e76:	2b00      	cmp	r3, #0
-   16e78:	d005      	beq.n	16e86 <ssd1963_init+0x51a>
+   16e0e:	4bba      	ldr	r3, [pc, #744]	; (170f8 <ssd1963_init+0x78c>)
+   16e10:	781b      	ldrb	r3, [r3, #0]
+   16e12:	2b00      	cmp	r3, #0
+   16e14:	d005      	beq.n	16e22 <ssd1963_init+0x4b6>
 		port_base->OUTSET.reg = pin_mask;
-   16e7a:	3a20      	subs	r2, #32
-   16e7c:	4b9a      	ldr	r3, [pc, #616]	; (170e8 <ssd1963_init+0x77c>)
-   16e7e:	619a      	str	r2, [r3, #24]
+   16e16:	3a20      	subs	r2, #32
+   16e18:	4bbb      	ldr	r3, [pc, #748]	; (17108 <ssd1963_init+0x79c>)
+   16e1a:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16e80:	2200      	movs	r2, #0
-   16e82:	4b98      	ldr	r3, [pc, #608]	; (170e4 <ssd1963_init+0x778>)
-   16e84:	701a      	strb	r2, [r3, #0]
+   16e1c:	2200      	movs	r2, #0
+   16e1e:	4bb6      	ldr	r3, [pc, #728]	; (170f8 <ssd1963_init+0x78c>)
+   16e20:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16e86:	2200      	movs	r2, #0
-   16e88:	4998      	ldr	r1, [pc, #608]	; (170ec <ssd1963_init+0x780>)
-   16e8a:	4899      	ldr	r0, [pc, #612]	; (170f0 <ssd1963_init+0x784>)
-   16e8c:	4b99      	ldr	r3, [pc, #612]	; (170f4 <ssd1963_init+0x788>)
-   16e8e:	4798      	blx	r3
-   16e90:	4b95      	ldr	r3, [pc, #596]	; (170e8 <ssd1963_init+0x77c>)
-   16e92:	2240      	movs	r2, #64	; 0x40
-   16e94:	619a      	str	r2, [r3, #24]
+   16e22:	2204      	movs	r2, #4
+   16e24:	49b5      	ldr	r1, [pc, #724]	; (170fc <ssd1963_init+0x790>)
+   16e26:	48b6      	ldr	r0, [pc, #728]	; (17100 <ssd1963_init+0x794>)
+   16e28:	4bb6      	ldr	r3, [pc, #728]	; (17104 <ssd1963_init+0x798>)
+   16e2a:	4798      	blx	r3
+   16e2c:	4bb6      	ldr	r3, [pc, #728]	; (17108 <ssd1963_init+0x79c>)
+   16e2e:	2240      	movs	r2, #64	; 0x40
+   16e30:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16e96:	615a      	str	r2, [r3, #20]
+   16e32:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16e98:	4b92      	ldr	r3, [pc, #584]	; (170e4 <ssd1963_init+0x778>)
-   16e9a:	781b      	ldrb	r3, [r3, #0]
-   16e9c:	2b00      	cmp	r3, #0
-   16e9e:	d005      	beq.n	16eac <ssd1963_init+0x540>
+   16e34:	4bb0      	ldr	r3, [pc, #704]	; (170f8 <ssd1963_init+0x78c>)
+   16e36:	781b      	ldrb	r3, [r3, #0]
+   16e38:	2b00      	cmp	r3, #0
+   16e3a:	d005      	beq.n	16e48 <ssd1963_init+0x4dc>
 		port_base->OUTSET.reg = pin_mask;
-   16ea0:	3a20      	subs	r2, #32
-   16ea2:	4b91      	ldr	r3, [pc, #580]	; (170e8 <ssd1963_init+0x77c>)
-   16ea4:	619a      	str	r2, [r3, #24]
+   16e3c:	3a20      	subs	r2, #32
+   16e3e:	4bb2      	ldr	r3, [pc, #712]	; (17108 <ssd1963_init+0x79c>)
+   16e40:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16ea6:	2200      	movs	r2, #0
-   16ea8:	4b8e      	ldr	r3, [pc, #568]	; (170e4 <ssd1963_init+0x778>)
-   16eaa:	701a      	strb	r2, [r3, #0]
+   16e42:	2200      	movs	r2, #0
+   16e44:	4bac      	ldr	r3, [pc, #688]	; (170f8 <ssd1963_init+0x78c>)
+   16e46:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16eac:	2228      	movs	r2, #40	; 0x28
-   16eae:	498f      	ldr	r1, [pc, #572]	; (170ec <ssd1963_init+0x780>)
-   16eb0:	488f      	ldr	r0, [pc, #572]	; (170f0 <ssd1963_init+0x784>)
-   16eb2:	4b90      	ldr	r3, [pc, #576]	; (170f4 <ssd1963_init+0x788>)
-   16eb4:	4798      	blx	r3
-   16eb6:	4b8c      	ldr	r3, [pc, #560]	; (170e8 <ssd1963_init+0x77c>)
-   16eb8:	2240      	movs	r2, #64	; 0x40
-   16eba:	619a      	str	r2, [r3, #24]
+   16e48:	223a      	movs	r2, #58	; 0x3a
+   16e4a:	49ac      	ldr	r1, [pc, #688]	; (170fc <ssd1963_init+0x790>)
+   16e4c:	48ac      	ldr	r0, [pc, #688]	; (17100 <ssd1963_init+0x794>)
+   16e4e:	4bad      	ldr	r3, [pc, #692]	; (17104 <ssd1963_init+0x798>)
+   16e50:	4798      	blx	r3
+   16e52:	4bad      	ldr	r3, [pc, #692]	; (17108 <ssd1963_init+0x79c>)
+   16e54:	2240      	movs	r2, #64	; 0x40
+   16e56:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16ebc:	615a      	str	r2, [r3, #20]
+   16e58:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16ebe:	4b89      	ldr	r3, [pc, #548]	; (170e4 <ssd1963_init+0x778>)
-   16ec0:	781b      	ldrb	r3, [r3, #0]
-   16ec2:	2b00      	cmp	r3, #0
-   16ec4:	d005      	beq.n	16ed2 <ssd1963_init+0x566>
+   16e5a:	4ba7      	ldr	r3, [pc, #668]	; (170f8 <ssd1963_init+0x78c>)
+   16e5c:	781b      	ldrb	r3, [r3, #0]
+   16e5e:	2b00      	cmp	r3, #0
+   16e60:	d005      	beq.n	16e6e <ssd1963_init+0x502>
 		port_base->OUTSET.reg = pin_mask;
-   16ec6:	3a20      	subs	r2, #32
-   16ec8:	4b87      	ldr	r3, [pc, #540]	; (170e8 <ssd1963_init+0x77c>)
-   16eca:	619a      	str	r2, [r3, #24]
+   16e62:	3a20      	subs	r2, #32
+   16e64:	4ba8      	ldr	r3, [pc, #672]	; (17108 <ssd1963_init+0x79c>)
+   16e66:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16ecc:	2200      	movs	r2, #0
-   16ece:	4b85      	ldr	r3, [pc, #532]	; (170e4 <ssd1963_init+0x778>)
-   16ed0:	701a      	strb	r2, [r3, #0]
+   16e68:	2200      	movs	r2, #0
+   16e6a:	4ba3      	ldr	r3, [pc, #652]	; (170f8 <ssd1963_init+0x78c>)
+   16e6c:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16ed2:	2200      	movs	r2, #0
-   16ed4:	4985      	ldr	r1, [pc, #532]	; (170ec <ssd1963_init+0x780>)
-   16ed6:	4886      	ldr	r0, [pc, #536]	; (170f0 <ssd1963_init+0x784>)
-   16ed8:	4b86      	ldr	r3, [pc, #536]	; (170f4 <ssd1963_init+0x788>)
-   16eda:	4798      	blx	r3
-   16edc:	4b82      	ldr	r3, [pc, #520]	; (170e8 <ssd1963_init+0x77c>)
-   16ede:	2240      	movs	r2, #64	; 0x40
-   16ee0:	619a      	str	r2, [r3, #24]
+   16e6e:	22b6      	movs	r2, #182	; 0xb6
+   16e70:	49a2      	ldr	r1, [pc, #648]	; (170fc <ssd1963_init+0x790>)
+   16e72:	48a3      	ldr	r0, [pc, #652]	; (17100 <ssd1963_init+0x794>)
+   16e74:	4ba3      	ldr	r3, [pc, #652]	; (17104 <ssd1963_init+0x798>)
+   16e76:	4798      	blx	r3
+   16e78:	4ba3      	ldr	r3, [pc, #652]	; (17108 <ssd1963_init+0x79c>)
+   16e7a:	2240      	movs	r2, #64	; 0x40
+   16e7c:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16ee2:	615a      	str	r2, [r3, #20]
+   16e7e:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   16ee4:	4b7f      	ldr	r3, [pc, #508]	; (170e4 <ssd1963_init+0x778>)
-   16ee6:	781b      	ldrb	r3, [r3, #0]
-   16ee8:	2b00      	cmp	r3, #0
-   16eea:	d105      	bne.n	16ef8 <ssd1963_init+0x58c>
-   16eec:	3a20      	subs	r2, #32
-   16eee:	4b7e      	ldr	r3, [pc, #504]	; (170e8 <ssd1963_init+0x77c>)
-   16ef0:	615a      	str	r2, [r3, #20]
+   16e80:	4b9d      	ldr	r3, [pc, #628]	; (170f8 <ssd1963_init+0x78c>)
+   16e82:	781b      	ldrb	r3, [r3, #0]
+   16e84:	2b00      	cmp	r3, #0
+   16e86:	d105      	bne.n	16e94 <ssd1963_init+0x528>
+   16e88:	3a20      	subs	r2, #32
+   16e8a:	4b9f      	ldr	r3, [pc, #636]	; (17108 <ssd1963_init+0x79c>)
+   16e8c:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   16ef2:	3a1f      	subs	r2, #31
-   16ef4:	4b7b      	ldr	r3, [pc, #492]	; (170e4 <ssd1963_init+0x778>)
-   16ef6:	701a      	strb	r2, [r3, #0]
+   16e8e:	3a1f      	subs	r2, #31
+   16e90:	4b99      	ldr	r3, [pc, #612]	; (170f8 <ssd1963_init+0x78c>)
+   16e92:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   16ef8:	22b6      	movs	r2, #182	; 0xb6
-   16efa:	497c      	ldr	r1, [pc, #496]	; (170ec <ssd1963_init+0x780>)
-   16efc:	487c      	ldr	r0, [pc, #496]	; (170f0 <ssd1963_init+0x784>)
-   16efe:	4b7d      	ldr	r3, [pc, #500]	; (170f4 <ssd1963_init+0x788>)
-   16f00:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   16f02:	4b79      	ldr	r3, [pc, #484]	; (170e8 <ssd1963_init+0x77c>)
-   16f04:	2240      	movs	r2, #64	; 0x40
-   16f06:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   16f08:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16f0a:	4b76      	ldr	r3, [pc, #472]	; (170e4 <ssd1963_init+0x778>)
-   16f0c:	781b      	ldrb	r3, [r3, #0]
-   16f0e:	2b00      	cmp	r3, #0
-   16f10:	d005      	beq.n	16f1e <ssd1963_init+0x5b2>
-		port_base->OUTSET.reg = pin_mask;
-   16f12:	3a20      	subs	r2, #32
-   16f14:	4b74      	ldr	r3, [pc, #464]	; (170e8 <ssd1963_init+0x77c>)
-   16f16:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16f18:	2200      	movs	r2, #0
-   16f1a:	4b72      	ldr	r3, [pc, #456]	; (170e4 <ssd1963_init+0x778>)
-   16f1c:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16f1e:	2201      	movs	r2, #1
-   16f20:	4972      	ldr	r1, [pc, #456]	; (170ec <ssd1963_init+0x780>)
-   16f22:	4873      	ldr	r0, [pc, #460]	; (170f0 <ssd1963_init+0x784>)
-   16f24:	4b73      	ldr	r3, [pc, #460]	; (170f4 <ssd1963_init+0x788>)
-   16f26:	4798      	blx	r3
-   16f28:	4b6f      	ldr	r3, [pc, #444]	; (170e8 <ssd1963_init+0x77c>)
-   16f2a:	2240      	movs	r2, #64	; 0x40
-   16f2c:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   16f2e:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   16f30:	4b6c      	ldr	r3, [pc, #432]	; (170e4 <ssd1963_init+0x778>)
-   16f32:	781b      	ldrb	r3, [r3, #0]
-   16f34:	2b00      	cmp	r3, #0
-   16f36:	d005      	beq.n	16f44 <ssd1963_init+0x5d8>
+   16e94:	22b4      	movs	r2, #180	; 0xb4
+   16e96:	4999      	ldr	r1, [pc, #612]	; (170fc <ssd1963_init+0x790>)
+   16e98:	4899      	ldr	r0, [pc, #612]	; (17100 <ssd1963_init+0x794>)
+   16e9a:	4b9a      	ldr	r3, [pc, #616]	; (17104 <ssd1963_init+0x798>)
+   16e9c:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   16f38:	3a20      	subs	r2, #32
-   16f3a:	4b6b      	ldr	r3, [pc, #428]	; (170e8 <ssd1963_init+0x77c>)
-   16f3c:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   16f3e:	2200      	movs	r2, #0
-   16f40:	4b68      	ldr	r3, [pc, #416]	; (170e4 <ssd1963_init+0x778>)
-   16f42:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   16f44:	2220      	movs	r2, #32
-   16f46:	4969      	ldr	r1, [pc, #420]	; (170ec <ssd1963_init+0x780>)
-   16f48:	4869      	ldr	r0, [pc, #420]	; (170f0 <ssd1963_init+0x784>)
-   16f4a:	4b6a      	ldr	r3, [pc, #424]	; (170f4 <ssd1963_init+0x788>)
-   16f4c:	4798      	blx	r3
-   16f4e:	4b66      	ldr	r3, [pc, #408]	; (170e8 <ssd1963_init+0x77c>)
-   16f50:	2240      	movs	r2, #64	; 0x40
-   16f52:	619a      	str	r2, [r3, #24]
+   16e9e:	4b9a      	ldr	r3, [pc, #616]	; (17108 <ssd1963_init+0x79c>)
+   16ea0:	2240      	movs	r2, #64	; 0x40
+   16ea2:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16f54:	615a      	str	r2, [r3, #20]
+   16ea4:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16f56:	4b63      	ldr	r3, [pc, #396]	; (170e4 <ssd1963_init+0x778>)
-   16f58:	781b      	ldrb	r3, [r3, #0]
-   16f5a:	2b00      	cmp	r3, #0
-   16f5c:	d005      	beq.n	16f6a <ssd1963_init+0x5fe>
+   16ea6:	4b94      	ldr	r3, [pc, #592]	; (170f8 <ssd1963_init+0x78c>)
+   16ea8:	781b      	ldrb	r3, [r3, #0]
+   16eaa:	2b00      	cmp	r3, #0
+   16eac:	d005      	beq.n	16eba <ssd1963_init+0x54e>
 		port_base->OUTSET.reg = pin_mask;
-   16f5e:	3a20      	subs	r2, #32
-   16f60:	4b61      	ldr	r3, [pc, #388]	; (170e8 <ssd1963_init+0x77c>)
-   16f62:	619a      	str	r2, [r3, #24]
+   16eae:	3a20      	subs	r2, #32
+   16eb0:	4b95      	ldr	r3, [pc, #596]	; (17108 <ssd1963_init+0x79c>)
+   16eb2:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16f64:	2200      	movs	r2, #0
-   16f66:	4b5f      	ldr	r3, [pc, #380]	; (170e4 <ssd1963_init+0x778>)
-   16f68:	701a      	strb	r2, [r3, #0]
+   16eb4:	2200      	movs	r2, #0
+   16eb6:	4b90      	ldr	r3, [pc, #576]	; (170f8 <ssd1963_init+0x78c>)
+   16eb8:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16f6a:	2201      	movs	r2, #1
-   16f6c:	495f      	ldr	r1, [pc, #380]	; (170ec <ssd1963_init+0x780>)
-   16f6e:	4860      	ldr	r0, [pc, #384]	; (170f0 <ssd1963_init+0x784>)
-   16f70:	4b60      	ldr	r3, [pc, #384]	; (170f4 <ssd1963_init+0x788>)
-   16f72:	4798      	blx	r3
-   16f74:	4b5c      	ldr	r3, [pc, #368]	; (170e8 <ssd1963_init+0x77c>)
-   16f76:	2240      	movs	r2, #64	; 0x40
-   16f78:	619a      	str	r2, [r3, #24]
+   16eba:	2204      	movs	r2, #4
+   16ebc:	498f      	ldr	r1, [pc, #572]	; (170fc <ssd1963_init+0x790>)
+   16ebe:	4890      	ldr	r0, [pc, #576]	; (17100 <ssd1963_init+0x794>)
+   16ec0:	4b90      	ldr	r3, [pc, #576]	; (17104 <ssd1963_init+0x798>)
+   16ec2:	4798      	blx	r3
+   16ec4:	4b90      	ldr	r3, [pc, #576]	; (17108 <ssd1963_init+0x79c>)
+   16ec6:	2240      	movs	r2, #64	; 0x40
+   16ec8:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16f7a:	615a      	str	r2, [r3, #20]
+   16eca:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16f7c:	4b59      	ldr	r3, [pc, #356]	; (170e4 <ssd1963_init+0x778>)
-   16f7e:	781b      	ldrb	r3, [r3, #0]
-   16f80:	2b00      	cmp	r3, #0
-   16f82:	d005      	beq.n	16f90 <ssd1963_init+0x624>
+   16ecc:	4b8a      	ldr	r3, [pc, #552]	; (170f8 <ssd1963_init+0x78c>)
+   16ece:	781b      	ldrb	r3, [r3, #0]
+   16ed0:	2b00      	cmp	r3, #0
+   16ed2:	d005      	beq.n	16ee0 <ssd1963_init+0x574>
 		port_base->OUTSET.reg = pin_mask;
-   16f84:	3a20      	subs	r2, #32
-   16f86:	4b58      	ldr	r3, [pc, #352]	; (170e8 <ssd1963_init+0x77c>)
-   16f88:	619a      	str	r2, [r3, #24]
+   16ed4:	3a20      	subs	r2, #32
+   16ed6:	4b8c      	ldr	r3, [pc, #560]	; (17108 <ssd1963_init+0x79c>)
+   16ed8:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16f8a:	2200      	movs	r2, #0
-   16f8c:	4b55      	ldr	r3, [pc, #340]	; (170e4 <ssd1963_init+0x778>)
-   16f8e:	701a      	strb	r2, [r3, #0]
+   16eda:	2200      	movs	r2, #0
+   16edc:	4b86      	ldr	r3, [pc, #536]	; (170f8 <ssd1963_init+0x78c>)
+   16ede:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16f90:	2210      	movs	r2, #16
-   16f92:	4956      	ldr	r1, [pc, #344]	; (170ec <ssd1963_init+0x780>)
-   16f94:	4856      	ldr	r0, [pc, #344]	; (170f0 <ssd1963_init+0x784>)
-   16f96:	4b57      	ldr	r3, [pc, #348]	; (170f4 <ssd1963_init+0x788>)
-   16f98:	4798      	blx	r3
-   16f9a:	4b53      	ldr	r3, [pc, #332]	; (170e8 <ssd1963_init+0x77c>)
-   16f9c:	2240      	movs	r2, #64	; 0x40
-   16f9e:	619a      	str	r2, [r3, #24]
+   16ee0:	2220      	movs	r2, #32
+   16ee2:	4986      	ldr	r1, [pc, #536]	; (170fc <ssd1963_init+0x790>)
+   16ee4:	4886      	ldr	r0, [pc, #536]	; (17100 <ssd1963_init+0x794>)
+   16ee6:	4b87      	ldr	r3, [pc, #540]	; (17104 <ssd1963_init+0x798>)
+   16ee8:	4798      	blx	r3
+   16eea:	4b87      	ldr	r3, [pc, #540]	; (17108 <ssd1963_init+0x79c>)
+   16eec:	2240      	movs	r2, #64	; 0x40
+   16eee:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16fa0:	615a      	str	r2, [r3, #20]
+   16ef0:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16fa2:	4b50      	ldr	r3, [pc, #320]	; (170e4 <ssd1963_init+0x778>)
-   16fa4:	781b      	ldrb	r3, [r3, #0]
-   16fa6:	2b00      	cmp	r3, #0
-   16fa8:	d005      	beq.n	16fb6 <ssd1963_init+0x64a>
+   16ef2:	4b81      	ldr	r3, [pc, #516]	; (170f8 <ssd1963_init+0x78c>)
+   16ef4:	781b      	ldrb	r3, [r3, #0]
+   16ef6:	2b00      	cmp	r3, #0
+   16ef8:	d005      	beq.n	16f06 <ssd1963_init+0x59a>
 		port_base->OUTSET.reg = pin_mask;
-   16faa:	3a20      	subs	r2, #32
-   16fac:	4b4e      	ldr	r3, [pc, #312]	; (170e8 <ssd1963_init+0x77c>)
-   16fae:	619a      	str	r2, [r3, #24]
+   16efa:	3a20      	subs	r2, #32
+   16efc:	4b82      	ldr	r3, [pc, #520]	; (17108 <ssd1963_init+0x79c>)
+   16efe:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16fb0:	2200      	movs	r2, #0
-   16fb2:	4b4c      	ldr	r3, [pc, #304]	; (170e4 <ssd1963_init+0x778>)
-   16fb4:	701a      	strb	r2, [r3, #0]
+   16f00:	2200      	movs	r2, #0
+   16f02:	4b7d      	ldr	r3, [pc, #500]	; (170f8 <ssd1963_init+0x78c>)
+   16f04:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16fb6:	2208      	movs	r2, #8
-   16fb8:	494c      	ldr	r1, [pc, #304]	; (170ec <ssd1963_init+0x780>)
-   16fba:	484d      	ldr	r0, [pc, #308]	; (170f0 <ssd1963_init+0x784>)
-   16fbc:	4b4d      	ldr	r3, [pc, #308]	; (170f4 <ssd1963_init+0x788>)
-   16fbe:	4798      	blx	r3
-   16fc0:	4b49      	ldr	r3, [pc, #292]	; (170e8 <ssd1963_init+0x77c>)
-   16fc2:	2240      	movs	r2, #64	; 0x40
-   16fc4:	619a      	str	r2, [r3, #24]
+   16f06:	2200      	movs	r2, #0
+   16f08:	497c      	ldr	r1, [pc, #496]	; (170fc <ssd1963_init+0x790>)
+   16f0a:	487d      	ldr	r0, [pc, #500]	; (17100 <ssd1963_init+0x794>)
+   16f0c:	4b7d      	ldr	r3, [pc, #500]	; (17104 <ssd1963_init+0x798>)
+   16f0e:	4798      	blx	r3
+   16f10:	4b7d      	ldr	r3, [pc, #500]	; (17108 <ssd1963_init+0x79c>)
+   16f12:	2240      	movs	r2, #64	; 0x40
+   16f14:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16fc6:	615a      	str	r2, [r3, #20]
+   16f16:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16fc8:	4b46      	ldr	r3, [pc, #280]	; (170e4 <ssd1963_init+0x778>)
-   16fca:	781b      	ldrb	r3, [r3, #0]
-   16fcc:	2b00      	cmp	r3, #0
-   16fce:	d005      	beq.n	16fdc <ssd1963_init+0x670>
+   16f18:	4b77      	ldr	r3, [pc, #476]	; (170f8 <ssd1963_init+0x78c>)
+   16f1a:	781b      	ldrb	r3, [r3, #0]
+   16f1c:	2b00      	cmp	r3, #0
+   16f1e:	d005      	beq.n	16f2c <ssd1963_init+0x5c0>
 		port_base->OUTSET.reg = pin_mask;
-   16fd0:	3a20      	subs	r2, #32
-   16fd2:	4b45      	ldr	r3, [pc, #276]	; (170e8 <ssd1963_init+0x77c>)
-   16fd4:	619a      	str	r2, [r3, #24]
+   16f20:	3a20      	subs	r2, #32
+   16f22:	4b79      	ldr	r3, [pc, #484]	; (17108 <ssd1963_init+0x79c>)
+   16f24:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16fd6:	2200      	movs	r2, #0
-   16fd8:	4b42      	ldr	r3, [pc, #264]	; (170e4 <ssd1963_init+0x778>)
-   16fda:	701a      	strb	r2, [r3, #0]
+   16f26:	2200      	movs	r2, #0
+   16f28:	4b73      	ldr	r3, [pc, #460]	; (170f8 <ssd1963_init+0x78c>)
+   16f2a:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   16fdc:	2200      	movs	r2, #0
-   16fde:	4943      	ldr	r1, [pc, #268]	; (170ec <ssd1963_init+0x780>)
-   16fe0:	4843      	ldr	r0, [pc, #268]	; (170f0 <ssd1963_init+0x784>)
-   16fe2:	4b44      	ldr	r3, [pc, #272]	; (170f4 <ssd1963_init+0x788>)
-   16fe4:	4798      	blx	r3
-   16fe6:	4b40      	ldr	r3, [pc, #256]	; (170e8 <ssd1963_init+0x77c>)
-   16fe8:	2240      	movs	r2, #64	; 0x40
-   16fea:	619a      	str	r2, [r3, #24]
+   16f2c:	2230      	movs	r2, #48	; 0x30
+   16f2e:	4973      	ldr	r1, [pc, #460]	; (170fc <ssd1963_init+0x790>)
+   16f30:	4873      	ldr	r0, [pc, #460]	; (17100 <ssd1963_init+0x794>)
+   16f32:	4b74      	ldr	r3, [pc, #464]	; (17104 <ssd1963_init+0x798>)
+   16f34:	4798      	blx	r3
+   16f36:	4b74      	ldr	r3, [pc, #464]	; (17108 <ssd1963_init+0x79c>)
+   16f38:	2240      	movs	r2, #64	; 0x40
+   16f3a:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   16fec:	615a      	str	r2, [r3, #20]
+   16f3c:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   16fee:	4b3d      	ldr	r3, [pc, #244]	; (170e4 <ssd1963_init+0x778>)
-   16ff0:	781b      	ldrb	r3, [r3, #0]
-   16ff2:	2b00      	cmp	r3, #0
-   16ff4:	d005      	beq.n	17002 <ssd1963_init+0x696>
+   16f3e:	4b6e      	ldr	r3, [pc, #440]	; (170f8 <ssd1963_init+0x78c>)
+   16f40:	781b      	ldrb	r3, [r3, #0]
+   16f42:	2b00      	cmp	r3, #0
+   16f44:	d005      	beq.n	16f52 <ssd1963_init+0x5e6>
 		port_base->OUTSET.reg = pin_mask;
-   16ff6:	3a20      	subs	r2, #32
-   16ff8:	4b3b      	ldr	r3, [pc, #236]	; (170e8 <ssd1963_init+0x77c>)
-   16ffa:	619a      	str	r2, [r3, #24]
+   16f46:	3a20      	subs	r2, #32
+   16f48:	4b6f      	ldr	r3, [pc, #444]	; (17108 <ssd1963_init+0x79c>)
+   16f4a:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   16ffc:	2200      	movs	r2, #0
-   16ffe:	4b39      	ldr	r3, [pc, #228]	; (170e4 <ssd1963_init+0x778>)
-   17000:	701a      	strb	r2, [r3, #0]
+   16f4c:	2200      	movs	r2, #0
+   16f4e:	4b6a      	ldr	r3, [pc, #424]	; (170f8 <ssd1963_init+0x78c>)
+   16f50:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17002:	2208      	movs	r2, #8
-   17004:	4939      	ldr	r1, [pc, #228]	; (170ec <ssd1963_init+0x780>)
-   17006:	483a      	ldr	r0, [pc, #232]	; (170f0 <ssd1963_init+0x784>)
-   17008:	4b3a      	ldr	r3, [pc, #232]	; (170f4 <ssd1963_init+0x788>)
-   1700a:	4798      	blx	r3
-   1700c:	4b36      	ldr	r3, [pc, #216]	; (170e8 <ssd1963_init+0x77c>)
-   1700e:	2240      	movs	r2, #64	; 0x40
-   17010:	619a      	str	r2, [r3, #24]
+   16f52:	2230      	movs	r2, #48	; 0x30
+   16f54:	4969      	ldr	r1, [pc, #420]	; (170fc <ssd1963_init+0x790>)
+   16f56:	486a      	ldr	r0, [pc, #424]	; (17100 <ssd1963_init+0x794>)
+   16f58:	4b6a      	ldr	r3, [pc, #424]	; (17104 <ssd1963_init+0x798>)
+   16f5a:	4798      	blx	r3
+   16f5c:	4b6a      	ldr	r3, [pc, #424]	; (17108 <ssd1963_init+0x79c>)
+   16f5e:	2240      	movs	r2, #64	; 0x40
+   16f60:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17012:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   17014:	4b33      	ldr	r3, [pc, #204]	; (170e4 <ssd1963_init+0x778>)
-   17016:	781b      	ldrb	r3, [r3, #0]
-   17018:	2b00      	cmp	r3, #0
-   1701a:	d105      	bne.n	17028 <ssd1963_init+0x6bc>
-   1701c:	3a20      	subs	r2, #32
-   1701e:	4b32      	ldr	r3, [pc, #200]	; (170e8 <ssd1963_init+0x77c>)
-   17020:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   17022:	3a1f      	subs	r2, #31
-   17024:	4b2f      	ldr	r3, [pc, #188]	; (170e4 <ssd1963_init+0x778>)
-   17026:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   17028:	22b8      	movs	r2, #184	; 0xb8
-   1702a:	4930      	ldr	r1, [pc, #192]	; (170ec <ssd1963_init+0x780>)
-   1702c:	4830      	ldr	r0, [pc, #192]	; (170f0 <ssd1963_init+0x784>)
-   1702e:	4b31      	ldr	r3, [pc, #196]	; (170f4 <ssd1963_init+0x788>)
-   17030:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   17032:	4b2d      	ldr	r3, [pc, #180]	; (170e8 <ssd1963_init+0x77c>)
-   17034:	2240      	movs	r2, #64	; 0x40
-   17036:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   17038:	615a      	str	r2, [r3, #20]
+   16f62:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   1703a:	4b2a      	ldr	r3, [pc, #168]	; (170e4 <ssd1963_init+0x778>)
-   1703c:	781b      	ldrb	r3, [r3, #0]
-   1703e:	2b00      	cmp	r3, #0
-   17040:	d005      	beq.n	1704e <ssd1963_init+0x6e2>
+   16f64:	4b64      	ldr	r3, [pc, #400]	; (170f8 <ssd1963_init+0x78c>)
+   16f66:	781b      	ldrb	r3, [r3, #0]
+   16f68:	2b00      	cmp	r3, #0
+   16f6a:	d005      	beq.n	16f78 <ssd1963_init+0x60c>
 		port_base->OUTSET.reg = pin_mask;
-   17042:	3a20      	subs	r2, #32
-   17044:	4b28      	ldr	r3, [pc, #160]	; (170e8 <ssd1963_init+0x77c>)
-   17046:	619a      	str	r2, [r3, #24]
+   16f6c:	3a20      	subs	r2, #32
+   16f6e:	4b66      	ldr	r3, [pc, #408]	; (17108 <ssd1963_init+0x79c>)
+   16f70:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17048:	2200      	movs	r2, #0
-   1704a:	4b26      	ldr	r3, [pc, #152]	; (170e4 <ssd1963_init+0x778>)
-   1704c:	701a      	strb	r2, [r3, #0]
+   16f72:	2200      	movs	r2, #0
+   16f74:	4b60      	ldr	r3, [pc, #384]	; (170f8 <ssd1963_init+0x78c>)
+   16f76:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   1704e:	220f      	movs	r2, #15
-   17050:	4926      	ldr	r1, [pc, #152]	; (170ec <ssd1963_init+0x780>)
-   17052:	4827      	ldr	r0, [pc, #156]	; (170f0 <ssd1963_init+0x784>)
-   17054:	4b27      	ldr	r3, [pc, #156]	; (170f4 <ssd1963_init+0x788>)
-   17056:	4798      	blx	r3
-   17058:	4b23      	ldr	r3, [pc, #140]	; (170e8 <ssd1963_init+0x77c>)
-   1705a:	2240      	movs	r2, #64	; 0x40
-   1705c:	619a      	str	r2, [r3, #24]
+   16f78:	2200      	movs	r2, #0
+   16f7a:	4960      	ldr	r1, [pc, #384]	; (170fc <ssd1963_init+0x790>)
+   16f7c:	4860      	ldr	r0, [pc, #384]	; (17100 <ssd1963_init+0x794>)
+   16f7e:	4b61      	ldr	r3, [pc, #388]	; (17104 <ssd1963_init+0x798>)
+   16f80:	4798      	blx	r3
+   16f82:	4b61      	ldr	r3, [pc, #388]	; (17108 <ssd1963_init+0x79c>)
+   16f84:	2240      	movs	r2, #64	; 0x40
+   16f86:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   1705e:	615a      	str	r2, [r3, #20]
+   16f88:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17060:	4b20      	ldr	r3, [pc, #128]	; (170e4 <ssd1963_init+0x778>)
-   17062:	781b      	ldrb	r3, [r3, #0]
-   17064:	2b00      	cmp	r3, #0
-   17066:	d005      	beq.n	17074 <ssd1963_init+0x708>
+   16f8a:	4b5b      	ldr	r3, [pc, #364]	; (170f8 <ssd1963_init+0x78c>)
+   16f8c:	781b      	ldrb	r3, [r3, #0]
+   16f8e:	2b00      	cmp	r3, #0
+   16f90:	d005      	beq.n	16f9e <ssd1963_init+0x632>
 		port_base->OUTSET.reg = pin_mask;
-   17068:	3a20      	subs	r2, #32
-   1706a:	4b1f      	ldr	r3, [pc, #124]	; (170e8 <ssd1963_init+0x77c>)
-   1706c:	619a      	str	r2, [r3, #24]
+   16f92:	3a20      	subs	r2, #32
+   16f94:	4b5c      	ldr	r3, [pc, #368]	; (17108 <ssd1963_init+0x79c>)
+   16f96:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   1706e:	2200      	movs	r2, #0
-   17070:	4b1c      	ldr	r3, [pc, #112]	; (170e4 <ssd1963_init+0x778>)
-   17072:	701a      	strb	r2, [r3, #0]
+   16f98:	2200      	movs	r2, #0
+   16f9a:	4b57      	ldr	r3, [pc, #348]	; (170f8 <ssd1963_init+0x78c>)
+   16f9c:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17074:	2201      	movs	r2, #1
-   17076:	491d      	ldr	r1, [pc, #116]	; (170ec <ssd1963_init+0x780>)
-   17078:	481d      	ldr	r0, [pc, #116]	; (170f0 <ssd1963_init+0x784>)
-   1707a:	4b1e      	ldr	r3, [pc, #120]	; (170f4 <ssd1963_init+0x788>)
-   1707c:	4798      	blx	r3
-   1707e:	4b1a      	ldr	r3, [pc, #104]	; (170e8 <ssd1963_init+0x77c>)
-   17080:	2240      	movs	r2, #64	; 0x40
-   17082:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   17084:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   17086:	4b17      	ldr	r3, [pc, #92]	; (170e4 <ssd1963_init+0x778>)
-   17088:	781b      	ldrb	r3, [r3, #0]
-   1708a:	2b00      	cmp	r3, #0
-   1708c:	d105      	bne.n	1709a <ssd1963_init+0x72e>
-   1708e:	3a20      	subs	r2, #32
-   17090:	4b15      	ldr	r3, [pc, #84]	; (170e8 <ssd1963_init+0x77c>)
-   17092:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   17094:	3a1f      	subs	r2, #31
-   17096:	4b13      	ldr	r3, [pc, #76]	; (170e4 <ssd1963_init+0x778>)
-   17098:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   1709a:	22ba      	movs	r2, #186	; 0xba
-   1709c:	4913      	ldr	r1, [pc, #76]	; (170ec <ssd1963_init+0x780>)
-   1709e:	4814      	ldr	r0, [pc, #80]	; (170f0 <ssd1963_init+0x784>)
-   170a0:	4b14      	ldr	r3, [pc, #80]	; (170f4 <ssd1963_init+0x788>)
-   170a2:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   170a4:	4b10      	ldr	r3, [pc, #64]	; (170e8 <ssd1963_init+0x77c>)
-   170a6:	2240      	movs	r2, #64	; 0x40
-   170a8:	619a      	str	r2, [r3, #24]
+   16f9e:	2200      	movs	r2, #0
+   16fa0:	4956      	ldr	r1, [pc, #344]	; (170fc <ssd1963_init+0x790>)
+   16fa2:	4857      	ldr	r0, [pc, #348]	; (17100 <ssd1963_init+0x794>)
+   16fa4:	4b57      	ldr	r3, [pc, #348]	; (17104 <ssd1963_init+0x798>)
+   16fa6:	4798      	blx	r3
+   16fa8:	4b57      	ldr	r3, [pc, #348]	; (17108 <ssd1963_init+0x79c>)
+   16faa:	2240      	movs	r2, #64	; 0x40
+   16fac:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   170aa:	615a      	str	r2, [r3, #20]
+   16fae:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   170ac:	4b0d      	ldr	r3, [pc, #52]	; (170e4 <ssd1963_init+0x778>)
-   170ae:	781b      	ldrb	r3, [r3, #0]
-   170b0:	2b00      	cmp	r3, #0
-   170b2:	d005      	beq.n	170c0 <ssd1963_init+0x754>
+   16fb0:	4b51      	ldr	r3, [pc, #324]	; (170f8 <ssd1963_init+0x78c>)
+   16fb2:	781b      	ldrb	r3, [r3, #0]
+   16fb4:	2b00      	cmp	r3, #0
+   16fb6:	d005      	beq.n	16fc4 <ssd1963_init+0x658>
 		port_base->OUTSET.reg = pin_mask;
-   170b4:	3a20      	subs	r2, #32
-   170b6:	4b0c      	ldr	r3, [pc, #48]	; (170e8 <ssd1963_init+0x77c>)
-   170b8:	619a      	str	r2, [r3, #24]
+   16fb8:	3a20      	subs	r2, #32
+   16fba:	4b53      	ldr	r3, [pc, #332]	; (17108 <ssd1963_init+0x79c>)
+   16fbc:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   170ba:	2200      	movs	r2, #0
-   170bc:	4b09      	ldr	r3, [pc, #36]	; (170e4 <ssd1963_init+0x778>)
-   170be:	701a      	strb	r2, [r3, #0]
+   16fbe:	2200      	movs	r2, #0
+   16fc0:	4b4d      	ldr	r3, [pc, #308]	; (170f8 <ssd1963_init+0x78c>)
+   16fc2:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   170c0:	2201      	movs	r2, #1
-   170c2:	490a      	ldr	r1, [pc, #40]	; (170ec <ssd1963_init+0x780>)
-   170c4:	480a      	ldr	r0, [pc, #40]	; (170f0 <ssd1963_init+0x784>)
-   170c6:	4b0b      	ldr	r3, [pc, #44]	; (170f4 <ssd1963_init+0x788>)
-   170c8:	4798      	blx	r3
-   170ca:	4b07      	ldr	r3, [pc, #28]	; (170e8 <ssd1963_init+0x77c>)
-   170cc:	2240      	movs	r2, #64	; 0x40
-   170ce:	619a      	str	r2, [r3, #24]
+   16fc4:	2200      	movs	r2, #0
+   16fc6:	494d      	ldr	r1, [pc, #308]	; (170fc <ssd1963_init+0x790>)
+   16fc8:	484d      	ldr	r0, [pc, #308]	; (17100 <ssd1963_init+0x794>)
+   16fca:	4b4e      	ldr	r3, [pc, #312]	; (17104 <ssd1963_init+0x798>)
+   16fcc:	4798      	blx	r3
+   16fce:	4b4e      	ldr	r3, [pc, #312]	; (17108 <ssd1963_init+0x79c>)
+   16fd0:	2240      	movs	r2, #64	; 0x40
+   16fd2:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   170d0:	615a      	str	r2, [r3, #20]
+   16fd4:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   170d2:	4b04      	ldr	r3, [pc, #16]	; (170e4 <ssd1963_init+0x778>)
-   170d4:	781b      	ldrb	r3, [r3, #0]
-   170d6:	2b00      	cmp	r3, #0
-   170d8:	d11a      	bne.n	17110 <ssd1963_init+0x7a4>
-   170da:	3a20      	subs	r2, #32
-   170dc:	4b02      	ldr	r3, [pc, #8]	; (170e8 <ssd1963_init+0x77c>)
-   170de:	615a      	str	r2, [r3, #20]
+   16fd6:	4b48      	ldr	r3, [pc, #288]	; (170f8 <ssd1963_init+0x78c>)
+   16fd8:	781b      	ldrb	r3, [r3, #0]
+   16fda:	2b00      	cmp	r3, #0
+   16fdc:	d105      	bne.n	16fea <ssd1963_init+0x67e>
+   16fde:	3a20      	subs	r2, #32
+   16fe0:	4b49      	ldr	r3, [pc, #292]	; (17108 <ssd1963_init+0x79c>)
+   16fe2:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   170e0:	3a1f      	subs	r2, #31
-   170e2:	e013      	b.n	1710c <ssd1963_init+0x7a0>
-   170e4:	2000005c 	.word	0x2000005c
-   170e8:	41004400 	.word	0x41004400
-   170ec:	1c03c3f7 	.word	0x1c03c3f7
-   170f0:	41004480 	.word	0x41004480
-   170f4:	00017815 	.word	0x00017815
-   170f8:	000010cd 	.word	0x000010cd
-   170fc:	00001b57 	.word	0x00001b57
-   17100:	00001b58 	.word	0x00001b58
-   17104:	00017cdd 	.word	0x00017cdd
-   17108:	20000001 	.word	0x20000001
-   1710c:	4bd4      	ldr	r3, [pc, #848]	; (17460 <ssd1963_init+0xaf4>)
-   1710e:	701a      	strb	r2, [r3, #0]
+   16fe4:	3a1f      	subs	r2, #31
+   16fe6:	4b44      	ldr	r3, [pc, #272]	; (170f8 <ssd1963_init+0x78c>)
+   16fe8:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   17110:	2236      	movs	r2, #54	; 0x36
-   17112:	49d4      	ldr	r1, [pc, #848]	; (17464 <ssd1963_init+0xaf8>)
-   17114:	48d4      	ldr	r0, [pc, #848]	; (17468 <ssd1963_init+0xafc>)
-   17116:	4bd5      	ldr	r3, [pc, #852]	; (1746c <ssd1963_init+0xb00>)
-   17118:	4798      	blx	r3
+   16fea:	22b6      	movs	r2, #182	; 0xb6
+   16fec:	4943      	ldr	r1, [pc, #268]	; (170fc <ssd1963_init+0x790>)
+   16fee:	4844      	ldr	r0, [pc, #272]	; (17100 <ssd1963_init+0x794>)
+   16ff0:	4b44      	ldr	r3, [pc, #272]	; (17104 <ssd1963_init+0x798>)
+   16ff2:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   1711a:	4bd5      	ldr	r3, [pc, #852]	; (17470 <ssd1963_init+0xb04>)
-   1711c:	2240      	movs	r2, #64	; 0x40
-   1711e:	619a      	str	r2, [r3, #24]
+   16ff4:	4b44      	ldr	r3, [pc, #272]	; (17108 <ssd1963_init+0x79c>)
+   16ff6:	2240      	movs	r2, #64	; 0x40
+   16ff8:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17120:	615a      	str	r2, [r3, #20]
+   16ffa:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17122:	4bcf      	ldr	r3, [pc, #828]	; (17460 <ssd1963_init+0xaf4>)
-   17124:	781b      	ldrb	r3, [r3, #0]
-   17126:	2b00      	cmp	r3, #0
-   17128:	d005      	beq.n	17136 <ssd1963_init+0x7ca>
+   16ffc:	4b3e      	ldr	r3, [pc, #248]	; (170f8 <ssd1963_init+0x78c>)
+   16ffe:	781b      	ldrb	r3, [r3, #0]
+   17000:	2b00      	cmp	r3, #0
+   17002:	d005      	beq.n	17010 <ssd1963_init+0x6a4>
 		port_base->OUTSET.reg = pin_mask;
-   1712a:	3a20      	subs	r2, #32
-   1712c:	4bd0      	ldr	r3, [pc, #832]	; (17470 <ssd1963_init+0xb04>)
-   1712e:	619a      	str	r2, [r3, #24]
+   17004:	3a20      	subs	r2, #32
+   17006:	4b40      	ldr	r3, [pc, #256]	; (17108 <ssd1963_init+0x79c>)
+   17008:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17130:	2200      	movs	r2, #0
-   17132:	4bcb      	ldr	r3, [pc, #812]	; (17460 <ssd1963_init+0xaf4>)
-   17134:	701a      	strb	r2, [r3, #0]
+   1700a:	2200      	movs	r2, #0
+   1700c:	4b3a      	ldr	r3, [pc, #232]	; (170f8 <ssd1963_init+0x78c>)
+   1700e:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17136:	2208      	movs	r2, #8
-   17138:	49ca      	ldr	r1, [pc, #808]	; (17464 <ssd1963_init+0xaf8>)
-   1713a:	48cb      	ldr	r0, [pc, #812]	; (17468 <ssd1963_init+0xafc>)
-   1713c:	4bcb      	ldr	r3, [pc, #812]	; (1746c <ssd1963_init+0xb00>)
-   1713e:	4798      	blx	r3
-   17140:	4bcb      	ldr	r3, [pc, #812]	; (17470 <ssd1963_init+0xb04>)
-   17142:	2240      	movs	r2, #64	; 0x40
-   17144:	619a      	str	r2, [r3, #24]
+   17010:	2202      	movs	r2, #2
+   17012:	493a      	ldr	r1, [pc, #232]	; (170fc <ssd1963_init+0x790>)
+   17014:	483a      	ldr	r0, [pc, #232]	; (17100 <ssd1963_init+0x794>)
+   17016:	4b3b      	ldr	r3, [pc, #236]	; (17104 <ssd1963_init+0x798>)
+   17018:	4798      	blx	r3
+   1701a:	4b3b      	ldr	r3, [pc, #236]	; (17108 <ssd1963_init+0x79c>)
+   1701c:	2240      	movs	r2, #64	; 0x40
+   1701e:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17146:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   17148:	4bc5      	ldr	r3, [pc, #788]	; (17460 <ssd1963_init+0xaf4>)
-   1714a:	781b      	ldrb	r3, [r3, #0]
-   1714c:	2b00      	cmp	r3, #0
-   1714e:	d105      	bne.n	1715c <ssd1963_init+0x7f0>
-   17150:	3a20      	subs	r2, #32
-   17152:	4bc7      	ldr	r3, [pc, #796]	; (17470 <ssd1963_init+0xb04>)
-   17154:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   17156:	3a1f      	subs	r2, #31
-   17158:	4bc1      	ldr	r3, [pc, #772]	; (17460 <ssd1963_init+0xaf4>)
-   1715a:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   1715c:	223a      	movs	r2, #58	; 0x3a
-   1715e:	49c1      	ldr	r1, [pc, #772]	; (17464 <ssd1963_init+0xaf8>)
-   17160:	48c1      	ldr	r0, [pc, #772]	; (17468 <ssd1963_init+0xafc>)
-   17162:	4bc2      	ldr	r3, [pc, #776]	; (1746c <ssd1963_init+0xb00>)
-   17164:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   17166:	4bc2      	ldr	r3, [pc, #776]	; (17470 <ssd1963_init+0xb04>)
-   17168:	2240      	movs	r2, #64	; 0x40
-   1716a:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   1716c:	615a      	str	r2, [r3, #20]
+   17020:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   1716e:	4bbc      	ldr	r3, [pc, #752]	; (17460 <ssd1963_init+0xaf4>)
-   17170:	781b      	ldrb	r3, [r3, #0]
-   17172:	2b00      	cmp	r3, #0
-   17174:	d005      	beq.n	17182 <ssd1963_init+0x816>
+   17022:	4b35      	ldr	r3, [pc, #212]	; (170f8 <ssd1963_init+0x78c>)
+   17024:	781b      	ldrb	r3, [r3, #0]
+   17026:	2b00      	cmp	r3, #0
+   17028:	d005      	beq.n	17036 <ssd1963_init+0x6ca>
 		port_base->OUTSET.reg = pin_mask;
-   17176:	3a20      	subs	r2, #32
-   17178:	4bbd      	ldr	r3, [pc, #756]	; (17470 <ssd1963_init+0xb04>)
-   1717a:	619a      	str	r2, [r3, #24]
+   1702a:	3a20      	subs	r2, #32
+   1702c:	4b36      	ldr	r3, [pc, #216]	; (17108 <ssd1963_init+0x79c>)
+   1702e:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   1717c:	2200      	movs	r2, #0
-   1717e:	4bb8      	ldr	r3, [pc, #736]	; (17460 <ssd1963_init+0xaf4>)
-   17180:	701a      	strb	r2, [r3, #0]
+   17030:	2200      	movs	r2, #0
+   17032:	4b31      	ldr	r3, [pc, #196]	; (170f8 <ssd1963_init+0x78c>)
+   17034:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17182:	2250      	movs	r2, #80	; 0x50
-   17184:	49b7      	ldr	r1, [pc, #732]	; (17464 <ssd1963_init+0xaf8>)
-   17186:	48b8      	ldr	r0, [pc, #736]	; (17468 <ssd1963_init+0xafc>)
-   17188:	4bb8      	ldr	r3, [pc, #736]	; (1746c <ssd1963_init+0xb00>)
-   1718a:	4798      	blx	r3
-   1718c:	4bb8      	ldr	r3, [pc, #736]	; (17470 <ssd1963_init+0xb04>)
-   1718e:	2240      	movs	r2, #64	; 0x40
-   17190:	619a      	str	r2, [r3, #24]
+   17036:	220d      	movs	r2, #13
+   17038:	4930      	ldr	r1, [pc, #192]	; (170fc <ssd1963_init+0x790>)
+   1703a:	4831      	ldr	r0, [pc, #196]	; (17100 <ssd1963_init+0x794>)
+   1703c:	4b31      	ldr	r3, [pc, #196]	; (17104 <ssd1963_init+0x798>)
+   1703e:	4798      	blx	r3
+   17040:	4b31      	ldr	r3, [pc, #196]	; (17108 <ssd1963_init+0x79c>)
+   17042:	2240      	movs	r2, #64	; 0x40
+   17044:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17192:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   17194:	4bb2      	ldr	r3, [pc, #712]	; (17460 <ssd1963_init+0xaf4>)
-   17196:	781b      	ldrb	r3, [r3, #0]
-   17198:	2b00      	cmp	r3, #0
-   1719a:	d105      	bne.n	171a8 <ssd1963_init+0x83c>
-   1719c:	3a20      	subs	r2, #32
-   1719e:	4bb4      	ldr	r3, [pc, #720]	; (17470 <ssd1963_init+0xb04>)
-   171a0:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   171a2:	3a1f      	subs	r2, #31
-   171a4:	4bae      	ldr	r3, [pc, #696]	; (17460 <ssd1963_init+0xaf4>)
-   171a6:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   171a8:	22f0      	movs	r2, #240	; 0xf0
-   171aa:	49ae      	ldr	r1, [pc, #696]	; (17464 <ssd1963_init+0xaf8>)
-   171ac:	48ae      	ldr	r0, [pc, #696]	; (17468 <ssd1963_init+0xafc>)
-   171ae:	4baf      	ldr	r3, [pc, #700]	; (1746c <ssd1963_init+0xb00>)
-   171b0:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   171b2:	4baf      	ldr	r3, [pc, #700]	; (17470 <ssd1963_init+0xb04>)
-   171b4:	2240      	movs	r2, #64	; 0x40
-   171b6:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   171b8:	615a      	str	r2, [r3, #20]
+   17046:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   171ba:	4ba9      	ldr	r3, [pc, #676]	; (17460 <ssd1963_init+0xaf4>)
-   171bc:	781b      	ldrb	r3, [r3, #0]
-   171be:	2b00      	cmp	r3, #0
-   171c0:	d005      	beq.n	171ce <ssd1963_init+0x862>
+   17048:	4b2b      	ldr	r3, [pc, #172]	; (170f8 <ssd1963_init+0x78c>)
+   1704a:	781b      	ldrb	r3, [r3, #0]
+   1704c:	2b00      	cmp	r3, #0
+   1704e:	d005      	beq.n	1705c <ssd1963_init+0x6f0>
 		port_base->OUTSET.reg = pin_mask;
-   171c2:	3a20      	subs	r2, #32
-   171c4:	4baa      	ldr	r3, [pc, #680]	; (17470 <ssd1963_init+0xb04>)
-   171c6:	619a      	str	r2, [r3, #24]
+   17050:	3a20      	subs	r2, #32
+   17052:	4b2d      	ldr	r3, [pc, #180]	; (17108 <ssd1963_init+0x79c>)
+   17054:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   171c8:	2200      	movs	r2, #0
-   171ca:	4ba5      	ldr	r3, [pc, #660]	; (17460 <ssd1963_init+0xaf4>)
-   171cc:	701a      	strb	r2, [r3, #0]
+   17056:	2200      	movs	r2, #0
+   17058:	4b27      	ldr	r3, [pc, #156]	; (170f8 <ssd1963_init+0x78c>)
+   1705a:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   171ce:	2203      	movs	r2, #3
-   171d0:	49a4      	ldr	r1, [pc, #656]	; (17464 <ssd1963_init+0xaf8>)
-   171d2:	48a5      	ldr	r0, [pc, #660]	; (17468 <ssd1963_init+0xafc>)
-   171d4:	4ba5      	ldr	r3, [pc, #660]	; (1746c <ssd1963_init+0xb00>)
-   171d6:	4798      	blx	r3
-   171d8:	4ba5      	ldr	r3, [pc, #660]	; (17470 <ssd1963_init+0xb04>)
-   171da:	2240      	movs	r2, #64	; 0x40
-   171dc:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   171de:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   171e0:	4b9f      	ldr	r3, [pc, #636]	; (17460 <ssd1963_init+0xaf4>)
-   171e2:	781b      	ldrb	r3, [r3, #0]
-   171e4:	2b00      	cmp	r3, #0
-   171e6:	d105      	bne.n	171f4 <ssd1963_init+0x888>
-   171e8:	3a20      	subs	r2, #32
-   171ea:	4ba1      	ldr	r3, [pc, #644]	; (17470 <ssd1963_init+0xb04>)
-   171ec:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   171ee:	3a1f      	subs	r2, #31
-   171f0:	4b9b      	ldr	r3, [pc, #620]	; (17460 <ssd1963_init+0xaf4>)
-   171f2:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   171f4:	22bc      	movs	r2, #188	; 0xbc
-   171f6:	499b      	ldr	r1, [pc, #620]	; (17464 <ssd1963_init+0xaf8>)
-   171f8:	489b      	ldr	r0, [pc, #620]	; (17468 <ssd1963_init+0xafc>)
-   171fa:	4b9c      	ldr	r3, [pc, #624]	; (1746c <ssd1963_init+0xb00>)
-   171fc:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   171fe:	4b9c      	ldr	r3, [pc, #624]	; (17470 <ssd1963_init+0xb04>)
-   17200:	2240      	movs	r2, #64	; 0x40
-   17202:	619a      	str	r2, [r3, #24]
+   1705c:	2200      	movs	r2, #0
+   1705e:	4927      	ldr	r1, [pc, #156]	; (170fc <ssd1963_init+0x790>)
+   17060:	4827      	ldr	r0, [pc, #156]	; (17100 <ssd1963_init+0x794>)
+   17062:	4b28      	ldr	r3, [pc, #160]	; (17104 <ssd1963_init+0x798>)
+   17064:	4798      	blx	r3
+   17066:	4b28      	ldr	r3, [pc, #160]	; (17108 <ssd1963_init+0x79c>)
+   17068:	2240      	movs	r2, #64	; 0x40
+   1706a:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17204:	615a      	str	r2, [r3, #20]
+   1706c:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17206:	4b96      	ldr	r3, [pc, #600]	; (17460 <ssd1963_init+0xaf4>)
-   17208:	781b      	ldrb	r3, [r3, #0]
-   1720a:	2b00      	cmp	r3, #0
-   1720c:	d005      	beq.n	1721a <ssd1963_init+0x8ae>
+   1706e:	4b22      	ldr	r3, [pc, #136]	; (170f8 <ssd1963_init+0x78c>)
+   17070:	781b      	ldrb	r3, [r3, #0]
+   17072:	2b00      	cmp	r3, #0
+   17074:	d005      	beq.n	17082 <ssd1963_init+0x716>
 		port_base->OUTSET.reg = pin_mask;
-   1720e:	3a20      	subs	r2, #32
-   17210:	4b97      	ldr	r3, [pc, #604]	; (17470 <ssd1963_init+0xb04>)
-   17212:	619a      	str	r2, [r3, #24]
+   17076:	3a20      	subs	r2, #32
+   17078:	4b23      	ldr	r3, [pc, #140]	; (17108 <ssd1963_init+0x79c>)
+   1707a:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17214:	2200      	movs	r2, #0
-   17216:	4b92      	ldr	r3, [pc, #584]	; (17460 <ssd1963_init+0xaf4>)
-   17218:	701a      	strb	r2, [r3, #0]
+   1707c:	2200      	movs	r2, #0
+   1707e:	4b1e      	ldr	r3, [pc, #120]	; (170f8 <ssd1963_init+0x78c>)
+   17080:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   1721a:	2240      	movs	r2, #64	; 0x40
-   1721c:	4991      	ldr	r1, [pc, #580]	; (17464 <ssd1963_init+0xaf8>)
-   1721e:	4892      	ldr	r0, [pc, #584]	; (17468 <ssd1963_init+0xafc>)
-   17220:	4b92      	ldr	r3, [pc, #584]	; (1746c <ssd1963_init+0xb00>)
-   17222:	4798      	blx	r3
-   17224:	4b92      	ldr	r3, [pc, #584]	; (17470 <ssd1963_init+0xb04>)
-   17226:	2240      	movs	r2, #64	; 0x40
-   17228:	619a      	str	r2, [r3, #24]
+   17082:	2216      	movs	r2, #22
+   17084:	491d      	ldr	r1, [pc, #116]	; (170fc <ssd1963_init+0x790>)
+   17086:	481e      	ldr	r0, [pc, #120]	; (17100 <ssd1963_init+0x794>)
+   17088:	4b1e      	ldr	r3, [pc, #120]	; (17104 <ssd1963_init+0x798>)
+   1708a:	4798      	blx	r3
+   1708c:	4b1e      	ldr	r3, [pc, #120]	; (17108 <ssd1963_init+0x79c>)
+   1708e:	2240      	movs	r2, #64	; 0x40
+   17090:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   1722a:	615a      	str	r2, [r3, #20]
+   17092:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   1722c:	4b8c      	ldr	r3, [pc, #560]	; (17460 <ssd1963_init+0xaf4>)
-   1722e:	781b      	ldrb	r3, [r3, #0]
-   17230:	2b00      	cmp	r3, #0
-   17232:	d005      	beq.n	17240 <ssd1963_init+0x8d4>
+   17094:	4b18      	ldr	r3, [pc, #96]	; (170f8 <ssd1963_init+0x78c>)
+   17096:	781b      	ldrb	r3, [r3, #0]
+   17098:	2b00      	cmp	r3, #0
+   1709a:	d005      	beq.n	170a8 <ssd1963_init+0x73c>
 		port_base->OUTSET.reg = pin_mask;
-   17234:	3a20      	subs	r2, #32
-   17236:	4b8e      	ldr	r3, [pc, #568]	; (17470 <ssd1963_init+0xb04>)
-   17238:	619a      	str	r2, [r3, #24]
+   1709c:	3a20      	subs	r2, #32
+   1709e:	4b1a      	ldr	r3, [pc, #104]	; (17108 <ssd1963_init+0x79c>)
+   170a0:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   1723a:	2200      	movs	r2, #0
-   1723c:	4b88      	ldr	r3, [pc, #544]	; (17460 <ssd1963_init+0xaf4>)
-   1723e:	701a      	strb	r2, [r3, #0]
+   170a2:	2200      	movs	r2, #0
+   170a4:	4b14      	ldr	r3, [pc, #80]	; (170f8 <ssd1963_init+0x78c>)
+   170a6:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17240:	2280      	movs	r2, #128	; 0x80
-   17242:	4988      	ldr	r1, [pc, #544]	; (17464 <ssd1963_init+0xaf8>)
-   17244:	4888      	ldr	r0, [pc, #544]	; (17468 <ssd1963_init+0xafc>)
-   17246:	4b89      	ldr	r3, [pc, #548]	; (1746c <ssd1963_init+0xb00>)
-   17248:	4798      	blx	r3
-   1724a:	4b89      	ldr	r3, [pc, #548]	; (17470 <ssd1963_init+0xb04>)
-   1724c:	2240      	movs	r2, #64	; 0x40
-   1724e:	619a      	str	r2, [r3, #24]
+   170a8:	2204      	movs	r2, #4
+   170aa:	4914      	ldr	r1, [pc, #80]	; (170fc <ssd1963_init+0x790>)
+   170ac:	4814      	ldr	r0, [pc, #80]	; (17100 <ssd1963_init+0x794>)
+   170ae:	4b15      	ldr	r3, [pc, #84]	; (17104 <ssd1963_init+0x798>)
+   170b0:	4798      	blx	r3
+   170b2:	4b15      	ldr	r3, [pc, #84]	; (17108 <ssd1963_init+0x79c>)
+   170b4:	2240      	movs	r2, #64	; 0x40
+   170b6:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17250:	615a      	str	r2, [r3, #20]
+   170b8:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17252:	4b83      	ldr	r3, [pc, #524]	; (17460 <ssd1963_init+0xaf4>)
-   17254:	781b      	ldrb	r3, [r3, #0]
-   17256:	2b00      	cmp	r3, #0
-   17258:	d005      	beq.n	17266 <ssd1963_init+0x8fa>
+   170ba:	4b0f      	ldr	r3, [pc, #60]	; (170f8 <ssd1963_init+0x78c>)
+   170bc:	781b      	ldrb	r3, [r3, #0]
+   170be:	2b00      	cmp	r3, #0
+   170c0:	d005      	beq.n	170ce <ssd1963_init+0x762>
 		port_base->OUTSET.reg = pin_mask;
-   1725a:	3a20      	subs	r2, #32
-   1725c:	4b84      	ldr	r3, [pc, #528]	; (17470 <ssd1963_init+0xb04>)
-   1725e:	619a      	str	r2, [r3, #24]
+   170c2:	3a20      	subs	r2, #32
+   170c4:	4b10      	ldr	r3, [pc, #64]	; (17108 <ssd1963_init+0x79c>)
+   170c6:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17260:	2200      	movs	r2, #0
-   17262:	4b7f      	ldr	r3, [pc, #508]	; (17460 <ssd1963_init+0xaf4>)
-   17264:	701a      	strb	r2, [r3, #0]
+   170c8:	2200      	movs	r2, #0
+   170ca:	4b0b      	ldr	r3, [pc, #44]	; (170f8 <ssd1963_init+0x78c>)
+   170cc:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17266:	2240      	movs	r2, #64	; 0x40
-   17268:	497e      	ldr	r1, [pc, #504]	; (17464 <ssd1963_init+0xaf8>)
-   1726a:	487f      	ldr	r0, [pc, #508]	; (17468 <ssd1963_init+0xafc>)
-   1726c:	4b7f      	ldr	r3, [pc, #508]	; (1746c <ssd1963_init+0xb00>)
-   1726e:	4798      	blx	r3
-   17270:	4b7f      	ldr	r3, [pc, #508]	; (17470 <ssd1963_init+0xb04>)
-   17272:	2240      	movs	r2, #64	; 0x40
-   17274:	619a      	str	r2, [r3, #24]
+   170ce:	2200      	movs	r2, #0
+   170d0:	490a      	ldr	r1, [pc, #40]	; (170fc <ssd1963_init+0x790>)
+   170d2:	480b      	ldr	r0, [pc, #44]	; (17100 <ssd1963_init+0x794>)
+   170d4:	4b0b      	ldr	r3, [pc, #44]	; (17104 <ssd1963_init+0x798>)
+   170d6:	4798      	blx	r3
+   170d8:	4b0b      	ldr	r3, [pc, #44]	; (17108 <ssd1963_init+0x79c>)
+   170da:	2240      	movs	r2, #64	; 0x40
+   170dc:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17276:	615a      	str	r2, [r3, #20]
+   170de:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17278:	4b79      	ldr	r3, [pc, #484]	; (17460 <ssd1963_init+0xaf4>)
-   1727a:	781b      	ldrb	r3, [r3, #0]
-   1727c:	2b00      	cmp	r3, #0
-   1727e:	d005      	beq.n	1728c <ssd1963_init+0x920>
+   170e0:	4b05      	ldr	r3, [pc, #20]	; (170f8 <ssd1963_init+0x78c>)
+   170e2:	781b      	ldrb	r3, [r3, #0]
+   170e4:	2b00      	cmp	r3, #0
+   170e6:	d011      	beq.n	1710c <ssd1963_init+0x7a0>
 		port_base->OUTSET.reg = pin_mask;
-   17280:	3a20      	subs	r2, #32
-   17282:	4b7b      	ldr	r3, [pc, #492]	; (17470 <ssd1963_init+0xb04>)
-   17284:	619a      	str	r2, [r3, #24]
+   170e8:	3a20      	subs	r2, #32
+   170ea:	4b07      	ldr	r3, [pc, #28]	; (17108 <ssd1963_init+0x79c>)
+   170ec:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17286:	2200      	movs	r2, #0
-   17288:	4b75      	ldr	r3, [pc, #468]	; (17460 <ssd1963_init+0xaf4>)
-   1728a:	701a      	strb	r2, [r3, #0]
+   170ee:	2200      	movs	r2, #0
+   170f0:	4b01      	ldr	r3, [pc, #4]	; (170f8 <ssd1963_init+0x78c>)
+   170f2:	701a      	strb	r2, [r3, #0]
+   170f4:	e00a      	b.n	1710c <ssd1963_init+0x7a0>
+   170f6:	46c0      	nop			; (mov r8, r8)
+   170f8:	2000005c 	.word	0x2000005c
+   170fc:	0000ffff 	.word	0x0000ffff
+   17100:	41004480 	.word	0x41004480
+   17104:	00017635 	.word	0x00017635
+   17108:	41004400 	.word	0x41004400
     LV_DRV_DISP_PAR_WR_WORD(data);
-   1728c:	2201      	movs	r2, #1
-   1728e:	4975      	ldr	r1, [pc, #468]	; (17464 <ssd1963_init+0xaf8>)
-   17290:	4875      	ldr	r0, [pc, #468]	; (17468 <ssd1963_init+0xafc>)
-   17292:	4b76      	ldr	r3, [pc, #472]	; (1746c <ssd1963_init+0xb00>)
-   17294:	4798      	blx	r3
-   17296:	4c76      	ldr	r4, [pc, #472]	; (17470 <ssd1963_init+0xb04>)
-   17298:	2540      	movs	r5, #64	; 0x40
-   1729a:	61a5      	str	r5, [r4, #24]
-    LV_DRV_DELAY_MS(1);
-   1729c:	2000      	movs	r0, #0
-   1729e:	4b75      	ldr	r3, [pc, #468]	; (17474 <ssd1963_init+0xb08>)
-   172a0:	4798      	blx	r3
-   172a2:	0002      	movs	r2, r0
-   172a4:	2300      	movs	r3, #0
-   172a6:	4874      	ldr	r0, [pc, #464]	; (17478 <ssd1963_init+0xb0c>)
-   172a8:	2100      	movs	r1, #0
-   172aa:	1880      	adds	r0, r0, r2
-   172ac:	4159      	adcs	r1, r3
-   172ae:	4a73      	ldr	r2, [pc, #460]	; (1747c <ssd1963_init+0xb10>)
-   172b0:	2300      	movs	r3, #0
-   172b2:	4e73      	ldr	r6, [pc, #460]	; (17480 <ssd1963_init+0xb14>)
-   172b4:	47b0      	blx	r6
-   172b6:	4b73      	ldr	r3, [pc, #460]	; (17484 <ssd1963_init+0xb18>)
-   172b8:	4798      	blx	r3
+   1710c:	2200      	movs	r2, #0
+   1710e:	495c      	ldr	r1, [pc, #368]	; (17280 <ssd1963_init+0x914>)
+   17110:	485c      	ldr	r0, [pc, #368]	; (17284 <ssd1963_init+0x918>)
+   17112:	4b5d      	ldr	r3, [pc, #372]	; (17288 <ssd1963_init+0x91c>)
+   17114:	4798      	blx	r3
+   17116:	4b5d      	ldr	r3, [pc, #372]	; (1728c <ssd1963_init+0x920>)
+   17118:	2240      	movs	r2, #64	; 0x40
+   1711a:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   172ba:	6165      	str	r5, [r4, #20]
+   1711c:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   172bc:	4b68      	ldr	r3, [pc, #416]	; (17460 <ssd1963_init+0xaf4>)
-   172be:	781b      	ldrb	r3, [r3, #0]
-   172c0:	2b00      	cmp	r3, #0
-   172c2:	d104      	bne.n	172ce <ssd1963_init+0x962>
-   172c4:	2220      	movs	r2, #32
-   172c6:	6162      	str	r2, [r4, #20]
+   1711e:	4b5c      	ldr	r3, [pc, #368]	; (17290 <ssd1963_init+0x924>)
+   17120:	781b      	ldrb	r3, [r3, #0]
+   17122:	2b00      	cmp	r3, #0
+   17124:	d105      	bne.n	17132 <ssd1963_init+0x7c6>
+   17126:	3a20      	subs	r2, #32
+   17128:	4b58      	ldr	r3, [pc, #352]	; (1728c <ssd1963_init+0x920>)
+   1712a:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   172c8:	3a1f      	subs	r2, #31
-   172ca:	4b65      	ldr	r3, [pc, #404]	; (17460 <ssd1963_init+0xaf4>)
-   172cc:	701a      	strb	r2, [r3, #0]
+   1712c:	3a1f      	subs	r2, #31
+   1712e:	4b58      	ldr	r3, [pc, #352]	; (17290 <ssd1963_init+0x924>)
+   17130:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   172ce:	2229      	movs	r2, #41	; 0x29
-   172d0:	4964      	ldr	r1, [pc, #400]	; (17464 <ssd1963_init+0xaf8>)
-   172d2:	4865      	ldr	r0, [pc, #404]	; (17468 <ssd1963_init+0xafc>)
-   172d4:	4b65      	ldr	r3, [pc, #404]	; (1746c <ssd1963_init+0xb00>)
-   172d6:	4798      	blx	r3
+   17132:	2229      	movs	r2, #41	; 0x29
+   17134:	4952      	ldr	r1, [pc, #328]	; (17280 <ssd1963_init+0x914>)
+   17136:	4853      	ldr	r0, [pc, #332]	; (17284 <ssd1963_init+0x918>)
+   17138:	4b53      	ldr	r3, [pc, #332]	; (17288 <ssd1963_init+0x91c>)
+   1713a:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   172d8:	4b65      	ldr	r3, [pc, #404]	; (17470 <ssd1963_init+0xb04>)
-   172da:	2240      	movs	r2, #64	; 0x40
-   172dc:	619a      	str	r2, [r3, #24]
+   1713c:	4b53      	ldr	r3, [pc, #332]	; (1728c <ssd1963_init+0x920>)
+   1713e:	2240      	movs	r2, #64	; 0x40
+   17140:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   172de:	615a      	str	r2, [r3, #20]
+   17142:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   172e0:	4b5f      	ldr	r3, [pc, #380]	; (17460 <ssd1963_init+0xaf4>)
-   172e2:	781b      	ldrb	r3, [r3, #0]
-   172e4:	2b00      	cmp	r3, #0
-   172e6:	d105      	bne.n	172f4 <ssd1963_init+0x988>
-   172e8:	3a20      	subs	r2, #32
-   172ea:	4b61      	ldr	r3, [pc, #388]	; (17470 <ssd1963_init+0xb04>)
-   172ec:	615a      	str	r2, [r3, #20]
+   17144:	4b52      	ldr	r3, [pc, #328]	; (17290 <ssd1963_init+0x924>)
+   17146:	781b      	ldrb	r3, [r3, #0]
+   17148:	2b00      	cmp	r3, #0
+   1714a:	d105      	bne.n	17158 <ssd1963_init+0x7ec>
+   1714c:	3a20      	subs	r2, #32
+   1714e:	4b4f      	ldr	r3, [pc, #316]	; (1728c <ssd1963_init+0x920>)
+   17150:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   172ee:	3a1f      	subs	r2, #31
-   172f0:	4b5b      	ldr	r3, [pc, #364]	; (17460 <ssd1963_init+0xaf4>)
-   172f2:	701a      	strb	r2, [r3, #0]
+   17152:	3a1f      	subs	r2, #31
+   17154:	4b4e      	ldr	r3, [pc, #312]	; (17290 <ssd1963_init+0x924>)
+   17156:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   172f4:	22be      	movs	r2, #190	; 0xbe
-   172f6:	495b      	ldr	r1, [pc, #364]	; (17464 <ssd1963_init+0xaf8>)
-   172f8:	485b      	ldr	r0, [pc, #364]	; (17468 <ssd1963_init+0xafc>)
-   172fa:	4b5c      	ldr	r3, [pc, #368]	; (1746c <ssd1963_init+0xb00>)
-   172fc:	4798      	blx	r3
+   17158:	22be      	movs	r2, #190	; 0xbe
+   1715a:	4949      	ldr	r1, [pc, #292]	; (17280 <ssd1963_init+0x914>)
+   1715c:	4849      	ldr	r0, [pc, #292]	; (17284 <ssd1963_init+0x918>)
+   1715e:	4b4a      	ldr	r3, [pc, #296]	; (17288 <ssd1963_init+0x91c>)
+   17160:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   172fe:	4b5c      	ldr	r3, [pc, #368]	; (17470 <ssd1963_init+0xb04>)
-   17300:	2240      	movs	r2, #64	; 0x40
-   17302:	619a      	str	r2, [r3, #24]
+   17162:	4b4a      	ldr	r3, [pc, #296]	; (1728c <ssd1963_init+0x920>)
+   17164:	2240      	movs	r2, #64	; 0x40
+   17166:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17304:	615a      	str	r2, [r3, #20]
+   17168:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17306:	4b56      	ldr	r3, [pc, #344]	; (17460 <ssd1963_init+0xaf4>)
-   17308:	781b      	ldrb	r3, [r3, #0]
-   1730a:	2b00      	cmp	r3, #0
-   1730c:	d005      	beq.n	1731a <ssd1963_init+0x9ae>
+   1716a:	4b49      	ldr	r3, [pc, #292]	; (17290 <ssd1963_init+0x924>)
+   1716c:	781b      	ldrb	r3, [r3, #0]
+   1716e:	2b00      	cmp	r3, #0
+   17170:	d005      	beq.n	1717e <ssd1963_init+0x812>
 		port_base->OUTSET.reg = pin_mask;
-   1730e:	3a20      	subs	r2, #32
-   17310:	4b57      	ldr	r3, [pc, #348]	; (17470 <ssd1963_init+0xb04>)
-   17312:	619a      	str	r2, [r3, #24]
+   17172:	3a20      	subs	r2, #32
+   17174:	4b45      	ldr	r3, [pc, #276]	; (1728c <ssd1963_init+0x920>)
+   17176:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17314:	2200      	movs	r2, #0
-   17316:	4b52      	ldr	r3, [pc, #328]	; (17460 <ssd1963_init+0xaf4>)
-   17318:	701a      	strb	r2, [r3, #0]
+   17178:	2200      	movs	r2, #0
+   1717a:	4b45      	ldr	r3, [pc, #276]	; (17290 <ssd1963_init+0x924>)
+   1717c:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   1731a:	2206      	movs	r2, #6
-   1731c:	4951      	ldr	r1, [pc, #324]	; (17464 <ssd1963_init+0xaf8>)
-   1731e:	4852      	ldr	r0, [pc, #328]	; (17468 <ssd1963_init+0xafc>)
-   17320:	4b52      	ldr	r3, [pc, #328]	; (1746c <ssd1963_init+0xb00>)
-   17322:	4798      	blx	r3
-   17324:	4b52      	ldr	r3, [pc, #328]	; (17470 <ssd1963_init+0xb04>)
-   17326:	2240      	movs	r2, #64	; 0x40
-   17328:	619a      	str	r2, [r3, #24]
+   1717e:	2206      	movs	r2, #6
+   17180:	493f      	ldr	r1, [pc, #252]	; (17280 <ssd1963_init+0x914>)
+   17182:	4840      	ldr	r0, [pc, #256]	; (17284 <ssd1963_init+0x918>)
+   17184:	4b40      	ldr	r3, [pc, #256]	; (17288 <ssd1963_init+0x91c>)
+   17186:	4798      	blx	r3
+   17188:	4b40      	ldr	r3, [pc, #256]	; (1728c <ssd1963_init+0x920>)
+   1718a:	2240      	movs	r2, #64	; 0x40
+   1718c:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   1732a:	615a      	str	r2, [r3, #20]
+   1718e:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   1732c:	4b4c      	ldr	r3, [pc, #304]	; (17460 <ssd1963_init+0xaf4>)
-   1732e:	781b      	ldrb	r3, [r3, #0]
-   17330:	2b00      	cmp	r3, #0
-   17332:	d005      	beq.n	17340 <ssd1963_init+0x9d4>
+   17190:	4b3f      	ldr	r3, [pc, #252]	; (17290 <ssd1963_init+0x924>)
+   17192:	781b      	ldrb	r3, [r3, #0]
+   17194:	2b00      	cmp	r3, #0
+   17196:	d005      	beq.n	171a4 <ssd1963_init+0x838>
 		port_base->OUTSET.reg = pin_mask;
-   17334:	3a20      	subs	r2, #32
-   17336:	4b4e      	ldr	r3, [pc, #312]	; (17470 <ssd1963_init+0xb04>)
-   17338:	619a      	str	r2, [r3, #24]
+   17198:	3a20      	subs	r2, #32
+   1719a:	4b3c      	ldr	r3, [pc, #240]	; (1728c <ssd1963_init+0x920>)
+   1719c:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   1733a:	2200      	movs	r2, #0
-   1733c:	4b48      	ldr	r3, [pc, #288]	; (17460 <ssd1963_init+0xaf4>)
-   1733e:	701a      	strb	r2, [r3, #0]
+   1719e:	2200      	movs	r2, #0
+   171a0:	4b3b      	ldr	r3, [pc, #236]	; (17290 <ssd1963_init+0x924>)
+   171a2:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17340:	2280      	movs	r2, #128	; 0x80
-   17342:	4948      	ldr	r1, [pc, #288]	; (17464 <ssd1963_init+0xaf8>)
-   17344:	4848      	ldr	r0, [pc, #288]	; (17468 <ssd1963_init+0xafc>)
-   17346:	4b49      	ldr	r3, [pc, #292]	; (1746c <ssd1963_init+0xb00>)
-   17348:	4798      	blx	r3
-   1734a:	4b49      	ldr	r3, [pc, #292]	; (17470 <ssd1963_init+0xb04>)
-   1734c:	2240      	movs	r2, #64	; 0x40
-   1734e:	619a      	str	r2, [r3, #24]
+   171a4:	2280      	movs	r2, #128	; 0x80
+   171a6:	4936      	ldr	r1, [pc, #216]	; (17280 <ssd1963_init+0x914>)
+   171a8:	4836      	ldr	r0, [pc, #216]	; (17284 <ssd1963_init+0x918>)
+   171aa:	4b37      	ldr	r3, [pc, #220]	; (17288 <ssd1963_init+0x91c>)
+   171ac:	4798      	blx	r3
+   171ae:	4b37      	ldr	r3, [pc, #220]	; (1728c <ssd1963_init+0x920>)
+   171b0:	2240      	movs	r2, #64	; 0x40
+   171b2:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17350:	615a      	str	r2, [r3, #20]
+   171b4:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17352:	4b43      	ldr	r3, [pc, #268]	; (17460 <ssd1963_init+0xaf4>)
-   17354:	781b      	ldrb	r3, [r3, #0]
-   17356:	2b00      	cmp	r3, #0
-   17358:	d005      	beq.n	17366 <ssd1963_init+0x9fa>
+   171b6:	4b36      	ldr	r3, [pc, #216]	; (17290 <ssd1963_init+0x924>)
+   171b8:	781b      	ldrb	r3, [r3, #0]
+   171ba:	2b00      	cmp	r3, #0
+   171bc:	d005      	beq.n	171ca <ssd1963_init+0x85e>
 		port_base->OUTSET.reg = pin_mask;
-   1735a:	3a20      	subs	r2, #32
-   1735c:	4b44      	ldr	r3, [pc, #272]	; (17470 <ssd1963_init+0xb04>)
-   1735e:	619a      	str	r2, [r3, #24]
+   171be:	3a20      	subs	r2, #32
+   171c0:	4b32      	ldr	r3, [pc, #200]	; (1728c <ssd1963_init+0x920>)
+   171c2:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17360:	2200      	movs	r2, #0
-   17362:	4b3f      	ldr	r3, [pc, #252]	; (17460 <ssd1963_init+0xaf4>)
-   17364:	701a      	strb	r2, [r3, #0]
+   171c4:	2200      	movs	r2, #0
+   171c6:	4b32      	ldr	r3, [pc, #200]	; (17290 <ssd1963_init+0x924>)
+   171c8:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17366:	2201      	movs	r2, #1
-   17368:	493e      	ldr	r1, [pc, #248]	; (17464 <ssd1963_init+0xaf8>)
-   1736a:	483f      	ldr	r0, [pc, #252]	; (17468 <ssd1963_init+0xafc>)
-   1736c:	4b3f      	ldr	r3, [pc, #252]	; (1746c <ssd1963_init+0xb00>)
-   1736e:	4798      	blx	r3
-   17370:	4b3f      	ldr	r3, [pc, #252]	; (17470 <ssd1963_init+0xb04>)
-   17372:	2240      	movs	r2, #64	; 0x40
-   17374:	619a      	str	r2, [r3, #24]
+   171ca:	2201      	movs	r2, #1
+   171cc:	492c      	ldr	r1, [pc, #176]	; (17280 <ssd1963_init+0x914>)
+   171ce:	482d      	ldr	r0, [pc, #180]	; (17284 <ssd1963_init+0x918>)
+   171d0:	4b2d      	ldr	r3, [pc, #180]	; (17288 <ssd1963_init+0x91c>)
+   171d2:	4798      	blx	r3
+   171d4:	4b2d      	ldr	r3, [pc, #180]	; (1728c <ssd1963_init+0x920>)
+   171d6:	2240      	movs	r2, #64	; 0x40
+   171d8:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17376:	615a      	str	r2, [r3, #20]
+   171da:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   17378:	4b39      	ldr	r3, [pc, #228]	; (17460 <ssd1963_init+0xaf4>)
-   1737a:	781b      	ldrb	r3, [r3, #0]
-   1737c:	2b00      	cmp	r3, #0
-   1737e:	d005      	beq.n	1738c <ssd1963_init+0xa20>
+   171dc:	4b2c      	ldr	r3, [pc, #176]	; (17290 <ssd1963_init+0x924>)
+   171de:	781b      	ldrb	r3, [r3, #0]
+   171e0:	2b00      	cmp	r3, #0
+   171e2:	d005      	beq.n	171f0 <ssd1963_init+0x884>
 		port_base->OUTSET.reg = pin_mask;
-   17380:	3a20      	subs	r2, #32
-   17382:	4b3b      	ldr	r3, [pc, #236]	; (17470 <ssd1963_init+0xb04>)
-   17384:	619a      	str	r2, [r3, #24]
+   171e4:	3a20      	subs	r2, #32
+   171e6:	4b29      	ldr	r3, [pc, #164]	; (1728c <ssd1963_init+0x920>)
+   171e8:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17386:	2200      	movs	r2, #0
-   17388:	4b35      	ldr	r3, [pc, #212]	; (17460 <ssd1963_init+0xaf4>)
-   1738a:	701a      	strb	r2, [r3, #0]
+   171ea:	2200      	movs	r2, #0
+   171ec:	4b28      	ldr	r3, [pc, #160]	; (17290 <ssd1963_init+0x924>)
+   171ee:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   1738c:	22f0      	movs	r2, #240	; 0xf0
-   1738e:	4935      	ldr	r1, [pc, #212]	; (17464 <ssd1963_init+0xaf8>)
-   17390:	4835      	ldr	r0, [pc, #212]	; (17468 <ssd1963_init+0xafc>)
-   17392:	4b36      	ldr	r3, [pc, #216]	; (1746c <ssd1963_init+0xb00>)
-   17394:	4798      	blx	r3
-   17396:	4b36      	ldr	r3, [pc, #216]	; (17470 <ssd1963_init+0xb04>)
-   17398:	2240      	movs	r2, #64	; 0x40
-   1739a:	619a      	str	r2, [r3, #24]
+   171f0:	22f0      	movs	r2, #240	; 0xf0
+   171f2:	4923      	ldr	r1, [pc, #140]	; (17280 <ssd1963_init+0x914>)
+   171f4:	4823      	ldr	r0, [pc, #140]	; (17284 <ssd1963_init+0x918>)
+   171f6:	4b24      	ldr	r3, [pc, #144]	; (17288 <ssd1963_init+0x91c>)
+   171f8:	4798      	blx	r3
+   171fa:	4b24      	ldr	r3, [pc, #144]	; (1728c <ssd1963_init+0x920>)
+   171fc:	2240      	movs	r2, #64	; 0x40
+   171fe:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   1739c:	615a      	str	r2, [r3, #20]
+   17200:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   1739e:	4b30      	ldr	r3, [pc, #192]	; (17460 <ssd1963_init+0xaf4>)
-   173a0:	781b      	ldrb	r3, [r3, #0]
-   173a2:	2b00      	cmp	r3, #0
-   173a4:	d005      	beq.n	173b2 <ssd1963_init+0xa46>
+   17202:	4b23      	ldr	r3, [pc, #140]	; (17290 <ssd1963_init+0x924>)
+   17204:	781b      	ldrb	r3, [r3, #0]
+   17206:	2b00      	cmp	r3, #0
+   17208:	d005      	beq.n	17216 <ssd1963_init+0x8aa>
 		port_base->OUTSET.reg = pin_mask;
-   173a6:	3a20      	subs	r2, #32
-   173a8:	4b31      	ldr	r3, [pc, #196]	; (17470 <ssd1963_init+0xb04>)
-   173aa:	619a      	str	r2, [r3, #24]
+   1720a:	3a20      	subs	r2, #32
+   1720c:	4b1f      	ldr	r3, [pc, #124]	; (1728c <ssd1963_init+0x920>)
+   1720e:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   173ac:	2200      	movs	r2, #0
-   173ae:	4b2c      	ldr	r3, [pc, #176]	; (17460 <ssd1963_init+0xaf4>)
-   173b0:	701a      	strb	r2, [r3, #0]
+   17210:	2200      	movs	r2, #0
+   17212:	4b1f      	ldr	r3, [pc, #124]	; (17290 <ssd1963_init+0x924>)
+   17214:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   173b2:	2200      	movs	r2, #0
-   173b4:	492b      	ldr	r1, [pc, #172]	; (17464 <ssd1963_init+0xaf8>)
-   173b6:	482c      	ldr	r0, [pc, #176]	; (17468 <ssd1963_init+0xafc>)
-   173b8:	4b2c      	ldr	r3, [pc, #176]	; (1746c <ssd1963_init+0xb00>)
-   173ba:	4798      	blx	r3
-   173bc:	4b2c      	ldr	r3, [pc, #176]	; (17470 <ssd1963_init+0xb04>)
-   173be:	2240      	movs	r2, #64	; 0x40
-   173c0:	619a      	str	r2, [r3, #24]
+   17216:	2200      	movs	r2, #0
+   17218:	4919      	ldr	r1, [pc, #100]	; (17280 <ssd1963_init+0x914>)
+   1721a:	481a      	ldr	r0, [pc, #104]	; (17284 <ssd1963_init+0x918>)
+   1721c:	4b1a      	ldr	r3, [pc, #104]	; (17288 <ssd1963_init+0x91c>)
+   1721e:	4798      	blx	r3
+   17220:	4b1a      	ldr	r3, [pc, #104]	; (1728c <ssd1963_init+0x920>)
+   17222:	2240      	movs	r2, #64	; 0x40
+   17224:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   173c2:	615a      	str	r2, [r3, #20]
+   17226:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   173c4:	4b26      	ldr	r3, [pc, #152]	; (17460 <ssd1963_init+0xaf4>)
-   173c6:	781b      	ldrb	r3, [r3, #0]
-   173c8:	2b00      	cmp	r3, #0
-   173ca:	d005      	beq.n	173d8 <ssd1963_init+0xa6c>
+   17228:	4b19      	ldr	r3, [pc, #100]	; (17290 <ssd1963_init+0x924>)
+   1722a:	781b      	ldrb	r3, [r3, #0]
+   1722c:	2b00      	cmp	r3, #0
+   1722e:	d005      	beq.n	1723c <ssd1963_init+0x8d0>
 		port_base->OUTSET.reg = pin_mask;
-   173cc:	3a20      	subs	r2, #32
-   173ce:	4b28      	ldr	r3, [pc, #160]	; (17470 <ssd1963_init+0xb04>)
-   173d0:	619a      	str	r2, [r3, #24]
+   17230:	3a20      	subs	r2, #32
+   17232:	4b16      	ldr	r3, [pc, #88]	; (1728c <ssd1963_init+0x920>)
+   17234:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   173d2:	2200      	movs	r2, #0
-   173d4:	4b22      	ldr	r3, [pc, #136]	; (17460 <ssd1963_init+0xaf4>)
-   173d6:	701a      	strb	r2, [r3, #0]
+   17236:	2200      	movs	r2, #0
+   17238:	4b15      	ldr	r3, [pc, #84]	; (17290 <ssd1963_init+0x924>)
+   1723a:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   173d8:	2200      	movs	r2, #0
-   173da:	4922      	ldr	r1, [pc, #136]	; (17464 <ssd1963_init+0xaf8>)
-   173dc:	4822      	ldr	r0, [pc, #136]	; (17468 <ssd1963_init+0xafc>)
-   173de:	4b23      	ldr	r3, [pc, #140]	; (1746c <ssd1963_init+0xb00>)
-   173e0:	4798      	blx	r3
-   173e2:	4b23      	ldr	r3, [pc, #140]	; (17470 <ssd1963_init+0xb04>)
-   173e4:	2240      	movs	r2, #64	; 0x40
-   173e6:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   173e8:	615a      	str	r2, [r3, #20]
-    if(cmd_mode == false) {
-   173ea:	4b1d      	ldr	r3, [pc, #116]	; (17460 <ssd1963_init+0xaf4>)
-   173ec:	781b      	ldrb	r3, [r3, #0]
-   173ee:	2b00      	cmp	r3, #0
-   173f0:	d105      	bne.n	173fe <ssd1963_init+0xa92>
-   173f2:	3a20      	subs	r2, #32
-   173f4:	4b1e      	ldr	r3, [pc, #120]	; (17470 <ssd1963_init+0xb04>)
-   173f6:	615a      	str	r2, [r3, #20]
-        cmd_mode = true;
-   173f8:	3a1f      	subs	r2, #31
-   173fa:	4b19      	ldr	r3, [pc, #100]	; (17460 <ssd1963_init+0xaf4>)
-   173fc:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(cmd);
-   173fe:	22d0      	movs	r2, #208	; 0xd0
-   17400:	4918      	ldr	r1, [pc, #96]	; (17464 <ssd1963_init+0xaf8>)
-   17402:	4819      	ldr	r0, [pc, #100]	; (17468 <ssd1963_init+0xafc>)
-   17404:	4b19      	ldr	r3, [pc, #100]	; (1746c <ssd1963_init+0xb00>)
-   17406:	4798      	blx	r3
-		port_base->OUTSET.reg = pin_mask;
-   17408:	4b19      	ldr	r3, [pc, #100]	; (17470 <ssd1963_init+0xb04>)
-   1740a:	2240      	movs	r2, #64	; 0x40
-   1740c:	619a      	str	r2, [r3, #24]
-		port_base->OUTCLR.reg = pin_mask;
-   1740e:	615a      	str	r2, [r3, #20]
-    if(cmd_mode != false) {
-   17410:	4b13      	ldr	r3, [pc, #76]	; (17460 <ssd1963_init+0xaf4>)
-   17412:	781b      	ldrb	r3, [r3, #0]
-   17414:	2b00      	cmp	r3, #0
-   17416:	d005      	beq.n	17424 <ssd1963_init+0xab8>
-		port_base->OUTSET.reg = pin_mask;
-   17418:	3a20      	subs	r2, #32
-   1741a:	4b15      	ldr	r3, [pc, #84]	; (17470 <ssd1963_init+0xb04>)
-   1741c:	619a      	str	r2, [r3, #24]
-        cmd_mode = false;
-   1741e:	2200      	movs	r2, #0
-   17420:	4b0f      	ldr	r3, [pc, #60]	; (17460 <ssd1963_init+0xaf4>)
-   17422:	701a      	strb	r2, [r3, #0]
-    LV_DRV_DISP_PAR_WR_WORD(data);
-   17424:	220d      	movs	r2, #13
-   17426:	490f      	ldr	r1, [pc, #60]	; (17464 <ssd1963_init+0xaf8>)
-   17428:	480f      	ldr	r0, [pc, #60]	; (17468 <ssd1963_init+0xafc>)
-   1742a:	4b10      	ldr	r3, [pc, #64]	; (1746c <ssd1963_init+0xb00>)
-   1742c:	4798      	blx	r3
-   1742e:	2240      	movs	r2, #64	; 0x40
-   17430:	4b0f      	ldr	r3, [pc, #60]	; (17470 <ssd1963_init+0xb04>)
-   17432:	619a      	str	r2, [r3, #24]
+   1723c:	2200      	movs	r2, #0
+   1723e:	4910      	ldr	r1, [pc, #64]	; (17280 <ssd1963_init+0x914>)
+   17240:	4810      	ldr	r0, [pc, #64]	; (17284 <ssd1963_init+0x918>)
+   17242:	4b11      	ldr	r3, [pc, #68]	; (17288 <ssd1963_init+0x91c>)
+   17244:	4798      	blx	r3
+   17246:	2240      	movs	r2, #64	; 0x40
+   17248:	4b10      	ldr	r3, [pc, #64]	; (1728c <ssd1963_init+0x920>)
+   1724a:	619a      	str	r2, [r3, #24]
     LV_DRV_DELAY_MS(30);
-   17434:	2000      	movs	r0, #0
-   17436:	4b0f      	ldr	r3, [pc, #60]	; (17474 <ssd1963_init+0xb08>)
-   17438:	4798      	blx	r3
-   1743a:	0002      	movs	r2, r0
-   1743c:	2300      	movs	r3, #0
-   1743e:	0f11      	lsrs	r1, r2, #28
-   17440:	0110      	lsls	r0, r2, #4
-   17442:	1a80      	subs	r0, r0, r2
-   17444:	4199      	sbcs	r1, r3
-   17446:	1800      	adds	r0, r0, r0
-   17448:	4149      	adcs	r1, r1
-   1744a:	4a0b      	ldr	r2, [pc, #44]	; (17478 <ssd1963_init+0xb0c>)
-   1744c:	2300      	movs	r3, #0
-   1744e:	1880      	adds	r0, r0, r2
-   17450:	4159      	adcs	r1, r3
-   17452:	4a0a      	ldr	r2, [pc, #40]	; (1747c <ssd1963_init+0xb10>)
-   17454:	2300      	movs	r3, #0
-   17456:	4c0a      	ldr	r4, [pc, #40]	; (17480 <ssd1963_init+0xb14>)
-   17458:	47a0      	blx	r4
-   1745a:	4b0a      	ldr	r3, [pc, #40]	; (17484 <ssd1963_init+0xb18>)
-   1745c:	4798      	blx	r3
-}
-   1745e:	bd70      	pop	{r4, r5, r6, pc}
-   17460:	2000005c 	.word	0x2000005c
-   17464:	1c03c3f7 	.word	0x1c03c3f7
-   17468:	41004480 	.word	0x41004480
-   1746c:	00017815 	.word	0x00017815
-   17470:	41004400 	.word	0x41004400
-   17474:	000010cd 	.word	0x000010cd
-   17478:	00001b57 	.word	0x00001b57
-   1747c:	00001b58 	.word	0x00001b58
-   17480:	00017cdd 	.word	0x00017cdd
-   17484:	20000001 	.word	0x20000001
-
-00017488 <ssd1963_flush>:
-{
-   17488:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1748a:	46de      	mov	lr, fp
-   1748c:	4657      	mov	r7, sl
-   1748e:	464e      	mov	r6, r9
-   17490:	4645      	mov	r5, r8
-   17492:	b5e0      	push	{r5, r6, r7, lr}
-   17494:	b083      	sub	sp, #12
-   17496:	9000      	str	r0, [sp, #0]
-   17498:	000f      	movs	r7, r1
-   1749a:	0016      	movs	r6, r2
+   1724c:	2000      	movs	r0, #0
+   1724e:	4b11      	ldr	r3, [pc, #68]	; (17294 <ssd1963_init+0x928>)
+   17250:	4798      	blx	r3
+   17252:	0002      	movs	r2, r0
+   17254:	2300      	movs	r3, #0
+   17256:	0f11      	lsrs	r1, r2, #28
+   17258:	0110      	lsls	r0, r2, #4
+   1725a:	1a80      	subs	r0, r0, r2
+   1725c:	4199      	sbcs	r1, r3
+   1725e:	1800      	adds	r0, r0, r0
+   17260:	4149      	adcs	r1, r1
+   17262:	4a0d      	ldr	r2, [pc, #52]	; (17298 <ssd1963_init+0x92c>)
+   17264:	2300      	movs	r3, #0
+   17266:	1880      	adds	r0, r0, r2
+   17268:	4159      	adcs	r1, r3
+   1726a:	4a0c      	ldr	r2, [pc, #48]	; (1729c <ssd1963_init+0x930>)
+   1726c:	2300      	movs	r3, #0
+   1726e:	4c0c      	ldr	r4, [pc, #48]	; (172a0 <ssd1963_init+0x934>)
+   17270:	47a0      	blx	r4
+   17272:	4b0c      	ldr	r3, [pc, #48]	; (172a4 <ssd1963_init+0x938>)
+   17274:	4798      	blx	r3
+}
+   17276:	bc1c      	pop	{r2, r3, r4}
+   17278:	4690      	mov	r8, r2
+   1727a:	4699      	mov	r9, r3
+   1727c:	46a2      	mov	sl, r4
+   1727e:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   17280:	0000ffff 	.word	0x0000ffff
+   17284:	41004480 	.word	0x41004480
+   17288:	00017635 	.word	0x00017635
+   1728c:	41004400 	.word	0x41004400
+   17290:	2000005c 	.word	0x2000005c
+   17294:	000010cd 	.word	0x000010cd
+   17298:	00001b57 	.word	0x00001b57
+   1729c:	00001b58 	.word	0x00001b58
+   172a0:	00017b6d 	.word	0x00017b6d
+   172a4:	20000001 	.word	0x20000001
+
+000172a8 <ssd1963_flush>:
+{
+   172a8:	b5f0      	push	{r4, r5, r6, r7, lr}
+   172aa:	46de      	mov	lr, fp
+   172ac:	4657      	mov	r7, sl
+   172ae:	464e      	mov	r6, r9
+   172b0:	4645      	mov	r5, r8
+   172b2:	b5e0      	push	{r5, r6, r7, lr}
+   172b4:	b083      	sub	sp, #12
+   172b6:	9000      	str	r0, [sp, #0]
+   172b8:	000f      	movs	r7, r1
+   172ba:	0016      	movs	r6, r2
     if(area->x2 < 0) return;
-   1749c:	2204      	movs	r2, #4
-   1749e:	5e8b      	ldrsh	r3, [r1, r2]
-   174a0:	2b00      	cmp	r3, #0
-   174a2:	db0c      	blt.n	174be <ssd1963_flush+0x36>
+   172bc:	2204      	movs	r2, #4
+   172be:	5e8b      	ldrsh	r3, [r1, r2]
+   172c0:	2b00      	cmp	r3, #0
+   172c2:	db0c      	blt.n	172de <ssd1963_flush+0x36>
     if(area->y2 < 0) return;
-   174a4:	2206      	movs	r2, #6
-   174a6:	5e8b      	ldrsh	r3, [r1, r2]
-   174a8:	2b00      	cmp	r3, #0
-   174aa:	db08      	blt.n	174be <ssd1963_flush+0x36>
+   172c4:	2206      	movs	r2, #6
+   172c6:	5e8b      	ldrsh	r3, [r1, r2]
+   172c8:	2b00      	cmp	r3, #0
+   172ca:	db08      	blt.n	172de <ssd1963_flush+0x36>
     if(area->x1 > SSD1963_HOR_RES - 1) return;
-   174ac:	2300      	movs	r3, #0
-   174ae:	5ecc      	ldrsh	r4, [r1, r3]
-   174b0:	4bb2      	ldr	r3, [pc, #712]	; (1777c <ssd1963_flush+0x2f4>)
-   174b2:	4798      	blx	r3
-   174b4:	4bb2      	ldr	r3, [pc, #712]	; (17780 <ssd1963_flush+0x2f8>)
-   174b6:	4798      	blx	r3
-   174b8:	3801      	subs	r0, #1
-   174ba:	4284      	cmp	r4, r0
-   174bc:	dd06      	ble.n	174cc <ssd1963_flush+0x44>
-}
-   174be:	b003      	add	sp, #12
-   174c0:	bc3c      	pop	{r2, r3, r4, r5}
-   174c2:	4690      	mov	r8, r2
-   174c4:	4699      	mov	r9, r3
-   174c6:	46a2      	mov	sl, r4
-   174c8:	46ab      	mov	fp, r5
-   174ca:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   172cc:	2300      	movs	r3, #0
+   172ce:	5ecc      	ldrsh	r4, [r1, r3]
+   172d0:	4bb2      	ldr	r3, [pc, #712]	; (1759c <ssd1963_flush+0x2f4>)
+   172d2:	4798      	blx	r3
+   172d4:	4bb2      	ldr	r3, [pc, #712]	; (175a0 <ssd1963_flush+0x2f8>)
+   172d6:	4798      	blx	r3
+   172d8:	3801      	subs	r0, #1
+   172da:	4284      	cmp	r4, r0
+   172dc:	dd06      	ble.n	172ec <ssd1963_flush+0x44>
+}
+   172de:	b003      	add	sp, #12
+   172e0:	bc3c      	pop	{r2, r3, r4, r5}
+   172e2:	4690      	mov	r8, r2
+   172e4:	4699      	mov	r9, r3
+   172e6:	46a2      	mov	sl, r4
+   172e8:	46ab      	mov	fp, r5
+   172ea:	bdf0      	pop	{r4, r5, r6, r7, pc}
     if(area->y1 > SSD1963_VER_RES - 1) return;
-   174cc:	2302      	movs	r3, #2
-   174ce:	5efc      	ldrsh	r4, [r7, r3]
-   174d0:	4baa      	ldr	r3, [pc, #680]	; (1777c <ssd1963_flush+0x2f4>)
-   174d2:	4798      	blx	r3
-   174d4:	4bab      	ldr	r3, [pc, #684]	; (17784 <ssd1963_flush+0x2fc>)
-   174d6:	4798      	blx	r3
-   174d8:	3801      	subs	r0, #1
-   174da:	4284      	cmp	r4, r0
-   174dc:	dcef      	bgt.n	174be <ssd1963_flush+0x36>
+   172ec:	2302      	movs	r3, #2
+   172ee:	5efc      	ldrsh	r4, [r7, r3]
+   172f0:	4baa      	ldr	r3, [pc, #680]	; (1759c <ssd1963_flush+0x2f4>)
+   172f2:	4798      	blx	r3
+   172f4:	4bab      	ldr	r3, [pc, #684]	; (175a4 <ssd1963_flush+0x2fc>)
+   172f6:	4798      	blx	r3
+   172f8:	3801      	subs	r0, #1
+   172fa:	4284      	cmp	r4, r0
+   172fc:	dcef      	bgt.n	172de <ssd1963_flush+0x36>
     int32_t act_x1 = area->x1 < 0 ? 0 : area->x1;
-   174de:	883b      	ldrh	r3, [r7, #0]
-   174e0:	1c1d      	adds	r5, r3, #0
-   174e2:	b21b      	sxth	r3, r3
-   174e4:	2b00      	cmp	r3, #0
-   174e6:	da00      	bge.n	174ea <ssd1963_flush+0x62>
-   174e8:	e136      	b.n	17758 <ssd1963_flush+0x2d0>
-   174ea:	b22b      	sxth	r3, r5
-   174ec:	4699      	mov	r9, r3
+   172fe:	883b      	ldrh	r3, [r7, #0]
+   17300:	1c1d      	adds	r5, r3, #0
+   17302:	b21b      	sxth	r3, r3
+   17304:	2b00      	cmp	r3, #0
+   17306:	da00      	bge.n	1730a <ssd1963_flush+0x62>
+   17308:	e136      	b.n	17578 <ssd1963_flush+0x2d0>
+   1730a:	b22b      	sxth	r3, r5
+   1730c:	4699      	mov	r9, r3
     int32_t act_y1 = area->y1 < 0 ? 0 : area->y1;
-   174ee:	887b      	ldrh	r3, [r7, #2]
-   174f0:	1c1c      	adds	r4, r3, #0
-   174f2:	b21b      	sxth	r3, r3
-   174f4:	2b00      	cmp	r3, #0
-   174f6:	da00      	bge.n	174fa <ssd1963_flush+0x72>
-   174f8:	e130      	b.n	1775c <ssd1963_flush+0x2d4>
-   174fa:	b224      	sxth	r4, r4
-   174fc:	46a3      	mov	fp, r4
+   1730e:	887b      	ldrh	r3, [r7, #2]
+   17310:	1c1c      	adds	r4, r3, #0
+   17312:	b21b      	sxth	r3, r3
+   17314:	2b00      	cmp	r3, #0
+   17316:	da00      	bge.n	1731a <ssd1963_flush+0x72>
+   17318:	e130      	b.n	1757c <ssd1963_flush+0x2d4>
+   1731a:	b224      	sxth	r4, r4
+   1731c:	46a3      	mov	fp, r4
     int32_t act_x2 = area->x2 > SSD1963_HOR_RES - 1 ? SSD1963_HOR_RES - 1 : area->x2;
-   174fe:	2304      	movs	r3, #4
-   17500:	5efd      	ldrsh	r5, [r7, r3]
-   17502:	4b9e      	ldr	r3, [pc, #632]	; (1777c <ssd1963_flush+0x2f4>)
-   17504:	4798      	blx	r3
-   17506:	4b9e      	ldr	r3, [pc, #632]	; (17780 <ssd1963_flush+0x2f8>)
-   17508:	4798      	blx	r3
-   1750a:	3801      	subs	r0, #1
-   1750c:	4285      	cmp	r5, r0
-   1750e:	dd00      	ble.n	17512 <ssd1963_flush+0x8a>
-   17510:	e126      	b.n	17760 <ssd1963_flush+0x2d8>
-   17512:	2304      	movs	r3, #4
-   17514:	5efd      	ldrsh	r5, [r7, r3]
+   1731e:	2304      	movs	r3, #4
+   17320:	5efd      	ldrsh	r5, [r7, r3]
+   17322:	4b9e      	ldr	r3, [pc, #632]	; (1759c <ssd1963_flush+0x2f4>)
+   17324:	4798      	blx	r3
+   17326:	4b9e      	ldr	r3, [pc, #632]	; (175a0 <ssd1963_flush+0x2f8>)
+   17328:	4798      	blx	r3
+   1732a:	3801      	subs	r0, #1
+   1732c:	4285      	cmp	r5, r0
+   1732e:	dd00      	ble.n	17332 <ssd1963_flush+0x8a>
+   17330:	e126      	b.n	17580 <ssd1963_flush+0x2d8>
+   17332:	2304      	movs	r3, #4
+   17334:	5efd      	ldrsh	r5, [r7, r3]
     int32_t act_y2 = area->y2 > SSD1963_VER_RES - 1 ? SSD1963_VER_RES - 1 : area->y2;
-   17516:	2206      	movs	r2, #6
-   17518:	5ebb      	ldrsh	r3, [r7, r2]
-   1751a:	469a      	mov	sl, r3
-   1751c:	4b97      	ldr	r3, [pc, #604]	; (1777c <ssd1963_flush+0x2f4>)
-   1751e:	4798      	blx	r3
-   17520:	4b98      	ldr	r3, [pc, #608]	; (17784 <ssd1963_flush+0x2fc>)
-   17522:	4798      	blx	r3
-   17524:	3801      	subs	r0, #1
-   17526:	4582      	cmp	sl, r0
-   17528:	dd00      	ble.n	1752c <ssd1963_flush+0xa4>
-   1752a:	e11f      	b.n	1776c <ssd1963_flush+0x2e4>
-   1752c:	2206      	movs	r2, #6
-   1752e:	5ebb      	ldrsh	r3, [r7, r2]
-   17530:	469a      	mov	sl, r3
+   17336:	2206      	movs	r2, #6
+   17338:	5ebb      	ldrsh	r3, [r7, r2]
+   1733a:	469a      	mov	sl, r3
+   1733c:	4b97      	ldr	r3, [pc, #604]	; (1759c <ssd1963_flush+0x2f4>)
+   1733e:	4798      	blx	r3
+   17340:	4b98      	ldr	r3, [pc, #608]	; (175a4 <ssd1963_flush+0x2fc>)
+   17342:	4798      	blx	r3
+   17344:	3801      	subs	r0, #1
+   17346:	4582      	cmp	sl, r0
+   17348:	dd00      	ble.n	1734c <ssd1963_flush+0xa4>
+   1734a:	e11f      	b.n	1758c <ssd1963_flush+0x2e4>
+   1734c:	2206      	movs	r2, #6
+   1734e:	5ebb      	ldrsh	r3, [r7, r2]
+   17350:	469a      	mov	sl, r3
 		port_base->OUTCLR.reg = pin_mask;
-   17532:	2240      	movs	r2, #64	; 0x40
-   17534:	4b94      	ldr	r3, [pc, #592]	; (17788 <ssd1963_flush+0x300>)
-   17536:	615a      	str	r2, [r3, #20]
+   17352:	2240      	movs	r2, #64	; 0x40
+   17354:	4b94      	ldr	r3, [pc, #592]	; (175a8 <ssd1963_flush+0x300>)
+   17356:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   17538:	4b94      	ldr	r3, [pc, #592]	; (1778c <ssd1963_flush+0x304>)
-   1753a:	781b      	ldrb	r3, [r3, #0]
-   1753c:	2b00      	cmp	r3, #0
-   1753e:	d105      	bne.n	1754c <ssd1963_flush+0xc4>
-   17540:	3a20      	subs	r2, #32
-   17542:	4b91      	ldr	r3, [pc, #580]	; (17788 <ssd1963_flush+0x300>)
-   17544:	615a      	str	r2, [r3, #20]
+   17358:	4b94      	ldr	r3, [pc, #592]	; (175ac <ssd1963_flush+0x304>)
+   1735a:	781b      	ldrb	r3, [r3, #0]
+   1735c:	2b00      	cmp	r3, #0
+   1735e:	d105      	bne.n	1736c <ssd1963_flush+0xc4>
+   17360:	3a20      	subs	r2, #32
+   17362:	4b91      	ldr	r3, [pc, #580]	; (175a8 <ssd1963_flush+0x300>)
+   17364:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   17546:	3a1f      	subs	r2, #31
-   17548:	4b90      	ldr	r3, [pc, #576]	; (1778c <ssd1963_flush+0x304>)
-   1754a:	701a      	strb	r2, [r3, #0]
+   17366:	3a1f      	subs	r2, #31
+   17368:	4b90      	ldr	r3, [pc, #576]	; (175ac <ssd1963_flush+0x304>)
+   1736a:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   1754c:	222a      	movs	r2, #42	; 0x2a
-   1754e:	4990      	ldr	r1, [pc, #576]	; (17790 <ssd1963_flush+0x308>)
-   17550:	4890      	ldr	r0, [pc, #576]	; (17794 <ssd1963_flush+0x30c>)
-   17552:	4b91      	ldr	r3, [pc, #580]	; (17798 <ssd1963_flush+0x310>)
-   17554:	4798      	blx	r3
+   1736c:	222a      	movs	r2, #42	; 0x2a
+   1736e:	4990      	ldr	r1, [pc, #576]	; (175b0 <ssd1963_flush+0x308>)
+   17370:	4890      	ldr	r0, [pc, #576]	; (175b4 <ssd1963_flush+0x30c>)
+   17372:	4b91      	ldr	r3, [pc, #580]	; (175b8 <ssd1963_flush+0x310>)
+   17374:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   17556:	4b8c      	ldr	r3, [pc, #560]	; (17788 <ssd1963_flush+0x300>)
-   17558:	2140      	movs	r1, #64	; 0x40
-   1755a:	6199      	str	r1, [r3, #24]
+   17376:	4b8c      	ldr	r3, [pc, #560]	; (175a8 <ssd1963_flush+0x300>)
+   17378:	2140      	movs	r1, #64	; 0x40
+   1737a:	6199      	str	r1, [r3, #24]
     ssd1963_data(act_x1 >> 8);
-   1755c:	464a      	mov	r2, r9
-   1755e:	1210      	asrs	r0, r2, #8
+   1737c:	464a      	mov	r2, r9
+   1737e:	1210      	asrs	r0, r2, #8
 		port_base->OUTCLR.reg = pin_mask;
-   17560:	6159      	str	r1, [r3, #20]
+   17380:	6159      	str	r1, [r3, #20]
     if(cmd_mode != false) {
-   17562:	4b8a      	ldr	r3, [pc, #552]	; (1778c <ssd1963_flush+0x304>)
-   17564:	781b      	ldrb	r3, [r3, #0]
-   17566:	2b00      	cmp	r3, #0
-   17568:	d005      	beq.n	17576 <ssd1963_flush+0xee>
+   17382:	4b8a      	ldr	r3, [pc, #552]	; (175ac <ssd1963_flush+0x304>)
+   17384:	781b      	ldrb	r3, [r3, #0]
+   17386:	2b00      	cmp	r3, #0
+   17388:	d005      	beq.n	17396 <ssd1963_flush+0xee>
 		port_base->OUTSET.reg = pin_mask;
-   1756a:	2220      	movs	r2, #32
-   1756c:	4b86      	ldr	r3, [pc, #536]	; (17788 <ssd1963_flush+0x300>)
-   1756e:	619a      	str	r2, [r3, #24]
+   1738a:	2220      	movs	r2, #32
+   1738c:	4b86      	ldr	r3, [pc, #536]	; (175a8 <ssd1963_flush+0x300>)
+   1738e:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17570:	2200      	movs	r2, #0
-   17572:	4b86      	ldr	r3, [pc, #536]	; (1778c <ssd1963_flush+0x304>)
-   17574:	701a      	strb	r2, [r3, #0]
+   17390:	2200      	movs	r2, #0
+   17392:	4b86      	ldr	r3, [pc, #536]	; (175ac <ssd1963_flush+0x304>)
+   17394:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17576:	22ff      	movs	r2, #255	; 0xff
-   17578:	4002      	ands	r2, r0
-   1757a:	4985      	ldr	r1, [pc, #532]	; (17790 <ssd1963_flush+0x308>)
-   1757c:	4885      	ldr	r0, [pc, #532]	; (17794 <ssd1963_flush+0x30c>)
-   1757e:	4b86      	ldr	r3, [pc, #536]	; (17798 <ssd1963_flush+0x310>)
-   17580:	4798      	blx	r3
-   17582:	4b81      	ldr	r3, [pc, #516]	; (17788 <ssd1963_flush+0x300>)
-   17584:	2140      	movs	r1, #64	; 0x40
-   17586:	6199      	str	r1, [r3, #24]
+   17396:	22ff      	movs	r2, #255	; 0xff
+   17398:	4002      	ands	r2, r0
+   1739a:	4985      	ldr	r1, [pc, #532]	; (175b0 <ssd1963_flush+0x308>)
+   1739c:	4885      	ldr	r0, [pc, #532]	; (175b4 <ssd1963_flush+0x30c>)
+   1739e:	4b86      	ldr	r3, [pc, #536]	; (175b8 <ssd1963_flush+0x310>)
+   173a0:	4798      	blx	r3
+   173a2:	4b81      	ldr	r3, [pc, #516]	; (175a8 <ssd1963_flush+0x300>)
+   173a4:	2140      	movs	r1, #64	; 0x40
+   173a6:	6199      	str	r1, [r3, #24]
     ssd1963_data(0x00FF & act_x1);
-   17588:	464a      	mov	r2, r9
-   1758a:	4668      	mov	r0, sp
-   1758c:	7102      	strb	r2, [r0, #4]
-   1758e:	7902      	ldrb	r2, [r0, #4]
+   173a8:	464a      	mov	r2, r9
+   173aa:	4668      	mov	r0, sp
+   173ac:	7102      	strb	r2, [r0, #4]
+   173ae:	7902      	ldrb	r2, [r0, #4]
 		port_base->OUTCLR.reg = pin_mask;
-   17590:	6159      	str	r1, [r3, #20]
+   173b0:	6159      	str	r1, [r3, #20]
     if(cmd_mode != false) {
-   17592:	4b7e      	ldr	r3, [pc, #504]	; (1778c <ssd1963_flush+0x304>)
-   17594:	781b      	ldrb	r3, [r3, #0]
-   17596:	2b00      	cmp	r3, #0
-   17598:	d005      	beq.n	175a6 <ssd1963_flush+0x11e>
+   173b2:	4b7e      	ldr	r3, [pc, #504]	; (175ac <ssd1963_flush+0x304>)
+   173b4:	781b      	ldrb	r3, [r3, #0]
+   173b6:	2b00      	cmp	r3, #0
+   173b8:	d005      	beq.n	173c6 <ssd1963_flush+0x11e>
 		port_base->OUTSET.reg = pin_mask;
-   1759a:	3920      	subs	r1, #32
-   1759c:	4b7a      	ldr	r3, [pc, #488]	; (17788 <ssd1963_flush+0x300>)
-   1759e:	6199      	str	r1, [r3, #24]
+   173ba:	3920      	subs	r1, #32
+   173bc:	4b7a      	ldr	r3, [pc, #488]	; (175a8 <ssd1963_flush+0x300>)
+   173be:	6199      	str	r1, [r3, #24]
         cmd_mode = false;
-   175a0:	2100      	movs	r1, #0
-   175a2:	4b7a      	ldr	r3, [pc, #488]	; (1778c <ssd1963_flush+0x304>)
-   175a4:	7019      	strb	r1, [r3, #0]
+   173c0:	2100      	movs	r1, #0
+   173c2:	4b7a      	ldr	r3, [pc, #488]	; (175ac <ssd1963_flush+0x304>)
+   173c4:	7019      	strb	r1, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   175a6:	497a      	ldr	r1, [pc, #488]	; (17790 <ssd1963_flush+0x308>)
-   175a8:	487a      	ldr	r0, [pc, #488]	; (17794 <ssd1963_flush+0x30c>)
-   175aa:	4b7b      	ldr	r3, [pc, #492]	; (17798 <ssd1963_flush+0x310>)
-   175ac:	4798      	blx	r3
-   175ae:	4b76      	ldr	r3, [pc, #472]	; (17788 <ssd1963_flush+0x300>)
-   175b0:	2140      	movs	r1, #64	; 0x40
-   175b2:	6199      	str	r1, [r3, #24]
+   173c6:	497a      	ldr	r1, [pc, #488]	; (175b0 <ssd1963_flush+0x308>)
+   173c8:	487a      	ldr	r0, [pc, #488]	; (175b4 <ssd1963_flush+0x30c>)
+   173ca:	4b7b      	ldr	r3, [pc, #492]	; (175b8 <ssd1963_flush+0x310>)
+   173cc:	4798      	blx	r3
+   173ce:	4b76      	ldr	r3, [pc, #472]	; (175a8 <ssd1963_flush+0x300>)
+   173d0:	2140      	movs	r1, #64	; 0x40
+   173d2:	6199      	str	r1, [r3, #24]
     ssd1963_data(act_x2 >> 8);
-   175b4:	1228      	asrs	r0, r5, #8
+   173d4:	1228      	asrs	r0, r5, #8
 		port_base->OUTCLR.reg = pin_mask;
-   175b6:	6159      	str	r1, [r3, #20]
+   173d6:	6159      	str	r1, [r3, #20]
     if(cmd_mode != false) {
-   175b8:	4b74      	ldr	r3, [pc, #464]	; (1778c <ssd1963_flush+0x304>)
-   175ba:	781b      	ldrb	r3, [r3, #0]
-   175bc:	2b00      	cmp	r3, #0
-   175be:	d005      	beq.n	175cc <ssd1963_flush+0x144>
+   173d8:	4b74      	ldr	r3, [pc, #464]	; (175ac <ssd1963_flush+0x304>)
+   173da:	781b      	ldrb	r3, [r3, #0]
+   173dc:	2b00      	cmp	r3, #0
+   173de:	d005      	beq.n	173ec <ssd1963_flush+0x144>
 		port_base->OUTSET.reg = pin_mask;
-   175c0:	2220      	movs	r2, #32
-   175c2:	4b71      	ldr	r3, [pc, #452]	; (17788 <ssd1963_flush+0x300>)
-   175c4:	619a      	str	r2, [r3, #24]
+   173e0:	2220      	movs	r2, #32
+   173e2:	4b71      	ldr	r3, [pc, #452]	; (175a8 <ssd1963_flush+0x300>)
+   173e4:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   175c6:	2200      	movs	r2, #0
-   175c8:	4b70      	ldr	r3, [pc, #448]	; (1778c <ssd1963_flush+0x304>)
-   175ca:	701a      	strb	r2, [r3, #0]
+   173e6:	2200      	movs	r2, #0
+   173e8:	4b70      	ldr	r3, [pc, #448]	; (175ac <ssd1963_flush+0x304>)
+   173ea:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   175cc:	22ff      	movs	r2, #255	; 0xff
-   175ce:	4002      	ands	r2, r0
-   175d0:	496f      	ldr	r1, [pc, #444]	; (17790 <ssd1963_flush+0x308>)
-   175d2:	4870      	ldr	r0, [pc, #448]	; (17794 <ssd1963_flush+0x30c>)
-   175d4:	4b70      	ldr	r3, [pc, #448]	; (17798 <ssd1963_flush+0x310>)
-   175d6:	4798      	blx	r3
-   175d8:	4b6b      	ldr	r3, [pc, #428]	; (17788 <ssd1963_flush+0x300>)
-   175da:	2240      	movs	r2, #64	; 0x40
-   175dc:	619a      	str	r2, [r3, #24]
+   173ec:	22ff      	movs	r2, #255	; 0xff
+   173ee:	4002      	ands	r2, r0
+   173f0:	496f      	ldr	r1, [pc, #444]	; (175b0 <ssd1963_flush+0x308>)
+   173f2:	4870      	ldr	r0, [pc, #448]	; (175b4 <ssd1963_flush+0x30c>)
+   173f4:	4b70      	ldr	r3, [pc, #448]	; (175b8 <ssd1963_flush+0x310>)
+   173f6:	4798      	blx	r3
+   173f8:	4b6b      	ldr	r3, [pc, #428]	; (175a8 <ssd1963_flush+0x300>)
+   173fa:	2240      	movs	r2, #64	; 0x40
+   173fc:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   175de:	615a      	str	r2, [r3, #20]
+   173fe:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   175e0:	4b6a      	ldr	r3, [pc, #424]	; (1778c <ssd1963_flush+0x304>)
-   175e2:	781b      	ldrb	r3, [r3, #0]
-   175e4:	2b00      	cmp	r3, #0
-   175e6:	d005      	beq.n	175f4 <ssd1963_flush+0x16c>
+   17400:	4b6a      	ldr	r3, [pc, #424]	; (175ac <ssd1963_flush+0x304>)
+   17402:	781b      	ldrb	r3, [r3, #0]
+   17404:	2b00      	cmp	r3, #0
+   17406:	d005      	beq.n	17414 <ssd1963_flush+0x16c>
 		port_base->OUTSET.reg = pin_mask;
-   175e8:	3a20      	subs	r2, #32
-   175ea:	4b67      	ldr	r3, [pc, #412]	; (17788 <ssd1963_flush+0x300>)
-   175ec:	619a      	str	r2, [r3, #24]
+   17408:	3a20      	subs	r2, #32
+   1740a:	4b67      	ldr	r3, [pc, #412]	; (175a8 <ssd1963_flush+0x300>)
+   1740c:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   175ee:	2200      	movs	r2, #0
-   175f0:	4b66      	ldr	r3, [pc, #408]	; (1778c <ssd1963_flush+0x304>)
-   175f2:	701a      	strb	r2, [r3, #0]
+   1740e:	2200      	movs	r2, #0
+   17410:	4b66      	ldr	r3, [pc, #408]	; (175ac <ssd1963_flush+0x304>)
+   17412:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   175f4:	22ff      	movs	r2, #255	; 0xff
-   175f6:	402a      	ands	r2, r5
-   175f8:	4965      	ldr	r1, [pc, #404]	; (17790 <ssd1963_flush+0x308>)
-   175fa:	4866      	ldr	r0, [pc, #408]	; (17794 <ssd1963_flush+0x30c>)
-   175fc:	4b66      	ldr	r3, [pc, #408]	; (17798 <ssd1963_flush+0x310>)
-   175fe:	4798      	blx	r3
-   17600:	4b61      	ldr	r3, [pc, #388]	; (17788 <ssd1963_flush+0x300>)
-   17602:	2240      	movs	r2, #64	; 0x40
-   17604:	619a      	str	r2, [r3, #24]
+   17414:	22ff      	movs	r2, #255	; 0xff
+   17416:	402a      	ands	r2, r5
+   17418:	4965      	ldr	r1, [pc, #404]	; (175b0 <ssd1963_flush+0x308>)
+   1741a:	4866      	ldr	r0, [pc, #408]	; (175b4 <ssd1963_flush+0x30c>)
+   1741c:	4b66      	ldr	r3, [pc, #408]	; (175b8 <ssd1963_flush+0x310>)
+   1741e:	4798      	blx	r3
+   17420:	4b61      	ldr	r3, [pc, #388]	; (175a8 <ssd1963_flush+0x300>)
+   17422:	2240      	movs	r2, #64	; 0x40
+   17424:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   17606:	615a      	str	r2, [r3, #20]
+   17426:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   17608:	4b60      	ldr	r3, [pc, #384]	; (1778c <ssd1963_flush+0x304>)
-   1760a:	781b      	ldrb	r3, [r3, #0]
-   1760c:	2b00      	cmp	r3, #0
-   1760e:	d105      	bne.n	1761c <ssd1963_flush+0x194>
-   17610:	3a20      	subs	r2, #32
-   17612:	4b5d      	ldr	r3, [pc, #372]	; (17788 <ssd1963_flush+0x300>)
-   17614:	615a      	str	r2, [r3, #20]
+   17428:	4b60      	ldr	r3, [pc, #384]	; (175ac <ssd1963_flush+0x304>)
+   1742a:	781b      	ldrb	r3, [r3, #0]
+   1742c:	2b00      	cmp	r3, #0
+   1742e:	d105      	bne.n	1743c <ssd1963_flush+0x194>
+   17430:	3a20      	subs	r2, #32
+   17432:	4b5d      	ldr	r3, [pc, #372]	; (175a8 <ssd1963_flush+0x300>)
+   17434:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   17616:	3a1f      	subs	r2, #31
-   17618:	4b5c      	ldr	r3, [pc, #368]	; (1778c <ssd1963_flush+0x304>)
-   1761a:	701a      	strb	r2, [r3, #0]
+   17436:	3a1f      	subs	r2, #31
+   17438:	4b5c      	ldr	r3, [pc, #368]	; (175ac <ssd1963_flush+0x304>)
+   1743a:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   1761c:	222b      	movs	r2, #43	; 0x2b
-   1761e:	495c      	ldr	r1, [pc, #368]	; (17790 <ssd1963_flush+0x308>)
-   17620:	485c      	ldr	r0, [pc, #368]	; (17794 <ssd1963_flush+0x30c>)
-   17622:	4b5d      	ldr	r3, [pc, #372]	; (17798 <ssd1963_flush+0x310>)
-   17624:	4798      	blx	r3
+   1743c:	222b      	movs	r2, #43	; 0x2b
+   1743e:	495c      	ldr	r1, [pc, #368]	; (175b0 <ssd1963_flush+0x308>)
+   17440:	485c      	ldr	r0, [pc, #368]	; (175b4 <ssd1963_flush+0x30c>)
+   17442:	4b5d      	ldr	r3, [pc, #372]	; (175b8 <ssd1963_flush+0x310>)
+   17444:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   17626:	4b58      	ldr	r3, [pc, #352]	; (17788 <ssd1963_flush+0x300>)
-   17628:	2140      	movs	r1, #64	; 0x40
-   1762a:	6199      	str	r1, [r3, #24]
+   17446:	4b58      	ldr	r3, [pc, #352]	; (175a8 <ssd1963_flush+0x300>)
+   17448:	2140      	movs	r1, #64	; 0x40
+   1744a:	6199      	str	r1, [r3, #24]
     ssd1963_data(act_y1 >> 8);
-   1762c:	465a      	mov	r2, fp
-   1762e:	1210      	asrs	r0, r2, #8
+   1744c:	465a      	mov	r2, fp
+   1744e:	1210      	asrs	r0, r2, #8
 		port_base->OUTCLR.reg = pin_mask;
-   17630:	6159      	str	r1, [r3, #20]
+   17450:	6159      	str	r1, [r3, #20]
     if(cmd_mode != false) {
-   17632:	4b56      	ldr	r3, [pc, #344]	; (1778c <ssd1963_flush+0x304>)
-   17634:	781b      	ldrb	r3, [r3, #0]
-   17636:	2b00      	cmp	r3, #0
-   17638:	d005      	beq.n	17646 <ssd1963_flush+0x1be>
+   17452:	4b56      	ldr	r3, [pc, #344]	; (175ac <ssd1963_flush+0x304>)
+   17454:	781b      	ldrb	r3, [r3, #0]
+   17456:	2b00      	cmp	r3, #0
+   17458:	d005      	beq.n	17466 <ssd1963_flush+0x1be>
 		port_base->OUTSET.reg = pin_mask;
-   1763a:	2220      	movs	r2, #32
-   1763c:	4b52      	ldr	r3, [pc, #328]	; (17788 <ssd1963_flush+0x300>)
-   1763e:	619a      	str	r2, [r3, #24]
+   1745a:	2220      	movs	r2, #32
+   1745c:	4b52      	ldr	r3, [pc, #328]	; (175a8 <ssd1963_flush+0x300>)
+   1745e:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17640:	2200      	movs	r2, #0
-   17642:	4b52      	ldr	r3, [pc, #328]	; (1778c <ssd1963_flush+0x304>)
-   17644:	701a      	strb	r2, [r3, #0]
+   17460:	2200      	movs	r2, #0
+   17462:	4b52      	ldr	r3, [pc, #328]	; (175ac <ssd1963_flush+0x304>)
+   17464:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17646:	22ff      	movs	r2, #255	; 0xff
-   17648:	4002      	ands	r2, r0
-   1764a:	4951      	ldr	r1, [pc, #324]	; (17790 <ssd1963_flush+0x308>)
-   1764c:	4851      	ldr	r0, [pc, #324]	; (17794 <ssd1963_flush+0x30c>)
-   1764e:	4b52      	ldr	r3, [pc, #328]	; (17798 <ssd1963_flush+0x310>)
-   17650:	4798      	blx	r3
-   17652:	4b4d      	ldr	r3, [pc, #308]	; (17788 <ssd1963_flush+0x300>)
-   17654:	2140      	movs	r1, #64	; 0x40
-   17656:	6199      	str	r1, [r3, #24]
+   17466:	22ff      	movs	r2, #255	; 0xff
+   17468:	4002      	ands	r2, r0
+   1746a:	4951      	ldr	r1, [pc, #324]	; (175b0 <ssd1963_flush+0x308>)
+   1746c:	4851      	ldr	r0, [pc, #324]	; (175b4 <ssd1963_flush+0x30c>)
+   1746e:	4b52      	ldr	r3, [pc, #328]	; (175b8 <ssd1963_flush+0x310>)
+   17470:	4798      	blx	r3
+   17472:	4b4d      	ldr	r3, [pc, #308]	; (175a8 <ssd1963_flush+0x300>)
+   17474:	2140      	movs	r1, #64	; 0x40
+   17476:	6199      	str	r1, [r3, #24]
     ssd1963_data(0x00FF & act_y1);
-   17658:	b2e2      	uxtb	r2, r4
+   17478:	b2e2      	uxtb	r2, r4
 		port_base->OUTCLR.reg = pin_mask;
-   1765a:	6159      	str	r1, [r3, #20]
+   1747a:	6159      	str	r1, [r3, #20]
     if(cmd_mode != false) {
-   1765c:	4b4b      	ldr	r3, [pc, #300]	; (1778c <ssd1963_flush+0x304>)
-   1765e:	781b      	ldrb	r3, [r3, #0]
-   17660:	2b00      	cmp	r3, #0
-   17662:	d005      	beq.n	17670 <ssd1963_flush+0x1e8>
+   1747c:	4b4b      	ldr	r3, [pc, #300]	; (175ac <ssd1963_flush+0x304>)
+   1747e:	781b      	ldrb	r3, [r3, #0]
+   17480:	2b00      	cmp	r3, #0
+   17482:	d005      	beq.n	17490 <ssd1963_flush+0x1e8>
 		port_base->OUTSET.reg = pin_mask;
-   17664:	3920      	subs	r1, #32
-   17666:	4b48      	ldr	r3, [pc, #288]	; (17788 <ssd1963_flush+0x300>)
-   17668:	6199      	str	r1, [r3, #24]
+   17484:	3920      	subs	r1, #32
+   17486:	4b48      	ldr	r3, [pc, #288]	; (175a8 <ssd1963_flush+0x300>)
+   17488:	6199      	str	r1, [r3, #24]
         cmd_mode = false;
-   1766a:	2100      	movs	r1, #0
-   1766c:	4b47      	ldr	r3, [pc, #284]	; (1778c <ssd1963_flush+0x304>)
-   1766e:	7019      	strb	r1, [r3, #0]
+   1748a:	2100      	movs	r1, #0
+   1748c:	4b47      	ldr	r3, [pc, #284]	; (175ac <ssd1963_flush+0x304>)
+   1748e:	7019      	strb	r1, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17670:	4947      	ldr	r1, [pc, #284]	; (17790 <ssd1963_flush+0x308>)
-   17672:	4848      	ldr	r0, [pc, #288]	; (17794 <ssd1963_flush+0x30c>)
-   17674:	4b48      	ldr	r3, [pc, #288]	; (17798 <ssd1963_flush+0x310>)
-   17676:	4798      	blx	r3
-   17678:	4b43      	ldr	r3, [pc, #268]	; (17788 <ssd1963_flush+0x300>)
-   1767a:	2140      	movs	r1, #64	; 0x40
-   1767c:	6199      	str	r1, [r3, #24]
+   17490:	4947      	ldr	r1, [pc, #284]	; (175b0 <ssd1963_flush+0x308>)
+   17492:	4848      	ldr	r0, [pc, #288]	; (175b4 <ssd1963_flush+0x30c>)
+   17494:	4b48      	ldr	r3, [pc, #288]	; (175b8 <ssd1963_flush+0x310>)
+   17496:	4798      	blx	r3
+   17498:	4b43      	ldr	r3, [pc, #268]	; (175a8 <ssd1963_flush+0x300>)
+   1749a:	2140      	movs	r1, #64	; 0x40
+   1749c:	6199      	str	r1, [r3, #24]
     ssd1963_data(act_y2 >> 8);
-   1767e:	4652      	mov	r2, sl
-   17680:	1210      	asrs	r0, r2, #8
+   1749e:	4652      	mov	r2, sl
+   174a0:	1210      	asrs	r0, r2, #8
 		port_base->OUTCLR.reg = pin_mask;
-   17682:	6159      	str	r1, [r3, #20]
+   174a2:	6159      	str	r1, [r3, #20]
     if(cmd_mode != false) {
-   17684:	4b41      	ldr	r3, [pc, #260]	; (1778c <ssd1963_flush+0x304>)
-   17686:	781b      	ldrb	r3, [r3, #0]
-   17688:	2b00      	cmp	r3, #0
-   1768a:	d005      	beq.n	17698 <ssd1963_flush+0x210>
+   174a4:	4b41      	ldr	r3, [pc, #260]	; (175ac <ssd1963_flush+0x304>)
+   174a6:	781b      	ldrb	r3, [r3, #0]
+   174a8:	2b00      	cmp	r3, #0
+   174aa:	d005      	beq.n	174b8 <ssd1963_flush+0x210>
 		port_base->OUTSET.reg = pin_mask;
-   1768c:	2220      	movs	r2, #32
-   1768e:	4b3e      	ldr	r3, [pc, #248]	; (17788 <ssd1963_flush+0x300>)
-   17690:	619a      	str	r2, [r3, #24]
+   174ac:	2220      	movs	r2, #32
+   174ae:	4b3e      	ldr	r3, [pc, #248]	; (175a8 <ssd1963_flush+0x300>)
+   174b0:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   17692:	2200      	movs	r2, #0
-   17694:	4b3d      	ldr	r3, [pc, #244]	; (1778c <ssd1963_flush+0x304>)
-   17696:	701a      	strb	r2, [r3, #0]
+   174b2:	2200      	movs	r2, #0
+   174b4:	4b3d      	ldr	r3, [pc, #244]	; (175ac <ssd1963_flush+0x304>)
+   174b6:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   17698:	22ff      	movs	r2, #255	; 0xff
-   1769a:	4002      	ands	r2, r0
-   1769c:	493c      	ldr	r1, [pc, #240]	; (17790 <ssd1963_flush+0x308>)
-   1769e:	483d      	ldr	r0, [pc, #244]	; (17794 <ssd1963_flush+0x30c>)
-   176a0:	4b3d      	ldr	r3, [pc, #244]	; (17798 <ssd1963_flush+0x310>)
-   176a2:	4798      	blx	r3
-   176a4:	4b38      	ldr	r3, [pc, #224]	; (17788 <ssd1963_flush+0x300>)
-   176a6:	2240      	movs	r2, #64	; 0x40
-   176a8:	619a      	str	r2, [r3, #24]
+   174b8:	22ff      	movs	r2, #255	; 0xff
+   174ba:	4002      	ands	r2, r0
+   174bc:	493c      	ldr	r1, [pc, #240]	; (175b0 <ssd1963_flush+0x308>)
+   174be:	483d      	ldr	r0, [pc, #244]	; (175b4 <ssd1963_flush+0x30c>)
+   174c0:	4b3d      	ldr	r3, [pc, #244]	; (175b8 <ssd1963_flush+0x310>)
+   174c2:	4798      	blx	r3
+   174c4:	4b38      	ldr	r3, [pc, #224]	; (175a8 <ssd1963_flush+0x300>)
+   174c6:	2240      	movs	r2, #64	; 0x40
+   174c8:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   176aa:	615a      	str	r2, [r3, #20]
+   174ca:	615a      	str	r2, [r3, #20]
     if(cmd_mode != false) {
-   176ac:	4b37      	ldr	r3, [pc, #220]	; (1778c <ssd1963_flush+0x304>)
-   176ae:	781b      	ldrb	r3, [r3, #0]
-   176b0:	2b00      	cmp	r3, #0
-   176b2:	d005      	beq.n	176c0 <ssd1963_flush+0x238>
+   174cc:	4b37      	ldr	r3, [pc, #220]	; (175ac <ssd1963_flush+0x304>)
+   174ce:	781b      	ldrb	r3, [r3, #0]
+   174d0:	2b00      	cmp	r3, #0
+   174d2:	d005      	beq.n	174e0 <ssd1963_flush+0x238>
 		port_base->OUTSET.reg = pin_mask;
-   176b4:	3a20      	subs	r2, #32
-   176b6:	4b34      	ldr	r3, [pc, #208]	; (17788 <ssd1963_flush+0x300>)
-   176b8:	619a      	str	r2, [r3, #24]
+   174d4:	3a20      	subs	r2, #32
+   174d6:	4b34      	ldr	r3, [pc, #208]	; (175a8 <ssd1963_flush+0x300>)
+   174d8:	619a      	str	r2, [r3, #24]
         cmd_mode = false;
-   176ba:	2200      	movs	r2, #0
-   176bc:	4b33      	ldr	r3, [pc, #204]	; (1778c <ssd1963_flush+0x304>)
-   176be:	701a      	strb	r2, [r3, #0]
+   174da:	2200      	movs	r2, #0
+   174dc:	4b33      	ldr	r3, [pc, #204]	; (175ac <ssd1963_flush+0x304>)
+   174de:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(data);
-   176c0:	22ff      	movs	r2, #255	; 0xff
-   176c2:	4653      	mov	r3, sl
-   176c4:	401a      	ands	r2, r3
-   176c6:	4932      	ldr	r1, [pc, #200]	; (17790 <ssd1963_flush+0x308>)
-   176c8:	4832      	ldr	r0, [pc, #200]	; (17794 <ssd1963_flush+0x30c>)
-   176ca:	4b33      	ldr	r3, [pc, #204]	; (17798 <ssd1963_flush+0x310>)
-   176cc:	4798      	blx	r3
-   176ce:	4b2e      	ldr	r3, [pc, #184]	; (17788 <ssd1963_flush+0x300>)
-   176d0:	2240      	movs	r2, #64	; 0x40
-   176d2:	619a      	str	r2, [r3, #24]
+   174e0:	22ff      	movs	r2, #255	; 0xff
+   174e2:	4653      	mov	r3, sl
+   174e4:	401a      	ands	r2, r3
+   174e6:	4932      	ldr	r1, [pc, #200]	; (175b0 <ssd1963_flush+0x308>)
+   174e8:	4832      	ldr	r0, [pc, #200]	; (175b4 <ssd1963_flush+0x30c>)
+   174ea:	4b33      	ldr	r3, [pc, #204]	; (175b8 <ssd1963_flush+0x310>)
+   174ec:	4798      	blx	r3
+   174ee:	4b2e      	ldr	r3, [pc, #184]	; (175a8 <ssd1963_flush+0x300>)
+   174f0:	2240      	movs	r2, #64	; 0x40
+   174f2:	619a      	str	r2, [r3, #24]
 		port_base->OUTCLR.reg = pin_mask;
-   176d4:	615a      	str	r2, [r3, #20]
+   174f4:	615a      	str	r2, [r3, #20]
     if(cmd_mode == false) {
-   176d6:	4b2d      	ldr	r3, [pc, #180]	; (1778c <ssd1963_flush+0x304>)
-   176d8:	781b      	ldrb	r3, [r3, #0]
-   176da:	2b00      	cmp	r3, #0
-   176dc:	d105      	bne.n	176ea <ssd1963_flush+0x262>
-   176de:	3a20      	subs	r2, #32
-   176e0:	4b29      	ldr	r3, [pc, #164]	; (17788 <ssd1963_flush+0x300>)
-   176e2:	615a      	str	r2, [r3, #20]
+   174f6:	4b2d      	ldr	r3, [pc, #180]	; (175ac <ssd1963_flush+0x304>)
+   174f8:	781b      	ldrb	r3, [r3, #0]
+   174fa:	2b00      	cmp	r3, #0
+   174fc:	d105      	bne.n	1750a <ssd1963_flush+0x262>
+   174fe:	3a20      	subs	r2, #32
+   17500:	4b29      	ldr	r3, [pc, #164]	; (175a8 <ssd1963_flush+0x300>)
+   17502:	615a      	str	r2, [r3, #20]
         cmd_mode = true;
-   176e4:	3a1f      	subs	r2, #31
-   176e6:	4b29      	ldr	r3, [pc, #164]	; (1778c <ssd1963_flush+0x304>)
-   176e8:	701a      	strb	r2, [r3, #0]
+   17504:	3a1f      	subs	r2, #31
+   17506:	4b29      	ldr	r3, [pc, #164]	; (175ac <ssd1963_flush+0x304>)
+   17508:	701a      	strb	r2, [r3, #0]
     LV_DRV_DISP_PAR_WR_WORD(cmd);
-   176ea:	222c      	movs	r2, #44	; 0x2c
-   176ec:	4928      	ldr	r1, [pc, #160]	; (17790 <ssd1963_flush+0x308>)
-   176ee:	4829      	ldr	r0, [pc, #164]	; (17794 <ssd1963_flush+0x30c>)
-   176f0:	4b29      	ldr	r3, [pc, #164]	; (17798 <ssd1963_flush+0x310>)
-   176f2:	4798      	blx	r3
+   1750a:	222c      	movs	r2, #44	; 0x2c
+   1750c:	4928      	ldr	r1, [pc, #160]	; (175b0 <ssd1963_flush+0x308>)
+   1750e:	4829      	ldr	r0, [pc, #164]	; (175b4 <ssd1963_flush+0x30c>)
+   17510:	4b29      	ldr	r3, [pc, #164]	; (175b8 <ssd1963_flush+0x310>)
+   17512:	4798      	blx	r3
 		port_base->OUTSET.reg = pin_mask;
-   176f4:	2240      	movs	r2, #64	; 0x40
-   176f6:	4b24      	ldr	r3, [pc, #144]	; (17788 <ssd1963_flush+0x300>)
-   176f8:	619a      	str	r2, [r3, #24]
+   17514:	2240      	movs	r2, #64	; 0x40
+   17516:	4b24      	ldr	r3, [pc, #144]	; (175a8 <ssd1963_flush+0x300>)
+   17518:	619a      	str	r2, [r3, #24]
     uint16_t full_w = area->x2 - area->x1 + 1;
-   176fa:	88bb      	ldrh	r3, [r7, #4]
-   176fc:	3301      	adds	r3, #1
-   176fe:	883a      	ldrh	r2, [r7, #0]
-   17700:	1a9b      	subs	r3, r3, r2
-   17702:	b29f      	uxth	r7, r3
+   1751a:	88bb      	ldrh	r3, [r7, #4]
+   1751c:	3301      	adds	r3, #1
+   1751e:	883a      	ldrh	r2, [r7, #0]
+   17520:	1a9b      	subs	r3, r3, r2
+   17522:	b29f      	uxth	r7, r3
     if(cmd_mode != false) {
-   17704:	4a21      	ldr	r2, [pc, #132]	; (1778c <ssd1963_flush+0x304>)
-   17706:	7812      	ldrb	r2, [r2, #0]
-   17708:	2a00      	cmp	r2, #0
-   1770a:	d005      	beq.n	17718 <ssd1963_flush+0x290>
-   1770c:	2120      	movs	r1, #32
-   1770e:	4a1e      	ldr	r2, [pc, #120]	; (17788 <ssd1963_flush+0x300>)
-   17710:	6191      	str	r1, [r2, #24]
+   17524:	4a21      	ldr	r2, [pc, #132]	; (175ac <ssd1963_flush+0x304>)
+   17526:	7812      	ldrb	r2, [r2, #0]
+   17528:	2a00      	cmp	r2, #0
+   1752a:	d005      	beq.n	17538 <ssd1963_flush+0x290>
+   1752c:	2120      	movs	r1, #32
+   1752e:	4a1e      	ldr	r2, [pc, #120]	; (175a8 <ssd1963_flush+0x300>)
+   17530:	6191      	str	r1, [r2, #24]
         cmd_mode = false;
-   17712:	2100      	movs	r1, #0
-   17714:	4a1d      	ldr	r2, [pc, #116]	; (1778c <ssd1963_flush+0x304>)
-   17716:	7011      	strb	r1, [r2, #0]
+   17532:	2100      	movs	r1, #0
+   17534:	4a1d      	ldr	r2, [pc, #116]	; (175ac <ssd1963_flush+0x304>)
+   17536:	7011      	strb	r1, [r2, #0]
 		port_base->OUTCLR.reg = pin_mask;
-   17718:	2140      	movs	r1, #64	; 0x40
-   1771a:	4a1b      	ldr	r2, [pc, #108]	; (17788 <ssd1963_flush+0x300>)
-   1771c:	6151      	str	r1, [r2, #20]
+   17538:	2140      	movs	r1, #64	; 0x40
+   1753a:	4a1b      	ldr	r2, [pc, #108]	; (175a8 <ssd1963_flush+0x300>)
+   1753c:	6151      	str	r1, [r2, #20]
     uint16_t act_w = act_x2 - act_x1 + 1;
-   1771e:	464b      	mov	r3, r9
-   17720:	1aed      	subs	r5, r5, r3
-   17722:	3501      	adds	r5, #1
-   17724:	b2ad      	uxth	r5, r5
+   1753e:	464b      	mov	r3, r9
+   17540:	1aed      	subs	r5, r5, r3
+   17542:	3501      	adds	r5, #1
+   17544:	b2ad      	uxth	r5, r5
     for(i = act_y1; i <= act_y2; i++) {
-   17726:	45da      	cmp	sl, fp
-   17728:	db0f      	blt.n	1774a <ssd1963_flush+0x2c2>
+   17546:	45da      	cmp	sl, fp
+   17548:	db0f      	blt.n	1756a <ssd1963_flush+0x2c2>
         color_p += full_w;
-   1772a:	007f      	lsls	r7, r7, #1
+   1754a:	007f      	lsls	r7, r7, #1
         LV_DRV_DISP_PAR_WR_ARRAY((uint16_t *)color_p, act_w);
-   1772c:	4b1b      	ldr	r3, [pc, #108]	; (1779c <ssd1963_flush+0x314>)
-   1772e:	4698      	mov	r8, r3
-   17730:	9501      	str	r5, [sp, #4]
-   17732:	003d      	movs	r5, r7
-   17734:	4657      	mov	r7, sl
-   17736:	9b01      	ldr	r3, [sp, #4]
-   17738:	0032      	movs	r2, r6
-   1773a:	4915      	ldr	r1, [pc, #84]	; (17790 <ssd1963_flush+0x308>)
-   1773c:	4815      	ldr	r0, [pc, #84]	; (17794 <ssd1963_flush+0x30c>)
-   1773e:	47c0      	blx	r8
+   1754c:	4b1b      	ldr	r3, [pc, #108]	; (175bc <ssd1963_flush+0x314>)
+   1754e:	4698      	mov	r8, r3
+   17550:	9501      	str	r5, [sp, #4]
+   17552:	003d      	movs	r5, r7
+   17554:	4657      	mov	r7, sl
+   17556:	9b01      	ldr	r3, [sp, #4]
+   17558:	0032      	movs	r2, r6
+   1755a:	4915      	ldr	r1, [pc, #84]	; (175b0 <ssd1963_flush+0x308>)
+   1755c:	4815      	ldr	r0, [pc, #84]	; (175b4 <ssd1963_flush+0x30c>)
+   1755e:	47c0      	blx	r8
         color_p += full_w;
-   17740:	1976      	adds	r6, r6, r5
-   17742:	3401      	adds	r4, #1
-   17744:	b224      	sxth	r4, r4
+   17560:	1976      	adds	r6, r6, r5
+   17562:	3401      	adds	r4, #1
+   17564:	b224      	sxth	r4, r4
     for(i = act_y1; i <= act_y2; i++) {
-   17746:	42a7      	cmp	r7, r4
-   17748:	daf5      	bge.n	17736 <ssd1963_flush+0x2ae>
+   17566:	42a7      	cmp	r7, r4
+   17568:	daf5      	bge.n	17556 <ssd1963_flush+0x2ae>
 		port_base->OUTSET.reg = pin_mask;
-   1774a:	2240      	movs	r2, #64	; 0x40
-   1774c:	4b0e      	ldr	r3, [pc, #56]	; (17788 <ssd1963_flush+0x300>)
-   1774e:	619a      	str	r2, [r3, #24]
+   1756a:	2240      	movs	r2, #64	; 0x40
+   1756c:	4b0e      	ldr	r3, [pc, #56]	; (175a8 <ssd1963_flush+0x300>)
+   1756e:	619a      	str	r2, [r3, #24]
     lv_disp_flush_ready(disp_drv);
-   17750:	9800      	ldr	r0, [sp, #0]
-   17752:	4b13      	ldr	r3, [pc, #76]	; (177a0 <ssd1963_flush+0x318>)
-   17754:	4798      	blx	r3
-   17756:	e6b2      	b.n	174be <ssd1963_flush+0x36>
+   17570:	9800      	ldr	r0, [sp, #0]
+   17572:	4b13      	ldr	r3, [pc, #76]	; (175c0 <ssd1963_flush+0x318>)
+   17574:	4798      	blx	r3
+   17576:	e6b2      	b.n	172de <ssd1963_flush+0x36>
     int32_t act_x1 = area->x1 < 0 ? 0 : area->x1;
-   17758:	2500      	movs	r5, #0
-   1775a:	e6c6      	b.n	174ea <ssd1963_flush+0x62>
+   17578:	2500      	movs	r5, #0
+   1757a:	e6c6      	b.n	1730a <ssd1963_flush+0x62>
     int32_t act_y1 = area->y1 < 0 ? 0 : area->y1;
-   1775c:	2400      	movs	r4, #0
-   1775e:	e6cc      	b.n	174fa <ssd1963_flush+0x72>
+   1757c:	2400      	movs	r4, #0
+   1757e:	e6cc      	b.n	1731a <ssd1963_flush+0x72>
     int32_t act_x2 = area->x2 > SSD1963_HOR_RES - 1 ? SSD1963_HOR_RES - 1 : area->x2;
-   17760:	4b06      	ldr	r3, [pc, #24]	; (1777c <ssd1963_flush+0x2f4>)
-   17762:	4798      	blx	r3
-   17764:	4b06      	ldr	r3, [pc, #24]	; (17780 <ssd1963_flush+0x2f8>)
-   17766:	4798      	blx	r3
-   17768:	1e45      	subs	r5, r0, #1
-   1776a:	e6d4      	b.n	17516 <ssd1963_flush+0x8e>
+   17580:	4b06      	ldr	r3, [pc, #24]	; (1759c <ssd1963_flush+0x2f4>)
+   17582:	4798      	blx	r3
+   17584:	4b06      	ldr	r3, [pc, #24]	; (175a0 <ssd1963_flush+0x2f8>)
+   17586:	4798      	blx	r3
+   17588:	1e45      	subs	r5, r0, #1
+   1758a:	e6d4      	b.n	17336 <ssd1963_flush+0x8e>
     int32_t act_y2 = area->y2 > SSD1963_VER_RES - 1 ? SSD1963_VER_RES - 1 : area->y2;
-   1776c:	4b03      	ldr	r3, [pc, #12]	; (1777c <ssd1963_flush+0x2f4>)
-   1776e:	4798      	blx	r3
-   17770:	4b04      	ldr	r3, [pc, #16]	; (17784 <ssd1963_flush+0x2fc>)
-   17772:	4798      	blx	r3
-   17774:	1e43      	subs	r3, r0, #1
-   17776:	469a      	mov	sl, r3
-   17778:	e6db      	b.n	17532 <ssd1963_flush+0xaa>
-   1777a:	46c0      	nop			; (mov r8, r8)
-   1777c:	0000f609 	.word	0x0000f609
-   17780:	0000f615 	.word	0x0000f615
-   17784:	0000f63d 	.word	0x0000f63d
-   17788:	41004400 	.word	0x41004400
-   1778c:	2000005c 	.word	0x2000005c
-   17790:	1c03c3f7 	.word	0x1c03c3f7
-   17794:	41004480 	.word	0x41004480
-   17798:	00017815 	.word	0x00017815
-   1779c:	0001782d 	.word	0x0001782d
-   177a0:	0000f6d9 	.word	0x0000f6d9
-
-000177a4 <p_gpio_init>:
+   1758c:	4b03      	ldr	r3, [pc, #12]	; (1759c <ssd1963_flush+0x2f4>)
+   1758e:	4798      	blx	r3
+   17590:	4b04      	ldr	r3, [pc, #16]	; (175a4 <ssd1963_flush+0x2fc>)
+   17592:	4798      	blx	r3
+   17594:	1e43      	subs	r3, r0, #1
+   17596:	469a      	mov	sl, r3
+   17598:	e6db      	b.n	17352 <ssd1963_flush+0xaa>
+   1759a:	46c0      	nop			; (mov r8, r8)
+   1759c:	0000f609 	.word	0x0000f609
+   175a0:	0000f615 	.word	0x0000f615
+   175a4:	0000f63d 	.word	0x0000f63d
+   175a8:	41004400 	.word	0x41004400
+   175ac:	2000005c 	.word	0x2000005c
+   175b0:	0000ffff 	.word	0x0000ffff
+   175b4:	41004480 	.word	0x41004480
+   175b8:	00017635 	.word	0x00017635
+   175bc:	000176bd 	.word	0x000176bd
+   175c0:	0000f6d9 	.word	0x0000f6d9
+
+000175c4 <p_gpio_init>:
 #include "p_gpio.h"
 
 void p_gpio_init(void)
 {
-   177a4:	b530      	push	{r4, r5, lr}
-   177a6:	b083      	sub	sp, #12
+   175c4:	b530      	push	{r4, r5, lr}
+   175c6:	b083      	sub	sp, #12
 	config->powersave  = false;
-   177a8:	aa01      	add	r2, sp, #4
-   177aa:	2400      	movs	r4, #0
-   177ac:	7094      	strb	r4, [r2, #2]
+   175c8:	aa01      	add	r2, sp, #4
+   175ca:	2400      	movs	r4, #0
+   175cc:	7094      	strb	r4, [r2, #2]
 	struct port_config data_port_config;
 	port_get_config_defaults(&data_port_config);
 	data_port_config.direction = SSD1963_TFT_DATA_DIR;
-   177ae:	2501      	movs	r5, #1
-   177b0:	7015      	strb	r5, [r2, #0]
+   175ce:	2501      	movs	r5, #1
+   175d0:	7015      	strb	r5, [r2, #0]
 	data_port_config.input_pull = SSD1963_TFT_DATA_PULL;
-   177b2:	7054      	strb	r4, [r2, #1]
+   175d2:	7054      	strb	r4, [r2, #1]
 	port_group_set_config(SSD1963_TFT_DATA_PORT, SSD1963_TFT_DATA_MASK, &data_port_config);
-   177b4:	4912      	ldr	r1, [pc, #72]	; (17800 <p_gpio_init+0x5c>)
-   177b6:	4813      	ldr	r0, [pc, #76]	; (17804 <p_gpio_init+0x60>)
-   177b8:	4b13      	ldr	r3, [pc, #76]	; (17808 <p_gpio_init+0x64>)
-   177ba:	4798      	blx	r3
-   177bc:	466b      	mov	r3, sp
-   177be:	709c      	strb	r4, [r3, #2]
+   175d4:	4912      	ldr	r1, [pc, #72]	; (17620 <p_gpio_init+0x5c>)
+   175d6:	4813      	ldr	r0, [pc, #76]	; (17624 <p_gpio_init+0x60>)
+   175d8:	4b13      	ldr	r3, [pc, #76]	; (17628 <p_gpio_init+0x64>)
+   175da:	4798      	blx	r3
+   175dc:	466b      	mov	r3, sp
+   175de:	709c      	strb	r4, [r3, #2]
 	
 	struct port_config ssd1963_ctrl_pins_conf;
 	port_get_config_defaults(&ssd1963_ctrl_pins_conf);
 	ssd1963_ctrl_pins_conf.input_pull = PORT_PIN_PULL_NONE;
-   177c0:	705c      	strb	r4, [r3, #1]
+   175e0:	705c      	strb	r4, [r3, #1]
 	ssd1963_ctrl_pins_conf.direction = PORT_PIN_DIR_OUTPUT;
-   177c2:	701d      	strb	r5, [r3, #0]
+   175e2:	701d      	strb	r5, [r3, #0]
 	
 	port_pin_set_config(SSD1963_TFT_nRST, &ssd1963_ctrl_pins_conf);
-   177c4:	4669      	mov	r1, sp
-   177c6:	2004      	movs	r0, #4
-   177c8:	4c10      	ldr	r4, [pc, #64]	; (1780c <p_gpio_init+0x68>)
-   177ca:	47a0      	blx	r4
+   175e4:	4669      	mov	r1, sp
+   175e6:	2004      	movs	r0, #4
+   175e8:	4c10      	ldr	r4, [pc, #64]	; (1762c <p_gpio_init+0x68>)
+   175ea:	47a0      	blx	r4
 	port_pin_set_config(SSD1963_TFT_RSDC, &ssd1963_ctrl_pins_conf);
-   177cc:	4669      	mov	r1, sp
-   177ce:	2005      	movs	r0, #5
-   177d0:	47a0      	blx	r4
+   175ec:	4669      	mov	r1, sp
+   175ee:	2005      	movs	r0, #5
+   175f0:	47a0      	blx	r4
 	port_pin_set_config(SSD1963_TFT_nCS, &ssd1963_ctrl_pins_conf);
-   177d2:	4669      	mov	r1, sp
-   177d4:	2006      	movs	r0, #6
-   177d6:	47a0      	blx	r4
+   175f2:	4669      	mov	r1, sp
+   175f4:	2006      	movs	r0, #6
+   175f6:	47a0      	blx	r4
 	port_pin_set_config(SSD1963_TFT_WR, &ssd1963_ctrl_pins_conf);
-   177d8:	4669      	mov	r1, sp
-   177da:	2007      	movs	r0, #7
-   177dc:	47a0      	blx	r4
+   175f8:	4669      	mov	r1, sp
+   175fa:	2007      	movs	r0, #7
+   175fc:	47a0      	blx	r4
 	port_pin_set_config(SSD1963_TFT_RD, &ssd1963_ctrl_pins_conf);
-   177de:	4669      	mov	r1, sp
-   177e0:	200a      	movs	r0, #10
-   177e2:	47a0      	blx	r4
+   175fe:	4669      	mov	r1, sp
+   17600:	200a      	movs	r0, #10
+   17602:	47a0      	blx	r4
 		port_base->OUTSET.reg = pin_mask;
-   177e4:	4b0a      	ldr	r3, [pc, #40]	; (17810 <p_gpio_init+0x6c>)
-   177e6:	2210      	movs	r2, #16
-   177e8:	619a      	str	r2, [r3, #24]
-   177ea:	3210      	adds	r2, #16
-   177ec:	619a      	str	r2, [r3, #24]
-   177ee:	3220      	adds	r2, #32
-   177f0:	619a      	str	r2, [r3, #24]
-   177f2:	3240      	adds	r2, #64	; 0x40
-   177f4:	619a      	str	r2, [r3, #24]
-   177f6:	2280      	movs	r2, #128	; 0x80
-   177f8:	00d2      	lsls	r2, r2, #3
-   177fa:	619a      	str	r2, [r3, #24]
+   17604:	4b0a      	ldr	r3, [pc, #40]	; (17630 <p_gpio_init+0x6c>)
+   17606:	2210      	movs	r2, #16
+   17608:	619a      	str	r2, [r3, #24]
+   1760a:	3210      	adds	r2, #16
+   1760c:	619a      	str	r2, [r3, #24]
+   1760e:	3220      	adds	r2, #32
+   17610:	619a      	str	r2, [r3, #24]
+   17612:	3240      	adds	r2, #64	; 0x40
+   17614:	619a      	str	r2, [r3, #24]
+   17616:	2280      	movs	r2, #128	; 0x80
+   17618:	00d2      	lsls	r2, r2, #3
+   1761a:	619a      	str	r2, [r3, #24]
 	port_pin_set_output_level(SSD1963_TFT_nRST, 1);
 	port_pin_set_output_level(SSD1963_TFT_RSDC, 1);
 	port_pin_set_output_level(SSD1963_TFT_nCS, 1);
 	port_pin_set_output_level(SSD1963_TFT_WR, 1);
 	port_pin_set_output_level(SSD1963_TFT_RD, 1);
 }
-   177fc:	b003      	add	sp, #12
-   177fe:	bd30      	pop	{r4, r5, pc}
-   17800:	1c03c3f7 	.word	0x1c03c3f7
-   17804:	41004480 	.word	0x41004480
-   17808:	00000d79 	.word	0x00000d79
-   1780c:	00000d55 	.word	0x00000d55
-   17810:	41004400 	.word	0x41004400
+   1761c:	b003      	add	sp, #12
+   1761e:	bd30      	pop	{r4, r5, pc}
+   17620:	0000ffff 	.word	0x0000ffff
+   17624:	41004480 	.word	0x41004480
+   17628:	00000d79 	.word	0x00000d79
+   1762c:	00000d55 	.word	0x00000d55
+   17630:	41004400 	.word	0x41004400
 
-00017814 <p_gpio_parallel_wr_word>:
+00017634 <p_gpio_parallel_wr_word>:
+
+
+void p_gpio_parallel_wr_word(PortGroup* group, uint32_t mask, uint32_t data)
+{
+   17634:	b5f0      	push	{r4, r5, r6, r7, lr}
+   17636:	46d6      	mov	lr, sl
+   17638:	464f      	mov	r7, r9
+   1763a:	4646      	mov	r6, r8
+   1763c:	b5c0      	push	{r6, r7, lr}
 	port->OUTSET.reg = (mask &  level_mask);
-   17814:	0013      	movs	r3, r2
-   17816:	400b      	ands	r3, r1
-   17818:	6183      	str	r3, [r0, #24]
+   1763e:	0013      	movs	r3, r2
+   17640:	400b      	ands	r3, r1
+   17642:	6183      	str	r3, [r0, #24]
 	port->OUTCLR.reg = (mask & ~level_mask);
-   1781a:	4391      	bics	r1, r2
-   1781c:	6141      	str	r1, [r0, #20]
+   17644:	4391      	bics	r1, r2
+   17646:	6141      	str	r1, [r0, #20]
 		port_base->OUTCLR.reg = pin_mask;
-   1781e:	4b02      	ldr	r3, [pc, #8]	; (17828 <p_gpio_parallel_wr_word+0x14>)
-   17820:	2280      	movs	r2, #128	; 0x80
-   17822:	615a      	str	r2, [r3, #20]
-		port_base->OUTSET.reg = pin_mask;
-   17824:	619a      	str	r2, [r3, #24]
-void p_gpio_parallel_wr_word(PortGroup* group, uint32_t mask, uint32_t data)
-{
+   17648:	4b16      	ldr	r3, [pc, #88]	; (176a4 <p_gpio_parallel_wr_word+0x70>)
+   1764a:	4699      	mov	r9, r3
+   1764c:	2380      	movs	r3, #128	; 0x80
+   1764e:	469a      	mov	sl, r3
+   17650:	464b      	mov	r3, r9
+   17652:	4652      	mov	r2, sl
+   17654:	615a      	str	r2, [r3, #20]
 	port_group_set_output_level(group, mask, data);
 	port_pin_set_output_level(SSD1963_TFT_WR, 0);
+	delay_us(1);
+   17656:	2000      	movs	r0, #0
+   17658:	4b13      	ldr	r3, [pc, #76]	; (176a8 <p_gpio_parallel_wr_word+0x74>)
+   1765a:	4698      	mov	r8, r3
+   1765c:	4798      	blx	r3
+   1765e:	0002      	movs	r2, r0
+   17660:	2300      	movs	r3, #0
+   17662:	4c12      	ldr	r4, [pc, #72]	; (176ac <p_gpio_parallel_wr_word+0x78>)
+   17664:	2500      	movs	r5, #0
+   17666:	1912      	adds	r2, r2, r4
+   17668:	416b      	adcs	r3, r5
+   1766a:	0010      	movs	r0, r2
+   1766c:	0019      	movs	r1, r3
+   1766e:	4f10      	ldr	r7, [pc, #64]	; (176b0 <p_gpio_parallel_wr_word+0x7c>)
+   17670:	4a10      	ldr	r2, [pc, #64]	; (176b4 <p_gpio_parallel_wr_word+0x80>)
+   17672:	2300      	movs	r3, #0
+   17674:	47b8      	blx	r7
+   17676:	4e10      	ldr	r6, [pc, #64]	; (176b8 <p_gpio_parallel_wr_word+0x84>)
+   17678:	47b0      	blx	r6
+		port_base->OUTSET.reg = pin_mask;
+   1767a:	464b      	mov	r3, r9
+   1767c:	4652      	mov	r2, sl
+   1767e:	619a      	str	r2, [r3, #24]
 	port_pin_set_output_level(SSD1963_TFT_WR, 1);
-}
-   17826:	4770      	bx	lr
-   17828:	41004400 	.word	0x41004400
-
-0001782c <p_gpio_parallel_wr_arr>:
+	delay_us(1);
+   17680:	2000      	movs	r0, #0
+   17682:	47c0      	blx	r8
+   17684:	0002      	movs	r2, r0
+   17686:	2300      	movs	r3, #0
+   17688:	1912      	adds	r2, r2, r4
+   1768a:	416b      	adcs	r3, r5
+   1768c:	0010      	movs	r0, r2
+   1768e:	0019      	movs	r1, r3
+   17690:	4a08      	ldr	r2, [pc, #32]	; (176b4 <p_gpio_parallel_wr_word+0x80>)
+   17692:	2300      	movs	r3, #0
+   17694:	47b8      	blx	r7
+   17696:	47b0      	blx	r6
+}
+   17698:	bc1c      	pop	{r2, r3, r4}
+   1769a:	4690      	mov	r8, r2
+   1769c:	4699      	mov	r9, r3
+   1769e:	46a2      	mov	sl, r4
+   176a0:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   176a2:	46c0      	nop			; (mov r8, r8)
+   176a4:	41004400 	.word	0x41004400
+   176a8:	000010cd 	.word	0x000010cd
+   176ac:	006acfbf 	.word	0x006acfbf
+   176b0:	00017b6d 	.word	0x00017b6d
+   176b4:	006acfc0 	.word	0x006acfc0
+   176b8:	20000001 	.word	0x20000001
+
+000176bc <p_gpio_parallel_wr_arr>:
 
 void p_gpio_parallel_wr_arr(PortGroup* group, uint32_t mask, uint32_t* data, uint32_t len)
 {
-   1782c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1782e:	b083      	sub	sp, #12
-   17830:	9000      	str	r0, [sp, #0]
-   17832:	9101      	str	r1, [sp, #4]
+   176bc:	b5f0      	push	{r4, r5, r6, r7, lr}
+   176be:	b083      	sub	sp, #12
+   176c0:	9000      	str	r0, [sp, #0]
+   176c2:	9101      	str	r1, [sp, #4]
 	for(int ind = 0; ind < len; ind++)
-   17834:	2b00      	cmp	r3, #0
-   17836:	d00a      	beq.n	1784e <p_gpio_parallel_wr_arr+0x22>
-   17838:	0015      	movs	r5, r2
-   1783a:	001f      	movs	r7, r3
-   1783c:	2400      	movs	r4, #0
+   176c4:	2b00      	cmp	r3, #0
+   176c6:	d00a      	beq.n	176de <p_gpio_parallel_wr_arr+0x22>
+   176c8:	0015      	movs	r5, r2
+   176ca:	001f      	movs	r7, r3
+   176cc:	2400      	movs	r4, #0
 	{
 		p_gpio_parallel_wr_word(group, mask, data[ind]);
-   1783e:	4e05      	ldr	r6, [pc, #20]	; (17854 <p_gpio_parallel_wr_arr+0x28>)
-   17840:	cd04      	ldmia	r5!, {r2}
-   17842:	9901      	ldr	r1, [sp, #4]
-   17844:	9800      	ldr	r0, [sp, #0]
-   17846:	47b0      	blx	r6
+   176ce:	4e05      	ldr	r6, [pc, #20]	; (176e4 <p_gpio_parallel_wr_arr+0x28>)
+   176d0:	cd04      	ldmia	r5!, {r2}
+   176d2:	9901      	ldr	r1, [sp, #4]
+   176d4:	9800      	ldr	r0, [sp, #0]
+   176d6:	47b0      	blx	r6
 	for(int ind = 0; ind < len; ind++)
-   17848:	3401      	adds	r4, #1
-   1784a:	42bc      	cmp	r4, r7
-   1784c:	d1f8      	bne.n	17840 <p_gpio_parallel_wr_arr+0x14>
+   176d8:	3401      	adds	r4, #1
+   176da:	42bc      	cmp	r4, r7
+   176dc:	d1f8      	bne.n	176d0 <p_gpio_parallel_wr_arr+0x14>
 	}
 }
-   1784e:	b003      	add	sp, #12
-   17850:	bdf0      	pop	{r4, r5, r6, r7, pc}
-   17852:	46c0      	nop			; (mov r8, r8)
-   17854:	00017815 	.word	0x00017815
+   176de:	b003      	add	sp, #12
+   176e0:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   176e2:	46c0      	nop			; (mov r8, r8)
+   176e4:	00017635 	.word	0x00017635
 
-00017858 <p_i2c_init>:
+000176e8 <p_i2c_init>:
 #include "p_i2c.h"
 
 void p_i2c_init(void)
 {
 	
-   17858:	4770      	bx	lr
+   176e8:	4770      	bx	lr
 	...
 
-0001785c <p_printf>:
+000176ec <p_printf>:
 	
 	p_printf("Hello WOrld\n");
 }
 
 void p_printf(const char* str, ...)
 {
-   1785c:	b40f      	push	{r0, r1, r2, r3}
-   1785e:	b530      	push	{r4, r5, lr}
-   17860:	b0c3      	sub	sp, #268	; 0x10c
-   17862:	ac46      	add	r4, sp, #280	; 0x118
-   17864:	cc20      	ldmia	r4!, {r5}
+   176ec:	b40f      	push	{r0, r1, r2, r3}
+   176ee:	b530      	push	{r4, r5, lr}
+   176f0:	b0c3      	sub	sp, #268	; 0x10c
+   176f2:	ac46      	add	r4, sp, #280	; 0x118
+   176f4:	cc20      	ldmia	r4!, {r5}
 	volatile uint8_t pprint_buffer[ORACLE_DEBUG_PRINT_BUFF_SIZE + 1];
 	memset(pprint_buffer, '\0', ORACLE_DEBUG_PRINT_BUFF_SIZE + 1);
-   17866:	2202      	movs	r2, #2
-   17868:	32ff      	adds	r2, #255	; 0xff
-   1786a:	2100      	movs	r1, #0
-   1786c:	a801      	add	r0, sp, #4
-   1786e:	4b0f      	ldr	r3, [pc, #60]	; (178ac <p_printf+0x50>)
-   17870:	4798      	blx	r3
+   176f6:	2202      	movs	r2, #2
+   176f8:	32ff      	adds	r2, #255	; 0xff
+   176fa:	2100      	movs	r1, #0
+   176fc:	a801      	add	r0, sp, #4
+   176fe:	4b0f      	ldr	r3, [pc, #60]	; (1773c <p_printf+0x50>)
+   17700:	4798      	blx	r3
 	va_list args;
 	va_start(args, str);
-   17872:	9400      	str	r4, [sp, #0]
+   17702:	9400      	str	r4, [sp, #0]
 	vsprintf(pprint_buffer, str, args);
-   17874:	0022      	movs	r2, r4
-   17876:	0029      	movs	r1, r5
-   17878:	a801      	add	r0, sp, #4
-   1787a:	4b0d      	ldr	r3, [pc, #52]	; (178b0 <p_printf+0x54>)
-   1787c:	4798      	blx	r3
+   17704:	0022      	movs	r2, r4
+   17706:	0029      	movs	r1, r5
+   17708:	a801      	add	r0, sp, #4
+   1770a:	4b0d      	ldr	r3, [pc, #52]	; (17740 <p_printf+0x54>)
+   1770c:	4798      	blx	r3
 	va_end(args);
 	uint16_t strsize = (uint16_t)strlen(pprint_buffer);
-   1787e:	a801      	add	r0, sp, #4
-   17880:	4b0c      	ldr	r3, [pc, #48]	; (178b4 <p_printf+0x58>)
-   17882:	4798      	blx	r3
-   17884:	b282      	uxth	r2, r0
+   1770e:	a801      	add	r0, sp, #4
+   17710:	4b0c      	ldr	r3, [pc, #48]	; (17744 <p_printf+0x58>)
+   17712:	4798      	blx	r3
+   17714:	b282      	uxth	r2, r0
 	if(strsize > ORACLE_DEBUG_PRINT_BUFF_SIZE)
-   17886:	2380      	movs	r3, #128	; 0x80
-   17888:	005b      	lsls	r3, r3, #1
-   1788a:	429a      	cmp	r2, r3
-   1788c:	d904      	bls.n	17898 <p_printf+0x3c>
+   17716:	2380      	movs	r3, #128	; 0x80
+   17718:	005b      	lsls	r3, r3, #1
+   1771a:	429a      	cmp	r2, r3
+   1771c:	d904      	bls.n	17728 <p_printf+0x3c>
 		// return error
 		return;
 	}
 	usart_write_buffer_wait(&p_debug_inst, pprint_buffer, strsize);
 	usart_read_job(&p_debug_inst, &rx_char);
 }
-   1788e:	b043      	add	sp, #268	; 0x10c
-   17890:	bc30      	pop	{r4, r5}
-   17892:	bc08      	pop	{r3}
-   17894:	b004      	add	sp, #16
-   17896:	4718      	bx	r3
+   1771e:	b043      	add	sp, #268	; 0x10c
+   17720:	bc30      	pop	{r4, r5}
+   17722:	bc08      	pop	{r3}
+   17724:	b004      	add	sp, #16
+   17726:	4718      	bx	r3
 	usart_write_buffer_wait(&p_debug_inst, pprint_buffer, strsize);
-   17898:	4c07      	ldr	r4, [pc, #28]	; (178b8 <p_printf+0x5c>)
-   1789a:	a901      	add	r1, sp, #4
-   1789c:	0020      	movs	r0, r4
-   1789e:	4b07      	ldr	r3, [pc, #28]	; (178bc <p_printf+0x60>)
-   178a0:	4798      	blx	r3
+   17728:	4c07      	ldr	r4, [pc, #28]	; (17748 <p_printf+0x5c>)
+   1772a:	a901      	add	r1, sp, #4
+   1772c:	0020      	movs	r0, r4
+   1772e:	4b07      	ldr	r3, [pc, #28]	; (1774c <p_printf+0x60>)
+   17730:	4798      	blx	r3
 	usart_read_job(&p_debug_inst, &rx_char);
-   178a2:	4907      	ldr	r1, [pc, #28]	; (178c0 <p_printf+0x64>)
-   178a4:	0020      	movs	r0, r4
-   178a6:	4b07      	ldr	r3, [pc, #28]	; (178c4 <p_printf+0x68>)
-   178a8:	4798      	blx	r3
-   178aa:	e7f0      	b.n	1788e <p_printf+0x32>
-   178ac:	00017fbd 	.word	0x00017fbd
-   178b0:	00018031 	.word	0x00018031
-   178b4:	00017ff1 	.word	0x00017ff1
-   178b8:	20004c58 	.word	0x20004c58
-   178bc:	00000915 	.word	0x00000915
-   178c0:	20004e30 	.word	0x20004e30
-   178c4:	00000a39 	.word	0x00000a39
-
-000178c8 <p_usart_init>:
-{
-   178c8:	b570      	push	{r4, r5, r6, lr}
-   178ca:	b090      	sub	sp, #64	; 0x40
+   17732:	4907      	ldr	r1, [pc, #28]	; (17750 <p_printf+0x64>)
+   17734:	0020      	movs	r0, r4
+   17736:	4b07      	ldr	r3, [pc, #28]	; (17754 <p_printf+0x68>)
+   17738:	4798      	blx	r3
+   1773a:	e7f0      	b.n	1771e <p_printf+0x32>
+   1773c:	00017e4d 	.word	0x00017e4d
+   17740:	00017ec1 	.word	0x00017ec1
+   17744:	00017e81 	.word	0x00017e81
+   17748:	20004c58 	.word	0x20004c58
+   1774c:	00000915 	.word	0x00000915
+   17750:	20004e30 	.word	0x20004e30
+   17754:	00000a39 	.word	0x00000a39
+
+00017758 <p_usart_init>:
+{
+   17758:	b570      	push	{r4, r5, r6, lr}
+   1775a:	b090      	sub	sp, #64	; 0x40
 {
 	/* Sanity check arguments */
 	Assert(config);
 
 	/* Set default config in the config struct */
 	config->data_order       = USART_DATAORDER_LSB;
-   178cc:	2380      	movs	r3, #128	; 0x80
-   178ce:	05db      	lsls	r3, r3, #23
-   178d0:	9300      	str	r3, [sp, #0]
+   1775c:	2380      	movs	r3, #128	; 0x80
+   1775e:	05db      	lsls	r3, r3, #23
+   17760:	9300      	str	r3, [sp, #0]
 	config->transfer_mode    = USART_TRANSFER_ASYNCHRONOUSLY;
-   178d2:	2300      	movs	r3, #0
-   178d4:	9301      	str	r3, [sp, #4]
+   17762:	2300      	movs	r3, #0
+   17764:	9301      	str	r3, [sp, #4]
 	config->parity           = USART_PARITY_NONE;
-   178d6:	22ff      	movs	r2, #255	; 0xff
-   178d8:	4669      	mov	r1, sp
-   178da:	810a      	strh	r2, [r1, #8]
+   17766:	22ff      	movs	r2, #255	; 0xff
+   17768:	4669      	mov	r1, sp
+   1776a:	810a      	strh	r2, [r1, #8]
 	config->stopbits         = USART_STOPBITS_1;
-   178dc:	2200      	movs	r2, #0
-   178de:	728b      	strb	r3, [r1, #10]
+   1776c:	2200      	movs	r2, #0
+   1776e:	728b      	strb	r3, [r1, #10]
 	config->character_size   = USART_CHARACTER_SIZE_8BIT;
-   178e0:	72cb      	strb	r3, [r1, #11]
+   17770:	72cb      	strb	r3, [r1, #11]
 	config->baudrate         = 9600;
 	config->receiver_enable  = true;
-   178e2:	2401      	movs	r4, #1
-   178e4:	2124      	movs	r1, #36	; 0x24
-   178e6:	4668      	mov	r0, sp
-   178e8:	5444      	strb	r4, [r0, r1]
+   17772:	2401      	movs	r4, #1
+   17774:	2124      	movs	r1, #36	; 0x24
+   17776:	4668      	mov	r0, sp
+   17778:	5444      	strb	r4, [r0, r1]
 	config->transmitter_enable = true;
-   178ea:	3101      	adds	r1, #1
-   178ec:	5444      	strb	r4, [r0, r1]
+   1777a:	3101      	adds	r1, #1
+   1777c:	5444      	strb	r4, [r0, r1]
 	config->clock_polarity_inverted = false;
-   178ee:	3101      	adds	r1, #1
-   178f0:	5443      	strb	r3, [r0, r1]
+   1777e:	3101      	adds	r1, #1
+   17780:	5443      	strb	r3, [r0, r1]
 	config->use_external_clock = false;
-   178f2:	3101      	adds	r1, #1
-   178f4:	5443      	strb	r3, [r0, r1]
+   17782:	3101      	adds	r1, #1
+   17784:	5443      	strb	r3, [r0, r1]
 	config->ext_clock_freq   = 0;
-   178f6:	930a      	str	r3, [sp, #40]	; 0x28
+   17786:	930a      	str	r3, [sp, #40]	; 0x28
 	config->mux_setting      = USART_RX_1_TX_2_XCK_3;
 	config->run_in_standby   = false;
-   178f8:	3105      	adds	r1, #5
-   178fa:	5443      	strb	r3, [r0, r1]
+   17788:	3105      	adds	r1, #5
+   1778a:	5443      	strb	r3, [r0, r1]
 	config->generator_source = GCLK_GENERATOR_0;
-   178fc:	3101      	adds	r1, #1
-   178fe:	5443      	strb	r3, [r0, r1]
+   1778c:	3101      	adds	r1, #1
+   1778e:	5443      	strb	r3, [r0, r1]
 	config->pinmux_pad0      = PINMUX_DEFAULT;
 	config->pinmux_pad1      = PINMUX_DEFAULT;
 	config->pinmux_pad2      = PINMUX_DEFAULT;
 	config->pinmux_pad3      = PINMUX_DEFAULT;
 #ifdef FEATURE_USART_OVER_SAMPLE
 	config->sample_adjustment     = USART_SAMPLE_ADJUSTMENT_7_8_9;
-   17900:	9305      	str	r3, [sp, #20]
+   17790:	9305      	str	r3, [sp, #20]
 	config->sample_rate           = USART_SAMPLE_RATE_16X_ARITHMETIC;
-   17902:	8203      	strh	r3, [r0, #16]
+   17792:	8203      	strh	r3, [r0, #16]
 #endif
 #ifdef FEATURE_USART_LIN_SLAVE
 	config->lin_slave_enable      = false;
-   17904:	76c3      	strb	r3, [r0, #27]
+   17794:	76c3      	strb	r3, [r0, #27]
 	config->lin_header_delay = LIN_MASTER_HEADER_DELAY_0;
 	config->lin_break_length = LIN_MASTER_BREAK_LENGTH_13_BIT;
 #endif
 
 #ifdef FEATURE_USART_IMMEDIATE_BUFFER_OVERFLOW_NOTIFICATION
 	config->immediate_buffer_overflow_notification  = false;
-   17906:	7602      	strb	r2, [r0, #24]
+   17796:	7602      	strb	r2, [r0, #24]
 #endif
 #ifdef FEATURE_USART_START_FRAME_DECTION
 	config->start_frame_detection_enable            = false;
-   17908:	7702      	strb	r2, [r0, #28]
+   17798:	7702      	strb	r2, [r0, #28]
 #endif
 #ifdef FEATURE_USART_IRDA
 	config->encoding_format_enable                  = false;
-   1790a:	7642      	strb	r2, [r0, #25]
+   1779a:	7642      	strb	r2, [r0, #25]
 	config->receive_pulse_length                    = 19;
-   1790c:	2313      	movs	r3, #19
-   1790e:	7683      	strb	r3, [r0, #26]
+   1779c:	2313      	movs	r3, #19
+   1779e:	7683      	strb	r3, [r0, #26]
 	config->iso7816_config.inhibit_nack             = ISO7816_INHIBIT_NACK_DISABLE;
 	config->iso7816_config.successive_recv_nack     = ISO7816_SUCCESSIVE_RECV_NACK_DISABLE;
 	config->iso7816_config.max_iterations           = 7;
 #endif
 #ifdef FEATURE_USART_COLLISION_DECTION
 	config->collision_detection_enable              = false;
-   17910:	7742      	strb	r2, [r0, #29]
+   177a0:	7742      	strb	r2, [r0, #29]
 	p_debug_conf.baudrate =		USART_DEBUG_BAUDRATE;
-   17912:	23e1      	movs	r3, #225	; 0xe1
-   17914:	025b      	lsls	r3, r3, #9
-   17916:	9308      	str	r3, [sp, #32]
+   177a2:	23e1      	movs	r3, #225	; 0xe1
+   177a4:	025b      	lsls	r3, r3, #9
+   177a6:	9308      	str	r3, [sp, #32]
 	p_debug_conf.pinmux_pad0 =	USART_DEBUG_PINMUX_PAD0;
-   17918:	4b18      	ldr	r3, [pc, #96]	; (1797c <p_usart_init+0xb4>)
-   1791a:	930c      	str	r3, [sp, #48]	; 0x30
+   177a8:	4b18      	ldr	r3, [pc, #96]	; (1780c <p_usart_init+0xb4>)
+   177aa:	930c      	str	r3, [sp, #48]	; 0x30
 	p_debug_conf.pinmux_pad1 =	USART_DEBUG_PINMUX_PAD1;
-   1791c:	4b18      	ldr	r3, [pc, #96]	; (17980 <p_usart_init+0xb8>)
-   1791e:	930d      	str	r3, [sp, #52]	; 0x34
+   177ac:	4b18      	ldr	r3, [pc, #96]	; (17810 <p_usart_init+0xb8>)
+   177ae:	930d      	str	r3, [sp, #52]	; 0x34
 	p_debug_conf.pinmux_pad2 =	USART_DEBUG_PINMUX_PAD2;
-   17920:	2301      	movs	r3, #1
-   17922:	425b      	negs	r3, r3
-   17924:	930e      	str	r3, [sp, #56]	; 0x38
+   177b0:	2301      	movs	r3, #1
+   177b2:	425b      	negs	r3, r3
+   177b4:	930e      	str	r3, [sp, #56]	; 0x38
 	p_debug_conf.pinmux_pad3 =	USART_DEBUG_PINMUX_PAD3;
-   17926:	930f      	str	r3, [sp, #60]	; 0x3c
+   177b6:	930f      	str	r3, [sp, #60]	; 0x3c
 	p_debug_conf.mux_setting =	USART_DEBUG_MUX_SETTING;
-   17928:	2380      	movs	r3, #128	; 0x80
-   1792a:	035b      	lsls	r3, r3, #13
-   1792c:	9303      	str	r3, [sp, #12]
+   177b8:	2380      	movs	r3, #128	; 0x80
+   177ba:	035b      	lsls	r3, r3, #13
+   177bc:	9303      	str	r3, [sp, #12]
 	usart_init(&p_debug_inst, USART_DEBUG_MODULE, &p_debug_conf);
-   1792e:	4e15      	ldr	r6, [pc, #84]	; (17984 <p_usart_init+0xbc>)
-   17930:	466a      	mov	r2, sp
-   17932:	4915      	ldr	r1, [pc, #84]	; (17988 <p_usart_init+0xc0>)
-   17934:	0030      	movs	r0, r6
-   17936:	4b15      	ldr	r3, [pc, #84]	; (1798c <p_usart_init+0xc4>)
-   17938:	4798      	blx	r3
+   177be:	4e15      	ldr	r6, [pc, #84]	; (17814 <p_usart_init+0xbc>)
+   177c0:	466a      	mov	r2, sp
+   177c2:	4915      	ldr	r1, [pc, #84]	; (17818 <p_usart_init+0xc0>)
+   177c4:	0030      	movs	r0, r6
+   177c6:	4b15      	ldr	r3, [pc, #84]	; (1781c <p_usart_init+0xc4>)
+   177c8:	4798      	blx	r3
 	/* Sanity check arguments */
 	Assert(module);
 	Assert(module->hw);
 
 	/* Get a pointer to the hardware module instance */
 	SercomUsart *const usart_hw = &(module->hw->USART);
-   1793a:	6835      	ldr	r5, [r6, #0]
+   177ca:	6835      	ldr	r5, [r6, #0]
 
 #if USART_CALLBACK_MODE == true
 	/* Enable Global interrupt for module */
 	system_interrupt_enable(_sercom_get_interrupt_vector(module->hw));
-   1793c:	0028      	movs	r0, r5
-   1793e:	4b14      	ldr	r3, [pc, #80]	; (17990 <p_usart_init+0xc8>)
-   17940:	4798      	blx	r3
+   177cc:	0028      	movs	r0, r5
+   177ce:	4b14      	ldr	r3, [pc, #80]	; (17820 <p_usart_init+0xc8>)
+   177d0:	4798      	blx	r3
  * \param[in] vector Interrupt vector to enable
  */
 static inline void system_interrupt_enable(
 		const enum system_interrupt_vector vector)
 {
 	NVIC->ISER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
-   17942:	231f      	movs	r3, #31
-   17944:	4018      	ands	r0, r3
-   17946:	4084      	lsls	r4, r0
-   17948:	4b12      	ldr	r3, [pc, #72]	; (17994 <p_usart_init+0xcc>)
-   1794a:	601c      	str	r4, [r3, #0]
+   177d2:	231f      	movs	r3, #31
+   177d4:	4018      	ands	r0, r3
+   177d6:	4084      	lsls	r4, r0
+   177d8:	4b12      	ldr	r3, [pc, #72]	; (17824 <p_usart_init+0xcc>)
+   177da:	601c      	str	r4, [r3, #0]
 	SercomUsart *const usart_hw = &(module->hw->USART);
-   1794c:	6832      	ldr	r2, [r6, #0]
+   177dc:	6832      	ldr	r2, [r6, #0]
 	return (usart_hw->SYNCBUSY.reg);
-   1794e:	69d3      	ldr	r3, [r2, #28]
+   177de:	69d3      	ldr	r3, [r2, #28]
 	while (usart_is_syncing(module)) {
-   17950:	2b00      	cmp	r3, #0
-   17952:	d1fc      	bne.n	1794e <p_usart_init+0x86>
+   177e0:	2b00      	cmp	r3, #0
+   177e2:	d1fc      	bne.n	177de <p_usart_init+0x86>
 
 	/* Wait until synchronization is complete */
 	_usart_wait_for_sync(module);
 
 	/* Enable USART module */
 	usart_hw->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
-   17954:	682b      	ldr	r3, [r5, #0]
-   17956:	2202      	movs	r2, #2
-   17958:	4313      	orrs	r3, r2
-   1795a:	602b      	str	r3, [r5, #0]
+   177e4:	682b      	ldr	r3, [r5, #0]
+   177e6:	2202      	movs	r2, #2
+   177e8:	4313      	orrs	r3, r2
+   177ea:	602b      	str	r3, [r5, #0]
 	usart_register_callback(&p_debug_inst, p_debug_rx_cb, USART_CALLBACK_BUFFER_RECEIVED);
-   1795c:	4c09      	ldr	r4, [pc, #36]	; (17984 <p_usart_init+0xbc>)
-   1795e:	3a01      	subs	r2, #1
-   17960:	490d      	ldr	r1, [pc, #52]	; (17998 <p_usart_init+0xd0>)
-   17962:	0020      	movs	r0, r4
-   17964:	4b0d      	ldr	r3, [pc, #52]	; (1799c <p_usart_init+0xd4>)
-   17966:	4798      	blx	r3
+   177ec:	4c09      	ldr	r4, [pc, #36]	; (17814 <p_usart_init+0xbc>)
+   177ee:	3a01      	subs	r2, #1
+   177f0:	490d      	ldr	r1, [pc, #52]	; (17828 <p_usart_init+0xd0>)
+   177f2:	0020      	movs	r0, r4
+   177f4:	4b0d      	ldr	r3, [pc, #52]	; (1782c <p_usart_init+0xd4>)
+   177f6:	4798      	blx	r3
 {
 	/* Sanity check arguments */
 	Assert(module);
 
 	/* Enable callback */
 	module->callback_enable_mask |= (1 << callback_type);
-   17968:	2231      	movs	r2, #49	; 0x31
-   1796a:	5ca3      	ldrb	r3, [r4, r2]
-   1796c:	2102      	movs	r1, #2
-   1796e:	430b      	orrs	r3, r1
-   17970:	54a3      	strb	r3, [r4, r2]
+   177f8:	2231      	movs	r2, #49	; 0x31
+   177fa:	5ca3      	ldrb	r3, [r4, r2]
+   177fc:	2102      	movs	r1, #2
+   177fe:	430b      	orrs	r3, r1
+   17800:	54a3      	strb	r3, [r4, r2]
 	p_printf("Hello WOrld\n");
-   17972:	480b      	ldr	r0, [pc, #44]	; (179a0 <p_usart_init+0xd8>)
-   17974:	4b0b      	ldr	r3, [pc, #44]	; (179a4 <p_usart_init+0xdc>)
-   17976:	4798      	blx	r3
-}
-   17978:	b010      	add	sp, #64	; 0x40
-   1797a:	bd70      	pop	{r4, r5, r6, pc}
-   1797c:	00160002 	.word	0x00160002
-   17980:	00170002 	.word	0x00170002
-   17984:	20004c58 	.word	0x20004c58
-   17988:	42001400 	.word	0x42001400
-   1798c:	000005b1 	.word	0x000005b1
-   17990:	00000c1d 	.word	0x00000c1d
-   17994:	e000e100 	.word	0xe000e100
-   17998:	000179a9 	.word	0x000179a9
-   1799c:	00000a21 	.word	0x00000a21
-   179a0:	0001caac 	.word	0x0001caac
-   179a4:	0001785d 	.word	0x0001785d
-
-000179a8 <p_debug_rx_cb>:
-{
-   179a8:	b510      	push	{r4, lr}
+   17802:	480b      	ldr	r0, [pc, #44]	; (17830 <p_usart_init+0xd8>)
+   17804:	4b0b      	ldr	r3, [pc, #44]	; (17834 <p_usart_init+0xdc>)
+   17806:	4798      	blx	r3
+}
+   17808:	b010      	add	sp, #64	; 0x40
+   1780a:	bd70      	pop	{r4, r5, r6, pc}
+   1780c:	00160002 	.word	0x00160002
+   17810:	00170002 	.word	0x00170002
+   17814:	20004c58 	.word	0x20004c58
+   17818:	42001400 	.word	0x42001400
+   1781c:	000005b1 	.word	0x000005b1
+   17820:	00000c1d 	.word	0x00000c1d
+   17824:	e000e100 	.word	0xe000e100
+   17828:	00017839 	.word	0x00017839
+   1782c:	00000a21 	.word	0x00000a21
+   17830:	0001c93c 	.word	0x0001c93c
+   17834:	000176ed 	.word	0x000176ed
+
+00017838 <p_debug_rx_cb>:
+{
+   17838:	b510      	push	{r4, lr}
 	p_printf("%c", (char)rx_char);
-   179aa:	4b03      	ldr	r3, [pc, #12]	; (179b8 <p_debug_rx_cb+0x10>)
-   179ac:	8819      	ldrh	r1, [r3, #0]
-   179ae:	b2c9      	uxtb	r1, r1
-   179b0:	4802      	ldr	r0, [pc, #8]	; (179bc <p_debug_rx_cb+0x14>)
-   179b2:	4b03      	ldr	r3, [pc, #12]	; (179c0 <p_debug_rx_cb+0x18>)
-   179b4:	4798      	blx	r3
+   1783a:	4b03      	ldr	r3, [pc, #12]	; (17848 <p_debug_rx_cb+0x10>)
+   1783c:	8819      	ldrh	r1, [r3, #0]
+   1783e:	b2c9      	uxtb	r1, r1
+   17840:	4802      	ldr	r0, [pc, #8]	; (1784c <p_debug_rx_cb+0x14>)
+   17842:	4b03      	ldr	r3, [pc, #12]	; (17850 <p_debug_rx_cb+0x18>)
+   17844:	4798      	blx	r3
 }
-   179b6:	bd10      	pop	{r4, pc}
-   179b8:	20004e30 	.word	0x20004e30
-   179bc:	0001caa8 	.word	0x0001caa8
-   179c0:	0001785d 	.word	0x0001785d
+   17846:	bd10      	pop	{r4, pc}
+   17848:	20004e30 	.word	0x20004e30
+   1784c:	0001c938 	.word	0x0001c938
+   17850:	000176ed 	.word	0x000176ed
 
-000179c4 <p_debug_start_service>:
+00017854 <p_debug_start_service>:
 
 void p_debug_start_service(void)
 {
-   179c4:	b510      	push	{r4, lr}
+   17854:	b510      	push	{r4, lr}
 	usart_read_job(&p_debug_inst, &rx_char);
-   179c6:	4902      	ldr	r1, [pc, #8]	; (179d0 <p_debug_start_service+0xc>)
-   179c8:	4802      	ldr	r0, [pc, #8]	; (179d4 <p_debug_start_service+0x10>)
-   179ca:	4b03      	ldr	r3, [pc, #12]	; (179d8 <p_debug_start_service+0x14>)
-   179cc:	4798      	blx	r3
+   17856:	4902      	ldr	r1, [pc, #8]	; (17860 <p_debug_start_service+0xc>)
+   17858:	4802      	ldr	r0, [pc, #8]	; (17864 <p_debug_start_service+0x10>)
+   1785a:	4b03      	ldr	r3, [pc, #12]	; (17868 <p_debug_start_service+0x14>)
+   1785c:	4798      	blx	r3
 }
-   179ce:	bd10      	pop	{r4, pc}
-   179d0:	20004e30 	.word	0x20004e30
-   179d4:	20004c58 	.word	0x20004c58
-   179d8:	00000a39 	.word	0x00000a39
+   1785e:	bd10      	pop	{r4, pc}
+   17860:	20004e30 	.word	0x20004e30
+   17864:	20004c58 	.word	0x20004c58
+   17868:	00000a39 	.word	0x00000a39
 
-000179dc <main>:
+0001786c <main>:
 /*
  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
  */
 #include "oracle.h"
 int main (void)
 {
-   179dc:	b510      	push	{r4, lr}
+   1786c:	b510      	push	{r4, lr}
 	oracle_init();
-   179de:	4b02      	ldr	r3, [pc, #8]	; (179e8 <main+0xc>)
-   179e0:	4798      	blx	r3
+   1786e:	4b02      	ldr	r3, [pc, #8]	; (17878 <main+0xc>)
+   17870:	4798      	blx	r3
 	
 	for(;;)
 	{
 		oracle_service();
-   179e2:	4c02      	ldr	r4, [pc, #8]	; (179ec <main+0x10>)
-   179e4:	47a0      	blx	r4
-   179e6:	e7fd      	b.n	179e4 <main+0x8>
-   179e8:	00000169 	.word	0x00000169
-   179ec:	000001fd 	.word	0x000001fd
-
-000179f0 <__udivsi3>:
-   179f0:	2200      	movs	r2, #0
-   179f2:	0843      	lsrs	r3, r0, #1
-   179f4:	428b      	cmp	r3, r1
-   179f6:	d374      	bcc.n	17ae2 <__udivsi3+0xf2>
-   179f8:	0903      	lsrs	r3, r0, #4
-   179fa:	428b      	cmp	r3, r1
-   179fc:	d35f      	bcc.n	17abe <__udivsi3+0xce>
-   179fe:	0a03      	lsrs	r3, r0, #8
-   17a00:	428b      	cmp	r3, r1
-   17a02:	d344      	bcc.n	17a8e <__udivsi3+0x9e>
-   17a04:	0b03      	lsrs	r3, r0, #12
-   17a06:	428b      	cmp	r3, r1
-   17a08:	d328      	bcc.n	17a5c <__udivsi3+0x6c>
-   17a0a:	0c03      	lsrs	r3, r0, #16
-   17a0c:	428b      	cmp	r3, r1
-   17a0e:	d30d      	bcc.n	17a2c <__udivsi3+0x3c>
-   17a10:	22ff      	movs	r2, #255	; 0xff
-   17a12:	0209      	lsls	r1, r1, #8
-   17a14:	ba12      	rev	r2, r2
-   17a16:	0c03      	lsrs	r3, r0, #16
-   17a18:	428b      	cmp	r3, r1
-   17a1a:	d302      	bcc.n	17a22 <__udivsi3+0x32>
-   17a1c:	1212      	asrs	r2, r2, #8
-   17a1e:	0209      	lsls	r1, r1, #8
-   17a20:	d065      	beq.n	17aee <__udivsi3+0xfe>
-   17a22:	0b03      	lsrs	r3, r0, #12
-   17a24:	428b      	cmp	r3, r1
-   17a26:	d319      	bcc.n	17a5c <__udivsi3+0x6c>
-   17a28:	e000      	b.n	17a2c <__udivsi3+0x3c>
-   17a2a:	0a09      	lsrs	r1, r1, #8
-   17a2c:	0bc3      	lsrs	r3, r0, #15
-   17a2e:	428b      	cmp	r3, r1
-   17a30:	d301      	bcc.n	17a36 <__udivsi3+0x46>
-   17a32:	03cb      	lsls	r3, r1, #15
-   17a34:	1ac0      	subs	r0, r0, r3
-   17a36:	4152      	adcs	r2, r2
-   17a38:	0b83      	lsrs	r3, r0, #14
+   17872:	4c02      	ldr	r4, [pc, #8]	; (1787c <main+0x10>)
+   17874:	47a0      	blx	r4
+   17876:	e7fd      	b.n	17874 <main+0x8>
+   17878:	00000169 	.word	0x00000169
+   1787c:	000001fd 	.word	0x000001fd
+
+00017880 <__udivsi3>:
+   17880:	2200      	movs	r2, #0
+   17882:	0843      	lsrs	r3, r0, #1
+   17884:	428b      	cmp	r3, r1
+   17886:	d374      	bcc.n	17972 <__udivsi3+0xf2>
+   17888:	0903      	lsrs	r3, r0, #4
+   1788a:	428b      	cmp	r3, r1
+   1788c:	d35f      	bcc.n	1794e <__udivsi3+0xce>
+   1788e:	0a03      	lsrs	r3, r0, #8
+   17890:	428b      	cmp	r3, r1
+   17892:	d344      	bcc.n	1791e <__udivsi3+0x9e>
+   17894:	0b03      	lsrs	r3, r0, #12
+   17896:	428b      	cmp	r3, r1
+   17898:	d328      	bcc.n	178ec <__udivsi3+0x6c>
+   1789a:	0c03      	lsrs	r3, r0, #16
+   1789c:	428b      	cmp	r3, r1
+   1789e:	d30d      	bcc.n	178bc <__udivsi3+0x3c>
+   178a0:	22ff      	movs	r2, #255	; 0xff
+   178a2:	0209      	lsls	r1, r1, #8
+   178a4:	ba12      	rev	r2, r2
+   178a6:	0c03      	lsrs	r3, r0, #16
+   178a8:	428b      	cmp	r3, r1
+   178aa:	d302      	bcc.n	178b2 <__udivsi3+0x32>
+   178ac:	1212      	asrs	r2, r2, #8
+   178ae:	0209      	lsls	r1, r1, #8
+   178b0:	d065      	beq.n	1797e <__udivsi3+0xfe>
+   178b2:	0b03      	lsrs	r3, r0, #12
+   178b4:	428b      	cmp	r3, r1
+   178b6:	d319      	bcc.n	178ec <__udivsi3+0x6c>
+   178b8:	e000      	b.n	178bc <__udivsi3+0x3c>
+   178ba:	0a09      	lsrs	r1, r1, #8
+   178bc:	0bc3      	lsrs	r3, r0, #15
+   178be:	428b      	cmp	r3, r1
+   178c0:	d301      	bcc.n	178c6 <__udivsi3+0x46>
+   178c2:	03cb      	lsls	r3, r1, #15
+   178c4:	1ac0      	subs	r0, r0, r3
+   178c6:	4152      	adcs	r2, r2
+   178c8:	0b83      	lsrs	r3, r0, #14
+   178ca:	428b      	cmp	r3, r1
+   178cc:	d301      	bcc.n	178d2 <__udivsi3+0x52>
+   178ce:	038b      	lsls	r3, r1, #14
+   178d0:	1ac0      	subs	r0, r0, r3
+   178d2:	4152      	adcs	r2, r2
+   178d4:	0b43      	lsrs	r3, r0, #13
+   178d6:	428b      	cmp	r3, r1
+   178d8:	d301      	bcc.n	178de <__udivsi3+0x5e>
+   178da:	034b      	lsls	r3, r1, #13
+   178dc:	1ac0      	subs	r0, r0, r3
+   178de:	4152      	adcs	r2, r2
+   178e0:	0b03      	lsrs	r3, r0, #12
+   178e2:	428b      	cmp	r3, r1
+   178e4:	d301      	bcc.n	178ea <__udivsi3+0x6a>
+   178e6:	030b      	lsls	r3, r1, #12
+   178e8:	1ac0      	subs	r0, r0, r3
+   178ea:	4152      	adcs	r2, r2
+   178ec:	0ac3      	lsrs	r3, r0, #11
+   178ee:	428b      	cmp	r3, r1
+   178f0:	d301      	bcc.n	178f6 <__udivsi3+0x76>
+   178f2:	02cb      	lsls	r3, r1, #11
+   178f4:	1ac0      	subs	r0, r0, r3
+   178f6:	4152      	adcs	r2, r2
+   178f8:	0a83      	lsrs	r3, r0, #10
+   178fa:	428b      	cmp	r3, r1
+   178fc:	d301      	bcc.n	17902 <__udivsi3+0x82>
+   178fe:	028b      	lsls	r3, r1, #10
+   17900:	1ac0      	subs	r0, r0, r3
+   17902:	4152      	adcs	r2, r2
+   17904:	0a43      	lsrs	r3, r0, #9
+   17906:	428b      	cmp	r3, r1
+   17908:	d301      	bcc.n	1790e <__udivsi3+0x8e>
+   1790a:	024b      	lsls	r3, r1, #9
+   1790c:	1ac0      	subs	r0, r0, r3
+   1790e:	4152      	adcs	r2, r2
+   17910:	0a03      	lsrs	r3, r0, #8
+   17912:	428b      	cmp	r3, r1
+   17914:	d301      	bcc.n	1791a <__udivsi3+0x9a>
+   17916:	020b      	lsls	r3, r1, #8
+   17918:	1ac0      	subs	r0, r0, r3
+   1791a:	4152      	adcs	r2, r2
+   1791c:	d2cd      	bcs.n	178ba <__udivsi3+0x3a>
+   1791e:	09c3      	lsrs	r3, r0, #7
+   17920:	428b      	cmp	r3, r1
+   17922:	d301      	bcc.n	17928 <__udivsi3+0xa8>
+   17924:	01cb      	lsls	r3, r1, #7
+   17926:	1ac0      	subs	r0, r0, r3
+   17928:	4152      	adcs	r2, r2
+   1792a:	0983      	lsrs	r3, r0, #6
+   1792c:	428b      	cmp	r3, r1
+   1792e:	d301      	bcc.n	17934 <__udivsi3+0xb4>
+   17930:	018b      	lsls	r3, r1, #6
+   17932:	1ac0      	subs	r0, r0, r3
+   17934:	4152      	adcs	r2, r2
+   17936:	0943      	lsrs	r3, r0, #5
+   17938:	428b      	cmp	r3, r1
+   1793a:	d301      	bcc.n	17940 <__udivsi3+0xc0>
+   1793c:	014b      	lsls	r3, r1, #5
+   1793e:	1ac0      	subs	r0, r0, r3
+   17940:	4152      	adcs	r2, r2
+   17942:	0903      	lsrs	r3, r0, #4
+   17944:	428b      	cmp	r3, r1
+   17946:	d301      	bcc.n	1794c <__udivsi3+0xcc>
+   17948:	010b      	lsls	r3, r1, #4
+   1794a:	1ac0      	subs	r0, r0, r3
+   1794c:	4152      	adcs	r2, r2
+   1794e:	08c3      	lsrs	r3, r0, #3
+   17950:	428b      	cmp	r3, r1
+   17952:	d301      	bcc.n	17958 <__udivsi3+0xd8>
+   17954:	00cb      	lsls	r3, r1, #3
+   17956:	1ac0      	subs	r0, r0, r3
+   17958:	4152      	adcs	r2, r2
+   1795a:	0883      	lsrs	r3, r0, #2
+   1795c:	428b      	cmp	r3, r1
+   1795e:	d301      	bcc.n	17964 <__udivsi3+0xe4>
+   17960:	008b      	lsls	r3, r1, #2
+   17962:	1ac0      	subs	r0, r0, r3
+   17964:	4152      	adcs	r2, r2
+   17966:	0843      	lsrs	r3, r0, #1
+   17968:	428b      	cmp	r3, r1
+   1796a:	d301      	bcc.n	17970 <__udivsi3+0xf0>
+   1796c:	004b      	lsls	r3, r1, #1
+   1796e:	1ac0      	subs	r0, r0, r3
+   17970:	4152      	adcs	r2, r2
+   17972:	1a41      	subs	r1, r0, r1
+   17974:	d200      	bcs.n	17978 <__udivsi3+0xf8>
+   17976:	4601      	mov	r1, r0
+   17978:	4152      	adcs	r2, r2
+   1797a:	4610      	mov	r0, r2
+   1797c:	4770      	bx	lr
+   1797e:	e7ff      	b.n	17980 <__udivsi3+0x100>
+   17980:	b501      	push	{r0, lr}
+   17982:	2000      	movs	r0, #0
+   17984:	f000 f8f0 	bl	17b68 <__aeabi_idiv0>
+   17988:	bd02      	pop	{r1, pc}
+   1798a:	46c0      	nop			; (mov r8, r8)
+
+0001798c <__aeabi_uidivmod>:
+   1798c:	2900      	cmp	r1, #0
+   1798e:	d0f7      	beq.n	17980 <__udivsi3+0x100>
+   17990:	e776      	b.n	17880 <__udivsi3>
+   17992:	4770      	bx	lr
+
+00017994 <__divsi3>:
+   17994:	4603      	mov	r3, r0
+   17996:	430b      	orrs	r3, r1
+   17998:	d47f      	bmi.n	17a9a <__divsi3+0x106>
+   1799a:	2200      	movs	r2, #0
+   1799c:	0843      	lsrs	r3, r0, #1
+   1799e:	428b      	cmp	r3, r1
+   179a0:	d374      	bcc.n	17a8c <__divsi3+0xf8>
+   179a2:	0903      	lsrs	r3, r0, #4
+   179a4:	428b      	cmp	r3, r1
+   179a6:	d35f      	bcc.n	17a68 <__divsi3+0xd4>
+   179a8:	0a03      	lsrs	r3, r0, #8
+   179aa:	428b      	cmp	r3, r1
+   179ac:	d344      	bcc.n	17a38 <__divsi3+0xa4>
+   179ae:	0b03      	lsrs	r3, r0, #12
+   179b0:	428b      	cmp	r3, r1
+   179b2:	d328      	bcc.n	17a06 <__divsi3+0x72>
+   179b4:	0c03      	lsrs	r3, r0, #16
+   179b6:	428b      	cmp	r3, r1
+   179b8:	d30d      	bcc.n	179d6 <__divsi3+0x42>
+   179ba:	22ff      	movs	r2, #255	; 0xff
+   179bc:	0209      	lsls	r1, r1, #8
+   179be:	ba12      	rev	r2, r2
+   179c0:	0c03      	lsrs	r3, r0, #16
+   179c2:	428b      	cmp	r3, r1
+   179c4:	d302      	bcc.n	179cc <__divsi3+0x38>
+   179c6:	1212      	asrs	r2, r2, #8
+   179c8:	0209      	lsls	r1, r1, #8
+   179ca:	d065      	beq.n	17a98 <__divsi3+0x104>
+   179cc:	0b03      	lsrs	r3, r0, #12
+   179ce:	428b      	cmp	r3, r1
+   179d0:	d319      	bcc.n	17a06 <__divsi3+0x72>
+   179d2:	e000      	b.n	179d6 <__divsi3+0x42>
+   179d4:	0a09      	lsrs	r1, r1, #8
+   179d6:	0bc3      	lsrs	r3, r0, #15
+   179d8:	428b      	cmp	r3, r1
+   179da:	d301      	bcc.n	179e0 <__divsi3+0x4c>
+   179dc:	03cb      	lsls	r3, r1, #15
+   179de:	1ac0      	subs	r0, r0, r3
+   179e0:	4152      	adcs	r2, r2
+   179e2:	0b83      	lsrs	r3, r0, #14
+   179e4:	428b      	cmp	r3, r1
+   179e6:	d301      	bcc.n	179ec <__divsi3+0x58>
+   179e8:	038b      	lsls	r3, r1, #14
+   179ea:	1ac0      	subs	r0, r0, r3
+   179ec:	4152      	adcs	r2, r2
+   179ee:	0b43      	lsrs	r3, r0, #13
+   179f0:	428b      	cmp	r3, r1
+   179f2:	d301      	bcc.n	179f8 <__divsi3+0x64>
+   179f4:	034b      	lsls	r3, r1, #13
+   179f6:	1ac0      	subs	r0, r0, r3
+   179f8:	4152      	adcs	r2, r2
+   179fa:	0b03      	lsrs	r3, r0, #12
+   179fc:	428b      	cmp	r3, r1
+   179fe:	d301      	bcc.n	17a04 <__divsi3+0x70>
+   17a00:	030b      	lsls	r3, r1, #12
+   17a02:	1ac0      	subs	r0, r0, r3
+   17a04:	4152      	adcs	r2, r2
+   17a06:	0ac3      	lsrs	r3, r0, #11
+   17a08:	428b      	cmp	r3, r1
+   17a0a:	d301      	bcc.n	17a10 <__divsi3+0x7c>
+   17a0c:	02cb      	lsls	r3, r1, #11
+   17a0e:	1ac0      	subs	r0, r0, r3
+   17a10:	4152      	adcs	r2, r2
+   17a12:	0a83      	lsrs	r3, r0, #10
+   17a14:	428b      	cmp	r3, r1
+   17a16:	d301      	bcc.n	17a1c <__divsi3+0x88>
+   17a18:	028b      	lsls	r3, r1, #10
+   17a1a:	1ac0      	subs	r0, r0, r3
+   17a1c:	4152      	adcs	r2, r2
+   17a1e:	0a43      	lsrs	r3, r0, #9
+   17a20:	428b      	cmp	r3, r1
+   17a22:	d301      	bcc.n	17a28 <__divsi3+0x94>
+   17a24:	024b      	lsls	r3, r1, #9
+   17a26:	1ac0      	subs	r0, r0, r3
+   17a28:	4152      	adcs	r2, r2
+   17a2a:	0a03      	lsrs	r3, r0, #8
+   17a2c:	428b      	cmp	r3, r1
+   17a2e:	d301      	bcc.n	17a34 <__divsi3+0xa0>
+   17a30:	020b      	lsls	r3, r1, #8
+   17a32:	1ac0      	subs	r0, r0, r3
+   17a34:	4152      	adcs	r2, r2
+   17a36:	d2cd      	bcs.n	179d4 <__divsi3+0x40>
+   17a38:	09c3      	lsrs	r3, r0, #7
    17a3a:	428b      	cmp	r3, r1
-   17a3c:	d301      	bcc.n	17a42 <__udivsi3+0x52>
-   17a3e:	038b      	lsls	r3, r1, #14
+   17a3c:	d301      	bcc.n	17a42 <__divsi3+0xae>
+   17a3e:	01cb      	lsls	r3, r1, #7
    17a40:	1ac0      	subs	r0, r0, r3
    17a42:	4152      	adcs	r2, r2
-   17a44:	0b43      	lsrs	r3, r0, #13
+   17a44:	0983      	lsrs	r3, r0, #6
    17a46:	428b      	cmp	r3, r1
-   17a48:	d301      	bcc.n	17a4e <__udivsi3+0x5e>
-   17a4a:	034b      	lsls	r3, r1, #13
+   17a48:	d301      	bcc.n	17a4e <__divsi3+0xba>
+   17a4a:	018b      	lsls	r3, r1, #6
    17a4c:	1ac0      	subs	r0, r0, r3
    17a4e:	4152      	adcs	r2, r2
-   17a50:	0b03      	lsrs	r3, r0, #12
+   17a50:	0943      	lsrs	r3, r0, #5
    17a52:	428b      	cmp	r3, r1
-   17a54:	d301      	bcc.n	17a5a <__udivsi3+0x6a>
-   17a56:	030b      	lsls	r3, r1, #12
+   17a54:	d301      	bcc.n	17a5a <__divsi3+0xc6>
+   17a56:	014b      	lsls	r3, r1, #5
    17a58:	1ac0      	subs	r0, r0, r3
    17a5a:	4152      	adcs	r2, r2
-   17a5c:	0ac3      	lsrs	r3, r0, #11
+   17a5c:	0903      	lsrs	r3, r0, #4
    17a5e:	428b      	cmp	r3, r1
-   17a60:	d301      	bcc.n	17a66 <__udivsi3+0x76>
-   17a62:	02cb      	lsls	r3, r1, #11
+   17a60:	d301      	bcc.n	17a66 <__divsi3+0xd2>
+   17a62:	010b      	lsls	r3, r1, #4
    17a64:	1ac0      	subs	r0, r0, r3
    17a66:	4152      	adcs	r2, r2
-   17a68:	0a83      	lsrs	r3, r0, #10
+   17a68:	08c3      	lsrs	r3, r0, #3
    17a6a:	428b      	cmp	r3, r1
-   17a6c:	d301      	bcc.n	17a72 <__udivsi3+0x82>
-   17a6e:	028b      	lsls	r3, r1, #10
+   17a6c:	d301      	bcc.n	17a72 <__divsi3+0xde>
+   17a6e:	00cb      	lsls	r3, r1, #3
    17a70:	1ac0      	subs	r0, r0, r3
    17a72:	4152      	adcs	r2, r2
-   17a74:	0a43      	lsrs	r3, r0, #9
+   17a74:	0883      	lsrs	r3, r0, #2
    17a76:	428b      	cmp	r3, r1
-   17a78:	d301      	bcc.n	17a7e <__udivsi3+0x8e>
-   17a7a:	024b      	lsls	r3, r1, #9
+   17a78:	d301      	bcc.n	17a7e <__divsi3+0xea>
+   17a7a:	008b      	lsls	r3, r1, #2
    17a7c:	1ac0      	subs	r0, r0, r3
    17a7e:	4152      	adcs	r2, r2
-   17a80:	0a03      	lsrs	r3, r0, #8
+   17a80:	0843      	lsrs	r3, r0, #1
    17a82:	428b      	cmp	r3, r1
-   17a84:	d301      	bcc.n	17a8a <__udivsi3+0x9a>
-   17a86:	020b      	lsls	r3, r1, #8
+   17a84:	d301      	bcc.n	17a8a <__divsi3+0xf6>
+   17a86:	004b      	lsls	r3, r1, #1
    17a88:	1ac0      	subs	r0, r0, r3
    17a8a:	4152      	adcs	r2, r2
-   17a8c:	d2cd      	bcs.n	17a2a <__udivsi3+0x3a>
-   17a8e:	09c3      	lsrs	r3, r0, #7
-   17a90:	428b      	cmp	r3, r1
-   17a92:	d301      	bcc.n	17a98 <__udivsi3+0xa8>
-   17a94:	01cb      	lsls	r3, r1, #7
-   17a96:	1ac0      	subs	r0, r0, r3
-   17a98:	4152      	adcs	r2, r2
-   17a9a:	0983      	lsrs	r3, r0, #6
-   17a9c:	428b      	cmp	r3, r1
-   17a9e:	d301      	bcc.n	17aa4 <__udivsi3+0xb4>
-   17aa0:	018b      	lsls	r3, r1, #6
-   17aa2:	1ac0      	subs	r0, r0, r3
-   17aa4:	4152      	adcs	r2, r2
-   17aa6:	0943      	lsrs	r3, r0, #5
-   17aa8:	428b      	cmp	r3, r1
-   17aaa:	d301      	bcc.n	17ab0 <__udivsi3+0xc0>
-   17aac:	014b      	lsls	r3, r1, #5
-   17aae:	1ac0      	subs	r0, r0, r3
-   17ab0:	4152      	adcs	r2, r2
-   17ab2:	0903      	lsrs	r3, r0, #4
+   17a8c:	1a41      	subs	r1, r0, r1
+   17a8e:	d200      	bcs.n	17a92 <__divsi3+0xfe>
+   17a90:	4601      	mov	r1, r0
+   17a92:	4152      	adcs	r2, r2
+   17a94:	4610      	mov	r0, r2
+   17a96:	4770      	bx	lr
+   17a98:	e05d      	b.n	17b56 <__divsi3+0x1c2>
+   17a9a:	0fca      	lsrs	r2, r1, #31
+   17a9c:	d000      	beq.n	17aa0 <__divsi3+0x10c>
+   17a9e:	4249      	negs	r1, r1
+   17aa0:	1003      	asrs	r3, r0, #32
+   17aa2:	d300      	bcc.n	17aa6 <__divsi3+0x112>
+   17aa4:	4240      	negs	r0, r0
+   17aa6:	4053      	eors	r3, r2
+   17aa8:	2200      	movs	r2, #0
+   17aaa:	469c      	mov	ip, r3
+   17aac:	0903      	lsrs	r3, r0, #4
+   17aae:	428b      	cmp	r3, r1
+   17ab0:	d32d      	bcc.n	17b0e <__divsi3+0x17a>
+   17ab2:	0a03      	lsrs	r3, r0, #8
    17ab4:	428b      	cmp	r3, r1
-   17ab6:	d301      	bcc.n	17abc <__udivsi3+0xcc>
-   17ab8:	010b      	lsls	r3, r1, #4
-   17aba:	1ac0      	subs	r0, r0, r3
-   17abc:	4152      	adcs	r2, r2
-   17abe:	08c3      	lsrs	r3, r0, #3
+   17ab6:	d312      	bcc.n	17ade <__divsi3+0x14a>
+   17ab8:	22fc      	movs	r2, #252	; 0xfc
+   17aba:	0189      	lsls	r1, r1, #6
+   17abc:	ba12      	rev	r2, r2
+   17abe:	0a03      	lsrs	r3, r0, #8
    17ac0:	428b      	cmp	r3, r1
-   17ac2:	d301      	bcc.n	17ac8 <__udivsi3+0xd8>
-   17ac4:	00cb      	lsls	r3, r1, #3
-   17ac6:	1ac0      	subs	r0, r0, r3
-   17ac8:	4152      	adcs	r2, r2
-   17aca:	0883      	lsrs	r3, r0, #2
-   17acc:	428b      	cmp	r3, r1
-   17ace:	d301      	bcc.n	17ad4 <__udivsi3+0xe4>
-   17ad0:	008b      	lsls	r3, r1, #2
-   17ad2:	1ac0      	subs	r0, r0, r3
-   17ad4:	4152      	adcs	r2, r2
-   17ad6:	0843      	lsrs	r3, r0, #1
-   17ad8:	428b      	cmp	r3, r1
-   17ada:	d301      	bcc.n	17ae0 <__udivsi3+0xf0>
-   17adc:	004b      	lsls	r3, r1, #1
-   17ade:	1ac0      	subs	r0, r0, r3
-   17ae0:	4152      	adcs	r2, r2
-   17ae2:	1a41      	subs	r1, r0, r1
-   17ae4:	d200      	bcs.n	17ae8 <__udivsi3+0xf8>
-   17ae6:	4601      	mov	r1, r0
+   17ac2:	d30c      	bcc.n	17ade <__divsi3+0x14a>
+   17ac4:	0189      	lsls	r1, r1, #6
+   17ac6:	1192      	asrs	r2, r2, #6
+   17ac8:	428b      	cmp	r3, r1
+   17aca:	d308      	bcc.n	17ade <__divsi3+0x14a>
+   17acc:	0189      	lsls	r1, r1, #6
+   17ace:	1192      	asrs	r2, r2, #6
+   17ad0:	428b      	cmp	r3, r1
+   17ad2:	d304      	bcc.n	17ade <__divsi3+0x14a>
+   17ad4:	0189      	lsls	r1, r1, #6
+   17ad6:	d03a      	beq.n	17b4e <__divsi3+0x1ba>
+   17ad8:	1192      	asrs	r2, r2, #6
+   17ada:	e000      	b.n	17ade <__divsi3+0x14a>
+   17adc:	0989      	lsrs	r1, r1, #6
+   17ade:	09c3      	lsrs	r3, r0, #7
+   17ae0:	428b      	cmp	r3, r1
+   17ae2:	d301      	bcc.n	17ae8 <__divsi3+0x154>
+   17ae4:	01cb      	lsls	r3, r1, #7
+   17ae6:	1ac0      	subs	r0, r0, r3
    17ae8:	4152      	adcs	r2, r2
-   17aea:	4610      	mov	r0, r2
-   17aec:	4770      	bx	lr
-   17aee:	e7ff      	b.n	17af0 <__udivsi3+0x100>
-   17af0:	b501      	push	{r0, lr}
-   17af2:	2000      	movs	r0, #0
-   17af4:	f000 f8f0 	bl	17cd8 <__aeabi_idiv0>
-   17af8:	bd02      	pop	{r1, pc}
-   17afa:	46c0      	nop			; (mov r8, r8)
-
-00017afc <__aeabi_uidivmod>:
-   17afc:	2900      	cmp	r1, #0
-   17afe:	d0f7      	beq.n	17af0 <__udivsi3+0x100>
-   17b00:	e776      	b.n	179f0 <__udivsi3>
-   17b02:	4770      	bx	lr
-
-00017b04 <__divsi3>:
-   17b04:	4603      	mov	r3, r0
-   17b06:	430b      	orrs	r3, r1
-   17b08:	d47f      	bmi.n	17c0a <__divsi3+0x106>
-   17b0a:	2200      	movs	r2, #0
-   17b0c:	0843      	lsrs	r3, r0, #1
-   17b0e:	428b      	cmp	r3, r1
-   17b10:	d374      	bcc.n	17bfc <__divsi3+0xf8>
-   17b12:	0903      	lsrs	r3, r0, #4
-   17b14:	428b      	cmp	r3, r1
-   17b16:	d35f      	bcc.n	17bd8 <__divsi3+0xd4>
-   17b18:	0a03      	lsrs	r3, r0, #8
-   17b1a:	428b      	cmp	r3, r1
-   17b1c:	d344      	bcc.n	17ba8 <__divsi3+0xa4>
-   17b1e:	0b03      	lsrs	r3, r0, #12
-   17b20:	428b      	cmp	r3, r1
-   17b22:	d328      	bcc.n	17b76 <__divsi3+0x72>
-   17b24:	0c03      	lsrs	r3, r0, #16
-   17b26:	428b      	cmp	r3, r1
-   17b28:	d30d      	bcc.n	17b46 <__divsi3+0x42>
-   17b2a:	22ff      	movs	r2, #255	; 0xff
-   17b2c:	0209      	lsls	r1, r1, #8
-   17b2e:	ba12      	rev	r2, r2
-   17b30:	0c03      	lsrs	r3, r0, #16
-   17b32:	428b      	cmp	r3, r1
-   17b34:	d302      	bcc.n	17b3c <__divsi3+0x38>
-   17b36:	1212      	asrs	r2, r2, #8
-   17b38:	0209      	lsls	r1, r1, #8
-   17b3a:	d065      	beq.n	17c08 <__divsi3+0x104>
-   17b3c:	0b03      	lsrs	r3, r0, #12
-   17b3e:	428b      	cmp	r3, r1
-   17b40:	d319      	bcc.n	17b76 <__divsi3+0x72>
-   17b42:	e000      	b.n	17b46 <__divsi3+0x42>
-   17b44:	0a09      	lsrs	r1, r1, #8
-   17b46:	0bc3      	lsrs	r3, r0, #15
-   17b48:	428b      	cmp	r3, r1
-   17b4a:	d301      	bcc.n	17b50 <__divsi3+0x4c>
-   17b4c:	03cb      	lsls	r3, r1, #15
-   17b4e:	1ac0      	subs	r0, r0, r3
-   17b50:	4152      	adcs	r2, r2
-   17b52:	0b83      	lsrs	r3, r0, #14
-   17b54:	428b      	cmp	r3, r1
-   17b56:	d301      	bcc.n	17b5c <__divsi3+0x58>
-   17b58:	038b      	lsls	r3, r1, #14
-   17b5a:	1ac0      	subs	r0, r0, r3
-   17b5c:	4152      	adcs	r2, r2
-   17b5e:	0b43      	lsrs	r3, r0, #13
-   17b60:	428b      	cmp	r3, r1
-   17b62:	d301      	bcc.n	17b68 <__divsi3+0x64>
-   17b64:	034b      	lsls	r3, r1, #13
-   17b66:	1ac0      	subs	r0, r0, r3
-   17b68:	4152      	adcs	r2, r2
-   17b6a:	0b03      	lsrs	r3, r0, #12
-   17b6c:	428b      	cmp	r3, r1
-   17b6e:	d301      	bcc.n	17b74 <__divsi3+0x70>
-   17b70:	030b      	lsls	r3, r1, #12
-   17b72:	1ac0      	subs	r0, r0, r3
-   17b74:	4152      	adcs	r2, r2
-   17b76:	0ac3      	lsrs	r3, r0, #11
-   17b78:	428b      	cmp	r3, r1
-   17b7a:	d301      	bcc.n	17b80 <__divsi3+0x7c>
-   17b7c:	02cb      	lsls	r3, r1, #11
-   17b7e:	1ac0      	subs	r0, r0, r3
-   17b80:	4152      	adcs	r2, r2
-   17b82:	0a83      	lsrs	r3, r0, #10
-   17b84:	428b      	cmp	r3, r1
-   17b86:	d301      	bcc.n	17b8c <__divsi3+0x88>
-   17b88:	028b      	lsls	r3, r1, #10
-   17b8a:	1ac0      	subs	r0, r0, r3
-   17b8c:	4152      	adcs	r2, r2
-   17b8e:	0a43      	lsrs	r3, r0, #9
-   17b90:	428b      	cmp	r3, r1
-   17b92:	d301      	bcc.n	17b98 <__divsi3+0x94>
-   17b94:	024b      	lsls	r3, r1, #9
-   17b96:	1ac0      	subs	r0, r0, r3
-   17b98:	4152      	adcs	r2, r2
-   17b9a:	0a03      	lsrs	r3, r0, #8
-   17b9c:	428b      	cmp	r3, r1
-   17b9e:	d301      	bcc.n	17ba4 <__divsi3+0xa0>
-   17ba0:	020b      	lsls	r3, r1, #8
-   17ba2:	1ac0      	subs	r0, r0, r3
-   17ba4:	4152      	adcs	r2, r2
-   17ba6:	d2cd      	bcs.n	17b44 <__divsi3+0x40>
-   17ba8:	09c3      	lsrs	r3, r0, #7
-   17baa:	428b      	cmp	r3, r1
-   17bac:	d301      	bcc.n	17bb2 <__divsi3+0xae>
-   17bae:	01cb      	lsls	r3, r1, #7
-   17bb0:	1ac0      	subs	r0, r0, r3
-   17bb2:	4152      	adcs	r2, r2
-   17bb4:	0983      	lsrs	r3, r0, #6
-   17bb6:	428b      	cmp	r3, r1
-   17bb8:	d301      	bcc.n	17bbe <__divsi3+0xba>
-   17bba:	018b      	lsls	r3, r1, #6
-   17bbc:	1ac0      	subs	r0, r0, r3
-   17bbe:	4152      	adcs	r2, r2
-   17bc0:	0943      	lsrs	r3, r0, #5
-   17bc2:	428b      	cmp	r3, r1
-   17bc4:	d301      	bcc.n	17bca <__divsi3+0xc6>
-   17bc6:	014b      	lsls	r3, r1, #5
-   17bc8:	1ac0      	subs	r0, r0, r3
-   17bca:	4152      	adcs	r2, r2
-   17bcc:	0903      	lsrs	r3, r0, #4
-   17bce:	428b      	cmp	r3, r1
-   17bd0:	d301      	bcc.n	17bd6 <__divsi3+0xd2>
-   17bd2:	010b      	lsls	r3, r1, #4
-   17bd4:	1ac0      	subs	r0, r0, r3
-   17bd6:	4152      	adcs	r2, r2
-   17bd8:	08c3      	lsrs	r3, r0, #3
-   17bda:	428b      	cmp	r3, r1
-   17bdc:	d301      	bcc.n	17be2 <__divsi3+0xde>
-   17bde:	00cb      	lsls	r3, r1, #3
-   17be0:	1ac0      	subs	r0, r0, r3
-   17be2:	4152      	adcs	r2, r2
-   17be4:	0883      	lsrs	r3, r0, #2
-   17be6:	428b      	cmp	r3, r1
-   17be8:	d301      	bcc.n	17bee <__divsi3+0xea>
-   17bea:	008b      	lsls	r3, r1, #2
-   17bec:	1ac0      	subs	r0, r0, r3
-   17bee:	4152      	adcs	r2, r2
-   17bf0:	0843      	lsrs	r3, r0, #1
-   17bf2:	428b      	cmp	r3, r1
-   17bf4:	d301      	bcc.n	17bfa <__divsi3+0xf6>
-   17bf6:	004b      	lsls	r3, r1, #1
-   17bf8:	1ac0      	subs	r0, r0, r3
-   17bfa:	4152      	adcs	r2, r2
-   17bfc:	1a41      	subs	r1, r0, r1
-   17bfe:	d200      	bcs.n	17c02 <__divsi3+0xfe>
-   17c00:	4601      	mov	r1, r0
-   17c02:	4152      	adcs	r2, r2
-   17c04:	4610      	mov	r0, r2
-   17c06:	4770      	bx	lr
-   17c08:	e05d      	b.n	17cc6 <__divsi3+0x1c2>
-   17c0a:	0fca      	lsrs	r2, r1, #31
-   17c0c:	d000      	beq.n	17c10 <__divsi3+0x10c>
-   17c0e:	4249      	negs	r1, r1
-   17c10:	1003      	asrs	r3, r0, #32
-   17c12:	d300      	bcc.n	17c16 <__divsi3+0x112>
-   17c14:	4240      	negs	r0, r0
-   17c16:	4053      	eors	r3, r2
-   17c18:	2200      	movs	r2, #0
-   17c1a:	469c      	mov	ip, r3
-   17c1c:	0903      	lsrs	r3, r0, #4
-   17c1e:	428b      	cmp	r3, r1
-   17c20:	d32d      	bcc.n	17c7e <__divsi3+0x17a>
-   17c22:	0a03      	lsrs	r3, r0, #8
-   17c24:	428b      	cmp	r3, r1
-   17c26:	d312      	bcc.n	17c4e <__divsi3+0x14a>
-   17c28:	22fc      	movs	r2, #252	; 0xfc
-   17c2a:	0189      	lsls	r1, r1, #6
-   17c2c:	ba12      	rev	r2, r2
-   17c2e:	0a03      	lsrs	r3, r0, #8
-   17c30:	428b      	cmp	r3, r1
-   17c32:	d30c      	bcc.n	17c4e <__divsi3+0x14a>
-   17c34:	0189      	lsls	r1, r1, #6
-   17c36:	1192      	asrs	r2, r2, #6
-   17c38:	428b      	cmp	r3, r1
-   17c3a:	d308      	bcc.n	17c4e <__divsi3+0x14a>
-   17c3c:	0189      	lsls	r1, r1, #6
-   17c3e:	1192      	asrs	r2, r2, #6
-   17c40:	428b      	cmp	r3, r1
-   17c42:	d304      	bcc.n	17c4e <__divsi3+0x14a>
-   17c44:	0189      	lsls	r1, r1, #6
-   17c46:	d03a      	beq.n	17cbe <__divsi3+0x1ba>
-   17c48:	1192      	asrs	r2, r2, #6
-   17c4a:	e000      	b.n	17c4e <__divsi3+0x14a>
-   17c4c:	0989      	lsrs	r1, r1, #6
-   17c4e:	09c3      	lsrs	r3, r0, #7
-   17c50:	428b      	cmp	r3, r1
-   17c52:	d301      	bcc.n	17c58 <__divsi3+0x154>
-   17c54:	01cb      	lsls	r3, r1, #7
-   17c56:	1ac0      	subs	r0, r0, r3
-   17c58:	4152      	adcs	r2, r2
-   17c5a:	0983      	lsrs	r3, r0, #6
-   17c5c:	428b      	cmp	r3, r1
-   17c5e:	d301      	bcc.n	17c64 <__divsi3+0x160>
-   17c60:	018b      	lsls	r3, r1, #6
-   17c62:	1ac0      	subs	r0, r0, r3
-   17c64:	4152      	adcs	r2, r2
-   17c66:	0943      	lsrs	r3, r0, #5
-   17c68:	428b      	cmp	r3, r1
-   17c6a:	d301      	bcc.n	17c70 <__divsi3+0x16c>
-   17c6c:	014b      	lsls	r3, r1, #5
-   17c6e:	1ac0      	subs	r0, r0, r3
-   17c70:	4152      	adcs	r2, r2
-   17c72:	0903      	lsrs	r3, r0, #4
-   17c74:	428b      	cmp	r3, r1
-   17c76:	d301      	bcc.n	17c7c <__divsi3+0x178>
-   17c78:	010b      	lsls	r3, r1, #4
-   17c7a:	1ac0      	subs	r0, r0, r3
-   17c7c:	4152      	adcs	r2, r2
-   17c7e:	08c3      	lsrs	r3, r0, #3
-   17c80:	428b      	cmp	r3, r1
-   17c82:	d301      	bcc.n	17c88 <__divsi3+0x184>
-   17c84:	00cb      	lsls	r3, r1, #3
-   17c86:	1ac0      	subs	r0, r0, r3
-   17c88:	4152      	adcs	r2, r2
-   17c8a:	0883      	lsrs	r3, r0, #2
-   17c8c:	428b      	cmp	r3, r1
-   17c8e:	d301      	bcc.n	17c94 <__divsi3+0x190>
-   17c90:	008b      	lsls	r3, r1, #2
-   17c92:	1ac0      	subs	r0, r0, r3
-   17c94:	4152      	adcs	r2, r2
-   17c96:	d2d9      	bcs.n	17c4c <__divsi3+0x148>
-   17c98:	0843      	lsrs	r3, r0, #1
-   17c9a:	428b      	cmp	r3, r1
-   17c9c:	d301      	bcc.n	17ca2 <__divsi3+0x19e>
-   17c9e:	004b      	lsls	r3, r1, #1
-   17ca0:	1ac0      	subs	r0, r0, r3
-   17ca2:	4152      	adcs	r2, r2
-   17ca4:	1a41      	subs	r1, r0, r1
-   17ca6:	d200      	bcs.n	17caa <__divsi3+0x1a6>
-   17ca8:	4601      	mov	r1, r0
-   17caa:	4663      	mov	r3, ip
-   17cac:	4152      	adcs	r2, r2
-   17cae:	105b      	asrs	r3, r3, #1
-   17cb0:	4610      	mov	r0, r2
-   17cb2:	d301      	bcc.n	17cb8 <__divsi3+0x1b4>
-   17cb4:	4240      	negs	r0, r0
-   17cb6:	2b00      	cmp	r3, #0
-   17cb8:	d500      	bpl.n	17cbc <__divsi3+0x1b8>
-   17cba:	4249      	negs	r1, r1
-   17cbc:	4770      	bx	lr
-   17cbe:	4663      	mov	r3, ip
-   17cc0:	105b      	asrs	r3, r3, #1
-   17cc2:	d300      	bcc.n	17cc6 <__divsi3+0x1c2>
-   17cc4:	4240      	negs	r0, r0
-   17cc6:	b501      	push	{r0, lr}
-   17cc8:	2000      	movs	r0, #0
-   17cca:	f000 f805 	bl	17cd8 <__aeabi_idiv0>
-   17cce:	bd02      	pop	{r1, pc}
-
-00017cd0 <__aeabi_idivmod>:
-   17cd0:	2900      	cmp	r1, #0
-   17cd2:	d0f8      	beq.n	17cc6 <__divsi3+0x1c2>
-   17cd4:	e716      	b.n	17b04 <__divsi3>
-   17cd6:	4770      	bx	lr
-
-00017cd8 <__aeabi_idiv0>:
-   17cd8:	4770      	bx	lr
-   17cda:	46c0      	nop			; (mov r8, r8)
-
-00017cdc <__aeabi_uldivmod>:
-   17cdc:	2b00      	cmp	r3, #0
-   17cde:	d111      	bne.n	17d04 <__aeabi_uldivmod+0x28>
-   17ce0:	2a00      	cmp	r2, #0
-   17ce2:	d10f      	bne.n	17d04 <__aeabi_uldivmod+0x28>
-   17ce4:	2900      	cmp	r1, #0
-   17ce6:	d100      	bne.n	17cea <__aeabi_uldivmod+0xe>
-   17ce8:	2800      	cmp	r0, #0
-   17cea:	d002      	beq.n	17cf2 <__aeabi_uldivmod+0x16>
-   17cec:	2100      	movs	r1, #0
-   17cee:	43c9      	mvns	r1, r1
-   17cf0:	1c08      	adds	r0, r1, #0
-   17cf2:	b407      	push	{r0, r1, r2}
-   17cf4:	4802      	ldr	r0, [pc, #8]	; (17d00 <__aeabi_uldivmod+0x24>)
-   17cf6:	a102      	add	r1, pc, #8	; (adr r1, 17d00 <__aeabi_uldivmod+0x24>)
-   17cf8:	1840      	adds	r0, r0, r1
-   17cfa:	9002      	str	r0, [sp, #8]
-   17cfc:	bd03      	pop	{r0, r1, pc}
-   17cfe:	46c0      	nop			; (mov r8, r8)
-   17d00:	ffffffd9 	.word	0xffffffd9
-   17d04:	b403      	push	{r0, r1}
-   17d06:	4668      	mov	r0, sp
-   17d08:	b501      	push	{r0, lr}
-   17d0a:	9802      	ldr	r0, [sp, #8]
-   17d0c:	f000 f830 	bl	17d70 <__udivmoddi4>
-   17d10:	9b01      	ldr	r3, [sp, #4]
-   17d12:	469e      	mov	lr, r3
-   17d14:	b002      	add	sp, #8
-   17d16:	bc0c      	pop	{r2, r3}
-   17d18:	4770      	bx	lr
-   17d1a:	46c0      	nop			; (mov r8, r8)
-
-00017d1c <__aeabi_lmul>:
-   17d1c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   17d1e:	46ce      	mov	lr, r9
-   17d20:	4647      	mov	r7, r8
-   17d22:	0415      	lsls	r5, r2, #16
-   17d24:	0c2d      	lsrs	r5, r5, #16
-   17d26:	002e      	movs	r6, r5
-   17d28:	b580      	push	{r7, lr}
-   17d2a:	0407      	lsls	r7, r0, #16
-   17d2c:	0c14      	lsrs	r4, r2, #16
-   17d2e:	0c3f      	lsrs	r7, r7, #16
-   17d30:	4699      	mov	r9, r3
-   17d32:	0c03      	lsrs	r3, r0, #16
-   17d34:	437e      	muls	r6, r7
-   17d36:	435d      	muls	r5, r3
-   17d38:	4367      	muls	r7, r4
-   17d3a:	4363      	muls	r3, r4
-   17d3c:	197f      	adds	r7, r7, r5
-   17d3e:	0c34      	lsrs	r4, r6, #16
-   17d40:	19e4      	adds	r4, r4, r7
-   17d42:	469c      	mov	ip, r3
-   17d44:	42a5      	cmp	r5, r4
-   17d46:	d903      	bls.n	17d50 <__aeabi_lmul+0x34>
-   17d48:	2380      	movs	r3, #128	; 0x80
-   17d4a:	025b      	lsls	r3, r3, #9
-   17d4c:	4698      	mov	r8, r3
-   17d4e:	44c4      	add	ip, r8
-   17d50:	464b      	mov	r3, r9
-   17d52:	4351      	muls	r1, r2
-   17d54:	4343      	muls	r3, r0
-   17d56:	0436      	lsls	r6, r6, #16
-   17d58:	0c36      	lsrs	r6, r6, #16
-   17d5a:	0c25      	lsrs	r5, r4, #16
-   17d5c:	0424      	lsls	r4, r4, #16
-   17d5e:	4465      	add	r5, ip
-   17d60:	19a4      	adds	r4, r4, r6
-   17d62:	1859      	adds	r1, r3, r1
-   17d64:	1949      	adds	r1, r1, r5
-   17d66:	0020      	movs	r0, r4
-   17d68:	bc0c      	pop	{r2, r3}
-   17d6a:	4690      	mov	r8, r2
-   17d6c:	4699      	mov	r9, r3
-   17d6e:	bdf0      	pop	{r4, r5, r6, r7, pc}
-
-00017d70 <__udivmoddi4>:
-   17d70:	b5f0      	push	{r4, r5, r6, r7, lr}
-   17d72:	4657      	mov	r7, sl
-   17d74:	464e      	mov	r6, r9
-   17d76:	4645      	mov	r5, r8
-   17d78:	46de      	mov	lr, fp
-   17d7a:	b5e0      	push	{r5, r6, r7, lr}
-   17d7c:	0004      	movs	r4, r0
-   17d7e:	b083      	sub	sp, #12
-   17d80:	000d      	movs	r5, r1
-   17d82:	4692      	mov	sl, r2
-   17d84:	4699      	mov	r9, r3
-   17d86:	428b      	cmp	r3, r1
-   17d88:	d82f      	bhi.n	17dea <__udivmoddi4+0x7a>
-   17d8a:	d02c      	beq.n	17de6 <__udivmoddi4+0x76>
-   17d8c:	4649      	mov	r1, r9
-   17d8e:	4650      	mov	r0, sl
-   17d90:	f000 f8cc 	bl	17f2c <__clzdi2>
-   17d94:	0029      	movs	r1, r5
-   17d96:	0006      	movs	r6, r0
-   17d98:	0020      	movs	r0, r4
-   17d9a:	f000 f8c7 	bl	17f2c <__clzdi2>
-   17d9e:	1a33      	subs	r3, r6, r0
-   17da0:	4698      	mov	r8, r3
-   17da2:	3b20      	subs	r3, #32
-   17da4:	469b      	mov	fp, r3
-   17da6:	d500      	bpl.n	17daa <__udivmoddi4+0x3a>
-   17da8:	e074      	b.n	17e94 <__udivmoddi4+0x124>
-   17daa:	4653      	mov	r3, sl
-   17dac:	465a      	mov	r2, fp
-   17dae:	4093      	lsls	r3, r2
-   17db0:	001f      	movs	r7, r3
-   17db2:	4653      	mov	r3, sl
-   17db4:	4642      	mov	r2, r8
-   17db6:	4093      	lsls	r3, r2
-   17db8:	001e      	movs	r6, r3
-   17dba:	42af      	cmp	r7, r5
-   17dbc:	d829      	bhi.n	17e12 <__udivmoddi4+0xa2>
-   17dbe:	d026      	beq.n	17e0e <__udivmoddi4+0x9e>
-   17dc0:	465b      	mov	r3, fp
-   17dc2:	1ba4      	subs	r4, r4, r6
-   17dc4:	41bd      	sbcs	r5, r7
-   17dc6:	2b00      	cmp	r3, #0
-   17dc8:	da00      	bge.n	17dcc <__udivmoddi4+0x5c>
-   17dca:	e079      	b.n	17ec0 <__udivmoddi4+0x150>
-   17dcc:	2200      	movs	r2, #0
-   17dce:	2300      	movs	r3, #0
-   17dd0:	9200      	str	r2, [sp, #0]
-   17dd2:	9301      	str	r3, [sp, #4]
-   17dd4:	2301      	movs	r3, #1
-   17dd6:	465a      	mov	r2, fp
-   17dd8:	4093      	lsls	r3, r2
-   17dda:	9301      	str	r3, [sp, #4]
-   17ddc:	2301      	movs	r3, #1
-   17dde:	4642      	mov	r2, r8
-   17de0:	4093      	lsls	r3, r2
-   17de2:	9300      	str	r3, [sp, #0]
-   17de4:	e019      	b.n	17e1a <__udivmoddi4+0xaa>
-   17de6:	4282      	cmp	r2, r0
-   17de8:	d9d0      	bls.n	17d8c <__udivmoddi4+0x1c>
-   17dea:	2200      	movs	r2, #0
-   17dec:	2300      	movs	r3, #0
-   17dee:	9200      	str	r2, [sp, #0]
-   17df0:	9301      	str	r3, [sp, #4]
-   17df2:	9b0c      	ldr	r3, [sp, #48]	; 0x30
-   17df4:	2b00      	cmp	r3, #0
-   17df6:	d001      	beq.n	17dfc <__udivmoddi4+0x8c>
-   17df8:	601c      	str	r4, [r3, #0]
-   17dfa:	605d      	str	r5, [r3, #4]
-   17dfc:	9800      	ldr	r0, [sp, #0]
-   17dfe:	9901      	ldr	r1, [sp, #4]
-   17e00:	b003      	add	sp, #12
-   17e02:	bc3c      	pop	{r2, r3, r4, r5}
-   17e04:	4690      	mov	r8, r2
-   17e06:	4699      	mov	r9, r3
-   17e08:	46a2      	mov	sl, r4
-   17e0a:	46ab      	mov	fp, r5
-   17e0c:	bdf0      	pop	{r4, r5, r6, r7, pc}
-   17e0e:	42a3      	cmp	r3, r4
-   17e10:	d9d6      	bls.n	17dc0 <__udivmoddi4+0x50>
-   17e12:	2200      	movs	r2, #0
-   17e14:	2300      	movs	r3, #0
-   17e16:	9200      	str	r2, [sp, #0]
-   17e18:	9301      	str	r3, [sp, #4]
-   17e1a:	4643      	mov	r3, r8
-   17e1c:	2b00      	cmp	r3, #0
-   17e1e:	d0e8      	beq.n	17df2 <__udivmoddi4+0x82>
-   17e20:	07fb      	lsls	r3, r7, #31
-   17e22:	0872      	lsrs	r2, r6, #1
-   17e24:	431a      	orrs	r2, r3
-   17e26:	4646      	mov	r6, r8
-   17e28:	087b      	lsrs	r3, r7, #1
-   17e2a:	e00e      	b.n	17e4a <__udivmoddi4+0xda>
-   17e2c:	42ab      	cmp	r3, r5
-   17e2e:	d101      	bne.n	17e34 <__udivmoddi4+0xc4>
-   17e30:	42a2      	cmp	r2, r4
-   17e32:	d80c      	bhi.n	17e4e <__udivmoddi4+0xde>
-   17e34:	1aa4      	subs	r4, r4, r2
-   17e36:	419d      	sbcs	r5, r3
-   17e38:	2001      	movs	r0, #1
-   17e3a:	1924      	adds	r4, r4, r4
-   17e3c:	416d      	adcs	r5, r5
-   17e3e:	2100      	movs	r1, #0
-   17e40:	3e01      	subs	r6, #1
-   17e42:	1824      	adds	r4, r4, r0
-   17e44:	414d      	adcs	r5, r1
-   17e46:	2e00      	cmp	r6, #0
-   17e48:	d006      	beq.n	17e58 <__udivmoddi4+0xe8>
-   17e4a:	42ab      	cmp	r3, r5
-   17e4c:	d9ee      	bls.n	17e2c <__udivmoddi4+0xbc>
-   17e4e:	3e01      	subs	r6, #1
-   17e50:	1924      	adds	r4, r4, r4
-   17e52:	416d      	adcs	r5, r5
-   17e54:	2e00      	cmp	r6, #0
-   17e56:	d1f8      	bne.n	17e4a <__udivmoddi4+0xda>
-   17e58:	465b      	mov	r3, fp
-   17e5a:	9800      	ldr	r0, [sp, #0]
-   17e5c:	9901      	ldr	r1, [sp, #4]
-   17e5e:	1900      	adds	r0, r0, r4
-   17e60:	4169      	adcs	r1, r5
-   17e62:	2b00      	cmp	r3, #0
-   17e64:	db22      	blt.n	17eac <__udivmoddi4+0x13c>
-   17e66:	002b      	movs	r3, r5
-   17e68:	465a      	mov	r2, fp
-   17e6a:	40d3      	lsrs	r3, r2
-   17e6c:	002a      	movs	r2, r5
-   17e6e:	4644      	mov	r4, r8
-   17e70:	40e2      	lsrs	r2, r4
-   17e72:	001c      	movs	r4, r3
-   17e74:	465b      	mov	r3, fp
-   17e76:	0015      	movs	r5, r2
-   17e78:	2b00      	cmp	r3, #0
-   17e7a:	db2c      	blt.n	17ed6 <__udivmoddi4+0x166>
-   17e7c:	0026      	movs	r6, r4
-   17e7e:	409e      	lsls	r6, r3
-   17e80:	0033      	movs	r3, r6
-   17e82:	0026      	movs	r6, r4
-   17e84:	4647      	mov	r7, r8
-   17e86:	40be      	lsls	r6, r7
-   17e88:	0032      	movs	r2, r6
-   17e8a:	1a80      	subs	r0, r0, r2
-   17e8c:	4199      	sbcs	r1, r3
-   17e8e:	9000      	str	r0, [sp, #0]
-   17e90:	9101      	str	r1, [sp, #4]
-   17e92:	e7ae      	b.n	17df2 <__udivmoddi4+0x82>
-   17e94:	4642      	mov	r2, r8
-   17e96:	2320      	movs	r3, #32
-   17e98:	1a9b      	subs	r3, r3, r2
-   17e9a:	4652      	mov	r2, sl
-   17e9c:	40da      	lsrs	r2, r3
-   17e9e:	4641      	mov	r1, r8
-   17ea0:	0013      	movs	r3, r2
-   17ea2:	464a      	mov	r2, r9
-   17ea4:	408a      	lsls	r2, r1
-   17ea6:	0017      	movs	r7, r2
-   17ea8:	431f      	orrs	r7, r3
-   17eaa:	e782      	b.n	17db2 <__udivmoddi4+0x42>
-   17eac:	4642      	mov	r2, r8
-   17eae:	2320      	movs	r3, #32
-   17eb0:	1a9b      	subs	r3, r3, r2
-   17eb2:	002a      	movs	r2, r5
-   17eb4:	4646      	mov	r6, r8
-   17eb6:	409a      	lsls	r2, r3
-   17eb8:	0023      	movs	r3, r4
-   17eba:	40f3      	lsrs	r3, r6
-   17ebc:	4313      	orrs	r3, r2
-   17ebe:	e7d5      	b.n	17e6c <__udivmoddi4+0xfc>
-   17ec0:	4642      	mov	r2, r8
-   17ec2:	2320      	movs	r3, #32
-   17ec4:	2100      	movs	r1, #0
-   17ec6:	1a9b      	subs	r3, r3, r2
-   17ec8:	2200      	movs	r2, #0
-   17eca:	9100      	str	r1, [sp, #0]
-   17ecc:	9201      	str	r2, [sp, #4]
-   17ece:	2201      	movs	r2, #1
-   17ed0:	40da      	lsrs	r2, r3
-   17ed2:	9201      	str	r2, [sp, #4]
-   17ed4:	e782      	b.n	17ddc <__udivmoddi4+0x6c>
-   17ed6:	4642      	mov	r2, r8
-   17ed8:	2320      	movs	r3, #32
-   17eda:	0026      	movs	r6, r4
-   17edc:	1a9b      	subs	r3, r3, r2
-   17ede:	40de      	lsrs	r6, r3
-   17ee0:	002f      	movs	r7, r5
-   17ee2:	46b4      	mov	ip, r6
-   17ee4:	4097      	lsls	r7, r2
-   17ee6:	4666      	mov	r6, ip
-   17ee8:	003b      	movs	r3, r7
-   17eea:	4333      	orrs	r3, r6
-   17eec:	e7c9      	b.n	17e82 <__udivmoddi4+0x112>
-   17eee:	46c0      	nop			; (mov r8, r8)
-
-00017ef0 <__clzsi2>:
-   17ef0:	211c      	movs	r1, #28
-   17ef2:	2301      	movs	r3, #1
-   17ef4:	041b      	lsls	r3, r3, #16
-   17ef6:	4298      	cmp	r0, r3
-   17ef8:	d301      	bcc.n	17efe <__clzsi2+0xe>
-   17efa:	0c00      	lsrs	r0, r0, #16
-   17efc:	3910      	subs	r1, #16
-   17efe:	0a1b      	lsrs	r3, r3, #8
-   17f00:	4298      	cmp	r0, r3
-   17f02:	d301      	bcc.n	17f08 <__clzsi2+0x18>
-   17f04:	0a00      	lsrs	r0, r0, #8
-   17f06:	3908      	subs	r1, #8
-   17f08:	091b      	lsrs	r3, r3, #4
-   17f0a:	4298      	cmp	r0, r3
-   17f0c:	d301      	bcc.n	17f12 <__clzsi2+0x22>
-   17f0e:	0900      	lsrs	r0, r0, #4
-   17f10:	3904      	subs	r1, #4
-   17f12:	a202      	add	r2, pc, #8	; (adr r2, 17f1c <__clzsi2+0x2c>)
-   17f14:	5c10      	ldrb	r0, [r2, r0]
-   17f16:	1840      	adds	r0, r0, r1
-   17f18:	4770      	bx	lr
-   17f1a:	46c0      	nop			; (mov r8, r8)
-   17f1c:	02020304 	.word	0x02020304
-   17f20:	01010101 	.word	0x01010101
+   17aea:	0983      	lsrs	r3, r0, #6
+   17aec:	428b      	cmp	r3, r1
+   17aee:	d301      	bcc.n	17af4 <__divsi3+0x160>
+   17af0:	018b      	lsls	r3, r1, #6
+   17af2:	1ac0      	subs	r0, r0, r3
+   17af4:	4152      	adcs	r2, r2
+   17af6:	0943      	lsrs	r3, r0, #5
+   17af8:	428b      	cmp	r3, r1
+   17afa:	d301      	bcc.n	17b00 <__divsi3+0x16c>
+   17afc:	014b      	lsls	r3, r1, #5
+   17afe:	1ac0      	subs	r0, r0, r3
+   17b00:	4152      	adcs	r2, r2
+   17b02:	0903      	lsrs	r3, r0, #4
+   17b04:	428b      	cmp	r3, r1
+   17b06:	d301      	bcc.n	17b0c <__divsi3+0x178>
+   17b08:	010b      	lsls	r3, r1, #4
+   17b0a:	1ac0      	subs	r0, r0, r3
+   17b0c:	4152      	adcs	r2, r2
+   17b0e:	08c3      	lsrs	r3, r0, #3
+   17b10:	428b      	cmp	r3, r1
+   17b12:	d301      	bcc.n	17b18 <__divsi3+0x184>
+   17b14:	00cb      	lsls	r3, r1, #3
+   17b16:	1ac0      	subs	r0, r0, r3
+   17b18:	4152      	adcs	r2, r2
+   17b1a:	0883      	lsrs	r3, r0, #2
+   17b1c:	428b      	cmp	r3, r1
+   17b1e:	d301      	bcc.n	17b24 <__divsi3+0x190>
+   17b20:	008b      	lsls	r3, r1, #2
+   17b22:	1ac0      	subs	r0, r0, r3
+   17b24:	4152      	adcs	r2, r2
+   17b26:	d2d9      	bcs.n	17adc <__divsi3+0x148>
+   17b28:	0843      	lsrs	r3, r0, #1
+   17b2a:	428b      	cmp	r3, r1
+   17b2c:	d301      	bcc.n	17b32 <__divsi3+0x19e>
+   17b2e:	004b      	lsls	r3, r1, #1
+   17b30:	1ac0      	subs	r0, r0, r3
+   17b32:	4152      	adcs	r2, r2
+   17b34:	1a41      	subs	r1, r0, r1
+   17b36:	d200      	bcs.n	17b3a <__divsi3+0x1a6>
+   17b38:	4601      	mov	r1, r0
+   17b3a:	4663      	mov	r3, ip
+   17b3c:	4152      	adcs	r2, r2
+   17b3e:	105b      	asrs	r3, r3, #1
+   17b40:	4610      	mov	r0, r2
+   17b42:	d301      	bcc.n	17b48 <__divsi3+0x1b4>
+   17b44:	4240      	negs	r0, r0
+   17b46:	2b00      	cmp	r3, #0
+   17b48:	d500      	bpl.n	17b4c <__divsi3+0x1b8>
+   17b4a:	4249      	negs	r1, r1
+   17b4c:	4770      	bx	lr
+   17b4e:	4663      	mov	r3, ip
+   17b50:	105b      	asrs	r3, r3, #1
+   17b52:	d300      	bcc.n	17b56 <__divsi3+0x1c2>
+   17b54:	4240      	negs	r0, r0
+   17b56:	b501      	push	{r0, lr}
+   17b58:	2000      	movs	r0, #0
+   17b5a:	f000 f805 	bl	17b68 <__aeabi_idiv0>
+   17b5e:	bd02      	pop	{r1, pc}
+
+00017b60 <__aeabi_idivmod>:
+   17b60:	2900      	cmp	r1, #0
+   17b62:	d0f8      	beq.n	17b56 <__divsi3+0x1c2>
+   17b64:	e716      	b.n	17994 <__divsi3>
+   17b66:	4770      	bx	lr
+
+00017b68 <__aeabi_idiv0>:
+   17b68:	4770      	bx	lr
+   17b6a:	46c0      	nop			; (mov r8, r8)
+
+00017b6c <__aeabi_uldivmod>:
+   17b6c:	2b00      	cmp	r3, #0
+   17b6e:	d111      	bne.n	17b94 <__aeabi_uldivmod+0x28>
+   17b70:	2a00      	cmp	r2, #0
+   17b72:	d10f      	bne.n	17b94 <__aeabi_uldivmod+0x28>
+   17b74:	2900      	cmp	r1, #0
+   17b76:	d100      	bne.n	17b7a <__aeabi_uldivmod+0xe>
+   17b78:	2800      	cmp	r0, #0
+   17b7a:	d002      	beq.n	17b82 <__aeabi_uldivmod+0x16>
+   17b7c:	2100      	movs	r1, #0
+   17b7e:	43c9      	mvns	r1, r1
+   17b80:	1c08      	adds	r0, r1, #0
+   17b82:	b407      	push	{r0, r1, r2}
+   17b84:	4802      	ldr	r0, [pc, #8]	; (17b90 <__aeabi_uldivmod+0x24>)
+   17b86:	a102      	add	r1, pc, #8	; (adr r1, 17b90 <__aeabi_uldivmod+0x24>)
+   17b88:	1840      	adds	r0, r0, r1
+   17b8a:	9002      	str	r0, [sp, #8]
+   17b8c:	bd03      	pop	{r0, r1, pc}
+   17b8e:	46c0      	nop			; (mov r8, r8)
+   17b90:	ffffffd9 	.word	0xffffffd9
+   17b94:	b403      	push	{r0, r1}
+   17b96:	4668      	mov	r0, sp
+   17b98:	b501      	push	{r0, lr}
+   17b9a:	9802      	ldr	r0, [sp, #8]
+   17b9c:	f000 f830 	bl	17c00 <__udivmoddi4>
+   17ba0:	9b01      	ldr	r3, [sp, #4]
+   17ba2:	469e      	mov	lr, r3
+   17ba4:	b002      	add	sp, #8
+   17ba6:	bc0c      	pop	{r2, r3}
+   17ba8:	4770      	bx	lr
+   17baa:	46c0      	nop			; (mov r8, r8)
+
+00017bac <__aeabi_lmul>:
+   17bac:	b5f0      	push	{r4, r5, r6, r7, lr}
+   17bae:	46ce      	mov	lr, r9
+   17bb0:	4647      	mov	r7, r8
+   17bb2:	0415      	lsls	r5, r2, #16
+   17bb4:	0c2d      	lsrs	r5, r5, #16
+   17bb6:	002e      	movs	r6, r5
+   17bb8:	b580      	push	{r7, lr}
+   17bba:	0407      	lsls	r7, r0, #16
+   17bbc:	0c14      	lsrs	r4, r2, #16
+   17bbe:	0c3f      	lsrs	r7, r7, #16
+   17bc0:	4699      	mov	r9, r3
+   17bc2:	0c03      	lsrs	r3, r0, #16
+   17bc4:	437e      	muls	r6, r7
+   17bc6:	435d      	muls	r5, r3
+   17bc8:	4367      	muls	r7, r4
+   17bca:	4363      	muls	r3, r4
+   17bcc:	197f      	adds	r7, r7, r5
+   17bce:	0c34      	lsrs	r4, r6, #16
+   17bd0:	19e4      	adds	r4, r4, r7
+   17bd2:	469c      	mov	ip, r3
+   17bd4:	42a5      	cmp	r5, r4
+   17bd6:	d903      	bls.n	17be0 <__aeabi_lmul+0x34>
+   17bd8:	2380      	movs	r3, #128	; 0x80
+   17bda:	025b      	lsls	r3, r3, #9
+   17bdc:	4698      	mov	r8, r3
+   17bde:	44c4      	add	ip, r8
+   17be0:	464b      	mov	r3, r9
+   17be2:	4351      	muls	r1, r2
+   17be4:	4343      	muls	r3, r0
+   17be6:	0436      	lsls	r6, r6, #16
+   17be8:	0c36      	lsrs	r6, r6, #16
+   17bea:	0c25      	lsrs	r5, r4, #16
+   17bec:	0424      	lsls	r4, r4, #16
+   17bee:	4465      	add	r5, ip
+   17bf0:	19a4      	adds	r4, r4, r6
+   17bf2:	1859      	adds	r1, r3, r1
+   17bf4:	1949      	adds	r1, r1, r5
+   17bf6:	0020      	movs	r0, r4
+   17bf8:	bc0c      	pop	{r2, r3}
+   17bfa:	4690      	mov	r8, r2
+   17bfc:	4699      	mov	r9, r3
+   17bfe:	bdf0      	pop	{r4, r5, r6, r7, pc}
+
+00017c00 <__udivmoddi4>:
+   17c00:	b5f0      	push	{r4, r5, r6, r7, lr}
+   17c02:	4657      	mov	r7, sl
+   17c04:	464e      	mov	r6, r9
+   17c06:	4645      	mov	r5, r8
+   17c08:	46de      	mov	lr, fp
+   17c0a:	b5e0      	push	{r5, r6, r7, lr}
+   17c0c:	0004      	movs	r4, r0
+   17c0e:	b083      	sub	sp, #12
+   17c10:	000d      	movs	r5, r1
+   17c12:	4692      	mov	sl, r2
+   17c14:	4699      	mov	r9, r3
+   17c16:	428b      	cmp	r3, r1
+   17c18:	d82f      	bhi.n	17c7a <__udivmoddi4+0x7a>
+   17c1a:	d02c      	beq.n	17c76 <__udivmoddi4+0x76>
+   17c1c:	4649      	mov	r1, r9
+   17c1e:	4650      	mov	r0, sl
+   17c20:	f000 f8cc 	bl	17dbc <__clzdi2>
+   17c24:	0029      	movs	r1, r5
+   17c26:	0006      	movs	r6, r0
+   17c28:	0020      	movs	r0, r4
+   17c2a:	f000 f8c7 	bl	17dbc <__clzdi2>
+   17c2e:	1a33      	subs	r3, r6, r0
+   17c30:	4698      	mov	r8, r3
+   17c32:	3b20      	subs	r3, #32
+   17c34:	469b      	mov	fp, r3
+   17c36:	d500      	bpl.n	17c3a <__udivmoddi4+0x3a>
+   17c38:	e074      	b.n	17d24 <__udivmoddi4+0x124>
+   17c3a:	4653      	mov	r3, sl
+   17c3c:	465a      	mov	r2, fp
+   17c3e:	4093      	lsls	r3, r2
+   17c40:	001f      	movs	r7, r3
+   17c42:	4653      	mov	r3, sl
+   17c44:	4642      	mov	r2, r8
+   17c46:	4093      	lsls	r3, r2
+   17c48:	001e      	movs	r6, r3
+   17c4a:	42af      	cmp	r7, r5
+   17c4c:	d829      	bhi.n	17ca2 <__udivmoddi4+0xa2>
+   17c4e:	d026      	beq.n	17c9e <__udivmoddi4+0x9e>
+   17c50:	465b      	mov	r3, fp
+   17c52:	1ba4      	subs	r4, r4, r6
+   17c54:	41bd      	sbcs	r5, r7
+   17c56:	2b00      	cmp	r3, #0
+   17c58:	da00      	bge.n	17c5c <__udivmoddi4+0x5c>
+   17c5a:	e079      	b.n	17d50 <__udivmoddi4+0x150>
+   17c5c:	2200      	movs	r2, #0
+   17c5e:	2300      	movs	r3, #0
+   17c60:	9200      	str	r2, [sp, #0]
+   17c62:	9301      	str	r3, [sp, #4]
+   17c64:	2301      	movs	r3, #1
+   17c66:	465a      	mov	r2, fp
+   17c68:	4093      	lsls	r3, r2
+   17c6a:	9301      	str	r3, [sp, #4]
+   17c6c:	2301      	movs	r3, #1
+   17c6e:	4642      	mov	r2, r8
+   17c70:	4093      	lsls	r3, r2
+   17c72:	9300      	str	r3, [sp, #0]
+   17c74:	e019      	b.n	17caa <__udivmoddi4+0xaa>
+   17c76:	4282      	cmp	r2, r0
+   17c78:	d9d0      	bls.n	17c1c <__udivmoddi4+0x1c>
+   17c7a:	2200      	movs	r2, #0
+   17c7c:	2300      	movs	r3, #0
+   17c7e:	9200      	str	r2, [sp, #0]
+   17c80:	9301      	str	r3, [sp, #4]
+   17c82:	9b0c      	ldr	r3, [sp, #48]	; 0x30
+   17c84:	2b00      	cmp	r3, #0
+   17c86:	d001      	beq.n	17c8c <__udivmoddi4+0x8c>
+   17c88:	601c      	str	r4, [r3, #0]
+   17c8a:	605d      	str	r5, [r3, #4]
+   17c8c:	9800      	ldr	r0, [sp, #0]
+   17c8e:	9901      	ldr	r1, [sp, #4]
+   17c90:	b003      	add	sp, #12
+   17c92:	bc3c      	pop	{r2, r3, r4, r5}
+   17c94:	4690      	mov	r8, r2
+   17c96:	4699      	mov	r9, r3
+   17c98:	46a2      	mov	sl, r4
+   17c9a:	46ab      	mov	fp, r5
+   17c9c:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   17c9e:	42a3      	cmp	r3, r4
+   17ca0:	d9d6      	bls.n	17c50 <__udivmoddi4+0x50>
+   17ca2:	2200      	movs	r2, #0
+   17ca4:	2300      	movs	r3, #0
+   17ca6:	9200      	str	r2, [sp, #0]
+   17ca8:	9301      	str	r3, [sp, #4]
+   17caa:	4643      	mov	r3, r8
+   17cac:	2b00      	cmp	r3, #0
+   17cae:	d0e8      	beq.n	17c82 <__udivmoddi4+0x82>
+   17cb0:	07fb      	lsls	r3, r7, #31
+   17cb2:	0872      	lsrs	r2, r6, #1
+   17cb4:	431a      	orrs	r2, r3
+   17cb6:	4646      	mov	r6, r8
+   17cb8:	087b      	lsrs	r3, r7, #1
+   17cba:	e00e      	b.n	17cda <__udivmoddi4+0xda>
+   17cbc:	42ab      	cmp	r3, r5
+   17cbe:	d101      	bne.n	17cc4 <__udivmoddi4+0xc4>
+   17cc0:	42a2      	cmp	r2, r4
+   17cc2:	d80c      	bhi.n	17cde <__udivmoddi4+0xde>
+   17cc4:	1aa4      	subs	r4, r4, r2
+   17cc6:	419d      	sbcs	r5, r3
+   17cc8:	2001      	movs	r0, #1
+   17cca:	1924      	adds	r4, r4, r4
+   17ccc:	416d      	adcs	r5, r5
+   17cce:	2100      	movs	r1, #0
+   17cd0:	3e01      	subs	r6, #1
+   17cd2:	1824      	adds	r4, r4, r0
+   17cd4:	414d      	adcs	r5, r1
+   17cd6:	2e00      	cmp	r6, #0
+   17cd8:	d006      	beq.n	17ce8 <__udivmoddi4+0xe8>
+   17cda:	42ab      	cmp	r3, r5
+   17cdc:	d9ee      	bls.n	17cbc <__udivmoddi4+0xbc>
+   17cde:	3e01      	subs	r6, #1
+   17ce0:	1924      	adds	r4, r4, r4
+   17ce2:	416d      	adcs	r5, r5
+   17ce4:	2e00      	cmp	r6, #0
+   17ce6:	d1f8      	bne.n	17cda <__udivmoddi4+0xda>
+   17ce8:	465b      	mov	r3, fp
+   17cea:	9800      	ldr	r0, [sp, #0]
+   17cec:	9901      	ldr	r1, [sp, #4]
+   17cee:	1900      	adds	r0, r0, r4
+   17cf0:	4169      	adcs	r1, r5
+   17cf2:	2b00      	cmp	r3, #0
+   17cf4:	db22      	blt.n	17d3c <__udivmoddi4+0x13c>
+   17cf6:	002b      	movs	r3, r5
+   17cf8:	465a      	mov	r2, fp
+   17cfa:	40d3      	lsrs	r3, r2
+   17cfc:	002a      	movs	r2, r5
+   17cfe:	4644      	mov	r4, r8
+   17d00:	40e2      	lsrs	r2, r4
+   17d02:	001c      	movs	r4, r3
+   17d04:	465b      	mov	r3, fp
+   17d06:	0015      	movs	r5, r2
+   17d08:	2b00      	cmp	r3, #0
+   17d0a:	db2c      	blt.n	17d66 <__udivmoddi4+0x166>
+   17d0c:	0026      	movs	r6, r4
+   17d0e:	409e      	lsls	r6, r3
+   17d10:	0033      	movs	r3, r6
+   17d12:	0026      	movs	r6, r4
+   17d14:	4647      	mov	r7, r8
+   17d16:	40be      	lsls	r6, r7
+   17d18:	0032      	movs	r2, r6
+   17d1a:	1a80      	subs	r0, r0, r2
+   17d1c:	4199      	sbcs	r1, r3
+   17d1e:	9000      	str	r0, [sp, #0]
+   17d20:	9101      	str	r1, [sp, #4]
+   17d22:	e7ae      	b.n	17c82 <__udivmoddi4+0x82>
+   17d24:	4642      	mov	r2, r8
+   17d26:	2320      	movs	r3, #32
+   17d28:	1a9b      	subs	r3, r3, r2
+   17d2a:	4652      	mov	r2, sl
+   17d2c:	40da      	lsrs	r2, r3
+   17d2e:	4641      	mov	r1, r8
+   17d30:	0013      	movs	r3, r2
+   17d32:	464a      	mov	r2, r9
+   17d34:	408a      	lsls	r2, r1
+   17d36:	0017      	movs	r7, r2
+   17d38:	431f      	orrs	r7, r3
+   17d3a:	e782      	b.n	17c42 <__udivmoddi4+0x42>
+   17d3c:	4642      	mov	r2, r8
+   17d3e:	2320      	movs	r3, #32
+   17d40:	1a9b      	subs	r3, r3, r2
+   17d42:	002a      	movs	r2, r5
+   17d44:	4646      	mov	r6, r8
+   17d46:	409a      	lsls	r2, r3
+   17d48:	0023      	movs	r3, r4
+   17d4a:	40f3      	lsrs	r3, r6
+   17d4c:	4313      	orrs	r3, r2
+   17d4e:	e7d5      	b.n	17cfc <__udivmoddi4+0xfc>
+   17d50:	4642      	mov	r2, r8
+   17d52:	2320      	movs	r3, #32
+   17d54:	2100      	movs	r1, #0
+   17d56:	1a9b      	subs	r3, r3, r2
+   17d58:	2200      	movs	r2, #0
+   17d5a:	9100      	str	r1, [sp, #0]
+   17d5c:	9201      	str	r2, [sp, #4]
+   17d5e:	2201      	movs	r2, #1
+   17d60:	40da      	lsrs	r2, r3
+   17d62:	9201      	str	r2, [sp, #4]
+   17d64:	e782      	b.n	17c6c <__udivmoddi4+0x6c>
+   17d66:	4642      	mov	r2, r8
+   17d68:	2320      	movs	r3, #32
+   17d6a:	0026      	movs	r6, r4
+   17d6c:	1a9b      	subs	r3, r3, r2
+   17d6e:	40de      	lsrs	r6, r3
+   17d70:	002f      	movs	r7, r5
+   17d72:	46b4      	mov	ip, r6
+   17d74:	4097      	lsls	r7, r2
+   17d76:	4666      	mov	r6, ip
+   17d78:	003b      	movs	r3, r7
+   17d7a:	4333      	orrs	r3, r6
+   17d7c:	e7c9      	b.n	17d12 <__udivmoddi4+0x112>
+   17d7e:	46c0      	nop			; (mov r8, r8)
+
+00017d80 <__clzsi2>:
+   17d80:	211c      	movs	r1, #28
+   17d82:	2301      	movs	r3, #1
+   17d84:	041b      	lsls	r3, r3, #16
+   17d86:	4298      	cmp	r0, r3
+   17d88:	d301      	bcc.n	17d8e <__clzsi2+0xe>
+   17d8a:	0c00      	lsrs	r0, r0, #16
+   17d8c:	3910      	subs	r1, #16
+   17d8e:	0a1b      	lsrs	r3, r3, #8
+   17d90:	4298      	cmp	r0, r3
+   17d92:	d301      	bcc.n	17d98 <__clzsi2+0x18>
+   17d94:	0a00      	lsrs	r0, r0, #8
+   17d96:	3908      	subs	r1, #8
+   17d98:	091b      	lsrs	r3, r3, #4
+   17d9a:	4298      	cmp	r0, r3
+   17d9c:	d301      	bcc.n	17da2 <__clzsi2+0x22>
+   17d9e:	0900      	lsrs	r0, r0, #4
+   17da0:	3904      	subs	r1, #4
+   17da2:	a202      	add	r2, pc, #8	; (adr r2, 17dac <__clzsi2+0x2c>)
+   17da4:	5c10      	ldrb	r0, [r2, r0]
+   17da6:	1840      	adds	r0, r0, r1
+   17da8:	4770      	bx	lr
+   17daa:	46c0      	nop			; (mov r8, r8)
+   17dac:	02020304 	.word	0x02020304
+   17db0:	01010101 	.word	0x01010101
 	...
 
-00017f2c <__clzdi2>:
-   17f2c:	b510      	push	{r4, lr}
-   17f2e:	2900      	cmp	r1, #0
-   17f30:	d103      	bne.n	17f3a <__clzdi2+0xe>
-   17f32:	f7ff ffdd 	bl	17ef0 <__clzsi2>
-   17f36:	3020      	adds	r0, #32
-   17f38:	e002      	b.n	17f40 <__clzdi2+0x14>
-   17f3a:	1c08      	adds	r0, r1, #0
-   17f3c:	f7ff ffd8 	bl	17ef0 <__clzsi2>
-   17f40:	bd10      	pop	{r4, pc}
-   17f42:	46c0      	nop			; (mov r8, r8)
-
-00017f44 <__libc_init_array>:
-   17f44:	b570      	push	{r4, r5, r6, lr}
-   17f46:	2600      	movs	r6, #0
-   17f48:	4d0c      	ldr	r5, [pc, #48]	; (17f7c <__libc_init_array+0x38>)
-   17f4a:	4c0d      	ldr	r4, [pc, #52]	; (17f80 <__libc_init_array+0x3c>)
-   17f4c:	1b64      	subs	r4, r4, r5
-   17f4e:	10a4      	asrs	r4, r4, #2
-   17f50:	42a6      	cmp	r6, r4
-   17f52:	d109      	bne.n	17f68 <__libc_init_array+0x24>
-   17f54:	2600      	movs	r6, #0
-   17f56:	f004 fdcb 	bl	1caf0 <_init>
-   17f5a:	4d0a      	ldr	r5, [pc, #40]	; (17f84 <__libc_init_array+0x40>)
-   17f5c:	4c0a      	ldr	r4, [pc, #40]	; (17f88 <__libc_init_array+0x44>)
-   17f5e:	1b64      	subs	r4, r4, r5
-   17f60:	10a4      	asrs	r4, r4, #2
-   17f62:	42a6      	cmp	r6, r4
-   17f64:	d105      	bne.n	17f72 <__libc_init_array+0x2e>
-   17f66:	bd70      	pop	{r4, r5, r6, pc}
-   17f68:	00b3      	lsls	r3, r6, #2
-   17f6a:	58eb      	ldr	r3, [r5, r3]
-   17f6c:	4798      	blx	r3
-   17f6e:	3601      	adds	r6, #1
-   17f70:	e7ee      	b.n	17f50 <__libc_init_array+0xc>
-   17f72:	00b3      	lsls	r3, r6, #2
-   17f74:	58eb      	ldr	r3, [r5, r3]
-   17f76:	4798      	blx	r3
-   17f78:	3601      	adds	r6, #1
-   17f7a:	e7f2      	b.n	17f62 <__libc_init_array+0x1e>
-   17f7c:	0001cafc 	.word	0x0001cafc
-   17f80:	0001cafc 	.word	0x0001cafc
-   17f84:	0001cafc 	.word	0x0001cafc
-   17f88:	0001cb00 	.word	0x0001cb00
-
-00017f8c <memcmp>:
-   17f8c:	b530      	push	{r4, r5, lr}
-   17f8e:	2400      	movs	r4, #0
-   17f90:	42a2      	cmp	r2, r4
-   17f92:	d101      	bne.n	17f98 <memcmp+0xc>
-   17f94:	2000      	movs	r0, #0
-   17f96:	e005      	b.n	17fa4 <memcmp+0x18>
-   17f98:	5d03      	ldrb	r3, [r0, r4]
-   17f9a:	1c65      	adds	r5, r4, #1
-   17f9c:	5d0c      	ldrb	r4, [r1, r4]
-   17f9e:	42a3      	cmp	r3, r4
-   17fa0:	d001      	beq.n	17fa6 <memcmp+0x1a>
-   17fa2:	1b18      	subs	r0, r3, r4
-   17fa4:	bd30      	pop	{r4, r5, pc}
-   17fa6:	002c      	movs	r4, r5
-   17fa8:	e7f2      	b.n	17f90 <memcmp+0x4>
-
-00017faa <memcpy>:
-   17faa:	2300      	movs	r3, #0
-   17fac:	b510      	push	{r4, lr}
-   17fae:	429a      	cmp	r2, r3
-   17fb0:	d100      	bne.n	17fb4 <memcpy+0xa>
-   17fb2:	bd10      	pop	{r4, pc}
-   17fb4:	5ccc      	ldrb	r4, [r1, r3]
-   17fb6:	54c4      	strb	r4, [r0, r3]
-   17fb8:	3301      	adds	r3, #1
-   17fba:	e7f8      	b.n	17fae <memcpy+0x4>
-
-00017fbc <memset>:
-   17fbc:	0003      	movs	r3, r0
-   17fbe:	1882      	adds	r2, r0, r2
-   17fc0:	4293      	cmp	r3, r2
-   17fc2:	d100      	bne.n	17fc6 <memset+0xa>
-   17fc4:	4770      	bx	lr
-   17fc6:	7019      	strb	r1, [r3, #0]
-   17fc8:	3301      	adds	r3, #1
-   17fca:	e7f9      	b.n	17fc0 <memset+0x4>
-
-00017fcc <strcmp>:
-   17fcc:	7802      	ldrb	r2, [r0, #0]
-   17fce:	780b      	ldrb	r3, [r1, #0]
-   17fd0:	2a00      	cmp	r2, #0
-   17fd2:	d003      	beq.n	17fdc <strcmp+0x10>
-   17fd4:	3001      	adds	r0, #1
-   17fd6:	3101      	adds	r1, #1
-   17fd8:	429a      	cmp	r2, r3
-   17fda:	d0f7      	beq.n	17fcc <strcmp>
-   17fdc:	1ad0      	subs	r0, r2, r3
-   17fde:	4770      	bx	lr
-
-00017fe0 <strcpy>:
-   17fe0:	1c03      	adds	r3, r0, #0
-   17fe2:	780a      	ldrb	r2, [r1, #0]
-   17fe4:	3101      	adds	r1, #1
-   17fe6:	701a      	strb	r2, [r3, #0]
-   17fe8:	3301      	adds	r3, #1
-   17fea:	2a00      	cmp	r2, #0
-   17fec:	d1f9      	bne.n	17fe2 <strcpy+0x2>
-   17fee:	4770      	bx	lr
-
-00017ff0 <strlen>:
-   17ff0:	2300      	movs	r3, #0
-   17ff2:	5cc2      	ldrb	r2, [r0, r3]
-   17ff4:	3301      	adds	r3, #1
-   17ff6:	2a00      	cmp	r2, #0
-   17ff8:	d1fb      	bne.n	17ff2 <strlen+0x2>
-   17ffa:	1e58      	subs	r0, r3, #1
-   17ffc:	4770      	bx	lr
+00017dbc <__clzdi2>:
+   17dbc:	b510      	push	{r4, lr}
+   17dbe:	2900      	cmp	r1, #0
+   17dc0:	d103      	bne.n	17dca <__clzdi2+0xe>
+   17dc2:	f7ff ffdd 	bl	17d80 <__clzsi2>
+   17dc6:	3020      	adds	r0, #32
+   17dc8:	e002      	b.n	17dd0 <__clzdi2+0x14>
+   17dca:	1c08      	adds	r0, r1, #0
+   17dcc:	f7ff ffd8 	bl	17d80 <__clzsi2>
+   17dd0:	bd10      	pop	{r4, pc}
+   17dd2:	46c0      	nop			; (mov r8, r8)
+
+00017dd4 <__libc_init_array>:
+   17dd4:	b570      	push	{r4, r5, r6, lr}
+   17dd6:	2600      	movs	r6, #0
+   17dd8:	4d0c      	ldr	r5, [pc, #48]	; (17e0c <__libc_init_array+0x38>)
+   17dda:	4c0d      	ldr	r4, [pc, #52]	; (17e10 <__libc_init_array+0x3c>)
+   17ddc:	1b64      	subs	r4, r4, r5
+   17dde:	10a4      	asrs	r4, r4, #2
+   17de0:	42a6      	cmp	r6, r4
+   17de2:	d109      	bne.n	17df8 <__libc_init_array+0x24>
+   17de4:	2600      	movs	r6, #0
+   17de6:	f004 fdcb 	bl	1c980 <_init>
+   17dea:	4d0a      	ldr	r5, [pc, #40]	; (17e14 <__libc_init_array+0x40>)
+   17dec:	4c0a      	ldr	r4, [pc, #40]	; (17e18 <__libc_init_array+0x44>)
+   17dee:	1b64      	subs	r4, r4, r5
+   17df0:	10a4      	asrs	r4, r4, #2
+   17df2:	42a6      	cmp	r6, r4
+   17df4:	d105      	bne.n	17e02 <__libc_init_array+0x2e>
+   17df6:	bd70      	pop	{r4, r5, r6, pc}
+   17df8:	00b3      	lsls	r3, r6, #2
+   17dfa:	58eb      	ldr	r3, [r5, r3]
+   17dfc:	4798      	blx	r3
+   17dfe:	3601      	adds	r6, #1
+   17e00:	e7ee      	b.n	17de0 <__libc_init_array+0xc>
+   17e02:	00b3      	lsls	r3, r6, #2
+   17e04:	58eb      	ldr	r3, [r5, r3]
+   17e06:	4798      	blx	r3
+   17e08:	3601      	adds	r6, #1
+   17e0a:	e7f2      	b.n	17df2 <__libc_init_array+0x1e>
+   17e0c:	0001c98c 	.word	0x0001c98c
+   17e10:	0001c98c 	.word	0x0001c98c
+   17e14:	0001c98c 	.word	0x0001c98c
+   17e18:	0001c990 	.word	0x0001c990
+
+00017e1c <memcmp>:
+   17e1c:	b530      	push	{r4, r5, lr}
+   17e1e:	2400      	movs	r4, #0
+   17e20:	42a2      	cmp	r2, r4
+   17e22:	d101      	bne.n	17e28 <memcmp+0xc>
+   17e24:	2000      	movs	r0, #0
+   17e26:	e005      	b.n	17e34 <memcmp+0x18>
+   17e28:	5d03      	ldrb	r3, [r0, r4]
+   17e2a:	1c65      	adds	r5, r4, #1
+   17e2c:	5d0c      	ldrb	r4, [r1, r4]
+   17e2e:	42a3      	cmp	r3, r4
+   17e30:	d001      	beq.n	17e36 <memcmp+0x1a>
+   17e32:	1b18      	subs	r0, r3, r4
+   17e34:	bd30      	pop	{r4, r5, pc}
+   17e36:	002c      	movs	r4, r5
+   17e38:	e7f2      	b.n	17e20 <memcmp+0x4>
+
+00017e3a <memcpy>:
+   17e3a:	2300      	movs	r3, #0
+   17e3c:	b510      	push	{r4, lr}
+   17e3e:	429a      	cmp	r2, r3
+   17e40:	d100      	bne.n	17e44 <memcpy+0xa>
+   17e42:	bd10      	pop	{r4, pc}
+   17e44:	5ccc      	ldrb	r4, [r1, r3]
+   17e46:	54c4      	strb	r4, [r0, r3]
+   17e48:	3301      	adds	r3, #1
+   17e4a:	e7f8      	b.n	17e3e <memcpy+0x4>
+
+00017e4c <memset>:
+   17e4c:	0003      	movs	r3, r0
+   17e4e:	1882      	adds	r2, r0, r2
+   17e50:	4293      	cmp	r3, r2
+   17e52:	d100      	bne.n	17e56 <memset+0xa>
+   17e54:	4770      	bx	lr
+   17e56:	7019      	strb	r1, [r3, #0]
+   17e58:	3301      	adds	r3, #1
+   17e5a:	e7f9      	b.n	17e50 <memset+0x4>
+
+00017e5c <strcmp>:
+   17e5c:	7802      	ldrb	r2, [r0, #0]
+   17e5e:	780b      	ldrb	r3, [r1, #0]
+   17e60:	2a00      	cmp	r2, #0
+   17e62:	d003      	beq.n	17e6c <strcmp+0x10>
+   17e64:	3001      	adds	r0, #1
+   17e66:	3101      	adds	r1, #1
+   17e68:	429a      	cmp	r2, r3
+   17e6a:	d0f7      	beq.n	17e5c <strcmp>
+   17e6c:	1ad0      	subs	r0, r2, r3
+   17e6e:	4770      	bx	lr
+
+00017e70 <strcpy>:
+   17e70:	1c03      	adds	r3, r0, #0
+   17e72:	780a      	ldrb	r2, [r1, #0]
+   17e74:	3101      	adds	r1, #1
+   17e76:	701a      	strb	r2, [r3, #0]
+   17e78:	3301      	adds	r3, #1
+   17e7a:	2a00      	cmp	r2, #0
+   17e7c:	d1f9      	bne.n	17e72 <strcpy+0x2>
+   17e7e:	4770      	bx	lr
+
+00017e80 <strlen>:
+   17e80:	2300      	movs	r3, #0
+   17e82:	5cc2      	ldrb	r2, [r0, r3]
+   17e84:	3301      	adds	r3, #1
+   17e86:	2a00      	cmp	r2, #0
+   17e88:	d1fb      	bne.n	17e82 <strlen+0x2>
+   17e8a:	1e58      	subs	r0, r3, #1
+   17e8c:	4770      	bx	lr
 	...
 
-00018000 <_vsiprintf_r>:
-   18000:	b530      	push	{r4, r5, lr}
-   18002:	b09b      	sub	sp, #108	; 0x6c
-   18004:	9100      	str	r1, [sp, #0]
-   18006:	9104      	str	r1, [sp, #16]
-   18008:	4908      	ldr	r1, [pc, #32]	; (1802c <_vsiprintf_r+0x2c>)
-   1800a:	466d      	mov	r5, sp
-   1800c:	9102      	str	r1, [sp, #8]
-   1800e:	9105      	str	r1, [sp, #20]
-   18010:	2101      	movs	r1, #1
-   18012:	2482      	movs	r4, #130	; 0x82
-   18014:	4249      	negs	r1, r1
-   18016:	81e9      	strh	r1, [r5, #14]
-   18018:	00a4      	lsls	r4, r4, #2
-   1801a:	4669      	mov	r1, sp
-   1801c:	81ac      	strh	r4, [r5, #12]
-   1801e:	f000 f875 	bl	1810c <_svfiprintf_r>
-   18022:	2300      	movs	r3, #0
-   18024:	9a00      	ldr	r2, [sp, #0]
-   18026:	7013      	strb	r3, [r2, #0]
-   18028:	b01b      	add	sp, #108	; 0x6c
-   1802a:	bd30      	pop	{r4, r5, pc}
-   1802c:	7fffffff 	.word	0x7fffffff
-
-00018030 <vsiprintf>:
-   18030:	b510      	push	{r4, lr}
-   18032:	0013      	movs	r3, r2
-   18034:	000a      	movs	r2, r1
-   18036:	0001      	movs	r1, r0
-   18038:	4802      	ldr	r0, [pc, #8]	; (18044 <vsiprintf+0x14>)
-   1803a:	6800      	ldr	r0, [r0, #0]
-   1803c:	f7ff ffe0 	bl	18000 <_vsiprintf_r>
-   18040:	bd10      	pop	{r4, pc}
-   18042:	46c0      	nop			; (mov r8, r8)
-   18044:	20000060 	.word	0x20000060
-
-00018048 <__ssputs_r>:
-   18048:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1804a:	688e      	ldr	r6, [r1, #8]
-   1804c:	b085      	sub	sp, #20
-   1804e:	0007      	movs	r7, r0
-   18050:	000c      	movs	r4, r1
-   18052:	9203      	str	r2, [sp, #12]
-   18054:	9301      	str	r3, [sp, #4]
-   18056:	429e      	cmp	r6, r3
-   18058:	d839      	bhi.n	180ce <__ssputs_r+0x86>
-   1805a:	2390      	movs	r3, #144	; 0x90
-   1805c:	898a      	ldrh	r2, [r1, #12]
-   1805e:	00db      	lsls	r3, r3, #3
-   18060:	421a      	tst	r2, r3
-   18062:	d034      	beq.n	180ce <__ssputs_r+0x86>
-   18064:	2503      	movs	r5, #3
-   18066:	6909      	ldr	r1, [r1, #16]
-   18068:	6823      	ldr	r3, [r4, #0]
-   1806a:	1a5b      	subs	r3, r3, r1
-   1806c:	9302      	str	r3, [sp, #8]
-   1806e:	6963      	ldr	r3, [r4, #20]
-   18070:	9802      	ldr	r0, [sp, #8]
-   18072:	435d      	muls	r5, r3
-   18074:	0feb      	lsrs	r3, r5, #31
-   18076:	195d      	adds	r5, r3, r5
-   18078:	9b01      	ldr	r3, [sp, #4]
-   1807a:	106d      	asrs	r5, r5, #1
-   1807c:	3301      	adds	r3, #1
-   1807e:	181b      	adds	r3, r3, r0
-   18080:	42ab      	cmp	r3, r5
-   18082:	d900      	bls.n	18086 <__ssputs_r+0x3e>
-   18084:	001d      	movs	r5, r3
-   18086:	0553      	lsls	r3, r2, #21
-   18088:	d532      	bpl.n	180f0 <__ssputs_r+0xa8>
-   1808a:	0029      	movs	r1, r5
-   1808c:	0038      	movs	r0, r7
-   1808e:	f000 fb31 	bl	186f4 <_malloc_r>
-   18092:	1e06      	subs	r6, r0, #0
-   18094:	d109      	bne.n	180aa <__ssputs_r+0x62>
-   18096:	230c      	movs	r3, #12
-   18098:	603b      	str	r3, [r7, #0]
-   1809a:	2340      	movs	r3, #64	; 0x40
-   1809c:	2001      	movs	r0, #1
-   1809e:	89a2      	ldrh	r2, [r4, #12]
-   180a0:	4240      	negs	r0, r0
-   180a2:	4313      	orrs	r3, r2
-   180a4:	81a3      	strh	r3, [r4, #12]
-   180a6:	b005      	add	sp, #20
-   180a8:	bdf0      	pop	{r4, r5, r6, r7, pc}
-   180aa:	9a02      	ldr	r2, [sp, #8]
-   180ac:	6921      	ldr	r1, [r4, #16]
-   180ae:	f7ff ff7c 	bl	17faa <memcpy>
-   180b2:	89a3      	ldrh	r3, [r4, #12]
-   180b4:	4a14      	ldr	r2, [pc, #80]	; (18108 <__ssputs_r+0xc0>)
-   180b6:	401a      	ands	r2, r3
-   180b8:	2380      	movs	r3, #128	; 0x80
-   180ba:	4313      	orrs	r3, r2
-   180bc:	81a3      	strh	r3, [r4, #12]
-   180be:	9b02      	ldr	r3, [sp, #8]
-   180c0:	6126      	str	r6, [r4, #16]
-   180c2:	18f6      	adds	r6, r6, r3
-   180c4:	6026      	str	r6, [r4, #0]
-   180c6:	6165      	str	r5, [r4, #20]
-   180c8:	9e01      	ldr	r6, [sp, #4]
-   180ca:	1aed      	subs	r5, r5, r3
-   180cc:	60a5      	str	r5, [r4, #8]
-   180ce:	9b01      	ldr	r3, [sp, #4]
-   180d0:	42b3      	cmp	r3, r6
-   180d2:	d200      	bcs.n	180d6 <__ssputs_r+0x8e>
-   180d4:	001e      	movs	r6, r3
-   180d6:	0032      	movs	r2, r6
-   180d8:	9903      	ldr	r1, [sp, #12]
-   180da:	6820      	ldr	r0, [r4, #0]
-   180dc:	f000 faad 	bl	1863a <memmove>
-   180e0:	68a3      	ldr	r3, [r4, #8]
-   180e2:	2000      	movs	r0, #0
-   180e4:	1b9b      	subs	r3, r3, r6
-   180e6:	60a3      	str	r3, [r4, #8]
-   180e8:	6823      	ldr	r3, [r4, #0]
-   180ea:	199e      	adds	r6, r3, r6
-   180ec:	6026      	str	r6, [r4, #0]
-   180ee:	e7da      	b.n	180a6 <__ssputs_r+0x5e>
-   180f0:	002a      	movs	r2, r5
-   180f2:	0038      	movs	r0, r7
-   180f4:	f000 fb5c 	bl	187b0 <_realloc_r>
-   180f8:	1e06      	subs	r6, r0, #0
-   180fa:	d1e0      	bne.n	180be <__ssputs_r+0x76>
-   180fc:	6921      	ldr	r1, [r4, #16]
-   180fe:	0038      	movs	r0, r7
-   18100:	f000 faae 	bl	18660 <_free_r>
-   18104:	e7c7      	b.n	18096 <__ssputs_r+0x4e>
-   18106:	46c0      	nop			; (mov r8, r8)
-   18108:	fffffb7f 	.word	0xfffffb7f
-
-0001810c <_svfiprintf_r>:
-   1810c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1810e:	b09f      	sub	sp, #124	; 0x7c
-   18110:	9002      	str	r0, [sp, #8]
-   18112:	9305      	str	r3, [sp, #20]
-   18114:	898b      	ldrh	r3, [r1, #12]
-   18116:	000f      	movs	r7, r1
-   18118:	0016      	movs	r6, r2
-   1811a:	061b      	lsls	r3, r3, #24
-   1811c:	d511      	bpl.n	18142 <_svfiprintf_r+0x36>
-   1811e:	690b      	ldr	r3, [r1, #16]
-   18120:	2b00      	cmp	r3, #0
-   18122:	d10e      	bne.n	18142 <_svfiprintf_r+0x36>
-   18124:	2140      	movs	r1, #64	; 0x40
-   18126:	f000 fae5 	bl	186f4 <_malloc_r>
-   1812a:	6038      	str	r0, [r7, #0]
-   1812c:	6138      	str	r0, [r7, #16]
-   1812e:	2800      	cmp	r0, #0
-   18130:	d105      	bne.n	1813e <_svfiprintf_r+0x32>
-   18132:	230c      	movs	r3, #12
-   18134:	9a02      	ldr	r2, [sp, #8]
-   18136:	3801      	subs	r0, #1
-   18138:	6013      	str	r3, [r2, #0]
-   1813a:	b01f      	add	sp, #124	; 0x7c
-   1813c:	bdf0      	pop	{r4, r5, r6, r7, pc}
-   1813e:	2340      	movs	r3, #64	; 0x40
-   18140:	617b      	str	r3, [r7, #20]
-   18142:	2300      	movs	r3, #0
-   18144:	ad06      	add	r5, sp, #24
-   18146:	616b      	str	r3, [r5, #20]
-   18148:	3320      	adds	r3, #32
-   1814a:	766b      	strb	r3, [r5, #25]
-   1814c:	3310      	adds	r3, #16
-   1814e:	76ab      	strb	r3, [r5, #26]
-   18150:	0034      	movs	r4, r6
-   18152:	7823      	ldrb	r3, [r4, #0]
-   18154:	2b00      	cmp	r3, #0
-   18156:	d147      	bne.n	181e8 <_svfiprintf_r+0xdc>
-   18158:	1ba3      	subs	r3, r4, r6
-   1815a:	9304      	str	r3, [sp, #16]
-   1815c:	d00d      	beq.n	1817a <_svfiprintf_r+0x6e>
-   1815e:	1ba3      	subs	r3, r4, r6
-   18160:	0032      	movs	r2, r6
-   18162:	0039      	movs	r1, r7
-   18164:	9802      	ldr	r0, [sp, #8]
-   18166:	f7ff ff6f 	bl	18048 <__ssputs_r>
-   1816a:	1c43      	adds	r3, r0, #1
-   1816c:	d100      	bne.n	18170 <_svfiprintf_r+0x64>
-   1816e:	e0b5      	b.n	182dc <_svfiprintf_r+0x1d0>
-   18170:	696a      	ldr	r2, [r5, #20]
-   18172:	9b04      	ldr	r3, [sp, #16]
-   18174:	4694      	mov	ip, r2
-   18176:	4463      	add	r3, ip
-   18178:	616b      	str	r3, [r5, #20]
-   1817a:	7823      	ldrb	r3, [r4, #0]
-   1817c:	2b00      	cmp	r3, #0
-   1817e:	d100      	bne.n	18182 <_svfiprintf_r+0x76>
-   18180:	e0ac      	b.n	182dc <_svfiprintf_r+0x1d0>
-   18182:	2201      	movs	r2, #1
-   18184:	2300      	movs	r3, #0
-   18186:	4252      	negs	r2, r2
-   18188:	606a      	str	r2, [r5, #4]
-   1818a:	a902      	add	r1, sp, #8
-   1818c:	3254      	adds	r2, #84	; 0x54
-   1818e:	1852      	adds	r2, r2, r1
-   18190:	3401      	adds	r4, #1
-   18192:	602b      	str	r3, [r5, #0]
-   18194:	60eb      	str	r3, [r5, #12]
-   18196:	60ab      	str	r3, [r5, #8]
-   18198:	7013      	strb	r3, [r2, #0]
-   1819a:	65ab      	str	r3, [r5, #88]	; 0x58
-   1819c:	4e58      	ldr	r6, [pc, #352]	; (18300 <_svfiprintf_r+0x1f4>)
-   1819e:	2205      	movs	r2, #5
-   181a0:	7821      	ldrb	r1, [r4, #0]
-   181a2:	0030      	movs	r0, r6
-   181a4:	f000 fa3e 	bl	18624 <memchr>
-   181a8:	1c62      	adds	r2, r4, #1
-   181aa:	2800      	cmp	r0, #0
-   181ac:	d120      	bne.n	181f0 <_svfiprintf_r+0xe4>
-   181ae:	6829      	ldr	r1, [r5, #0]
-   181b0:	06cb      	lsls	r3, r1, #27
-   181b2:	d504      	bpl.n	181be <_svfiprintf_r+0xb2>
-   181b4:	2353      	movs	r3, #83	; 0x53
-   181b6:	ae02      	add	r6, sp, #8
-   181b8:	3020      	adds	r0, #32
-   181ba:	199b      	adds	r3, r3, r6
-   181bc:	7018      	strb	r0, [r3, #0]
-   181be:	070b      	lsls	r3, r1, #28
-   181c0:	d504      	bpl.n	181cc <_svfiprintf_r+0xc0>
-   181c2:	2353      	movs	r3, #83	; 0x53
-   181c4:	202b      	movs	r0, #43	; 0x2b
-   181c6:	ae02      	add	r6, sp, #8
-   181c8:	199b      	adds	r3, r3, r6
-   181ca:	7018      	strb	r0, [r3, #0]
-   181cc:	7823      	ldrb	r3, [r4, #0]
-   181ce:	2b2a      	cmp	r3, #42	; 0x2a
-   181d0:	d016      	beq.n	18200 <_svfiprintf_r+0xf4>
-   181d2:	2000      	movs	r0, #0
-   181d4:	210a      	movs	r1, #10
-   181d6:	9b09      	ldr	r3, [sp, #36]	; 0x24
-   181d8:	7822      	ldrb	r2, [r4, #0]
-   181da:	3a30      	subs	r2, #48	; 0x30
-   181dc:	2a09      	cmp	r2, #9
-   181de:	d955      	bls.n	1828c <_svfiprintf_r+0x180>
-   181e0:	2800      	cmp	r0, #0
-   181e2:	d015      	beq.n	18210 <_svfiprintf_r+0x104>
-   181e4:	9309      	str	r3, [sp, #36]	; 0x24
-   181e6:	e013      	b.n	18210 <_svfiprintf_r+0x104>
-   181e8:	2b25      	cmp	r3, #37	; 0x25
-   181ea:	d0b5      	beq.n	18158 <_svfiprintf_r+0x4c>
-   181ec:	3401      	adds	r4, #1
-   181ee:	e7b0      	b.n	18152 <_svfiprintf_r+0x46>
-   181f0:	2301      	movs	r3, #1
-   181f2:	1b80      	subs	r0, r0, r6
-   181f4:	4083      	lsls	r3, r0
-   181f6:	6829      	ldr	r1, [r5, #0]
-   181f8:	0014      	movs	r4, r2
-   181fa:	430b      	orrs	r3, r1
-   181fc:	602b      	str	r3, [r5, #0]
-   181fe:	e7cd      	b.n	1819c <_svfiprintf_r+0x90>
-   18200:	9b05      	ldr	r3, [sp, #20]
-   18202:	1d18      	adds	r0, r3, #4
-   18204:	681b      	ldr	r3, [r3, #0]
-   18206:	9005      	str	r0, [sp, #20]
-   18208:	2b00      	cmp	r3, #0
-   1820a:	db39      	blt.n	18280 <_svfiprintf_r+0x174>
-   1820c:	9309      	str	r3, [sp, #36]	; 0x24
-   1820e:	0014      	movs	r4, r2
-   18210:	7823      	ldrb	r3, [r4, #0]
-   18212:	2b2e      	cmp	r3, #46	; 0x2e
-   18214:	d10b      	bne.n	1822e <_svfiprintf_r+0x122>
-   18216:	7863      	ldrb	r3, [r4, #1]
-   18218:	1c62      	adds	r2, r4, #1
-   1821a:	2b2a      	cmp	r3, #42	; 0x2a
-   1821c:	d13e      	bne.n	1829c <_svfiprintf_r+0x190>
-   1821e:	9b05      	ldr	r3, [sp, #20]
-   18220:	3402      	adds	r4, #2
-   18222:	1d1a      	adds	r2, r3, #4
-   18224:	681b      	ldr	r3, [r3, #0]
-   18226:	9205      	str	r2, [sp, #20]
-   18228:	2b00      	cmp	r3, #0
-   1822a:	db34      	blt.n	18296 <_svfiprintf_r+0x18a>
-   1822c:	9307      	str	r3, [sp, #28]
-   1822e:	4e35      	ldr	r6, [pc, #212]	; (18304 <_svfiprintf_r+0x1f8>)
-   18230:	7821      	ldrb	r1, [r4, #0]
-   18232:	2203      	movs	r2, #3
-   18234:	0030      	movs	r0, r6
-   18236:	f000 f9f5 	bl	18624 <memchr>
-   1823a:	2800      	cmp	r0, #0
-   1823c:	d006      	beq.n	1824c <_svfiprintf_r+0x140>
-   1823e:	2340      	movs	r3, #64	; 0x40
-   18240:	1b80      	subs	r0, r0, r6
-   18242:	4083      	lsls	r3, r0
-   18244:	682a      	ldr	r2, [r5, #0]
-   18246:	3401      	adds	r4, #1
-   18248:	4313      	orrs	r3, r2
-   1824a:	602b      	str	r3, [r5, #0]
-   1824c:	7821      	ldrb	r1, [r4, #0]
-   1824e:	2206      	movs	r2, #6
-   18250:	482d      	ldr	r0, [pc, #180]	; (18308 <_svfiprintf_r+0x1fc>)
-   18252:	1c66      	adds	r6, r4, #1
-   18254:	7629      	strb	r1, [r5, #24]
-   18256:	f000 f9e5 	bl	18624 <memchr>
-   1825a:	2800      	cmp	r0, #0
-   1825c:	d046      	beq.n	182ec <_svfiprintf_r+0x1e0>
-   1825e:	4b2b      	ldr	r3, [pc, #172]	; (1830c <_svfiprintf_r+0x200>)
-   18260:	2b00      	cmp	r3, #0
-   18262:	d12f      	bne.n	182c4 <_svfiprintf_r+0x1b8>
-   18264:	6829      	ldr	r1, [r5, #0]
-   18266:	9b05      	ldr	r3, [sp, #20]
-   18268:	2207      	movs	r2, #7
-   1826a:	05c9      	lsls	r1, r1, #23
-   1826c:	d528      	bpl.n	182c0 <_svfiprintf_r+0x1b4>
-   1826e:	189b      	adds	r3, r3, r2
-   18270:	4393      	bics	r3, r2
-   18272:	3308      	adds	r3, #8
-   18274:	9305      	str	r3, [sp, #20]
-   18276:	696b      	ldr	r3, [r5, #20]
-   18278:	9a03      	ldr	r2, [sp, #12]
-   1827a:	189b      	adds	r3, r3, r2
-   1827c:	616b      	str	r3, [r5, #20]
-   1827e:	e767      	b.n	18150 <_svfiprintf_r+0x44>
-   18280:	425b      	negs	r3, r3
-   18282:	60eb      	str	r3, [r5, #12]
-   18284:	2302      	movs	r3, #2
-   18286:	430b      	orrs	r3, r1
-   18288:	602b      	str	r3, [r5, #0]
-   1828a:	e7c0      	b.n	1820e <_svfiprintf_r+0x102>
-   1828c:	434b      	muls	r3, r1
-   1828e:	3401      	adds	r4, #1
-   18290:	189b      	adds	r3, r3, r2
-   18292:	2001      	movs	r0, #1
-   18294:	e7a0      	b.n	181d8 <_svfiprintf_r+0xcc>
-   18296:	2301      	movs	r3, #1
-   18298:	425b      	negs	r3, r3
-   1829a:	e7c7      	b.n	1822c <_svfiprintf_r+0x120>
-   1829c:	2300      	movs	r3, #0
-   1829e:	0014      	movs	r4, r2
-   182a0:	200a      	movs	r0, #10
-   182a2:	001a      	movs	r2, r3
-   182a4:	606b      	str	r3, [r5, #4]
-   182a6:	7821      	ldrb	r1, [r4, #0]
-   182a8:	3930      	subs	r1, #48	; 0x30
-   182aa:	2909      	cmp	r1, #9
-   182ac:	d903      	bls.n	182b6 <_svfiprintf_r+0x1aa>
-   182ae:	2b00      	cmp	r3, #0
-   182b0:	d0bd      	beq.n	1822e <_svfiprintf_r+0x122>
-   182b2:	9207      	str	r2, [sp, #28]
-   182b4:	e7bb      	b.n	1822e <_svfiprintf_r+0x122>
-   182b6:	4342      	muls	r2, r0
-   182b8:	3401      	adds	r4, #1
-   182ba:	1852      	adds	r2, r2, r1
-   182bc:	2301      	movs	r3, #1
-   182be:	e7f2      	b.n	182a6 <_svfiprintf_r+0x19a>
-   182c0:	3307      	adds	r3, #7
-   182c2:	e7d5      	b.n	18270 <_svfiprintf_r+0x164>
-   182c4:	ab05      	add	r3, sp, #20
-   182c6:	9300      	str	r3, [sp, #0]
-   182c8:	003a      	movs	r2, r7
-   182ca:	4b11      	ldr	r3, [pc, #68]	; (18310 <_svfiprintf_r+0x204>)
-   182cc:	0029      	movs	r1, r5
-   182ce:	9802      	ldr	r0, [sp, #8]
-   182d0:	e000      	b.n	182d4 <_svfiprintf_r+0x1c8>
-   182d2:	bf00      	nop
-   182d4:	9003      	str	r0, [sp, #12]
-   182d6:	9b03      	ldr	r3, [sp, #12]
-   182d8:	3301      	adds	r3, #1
-   182da:	d1cc      	bne.n	18276 <_svfiprintf_r+0x16a>
-   182dc:	89bb      	ldrh	r3, [r7, #12]
-   182de:	980b      	ldr	r0, [sp, #44]	; 0x2c
-   182e0:	065b      	lsls	r3, r3, #25
-   182e2:	d400      	bmi.n	182e6 <_svfiprintf_r+0x1da>
-   182e4:	e729      	b.n	1813a <_svfiprintf_r+0x2e>
-   182e6:	2001      	movs	r0, #1
-   182e8:	4240      	negs	r0, r0
-   182ea:	e726      	b.n	1813a <_svfiprintf_r+0x2e>
-   182ec:	ab05      	add	r3, sp, #20
-   182ee:	9300      	str	r3, [sp, #0]
-   182f0:	003a      	movs	r2, r7
-   182f2:	4b07      	ldr	r3, [pc, #28]	; (18310 <_svfiprintf_r+0x204>)
-   182f4:	0029      	movs	r1, r5
-   182f6:	9802      	ldr	r0, [sp, #8]
-   182f8:	f000 f87a 	bl	183f0 <_printf_i>
-   182fc:	e7ea      	b.n	182d4 <_svfiprintf_r+0x1c8>
-   182fe:	46c0      	nop			; (mov r8, r8)
-   18300:	0001cabc 	.word	0x0001cabc
-   18304:	0001cac2 	.word	0x0001cac2
-   18308:	0001cac6 	.word	0x0001cac6
-   1830c:	00000000 	.word	0x00000000
-   18310:	00018049 	.word	0x00018049
-
-00018314 <_printf_common>:
-   18314:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-   18316:	0015      	movs	r5, r2
-   18318:	9301      	str	r3, [sp, #4]
-   1831a:	688a      	ldr	r2, [r1, #8]
-   1831c:	690b      	ldr	r3, [r1, #16]
-   1831e:	9000      	str	r0, [sp, #0]
-   18320:	000c      	movs	r4, r1
-   18322:	4293      	cmp	r3, r2
-   18324:	da00      	bge.n	18328 <_printf_common+0x14>
-   18326:	0013      	movs	r3, r2
-   18328:	0022      	movs	r2, r4
-   1832a:	602b      	str	r3, [r5, #0]
-   1832c:	3243      	adds	r2, #67	; 0x43
-   1832e:	7812      	ldrb	r2, [r2, #0]
-   18330:	2a00      	cmp	r2, #0
-   18332:	d001      	beq.n	18338 <_printf_common+0x24>
-   18334:	3301      	adds	r3, #1
-   18336:	602b      	str	r3, [r5, #0]
-   18338:	6823      	ldr	r3, [r4, #0]
-   1833a:	069b      	lsls	r3, r3, #26
-   1833c:	d502      	bpl.n	18344 <_printf_common+0x30>
-   1833e:	682b      	ldr	r3, [r5, #0]
-   18340:	3302      	adds	r3, #2
-   18342:	602b      	str	r3, [r5, #0]
-   18344:	2706      	movs	r7, #6
-   18346:	6823      	ldr	r3, [r4, #0]
-   18348:	401f      	ands	r7, r3
-   1834a:	d027      	beq.n	1839c <_printf_common+0x88>
-   1834c:	0023      	movs	r3, r4
-   1834e:	3343      	adds	r3, #67	; 0x43
-   18350:	781b      	ldrb	r3, [r3, #0]
-   18352:	1e5a      	subs	r2, r3, #1
-   18354:	4193      	sbcs	r3, r2
-   18356:	6822      	ldr	r2, [r4, #0]
-   18358:	0692      	lsls	r2, r2, #26
-   1835a:	d430      	bmi.n	183be <_printf_common+0xaa>
-   1835c:	0022      	movs	r2, r4
-   1835e:	9901      	ldr	r1, [sp, #4]
-   18360:	3243      	adds	r2, #67	; 0x43
-   18362:	9800      	ldr	r0, [sp, #0]
-   18364:	9e08      	ldr	r6, [sp, #32]
-   18366:	47b0      	blx	r6
-   18368:	1c43      	adds	r3, r0, #1
-   1836a:	d025      	beq.n	183b8 <_printf_common+0xa4>
-   1836c:	2306      	movs	r3, #6
-   1836e:	6820      	ldr	r0, [r4, #0]
-   18370:	682a      	ldr	r2, [r5, #0]
-   18372:	68e1      	ldr	r1, [r4, #12]
-   18374:	4003      	ands	r3, r0
-   18376:	2500      	movs	r5, #0
-   18378:	2b04      	cmp	r3, #4
-   1837a:	d103      	bne.n	18384 <_printf_common+0x70>
-   1837c:	1a8d      	subs	r5, r1, r2
-   1837e:	43eb      	mvns	r3, r5
-   18380:	17db      	asrs	r3, r3, #31
-   18382:	401d      	ands	r5, r3
-   18384:	68a3      	ldr	r3, [r4, #8]
-   18386:	6922      	ldr	r2, [r4, #16]
-   18388:	4293      	cmp	r3, r2
-   1838a:	dd01      	ble.n	18390 <_printf_common+0x7c>
-   1838c:	1a9b      	subs	r3, r3, r2
-   1838e:	18ed      	adds	r5, r5, r3
-   18390:	2700      	movs	r7, #0
-   18392:	42bd      	cmp	r5, r7
-   18394:	d120      	bne.n	183d8 <_printf_common+0xc4>
-   18396:	2000      	movs	r0, #0
-   18398:	e010      	b.n	183bc <_printf_common+0xa8>
-   1839a:	3701      	adds	r7, #1
-   1839c:	68e3      	ldr	r3, [r4, #12]
-   1839e:	682a      	ldr	r2, [r5, #0]
-   183a0:	1a9b      	subs	r3, r3, r2
-   183a2:	429f      	cmp	r7, r3
-   183a4:	dad2      	bge.n	1834c <_printf_common+0x38>
-   183a6:	0022      	movs	r2, r4
-   183a8:	2301      	movs	r3, #1
-   183aa:	3219      	adds	r2, #25
-   183ac:	9901      	ldr	r1, [sp, #4]
-   183ae:	9800      	ldr	r0, [sp, #0]
-   183b0:	9e08      	ldr	r6, [sp, #32]
-   183b2:	47b0      	blx	r6
-   183b4:	1c43      	adds	r3, r0, #1
-   183b6:	d1f0      	bne.n	1839a <_printf_common+0x86>
-   183b8:	2001      	movs	r0, #1
-   183ba:	4240      	negs	r0, r0
-   183bc:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-   183be:	2030      	movs	r0, #48	; 0x30
-   183c0:	18e1      	adds	r1, r4, r3
-   183c2:	3143      	adds	r1, #67	; 0x43
-   183c4:	7008      	strb	r0, [r1, #0]
-   183c6:	0021      	movs	r1, r4
-   183c8:	1c5a      	adds	r2, r3, #1
-   183ca:	3145      	adds	r1, #69	; 0x45
-   183cc:	7809      	ldrb	r1, [r1, #0]
-   183ce:	18a2      	adds	r2, r4, r2
-   183d0:	3243      	adds	r2, #67	; 0x43
-   183d2:	3302      	adds	r3, #2
-   183d4:	7011      	strb	r1, [r2, #0]
-   183d6:	e7c1      	b.n	1835c <_printf_common+0x48>
-   183d8:	0022      	movs	r2, r4
-   183da:	2301      	movs	r3, #1
-   183dc:	321a      	adds	r2, #26
-   183de:	9901      	ldr	r1, [sp, #4]
-   183e0:	9800      	ldr	r0, [sp, #0]
-   183e2:	9e08      	ldr	r6, [sp, #32]
-   183e4:	47b0      	blx	r6
-   183e6:	1c43      	adds	r3, r0, #1
-   183e8:	d0e6      	beq.n	183b8 <_printf_common+0xa4>
-   183ea:	3701      	adds	r7, #1
-   183ec:	e7d1      	b.n	18392 <_printf_common+0x7e>
+00017e90 <_vsiprintf_r>:
+   17e90:	b530      	push	{r4, r5, lr}
+   17e92:	b09b      	sub	sp, #108	; 0x6c
+   17e94:	9100      	str	r1, [sp, #0]
+   17e96:	9104      	str	r1, [sp, #16]
+   17e98:	4908      	ldr	r1, [pc, #32]	; (17ebc <_vsiprintf_r+0x2c>)
+   17e9a:	466d      	mov	r5, sp
+   17e9c:	9102      	str	r1, [sp, #8]
+   17e9e:	9105      	str	r1, [sp, #20]
+   17ea0:	2101      	movs	r1, #1
+   17ea2:	2482      	movs	r4, #130	; 0x82
+   17ea4:	4249      	negs	r1, r1
+   17ea6:	81e9      	strh	r1, [r5, #14]
+   17ea8:	00a4      	lsls	r4, r4, #2
+   17eaa:	4669      	mov	r1, sp
+   17eac:	81ac      	strh	r4, [r5, #12]
+   17eae:	f000 f875 	bl	17f9c <_svfiprintf_r>
+   17eb2:	2300      	movs	r3, #0
+   17eb4:	9a00      	ldr	r2, [sp, #0]
+   17eb6:	7013      	strb	r3, [r2, #0]
+   17eb8:	b01b      	add	sp, #108	; 0x6c
+   17eba:	bd30      	pop	{r4, r5, pc}
+   17ebc:	7fffffff 	.word	0x7fffffff
+
+00017ec0 <vsiprintf>:
+   17ec0:	b510      	push	{r4, lr}
+   17ec2:	0013      	movs	r3, r2
+   17ec4:	000a      	movs	r2, r1
+   17ec6:	0001      	movs	r1, r0
+   17ec8:	4802      	ldr	r0, [pc, #8]	; (17ed4 <vsiprintf+0x14>)
+   17eca:	6800      	ldr	r0, [r0, #0]
+   17ecc:	f7ff ffe0 	bl	17e90 <_vsiprintf_r>
+   17ed0:	bd10      	pop	{r4, pc}
+   17ed2:	46c0      	nop			; (mov r8, r8)
+   17ed4:	20000060 	.word	0x20000060
+
+00017ed8 <__ssputs_r>:
+   17ed8:	b5f0      	push	{r4, r5, r6, r7, lr}
+   17eda:	688e      	ldr	r6, [r1, #8]
+   17edc:	b085      	sub	sp, #20
+   17ede:	0007      	movs	r7, r0
+   17ee0:	000c      	movs	r4, r1
+   17ee2:	9203      	str	r2, [sp, #12]
+   17ee4:	9301      	str	r3, [sp, #4]
+   17ee6:	429e      	cmp	r6, r3
+   17ee8:	d839      	bhi.n	17f5e <__ssputs_r+0x86>
+   17eea:	2390      	movs	r3, #144	; 0x90
+   17eec:	898a      	ldrh	r2, [r1, #12]
+   17eee:	00db      	lsls	r3, r3, #3
+   17ef0:	421a      	tst	r2, r3
+   17ef2:	d034      	beq.n	17f5e <__ssputs_r+0x86>
+   17ef4:	2503      	movs	r5, #3
+   17ef6:	6909      	ldr	r1, [r1, #16]
+   17ef8:	6823      	ldr	r3, [r4, #0]
+   17efa:	1a5b      	subs	r3, r3, r1
+   17efc:	9302      	str	r3, [sp, #8]
+   17efe:	6963      	ldr	r3, [r4, #20]
+   17f00:	9802      	ldr	r0, [sp, #8]
+   17f02:	435d      	muls	r5, r3
+   17f04:	0feb      	lsrs	r3, r5, #31
+   17f06:	195d      	adds	r5, r3, r5
+   17f08:	9b01      	ldr	r3, [sp, #4]
+   17f0a:	106d      	asrs	r5, r5, #1
+   17f0c:	3301      	adds	r3, #1
+   17f0e:	181b      	adds	r3, r3, r0
+   17f10:	42ab      	cmp	r3, r5
+   17f12:	d900      	bls.n	17f16 <__ssputs_r+0x3e>
+   17f14:	001d      	movs	r5, r3
+   17f16:	0553      	lsls	r3, r2, #21
+   17f18:	d532      	bpl.n	17f80 <__ssputs_r+0xa8>
+   17f1a:	0029      	movs	r1, r5
+   17f1c:	0038      	movs	r0, r7
+   17f1e:	f000 fb31 	bl	18584 <_malloc_r>
+   17f22:	1e06      	subs	r6, r0, #0
+   17f24:	d109      	bne.n	17f3a <__ssputs_r+0x62>
+   17f26:	230c      	movs	r3, #12
+   17f28:	603b      	str	r3, [r7, #0]
+   17f2a:	2340      	movs	r3, #64	; 0x40
+   17f2c:	2001      	movs	r0, #1
+   17f2e:	89a2      	ldrh	r2, [r4, #12]
+   17f30:	4240      	negs	r0, r0
+   17f32:	4313      	orrs	r3, r2
+   17f34:	81a3      	strh	r3, [r4, #12]
+   17f36:	b005      	add	sp, #20
+   17f38:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   17f3a:	9a02      	ldr	r2, [sp, #8]
+   17f3c:	6921      	ldr	r1, [r4, #16]
+   17f3e:	f7ff ff7c 	bl	17e3a <memcpy>
+   17f42:	89a3      	ldrh	r3, [r4, #12]
+   17f44:	4a14      	ldr	r2, [pc, #80]	; (17f98 <__ssputs_r+0xc0>)
+   17f46:	401a      	ands	r2, r3
+   17f48:	2380      	movs	r3, #128	; 0x80
+   17f4a:	4313      	orrs	r3, r2
+   17f4c:	81a3      	strh	r3, [r4, #12]
+   17f4e:	9b02      	ldr	r3, [sp, #8]
+   17f50:	6126      	str	r6, [r4, #16]
+   17f52:	18f6      	adds	r6, r6, r3
+   17f54:	6026      	str	r6, [r4, #0]
+   17f56:	6165      	str	r5, [r4, #20]
+   17f58:	9e01      	ldr	r6, [sp, #4]
+   17f5a:	1aed      	subs	r5, r5, r3
+   17f5c:	60a5      	str	r5, [r4, #8]
+   17f5e:	9b01      	ldr	r3, [sp, #4]
+   17f60:	42b3      	cmp	r3, r6
+   17f62:	d200      	bcs.n	17f66 <__ssputs_r+0x8e>
+   17f64:	001e      	movs	r6, r3
+   17f66:	0032      	movs	r2, r6
+   17f68:	9903      	ldr	r1, [sp, #12]
+   17f6a:	6820      	ldr	r0, [r4, #0]
+   17f6c:	f000 faad 	bl	184ca <memmove>
+   17f70:	68a3      	ldr	r3, [r4, #8]
+   17f72:	2000      	movs	r0, #0
+   17f74:	1b9b      	subs	r3, r3, r6
+   17f76:	60a3      	str	r3, [r4, #8]
+   17f78:	6823      	ldr	r3, [r4, #0]
+   17f7a:	199e      	adds	r6, r3, r6
+   17f7c:	6026      	str	r6, [r4, #0]
+   17f7e:	e7da      	b.n	17f36 <__ssputs_r+0x5e>
+   17f80:	002a      	movs	r2, r5
+   17f82:	0038      	movs	r0, r7
+   17f84:	f000 fb5c 	bl	18640 <_realloc_r>
+   17f88:	1e06      	subs	r6, r0, #0
+   17f8a:	d1e0      	bne.n	17f4e <__ssputs_r+0x76>
+   17f8c:	6921      	ldr	r1, [r4, #16]
+   17f8e:	0038      	movs	r0, r7
+   17f90:	f000 faae 	bl	184f0 <_free_r>
+   17f94:	e7c7      	b.n	17f26 <__ssputs_r+0x4e>
+   17f96:	46c0      	nop			; (mov r8, r8)
+   17f98:	fffffb7f 	.word	0xfffffb7f
+
+00017f9c <_svfiprintf_r>:
+   17f9c:	b5f0      	push	{r4, r5, r6, r7, lr}
+   17f9e:	b09f      	sub	sp, #124	; 0x7c
+   17fa0:	9002      	str	r0, [sp, #8]
+   17fa2:	9305      	str	r3, [sp, #20]
+   17fa4:	898b      	ldrh	r3, [r1, #12]
+   17fa6:	000f      	movs	r7, r1
+   17fa8:	0016      	movs	r6, r2
+   17faa:	061b      	lsls	r3, r3, #24
+   17fac:	d511      	bpl.n	17fd2 <_svfiprintf_r+0x36>
+   17fae:	690b      	ldr	r3, [r1, #16]
+   17fb0:	2b00      	cmp	r3, #0
+   17fb2:	d10e      	bne.n	17fd2 <_svfiprintf_r+0x36>
+   17fb4:	2140      	movs	r1, #64	; 0x40
+   17fb6:	f000 fae5 	bl	18584 <_malloc_r>
+   17fba:	6038      	str	r0, [r7, #0]
+   17fbc:	6138      	str	r0, [r7, #16]
+   17fbe:	2800      	cmp	r0, #0
+   17fc0:	d105      	bne.n	17fce <_svfiprintf_r+0x32>
+   17fc2:	230c      	movs	r3, #12
+   17fc4:	9a02      	ldr	r2, [sp, #8]
+   17fc6:	3801      	subs	r0, #1
+   17fc8:	6013      	str	r3, [r2, #0]
+   17fca:	b01f      	add	sp, #124	; 0x7c
+   17fcc:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   17fce:	2340      	movs	r3, #64	; 0x40
+   17fd0:	617b      	str	r3, [r7, #20]
+   17fd2:	2300      	movs	r3, #0
+   17fd4:	ad06      	add	r5, sp, #24
+   17fd6:	616b      	str	r3, [r5, #20]
+   17fd8:	3320      	adds	r3, #32
+   17fda:	766b      	strb	r3, [r5, #25]
+   17fdc:	3310      	adds	r3, #16
+   17fde:	76ab      	strb	r3, [r5, #26]
+   17fe0:	0034      	movs	r4, r6
+   17fe2:	7823      	ldrb	r3, [r4, #0]
+   17fe4:	2b00      	cmp	r3, #0
+   17fe6:	d147      	bne.n	18078 <_svfiprintf_r+0xdc>
+   17fe8:	1ba3      	subs	r3, r4, r6
+   17fea:	9304      	str	r3, [sp, #16]
+   17fec:	d00d      	beq.n	1800a <_svfiprintf_r+0x6e>
+   17fee:	1ba3      	subs	r3, r4, r6
+   17ff0:	0032      	movs	r2, r6
+   17ff2:	0039      	movs	r1, r7
+   17ff4:	9802      	ldr	r0, [sp, #8]
+   17ff6:	f7ff ff6f 	bl	17ed8 <__ssputs_r>
+   17ffa:	1c43      	adds	r3, r0, #1
+   17ffc:	d100      	bne.n	18000 <_svfiprintf_r+0x64>
+   17ffe:	e0b5      	b.n	1816c <_svfiprintf_r+0x1d0>
+   18000:	696a      	ldr	r2, [r5, #20]
+   18002:	9b04      	ldr	r3, [sp, #16]
+   18004:	4694      	mov	ip, r2
+   18006:	4463      	add	r3, ip
+   18008:	616b      	str	r3, [r5, #20]
+   1800a:	7823      	ldrb	r3, [r4, #0]
+   1800c:	2b00      	cmp	r3, #0
+   1800e:	d100      	bne.n	18012 <_svfiprintf_r+0x76>
+   18010:	e0ac      	b.n	1816c <_svfiprintf_r+0x1d0>
+   18012:	2201      	movs	r2, #1
+   18014:	2300      	movs	r3, #0
+   18016:	4252      	negs	r2, r2
+   18018:	606a      	str	r2, [r5, #4]
+   1801a:	a902      	add	r1, sp, #8
+   1801c:	3254      	adds	r2, #84	; 0x54
+   1801e:	1852      	adds	r2, r2, r1
+   18020:	3401      	adds	r4, #1
+   18022:	602b      	str	r3, [r5, #0]
+   18024:	60eb      	str	r3, [r5, #12]
+   18026:	60ab      	str	r3, [r5, #8]
+   18028:	7013      	strb	r3, [r2, #0]
+   1802a:	65ab      	str	r3, [r5, #88]	; 0x58
+   1802c:	4e58      	ldr	r6, [pc, #352]	; (18190 <_svfiprintf_r+0x1f4>)
+   1802e:	2205      	movs	r2, #5
+   18030:	7821      	ldrb	r1, [r4, #0]
+   18032:	0030      	movs	r0, r6
+   18034:	f000 fa3e 	bl	184b4 <memchr>
+   18038:	1c62      	adds	r2, r4, #1
+   1803a:	2800      	cmp	r0, #0
+   1803c:	d120      	bne.n	18080 <_svfiprintf_r+0xe4>
+   1803e:	6829      	ldr	r1, [r5, #0]
+   18040:	06cb      	lsls	r3, r1, #27
+   18042:	d504      	bpl.n	1804e <_svfiprintf_r+0xb2>
+   18044:	2353      	movs	r3, #83	; 0x53
+   18046:	ae02      	add	r6, sp, #8
+   18048:	3020      	adds	r0, #32
+   1804a:	199b      	adds	r3, r3, r6
+   1804c:	7018      	strb	r0, [r3, #0]
+   1804e:	070b      	lsls	r3, r1, #28
+   18050:	d504      	bpl.n	1805c <_svfiprintf_r+0xc0>
+   18052:	2353      	movs	r3, #83	; 0x53
+   18054:	202b      	movs	r0, #43	; 0x2b
+   18056:	ae02      	add	r6, sp, #8
+   18058:	199b      	adds	r3, r3, r6
+   1805a:	7018      	strb	r0, [r3, #0]
+   1805c:	7823      	ldrb	r3, [r4, #0]
+   1805e:	2b2a      	cmp	r3, #42	; 0x2a
+   18060:	d016      	beq.n	18090 <_svfiprintf_r+0xf4>
+   18062:	2000      	movs	r0, #0
+   18064:	210a      	movs	r1, #10
+   18066:	9b09      	ldr	r3, [sp, #36]	; 0x24
+   18068:	7822      	ldrb	r2, [r4, #0]
+   1806a:	3a30      	subs	r2, #48	; 0x30
+   1806c:	2a09      	cmp	r2, #9
+   1806e:	d955      	bls.n	1811c <_svfiprintf_r+0x180>
+   18070:	2800      	cmp	r0, #0
+   18072:	d015      	beq.n	180a0 <_svfiprintf_r+0x104>
+   18074:	9309      	str	r3, [sp, #36]	; 0x24
+   18076:	e013      	b.n	180a0 <_svfiprintf_r+0x104>
+   18078:	2b25      	cmp	r3, #37	; 0x25
+   1807a:	d0b5      	beq.n	17fe8 <_svfiprintf_r+0x4c>
+   1807c:	3401      	adds	r4, #1
+   1807e:	e7b0      	b.n	17fe2 <_svfiprintf_r+0x46>
+   18080:	2301      	movs	r3, #1
+   18082:	1b80      	subs	r0, r0, r6
+   18084:	4083      	lsls	r3, r0
+   18086:	6829      	ldr	r1, [r5, #0]
+   18088:	0014      	movs	r4, r2
+   1808a:	430b      	orrs	r3, r1
+   1808c:	602b      	str	r3, [r5, #0]
+   1808e:	e7cd      	b.n	1802c <_svfiprintf_r+0x90>
+   18090:	9b05      	ldr	r3, [sp, #20]
+   18092:	1d18      	adds	r0, r3, #4
+   18094:	681b      	ldr	r3, [r3, #0]
+   18096:	9005      	str	r0, [sp, #20]
+   18098:	2b00      	cmp	r3, #0
+   1809a:	db39      	blt.n	18110 <_svfiprintf_r+0x174>
+   1809c:	9309      	str	r3, [sp, #36]	; 0x24
+   1809e:	0014      	movs	r4, r2
+   180a0:	7823      	ldrb	r3, [r4, #0]
+   180a2:	2b2e      	cmp	r3, #46	; 0x2e
+   180a4:	d10b      	bne.n	180be <_svfiprintf_r+0x122>
+   180a6:	7863      	ldrb	r3, [r4, #1]
+   180a8:	1c62      	adds	r2, r4, #1
+   180aa:	2b2a      	cmp	r3, #42	; 0x2a
+   180ac:	d13e      	bne.n	1812c <_svfiprintf_r+0x190>
+   180ae:	9b05      	ldr	r3, [sp, #20]
+   180b0:	3402      	adds	r4, #2
+   180b2:	1d1a      	adds	r2, r3, #4
+   180b4:	681b      	ldr	r3, [r3, #0]
+   180b6:	9205      	str	r2, [sp, #20]
+   180b8:	2b00      	cmp	r3, #0
+   180ba:	db34      	blt.n	18126 <_svfiprintf_r+0x18a>
+   180bc:	9307      	str	r3, [sp, #28]
+   180be:	4e35      	ldr	r6, [pc, #212]	; (18194 <_svfiprintf_r+0x1f8>)
+   180c0:	7821      	ldrb	r1, [r4, #0]
+   180c2:	2203      	movs	r2, #3
+   180c4:	0030      	movs	r0, r6
+   180c6:	f000 f9f5 	bl	184b4 <memchr>
+   180ca:	2800      	cmp	r0, #0
+   180cc:	d006      	beq.n	180dc <_svfiprintf_r+0x140>
+   180ce:	2340      	movs	r3, #64	; 0x40
+   180d0:	1b80      	subs	r0, r0, r6
+   180d2:	4083      	lsls	r3, r0
+   180d4:	682a      	ldr	r2, [r5, #0]
+   180d6:	3401      	adds	r4, #1
+   180d8:	4313      	orrs	r3, r2
+   180da:	602b      	str	r3, [r5, #0]
+   180dc:	7821      	ldrb	r1, [r4, #0]
+   180de:	2206      	movs	r2, #6
+   180e0:	482d      	ldr	r0, [pc, #180]	; (18198 <_svfiprintf_r+0x1fc>)
+   180e2:	1c66      	adds	r6, r4, #1
+   180e4:	7629      	strb	r1, [r5, #24]
+   180e6:	f000 f9e5 	bl	184b4 <memchr>
+   180ea:	2800      	cmp	r0, #0
+   180ec:	d046      	beq.n	1817c <_svfiprintf_r+0x1e0>
+   180ee:	4b2b      	ldr	r3, [pc, #172]	; (1819c <_svfiprintf_r+0x200>)
+   180f0:	2b00      	cmp	r3, #0
+   180f2:	d12f      	bne.n	18154 <_svfiprintf_r+0x1b8>
+   180f4:	6829      	ldr	r1, [r5, #0]
+   180f6:	9b05      	ldr	r3, [sp, #20]
+   180f8:	2207      	movs	r2, #7
+   180fa:	05c9      	lsls	r1, r1, #23
+   180fc:	d528      	bpl.n	18150 <_svfiprintf_r+0x1b4>
+   180fe:	189b      	adds	r3, r3, r2
+   18100:	4393      	bics	r3, r2
+   18102:	3308      	adds	r3, #8
+   18104:	9305      	str	r3, [sp, #20]
+   18106:	696b      	ldr	r3, [r5, #20]
+   18108:	9a03      	ldr	r2, [sp, #12]
+   1810a:	189b      	adds	r3, r3, r2
+   1810c:	616b      	str	r3, [r5, #20]
+   1810e:	e767      	b.n	17fe0 <_svfiprintf_r+0x44>
+   18110:	425b      	negs	r3, r3
+   18112:	60eb      	str	r3, [r5, #12]
+   18114:	2302      	movs	r3, #2
+   18116:	430b      	orrs	r3, r1
+   18118:	602b      	str	r3, [r5, #0]
+   1811a:	e7c0      	b.n	1809e <_svfiprintf_r+0x102>
+   1811c:	434b      	muls	r3, r1
+   1811e:	3401      	adds	r4, #1
+   18120:	189b      	adds	r3, r3, r2
+   18122:	2001      	movs	r0, #1
+   18124:	e7a0      	b.n	18068 <_svfiprintf_r+0xcc>
+   18126:	2301      	movs	r3, #1
+   18128:	425b      	negs	r3, r3
+   1812a:	e7c7      	b.n	180bc <_svfiprintf_r+0x120>
+   1812c:	2300      	movs	r3, #0
+   1812e:	0014      	movs	r4, r2
+   18130:	200a      	movs	r0, #10
+   18132:	001a      	movs	r2, r3
+   18134:	606b      	str	r3, [r5, #4]
+   18136:	7821      	ldrb	r1, [r4, #0]
+   18138:	3930      	subs	r1, #48	; 0x30
+   1813a:	2909      	cmp	r1, #9
+   1813c:	d903      	bls.n	18146 <_svfiprintf_r+0x1aa>
+   1813e:	2b00      	cmp	r3, #0
+   18140:	d0bd      	beq.n	180be <_svfiprintf_r+0x122>
+   18142:	9207      	str	r2, [sp, #28]
+   18144:	e7bb      	b.n	180be <_svfiprintf_r+0x122>
+   18146:	4342      	muls	r2, r0
+   18148:	3401      	adds	r4, #1
+   1814a:	1852      	adds	r2, r2, r1
+   1814c:	2301      	movs	r3, #1
+   1814e:	e7f2      	b.n	18136 <_svfiprintf_r+0x19a>
+   18150:	3307      	adds	r3, #7
+   18152:	e7d5      	b.n	18100 <_svfiprintf_r+0x164>
+   18154:	ab05      	add	r3, sp, #20
+   18156:	9300      	str	r3, [sp, #0]
+   18158:	003a      	movs	r2, r7
+   1815a:	4b11      	ldr	r3, [pc, #68]	; (181a0 <_svfiprintf_r+0x204>)
+   1815c:	0029      	movs	r1, r5
+   1815e:	9802      	ldr	r0, [sp, #8]
+   18160:	e000      	b.n	18164 <_svfiprintf_r+0x1c8>
+   18162:	bf00      	nop
+   18164:	9003      	str	r0, [sp, #12]
+   18166:	9b03      	ldr	r3, [sp, #12]
+   18168:	3301      	adds	r3, #1
+   1816a:	d1cc      	bne.n	18106 <_svfiprintf_r+0x16a>
+   1816c:	89bb      	ldrh	r3, [r7, #12]
+   1816e:	980b      	ldr	r0, [sp, #44]	; 0x2c
+   18170:	065b      	lsls	r3, r3, #25
+   18172:	d400      	bmi.n	18176 <_svfiprintf_r+0x1da>
+   18174:	e729      	b.n	17fca <_svfiprintf_r+0x2e>
+   18176:	2001      	movs	r0, #1
+   18178:	4240      	negs	r0, r0
+   1817a:	e726      	b.n	17fca <_svfiprintf_r+0x2e>
+   1817c:	ab05      	add	r3, sp, #20
+   1817e:	9300      	str	r3, [sp, #0]
+   18180:	003a      	movs	r2, r7
+   18182:	4b07      	ldr	r3, [pc, #28]	; (181a0 <_svfiprintf_r+0x204>)
+   18184:	0029      	movs	r1, r5
+   18186:	9802      	ldr	r0, [sp, #8]
+   18188:	f000 f87a 	bl	18280 <_printf_i>
+   1818c:	e7ea      	b.n	18164 <_svfiprintf_r+0x1c8>
+   1818e:	46c0      	nop			; (mov r8, r8)
+   18190:	0001c94c 	.word	0x0001c94c
+   18194:	0001c952 	.word	0x0001c952
+   18198:	0001c956 	.word	0x0001c956
+   1819c:	00000000 	.word	0x00000000
+   181a0:	00017ed9 	.word	0x00017ed9
+
+000181a4 <_printf_common>:
+   181a4:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+   181a6:	0015      	movs	r5, r2
+   181a8:	9301      	str	r3, [sp, #4]
+   181aa:	688a      	ldr	r2, [r1, #8]
+   181ac:	690b      	ldr	r3, [r1, #16]
+   181ae:	9000      	str	r0, [sp, #0]
+   181b0:	000c      	movs	r4, r1
+   181b2:	4293      	cmp	r3, r2
+   181b4:	da00      	bge.n	181b8 <_printf_common+0x14>
+   181b6:	0013      	movs	r3, r2
+   181b8:	0022      	movs	r2, r4
+   181ba:	602b      	str	r3, [r5, #0]
+   181bc:	3243      	adds	r2, #67	; 0x43
+   181be:	7812      	ldrb	r2, [r2, #0]
+   181c0:	2a00      	cmp	r2, #0
+   181c2:	d001      	beq.n	181c8 <_printf_common+0x24>
+   181c4:	3301      	adds	r3, #1
+   181c6:	602b      	str	r3, [r5, #0]
+   181c8:	6823      	ldr	r3, [r4, #0]
+   181ca:	069b      	lsls	r3, r3, #26
+   181cc:	d502      	bpl.n	181d4 <_printf_common+0x30>
+   181ce:	682b      	ldr	r3, [r5, #0]
+   181d0:	3302      	adds	r3, #2
+   181d2:	602b      	str	r3, [r5, #0]
+   181d4:	2706      	movs	r7, #6
+   181d6:	6823      	ldr	r3, [r4, #0]
+   181d8:	401f      	ands	r7, r3
+   181da:	d027      	beq.n	1822c <_printf_common+0x88>
+   181dc:	0023      	movs	r3, r4
+   181de:	3343      	adds	r3, #67	; 0x43
+   181e0:	781b      	ldrb	r3, [r3, #0]
+   181e2:	1e5a      	subs	r2, r3, #1
+   181e4:	4193      	sbcs	r3, r2
+   181e6:	6822      	ldr	r2, [r4, #0]
+   181e8:	0692      	lsls	r2, r2, #26
+   181ea:	d430      	bmi.n	1824e <_printf_common+0xaa>
+   181ec:	0022      	movs	r2, r4
+   181ee:	9901      	ldr	r1, [sp, #4]
+   181f0:	3243      	adds	r2, #67	; 0x43
+   181f2:	9800      	ldr	r0, [sp, #0]
+   181f4:	9e08      	ldr	r6, [sp, #32]
+   181f6:	47b0      	blx	r6
+   181f8:	1c43      	adds	r3, r0, #1
+   181fa:	d025      	beq.n	18248 <_printf_common+0xa4>
+   181fc:	2306      	movs	r3, #6
+   181fe:	6820      	ldr	r0, [r4, #0]
+   18200:	682a      	ldr	r2, [r5, #0]
+   18202:	68e1      	ldr	r1, [r4, #12]
+   18204:	4003      	ands	r3, r0
+   18206:	2500      	movs	r5, #0
+   18208:	2b04      	cmp	r3, #4
+   1820a:	d103      	bne.n	18214 <_printf_common+0x70>
+   1820c:	1a8d      	subs	r5, r1, r2
+   1820e:	43eb      	mvns	r3, r5
+   18210:	17db      	asrs	r3, r3, #31
+   18212:	401d      	ands	r5, r3
+   18214:	68a3      	ldr	r3, [r4, #8]
+   18216:	6922      	ldr	r2, [r4, #16]
+   18218:	4293      	cmp	r3, r2
+   1821a:	dd01      	ble.n	18220 <_printf_common+0x7c>
+   1821c:	1a9b      	subs	r3, r3, r2
+   1821e:	18ed      	adds	r5, r5, r3
+   18220:	2700      	movs	r7, #0
+   18222:	42bd      	cmp	r5, r7
+   18224:	d120      	bne.n	18268 <_printf_common+0xc4>
+   18226:	2000      	movs	r0, #0
+   18228:	e010      	b.n	1824c <_printf_common+0xa8>
+   1822a:	3701      	adds	r7, #1
+   1822c:	68e3      	ldr	r3, [r4, #12]
+   1822e:	682a      	ldr	r2, [r5, #0]
+   18230:	1a9b      	subs	r3, r3, r2
+   18232:	429f      	cmp	r7, r3
+   18234:	dad2      	bge.n	181dc <_printf_common+0x38>
+   18236:	0022      	movs	r2, r4
+   18238:	2301      	movs	r3, #1
+   1823a:	3219      	adds	r2, #25
+   1823c:	9901      	ldr	r1, [sp, #4]
+   1823e:	9800      	ldr	r0, [sp, #0]
+   18240:	9e08      	ldr	r6, [sp, #32]
+   18242:	47b0      	blx	r6
+   18244:	1c43      	adds	r3, r0, #1
+   18246:	d1f0      	bne.n	1822a <_printf_common+0x86>
+   18248:	2001      	movs	r0, #1
+   1824a:	4240      	negs	r0, r0
+   1824c:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+   1824e:	2030      	movs	r0, #48	; 0x30
+   18250:	18e1      	adds	r1, r4, r3
+   18252:	3143      	adds	r1, #67	; 0x43
+   18254:	7008      	strb	r0, [r1, #0]
+   18256:	0021      	movs	r1, r4
+   18258:	1c5a      	adds	r2, r3, #1
+   1825a:	3145      	adds	r1, #69	; 0x45
+   1825c:	7809      	ldrb	r1, [r1, #0]
+   1825e:	18a2      	adds	r2, r4, r2
+   18260:	3243      	adds	r2, #67	; 0x43
+   18262:	3302      	adds	r3, #2
+   18264:	7011      	strb	r1, [r2, #0]
+   18266:	e7c1      	b.n	181ec <_printf_common+0x48>
+   18268:	0022      	movs	r2, r4
+   1826a:	2301      	movs	r3, #1
+   1826c:	321a      	adds	r2, #26
+   1826e:	9901      	ldr	r1, [sp, #4]
+   18270:	9800      	ldr	r0, [sp, #0]
+   18272:	9e08      	ldr	r6, [sp, #32]
+   18274:	47b0      	blx	r6
+   18276:	1c43      	adds	r3, r0, #1
+   18278:	d0e6      	beq.n	18248 <_printf_common+0xa4>
+   1827a:	3701      	adds	r7, #1
+   1827c:	e7d1      	b.n	18222 <_printf_common+0x7e>
 	...
 
-000183f0 <_printf_i>:
-   183f0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   183f2:	b08b      	sub	sp, #44	; 0x2c
-   183f4:	9206      	str	r2, [sp, #24]
-   183f6:	000a      	movs	r2, r1
-   183f8:	3243      	adds	r2, #67	; 0x43
-   183fa:	9307      	str	r3, [sp, #28]
-   183fc:	9005      	str	r0, [sp, #20]
-   183fe:	9204      	str	r2, [sp, #16]
-   18400:	7e0a      	ldrb	r2, [r1, #24]
-   18402:	000c      	movs	r4, r1
-   18404:	9b10      	ldr	r3, [sp, #64]	; 0x40
-   18406:	2a6e      	cmp	r2, #110	; 0x6e
-   18408:	d100      	bne.n	1840c <_printf_i+0x1c>
-   1840a:	e08f      	b.n	1852c <_printf_i+0x13c>
-   1840c:	d817      	bhi.n	1843e <_printf_i+0x4e>
-   1840e:	2a63      	cmp	r2, #99	; 0x63
-   18410:	d02c      	beq.n	1846c <_printf_i+0x7c>
-   18412:	d808      	bhi.n	18426 <_printf_i+0x36>
-   18414:	2a00      	cmp	r2, #0
-   18416:	d100      	bne.n	1841a <_printf_i+0x2a>
-   18418:	e099      	b.n	1854e <_printf_i+0x15e>
-   1841a:	2a58      	cmp	r2, #88	; 0x58
-   1841c:	d054      	beq.n	184c8 <_printf_i+0xd8>
-   1841e:	0026      	movs	r6, r4
-   18420:	3642      	adds	r6, #66	; 0x42
-   18422:	7032      	strb	r2, [r6, #0]
-   18424:	e029      	b.n	1847a <_printf_i+0x8a>
-   18426:	2a64      	cmp	r2, #100	; 0x64
-   18428:	d001      	beq.n	1842e <_printf_i+0x3e>
-   1842a:	2a69      	cmp	r2, #105	; 0x69
-   1842c:	d1f7      	bne.n	1841e <_printf_i+0x2e>
-   1842e:	6821      	ldr	r1, [r4, #0]
-   18430:	681a      	ldr	r2, [r3, #0]
-   18432:	0608      	lsls	r0, r1, #24
-   18434:	d523      	bpl.n	1847e <_printf_i+0x8e>
-   18436:	1d11      	adds	r1, r2, #4
-   18438:	6019      	str	r1, [r3, #0]
-   1843a:	6815      	ldr	r5, [r2, #0]
-   1843c:	e025      	b.n	1848a <_printf_i+0x9a>
-   1843e:	2a73      	cmp	r2, #115	; 0x73
-   18440:	d100      	bne.n	18444 <_printf_i+0x54>
-   18442:	e088      	b.n	18556 <_printf_i+0x166>
-   18444:	d808      	bhi.n	18458 <_printf_i+0x68>
-   18446:	2a6f      	cmp	r2, #111	; 0x6f
-   18448:	d029      	beq.n	1849e <_printf_i+0xae>
-   1844a:	2a70      	cmp	r2, #112	; 0x70
-   1844c:	d1e7      	bne.n	1841e <_printf_i+0x2e>
-   1844e:	2220      	movs	r2, #32
-   18450:	6809      	ldr	r1, [r1, #0]
-   18452:	430a      	orrs	r2, r1
-   18454:	6022      	str	r2, [r4, #0]
-   18456:	e003      	b.n	18460 <_printf_i+0x70>
-   18458:	2a75      	cmp	r2, #117	; 0x75
-   1845a:	d020      	beq.n	1849e <_printf_i+0xae>
-   1845c:	2a78      	cmp	r2, #120	; 0x78
-   1845e:	d1de      	bne.n	1841e <_printf_i+0x2e>
-   18460:	0022      	movs	r2, r4
-   18462:	2178      	movs	r1, #120	; 0x78
-   18464:	3245      	adds	r2, #69	; 0x45
-   18466:	7011      	strb	r1, [r2, #0]
-   18468:	4a6c      	ldr	r2, [pc, #432]	; (1861c <_printf_i+0x22c>)
-   1846a:	e030      	b.n	184ce <_printf_i+0xde>
-   1846c:	000e      	movs	r6, r1
-   1846e:	681a      	ldr	r2, [r3, #0]
-   18470:	3642      	adds	r6, #66	; 0x42
-   18472:	1d11      	adds	r1, r2, #4
-   18474:	6019      	str	r1, [r3, #0]
-   18476:	6813      	ldr	r3, [r2, #0]
-   18478:	7033      	strb	r3, [r6, #0]
-   1847a:	2301      	movs	r3, #1
-   1847c:	e079      	b.n	18572 <_printf_i+0x182>
-   1847e:	0649      	lsls	r1, r1, #25
-   18480:	d5d9      	bpl.n	18436 <_printf_i+0x46>
-   18482:	1d11      	adds	r1, r2, #4
-   18484:	6019      	str	r1, [r3, #0]
-   18486:	2300      	movs	r3, #0
-   18488:	5ed5      	ldrsh	r5, [r2, r3]
-   1848a:	2d00      	cmp	r5, #0
-   1848c:	da03      	bge.n	18496 <_printf_i+0xa6>
-   1848e:	232d      	movs	r3, #45	; 0x2d
-   18490:	9a04      	ldr	r2, [sp, #16]
-   18492:	426d      	negs	r5, r5
-   18494:	7013      	strb	r3, [r2, #0]
-   18496:	4b62      	ldr	r3, [pc, #392]	; (18620 <_printf_i+0x230>)
-   18498:	270a      	movs	r7, #10
-   1849a:	9303      	str	r3, [sp, #12]
-   1849c:	e02f      	b.n	184fe <_printf_i+0x10e>
-   1849e:	6820      	ldr	r0, [r4, #0]
-   184a0:	6819      	ldr	r1, [r3, #0]
-   184a2:	0605      	lsls	r5, r0, #24
-   184a4:	d503      	bpl.n	184ae <_printf_i+0xbe>
-   184a6:	1d08      	adds	r0, r1, #4
-   184a8:	6018      	str	r0, [r3, #0]
-   184aa:	680d      	ldr	r5, [r1, #0]
-   184ac:	e005      	b.n	184ba <_printf_i+0xca>
-   184ae:	0640      	lsls	r0, r0, #25
-   184b0:	d5f9      	bpl.n	184a6 <_printf_i+0xb6>
-   184b2:	680d      	ldr	r5, [r1, #0]
-   184b4:	1d08      	adds	r0, r1, #4
-   184b6:	6018      	str	r0, [r3, #0]
-   184b8:	b2ad      	uxth	r5, r5
-   184ba:	4b59      	ldr	r3, [pc, #356]	; (18620 <_printf_i+0x230>)
-   184bc:	2708      	movs	r7, #8
-   184be:	9303      	str	r3, [sp, #12]
-   184c0:	2a6f      	cmp	r2, #111	; 0x6f
-   184c2:	d018      	beq.n	184f6 <_printf_i+0x106>
-   184c4:	270a      	movs	r7, #10
-   184c6:	e016      	b.n	184f6 <_printf_i+0x106>
-   184c8:	3145      	adds	r1, #69	; 0x45
-   184ca:	700a      	strb	r2, [r1, #0]
-   184cc:	4a54      	ldr	r2, [pc, #336]	; (18620 <_printf_i+0x230>)
-   184ce:	9203      	str	r2, [sp, #12]
-   184d0:	681a      	ldr	r2, [r3, #0]
-   184d2:	6821      	ldr	r1, [r4, #0]
-   184d4:	1d10      	adds	r0, r2, #4
-   184d6:	6018      	str	r0, [r3, #0]
-   184d8:	6815      	ldr	r5, [r2, #0]
-   184da:	0608      	lsls	r0, r1, #24
-   184dc:	d522      	bpl.n	18524 <_printf_i+0x134>
-   184de:	07cb      	lsls	r3, r1, #31
-   184e0:	d502      	bpl.n	184e8 <_printf_i+0xf8>
-   184e2:	2320      	movs	r3, #32
-   184e4:	4319      	orrs	r1, r3
-   184e6:	6021      	str	r1, [r4, #0]
-   184e8:	2710      	movs	r7, #16
-   184ea:	2d00      	cmp	r5, #0
-   184ec:	d103      	bne.n	184f6 <_printf_i+0x106>
-   184ee:	2320      	movs	r3, #32
-   184f0:	6822      	ldr	r2, [r4, #0]
-   184f2:	439a      	bics	r2, r3
-   184f4:	6022      	str	r2, [r4, #0]
-   184f6:	0023      	movs	r3, r4
-   184f8:	2200      	movs	r2, #0
-   184fa:	3343      	adds	r3, #67	; 0x43
-   184fc:	701a      	strb	r2, [r3, #0]
-   184fe:	6863      	ldr	r3, [r4, #4]
-   18500:	60a3      	str	r3, [r4, #8]
-   18502:	2b00      	cmp	r3, #0
-   18504:	db5c      	blt.n	185c0 <_printf_i+0x1d0>
-   18506:	2204      	movs	r2, #4
-   18508:	6821      	ldr	r1, [r4, #0]
-   1850a:	4391      	bics	r1, r2
-   1850c:	6021      	str	r1, [r4, #0]
-   1850e:	2d00      	cmp	r5, #0
-   18510:	d158      	bne.n	185c4 <_printf_i+0x1d4>
-   18512:	9e04      	ldr	r6, [sp, #16]
-   18514:	2b00      	cmp	r3, #0
-   18516:	d064      	beq.n	185e2 <_printf_i+0x1f2>
-   18518:	0026      	movs	r6, r4
-   1851a:	9b03      	ldr	r3, [sp, #12]
-   1851c:	3642      	adds	r6, #66	; 0x42
-   1851e:	781b      	ldrb	r3, [r3, #0]
-   18520:	7033      	strb	r3, [r6, #0]
-   18522:	e05e      	b.n	185e2 <_printf_i+0x1f2>
-   18524:	0648      	lsls	r0, r1, #25
-   18526:	d5da      	bpl.n	184de <_printf_i+0xee>
-   18528:	b2ad      	uxth	r5, r5
-   1852a:	e7d8      	b.n	184de <_printf_i+0xee>
-   1852c:	6809      	ldr	r1, [r1, #0]
-   1852e:	681a      	ldr	r2, [r3, #0]
-   18530:	0608      	lsls	r0, r1, #24
-   18532:	d505      	bpl.n	18540 <_printf_i+0x150>
-   18534:	1d11      	adds	r1, r2, #4
-   18536:	6019      	str	r1, [r3, #0]
-   18538:	6813      	ldr	r3, [r2, #0]
-   1853a:	6962      	ldr	r2, [r4, #20]
-   1853c:	601a      	str	r2, [r3, #0]
-   1853e:	e006      	b.n	1854e <_printf_i+0x15e>
-   18540:	0649      	lsls	r1, r1, #25
-   18542:	d5f7      	bpl.n	18534 <_printf_i+0x144>
-   18544:	1d11      	adds	r1, r2, #4
-   18546:	6019      	str	r1, [r3, #0]
-   18548:	6813      	ldr	r3, [r2, #0]
-   1854a:	8aa2      	ldrh	r2, [r4, #20]
-   1854c:	801a      	strh	r2, [r3, #0]
-   1854e:	2300      	movs	r3, #0
-   18550:	9e04      	ldr	r6, [sp, #16]
-   18552:	6123      	str	r3, [r4, #16]
-   18554:	e054      	b.n	18600 <_printf_i+0x210>
-   18556:	681a      	ldr	r2, [r3, #0]
-   18558:	1d11      	adds	r1, r2, #4
-   1855a:	6019      	str	r1, [r3, #0]
-   1855c:	6816      	ldr	r6, [r2, #0]
-   1855e:	2100      	movs	r1, #0
-   18560:	6862      	ldr	r2, [r4, #4]
-   18562:	0030      	movs	r0, r6
-   18564:	f000 f85e 	bl	18624 <memchr>
-   18568:	2800      	cmp	r0, #0
-   1856a:	d001      	beq.n	18570 <_printf_i+0x180>
-   1856c:	1b80      	subs	r0, r0, r6
-   1856e:	6060      	str	r0, [r4, #4]
-   18570:	6863      	ldr	r3, [r4, #4]
-   18572:	6123      	str	r3, [r4, #16]
-   18574:	2300      	movs	r3, #0
-   18576:	9a04      	ldr	r2, [sp, #16]
-   18578:	7013      	strb	r3, [r2, #0]
-   1857a:	e041      	b.n	18600 <_printf_i+0x210>
-   1857c:	6923      	ldr	r3, [r4, #16]
-   1857e:	0032      	movs	r2, r6
-   18580:	9906      	ldr	r1, [sp, #24]
-   18582:	9805      	ldr	r0, [sp, #20]
-   18584:	9d07      	ldr	r5, [sp, #28]
-   18586:	47a8      	blx	r5
-   18588:	1c43      	adds	r3, r0, #1
-   1858a:	d043      	beq.n	18614 <_printf_i+0x224>
-   1858c:	6823      	ldr	r3, [r4, #0]
-   1858e:	2500      	movs	r5, #0
-   18590:	079b      	lsls	r3, r3, #30
-   18592:	d40f      	bmi.n	185b4 <_printf_i+0x1c4>
-   18594:	9b09      	ldr	r3, [sp, #36]	; 0x24
-   18596:	68e0      	ldr	r0, [r4, #12]
-   18598:	4298      	cmp	r0, r3
-   1859a:	da3d      	bge.n	18618 <_printf_i+0x228>
-   1859c:	0018      	movs	r0, r3
-   1859e:	e03b      	b.n	18618 <_printf_i+0x228>
-   185a0:	0022      	movs	r2, r4
-   185a2:	2301      	movs	r3, #1
-   185a4:	3219      	adds	r2, #25
-   185a6:	9906      	ldr	r1, [sp, #24]
-   185a8:	9805      	ldr	r0, [sp, #20]
-   185aa:	9e07      	ldr	r6, [sp, #28]
-   185ac:	47b0      	blx	r6
-   185ae:	1c43      	adds	r3, r0, #1
-   185b0:	d030      	beq.n	18614 <_printf_i+0x224>
-   185b2:	3501      	adds	r5, #1
-   185b4:	68e3      	ldr	r3, [r4, #12]
-   185b6:	9a09      	ldr	r2, [sp, #36]	; 0x24
-   185b8:	1a9b      	subs	r3, r3, r2
-   185ba:	429d      	cmp	r5, r3
-   185bc:	dbf0      	blt.n	185a0 <_printf_i+0x1b0>
-   185be:	e7e9      	b.n	18594 <_printf_i+0x1a4>
-   185c0:	2d00      	cmp	r5, #0
-   185c2:	d0a9      	beq.n	18518 <_printf_i+0x128>
-   185c4:	9e04      	ldr	r6, [sp, #16]
-   185c6:	0028      	movs	r0, r5
-   185c8:	0039      	movs	r1, r7
-   185ca:	f7ff fa97 	bl	17afc <__aeabi_uidivmod>
-   185ce:	9b03      	ldr	r3, [sp, #12]
-   185d0:	3e01      	subs	r6, #1
-   185d2:	5c5b      	ldrb	r3, [r3, r1]
-   185d4:	0028      	movs	r0, r5
-   185d6:	7033      	strb	r3, [r6, #0]
-   185d8:	0039      	movs	r1, r7
-   185da:	f7ff fa09 	bl	179f0 <__udivsi3>
-   185de:	1e05      	subs	r5, r0, #0
-   185e0:	d1f1      	bne.n	185c6 <_printf_i+0x1d6>
-   185e2:	2f08      	cmp	r7, #8
-   185e4:	d109      	bne.n	185fa <_printf_i+0x20a>
-   185e6:	6823      	ldr	r3, [r4, #0]
-   185e8:	07db      	lsls	r3, r3, #31
-   185ea:	d506      	bpl.n	185fa <_printf_i+0x20a>
-   185ec:	6863      	ldr	r3, [r4, #4]
-   185ee:	6922      	ldr	r2, [r4, #16]
-   185f0:	4293      	cmp	r3, r2
-   185f2:	dc02      	bgt.n	185fa <_printf_i+0x20a>
-   185f4:	2330      	movs	r3, #48	; 0x30
-   185f6:	3e01      	subs	r6, #1
-   185f8:	7033      	strb	r3, [r6, #0]
-   185fa:	9b04      	ldr	r3, [sp, #16]
-   185fc:	1b9b      	subs	r3, r3, r6
-   185fe:	6123      	str	r3, [r4, #16]
-   18600:	9b07      	ldr	r3, [sp, #28]
-   18602:	aa09      	add	r2, sp, #36	; 0x24
-   18604:	9300      	str	r3, [sp, #0]
-   18606:	0021      	movs	r1, r4
-   18608:	9b06      	ldr	r3, [sp, #24]
-   1860a:	9805      	ldr	r0, [sp, #20]
-   1860c:	f7ff fe82 	bl	18314 <_printf_common>
-   18610:	1c43      	adds	r3, r0, #1
-   18612:	d1b3      	bne.n	1857c <_printf_i+0x18c>
-   18614:	2001      	movs	r0, #1
-   18616:	4240      	negs	r0, r0
-   18618:	b00b      	add	sp, #44	; 0x2c
-   1861a:	bdf0      	pop	{r4, r5, r6, r7, pc}
-   1861c:	0001cade 	.word	0x0001cade
-   18620:	0001cacd 	.word	0x0001cacd
-
-00018624 <memchr>:
-   18624:	b2c9      	uxtb	r1, r1
-   18626:	1882      	adds	r2, r0, r2
-   18628:	4290      	cmp	r0, r2
-   1862a:	d101      	bne.n	18630 <memchr+0xc>
-   1862c:	2000      	movs	r0, #0
-   1862e:	4770      	bx	lr
-   18630:	7803      	ldrb	r3, [r0, #0]
-   18632:	428b      	cmp	r3, r1
-   18634:	d0fb      	beq.n	1862e <memchr+0xa>
-   18636:	3001      	adds	r0, #1
-   18638:	e7f6      	b.n	18628 <memchr+0x4>
-
-0001863a <memmove>:
-   1863a:	b510      	push	{r4, lr}
-   1863c:	4288      	cmp	r0, r1
-   1863e:	d902      	bls.n	18646 <memmove+0xc>
-   18640:	188b      	adds	r3, r1, r2
-   18642:	4298      	cmp	r0, r3
-   18644:	d308      	bcc.n	18658 <memmove+0x1e>
-   18646:	2300      	movs	r3, #0
-   18648:	429a      	cmp	r2, r3
-   1864a:	d007      	beq.n	1865c <memmove+0x22>
-   1864c:	5ccc      	ldrb	r4, [r1, r3]
-   1864e:	54c4      	strb	r4, [r0, r3]
-   18650:	3301      	adds	r3, #1
-   18652:	e7f9      	b.n	18648 <memmove+0xe>
-   18654:	5c8b      	ldrb	r3, [r1, r2]
-   18656:	5483      	strb	r3, [r0, r2]
-   18658:	3a01      	subs	r2, #1
-   1865a:	d2fb      	bcs.n	18654 <memmove+0x1a>
-   1865c:	bd10      	pop	{r4, pc}
+00018280 <_printf_i>:
+   18280:	b5f0      	push	{r4, r5, r6, r7, lr}
+   18282:	b08b      	sub	sp, #44	; 0x2c
+   18284:	9206      	str	r2, [sp, #24]
+   18286:	000a      	movs	r2, r1
+   18288:	3243      	adds	r2, #67	; 0x43
+   1828a:	9307      	str	r3, [sp, #28]
+   1828c:	9005      	str	r0, [sp, #20]
+   1828e:	9204      	str	r2, [sp, #16]
+   18290:	7e0a      	ldrb	r2, [r1, #24]
+   18292:	000c      	movs	r4, r1
+   18294:	9b10      	ldr	r3, [sp, #64]	; 0x40
+   18296:	2a6e      	cmp	r2, #110	; 0x6e
+   18298:	d100      	bne.n	1829c <_printf_i+0x1c>
+   1829a:	e08f      	b.n	183bc <_printf_i+0x13c>
+   1829c:	d817      	bhi.n	182ce <_printf_i+0x4e>
+   1829e:	2a63      	cmp	r2, #99	; 0x63
+   182a0:	d02c      	beq.n	182fc <_printf_i+0x7c>
+   182a2:	d808      	bhi.n	182b6 <_printf_i+0x36>
+   182a4:	2a00      	cmp	r2, #0
+   182a6:	d100      	bne.n	182aa <_printf_i+0x2a>
+   182a8:	e099      	b.n	183de <_printf_i+0x15e>
+   182aa:	2a58      	cmp	r2, #88	; 0x58
+   182ac:	d054      	beq.n	18358 <_printf_i+0xd8>
+   182ae:	0026      	movs	r6, r4
+   182b0:	3642      	adds	r6, #66	; 0x42
+   182b2:	7032      	strb	r2, [r6, #0]
+   182b4:	e029      	b.n	1830a <_printf_i+0x8a>
+   182b6:	2a64      	cmp	r2, #100	; 0x64
+   182b8:	d001      	beq.n	182be <_printf_i+0x3e>
+   182ba:	2a69      	cmp	r2, #105	; 0x69
+   182bc:	d1f7      	bne.n	182ae <_printf_i+0x2e>
+   182be:	6821      	ldr	r1, [r4, #0]
+   182c0:	681a      	ldr	r2, [r3, #0]
+   182c2:	0608      	lsls	r0, r1, #24
+   182c4:	d523      	bpl.n	1830e <_printf_i+0x8e>
+   182c6:	1d11      	adds	r1, r2, #4
+   182c8:	6019      	str	r1, [r3, #0]
+   182ca:	6815      	ldr	r5, [r2, #0]
+   182cc:	e025      	b.n	1831a <_printf_i+0x9a>
+   182ce:	2a73      	cmp	r2, #115	; 0x73
+   182d0:	d100      	bne.n	182d4 <_printf_i+0x54>
+   182d2:	e088      	b.n	183e6 <_printf_i+0x166>
+   182d4:	d808      	bhi.n	182e8 <_printf_i+0x68>
+   182d6:	2a6f      	cmp	r2, #111	; 0x6f
+   182d8:	d029      	beq.n	1832e <_printf_i+0xae>
+   182da:	2a70      	cmp	r2, #112	; 0x70
+   182dc:	d1e7      	bne.n	182ae <_printf_i+0x2e>
+   182de:	2220      	movs	r2, #32
+   182e0:	6809      	ldr	r1, [r1, #0]
+   182e2:	430a      	orrs	r2, r1
+   182e4:	6022      	str	r2, [r4, #0]
+   182e6:	e003      	b.n	182f0 <_printf_i+0x70>
+   182e8:	2a75      	cmp	r2, #117	; 0x75
+   182ea:	d020      	beq.n	1832e <_printf_i+0xae>
+   182ec:	2a78      	cmp	r2, #120	; 0x78
+   182ee:	d1de      	bne.n	182ae <_printf_i+0x2e>
+   182f0:	0022      	movs	r2, r4
+   182f2:	2178      	movs	r1, #120	; 0x78
+   182f4:	3245      	adds	r2, #69	; 0x45
+   182f6:	7011      	strb	r1, [r2, #0]
+   182f8:	4a6c      	ldr	r2, [pc, #432]	; (184ac <_printf_i+0x22c>)
+   182fa:	e030      	b.n	1835e <_printf_i+0xde>
+   182fc:	000e      	movs	r6, r1
+   182fe:	681a      	ldr	r2, [r3, #0]
+   18300:	3642      	adds	r6, #66	; 0x42
+   18302:	1d11      	adds	r1, r2, #4
+   18304:	6019      	str	r1, [r3, #0]
+   18306:	6813      	ldr	r3, [r2, #0]
+   18308:	7033      	strb	r3, [r6, #0]
+   1830a:	2301      	movs	r3, #1
+   1830c:	e079      	b.n	18402 <_printf_i+0x182>
+   1830e:	0649      	lsls	r1, r1, #25
+   18310:	d5d9      	bpl.n	182c6 <_printf_i+0x46>
+   18312:	1d11      	adds	r1, r2, #4
+   18314:	6019      	str	r1, [r3, #0]
+   18316:	2300      	movs	r3, #0
+   18318:	5ed5      	ldrsh	r5, [r2, r3]
+   1831a:	2d00      	cmp	r5, #0
+   1831c:	da03      	bge.n	18326 <_printf_i+0xa6>
+   1831e:	232d      	movs	r3, #45	; 0x2d
+   18320:	9a04      	ldr	r2, [sp, #16]
+   18322:	426d      	negs	r5, r5
+   18324:	7013      	strb	r3, [r2, #0]
+   18326:	4b62      	ldr	r3, [pc, #392]	; (184b0 <_printf_i+0x230>)
+   18328:	270a      	movs	r7, #10
+   1832a:	9303      	str	r3, [sp, #12]
+   1832c:	e02f      	b.n	1838e <_printf_i+0x10e>
+   1832e:	6820      	ldr	r0, [r4, #0]
+   18330:	6819      	ldr	r1, [r3, #0]
+   18332:	0605      	lsls	r5, r0, #24
+   18334:	d503      	bpl.n	1833e <_printf_i+0xbe>
+   18336:	1d08      	adds	r0, r1, #4
+   18338:	6018      	str	r0, [r3, #0]
+   1833a:	680d      	ldr	r5, [r1, #0]
+   1833c:	e005      	b.n	1834a <_printf_i+0xca>
+   1833e:	0640      	lsls	r0, r0, #25
+   18340:	d5f9      	bpl.n	18336 <_printf_i+0xb6>
+   18342:	680d      	ldr	r5, [r1, #0]
+   18344:	1d08      	adds	r0, r1, #4
+   18346:	6018      	str	r0, [r3, #0]
+   18348:	b2ad      	uxth	r5, r5
+   1834a:	4b59      	ldr	r3, [pc, #356]	; (184b0 <_printf_i+0x230>)
+   1834c:	2708      	movs	r7, #8
+   1834e:	9303      	str	r3, [sp, #12]
+   18350:	2a6f      	cmp	r2, #111	; 0x6f
+   18352:	d018      	beq.n	18386 <_printf_i+0x106>
+   18354:	270a      	movs	r7, #10
+   18356:	e016      	b.n	18386 <_printf_i+0x106>
+   18358:	3145      	adds	r1, #69	; 0x45
+   1835a:	700a      	strb	r2, [r1, #0]
+   1835c:	4a54      	ldr	r2, [pc, #336]	; (184b0 <_printf_i+0x230>)
+   1835e:	9203      	str	r2, [sp, #12]
+   18360:	681a      	ldr	r2, [r3, #0]
+   18362:	6821      	ldr	r1, [r4, #0]
+   18364:	1d10      	adds	r0, r2, #4
+   18366:	6018      	str	r0, [r3, #0]
+   18368:	6815      	ldr	r5, [r2, #0]
+   1836a:	0608      	lsls	r0, r1, #24
+   1836c:	d522      	bpl.n	183b4 <_printf_i+0x134>
+   1836e:	07cb      	lsls	r3, r1, #31
+   18370:	d502      	bpl.n	18378 <_printf_i+0xf8>
+   18372:	2320      	movs	r3, #32
+   18374:	4319      	orrs	r1, r3
+   18376:	6021      	str	r1, [r4, #0]
+   18378:	2710      	movs	r7, #16
+   1837a:	2d00      	cmp	r5, #0
+   1837c:	d103      	bne.n	18386 <_printf_i+0x106>
+   1837e:	2320      	movs	r3, #32
+   18380:	6822      	ldr	r2, [r4, #0]
+   18382:	439a      	bics	r2, r3
+   18384:	6022      	str	r2, [r4, #0]
+   18386:	0023      	movs	r3, r4
+   18388:	2200      	movs	r2, #0
+   1838a:	3343      	adds	r3, #67	; 0x43
+   1838c:	701a      	strb	r2, [r3, #0]
+   1838e:	6863      	ldr	r3, [r4, #4]
+   18390:	60a3      	str	r3, [r4, #8]
+   18392:	2b00      	cmp	r3, #0
+   18394:	db5c      	blt.n	18450 <_printf_i+0x1d0>
+   18396:	2204      	movs	r2, #4
+   18398:	6821      	ldr	r1, [r4, #0]
+   1839a:	4391      	bics	r1, r2
+   1839c:	6021      	str	r1, [r4, #0]
+   1839e:	2d00      	cmp	r5, #0
+   183a0:	d158      	bne.n	18454 <_printf_i+0x1d4>
+   183a2:	9e04      	ldr	r6, [sp, #16]
+   183a4:	2b00      	cmp	r3, #0
+   183a6:	d064      	beq.n	18472 <_printf_i+0x1f2>
+   183a8:	0026      	movs	r6, r4
+   183aa:	9b03      	ldr	r3, [sp, #12]
+   183ac:	3642      	adds	r6, #66	; 0x42
+   183ae:	781b      	ldrb	r3, [r3, #0]
+   183b0:	7033      	strb	r3, [r6, #0]
+   183b2:	e05e      	b.n	18472 <_printf_i+0x1f2>
+   183b4:	0648      	lsls	r0, r1, #25
+   183b6:	d5da      	bpl.n	1836e <_printf_i+0xee>
+   183b8:	b2ad      	uxth	r5, r5
+   183ba:	e7d8      	b.n	1836e <_printf_i+0xee>
+   183bc:	6809      	ldr	r1, [r1, #0]
+   183be:	681a      	ldr	r2, [r3, #0]
+   183c0:	0608      	lsls	r0, r1, #24
+   183c2:	d505      	bpl.n	183d0 <_printf_i+0x150>
+   183c4:	1d11      	adds	r1, r2, #4
+   183c6:	6019      	str	r1, [r3, #0]
+   183c8:	6813      	ldr	r3, [r2, #0]
+   183ca:	6962      	ldr	r2, [r4, #20]
+   183cc:	601a      	str	r2, [r3, #0]
+   183ce:	e006      	b.n	183de <_printf_i+0x15e>
+   183d0:	0649      	lsls	r1, r1, #25
+   183d2:	d5f7      	bpl.n	183c4 <_printf_i+0x144>
+   183d4:	1d11      	adds	r1, r2, #4
+   183d6:	6019      	str	r1, [r3, #0]
+   183d8:	6813      	ldr	r3, [r2, #0]
+   183da:	8aa2      	ldrh	r2, [r4, #20]
+   183dc:	801a      	strh	r2, [r3, #0]
+   183de:	2300      	movs	r3, #0
+   183e0:	9e04      	ldr	r6, [sp, #16]
+   183e2:	6123      	str	r3, [r4, #16]
+   183e4:	e054      	b.n	18490 <_printf_i+0x210>
+   183e6:	681a      	ldr	r2, [r3, #0]
+   183e8:	1d11      	adds	r1, r2, #4
+   183ea:	6019      	str	r1, [r3, #0]
+   183ec:	6816      	ldr	r6, [r2, #0]
+   183ee:	2100      	movs	r1, #0
+   183f0:	6862      	ldr	r2, [r4, #4]
+   183f2:	0030      	movs	r0, r6
+   183f4:	f000 f85e 	bl	184b4 <memchr>
+   183f8:	2800      	cmp	r0, #0
+   183fa:	d001      	beq.n	18400 <_printf_i+0x180>
+   183fc:	1b80      	subs	r0, r0, r6
+   183fe:	6060      	str	r0, [r4, #4]
+   18400:	6863      	ldr	r3, [r4, #4]
+   18402:	6123      	str	r3, [r4, #16]
+   18404:	2300      	movs	r3, #0
+   18406:	9a04      	ldr	r2, [sp, #16]
+   18408:	7013      	strb	r3, [r2, #0]
+   1840a:	e041      	b.n	18490 <_printf_i+0x210>
+   1840c:	6923      	ldr	r3, [r4, #16]
+   1840e:	0032      	movs	r2, r6
+   18410:	9906      	ldr	r1, [sp, #24]
+   18412:	9805      	ldr	r0, [sp, #20]
+   18414:	9d07      	ldr	r5, [sp, #28]
+   18416:	47a8      	blx	r5
+   18418:	1c43      	adds	r3, r0, #1
+   1841a:	d043      	beq.n	184a4 <_printf_i+0x224>
+   1841c:	6823      	ldr	r3, [r4, #0]
+   1841e:	2500      	movs	r5, #0
+   18420:	079b      	lsls	r3, r3, #30
+   18422:	d40f      	bmi.n	18444 <_printf_i+0x1c4>
+   18424:	9b09      	ldr	r3, [sp, #36]	; 0x24
+   18426:	68e0      	ldr	r0, [r4, #12]
+   18428:	4298      	cmp	r0, r3
+   1842a:	da3d      	bge.n	184a8 <_printf_i+0x228>
+   1842c:	0018      	movs	r0, r3
+   1842e:	e03b      	b.n	184a8 <_printf_i+0x228>
+   18430:	0022      	movs	r2, r4
+   18432:	2301      	movs	r3, #1
+   18434:	3219      	adds	r2, #25
+   18436:	9906      	ldr	r1, [sp, #24]
+   18438:	9805      	ldr	r0, [sp, #20]
+   1843a:	9e07      	ldr	r6, [sp, #28]
+   1843c:	47b0      	blx	r6
+   1843e:	1c43      	adds	r3, r0, #1
+   18440:	d030      	beq.n	184a4 <_printf_i+0x224>
+   18442:	3501      	adds	r5, #1
+   18444:	68e3      	ldr	r3, [r4, #12]
+   18446:	9a09      	ldr	r2, [sp, #36]	; 0x24
+   18448:	1a9b      	subs	r3, r3, r2
+   1844a:	429d      	cmp	r5, r3
+   1844c:	dbf0      	blt.n	18430 <_printf_i+0x1b0>
+   1844e:	e7e9      	b.n	18424 <_printf_i+0x1a4>
+   18450:	2d00      	cmp	r5, #0
+   18452:	d0a9      	beq.n	183a8 <_printf_i+0x128>
+   18454:	9e04      	ldr	r6, [sp, #16]
+   18456:	0028      	movs	r0, r5
+   18458:	0039      	movs	r1, r7
+   1845a:	f7ff fa97 	bl	1798c <__aeabi_uidivmod>
+   1845e:	9b03      	ldr	r3, [sp, #12]
+   18460:	3e01      	subs	r6, #1
+   18462:	5c5b      	ldrb	r3, [r3, r1]
+   18464:	0028      	movs	r0, r5
+   18466:	7033      	strb	r3, [r6, #0]
+   18468:	0039      	movs	r1, r7
+   1846a:	f7ff fa09 	bl	17880 <__udivsi3>
+   1846e:	1e05      	subs	r5, r0, #0
+   18470:	d1f1      	bne.n	18456 <_printf_i+0x1d6>
+   18472:	2f08      	cmp	r7, #8
+   18474:	d109      	bne.n	1848a <_printf_i+0x20a>
+   18476:	6823      	ldr	r3, [r4, #0]
+   18478:	07db      	lsls	r3, r3, #31
+   1847a:	d506      	bpl.n	1848a <_printf_i+0x20a>
+   1847c:	6863      	ldr	r3, [r4, #4]
+   1847e:	6922      	ldr	r2, [r4, #16]
+   18480:	4293      	cmp	r3, r2
+   18482:	dc02      	bgt.n	1848a <_printf_i+0x20a>
+   18484:	2330      	movs	r3, #48	; 0x30
+   18486:	3e01      	subs	r6, #1
+   18488:	7033      	strb	r3, [r6, #0]
+   1848a:	9b04      	ldr	r3, [sp, #16]
+   1848c:	1b9b      	subs	r3, r3, r6
+   1848e:	6123      	str	r3, [r4, #16]
+   18490:	9b07      	ldr	r3, [sp, #28]
+   18492:	aa09      	add	r2, sp, #36	; 0x24
+   18494:	9300      	str	r3, [sp, #0]
+   18496:	0021      	movs	r1, r4
+   18498:	9b06      	ldr	r3, [sp, #24]
+   1849a:	9805      	ldr	r0, [sp, #20]
+   1849c:	f7ff fe82 	bl	181a4 <_printf_common>
+   184a0:	1c43      	adds	r3, r0, #1
+   184a2:	d1b3      	bne.n	1840c <_printf_i+0x18c>
+   184a4:	2001      	movs	r0, #1
+   184a6:	4240      	negs	r0, r0
+   184a8:	b00b      	add	sp, #44	; 0x2c
+   184aa:	bdf0      	pop	{r4, r5, r6, r7, pc}
+   184ac:	0001c96e 	.word	0x0001c96e
+   184b0:	0001c95d 	.word	0x0001c95d
+
+000184b4 <memchr>:
+   184b4:	b2c9      	uxtb	r1, r1
+   184b6:	1882      	adds	r2, r0, r2
+   184b8:	4290      	cmp	r0, r2
+   184ba:	d101      	bne.n	184c0 <memchr+0xc>
+   184bc:	2000      	movs	r0, #0
+   184be:	4770      	bx	lr
+   184c0:	7803      	ldrb	r3, [r0, #0]
+   184c2:	428b      	cmp	r3, r1
+   184c4:	d0fb      	beq.n	184be <memchr+0xa>
+   184c6:	3001      	adds	r0, #1
+   184c8:	e7f6      	b.n	184b8 <memchr+0x4>
+
+000184ca <memmove>:
+   184ca:	b510      	push	{r4, lr}
+   184cc:	4288      	cmp	r0, r1
+   184ce:	d902      	bls.n	184d6 <memmove+0xc>
+   184d0:	188b      	adds	r3, r1, r2
+   184d2:	4298      	cmp	r0, r3
+   184d4:	d308      	bcc.n	184e8 <memmove+0x1e>
+   184d6:	2300      	movs	r3, #0
+   184d8:	429a      	cmp	r2, r3
+   184da:	d007      	beq.n	184ec <memmove+0x22>
+   184dc:	5ccc      	ldrb	r4, [r1, r3]
+   184de:	54c4      	strb	r4, [r0, r3]
+   184e0:	3301      	adds	r3, #1
+   184e2:	e7f9      	b.n	184d8 <memmove+0xe>
+   184e4:	5c8b      	ldrb	r3, [r1, r2]
+   184e6:	5483      	strb	r3, [r0, r2]
+   184e8:	3a01      	subs	r2, #1
+   184ea:	d2fb      	bcs.n	184e4 <memmove+0x1a>
+   184ec:	bd10      	pop	{r4, pc}
 	...
 
-00018660 <_free_r>:
-   18660:	b570      	push	{r4, r5, r6, lr}
-   18662:	0005      	movs	r5, r0
-   18664:	2900      	cmp	r1, #0
-   18666:	d010      	beq.n	1868a <_free_r+0x2a>
-   18668:	1f0c      	subs	r4, r1, #4
-   1866a:	6823      	ldr	r3, [r4, #0]
-   1866c:	2b00      	cmp	r3, #0
-   1866e:	da00      	bge.n	18672 <_free_r+0x12>
-   18670:	18e4      	adds	r4, r4, r3
-   18672:	0028      	movs	r0, r5
-   18674:	f000 f8d4 	bl	18820 <__malloc_lock>
-   18678:	4a1d      	ldr	r2, [pc, #116]	; (186f0 <_free_r+0x90>)
-   1867a:	6813      	ldr	r3, [r2, #0]
-   1867c:	2b00      	cmp	r3, #0
-   1867e:	d105      	bne.n	1868c <_free_r+0x2c>
-   18680:	6063      	str	r3, [r4, #4]
-   18682:	6014      	str	r4, [r2, #0]
-   18684:	0028      	movs	r0, r5
-   18686:	f000 f8cc 	bl	18822 <__malloc_unlock>
-   1868a:	bd70      	pop	{r4, r5, r6, pc}
-   1868c:	42a3      	cmp	r3, r4
-   1868e:	d909      	bls.n	186a4 <_free_r+0x44>
-   18690:	6821      	ldr	r1, [r4, #0]
-   18692:	1860      	adds	r0, r4, r1
-   18694:	4283      	cmp	r3, r0
-   18696:	d1f3      	bne.n	18680 <_free_r+0x20>
-   18698:	6818      	ldr	r0, [r3, #0]
-   1869a:	685b      	ldr	r3, [r3, #4]
-   1869c:	1841      	adds	r1, r0, r1
-   1869e:	6021      	str	r1, [r4, #0]
-   186a0:	e7ee      	b.n	18680 <_free_r+0x20>
-   186a2:	0013      	movs	r3, r2
-   186a4:	685a      	ldr	r2, [r3, #4]
-   186a6:	2a00      	cmp	r2, #0
-   186a8:	d001      	beq.n	186ae <_free_r+0x4e>
-   186aa:	42a2      	cmp	r2, r4
-   186ac:	d9f9      	bls.n	186a2 <_free_r+0x42>
-   186ae:	6819      	ldr	r1, [r3, #0]
-   186b0:	1858      	adds	r0, r3, r1
-   186b2:	42a0      	cmp	r0, r4
-   186b4:	d10b      	bne.n	186ce <_free_r+0x6e>
-   186b6:	6820      	ldr	r0, [r4, #0]
-   186b8:	1809      	adds	r1, r1, r0
-   186ba:	1858      	adds	r0, r3, r1
-   186bc:	6019      	str	r1, [r3, #0]
-   186be:	4282      	cmp	r2, r0
-   186c0:	d1e0      	bne.n	18684 <_free_r+0x24>
-   186c2:	6810      	ldr	r0, [r2, #0]
-   186c4:	6852      	ldr	r2, [r2, #4]
-   186c6:	1841      	adds	r1, r0, r1
-   186c8:	6019      	str	r1, [r3, #0]
-   186ca:	605a      	str	r2, [r3, #4]
-   186cc:	e7da      	b.n	18684 <_free_r+0x24>
-   186ce:	42a0      	cmp	r0, r4
-   186d0:	d902      	bls.n	186d8 <_free_r+0x78>
-   186d2:	230c      	movs	r3, #12
-   186d4:	602b      	str	r3, [r5, #0]
-   186d6:	e7d5      	b.n	18684 <_free_r+0x24>
-   186d8:	6821      	ldr	r1, [r4, #0]
-   186da:	1860      	adds	r0, r4, r1
-   186dc:	4282      	cmp	r2, r0
-   186de:	d103      	bne.n	186e8 <_free_r+0x88>
-   186e0:	6810      	ldr	r0, [r2, #0]
-   186e2:	6852      	ldr	r2, [r2, #4]
-   186e4:	1841      	adds	r1, r0, r1
-   186e6:	6021      	str	r1, [r4, #0]
-   186e8:	6062      	str	r2, [r4, #4]
-   186ea:	605c      	str	r4, [r3, #4]
-   186ec:	e7ca      	b.n	18684 <_free_r+0x24>
-   186ee:	46c0      	nop			; (mov r8, r8)
-   186f0:	20004c8c 	.word	0x20004c8c
-
-000186f4 <_malloc_r>:
-   186f4:	2303      	movs	r3, #3
-   186f6:	b570      	push	{r4, r5, r6, lr}
-   186f8:	1ccd      	adds	r5, r1, #3
-   186fa:	439d      	bics	r5, r3
-   186fc:	3508      	adds	r5, #8
-   186fe:	0006      	movs	r6, r0
-   18700:	2d0c      	cmp	r5, #12
-   18702:	d21e      	bcs.n	18742 <_malloc_r+0x4e>
-   18704:	250c      	movs	r5, #12
-   18706:	42a9      	cmp	r1, r5
-   18708:	d81d      	bhi.n	18746 <_malloc_r+0x52>
-   1870a:	0030      	movs	r0, r6
-   1870c:	f000 f888 	bl	18820 <__malloc_lock>
-   18710:	4a25      	ldr	r2, [pc, #148]	; (187a8 <_malloc_r+0xb4>)
-   18712:	6814      	ldr	r4, [r2, #0]
-   18714:	0021      	movs	r1, r4
-   18716:	2900      	cmp	r1, #0
-   18718:	d119      	bne.n	1874e <_malloc_r+0x5a>
-   1871a:	4c24      	ldr	r4, [pc, #144]	; (187ac <_malloc_r+0xb8>)
-   1871c:	6823      	ldr	r3, [r4, #0]
-   1871e:	2b00      	cmp	r3, #0
-   18720:	d103      	bne.n	1872a <_malloc_r+0x36>
-   18722:	0030      	movs	r0, r6
-   18724:	f000 f86a 	bl	187fc <_sbrk_r>
-   18728:	6020      	str	r0, [r4, #0]
-   1872a:	0029      	movs	r1, r5
-   1872c:	0030      	movs	r0, r6
-   1872e:	f000 f865 	bl	187fc <_sbrk_r>
-   18732:	1c43      	adds	r3, r0, #1
-   18734:	d12c      	bne.n	18790 <_malloc_r+0x9c>
-   18736:	230c      	movs	r3, #12
-   18738:	0030      	movs	r0, r6
-   1873a:	6033      	str	r3, [r6, #0]
-   1873c:	f000 f871 	bl	18822 <__malloc_unlock>
-   18740:	e003      	b.n	1874a <_malloc_r+0x56>
-   18742:	2d00      	cmp	r5, #0
-   18744:	dadf      	bge.n	18706 <_malloc_r+0x12>
-   18746:	230c      	movs	r3, #12
-   18748:	6033      	str	r3, [r6, #0]
-   1874a:	2000      	movs	r0, #0
-   1874c:	bd70      	pop	{r4, r5, r6, pc}
-   1874e:	680b      	ldr	r3, [r1, #0]
-   18750:	1b5b      	subs	r3, r3, r5
-   18752:	d41a      	bmi.n	1878a <_malloc_r+0x96>
-   18754:	2b0b      	cmp	r3, #11
-   18756:	d903      	bls.n	18760 <_malloc_r+0x6c>
-   18758:	600b      	str	r3, [r1, #0]
-   1875a:	18cc      	adds	r4, r1, r3
-   1875c:	6025      	str	r5, [r4, #0]
-   1875e:	e003      	b.n	18768 <_malloc_r+0x74>
-   18760:	428c      	cmp	r4, r1
-   18762:	d10e      	bne.n	18782 <_malloc_r+0x8e>
-   18764:	6863      	ldr	r3, [r4, #4]
-   18766:	6013      	str	r3, [r2, #0]
-   18768:	0030      	movs	r0, r6
-   1876a:	f000 f85a 	bl	18822 <__malloc_unlock>
-   1876e:	0020      	movs	r0, r4
-   18770:	2207      	movs	r2, #7
-   18772:	300b      	adds	r0, #11
-   18774:	1d23      	adds	r3, r4, #4
-   18776:	4390      	bics	r0, r2
-   18778:	1ac3      	subs	r3, r0, r3
-   1877a:	d0e7      	beq.n	1874c <_malloc_r+0x58>
-   1877c:	425a      	negs	r2, r3
-   1877e:	50e2      	str	r2, [r4, r3]
-   18780:	e7e4      	b.n	1874c <_malloc_r+0x58>
-   18782:	684b      	ldr	r3, [r1, #4]
-   18784:	6063      	str	r3, [r4, #4]
-   18786:	000c      	movs	r4, r1
-   18788:	e7ee      	b.n	18768 <_malloc_r+0x74>
-   1878a:	000c      	movs	r4, r1
-   1878c:	6849      	ldr	r1, [r1, #4]
-   1878e:	e7c2      	b.n	18716 <_malloc_r+0x22>
-   18790:	2303      	movs	r3, #3
-   18792:	1cc4      	adds	r4, r0, #3
-   18794:	439c      	bics	r4, r3
-   18796:	42a0      	cmp	r0, r4
-   18798:	d0e0      	beq.n	1875c <_malloc_r+0x68>
-   1879a:	1a21      	subs	r1, r4, r0
-   1879c:	0030      	movs	r0, r6
-   1879e:	f000 f82d 	bl	187fc <_sbrk_r>
-   187a2:	1c43      	adds	r3, r0, #1
-   187a4:	d1da      	bne.n	1875c <_malloc_r+0x68>
-   187a6:	e7c6      	b.n	18736 <_malloc_r+0x42>
-   187a8:	20004c8c 	.word	0x20004c8c
-   187ac:	20004c90 	.word	0x20004c90
-
-000187b0 <_realloc_r>:
-   187b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
-   187b2:	0007      	movs	r7, r0
-   187b4:	000d      	movs	r5, r1
-   187b6:	0016      	movs	r6, r2
-   187b8:	2900      	cmp	r1, #0
-   187ba:	d105      	bne.n	187c8 <_realloc_r+0x18>
-   187bc:	0011      	movs	r1, r2
-   187be:	f7ff ff99 	bl	186f4 <_malloc_r>
-   187c2:	0004      	movs	r4, r0
-   187c4:	0020      	movs	r0, r4
-   187c6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
-   187c8:	2a00      	cmp	r2, #0
-   187ca:	d103      	bne.n	187d4 <_realloc_r+0x24>
-   187cc:	f7ff ff48 	bl	18660 <_free_r>
-   187d0:	0034      	movs	r4, r6
-   187d2:	e7f7      	b.n	187c4 <_realloc_r+0x14>
-   187d4:	f000 f826 	bl	18824 <_malloc_usable_size_r>
-   187d8:	002c      	movs	r4, r5
-   187da:	4286      	cmp	r6, r0
-   187dc:	d9f2      	bls.n	187c4 <_realloc_r+0x14>
-   187de:	0031      	movs	r1, r6
-   187e0:	0038      	movs	r0, r7
-   187e2:	f7ff ff87 	bl	186f4 <_malloc_r>
-   187e6:	1e04      	subs	r4, r0, #0
-   187e8:	d0ec      	beq.n	187c4 <_realloc_r+0x14>
-   187ea:	0029      	movs	r1, r5
-   187ec:	0032      	movs	r2, r6
-   187ee:	f7ff fbdc 	bl	17faa <memcpy>
-   187f2:	0029      	movs	r1, r5
-   187f4:	0038      	movs	r0, r7
-   187f6:	f7ff ff33 	bl	18660 <_free_r>
-   187fa:	e7e3      	b.n	187c4 <_realloc_r+0x14>
-
-000187fc <_sbrk_r>:
-   187fc:	2300      	movs	r3, #0
-   187fe:	b570      	push	{r4, r5, r6, lr}
-   18800:	4c06      	ldr	r4, [pc, #24]	; (1881c <_sbrk_r+0x20>)
-   18802:	0005      	movs	r5, r0
-   18804:	0008      	movs	r0, r1
-   18806:	6023      	str	r3, [r4, #0]
-   18808:	f7e8 fe26 	bl	1458 <_sbrk>
-   1880c:	1c43      	adds	r3, r0, #1
-   1880e:	d103      	bne.n	18818 <_sbrk_r+0x1c>
-   18810:	6823      	ldr	r3, [r4, #0]
-   18812:	2b00      	cmp	r3, #0
-   18814:	d000      	beq.n	18818 <_sbrk_r+0x1c>
-   18816:	602b      	str	r3, [r5, #0]
-   18818:	bd70      	pop	{r4, r5, r6, pc}
-   1881a:	46c0      	nop			; (mov r8, r8)
-   1881c:	20004e34 	.word	0x20004e34
-
-00018820 <__malloc_lock>:
-   18820:	4770      	bx	lr
-
-00018822 <__malloc_unlock>:
-   18822:	4770      	bx	lr
-
-00018824 <_malloc_usable_size_r>:
-   18824:	1f0b      	subs	r3, r1, #4
-   18826:	681b      	ldr	r3, [r3, #0]
-   18828:	1f18      	subs	r0, r3, #4
-   1882a:	2b00      	cmp	r3, #0
-   1882c:	da01      	bge.n	18832 <_malloc_usable_size_r+0xe>
-   1882e:	580b      	ldr	r3, [r1, r0]
-   18830:	18c0      	adds	r0, r0, r3
-   18832:	4770      	bx	lr
-   18834:	42000800 	.word	0x42000800
-   18838:	42000c00 	.word	0x42000c00
-   1883c:	42001000 	.word	0x42001000
-   18840:	42001400 	.word	0x42001400
-   18844:	42001800 	.word	0x42001800
-   18848:	42001c00 	.word	0x42001c00
-   1884c:	00000dae 	.word	0x00000dae
-   18850:	00000daa 	.word	0x00000daa
-   18854:	00000daa 	.word	0x00000daa
-   18858:	00000e10 	.word	0x00000e10
-   1885c:	00000e10 	.word	0x00000e10
-   18860:	00000dc2 	.word	0x00000dc2
-   18864:	00000db4 	.word	0x00000db4
-   18868:	00000dc8 	.word	0x00000dc8
-   1886c:	00000dfe 	.word	0x00000dfe
-   18870:	00000e98 	.word	0x00000e98
-   18874:	00000e78 	.word	0x00000e78
-   18878:	00000e78 	.word	0x00000e78
-   1887c:	00000f04 	.word	0x00000f04
-   18880:	00000e8a 	.word	0x00000e8a
-   18884:	00000ea6 	.word	0x00000ea6
-   18888:	00000e7c 	.word	0x00000e7c
-   1888c:	00000eb4 	.word	0x00000eb4
-   18890:	00000ef4 	.word	0x00000ef4
-   18894:	2074754f 	.word	0x2074754f
-   18898:	6d20666f 	.word	0x6d20666f
-   1889c:	726f6d65 	.word	0x726f6d65
-   188a0:	0079      	.short	0x0079
-   188a2:	f800      	.short	0xf800
-   188a4:	000022aa 	.word	0x000022aa
-   188a8:	00002326 	.word	0x00002326
-   188ac:	00002330 	.word	0x00002330
-   188b0:	00002346 	.word	0x00002346
-   188b4:	00002356 	.word	0x00002356
-   188b8:	00002366 	.word	0x00002366
-   188bc:	00002384 	.word	0x00002384
-   188c0:	0000239c 	.word	0x0000239c
-   188c4:	000023b2 	.word	0x000023b2
-   188c8:	000023d0 	.word	0x000023d0
-   188cc:	000023da 	.word	0x000023da
-   188d0:	000023f0 	.word	0x000023f0
-   188d4:	00002400 	.word	0x00002400
-   188d8:	00002410 	.word	0x00002410
-   188dc:	0000242e 	.word	0x0000242e
-   188e0:	00002446 	.word	0x00002446
-   188e4:	00002450 	.word	0x00002450
-   188e8:	00002466 	.word	0x00002466
-   188ec:	00002476 	.word	0x00002476
-   188f0:	00002486 	.word	0x00002486
-   188f4:	000024a4 	.word	0x000024a4
-   188f8:	0000ffff 	.word	0x0000ffff
-   188fc:	4c4c554e 	.word	0x4c4c554e
-   18900:	696f7020 	.word	0x696f7020
-   18904:	7265746e 	.word	0x7265746e
-   18908:	00000000 	.word	0x00000000
-   1890c:	6f5f766c 	.word	0x6f5f766c
-   18910:	00006a62 	.word	0x00006a62
-   18914:	000007e0 	.word	0x000007e0
-   18918:	00007ef4 	.word	0x00007ef4
-   1891c:	00007ef8 	.word	0x00007ef8
-   18920:	00007ef4 	.word	0x00007ef4
-   18924:	00007efc 	.word	0x00007efc
-   18928:	00007f00 	.word	0x00007f00
-   1892c:	00007f04 	.word	0x00007f04
-   18930:	00007f08 	.word	0x00007f08
-   18934:	00007efc 	.word	0x00007efc
-   18938:	00007f00 	.word	0x00007f00
-   1893c:	00007f04 	.word	0x00007f04
-   18940:	00007f08 	.word	0x00007f08
-   18944:	0000ffff 	.word	0x0000ffff
-   18948:	640a6f4e 	.word	0x640a6f4e
-   1894c:	00617461 	.word	0x00617461
-   18950:	000081b8 	.word	0x000081b8
-   18954:	000081a0 	.word	0x000081a0
-   18958:	000081a4 	.word	0x000081a4
-   1895c:	000081a8 	.word	0x000081a8
-   18960:	000081ac 	.word	0x000081ac
-   18964:	000081b0 	.word	0x000081b0
-   18968:	000000ff 	.word	0x000000ff
-
-0001896c <_lv_bpp1_opa_table>:
-   1896c:	0000ff00                                ....
-
-00018970 <_lv_bpp2_opa_table>:
-   18970:	ffaa5500                                .U..
-
-00018974 <_lv_bpp4_opa_table>:
-   18974:	33221100 77665544 bbaa9988 ffeeddcc     .."3DUfw........
-
-00018984 <_lv_bpp8_opa_table>:
-   18984:	03020100 07060504 0b0a0908 0f0e0d0c     ................
-   18994:	13121110 17161514 1b1a1918 1f1e1d1c     ................
-   189a4:	23222120 27262524 2b2a2928 2f2e2d2c      !"#$%&'()*+,-./
-   189b4:	33323130 37363534 3b3a3938 3f3e3d3c     0123456789:;<=>?
-   189c4:	43424140 47464544 4b4a4948 4f4e4d4c     @ABCDEFGHIJKLMNO
-   189d4:	53525150 57565554 5b5a5958 5f5e5d5c     PQRSTUVWXYZ[\]^_
-   189e4:	63626160 67666564 6b6a6968 6f6e6d6c     `abcdefghijklmno
-   189f4:	73727170 77767574 7b7a7978 7f7e7d7c     pqrstuvwxyz{|}~.
-   18a04:	83828180 87868584 8b8a8988 8f8e8d8c     ................
-   18a14:	93929190 97969594 9b9a9998 9f9e9d9c     ................
-   18a24:	a3a2a1a0 a7a6a5a4 abaaa9a8 afaeadac     ................
-   18a34:	b3b2b1b0 b7b6b5b4 bbbab9b8 bfbebdbc     ................
-   18a44:	c3c2c1c0 c7c6c5c4 cbcac9c8 cfcecdcc     ................
-   18a54:	d3d2d1d0 d7d6d5d4 dbdad9d8 dfdedddc     ................
-   18a64:	e3e2e1e0 e7e6e5e4 ebeae9e8 efeeedec     ................
-   18a74:	f3f2f1f0 f7f6f5f4 fbfaf9f8 fffefdfc     ................
-
-00018a84 <wcorr.9232>:
-   18a84:	81808080 83828281 87868584 8d8c8a89     ................
-   18a94:	9593918f 9e9b9997 a7a5a2a0 b2afadaa     ................
-   18aa4:	000000b5 0000ffff 33221100 77665544     .........."3DUfw
-   18ab4:	bbaa9988 ffeeddcc 33221100 77665544     .........."3DUfw
-   18ac4:	bbaa9988 ffeeddcc 006e6962 0000eabc     ........bin.....
-   18ad4:	0000eac2 0000ea58 0000eaaa 0000eab0     ....X...........
-   18ae4:	0000eabc 0000eabc 0000eabc 0000eab6     ................
-   18af4:	0000ecf8 0000ecfc 0000ecc2 0000ecec     ................
-   18b04:	0000ecf0 0000ecf8 0000ecf8 0000ecf8     ................
-   18b14:	0000ecf4 0000eca2 0000eca6 0000ec6c     ............l...
-   18b24:	0000ec96 0000ec9a 0000eca2 0000eca2     ................
-   18b34:	0000eca2 0000ec9e 0000ebf2 0000ebf6     ................
-   18b44:	0000ebcc 0000ebe6 0000ebea 0000ebf2     ................
-   18b54:	0000ebf2 0000ebf2 0000ebee 0000ed70     ............p...
-   18b64:	0000edc4 0000edca 0000edd0 0000edd6     ................
-   18b74:	0000eddc 0000ede2 0000ede8 0000ee98     ................
-   18b84:	0000ee9c 0000ee88 0000ee8c 0000ee90     ................
-   18b94:	0000ee98 0000ee98 0000ee98 0000ee94     ................
-   18ba4:	0000f0f8 0000f0fc 0000f0e8 0000f0ec     ................
-   18bb4:	0000f0f0 0000f0f8 0000f0f8 0000f0f8     ................
-   18bc4:	0000f0f4 0000f070 0000f0a0 0000f060     ....p.......`...
-   18bd4:	0000f064 0000f068 0000f070 0000f070     d...h...p...p...
-   18be4:	0000f070 0000f06c 0000f038 0000f03e     p...l...8...>...
-   18bf4:	0000eff4 0000f026 0000f02c 0000f038     ....&...,...8...
-   18c04:	0000f038 0000f038 0000f032 0000f172     8...8...2...r...
-   18c14:	0000f1ce 0000f1d4 0000f1da 0000f1e0     ................
-   18c24:	0000f1e6 0000f1ec 0000f1f2              ............
-
-00018c30 <cmaps>:
-   18c30:	00000020 0001005f 00000000 00000000      ..._...........
-   18c40:	00000000 000000b0 0060f7f3 0001c860     ..........`.`...
-   18c50:	00000000 0002003b                       ....;...
-
-00018c58 <glyph_dsc>:
+000184f0 <_free_r>:
+   184f0:	b570      	push	{r4, r5, r6, lr}
+   184f2:	0005      	movs	r5, r0
+   184f4:	2900      	cmp	r1, #0
+   184f6:	d010      	beq.n	1851a <_free_r+0x2a>
+   184f8:	1f0c      	subs	r4, r1, #4
+   184fa:	6823      	ldr	r3, [r4, #0]
+   184fc:	2b00      	cmp	r3, #0
+   184fe:	da00      	bge.n	18502 <_free_r+0x12>
+   18500:	18e4      	adds	r4, r4, r3
+   18502:	0028      	movs	r0, r5
+   18504:	f000 f8d4 	bl	186b0 <__malloc_lock>
+   18508:	4a1d      	ldr	r2, [pc, #116]	; (18580 <_free_r+0x90>)
+   1850a:	6813      	ldr	r3, [r2, #0]
+   1850c:	2b00      	cmp	r3, #0
+   1850e:	d105      	bne.n	1851c <_free_r+0x2c>
+   18510:	6063      	str	r3, [r4, #4]
+   18512:	6014      	str	r4, [r2, #0]
+   18514:	0028      	movs	r0, r5
+   18516:	f000 f8cc 	bl	186b2 <__malloc_unlock>
+   1851a:	bd70      	pop	{r4, r5, r6, pc}
+   1851c:	42a3      	cmp	r3, r4
+   1851e:	d909      	bls.n	18534 <_free_r+0x44>
+   18520:	6821      	ldr	r1, [r4, #0]
+   18522:	1860      	adds	r0, r4, r1
+   18524:	4283      	cmp	r3, r0
+   18526:	d1f3      	bne.n	18510 <_free_r+0x20>
+   18528:	6818      	ldr	r0, [r3, #0]
+   1852a:	685b      	ldr	r3, [r3, #4]
+   1852c:	1841      	adds	r1, r0, r1
+   1852e:	6021      	str	r1, [r4, #0]
+   18530:	e7ee      	b.n	18510 <_free_r+0x20>
+   18532:	0013      	movs	r3, r2
+   18534:	685a      	ldr	r2, [r3, #4]
+   18536:	2a00      	cmp	r2, #0
+   18538:	d001      	beq.n	1853e <_free_r+0x4e>
+   1853a:	42a2      	cmp	r2, r4
+   1853c:	d9f9      	bls.n	18532 <_free_r+0x42>
+   1853e:	6819      	ldr	r1, [r3, #0]
+   18540:	1858      	adds	r0, r3, r1
+   18542:	42a0      	cmp	r0, r4
+   18544:	d10b      	bne.n	1855e <_free_r+0x6e>
+   18546:	6820      	ldr	r0, [r4, #0]
+   18548:	1809      	adds	r1, r1, r0
+   1854a:	1858      	adds	r0, r3, r1
+   1854c:	6019      	str	r1, [r3, #0]
+   1854e:	4282      	cmp	r2, r0
+   18550:	d1e0      	bne.n	18514 <_free_r+0x24>
+   18552:	6810      	ldr	r0, [r2, #0]
+   18554:	6852      	ldr	r2, [r2, #4]
+   18556:	1841      	adds	r1, r0, r1
+   18558:	6019      	str	r1, [r3, #0]
+   1855a:	605a      	str	r2, [r3, #4]
+   1855c:	e7da      	b.n	18514 <_free_r+0x24>
+   1855e:	42a0      	cmp	r0, r4
+   18560:	d902      	bls.n	18568 <_free_r+0x78>
+   18562:	230c      	movs	r3, #12
+   18564:	602b      	str	r3, [r5, #0]
+   18566:	e7d5      	b.n	18514 <_free_r+0x24>
+   18568:	6821      	ldr	r1, [r4, #0]
+   1856a:	1860      	adds	r0, r4, r1
+   1856c:	4282      	cmp	r2, r0
+   1856e:	d103      	bne.n	18578 <_free_r+0x88>
+   18570:	6810      	ldr	r0, [r2, #0]
+   18572:	6852      	ldr	r2, [r2, #4]
+   18574:	1841      	adds	r1, r0, r1
+   18576:	6021      	str	r1, [r4, #0]
+   18578:	6062      	str	r2, [r4, #4]
+   1857a:	605c      	str	r4, [r3, #4]
+   1857c:	e7ca      	b.n	18514 <_free_r+0x24>
+   1857e:	46c0      	nop			; (mov r8, r8)
+   18580:	20004c8c 	.word	0x20004c8c
+
+00018584 <_malloc_r>:
+   18584:	2303      	movs	r3, #3
+   18586:	b570      	push	{r4, r5, r6, lr}
+   18588:	1ccd      	adds	r5, r1, #3
+   1858a:	439d      	bics	r5, r3
+   1858c:	3508      	adds	r5, #8
+   1858e:	0006      	movs	r6, r0
+   18590:	2d0c      	cmp	r5, #12
+   18592:	d21e      	bcs.n	185d2 <_malloc_r+0x4e>
+   18594:	250c      	movs	r5, #12
+   18596:	42a9      	cmp	r1, r5
+   18598:	d81d      	bhi.n	185d6 <_malloc_r+0x52>
+   1859a:	0030      	movs	r0, r6
+   1859c:	f000 f888 	bl	186b0 <__malloc_lock>
+   185a0:	4a25      	ldr	r2, [pc, #148]	; (18638 <_malloc_r+0xb4>)
+   185a2:	6814      	ldr	r4, [r2, #0]
+   185a4:	0021      	movs	r1, r4
+   185a6:	2900      	cmp	r1, #0
+   185a8:	d119      	bne.n	185de <_malloc_r+0x5a>
+   185aa:	4c24      	ldr	r4, [pc, #144]	; (1863c <_malloc_r+0xb8>)
+   185ac:	6823      	ldr	r3, [r4, #0]
+   185ae:	2b00      	cmp	r3, #0
+   185b0:	d103      	bne.n	185ba <_malloc_r+0x36>
+   185b2:	0030      	movs	r0, r6
+   185b4:	f000 f86a 	bl	1868c <_sbrk_r>
+   185b8:	6020      	str	r0, [r4, #0]
+   185ba:	0029      	movs	r1, r5
+   185bc:	0030      	movs	r0, r6
+   185be:	f000 f865 	bl	1868c <_sbrk_r>
+   185c2:	1c43      	adds	r3, r0, #1
+   185c4:	d12c      	bne.n	18620 <_malloc_r+0x9c>
+   185c6:	230c      	movs	r3, #12
+   185c8:	0030      	movs	r0, r6
+   185ca:	6033      	str	r3, [r6, #0]
+   185cc:	f000 f871 	bl	186b2 <__malloc_unlock>
+   185d0:	e003      	b.n	185da <_malloc_r+0x56>
+   185d2:	2d00      	cmp	r5, #0
+   185d4:	dadf      	bge.n	18596 <_malloc_r+0x12>
+   185d6:	230c      	movs	r3, #12
+   185d8:	6033      	str	r3, [r6, #0]
+   185da:	2000      	movs	r0, #0
+   185dc:	bd70      	pop	{r4, r5, r6, pc}
+   185de:	680b      	ldr	r3, [r1, #0]
+   185e0:	1b5b      	subs	r3, r3, r5
+   185e2:	d41a      	bmi.n	1861a <_malloc_r+0x96>
+   185e4:	2b0b      	cmp	r3, #11
+   185e6:	d903      	bls.n	185f0 <_malloc_r+0x6c>
+   185e8:	600b      	str	r3, [r1, #0]
+   185ea:	18cc      	adds	r4, r1, r3
+   185ec:	6025      	str	r5, [r4, #0]
+   185ee:	e003      	b.n	185f8 <_malloc_r+0x74>
+   185f0:	428c      	cmp	r4, r1
+   185f2:	d10e      	bne.n	18612 <_malloc_r+0x8e>
+   185f4:	6863      	ldr	r3, [r4, #4]
+   185f6:	6013      	str	r3, [r2, #0]
+   185f8:	0030      	movs	r0, r6
+   185fa:	f000 f85a 	bl	186b2 <__malloc_unlock>
+   185fe:	0020      	movs	r0, r4
+   18600:	2207      	movs	r2, #7
+   18602:	300b      	adds	r0, #11
+   18604:	1d23      	adds	r3, r4, #4
+   18606:	4390      	bics	r0, r2
+   18608:	1ac3      	subs	r3, r0, r3
+   1860a:	d0e7      	beq.n	185dc <_malloc_r+0x58>
+   1860c:	425a      	negs	r2, r3
+   1860e:	50e2      	str	r2, [r4, r3]
+   18610:	e7e4      	b.n	185dc <_malloc_r+0x58>
+   18612:	684b      	ldr	r3, [r1, #4]
+   18614:	6063      	str	r3, [r4, #4]
+   18616:	000c      	movs	r4, r1
+   18618:	e7ee      	b.n	185f8 <_malloc_r+0x74>
+   1861a:	000c      	movs	r4, r1
+   1861c:	6849      	ldr	r1, [r1, #4]
+   1861e:	e7c2      	b.n	185a6 <_malloc_r+0x22>
+   18620:	2303      	movs	r3, #3
+   18622:	1cc4      	adds	r4, r0, #3
+   18624:	439c      	bics	r4, r3
+   18626:	42a0      	cmp	r0, r4
+   18628:	d0e0      	beq.n	185ec <_malloc_r+0x68>
+   1862a:	1a21      	subs	r1, r4, r0
+   1862c:	0030      	movs	r0, r6
+   1862e:	f000 f82d 	bl	1868c <_sbrk_r>
+   18632:	1c43      	adds	r3, r0, #1
+   18634:	d1da      	bne.n	185ec <_malloc_r+0x68>
+   18636:	e7c6      	b.n	185c6 <_malloc_r+0x42>
+   18638:	20004c8c 	.word	0x20004c8c
+   1863c:	20004c90 	.word	0x20004c90
+
+00018640 <_realloc_r>:
+   18640:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+   18642:	0007      	movs	r7, r0
+   18644:	000d      	movs	r5, r1
+   18646:	0016      	movs	r6, r2
+   18648:	2900      	cmp	r1, #0
+   1864a:	d105      	bne.n	18658 <_realloc_r+0x18>
+   1864c:	0011      	movs	r1, r2
+   1864e:	f7ff ff99 	bl	18584 <_malloc_r>
+   18652:	0004      	movs	r4, r0
+   18654:	0020      	movs	r0, r4
+   18656:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+   18658:	2a00      	cmp	r2, #0
+   1865a:	d103      	bne.n	18664 <_realloc_r+0x24>
+   1865c:	f7ff ff48 	bl	184f0 <_free_r>
+   18660:	0034      	movs	r4, r6
+   18662:	e7f7      	b.n	18654 <_realloc_r+0x14>
+   18664:	f000 f826 	bl	186b4 <_malloc_usable_size_r>
+   18668:	002c      	movs	r4, r5
+   1866a:	4286      	cmp	r6, r0
+   1866c:	d9f2      	bls.n	18654 <_realloc_r+0x14>
+   1866e:	0031      	movs	r1, r6
+   18670:	0038      	movs	r0, r7
+   18672:	f7ff ff87 	bl	18584 <_malloc_r>
+   18676:	1e04      	subs	r4, r0, #0
+   18678:	d0ec      	beq.n	18654 <_realloc_r+0x14>
+   1867a:	0029      	movs	r1, r5
+   1867c:	0032      	movs	r2, r6
+   1867e:	f7ff fbdc 	bl	17e3a <memcpy>
+   18682:	0029      	movs	r1, r5
+   18684:	0038      	movs	r0, r7
+   18686:	f7ff ff33 	bl	184f0 <_free_r>
+   1868a:	e7e3      	b.n	18654 <_realloc_r+0x14>
+
+0001868c <_sbrk_r>:
+   1868c:	2300      	movs	r3, #0
+   1868e:	b570      	push	{r4, r5, r6, lr}
+   18690:	4c06      	ldr	r4, [pc, #24]	; (186ac <_sbrk_r+0x20>)
+   18692:	0005      	movs	r5, r0
+   18694:	0008      	movs	r0, r1
+   18696:	6023      	str	r3, [r4, #0]
+   18698:	f7e8 fede 	bl	1458 <_sbrk>
+   1869c:	1c43      	adds	r3, r0, #1
+   1869e:	d103      	bne.n	186a8 <_sbrk_r+0x1c>
+   186a0:	6823      	ldr	r3, [r4, #0]
+   186a2:	2b00      	cmp	r3, #0
+   186a4:	d000      	beq.n	186a8 <_sbrk_r+0x1c>
+   186a6:	602b      	str	r3, [r5, #0]
+   186a8:	bd70      	pop	{r4, r5, r6, pc}
+   186aa:	46c0      	nop			; (mov r8, r8)
+   186ac:	20004e34 	.word	0x20004e34
+
+000186b0 <__malloc_lock>:
+   186b0:	4770      	bx	lr
+
+000186b2 <__malloc_unlock>:
+   186b2:	4770      	bx	lr
+
+000186b4 <_malloc_usable_size_r>:
+   186b4:	1f0b      	subs	r3, r1, #4
+   186b6:	681b      	ldr	r3, [r3, #0]
+   186b8:	1f18      	subs	r0, r3, #4
+   186ba:	2b00      	cmp	r3, #0
+   186bc:	da01      	bge.n	186c2 <_malloc_usable_size_r+0xe>
+   186be:	580b      	ldr	r3, [r1, r0]
+   186c0:	18c0      	adds	r0, r0, r3
+   186c2:	4770      	bx	lr
+   186c4:	42000800 	.word	0x42000800
+   186c8:	42000c00 	.word	0x42000c00
+   186cc:	42001000 	.word	0x42001000
+   186d0:	42001400 	.word	0x42001400
+   186d4:	42001800 	.word	0x42001800
+   186d8:	42001c00 	.word	0x42001c00
+   186dc:	00000dae 	.word	0x00000dae
+   186e0:	00000daa 	.word	0x00000daa
+   186e4:	00000daa 	.word	0x00000daa
+   186e8:	00000e10 	.word	0x00000e10
+   186ec:	00000e10 	.word	0x00000e10
+   186f0:	00000dc2 	.word	0x00000dc2
+   186f4:	00000db4 	.word	0x00000db4
+   186f8:	00000dc8 	.word	0x00000dc8
+   186fc:	00000dfe 	.word	0x00000dfe
+   18700:	00000e98 	.word	0x00000e98
+   18704:	00000e78 	.word	0x00000e78
+   18708:	00000e78 	.word	0x00000e78
+   1870c:	00000f04 	.word	0x00000f04
+   18710:	00000e8a 	.word	0x00000e8a
+   18714:	00000ea6 	.word	0x00000ea6
+   18718:	00000e7c 	.word	0x00000e7c
+   1871c:	00000eb4 	.word	0x00000eb4
+   18720:	00000ef4 	.word	0x00000ef4
+   18724:	2074754f 	.word	0x2074754f
+   18728:	6d20666f 	.word	0x6d20666f
+   1872c:	726f6d65 	.word	0x726f6d65
+   18730:	0079      	.short	0x0079
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-   1a760:	0b000000 ff0500fa 00000010 1e50ff01     ..............P.
-   1a770:	000000f6 e16f0000 0000b0af 0b000000     ......o.........
-   1a780:	fffffffa ff080080 ffffffff 1f00f1ff     ................
-   1a790:	ffffffff ffffffff ffffffff ffffffff     ................
-   1a7a0:	ffffffff ffffffff ffffffff ff8fffff     ................
-   1a7b0:	ffffffff 00f8ffff dabd0600 00ff0250     ............P...
-   1a7c0:	ffffef05 00ff42fe 7ba7ff7f 05fff9ff     .....B.....{....
-   1a7d0:	0000c1ff 0effff2c 020000fc 5fffdf22     ....,.......".._
-   1a7e0:	0f0000f2 8fffffff 0f0000b0 00ffffff     ................
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+   18b40:	06600188 05000707 095001a1 02010808     ..`.......P.....
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+   18fb0:	0c00297a fe00100c 102029da 01000b11     z).......) .....
+
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+   18ff0:	ffffffff 733e03fd 0030833c 00c500f2     ......>s<.0.....
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 	...
-   1a7fc:	ff000000 00f0ffff fff80b00 00f0ffff     ................
-   1a80c:	fff42f00 002022fd ffe0cf00 0000c2ff     ./..." .........
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+   1a6ec:	00ffffff 00ff8f00 00ff0800 008d0000     ................
 	...
-   1a878:	0000008d 00ff0800 8f000000 cf0000ff     ................
-   1a888:	01ffffff ffffff50 fff706ff 00ffffff     ....P...........
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-   1a8a8:	006002ff 00ff9f00 09000000 000000ff     ..`.............
-   1a8b8:	009e0000 00000000 00000000 00000000     ................
-   1a8c8:	00100600 00000000 d21f0000 00000000     ................
-   1a8d8:	0300008d 000010ee 0a00ff08 00b02fb1     ............./..
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-   1a8f8:	fffffff9 0df706ff ffffbdc0 ae00ffff     ................
-   1a908:	ff9ff009 00ffffff 8ff009ae ffffffff     ................
-   1a918:	c00df706 ffffdfad 5f5002ff 0000e960     ..........P_`...
-   1a928:	0500ff8f 00f406fc 00ff0800 b02fb10a     ............../.
-   1a938:	8d000000 ee020000 00000010 1f000000     ................
-   1a948:	000000d2 00000000 8f001006 ffffffff     ................
-   1a958:	fff8ffff fffffffc ffffffff ffff2f20     ............ /..
-   1a968:	fcffffff ffff0c00 ffffffee feff2f20     ............ /..
-   1a978:	ffffef22 e2fffffc ffff2e00 20fe4efe     "............N. 
-   1a988:	ffff0200 00c202e2 ffff0000 00000020     ............ ...
-   1a998:	ffff0000 00000000 ffff0000 ffffffff     ................
-   1a9a8:	8fffffff ffffffff 00f8ffff 00000000     ................
-   1a9b8:	010030ff 0040ffcc 40ffff2d ffffef03     .0....@.-..@....
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-   1a9e8:	40ffffff ffffff4f ffef0340 2e0040ff     ...@O...@....@..
-   1a9f8:	0030ffff 0000cc01 00000000 00000000     ..0.............
-   1aa08:	918f0000 00000000 70ffff00 00000000     ...........p....
-   1aa18:	40fdffff ff000000 10faffff ffff0000     ...@............
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-   1aa48:	fffffffd b2ffffff ffffffff ff00d5ff     ................
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-   1aa68:	00000040 0070ffff 8e000000 000000a1     @.....p.........
+   1a708:	0000008d 00ff0800 8f000000 cf0000ff     ................
+   1a718:	01ffffff ffffff50 fff706ff 00ffffff     ....P...........
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+   1a738:	006002ff 00ff9f00 09000000 000000ff     ..`.............
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+   1a768:	0300008d 000010ee 0a00ff08 00b02fb1     ............./..
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+   1a7b8:	0500ff8f 00f406fc 00ff0800 b02fb10a     ............../.
+   1a7c8:	8d000000 ee020000 00000010 1f000000     ................
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+   1a7e8:	fff8ffff fffffffc ffffffff ffff2f20     ............ /..
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+   1a808:	ffffef22 e2fffffc ffff2e00 20fe4efe     "............N. 
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+   1a838:	8fffffff ffffffff 00f8ffff 00000000     ................
+   1a848:	010030ff 0040ffcc 40ffff2d ffffef03     .0....@.-..@....
+   1a858:	ffff3f40 ffff44ff ff9fffff ffffffff     @?...D..........
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+   1a878:	40ffffff ffffff4f ffef0340 2e0040ff     ...@O...@....@..
+   1a888:	0030ffff 0000cc01 00000000 00000000     ..0.............
+   1a898:	918f0000 00000000 70ffff00 00000000     ...........p....
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+   1a8f8:	00000040 0070ffff 8e000000 000000a1     @.....p.........
 	...
-   1aa88:	00f8ff8f fff8ff8f ff00ffff ffffffff     ................
-   1aa98:	ffff00ff ffffffff ffffff00 00ffffff     ................
-   1aaa8:	ffffffff ff00ffff ffffffff ffff00ff     ................
-   1aab8:	ffffffff ffffff00 00ffffff ffffffff     ................
-   1aac8:	ff00ffff ffffffff ffff00ff ffffffff     ................
-   1aad8:	ffffff00 00ffffff 7fffffff 7f00f7ff     ................
-   1aae8:	ff8ff7ff ffffffff fffffff8 ffffffff     ................
-   1aaf8:	ffffffff ffffffff ffffffff ffffffff     ................
-   1ab08:	ffffffff ffffffff ffffffff ffffffff     ................
-   1ab18:	ffffffff ffffffff ffffffff ffffffff     ................
-   1ab28:	ffffffff ffffffff ffffffff ffffffff     ................
-   1ab38:	ffffffff ffffffff ffffffff ffff8fff     ................
-   1ab48:	f8ffffff 00000000 0010cc00 d2ffff03     ................
-   1ab58:	ffff0400 ff0430fe 04f4ffff ffffffff     .....0..........
-   1ab68:	ffffff54 fffff9ff ffffffff ffffffff     T...............
-   1ab78:	ffffffff fffffff9 ffff44ff ff04f3ff     .........D......
-   1ab88:	0430feff 00d2ffff 10ccff04 00ff0300     ..0.............
-   1ab98:	00000000 2d000000 000000d2 ef010000     .......-........
-   1aba8:	000010fe ff1d0000 0000d1ff ffcf0000     ................
-   1abb8:	0000fcff ffff0b00 00b0ffff ffffaf00     ................
-   1abc8:	00faffff ffffff09 90ffffff ffffff0f     ................
-   1abd8:	f0ffffff ffffff08 80ffffff 00000000     ................
-   1abe8:	00000000 ffffff0c c0ffffff ffffff0f     ................
-   1abf8:	f0ffffff ffffff0f f0ffffff ffffff0c     ................
-   1ac08:	c0ffffff 1a000000 01000040 0000f0df     ........@.......
-   1ac18:	00a0ff1d 00fadf01 a0ff1d00 fadf0100     ................
-   1ac28:	ff0c0000 0d0000a0 000080ff 00f8df01     ................
-   1ac38:	ff1d0000 01000080 0000f8df 80ff1d00     ................
-   1ac48:	df010000 000000f0 a104501b 0f000000     .........P......
-   1ac58:	000010fd 00d1ff0a fdaf0000 0a000010     ................
-   1ac68:	0000d1ff 10fdaf00 ff0a0000 080000c0     ................
-   1ac78:	0000d0ff 0010fd8f 00d1ff08 10fd8f00     ................
-   1ac88:	d1ff0800 fd0f0000 05000010 000000b1     ................
-   1ac98:	ff040000 00000040 80ff0800 00000000     ....@...........
-   1aca8:	0080ff08 08000000 000080ff ff080000     ................
-   1acb8:	48000080 c8ff8c88 ffff8488 ffffffff     ...H............
-   1acc8:	ffffffff ffffffff ff8c8848 008488c8     ........H.......
-   1acd8:	80ff0800 00000000 0080ff08 08000000     ................
-   1ace8:	000080ff ff080000 00000080 40ff0400     ...............@
-   1acf8:	44140000 44444444 ffffef41 feffffff     ...DDDDDA.......
-   1ad08:	ffffffff 7bffffff bbbbbbbb 0000b7bb     .......{........
-   1ad18:	daffad05 00000050 88fcdf04 0040fdcf     ....P.........@.
-   1ad28:	40fe7f00 f7ef0400 f4ff0700 4f809e00     ...@...........O
-   1ad38:	ff4f70ff f8af00c0 dff4ff0c ff9a80ff     .pO.............
-   1ad48:	fdff08fe ef80ffdf ff08feff c0ff4ffd     .............O..
-   1ad58:	0cf8ff8f ff07f4ff 80ee08f4 0070ff4f     ............O.p.
-   1ad68:	0040fe7f 00f8ef04 fcdf0400 40fdcf88     ..@............@
-   1ad78:	05000000 50daffad 208c0000 00000000     .......P... ....
-   1ad88:	00000000 0000e4df 00000000 ff1b0000     ................
-   1ad98:	fddf4980 000000a5 ffff7f00 d4ff8cd8     .I..............
-   1ada8:	04000000 0000f8ef 0070ff4e ff1c0000     ........N.p.....
-   1adb8:	ff04e869 e30400f7 fffe9f00 40ffcf80     i..............@
-   1adc8:	0570ff0d 8fe0ffff ff0dd0ff ff2d00f7     ..p...........-.
-   1add8:	d0ff8fe0 00fcff04 cff8af00 7f0030ff     .............0..
-   1ade8:	060040ff 00f7ffff f4ff0800 ff3e0000     .@............>.
-   1adf8:	000000a0 82c8ff4d 00f7bf01 5a000000     ....M..........Z
-   1ae08:	0810fcdf 0000a0ff 00000000 fd4e0000     ..............N.
+   1a918:	00f8ff8f fff8ff8f ff00ffff ffffffff     ................
+   1a928:	ffff00ff ffffffff ffffff00 00ffffff     ................
+   1a938:	ffffffff ff00ffff ffffffff ffff00ff     ................
+   1a948:	ffffffff ffffff00 00ffffff ffffffff     ................
+   1a958:	ff00ffff ffffffff ffff00ff ffffffff     ................
+   1a968:	ffffff00 00ffffff 7fffffff 7f00f7ff     ................
+   1a978:	ff8ff7ff ffffffff fffffff8 ffffffff     ................
+   1a988:	ffffffff ffffffff ffffffff ffffffff     ................
+   1a998:	ffffffff ffffffff ffffffff ffffffff     ................
+   1a9a8:	ffffffff ffffffff ffffffff ffffffff     ................
+   1a9b8:	ffffffff ffffffff ffffffff ffffffff     ................
+   1a9c8:	ffffffff ffffffff ffffffff ffff8fff     ................
+   1a9d8:	f8ffffff 00000000 0010cc00 d2ffff03     ................
+   1a9e8:	ffff0400 ff0430fe 04f4ffff ffffffff     .....0..........
+   1a9f8:	ffffff54 fffff9ff ffffffff ffffffff     T...............
+   1aa08:	ffffffff fffffff9 ffff44ff ff04f3ff     .........D......
+   1aa18:	0430feff 00d2ffff 10ccff04 00ff0300     ..0.............
+   1aa28:	00000000 2d000000 000000d2 ef010000     .......-........
+   1aa38:	000010fe ff1d0000 0000d1ff ffcf0000     ................
+   1aa48:	0000fcff ffff0b00 00b0ffff ffffaf00     ................
+   1aa58:	00faffff ffffff09 90ffffff ffffff0f     ................
+   1aa68:	f0ffffff ffffff08 80ffffff 00000000     ................
+   1aa78:	00000000 ffffff0c c0ffffff ffffff0f     ................
+   1aa88:	f0ffffff ffffff0f f0ffffff ffffff0c     ................
+   1aa98:	c0ffffff 1a000000 01000040 0000f0df     ........@.......
+   1aaa8:	00a0ff1d 00fadf01 a0ff1d00 fadf0100     ................
+   1aab8:	ff0c0000 0d0000a0 000080ff 00f8df01     ................
+   1aac8:	ff1d0000 01000080 0000f8df 80ff1d00     ................
+   1aad8:	df010000 000000f0 a104501b 0f000000     .........P......
+   1aae8:	000010fd 00d1ff0a fdaf0000 0a000010     ................
+   1aaf8:	0000d1ff 10fdaf00 ff0a0000 080000c0     ................
+   1ab08:	0000d0ff 0010fd8f 00d1ff08 10fd8f00     ................
+   1ab18:	d1ff0800 fd0f0000 05000010 000000b1     ................
+   1ab28:	ff040000 00000040 80ff0800 00000000     ....@...........
+   1ab38:	0080ff08 08000000 000080ff ff080000     ................
+   1ab48:	48000080 c8ff8c88 ffff8488 ffffffff     ...H............
+   1ab58:	ffffffff ffffffff ff8c8848 008488c8     ........H.......
+   1ab68:	80ff0800 00000000 0080ff08 08000000     ................
+   1ab78:	000080ff ff080000 00000080 40ff0400     ...............@
+   1ab88:	44140000 44444444 ffffef41 feffffff     ...DDDDDA.......
+   1ab98:	ffffffff 7bffffff bbbbbbbb 0000b7bb     .......{........
+   1aba8:	daffad05 00000050 88fcdf04 0040fdcf     ....P.........@.
+   1abb8:	40fe7f00 f7ef0400 f4ff0700 4f809e00     ...@...........O
+   1abc8:	ff4f70ff f8af00c0 dff4ff0c ff9a80ff     .pO.............
+   1abd8:	fdff08fe ef80ffdf ff08feff c0ff4ffd     .............O..
+   1abe8:	0cf8ff8f ff07f4ff 80ee08f4 0070ff4f     ............O.p.
+   1abf8:	0040fe7f 00f8ef04 fcdf0400 40fdcf88     ..@............@
+   1ac08:	05000000 50daffad 208c0000 00000000     .......P... ....
+   1ac18:	00000000 0000e4df 00000000 ff1b0000     ................
+   1ac28:	fddf4980 000000a5 ffff7f00 d4ff8cd8     .I..............
+   1ac38:	04000000 0000f8ef 0070ff4e ff1c0000     ........N.p.....
+   1ac48:	ff04e869 e30400f7 fffe9f00 40ffcf80     i..............@
+   1ac58:	0570ff0d 8fe0ffff ff0dd0ff ff2d00f7     ..p...........-.
+   1ac68:	d0ff8fe0 00fcff04 cff8af00 7f0030ff     .............0..
+   1ac78:	060040ff 00f7ffff f4ff0800 ff3e0000     .@............>.
+   1ac88:	000000a0 82c8ff4d 00f7bf01 5a000000     ....M..........Z
+   1ac98:	0810fcdf 0000a0ff 00000000 fd4e0000     ..............N.
 	...
-   1ae20:	0000c802 d22d0000 00000000 00000000     ......-.........
-   1ae30:	0000fbbf 00000000 ffff0500 00000050     ............P...
-   1ae40:	0d000000 00d0ffff 00000000 ffff7f00     ................
-   1ae50:	000000f7 ff010000 10ff8dd8 00000000     ................
-   1ae60:	0aa0ff0a 0000a0ff ff3f0000 f3ff0bb0     ..........?.....
-   1ae70:	00000000 0cc0ffcf 0000fcff ffff0500     ................
-   1ae80:	ffff0dd0 0e000050 9ff9ffff 00e0ffff     ....P...........
-   1ae90:	ffff8f00 ffff2ee2 ff0200f8 0990ffff     ................
-   1aea0:	10ffffff ffffff0a ffff3ee3 ff0fa0ff     .........>......
-   1aeb0:	ffffffff f0ffffff ffffff08 ffffffff     ................
-   1aec0:	000080ff 00000000 00000000 00000000     ................
-   1aed0:	000000d8 00000000 ffff80ff ff070070     ............p...
-   1aee0:	fffff8ff ff6f00f6 8e78fdff e8ff15ff     ......o...x.....
-   1aef0:	0200e2ff 20fe4fe5 000020fe 00f3ff13     .....O. . ......
-   1af00:	00000052 0031ff3f 02000052 205ef4ef     R...?.1.R.....^ 
-   1af10:	8e7820fe e8ff51ff ffffe2ff ff6f00f6     . x..Q........o.
-   1af20:	fffffdff ff070070 0000f8ff 00000000     ....p...........
-   1af30:	000080ff 00000000 000000d8 00000000     ................
+   1acb0:	0000c802 d22d0000 00000000 00000000     ......-.........
+   1acc0:	0000fbbf 00000000 ffff0500 00000050     ............P...
+   1acd0:	0d000000 00d0ffff 00000000 ffff7f00     ................
+   1ace0:	000000f7 ff010000 10ff8dd8 00000000     ................
+   1acf0:	0aa0ff0a 0000a0ff ff3f0000 f3ff0bb0     ..........?.....
+   1ad00:	00000000 0cc0ffcf 0000fcff ffff0500     ................
+   1ad10:	ffff0dd0 0e000050 9ff9ffff 00e0ffff     ....P...........
+   1ad20:	ffff8f00 ffff2ee2 ff0200f8 0990ffff     ................
+   1ad30:	10ffffff ffffff0a ffff3ee3 ff0fa0ff     .........>......
+   1ad40:	ffffffff f0ffffff ffffff08 ffffffff     ................
+   1ad50:	000080ff 00000000 00000000 00000000     ................
+   1ad60:	000000d8 00000000 ffff80ff ff070070     ............p...
+   1ad70:	fffff8ff ff6f00f6 8e78fdff e8ff15ff     ......o...x.....
+   1ad80:	0200e2ff 20fe4fe5 000020fe 00f3ff13     .....O. . ......
+   1ad90:	00000052 0031ff3f 02000052 205ef4ef     R...?.1.R.....^ 
+   1ada0:	8e7820fe e8ff51ff ffffe2ff ff6f00f6     . x..Q........o.
+   1adb0:	fffffdff ff070070 0000f8ff 00000000     ....p...........
+   1adc0:	000080ff 00000000 000000d8 00000000     ................
 	...
-   1af48:	01000000 000010dd ff1d0000 000000d1     ................
-   1af58:	fdffdf01 1d000010 d1ff99ff f9df0100     ................
-   1af68:	10fd9f00 0090ff1d bfd1ff09 000000f9     ................
-   1af78:	905ffb9f 09000000 000000f5 00000000     .._.............
-   1af88:	00000000 5f000000 00000090 f9bff509     ......._........
-   1af98:	9f000000 90ff1dfb d1ff0900 00f9df01     ................
-   1afa8:	0010fd9f ff99ff1d 010000d1 10fdffdf     ................
-   1afb8:	1d000000 0000d1ff dd010000 00000010     ................
+   1add8:	01000000 000010dd ff1d0000 000000d1     ................
+   1ade8:	fdffdf01 1d000010 d1ff99ff f9df0100     ................
+   1adf8:	10fd9f00 0090ff1d bfd1ff09 000000f9     ................
+   1ae08:	905ffb9f 09000000 000000f5 00000000     .._.............
+   1ae18:	00000000 5f000000 00000090 f9bff509     ......._........
+   1ae28:	9f000000 90ff1dfb d1ff0900 00f9df01     ................
+   1ae38:	0010fd9f ff99ff1d 010000d1 10fdffdf     ................
+   1ae48:	1d000000 0000d1ff dd010000 00000010     ................
 	...
-   1afd8:	00d11d00 00000000 df010000 ffef10fd     ................
-   1afe8:	00d0ffff d1ffff1d ffffffaf cfcf00f0     ................
-   1aff8:	0000fcfc 00f00f00 b6f11f6b 0f000000     ........k.......
-   1b008:	0f0000f0 000000f0 00f00f00 00f00f00     ................
-   1b018:	0f000000 0f0000f0 000000f0 b6f11f6b     ............k...
-   1b028:	00f00f00 cfcf0000 0f00fcfc faffffff     ................
-   1b038:	d1ffff1d ffff0d00 df01feff 000010fd     ................
-   1b048:	00000000 00d11d00 00000000 00000000     ................
-   1b058:	ff8f0000 0000e2ff ffff0000 0020feff     .............. .
-   1b068:	ffff0000 ffffffff fffff8ff ffffffff     ................
-   1b078:	ffffffff ffffffff ffffffff ffffffff     ................
-   1b088:	ffffffff ffffffff ffffffff ffffffff     ................
-   1b098:	ffffffff ffffffff ffffffff ffffffff     ................
-   1b0a8:	ffffffff ffffffff ff8fffff ffffffff     ................
-   1b0b8:	0000f8ff 00b00b00 00000000 00fbbf00     ................
-   1b0c8:	00000000 b0ffff0b 00000000 fbffffbf     ................
-   1b0d8:	0b000000 ffffffff 4f0000b0 ffffffff     ...........O....
-   1b0e8:	000000f4 00ffff00 00000000 00ffff00     ................
-   1b0f8:	00000000 00ffff00 00000000 00ffff00     ................
-   1b108:	00000000 00ffff00 ffdf0000 0ffddff0     ................
-   1b118:	fffffdff 9f0000f9 ffffffff ffffffff     ................
-   1b128:	ffffffff f0ffffff ffdfffe0 ffffffff     ................
-   1b138:	0000fdff 00000000 00000000 00000000     ................
-   1b148:	0062ea0a 00000000 f0ffff02 00000000     ..b.............
-   1b158:	ffff9f00 00000000 ffff0f00 000000d0     ................
-   1b168:	ffff0200 000000fb ef030000 000070ff     .............p..
-   1b178:	04000000 0000f2ff 00000000 0000fbbf     ................
-   1b188:	00000000 0030ff6f 00000200 0090ff4f     ....o.0.....O...
-   1b198:	00f38f02 00d0ff6f e4ffff0a 00d1ffbf     ....o...........
-   1b1a8:	ffffef00 00d1ffff ffff0a00 0090ffff     ................
-   1b1b8:	ff6f0000 0030fbff ff020000 000072db     ..o...0......r..
-   1b1c8:	08000000 000080ee ff086106 2d0080ff     .........a.....-
-   1b1d8:	33efd0ff ff2e00fe 3ff30ef3 f3ff2ee0     ...3.......?....
-   1b1e8:	ffff8f00 00f3ff6e ffff8e00 0000f3ff     ....n...........
-   1b1f8:	ffef0200 000000f3 ffff2e00 08000030     ............0...
-   1b208:	ffffffef ff080030 ffeff6ff 33ef0030     ....0.......0..3
-   1b218:	ffef02fe 3ff30e30 ffef02e0 f8ff8f30     ....0..?....0...
-   1b228:	fddf0200 00e88e00 10660000 ffdf0000     ..........f.....
-   1b238:	00200dff ffffff00 0000e20f 0fffffff     .. .............
-   1b248:	fff0dffd 0020ffff fffff0ff ffffffff     ...... .........
-   1b258:	fffffff0 f0ffffff ffffffff fff0ffff     ................
-   1b268:	ffffffff fffff0ff ffffffff fffffff0     ................
-   1b278:	f0ffffff ffffffff fff0ffff ffffffff     ................
-   1b288:	ffdff0ff fffdffff 000000f9 ffff0000     ................
-   1b298:	00ffffff ffffdf00 0000fdff ffffff8f     ................
-   1b2a8:	ff00c2ff ffffffff 00ff20fe ff010000     ......... ......
-   1b2b8:	0000ffe2 fcff0000 000000ff ffffff00     ................
-   1b2c8:	00000000 ffffffff ffffffff ffffffff     ................
-   1b2d8:	ffffffff 11fbffff ffffffbf 1f00f1ff     ................
-   1b2e8:	ffffffff ff1f00f1 fbffffff ffffbf11     ................
-   1b2f8:	ffffffff 8fffffff ffffffff df00f8ff     ................
-   1b308:	0000fdff fcffff01 ff030000 0000f7ff     ................
-   1b318:	f2ffff06 ff080000 0000d0ff ffffff0a     ................
-   1b328:	ff0cd0ff a0ffffff ffffff0e ff0d20ff     ............. ..
-   1b338:	00f8ffff ff0a0000 000000e0 0050ff0e     ..............P.
-   1b348:	fc2f0000 00000000 0000f35f a09f0000     ../....._.......
-   1b358:	00000000 000010df 00d70000 04000000     ................
-   1b368:	000040ee 99ffdf00 0000fdff ff99ffff     .@..............
-   1b378:	ff0000ff ffffffff ffff0000 00000090     ................
-   1b388:	0dffff00 200dffff ff0fffff ffe20fff     ....... ........
-   1b398:	ffff0fff fffffd0f 20ffff0f 0fffff00     ........... ....
-   1b3a8:	ffffffff ff0fffff ffffffff ffff0fff     ................
-   1b3b8:	ffdfffff ffffff0f 0f0000ff ffffffff     ................
-   1b3c8:	ff0f0000 00ffffff ffff0d00 0000fdff     ................
-   1b3d8:	0000cc00 02000000 000030ff ffbf0100     .........0......
-   1b3e8:	000020fc ffffff1e 9f0000e1 f8ffffff     . ..............
-   1b3f8:	ffef0000 00fdffff ffffff00 0100ffff     ................
-   1b408:	ffffffff ff0300ff ffffffff ffff0830     ............0...
-   1b418:	80ffffff ffffff1e cfe1ffff ffffffff     ................
-   1b428:	ffcffcff ffffffff 000000fc 00000000     ................
-   1b438:	ff0e0000 000000e0 40ee0400 ff8f0000     ...........@....
-   1b448:	ffffffff fff8ffff ffffffff ffffffff     ................
-   1b458:	0ff000ff 000ff000 f000ffff 0ff0000f     ................
-   1b468:	ffffff00 ffffffff ffffffff 888008f8     ................
-   1b478:	ff8f8008 8008f8ff 8f800888 ffffffff     ................
-   1b488:	ffffffff 00ffffff 000000f0 ffff000f     ................
-   1b498:	0000f000 ff000f00 ffffffff ffffffff     ................
-   1b4a8:	ffff8fff ffffffff 0000f8ff 00000000     ................
+   1ae68:	00d11d00 00000000 df010000 ffef10fd     ................
+   1ae78:	00d0ffff d1ffff1d ffffffaf cfcf00f0     ................
+   1ae88:	0000fcfc 00f00f00 b6f11f6b 0f000000     ........k.......
+   1ae98:	0f0000f0 000000f0 00f00f00 00f00f00     ................
+   1aea8:	0f000000 0f0000f0 000000f0 b6f11f6b     ............k...
+   1aeb8:	00f00f00 cfcf0000 0f00fcfc faffffff     ................
+   1aec8:	d1ffff1d ffff0d00 df01feff 000010fd     ................
+   1aed8:	00000000 00d11d00 00000000 00000000     ................
+   1aee8:	ff8f0000 0000e2ff ffff0000 0020feff     .............. .
+   1aef8:	ffff0000 ffffffff fffff8ff ffffffff     ................
+   1af08:	ffffffff ffffffff ffffffff ffffffff     ................
+   1af18:	ffffffff ffffffff ffffffff ffffffff     ................
+   1af28:	ffffffff ffffffff ffffffff ffffffff     ................
+   1af38:	ffffffff ffffffff ff8fffff ffffffff     ................
+   1af48:	0000f8ff 00b00b00 00000000 00fbbf00     ................
+   1af58:	00000000 b0ffff0b 00000000 fbffffbf     ................
+   1af68:	0b000000 ffffffff 4f0000b0 ffffffff     ...........O....
+   1af78:	000000f4 00ffff00 00000000 00ffff00     ................
+   1af88:	00000000 00ffff00 00000000 00ffff00     ................
+   1af98:	00000000 00ffff00 ffdf0000 0ffddff0     ................
+   1afa8:	fffffdff 9f0000f9 ffffffff ffffffff     ................
+   1afb8:	ffffffff f0ffffff ffdfffe0 ffffffff     ................
+   1afc8:	0000fdff 00000000 00000000 00000000     ................
+   1afd8:	0062ea0a 00000000 f0ffff02 00000000     ..b.............
+   1afe8:	ffff9f00 00000000 ffff0f00 000000d0     ................
+   1aff8:	ffff0200 000000fb ef030000 000070ff     .............p..
+   1b008:	04000000 0000f2ff 00000000 0000fbbf     ................
+   1b018:	00000000 0030ff6f 00000200 0090ff4f     ....o.0.....O...
+   1b028:	00f38f02 00d0ff6f e4ffff0a 00d1ffbf     ....o...........
+   1b038:	ffffef00 00d1ffff ffff0a00 0090ffff     ................
+   1b048:	ff6f0000 0030fbff ff020000 000072db     ..o...0......r..
+   1b058:	08000000 000080ee ff086106 2d0080ff     .........a.....-
+   1b068:	33efd0ff ff2e00fe 3ff30ef3 f3ff2ee0     ...3.......?....
+   1b078:	ffff8f00 00f3ff6e ffff8e00 0000f3ff     ....n...........
+   1b088:	ffef0200 000000f3 ffff2e00 08000030     ............0...
+   1b098:	ffffffef ff080030 ffeff6ff 33ef0030     ....0.......0..3
+   1b0a8:	ffef02fe 3ff30e30 ffef02e0 f8ff8f30     ....0..?....0...
+   1b0b8:	fddf0200 00e88e00 10660000 ffdf0000     ..........f.....
+   1b0c8:	00200dff ffffff00 0000e20f 0fffffff     .. .............
+   1b0d8:	fff0dffd 0020ffff fffff0ff ffffffff     ...... .........
+   1b0e8:	fffffff0 f0ffffff ffffffff fff0ffff     ................
+   1b0f8:	ffffffff fffff0ff ffffffff fffffff0     ................
+   1b108:	f0ffffff ffffffff fff0ffff ffffffff     ................
+   1b118:	ffdff0ff fffdffff 000000f9 ffff0000     ................
+   1b128:	00ffffff ffffdf00 0000fdff ffffff8f     ................
+   1b138:	ff00c2ff ffffffff 00ff20fe ff010000     ......... ......
+   1b148:	0000ffe2 fcff0000 000000ff ffffff00     ................
+   1b158:	00000000 ffffffff ffffffff ffffffff     ................
+   1b168:	ffffffff 11fbffff ffffffbf 1f00f1ff     ................
+   1b178:	ffffffff ff1f00f1 fbffffff ffffbf11     ................
+   1b188:	ffffffff 8fffffff ffffffff df00f8ff     ................
+   1b198:	0000fdff fcffff01 ff030000 0000f7ff     ................
+   1b1a8:	f2ffff06 ff080000 0000d0ff ffffff0a     ................
+   1b1b8:	ff0cd0ff a0ffffff ffffff0e ff0d20ff     ............. ..
+   1b1c8:	00f8ffff ff0a0000 000000e0 0050ff0e     ..............P.
+   1b1d8:	fc2f0000 00000000 0000f35f a09f0000     ../....._.......
+   1b1e8:	00000000 000010df 00d70000 04000000     ................
+   1b1f8:	000040ee 99ffdf00 0000fdff ff99ffff     .@..............
+   1b208:	ff0000ff ffffffff ffff0000 00000090     ................
+   1b218:	0dffff00 200dffff ff0fffff ffe20fff     ....... ........
+   1b228:	ffff0fff fffffd0f 20ffff0f 0fffff00     ........... ....
+   1b238:	ffffffff ff0fffff ffffffff ffff0fff     ................
+   1b248:	ffdfffff ffffff0f 0f0000ff ffffffff     ................
+   1b258:	ff0f0000 00ffffff ffff0d00 0000fdff     ................
+   1b268:	0000cc00 02000000 000030ff ffbf0100     .........0......
+   1b278:	000020fc ffffff1e 9f0000e1 f8ffffff     . ..............
+   1b288:	ffef0000 00fdffff ffffff00 0100ffff     ................
+   1b298:	ffffffff ff0300ff ffffffff ffff0830     ............0...
+   1b2a8:	80ffffff ffffff1e cfe1ffff ffffffff     ................
+   1b2b8:	ffcffcff ffffffff 000000fc 00000000     ................
+   1b2c8:	ff0e0000 000000e0 40ee0400 ff8f0000     ...........@....
+   1b2d8:	ffffffff fff8ffff ffffffff ffffffff     ................
+   1b2e8:	0ff000ff 000ff000 f000ffff 0ff0000f     ................
+   1b2f8:	ffffff00 ffffffff ffffffff 888008f8     ................
+   1b308:	ff8f8008 8008f8ff 8f800888 ffffffff     ................
+   1b318:	ffffffff 00ffffff 000000f0 ffff000f     ................
+   1b328:	0000f000 ff000f00 ffffffff ffffffff     ................
+   1b338:	ffff8fff ffffffff 0000f8ff 00000000     ................
 	...
-   1b4c0:	70af0300 00000000 ffcf0400 000000f0     ...p............
-   1b4d0:	ffdf0600 0000a0ff ffef1700 0030ffff     ..............0.
-   1b4e0:	ffff1800 00fcffff ffff2a00 f4ffffff     .........*......
-   1b4f0:	ffff0800 ffffffff ff0f00d0 ffffffff     ................
-   1b500:	080060ff ffffffff 0000feff 00000000     .`..............
-   1b510:	00f7ffff 00000000 f1ffff00 00000000     ................
-   1b520:	ffff0000 00000080 ff000000 000010ff     ................
-   1b530:	00000000 0000faff 00000000 00f2ff00     ................
-   1b540:	00000000 808f0000 00000000 00000000     ................
-   1b550:	00000000 f0ffffdf ffff00d2 20fef0ff     ............... 
-   1b560:	f0ffffff ffffe2ff fdfff0ff f2ffffff     ................
-   1b570:	ffff0000 ffffffff ffffffff ffffffff     ................
-   1b580:	ffffffff ffffffff ffffffff ffffffff     ................
-   1b590:	ffffffff ffffffff ffffffff ffffffff     ................
-   1b5a0:	ffffffff ffffffff ffffffff ffdfffff     ................
-   1b5b0:	fdffffff 00000000 00000000 00000000     ................
-   1b5c0:	feef9c04 000040c9 ffef0700 feffffff     .....@..........
-   1b5d0:	df040070 8aa8fcff 40fdffcf 00d5ff6f     p..........@o...
-   1b5e0:	5d000000 f6cff6ff 00000000 fc6f0000     ...]..........o.
-   1b5f0:	5a00301a 00a5fddf 0000a103 ffffff4d     .0.Z........M...
-   1b600:	0000d4ff feff0500 ffef8aa8 01000050     ............P...
-   1b610:	000070df 0010fd07 00120000 21000000     .p.............!
-   1b620:	00000000 e44e0000 00000000 00000000     ......N.........
-   1b630:	0000feef 00000000 feef0000 00000000     ................
-   1b640:	00000000 0000e44e ff8f0000 ffffffff     ....N...........
-   1b650:	80ffffff ffffffff ffffffff 00fff0ff     ................
-   1b660:	00000000 fd0f0000 ffff0fff ffffffff     ................
-   1b670:	0fffff0f ffffffff ff00ffff ffff0fff     ................
-   1b680:	ffffffff 0fffff00 ffffffff ff0fffff     ................
-   1b690:	000000ff 00000000 fffffd0f ffffffff     ................
-   1b6a0:	f0ffffff ffffff8f ffffffff ff8f80ff     ................
-   1b6b0:	ffffffff 80ffffff ffffffff ffffffff     ................
-   1b6c0:	00fff0ff 00000000 fd0f0000 ffff0fff     ................
-   1b6d0:	00f0ffff 0fffff0f ffffffff ff0000f0     ................
-   1b6e0:	ffff0fff 00f0ffff 0fffff00 ffffffff     ................
-   1b6f0:	ff0f00f0 000000ff 00000000 fffffd0f     ................
-   1b700:	ffffffff f0ffffff ffffff8f ffffffff     ................
-   1b710:	ff8f80ff ffffffff 80ffffff ffffffff     ................
-   1b720:	ffffffff 00fff0ff 00000000 fd0f0000     ................
-   1b730:	ffff0fff 000000ff 0fffff0f 00ffffff     ................
-   1b740:	ff000000 ffff0fff 000000ff 0fffff00     ................
-   1b750:	00ffffff ff0f0000 000000ff 00000000     ................
-   1b760:	fffffd0f ffffffff f0ffffff ffffff8f     ................
-   1b770:	ffffffff ff8f80ff ffffffff 80ffffff     ................
-   1b780:	ffffffff ffffffff 00fff0ff 00000000     ................
-   1b790:	fd0f0000 f0ff0fff 00000000 0fffff0f     ................
-   1b7a0:	0000f0ff ff000000 f0ff0fff 00000000     ................
-   1b7b0:	0fffff00 0000f0ff ff0f0000 000000ff     ................
-   1b7c0:	00000000 fffffd0f ffffffff f0ffffff     ................
-   1b7d0:	ffffff8f ffffffff ff8f80ff ffffffff     ................
-   1b7e0:	80ffffff ffffffff ffffffff 00fff0ff     ................
-   1b7f0:	00000000 fd0f0000 000000ff 00000000     ................
-   1b800:	00ffff0f 00000000 ff000000 000000ff     ................
-   1b810:	00000000 00ffff00 00000000 ff0f0000     ................
-   1b820:	000000ff 00000000 fffffd0f ffffffff     ................
-   1b830:	f0ffffff ffffff8f ffffffff 000080ff     ................
-   1b840:	01000000 00000000 00000000 10fd0700     ................
-   1b850:	00000000 cf010000 0000f5ff 00000000     ................
-   1b860:	fe29b900 00000010 3f000000 00000210     ..)........?....
-   1b870:	df030000 00900a80 70030000 77ffdf00     ...........p...w
-   1b880:	555555f7 0fd38f55 dfccfdff cdccccdc     .UUUU...........
-   1b890:	fe8fb0ff 00aa0010 404d0000 00104600     ..........M@.F..
-   1b8a0:	3302f201 00000010 09000000 00f9cfb1     ...3............
-   1b8b0:	00000000 ff0a0000 000090ff 00000000     ................
-   1b8c0:	f9bf0000 00000000 00000000 00002201     ............."..
-   1b8d0:	df180000 020092fd ffeffbef faff0d30     ............0...
-   1b8e0:	4fe0ff2e ff03faff fafa9ff5 cffa4f35     ...O........5O..
-   1b8f0:	0b3d8ac0 03fbeffd fffe8f12 ff06b0ff     ..=.............
-   1b900:	d1ffffff efffff08 9f1011fd 59d1dfff     ...............Y
-   1b910:	affd0b3b 1d38fad7 faff5ffb 0df7df01     ;.....8.._......
-   1b920:	ff1dfaff fcef03f1 0050ffdf a3fedf18     ..........P.....
-   1b930:	7f000000 0000f7ff ffffffef effeffff     ................
-   1b940:	ffffffff 0000feff 00000000 ffff0f00     ................
-   1b950:	f0ffffff ffffff0f 0ff0ffff f9999ff9     ................
-   1b960:	f80ff09f 8ff8888f 8ff80ff0 f08ff888     ................
-   1b970:	888ff80f 0ff08ff8 f8888ff8 f80ff08f     ................
-   1b980:	8ff8888f 8ff80ff0 f08ff888 999ff90f     ................
-   1b990:	0ff09ff9 ffffffff ff08f0ff ffffffff     ................
-   1b9a0:	00000080 7f000000 000000a0 8f000000     ................
-   1b9b0:	0000b0ff 0d000000 00a0ffff 8a000000     ................
-   1b9c0:	00ffff1d 8f000000 70ff1dfa 8f000000     ...........p....
-   1b9d0:	801dfaff 8f000000 00faffff 8f000000     ................
-   1b9e0:	80ffffff 8f000000 80ffffff 8f000000     ................
-   1b9f0:	80ffffff 8f000000 80ffffff 6f000000     ...............o
-   1ba00:	80ffffff 0b000000 80ffffff 00000000     ................
-   1ba10:	80ffffdf 00000000 80ffff0e 00000000     ................
-   1ba20:	60dbde00 00000000 00000000 00000000     ...`............
-   1ba30:	00000000 ffffff1b e4ffffff ffdf0100     ................
-   1ba40:	ffffffff 1d00feff effaffff ffffaffe     ................
-   1ba50:	ffffdf01 0ae22ea0 ff1dffff 02e2ffff     ................
-   1ba60:	ffff2e20 ffffffcf ef0220fe ffcfffff      ........ ......
-   1ba70:	20feffff ffffef02 ffffff1d 2e2002e2     ... .......... .
-   1ba80:	df01ffff 2ea0ffff ffff0ae2 ffff1d00     ................
-   1ba90:	affeeffa 0100ffff ffffffdf feffffff     ................
-   1baa0:	ff1b0000 ffffffff 0800e4ff e4ffffff     ................
-   1bab0:	ffff8f00 f808feff ff400b0f 0b0ff88f     ..........@.....
-   1bac0:	f8ffff40 ff400b0f ffffffff ffffffff     @.....@.........
-   1bad0:	ffffffff ffffffff ffffffff ffffffff     ................
-   1bae0:	ffffffff ffffffff ffffffff ffffffff     ................
-   1baf0:	ffffffff ffffffff ffffffff ffefffff     ................
-   1bb00:	feffffff ffffff4e 0000e4ff 00000000     ....N...........
-   1bb10:	00000100 00000000 00e00300 00001000     ................
-   1bb20:	10ef0200 0000bf00 f17f0000 00f1cf00     ................
-   1bb30:	ff070000 77ffcf11 bf777777 ffffcff1     .......wwww.....
-   1bb40:	ffffffff ffff17ff ffffffff ff07e0ff     ................
-   1bb50:	000000f1 06000000 000010ff 00000000     ................
-   1bb60:	0000a005 00000000                       ........
-
-0001bb68 <kern_class_values>:
-   1bb68:	00000100 00000000 00000100 00000003     ................
-   1bb78:	00000200 00000000 00000000 00000000     ................
-   1bb88:	00010000 00000000 00000000 00000000     ................
-   1bb98:	000c0100 0000fa07 f1f20000 04060c02     ................
-   1bba8:	010d02f6 0008030b 00000000 00000000     ................
-   1bbb8:	020f0000 000000fe 00000000 00000000     ................
-   1bbc8:	f8000500 00000000 0504fb00 00fd0000     ................
-   1bbd8:	fd0003fe fbfffd00 00000000 fd0000fd     ................
-   1bbe8:	fd0000fc 0000fb00 00000000 fd000000     ................
-   1bbf8:	00fc00fd 00e100f9 0500fb00 fb000008     ................
-   1bc08:	05080303 000005fc 000000f1 00000000     ................
-   1bc18:	00000000 000000f7 00000000 00000000     ................
-   1bc28:	f9000000 f600f3fd 000000fe 000a0100     ................
-   1bc38:	01fffef8 0000fc00 0000edfe 00000000     ................
-   1bc48:	00000000 0afeec00 00000000 00000000     ................
-   1bc58:	00000000 000000f6 00000000 08000000     ................
-   1bc68:	00000300 000000fb 00000000 00000000     ................
-   1bc78:	00000000 020a0000 00000001 00000000     ................
+   1b350:	70af0300 00000000 ffcf0400 000000f0     ...p............
+   1b360:	ffdf0600 0000a0ff ffef1700 0030ffff     ..............0.
+   1b370:	ffff1800 00fcffff ffff2a00 f4ffffff     .........*......
+   1b380:	ffff0800 ffffffff ff0f00d0 ffffffff     ................
+   1b390:	080060ff ffffffff 0000feff 00000000     .`..............
+   1b3a0:	00f7ffff 00000000 f1ffff00 00000000     ................
+   1b3b0:	ffff0000 00000080 ff000000 000010ff     ................
+   1b3c0:	00000000 0000faff 00000000 00f2ff00     ................
+   1b3d0:	00000000 808f0000 00000000 00000000     ................
+   1b3e0:	00000000 f0ffffdf ffff00d2 20fef0ff     ............... 
+   1b3f0:	f0ffffff ffffe2ff fdfff0ff f2ffffff     ................
+   1b400:	ffff0000 ffffffff ffffffff ffffffff     ................
+   1b410:	ffffffff ffffffff ffffffff ffffffff     ................
+   1b420:	ffffffff ffffffff ffffffff ffffffff     ................
+   1b430:	ffffffff ffffffff ffffffff ffdfffff     ................
+   1b440:	fdffffff 00000000 00000000 00000000     ................
+   1b450:	feef9c04 000040c9 ffef0700 feffffff     .....@..........
+   1b460:	df040070 8aa8fcff 40fdffcf 00d5ff6f     p..........@o...
+   1b470:	5d000000 f6cff6ff 00000000 fc6f0000     ...]..........o.
+   1b480:	5a00301a 00a5fddf 0000a103 ffffff4d     .0.Z........M...
+   1b490:	0000d4ff feff0500 ffef8aa8 01000050     ............P...
+   1b4a0:	000070df 0010fd07 00120000 21000000     .p.............!
+   1b4b0:	00000000 e44e0000 00000000 00000000     ......N.........
+   1b4c0:	0000feef 00000000 feef0000 00000000     ................
+   1b4d0:	00000000 0000e44e ff8f0000 ffffffff     ....N...........
+   1b4e0:	80ffffff ffffffff ffffffff 00fff0ff     ................
+   1b4f0:	00000000 fd0f0000 ffff0fff ffffffff     ................
+   1b500:	0fffff0f ffffffff ff00ffff ffff0fff     ................
+   1b510:	ffffffff 0fffff00 ffffffff ff0fffff     ................
+   1b520:	000000ff 00000000 fffffd0f ffffffff     ................
+   1b530:	f0ffffff ffffff8f ffffffff ff8f80ff     ................
+   1b540:	ffffffff 80ffffff ffffffff ffffffff     ................
+   1b550:	00fff0ff 00000000 fd0f0000 ffff0fff     ................
+   1b560:	00f0ffff 0fffff0f ffffffff ff0000f0     ................
+   1b570:	ffff0fff 00f0ffff 0fffff00 ffffffff     ................
+   1b580:	ff0f00f0 000000ff 00000000 fffffd0f     ................
+   1b590:	ffffffff f0ffffff ffffff8f ffffffff     ................
+   1b5a0:	ff8f80ff ffffffff 80ffffff ffffffff     ................
+   1b5b0:	ffffffff 00fff0ff 00000000 fd0f0000     ................
+   1b5c0:	ffff0fff 000000ff 0fffff0f 00ffffff     ................
+   1b5d0:	ff000000 ffff0fff 000000ff 0fffff00     ................
+   1b5e0:	00ffffff ff0f0000 000000ff 00000000     ................
+   1b5f0:	fffffd0f ffffffff f0ffffff ffffff8f     ................
+   1b600:	ffffffff ff8f80ff ffffffff 80ffffff     ................
+   1b610:	ffffffff ffffffff 00fff0ff 00000000     ................
+   1b620:	fd0f0000 f0ff0fff 00000000 0fffff0f     ................
+   1b630:	0000f0ff ff000000 f0ff0fff 00000000     ................
+   1b640:	0fffff00 0000f0ff ff0f0000 000000ff     ................
+   1b650:	00000000 fffffd0f ffffffff f0ffffff     ................
+   1b660:	ffffff8f ffffffff ff8f80ff ffffffff     ................
+   1b670:	80ffffff ffffffff ffffffff 00fff0ff     ................
+   1b680:	00000000 fd0f0000 000000ff 00000000     ................
+   1b690:	00ffff0f 00000000 ff000000 000000ff     ................
+   1b6a0:	00000000 00ffff00 00000000 ff0f0000     ................
+   1b6b0:	000000ff 00000000 fffffd0f ffffffff     ................
+   1b6c0:	f0ffffff ffffff8f ffffffff 000080ff     ................
+   1b6d0:	01000000 00000000 00000000 10fd0700     ................
+   1b6e0:	00000000 cf010000 0000f5ff 00000000     ................
+   1b6f0:	fe29b900 00000010 3f000000 00000210     ..)........?....
+   1b700:	df030000 00900a80 70030000 77ffdf00     ...........p...w
+   1b710:	555555f7 0fd38f55 dfccfdff cdccccdc     .UUUU...........
+   1b720:	fe8fb0ff 00aa0010 404d0000 00104600     ..........M@.F..
+   1b730:	3302f201 00000010 09000000 00f9cfb1     ...3............
+   1b740:	00000000 ff0a0000 000090ff 00000000     ................
+   1b750:	f9bf0000 00000000 00000000 00002201     ............."..
+   1b760:	df180000 020092fd ffeffbef faff0d30     ............0...
+   1b770:	4fe0ff2e ff03faff fafa9ff5 cffa4f35     ...O........5O..
+   1b780:	0b3d8ac0 03fbeffd fffe8f12 ff06b0ff     ..=.............
+   1b790:	d1ffffff efffff08 9f1011fd 59d1dfff     ...............Y
+   1b7a0:	affd0b3b 1d38fad7 faff5ffb 0df7df01     ;.....8.._......
+   1b7b0:	ff1dfaff fcef03f1 0050ffdf a3fedf18     ..........P.....
+   1b7c0:	7f000000 0000f7ff ffffffef effeffff     ................
+   1b7d0:	ffffffff 0000feff 00000000 ffff0f00     ................
+   1b7e0:	f0ffffff ffffff0f 0ff0ffff f9999ff9     ................
+   1b7f0:	f80ff09f 8ff8888f 8ff80ff0 f08ff888     ................
+   1b800:	888ff80f 0ff08ff8 f8888ff8 f80ff08f     ................
+   1b810:	8ff8888f 8ff80ff0 f08ff888 999ff90f     ................
+   1b820:	0ff09ff9 ffffffff ff08f0ff ffffffff     ................
+   1b830:	00000080 7f000000 000000a0 8f000000     ................
+   1b840:	0000b0ff 0d000000 00a0ffff 8a000000     ................
+   1b850:	00ffff1d 8f000000 70ff1dfa 8f000000     ...........p....
+   1b860:	801dfaff 8f000000 00faffff 8f000000     ................
+   1b870:	80ffffff 8f000000 80ffffff 8f000000     ................
+   1b880:	80ffffff 8f000000 80ffffff 6f000000     ...............o
+   1b890:	80ffffff 0b000000 80ffffff 00000000     ................
+   1b8a0:	80ffffdf 00000000 80ffff0e 00000000     ................
+   1b8b0:	60dbde00 00000000 00000000 00000000     ...`............
+   1b8c0:	00000000 ffffff1b e4ffffff ffdf0100     ................
+   1b8d0:	ffffffff 1d00feff effaffff ffffaffe     ................
+   1b8e0:	ffffdf01 0ae22ea0 ff1dffff 02e2ffff     ................
+   1b8f0:	ffff2e20 ffffffcf ef0220fe ffcfffff      ........ ......
+   1b900:	20feffff ffffef02 ffffff1d 2e2002e2     ... .......... .
+   1b910:	df01ffff 2ea0ffff ffff0ae2 ffff1d00     ................
+   1b920:	affeeffa 0100ffff ffffffdf feffffff     ................
+   1b930:	ff1b0000 ffffffff 0800e4ff e4ffffff     ................
+   1b940:	ffff8f00 f808feff ff400b0f 0b0ff88f     ..........@.....
+   1b950:	f8ffff40 ff400b0f ffffffff ffffffff     @.....@.........
+   1b960:	ffffffff ffffffff ffffffff ffffffff     ................
+   1b970:	ffffffff ffffffff ffffffff ffffffff     ................
+   1b980:	ffffffff ffffffff ffffffff ffefffff     ................
+   1b990:	feffffff ffffff4e 0000e4ff 00000000     ....N...........
+   1b9a0:	00000100 00000000 00e00300 00001000     ................
+   1b9b0:	10ef0200 0000bf00 f17f0000 00f1cf00     ................
+   1b9c0:	ff070000 77ffcf11 bf777777 ffffcff1     .......wwww.....
+   1b9d0:	ffffffff ffff17ff ffffffff ff07e0ff     ................
+   1b9e0:	000000f1 06000000 000010ff 00000000     ................
+   1b9f0:	0000a005 00000000                       ........
+
+0001b9f8 <kern_class_values>:
+   1b9f8:	00000100 00000000 00000100 00000003     ................
+   1ba08:	00000200 00000000 00000000 00000000     ................
+   1ba18:	00010000 00000000 00000000 00000000     ................
+   1ba28:	000c0100 0000fa07 f1f20000 04060c02     ................
+   1ba38:	010d02f6 0008030b 00000000 00000000     ................
+   1ba48:	020f0000 000000fe 00000000 00000000     ................
+   1ba58:	f8000500 00000000 0504fb00 00fd0000     ................
+   1ba68:	fd0003fe fbfffd00 00000000 fd0000fd     ................
+   1ba78:	fd0000fc 0000fb00 00000000 fd000000     ................
+   1ba88:	00fc00fd 00e100f9 0500fb00 fb000008     ................
+   1ba98:	05080303 000005fc 000000f1 00000000     ................
+   1baa8:	00000000 000000f7 00000000 00000000     ................
+   1bab8:	f9000000 f600f3fd 000000fe 000a0100     ................
+   1bac8:	01fffef8 0000fc00 0000edfe 00000000     ................
+   1bad8:	00000000 0afeec00 00000000 00000000     ................
+   1bae8:	00000000 000000f6 00000000 08000000     ................
+   1baf8:	00000300 000000fb 00000000 00000000     ................
+   1bb08:	00000000 020a0000 00000001 00000000     ................
 	...
-   1bca8:	000000f7 00000000 00000000 00000000     ................
-   1bcb8:	00000000 02000000 fd080305 fd050000     ................
-   1bcc8:	0702ddf8 00fd0105 00080009 00e80008     ................
-   1bcd8:	080008fd 000305fd 00fd0100 0014fc00     ................
-   1bce8:	00080014 0804030b f7000000 00000000     ................
-   1bcf8:	0200fe01 02fbfdfb 0000fd00 0000f600     ................
+   1bb38:	000000f7 00000000 00000000 00000000     ................
+   1bb48:	00000000 02000000 fd080305 fd050000     ................
+   1bb58:	0702ddf8 00fd0105 00080009 00e80008     ................
+   1bb68:	080008fd 000305fd 00fd0100 0014fc00     ................
+   1bb78:	00080014 0804030b f7000000 00000000     ................
+   1bb88:	0200fe01 02fbfdfb 0000fd00 0000f600     ................
 	...
-   1bd10:	0000ef00 00000000 00000000 00000000     ................
-   1bd20:	00f20100 000000f0 1900fe00 0303fdfd     ................
-   1bd30:	03fd00fe 00f20000 00000000 00000000     ................
-   1bd40:	00e70000 00000003 00000000 00000000     ................
-   1bd50:	0f00f000 00f70000 e7ef0008 0008fbef     ................
-   1bd60:	0300ef00 00fc00fa 00000000 00000000     ................
-   1bd70:	07000000 0000e108 00000000 00000000     ................
-   1bd80:	000c0000 00000002 02020000 ff00fbfd     ................
-   1bd90:	0000fdff 000000fe 00fe00fb fa00fbfa     ................
-   1bda0:	00fbf8f8 00fb00fb fe000000 00030000     ................
-   1bdb0:	0100fd02 03000000 000000fe ff0303fe     ................
-   1bdc0:	fb000000 0000ff00 01000000 00fe0300     ................
-   1bdd0:	00fc00fd 0800fe00 00fd0000 00000000     ................
-   1bde0:	fefe01ff 00fd0000 000000fd 00000000     ................
-   1bdf0:	ffff0000 00fdfd00 00000000 fe000001     ................
-   1be00:	fdfdfd00 00000000 00000000 0000fe00     ................
-   1be10:	fdfe0000 f800fc00 0005f8fe 0503fb00     ................
-   1be20:	fffa0007 f4ff00fd f202fe03 01000003     ................
-   1be30:	fef200f3 f300feea 00070500 00000003     ................
-   1be40:	fb000100 00f800fd 00fd0000 00fd0000     ................
-   1be50:	00000000 ff00ffff 000000fd 00000000     ................
-   1be60:	fe00fdfd 0000fefd 000000fd 00000000     ................
-   1be70:	00000000 fd00fefe fb00fe00 fd000003     ................
-   1be80:	00030301 00000000 0000fe00 02000000     ................
-   1be90:	00fd0000 00fdfefd 00000000 00020000     ................
-   1bea0:	000000fe 00fcfd00 fe0800fb 0000f801     ................
-   1beb0:	f5f3f307 fe0003fb fb00fbef fb04fb00     ................
-   1bec0:	00f900f0 02ff0100 000300fe f300f6f8     ................
-   1bed0:	f8fafbfa fbfff9fd 010002f9 0000fd00     ................
-   1bee0:	03000200 00000000 00000000 fd000000     ................
-   1bef0:	ff00ff00 fafc00fd f800fffa 00000000     ................
-   1bf00:	00fe0000 01000000 000000fe 00000003     ................
-   1bf10:	00000000 00000c00 00000000 00000002     ................
-   1bf20:	000000fd 00000000 00000000 000300fb     ................
+   1bba0:	0000ef00 00000000 00000000 00000000     ................
+   1bbb0:	00f20100 000000f0 1900fe00 0303fdfd     ................
+   1bbc0:	03fd00fe 00f20000 00000000 00000000     ................
+   1bbd0:	00e70000 00000003 00000000 00000000     ................
+   1bbe0:	0f00f000 00f70000 e7ef0008 0008fbef     ................
+   1bbf0:	0300ef00 00fc00fa 00000000 00000000     ................
+   1bc00:	07000000 0000e108 00000000 00000000     ................
+   1bc10:	000c0000 00000002 02020000 ff00fbfd     ................
+   1bc20:	0000fdff 000000fe 00fe00fb fa00fbfa     ................
+   1bc30:	00fbf8f8 00fb00fb fe000000 00030000     ................
+   1bc40:	0100fd02 03000000 000000fe ff0303fe     ................
+   1bc50:	fb000000 0000ff00 01000000 00fe0300     ................
+   1bc60:	00fc00fd 0800fe00 00fd0000 00000000     ................
+   1bc70:	fefe01ff 00fd0000 000000fd 00000000     ................
+   1bc80:	ffff0000 00fdfd00 00000000 fe000001     ................
+   1bc90:	fdfdfd00 00000000 00000000 0000fe00     ................
+   1bca0:	fdfe0000 f800fc00 0005f8fe 0503fb00     ................
+   1bcb0:	fffa0007 f4ff00fd f202fe03 01000003     ................
+   1bcc0:	fef200f3 f300feea 00070500 00000003     ................
+   1bcd0:	fb000100 00f800fd 00fd0000 00fd0000     ................
+   1bce0:	00000000 ff00ffff 000000fd 00000000     ................
+   1bcf0:	fe00fdfd 0000fefd 000000fd 00000000     ................
+   1bd00:	00000000 fd00fefe fb00fe00 fd000003     ................
+   1bd10:	00030301 00000000 0000fe00 02000000     ................
+   1bd20:	00fd0000 00fdfefd 00000000 00020000     ................
+   1bd30:	000000fe 00fcfd00 fe0800fb 0000f801     ................
+   1bd40:	f5f3f307 fe0003fb fb00fbef fb04fb00     ................
+   1bd50:	00f900f0 02ff0100 000300fe f300f6f8     ................
+   1bd60:	f8fafbfa fbfff9fd 010002f9 0000fd00     ................
+   1bd70:	03000200 00000000 00000000 fd000000     ................
+   1bd80:	ff00ff00 fafc00fd f800fffa 00000000     ................
+   1bd90:	00fe0000 01000000 000000fe 00000003     ................
+   1bda0:	00000000 00000c00 00000000 00000002     ................
+   1bdb0:	000000fd 00000000 00000000 000300fb     ................
 	...
-   1bf3c:	000000fe 000000fb 00f8f300 f3fc0000     ................
-   1bf4c:	03fd0000 0000f900 00000000 00000000     ................
-   1bf5c:	fb0000fc 00000000 00000000 00000000     ................
-   1bf6c:	00fb0003 03000000 fbfb0200 fdfdfd00     ................
-   1bf7c:	00000000 00f80000 fdfc00fd f8fafa00     ................
-   1bf8c:	00fb00fe 000000f8 00001400 fd000001     ................
-   1bf9c:	f5000300 00000000 08fbe800 00f5fe08     ................
-   1bfac:	f300fc03 ee03fdff 040003fd f8f7fcf7     ................
-   1bfbc:	f10000f5 00000f00 000000ff f9fdffff     ................
-   1bfcc:	00e8fff8 00000000 00000000 00000001     ................
+   1bdcc:	000000fe 000000fb 00f8f300 f3fc0000     ................
+   1bddc:	03fd0000 0000f900 00000000 00000000     ................
+   1bdec:	fb0000fc 00000000 00000000 00000000     ................
+   1bdfc:	00fb0003 03000000 fbfb0200 fdfdfd00     ................
+   1be0c:	00000000 00f80000 fdfc00fd f8fafa00     ................
+   1be1c:	00fb00fe 000000f8 00001400 fd000001     ................
+   1be2c:	f5000300 00000000 08fbe800 00f5fe08     ................
+   1be3c:	f300fc03 ee03fdff 040003fd f8f7fcf7     ................
+   1be4c:	f10000f5 00000f00 000000ff f9fdffff     ................
+   1be5c:	00e8fff8 00000000 00000000 00000001     ................
 	...
-   1bfe8:	ff00fd00 0000fcfd 00fd00fb 00000000     ................
+   1be78:	ff00fd00 0000fcfd 00fd00fb 00000000     ................
 	...
-   1c000:	00ff0000 050000fb fa0003ff f9fffe03     ................
-   1c010:	fdfd00fd fcfc00fe fffe0000 00fdfcfe     ................
-   1c020:	0300fd00 00fa00fe 00fb0000 fcfc00fc     ................
-   1c030:	00000003 00000000 0003fb00 fdfe00fc     ................
-   1c040:	fefefef8 fffdfeff 00000000 fefefd00     ................
-   1c050:	00000000 fe00fe03 fe000000 fdfefefd     ................
-   1c060:	0a0200fe 00f900ff fd0005fe 0004fdf5     ................
-   1c070:	03fcf400 fe0002fc fc00f8fe fc000001     ................
-   1c080:	03000000 00fbfb03 fdfcfdfc 01fc00fd     ................
-   1c090:	0008fcfb 00000000 00000000 00000003     ................
+   1be90:	00ff0000 050000fb fa0003ff f9fffe03     ................
+   1bea0:	fdfd00fd fcfc00fe fffe0000 00fdfcfe     ................
+   1beb0:	0300fd00 00fa00fe 00fb0000 fcfc00fc     ................
+   1bec0:	00000003 00000000 0003fb00 fdfe00fc     ................
+   1bed0:	fefefef8 fffdfeff 00000000 fefefd00     ................
+   1bee0:	00000000 fe00fe03 fe000000 fdfefefd     ................
+   1bef0:	0a0200fe 00f900ff fd0005fe 0004fdf5     ................
+   1bf00:	03fcf400 fe0002fc fc00f8fe fc000001     ................
+   1bf10:	03000000 00fbfb03 fdfcfdfc 01fc00fd     ................
+   1bf20:	0008fcfb 00000000 00000000 00000003     ................
 	...
-   1c0b4:	000000fc 00000000 00000000 00000000     ................
+   1bf44:	000000fc 00000000 00000000 00000000     ................
 	...
-   1c0e0:	000000fe 00000000 00000000 00000000     ................
+   1bf70:	000000fe 00000000 00000000 00000000     ................
 	...
-   1c0fc:	fdfe0000 00000000 00000000 00000000     ................
-   1c10c:	fd0000fc fdfd0000 00000000 000000fd     ................
-   1c11c:	0000ff00 fe000000 00000000 00fb00fc     ................
-   1c12c:	00f80000 0105fa02 0000f4fe f600fdfa     ................
-   1c13c:	0000f9fa f6f6fdf5 00f900f4 00fd1102     ................
-   1c14c:	fdfffdfa f7fbf9fc 00fdfaf6 0100fe00     ................
-   1c15c:	feee0000 f7fa0608 00f80100 05fdfef3     ................
-   1c16c:	0001fde8 f3fdef00 0000edfd 010f00ee     ................
-   1c17c:	0000fe00 feff0000 ef00fef6 00000000     ................
-   1c18c:	00fe00f8 00f4f9ff f8fcff00 00fe00fd     ................
-   1c19c:	f4000000 fef8f8fd fcfdfafc f8fefb00     ................
-   1c1ac:	fbfd00fc 0100fbfd 00f8fe00 00fb0005     ................
-   1c1bc:	03000000 0afb0200 fdfdfd00 00000000     ................
-   1c1cc:	00f80000 fdfc00fd f8fafa00 02fb00fe     ................
-   1c1dc:	0000000a 00001400 fd000001 00000300     ................
-   1c1ec:	00000000 00ff0000 00000000 0000fbfe     ................
-   1c1fc:	ff000000 fd000000 fb0000fd fb0000fd     ................
-   1c20c:	00ff0400 00000000 00000100 05040000     ................
-   1c21c:	f800fe02 f80800fc 0afbfbf8 feea0305     ................
-   1c22c:	fd00fd05 00f7fd03 fefd03fd 0000fef8     ................
-   1c23c:	f9000508 07fdf200 fd01f6fd 0afdf8f8     ................
-   1c24c:	00fc0003 080200f9 faf6f7fa ed010008     ................
-   1c25c:	fefc03fe f7fa00fa 00fefcfc fdfbfa00     ................
-   1c26c:	fd060800 fcf200f2 fff1f700 f9f8fcf8     ................
-   1c27c:	fd000007 00fefb00 0400fbfd 000003f8     ................
-   1c28c:	fafd00f2 faf8fefc f800faf8 f8fbfafd     ................
-   1c29c:	010000fd f800fc0c fbfd00fd f6f9f9fa     ................
-   1c2ac:	0005fbfd fdf300fc f7f80502 fd08f8fb     ................
-   1c2bc:	05fbe801 00f7fcfa fdfdf5f8 f8fbfdfe     ................
-   1c2cc:	080000ff 00effe07 f606faf1 f5f7fbef     ................
-   1c2dc:	0005f8f3 fd000000 fd030000 05fb0205     ................
-   1c2ec:	fff80000 0100ff00 0000fe01 00000000     ................
-   1c2fc:	000000fd 01080200 0000fd00 fefe0000     ................
-   1c30c:	000000fd 00000201 00020000 000a00fe     ................
-   1c31c:	fd010105 00000500 00000200 00000000     ................
-   1c32c:	00000000 07000800 00000000 00000000     ................
-   1c33c:	00000000 00f10000 080004fd 03190000     ................
-   1c34c:	0303fbfb 00f301fe 00f10c00 00000000     ................
-   1c35c:	00000000 0aef0000 00000024 00000000     ........$.......
-   1c36c:	00000000 0000f100 00000000 00000000     ................
+   1bf8c:	fdfe0000 00000000 00000000 00000000     ................
+   1bf9c:	fd0000fc fdfd0000 00000000 000000fd     ................
+   1bfac:	0000ff00 fe000000 00000000 00fb00fc     ................
+   1bfbc:	00f80000 0105fa02 0000f4fe f600fdfa     ................
+   1bfcc:	0000f9fa f6f6fdf5 00f900f4 00fd1102     ................
+   1bfdc:	fdfffdfa f7fbf9fc 00fdfaf6 0100fe00     ................
+   1bfec:	feee0000 f7fa0608 00f80100 05fdfef3     ................
+   1bffc:	0001fde8 f3fdef00 0000edfd 010f00ee     ................
+   1c00c:	0000fe00 feff0000 ef00fef6 00000000     ................
+   1c01c:	00fe00f8 00f4f9ff f8fcff00 00fe00fd     ................
+   1c02c:	f4000000 fef8f8fd fcfdfafc f8fefb00     ................
+   1c03c:	fbfd00fc 0100fbfd 00f8fe00 00fb0005     ................
+   1c04c:	03000000 0afb0200 fdfdfd00 00000000     ................
+   1c05c:	00f80000 fdfc00fd f8fafa00 02fb00fe     ................
+   1c06c:	0000000a 00001400 fd000001 00000300     ................
+   1c07c:	00000000 00ff0000 00000000 0000fbfe     ................
+   1c08c:	ff000000 fd000000 fb0000fd fb0000fd     ................
+   1c09c:	00ff0400 00000000 00000100 05040000     ................
+   1c0ac:	f800fe02 f80800fc 0afbfbf8 feea0305     ................
+   1c0bc:	fd00fd05 00f7fd03 fefd03fd 0000fef8     ................
+   1c0cc:	f9000508 07fdf200 fd01f6fd 0afdf8f8     ................
+   1c0dc:	00fc0003 080200f9 faf6f7fa ed010008     ................
+   1c0ec:	fefc03fe f7fa00fa 00fefcfc fdfbfa00     ................
+   1c0fc:	fd060800 fcf200f2 fff1f700 f9f8fcf8     ................
+   1c10c:	fd000007 00fefb00 0400fbfd 000003f8     ................
+   1c11c:	fafd00f2 faf8fefc f800faf8 f8fbfafd     ................
+   1c12c:	010000fd f800fc0c fbfd00fd f6f9f9fa     ................
+   1c13c:	0005fbfd fdf300fc f7f80502 fd08f8fb     ................
+   1c14c:	05fbe801 00f7fcfa fdfdf5f8 f8fbfdfe     ................
+   1c15c:	080000ff 00effe07 f606faf1 f5f7fbef     ................
+   1c16c:	0005f8f3 fd000000 fd030000 05fb0205     ................
+   1c17c:	fff80000 0100ff00 0000fe01 00000000     ................
+   1c18c:	000000fd 01080200 0000fd00 fefe0000     ................
+   1c19c:	000000fd 00000201 00020000 000a00fe     ................
+   1c1ac:	fd010105 00000500 00000200 00000000     ................
+   1c1bc:	00000000 07000800 00000000 00000000     ................
+   1c1cc:	00000000 00f10000 080004fd 03190000     ................
+   1c1dc:	0303fbfb 00f301fe 00f10c00 00000000     ................
+   1c1ec:	00000000 0aef0000 00000024 00000000     ........$.......
+   1c1fc:	00000000 0000f100 00000000 00000000     ................
 	...
-   1c38c:	fb0000fc 000000fe 00000000 00000000     ................
+   1c21c:	fb0000fc 000000fe 00000000 00000000     ................
 	...
-   1c3a4:	00f900fe 00000100 fefb2103 03f90708     .........!......
-   1c3b4:	03030000 000000fd 00000000 00000000     ................
-   1c3c4:	000007df 00000000 00000000 00000000     ................
-   1c3d4:	f9000000 f9000000 00000000 0000fffa     ................
-   1c3e4:	fd00fa00 0000f400 00000000 00000000     ................
-   1c3f4:	0000ef00 00010000 00000000 0000fd00     ................
-   1c404:	00fc00fb 000000f9 00fd03fc fafdf900     ................
-   1c414:	00f90000 00f400fd eb0000fd f7fdf6fb     ................
-   1c424:	00ef0000 0000fff9 00000000 fbfc0000     ................
-   1c434:	0000fcfe 00fa0000 05fd03fa fefafe00     ................
-   1c444:	fd00fbfc f902feff 000000ff 00fcfee9     ................
-   1c454:	f4fe00fa fe0000fe 000000fe fe000200     ................
-   1c464:	0004fefc 00000000 00000000 00000000     ................
+   1c234:	00f900fe 00000100 fefb2103 03f90708     .........!......
+   1c244:	03030000 000000fd 00000000 00000000     ................
+   1c254:	000007df 00000000 00000000 00000000     ................
+   1c264:	f9000000 f9000000 00000000 0000fffa     ................
+   1c274:	fd00fa00 0000f400 00000000 00000000     ................
+   1c284:	0000ef00 00010000 00000000 0000fd00     ................
+   1c294:	00fc00fb 000000f9 00fd03fc fafdf900     ................
+   1c2a4:	00f90000 00f400fd eb0000fd f7fdf6fb     ................
+   1c2b4:	00ef0000 0000fff9 00000000 fbfc0000     ................
+   1c2c4:	0000fcfe 00fa0000 05fd03fa fefafe00     ................
+   1c2d4:	fd00fbfc f902feff 000000ff 00fcfee9     ................
+   1c2e4:	f4fe00fa fe0000fe 000000fe fe000200     ................
+   1c2f4:	0004fefc 00000000 00000000 00000000     ................
 	...
-   1c490:	00030000 00000000 fe00fa00 fb000000     ................
-   1c4a0:	00000003 00fbfdf9 fd00f900 0000f400     ................
-   1c4b0:	00e70000 00f3f7fb fe00ef00 000000fc     ................
-   1c4c0:	00000000 fffcfd00 000001fc 0800fd04     ................
-   1c4d0:	f8fdfd0d 06040d03 030b03f9 00070607     ................
+   1c320:	00030000 00000000 fe00fa00 fb000000     ................
+   1c330:	00000003 00fbfdf9 fd00f900 0000f400     ................
+   1c340:	00e70000 00f3f7fb fe00ef00 000000fc     ................
+   1c350:	00000000 fffcfd00 000001fc 0800fd04     ................
+   1c360:	f8fdfd0d 06040d03 030b03f9 00070607     ................
 	...
-   1c4e8:	0c100000 fe00fdfb 00140b14 00030000     ................
-   1c4f8:	00000900 000000fc 00000000 00fe0000     ................
-   1c508:	00000000 04000000 00000000 f6fefdea     ................
-   1c518:	ef0000f3 00000000 00000000 00000000     ................
-   1c528:	00000000 0000fc00 00000000 fe000000     ................
+   1c378:	0c100000 fe00fdfb 00140b14 00030000     ................
+   1c388:	00000900 000000fc 00000000 00fe0000     ................
+   1c398:	00000000 04000000 00000000 f6fefdea     ................
+   1c3a8:	ef0000f3 00000000 00000000 00000000     ................
+   1c3b8:	00000000 0000fc00 00000000 fe000000     ................
 	...
-   1c540:	00000004 fefdea00 0000f3f6 000000f6     ................
+   1c3d0:	00000004 fefdea00 0000f3f6 000000f6     ................
 	...
-   1c560:	000000fe fd0003fa f8030502 03feff00     ................
-   1c570:	00000200 00fa0000 00fbfefe 1000f6fe     ................
-   1c580:	fefa00fd 00fcfe00 fdfbf9fd fc000000     ................
+   1c3f0:	000000fe fd0003fa f8030502 03feff00     ................
+   1c400:	00000200 00fa0000 00fbfefe 1000f6fe     ................
+   1c410:	fefa00fd 00fcfe00 fdfbf9fd fc000000     ................
 	...
-   1c598:	0000fe00 00000000 00040000 ea000000     ................
-   1c5a8:	f3f6fefd 00ef0000 00000000 00000d00     ................
+   1c428:	0000fe00 00000000 00040000 ea000000     ................
+   1c438:	f3f6fefd 00ef0000 00000000 00000d00     ................
 	...
-   1c5c0:	fdf800fc fdfe08fe 01fe01f6 0601f9fe     ................
-   1c5d0:	02010201 00fdf6fa f5f9fbf6 fbfc00f6     ................
-   1c5e0:	fefefdfd fe00fefd 040004ff 000800fe     ................
+   1c450:	fdf800fc fdfe08fe 01fe01f6 0601f9fe     ................
+   1c460:	02010201 00fdf6fa f5f9fbf6 fbfc00f6     ................
+   1c470:	fefefdfd fe00fefd 040004ff 000800fe     ................
 	...
-   1c5f8:	fe000000 0000fdfd 00ff00f9 000000fc     ................
+   1c488:	fe000000 0000fdfd 00ff00f9 000000fc     ................
 	...
-   1c610:	000000f1 00000000 00000000 fd00fdfd     ................
-   1c620:	00000000 fc0000fe fc0003fd f900fefb     ................
-   1c630:	fdfefafe 0000fc00 00000000 00000000     ................
-   1c640:	0800ef00 00fb0000 fd000000 0000fd00     ................
-   1c650:	fe0000ff 0000fa00 f8f8fd0b ff030302     ................
-   1c660:	020402f9 fe080208 f60000f9 f9f80000     ................
-   1c670:	00fb0000 fc00fcfd fe00fc00 f8fe0004     ................
-   1c680:	000009fd 00fb00fe 00fa0300 0002fd03     ................
-   1c690:	fe00f800 03fd00ff 000000fe 00fafdf6     ................
-   1c6a0:	f40000f8 00fd0900 000200fb f8fd00fd     ................
-   1c6b0:	0003fd00 fe000000 fd030000 fd000001     ................
-   1c6c0:	00fd00fe 00000000 00000000 00000000     ................
-   1c6d0:	00000000 000600f0 0000fe00 00010000     ................
-   1c6e0:	0000fdfd 06000500 00000000 01f1f000     ................
-   1c6f0:	f604080b 09000b02 00000500 00000000     ................
-   1c700:	00000000 00000e00 00000000 00000000     ................
+   1c4a0:	000000f1 00000000 00000000 fd00fdfd     ................
+   1c4b0:	00000000 fc0000fe fc0003fd f900fefb     ................
+   1c4c0:	fdfefafe 0000fc00 00000000 00000000     ................
+   1c4d0:	0800ef00 00fb0000 fd000000 0000fd00     ................
+   1c4e0:	fe0000ff 0000fa00 f8f8fd0b ff030302     ................
+   1c4f0:	020402f9 fe080208 f60000f9 f9f80000     ................
+   1c500:	00fb0000 fc00fcfd fe00fc00 f8fe0004     ................
+   1c510:	000009fd 00fb00fe 00fa0300 0002fd03     ................
+   1c520:	fe00f800 03fd00ff 000000fe 00fafdf6     ................
+   1c530:	f40000f8 00fd0900 000200fb f8fd00fd     ................
+   1c540:	0003fd00 fe000000 fd030000 fd000001     ................
+   1c550:	00fd00fe 00000000 00000000 00000000     ................
+   1c560:	00000000 000600f0 0000fe00 00010000     ................
+   1c570:	0000fdfd 06000500 00000000 01f1f000     ................
+   1c580:	f604080b 09000b02 00000500 00000000     ................
+   1c590:	00000000 00000e00 00000000 00000000     ................
 	...
 
-0001c718 <kern_classes>:
-   1c718:	0001bb68 0001c728 0001c7c4 0000313d     h...(.......=1..
-
-0001c728 <kern_left_class_mapping>:
-   1c728:	02010000 05040300 08070602 0a090a09     ................
-   1c738:	0d000c0b 11100f0e 140c1312 00000014     ................
-   1c748:	18171615 1b1a1619 1e1d1d1c 1d1d201f     ............. ..
-   1c758:	23222116 251e2403 28272625 002b2a29     .!"#.$.%%&'()*+.
-   1c768:	2e2d002c 3231302f 34342d33 2d2d3035     ,.-./0123-4450--
-   1c778:	37362e2e 3a333938 3c3a3b3a 09000029     ..67893::;:<)...
-   1c788:	0000093d 00000000 00000000 00000000     =...............
+0001c5a8 <kern_classes>:
+   1c5a8:	0001b9f8 0001c5b8 0001c654 0000313d     ........T...=1..
+
+0001c5b8 <kern_left_class_mapping>:
+   1c5b8:	02010000 05040300 08070602 0a090a09     ................
+   1c5c8:	0d000c0b 11100f0e 140c1312 00000014     ................
+   1c5d8:	18171615 1b1a1619 1e1d1d1c 1d1d201f     ............. ..
+   1c5e8:	23222116 251e2403 28272625 002b2a29     .!"#.$.%%&'()*+.
+   1c5f8:	2e2d002c 3231302f 34342d33 2d2d3035     ,.-./0123-4450--
+   1c608:	37362e2e 3a333938 3c3a3b3a 09000029     ..67893::;:<)...
+   1c618:	0000093d 00000000 00000000 00000000     =...............
 	...
 
-0001c7c4 <kern_right_class_mapping>:
-   1c7c4:	02010000 05040300 08070602 0a090a09     ................
-   1c7d4:	0e0d0c0b 0c11100f 15141312 00000015     ................
-   1c7e4:	19181716 19191917 1a191917 19191919     ................
-   1c7f4:	19171917 1d1c1b03 201f1e1d 00232221     ........... !"#.
-   1c804:	26250024 00272727 29282627 2a2a2626     $.%&'''.'&()&&**
-   1c814:	2a272a27 2e2d2c2b 302e2f2e 09230000     '*'*+,-../.0..#.
-   1c824:	00000931 00000000 00000000 00000000     1...............
+0001c654 <kern_right_class_mapping>:
+   1c654:	02010000 05040300 08070602 0a090a09     ................
+   1c664:	0e0d0c0b 0c11100f 15141312 00000015     ................
+   1c674:	19181716 19191917 1a191917 19191919     ................
+   1c684:	19171917 1d1c1b03 201f1e1d 00232221     ........... !"#.
+   1c694:	26250024 00272727 29282627 2a2a2626     $.%&'''.'&()&&**
+   1c6a4:	2a272a27 2e2d2c2b 302e2f2e 09230000     '*'*+,-../.0..#.
+   1c6b4:	00000931 00000000 00000000 00000000     1...............
 	...
 
-0001c860 <unicode_list_1>:
-   1c860:	1f720000 ef58ef51 ef5cef5b ef61ef5d     ..r.Q.X.[.\.].a.
-   1c870:	ef65ef63 ef6cef69 ef76ef71 ef78ef77     c.e.i.l.q.v.w.x.
-   1c880:	ef98ef8e ef9cef9b efa1ef9d efa3efa2     ................
-   1c890:	efb7efa4 efbeefb8 efc1efc0 efc7efc4     ................
-   1c8a0:	efc9efc8 efe3efcb f014efe5 f017f015     ................
-   1c8b0:	f03af037 f06cf043 f0abf074 f190f13b     7.:.C.l.t...;...
-   1c8c0:	f192f191 f194f193 f1e3f1d7 f254f23d     ............=.T.
-   1c8d0:	f712f4aa 0000f7f2                       ........
-
-0001c8d8 <lv_anim_path_def>:
-   1c8d8:	0000f7b9 00000000 0000ff4e 0000ffa8     ........N.......
-   1c8e8:	0000ffb0 0000ffda 0000fff0 00010006     ................
-   1c8f8:	0001003c 0001005e 00010088 000100be     <...^...........
-   1c908:	000100ce 000100fe 0001011a 0001012a     ............*...
-   1c918:	0001015a 00010176 00010186 000101b6     Z...v...........
-   1c928:	000101d2 000101e2 00010218              ............
-
-0001c934 <sin0_90_table>:
-   1c934:	023c0000 06b30478 0b2808ee 0f990d61     ..<.x.....(.a...
-   1c944:	140611d0 186c163a 1ccb1a9d 21211ef7     ....:.l.......!!
-   1c954:	256c2348 29ac278e 2ddf2bc7 32032ff3     H#l%.'.).+.-./.2
-   1c964:	36183410 3a1c381c 3e0e3c17 41ec3fff     .4.6.8.:.<.>.?.A
-   1c974:	45b643d4 496a4793 4d084b3c 508d4ecd     .C.E.GjI<K.M.N.P
-   1c984:	53f95246 574b55a5 5a8258ea 5d9c5c13     FR.S.UKW.X.Z.\.]
-   1c994:	609a5f1f 6379620d 663964dd 68d9678d     ._.`.byc.d9f.g.h
-   1c9a4:	6b596a1d 6db76c8c 6ff36ed9 720c7104     .jYk.l.m.n.o.q.r
-   1c9b4:	7401730b 75d274ee 777f76ad 79067847     .s.t.t.u.v.wGx.y
-   1c9c4:	7a6779bb 7ba27b0a 7cb77c32 7da57d33     .ygz.{.{2|.|3}.}
-   1c9d4:	7e6c7e0d 7f0b7ec0 7f827f4b 7fd27faf     .~l~.~..K.......
-   1c9e4:	7ffa7feb 00007fff 3b2e2c20 005f2d3a     ........ ,.;:-_.
-   1c9f4:	00011ca6 00011c90 00011cb8 00011e1e     ................
-   1ca04:	00011d88 00011cec 00011d06 00012382     .............#..
-   1ca14:	00011df6 00011ece 000121a0 00011cd2     .........!......
-   1ca24:	000123d4 00012132 00012438 00011dfe     .#..2!..8$......
-   1ca34:	00011e06 00011d48 00011e0e 00011f58     ....H.......X...
-   1ca44:	00011e16 000120da 00012118 00012414     ..... ...!...$..
-   1ca54:	00011f06 00011f2a 000120ca 00011f72     ....*.... ..r...
-   1ca64:	00012092 00011e84 00012326 0001235e     . ......&#..^#..
-   1ca74:	00011e56 00011db6 000121fc 00011fc4     V........!......
-   1ca84:	00012034 000122ca 00012054 00012260     4 ..."..T ..`"..
-   1ca94:	000122b0 94d38c51 0000ffff 00008410     ."..Q...........
-   1caa4:	008c80ef 00006325 6c6c6548 4f57206f     ....%c..Hello WO
-   1cab4:	0a646c72 00000000 2b302d23 6c680020     rld.....#-0+ .hl
-   1cac4:	6665004c 47464567 32313000 36353433     L.efgEFG.0123456
-   1cad4:	41393837 45444342 31300046 35343332     789ABCDEF.012345
-   1cae4:	39383736 64636261 00006665              6789abcdef..
-
-0001caf0 <_init>:
-   1caf0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
-   1caf2:	46c0      	nop			; (mov r8, r8)
-   1caf4:	bcf8      	pop	{r3, r4, r5, r6, r7}
-   1caf6:	bc08      	pop	{r3}
-   1caf8:	469e      	mov	lr, r3
-   1cafa:	4770      	bx	lr
-
-0001cafc <__init_array_start>:
-   1cafc:	000000dd 	.word	0x000000dd
-
-0001cb00 <_fini>:
-   1cb00:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
-   1cb02:	46c0      	nop			; (mov r8, r8)
-   1cb04:	bcf8      	pop	{r3, r4, r5, r6, r7}
-   1cb06:	bc08      	pop	{r3}
-   1cb08:	469e      	mov	lr, r3
-   1cb0a:	4770      	bx	lr
-
-0001cb0c <__fini_array_start>:
-   1cb0c:	000000b5 	.word	0x000000b5
+0001c6f0 <unicode_list_1>:
+   1c6f0:	1f720000 ef58ef51 ef5cef5b ef61ef5d     ..r.Q.X.[.\.].a.
+   1c700:	ef65ef63 ef6cef69 ef76ef71 ef78ef77     c.e.i.l.q.v.w.x.
+   1c710:	ef98ef8e ef9cef9b efa1ef9d efa3efa2     ................
+   1c720:	efb7efa4 efbeefb8 efc1efc0 efc7efc4     ................
+   1c730:	efc9efc8 efe3efcb f014efe5 f017f015     ................
+   1c740:	f03af037 f06cf043 f0abf074 f190f13b     7.:.C.l.t...;...
+   1c750:	f192f191 f194f193 f1e3f1d7 f254f23d     ............=.T.
+   1c760:	f712f4aa 0000f7f2                       ........
+
+0001c768 <lv_anim_path_def>:
+   1c768:	0000f7b9 00000000 0000ff4e 0000ffa8     ........N.......
+   1c778:	0000ffb0 0000ffda 0000fff0 00010006     ................
+   1c788:	0001003c 0001005e 00010088 000100be     <...^...........
+   1c798:	000100ce 000100fe 0001011a 0001012a     ............*...
+   1c7a8:	0001015a 00010176 00010186 000101b6     Z...v...........
+   1c7b8:	000101d2 000101e2 00010218              ............
+
+0001c7c4 <sin0_90_table>:
+   1c7c4:	023c0000 06b30478 0b2808ee 0f990d61     ..<.x.....(.a...
+   1c7d4:	140611d0 186c163a 1ccb1a9d 21211ef7     ....:.l.......!!
+   1c7e4:	256c2348 29ac278e 2ddf2bc7 32032ff3     H#l%.'.).+.-./.2
+   1c7f4:	36183410 3a1c381c 3e0e3c17 41ec3fff     .4.6.8.:.<.>.?.A
+   1c804:	45b643d4 496a4793 4d084b3c 508d4ecd     .C.E.GjI<K.M.N.P
+   1c814:	53f95246 574b55a5 5a8258ea 5d9c5c13     FR.S.UKW.X.Z.\.]
+   1c824:	609a5f1f 6379620d 663964dd 68d9678d     ._.`.byc.d9f.g.h
+   1c834:	6b596a1d 6db76c8c 6ff36ed9 720c7104     .jYk.l.m.n.o.q.r
+   1c844:	7401730b 75d274ee 777f76ad 79067847     .s.t.t.u.v.wGx.y
+   1c854:	7a6779bb 7ba27b0a 7cb77c32 7da57d33     .ygz.{.{2|.|3}.}
+   1c864:	7e6c7e0d 7f0b7ec0 7f827f4b 7fd27faf     .~l~.~..K.......
+   1c874:	7ffa7feb 00007fff 3b2e2c20 005f2d3a     ........ ,.;:-_.
+   1c884:	00011ca6 00011c90 00011cb8 00011e1e     ................
+   1c894:	00011d88 00011cec 00011d06 00012382     .............#..
+   1c8a4:	00011df6 00011ece 000121a0 00011cd2     .........!......
+   1c8b4:	000123d4 00012132 00012438 00011dfe     .#..2!..8$......
+   1c8c4:	00011e06 00011d48 00011e0e 00011f58     ....H.......X...
+   1c8d4:	00011e16 000120da 00012118 00012414     ..... ...!...$..
+   1c8e4:	00011f06 00011f2a 000120ca 00011f72     ....*.... ..r...
+   1c8f4:	00012092 00011e84 00012326 0001235e     . ......&#..^#..
+   1c904:	00011e56 00011db6 000121fc 00011fc4     V........!......
+   1c914:	00012034 000122ca 00012054 00012260     4 ..."..T ..`"..
+   1c924:	000122b0 94d38c51 0000ffff 00008410     ."..Q...........
+   1c934:	008c80ef 00006325 6c6c6548 4f57206f     ....%c..Hello WO
+   1c944:	0a646c72 00000000 2b302d23 6c680020     rld.....#-0+ .hl
+   1c954:	6665004c 47464567 32313000 36353433     L.efgEFG.0123456
+   1c964:	41393837 45444342 31300046 35343332     789ABCDEF.012345
+   1c974:	39383736 64636261 00006665              6789abcdef..
+
+0001c980 <_init>:
+   1c980:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+   1c982:	46c0      	nop			; (mov r8, r8)
+   1c984:	bcf8      	pop	{r3, r4, r5, r6, r7}
+   1c986:	bc08      	pop	{r3}
+   1c988:	469e      	mov	lr, r3
+   1c98a:	4770      	bx	lr
+
+0001c98c <__init_array_start>:
+   1c98c:	000000dd 	.word	0x000000dd
+
+0001c990 <_fini>:
+   1c990:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+   1c992:	46c0      	nop			; (mov r8, r8)
+   1c994:	bcf8      	pop	{r3, r4, r5, r6, r7}
+   1c996:	bc08      	pop	{r3}
+   1c998:	469e      	mov	lr, r3
+   1c99a:	4770      	bx	lr
+
+0001c99c <__fini_array_start>:
+   1c99c:	000000b5 	.word	0x000000b5
 
 Disassembly of section .relocate:
 
@@ -62118,7 +61874,7 @@ void portable_delay_cycles(unsigned long n)
 2000000c:	0001 0000                                   ....
 
 20000010 <font_dsc>:
-20000010:	9130 0001 8c58 0001 8c30 0001 c718 0001     0...X...0.......
+20000010:	8fc0 0001 8ae8 0001 8ac0 0001 c5a8 0001     ................
 20000020:	0010 5002 0000 0000 0000 0000 0000 0000     ...P............
 
 20000030 <lv_font_montserrat_16>:
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.map b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.map
index 84c9754..8bf8cc2 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.map
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.map
@@ -18224,7 +18224,7 @@ LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin
 LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtn.o
                 0x00002000                STACK_SIZE = DEFINED (STACK_SIZE)?STACK_SIZE:DEFINED (__stack_size__)?__stack_size__:0x2000
 
-.text           0x00000000    0x1cb10
+.text           0x00000000    0x1c9a0
                 0x00000000                . = ALIGN (0x4)
                 0x00000000                _sfixed = .
  *(.vectors .vectors.*)
@@ -19173,327 +19173,327 @@ LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin
                 0x00014490     0x24dc src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
                 0x00014490                lv_theme_material_init
  .text.ssd1963_init
-                0x0001696c      0xb1c src/devices/display/p_ssd1963.o
+                0x0001696c      0x93c src/devices/display/p_ssd1963.o
                 0x0001696c                ssd1963_init
  .text.ssd1963_flush
-                0x00017488      0x31c src/devices/display/p_ssd1963.o
-                0x00017488                ssd1963_flush
+                0x000172a8      0x31c src/devices/display/p_ssd1963.o
+                0x000172a8                ssd1963_flush
  .text.p_gpio_init
-                0x000177a4       0x70 src/drivers/p_gpio.o
-                0x000177a4                p_gpio_init
+                0x000175c4       0x70 src/drivers/p_gpio.o
+                0x000175c4                p_gpio_init
  .text.p_gpio_parallel_wr_word
-                0x00017814       0x18 src/drivers/p_gpio.o
-                0x00017814                p_gpio_parallel_wr_word
+                0x00017634       0x88 src/drivers/p_gpio.o
+                0x00017634                p_gpio_parallel_wr_word
  .text.p_gpio_parallel_wr_arr
-                0x0001782c       0x2c src/drivers/p_gpio.o
-                0x0001782c                p_gpio_parallel_wr_arr
+                0x000176bc       0x2c src/drivers/p_gpio.o
+                0x000176bc                p_gpio_parallel_wr_arr
  .text.p_i2c_init
-                0x00017858        0x2 src/drivers/p_i2c.o
-                0x00017858                p_i2c_init
- *fill*         0x0001785a        0x2 
+                0x000176e8        0x2 src/drivers/p_i2c.o
+                0x000176e8                p_i2c_init
+ *fill*         0x000176ea        0x2 
  .text.p_printf
-                0x0001785c       0x6c src/drivers/p_usart.o
-                0x0001785c                p_printf
+                0x000176ec       0x6c src/drivers/p_usart.o
+                0x000176ec                p_printf
  .text.p_usart_init
-                0x000178c8       0xe0 src/drivers/p_usart.o
-                0x000178c8                p_usart_init
+                0x00017758       0xe0 src/drivers/p_usart.o
+                0x00017758                p_usart_init
  .text.p_debug_rx_cb
-                0x000179a8       0x1c src/drivers/p_usart.o
+                0x00017838       0x1c src/drivers/p_usart.o
  .text.p_debug_start_service
-                0x000179c4       0x18 src/drivers/p_usart.o
-                0x000179c4                p_debug_start_service
- .text.main     0x000179dc       0x14 src/main.o
-                0x000179dc                main
- .text          0x000179f0      0x114 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivsi3.o)
-                0x000179f0                __aeabi_uidiv
-                0x000179f0                __udivsi3
-                0x00017afc                __aeabi_uidivmod
- .text          0x00017b04      0x1d4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_divsi3.o)
-                0x00017b04                __divsi3
-                0x00017b04                __aeabi_idiv
-                0x00017cd0                __aeabi_idivmod
- .text          0x00017cd8        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_dvmd_tls.o)
-                0x00017cd8                __aeabi_idiv0
-                0x00017cd8                __aeabi_ldiv0
- .text          0x00017cdc       0x40 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_aeabi_uldivmod.o)
-                0x00017cdc                __aeabi_uldivmod
- .text          0x00017d1c       0x54 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_muldi3.o)
-                0x00017d1c                __muldi3
-                0x00017d1c                __aeabi_lmul
- .text          0x00017d70      0x180 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivmoddi4.o)
-                0x00017d70                __udivmoddi4
- .text          0x00017ef0       0x3c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_clzsi2.o)
-                0x00017ef0                __clzsi2
- .text          0x00017f2c       0x18 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_clzdi2.o)
-                0x00017f2c                __clzdi2
+                0x00017854       0x18 src/drivers/p_usart.o
+                0x00017854                p_debug_start_service
+ .text.main     0x0001786c       0x14 src/main.o
+                0x0001786c                main
+ .text          0x00017880      0x114 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivsi3.o)
+                0x00017880                __aeabi_uidiv
+                0x00017880                __udivsi3
+                0x0001798c                __aeabi_uidivmod
+ .text          0x00017994      0x1d4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_divsi3.o)
+                0x00017994                __divsi3
+                0x00017994                __aeabi_idiv
+                0x00017b60                __aeabi_idivmod
+ .text          0x00017b68        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_dvmd_tls.o)
+                0x00017b68                __aeabi_idiv0
+                0x00017b68                __aeabi_ldiv0
+ .text          0x00017b6c       0x40 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_aeabi_uldivmod.o)
+                0x00017b6c                __aeabi_uldivmod
+ .text          0x00017bac       0x54 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_muldi3.o)
+                0x00017bac                __muldi3
+                0x00017bac                __aeabi_lmul
+ .text          0x00017c00      0x180 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivmoddi4.o)
+                0x00017c00                __udivmoddi4
+ .text          0x00017d80       0x3c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_clzsi2.o)
+                0x00017d80                __clzsi2
+ .text          0x00017dbc       0x18 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_clzdi2.o)
+                0x00017dbc                __clzdi2
  .text.__libc_init_array
-                0x00017f44       0x48 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-init.o)
-                0x00017f44                __libc_init_array
- .text.memcmp   0x00017f8c       0x1e c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memcmp.o)
-                0x00017f8c                memcmp
- .text.memcpy   0x00017faa       0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memcpy-stub.o)
-                0x00017faa                memcpy
- .text.memset   0x00017fbc       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memset.o)
-                0x00017fbc                memset
- .text          0x00017fcc       0x14 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-strcmp.o)
-                0x00017fcc                strcmp
- .text.strcpy   0x00017fe0       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-strcpy.o)
-                0x00017fe0                strcpy
- .text          0x00017ff0        0xe c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-strlen.o)
-                0x00017ff0                strlen
- *fill*         0x00017ffe        0x2 
+                0x00017dd4       0x48 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-init.o)
+                0x00017dd4                __libc_init_array
+ .text.memcmp   0x00017e1c       0x1e c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memcmp.o)
+                0x00017e1c                memcmp
+ .text.memcpy   0x00017e3a       0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memcpy-stub.o)
+                0x00017e3a                memcpy
+ .text.memset   0x00017e4c       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memset.o)
+                0x00017e4c                memset
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+                0x0001c654       0x9b src/ASF/thirdparty/lvgl/src/lv_font/lv_font_montserrat_16.o
+ *fill*         0x0001c6ef        0x1 
  .rodata.unicode_list_1
-                0x0001c860       0x76 src/ASF/thirdparty/lvgl/src/lv_font/lv_font_montserrat_16.o
+                0x0001c6f0       0x76 src/ASF/thirdparty/lvgl/src/lv_font/lv_font_montserrat_16.o
  .rodata.lv_disp_drv_register.str1.4
-                0x0001c8d6        0xe src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_disp.o
- *fill*         0x0001c8d6        0x2 
+                0x0001c766        0xe src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_disp.o
+ *fill*         0x0001c766        0x2 
  .rodata.lv_anim_path_def
-                0x0001c8d8        0x8 src/ASF/thirdparty/lvgl/src/lv_misc/lv_anim.o
-                0x0001c8d8                lv_anim_path_def
+                0x0001c768        0x8 src/ASF/thirdparty/lvgl/src/lv_misc/lv_anim.o
+                0x0001c768                lv_anim_path_def
  .rodata.lv_anim_start.str1.4
-                0x0001c8e0        0xe src/ASF/thirdparty/lvgl/src/lv_misc/lv_anim.o
+                0x0001c770        0xe src/ASF/thirdparty/lvgl/src/lv_misc/lv_anim.o
  .rodata._lv_area_align
-                0x0001c8e0       0x54 src/ASF/thirdparty/lvgl/src/lv_misc/lv_area.o
+                0x0001c770       0x54 src/ASF/thirdparty/lvgl/src/lv_misc/lv_area.o
  .rodata.lv_fs_drv_register.str1.4
-                0x0001c934        0xe src/ASF/thirdparty/lvgl/src/lv_misc/lv_fs.o
+                0x0001c7c4        0xe src/ASF/thirdparty/lvgl/src/lv_misc/lv_fs.o
  .rodata.lv_fs_get_ext.str1.4
-                0x0001c934        0x4 src/ASF/thirdparty/lvgl/src/lv_misc/lv_fs.o
+                0x0001c7c4        0x4 src/ASF/thirdparty/lvgl/src/lv_misc/lv_fs.o
                                   0x1 (size before relaxing)
  .rodata.sin0_90_table
-                0x0001c934       0xb6 src/ASF/thirdparty/lvgl/src/lv_misc/lv_math.o
+                0x0001c7c4       0xb6 src/ASF/thirdparty/lvgl/src/lv_misc/lv_math.o
  .rodata.lv_task_create_basic.str1.4
-                0x0001c9ea        0xe src/ASF/thirdparty/lvgl/src/lv_misc/lv_task.o
- *fill*         0x0001c9ea        0x2 
+                0x0001c87a        0xe src/ASF/thirdparty/lvgl/src/lv_misc/lv_task.o
+ *fill*         0x0001c87a        0x2 
  .rodata._lv_txt_get_next_line.str1.4
-                0x0001c9ec        0x8 src/ASF/thirdparty/lvgl/src/lv_misc/lv_txt.o
+                0x0001c87c        0x8 src/ASF/thirdparty/lvgl/src/lv_misc/lv_txt.o
  .rodata.theme_apply
-                0x0001c9f4       0xa4 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+                0x0001c884       0xa4 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
  .rodata.basic_init.cst2
-                0x0001ca98        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+                0x0001c928        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
  .rodata.bar_init.cst2
-                0x0001ca9a        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+                0x0001c92a        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
  .rodata.linemeter_init.cst2
-                0x0001ca9a        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+                0x0001c92a        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
  .rodata.lv_theme_material_init.cst2
-                0x0001ca9a        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+                0x0001c92a        0x2 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
                                   0x4 (size before relaxing)
- .rodata        0x0001ca9c        0x6 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
- *fill*         0x0001caa2        0x2 
+ .rodata        0x0001c92c        0x6 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+ *fill*         0x0001c932        0x2 
  .rodata.lv_theme_material_init.str1.4
-                0x0001caa4        0x4 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+                0x0001c934        0x4 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
  .rodata.p_debug_rx_cb.str1.4
-                0x0001caa8        0x3 src/drivers/p_usart.o
- *fill*         0x0001caab        0x1 
+                0x0001c938        0x3 src/drivers/p_usart.o
+ *fill*         0x0001c93b        0x1 
  .rodata.p_usart_init.str1.4
-                0x0001caac       0x10 src/drivers/p_usart.o
+                0x0001c93c       0x10 src/drivers/p_usart.o
                                   0xd (size before relaxing)
  .rodata._svfprintf_r.str1.1
-                0x0001cabc       0x11 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-svfprintf.o)
+                0x0001c94c       0x11 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-svfprintf.o)
  .rodata._printf_i.str1.1
-                0x0001cacd       0x22 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x0001c95d       0x22 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x0001caf0                . = ALIGN (0x4)
- *fill*         0x0001caef        0x1 
+                0x0001c980                . = ALIGN (0x4)
+ *fill*         0x0001c97f        0x1 
  *(.init)
- .init          0x0001caf0        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crti.o
-                0x0001caf0                _init
- .init          0x0001caf4        0x8 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtn.o
-                0x0001cafc                . = ALIGN (0x4)
-                0x0001cafc                __preinit_array_start = .
+ .init          0x0001c980        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crti.o
+                0x0001c980                _init
+ .init          0x0001c984        0x8 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtn.o
+                0x0001c98c                . = ALIGN (0x4)
+                0x0001c98c                __preinit_array_start = .
  *(.preinit_array)
-                0x0001cafc                __preinit_array_end = .
-                0x0001cafc                . = ALIGN (0x4)
-                0x0001cafc                __init_array_start = .
+                0x0001c98c                __preinit_array_end = .
+                0x0001c98c                . = ALIGN (0x4)
+                0x0001c98c                __init_array_start = .
  *(SORT(.init_array.*))
  *(.init_array)
- .init_array    0x0001cafc        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
-                0x0001cb00                __init_array_end = .
-                0x0001cb00                . = ALIGN (0x4)
+ .init_array    0x0001c98c        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+                0x0001c990                __init_array_end = .
+                0x0001c990                . = ALIGN (0x4)
  *crtbegin.o(.ctors)
  *(EXCLUDE_FILE(*crtend.o) .ctors)
  *(SORT(.ctors.*))
  *crtend.o(.ctors)
-                0x0001cb00                . = ALIGN (0x4)
+                0x0001c990                . = ALIGN (0x4)
  *(.fini)
- .fini          0x0001cb00        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crti.o
-                0x0001cb00                _fini
- .fini          0x0001cb04        0x8 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtn.o
-                0x0001cb0c                . = ALIGN (0x4)
-                0x0001cb0c                __fini_array_start = .
+ .fini          0x0001c990        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crti.o
+                0x0001c990                _fini
+ .fini          0x0001c994        0x8 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtn.o
+                0x0001c99c                . = ALIGN (0x4)
+                0x0001c99c                __fini_array_start = .
  *(.fini_array)
- .fini_array    0x0001cb0c        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+ .fini_array    0x0001c99c        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
  *(SORT(.fini_array.*))
-                0x0001cb10                __fini_array_end = .
+                0x0001c9a0                __fini_array_end = .
  *crtbegin.o(.dtors)
  *(EXCLUDE_FILE(*crtend.o) .dtors)
  *(SORT(.dtors.*))
  *crtend.o(.dtors)
-                0x0001cb10                . = ALIGN (0x4)
-                0x0001cb10                _efixed = .
+                0x0001c9a0                . = ALIGN (0x4)
+                0x0001c9a0                _efixed = .
                 [!provide]                PROVIDE (__exidx_start, .)
 
-.vfp11_veneer   0x0001cb10        0x0
- .vfp11_veneer  0x0001cb10        0x0 linker stubs
+.vfp11_veneer   0x0001c9a0        0x0
+ .vfp11_veneer  0x0001c9a0        0x0 linker stubs
 
-.v4_bx          0x0001cb10        0x0
- .v4_bx         0x0001cb10        0x0 linker stubs
+.v4_bx          0x0001c9a0        0x0
+ .v4_bx         0x0001c9a0        0x0 linker stubs
 
-.iplt           0x0001cb10        0x0
- .iplt          0x0001cb10        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+.iplt           0x0001c9a0        0x0
+ .iplt          0x0001c9a0        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
 
-.ARM.exidx      0x0001cb10        0x8
+.ARM.exidx      0x0001c9a0        0x8
  *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- .ARM.exidx     0x0001cb10        0x8 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivmoddi4.o)
+ .ARM.exidx     0x0001c9a0        0x8 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivmoddi4.o)
                 [!provide]                PROVIDE (__exidx_end, .)
 
-.eh_frame       0x0001cb18        0x0
- .eh_frame      0x0001cb18        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+.eh_frame       0x0001c9a8        0x0
+ .eh_frame      0x0001c9a8        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
 
-.rel.dyn        0x0001cb18        0x0
- .rel.iplt      0x0001cb18        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+.rel.dyn        0x0001c9a8        0x0
+ .rel.iplt      0x0001c9a8        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
 
-.jcr            0x0001cb18        0x0
- .jcr           0x0001cb18        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+.jcr            0x0001c9a8        0x0
+ .jcr           0x0001c9a8        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
 
-.igot.plt       0x0001cb18        0x0
- .igot.plt      0x0001cb18        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
-                0x0001cb18                . = ALIGN (0x4)
-                0x0001cb18                _etext = .
+.igot.plt       0x0001c9a8        0x0
+ .igot.plt      0x0001c9a8        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m/crtbegin.o
+                0x0001c9a8                . = ALIGN (0x4)
+                0x0001c9a8                _etext = .
 
-.relocate       0x20000000       0xc4 load address 0x0001cb18
+.relocate       0x20000000       0xc4 load address 0x0001c9a8
                 0x20000000                . = ALIGN (0x4)
                 0x20000000                _srelocate = .
  *(.ramfunc .ramfunc.*)
@@ -19528,7 +19528,7 @@ LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin
                 0x200000c4                . = ALIGN (0x4)
                 0x200000c4                _erelocate = .
 
-.bss            0x200000c8     0x4d70 load address 0x0001cbe0
+.bss            0x200000c8     0x4d70 load address 0x0001ca70
                 0x200000c8                . = ALIGN (0x4)
                 0x200000c8                _sbss = .
                 0x200000c8                _szero = .
@@ -19681,7 +19681,7 @@ LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin
                 0x20004e38                _ebss = .
                 0x20004e38                _ezero = .
 
-.stack          0x20004e38     0x2000 load address 0x00021950
+.stack          0x20004e38     0x2000 load address 0x000217e0
                 0x20004e38                . = ALIGN (0x8)
                 0x20004e38                _sstack = .
                 0x20006e38                . = (. + STACK_SIZE)
@@ -19928,7 +19928,7 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .comment       0x00000059       0x5a src/drivers/p_usart.o
  .comment       0x00000059       0x5a src/main.o
 
-.debug_info     0x00000000    0x8aaaa
+.debug_info     0x00000000    0x89e2c
  .debug_info    0x00000000      0xa64 src/ASF/common2/services/delay/sam0/cycle_counter.o
  .debug_info    0x00000a64     0x1550 src/drivers/p_time.o
  .debug_info    0x00001fb4     0x1807 src/oracle.o
@@ -19980,13 +19980,13 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .debug_info    0x0006ef0f      0xddf src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
  .debug_info    0x0006fcee     0x1670 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
  .debug_info    0x0007135e     0xc718 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
- .debug_info    0x0007da76     0x6feb src/devices/display/p_ssd1963.o
- .debug_info    0x00084a61     0x161d src/drivers/p_gpio.o
- .debug_info    0x0008607e      0xa5c src/drivers/p_i2c.o
- .debug_info    0x00086ada     0x353e src/drivers/p_usart.o
- .debug_info    0x0008a018      0xa92 src/main.o
+ .debug_info    0x0007da76     0x62ee src/devices/display/p_ssd1963.o
+ .debug_info    0x00083d64     0x169c src/drivers/p_gpio.o
+ .debug_info    0x00085400      0xa5c src/drivers/p_i2c.o
+ .debug_info    0x00085e5c     0x353e src/drivers/p_usart.o
+ .debug_info    0x0008939a      0xa92 src/main.o
 
-.debug_abbrev   0x00000000     0xbbd3
+.debug_abbrev   0x00000000     0xbbb5
  .debug_abbrev  0x00000000      0x1e7 src/ASF/common2/services/delay/sam0/cycle_counter.o
  .debug_abbrev  0x000001e7      0x27e src/drivers/p_time.o
  .debug_abbrev  0x00000465      0x2cf src/oracle.o
@@ -20038,11 +20038,11 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .debug_abbrev  0x0000a531      0x238 src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
  .debug_abbrev  0x0000a769      0x270 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
  .debug_abbrev  0x0000a9d9      0x385 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
- .debug_abbrev  0x0000ad5e      0x3ab src/devices/display/p_ssd1963.o
- .debug_abbrev  0x0000b109      0x341 src/drivers/p_gpio.o
- .debug_abbrev  0x0000b44a      0x1be src/drivers/p_i2c.o
- .debug_abbrev  0x0000b608      0x3ec src/drivers/p_usart.o
- .debug_abbrev  0x0000b9f4      0x1df src/main.o
+ .debug_abbrev  0x0000ad5e      0x39c src/devices/display/p_ssd1963.o
+ .debug_abbrev  0x0000b0fa      0x332 src/drivers/p_gpio.o
+ .debug_abbrev  0x0000b42c      0x1be src/drivers/p_i2c.o
+ .debug_abbrev  0x0000b5ea      0x3ec src/drivers/p_usart.o
+ .debug_abbrev  0x0000b9d6      0x1df src/main.o
 
 .debug_aranges  0x00000000     0x17e0
  .debug_aranges
@@ -20462,7 +20462,7 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .debug_macro   0x0002596b      0x45d src/drivers/p_usart.o
  .debug_macro   0x00025dc8      0x663 src/main.o
 
-.debug_line     0x00000000    0x310b5
+.debug_line     0x00000000    0x30f4b
  .debug_line    0x00000000      0x99c src/ASF/common2/services/delay/sam0/cycle_counter.o
  .debug_line    0x0000099c     0x1cfd src/drivers/p_time.o
  .debug_line    0x00002699     0x1d4f src/oracle.o
@@ -20514,127 +20514,127 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .debug_line    0x0002711a      0x4f9 src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
  .debug_line    0x00027613      0xc28 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
  .debug_line    0x0002823b     0x333c src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
- .debug_line    0x0002b577     0x267b src/devices/display/p_ssd1963.o
- .debug_line    0x0002dbf2      0xd51 src/drivers/p_gpio.o
- .debug_line    0x0002e943      0xce5 src/drivers/p_i2c.o
- .debug_line    0x0002f628      0xdba src/drivers/p_usart.o
- .debug_line    0x000303e2      0xcd3 src/main.o
+ .debug_line    0x0002b577     0x2504 src/devices/display/p_ssd1963.o
+ .debug_line    0x0002da7b      0xd5e src/drivers/p_gpio.o
+ .debug_line    0x0002e7d9      0xce5 src/drivers/p_i2c.o
+ .debug_line    0x0002f4be      0xdba src/drivers/p_usart.o
+ .debug_line    0x00030278      0xcd3 src/main.o
 
-.debug_str      0x00000000    0x9fce7
+.debug_str      0x00000000    0x9fce3
  .debug_str     0x00000000    0x8373e src/ASF/common2/services/delay/sam0/cycle_counter.o
                               0x84042 (size before relaxing)
- .debug_str     0x0008373e     0x9749 src/drivers/p_time.o
-                              0x8d87c (size before relaxing)
- .debug_str     0x0008ce87      0xd0e src/oracle.o
-                              0x8e4db (size before relaxing)
- .debug_str     0x0008db95      0xd68 src/ASF/sam0/drivers/sercom/sercom.o
+ .debug_str     0x0008373e     0x9745 src/drivers/p_time.o
+                              0x8d878 (size before relaxing)
+ .debug_str     0x0008ce83      0xd0e src/oracle.o
+                              0x8e4d7 (size before relaxing)
+ .debug_str     0x0008db91      0xd68 src/ASF/sam0/drivers/sercom/sercom.o
                               0x85466 (size before relaxing)
- .debug_str     0x0008e8fd      0xd92 src/ASF/sam0/drivers/sercom/usart/usart.o
+ .debug_str     0x0008e8f9      0xd92 src/ASF/sam0/drivers/sercom/usart/usart.o
                               0x8621f (size before relaxing)
- .debug_str     0x0008f68f      0x216 src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o
+ .debug_str     0x0008f68b      0x216 src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o
                               0x85465 (size before relaxing)
- .debug_str     0x0008f8a5      0x548 src/ASF/sam0/drivers/sercom/sercom_interrupt.o
+ .debug_str     0x0008f8a1      0x548 src/ASF/sam0/drivers/sercom/sercom_interrupt.o
                               0x85301 (size before relaxing)
- .debug_str     0x0008fded       0x53 src/ASF/common/utils/interrupt/interrupt_sam_nvic.o
+ .debug_str     0x0008fde9       0x53 src/ASF/common/utils/interrupt/interrupt_sam_nvic.o
                               0x83d73 (size before relaxing)
- .debug_str     0x0008fe40      0x2ce src/ASF/sam0/boards/samd21_xplained_pro/board_init.o
-                              0x87db0 (size before relaxing)
- .debug_str     0x0009010e       0x5e src/ASF/sam0/drivers/port/port.o
+ .debug_str     0x0008fe3c      0x2ce src/ASF/sam0/boards/samd21_xplained_pro/board_init.o
+                              0x87dac (size before relaxing)
+ .debug_str     0x0009010a       0x5e src/ASF/sam0/drivers/port/port.o
                               0x8419f (size before relaxing)
- .debug_str     0x0009016c     0x278d src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o
+ .debug_str     0x00090168     0x278d src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o
                               0x86f0c (size before relaxing)
- .debug_str     0x000928f9      0x1e3 src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o
+ .debug_str     0x000928f5      0x1e3 src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o
                               0x84a36 (size before relaxing)
- .debug_str     0x00092adc      0x179 src/ASF/sam0/drivers/system/pinmux/pinmux.o
+ .debug_str     0x00092ad8      0x179 src/ASF/sam0/drivers/system/pinmux/pinmux.o
                               0x84215 (size before relaxing)
- .debug_str     0x00092c55       0x3b src/ASF/sam0/drivers/system/system.o
+ .debug_str     0x00092c51       0x3b src/ASF/sam0/drivers/system/system.o
                               0x83e50 (size before relaxing)
- .debug_str     0x00092c90      0xeea src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o
+ .debug_str     0x00092c8c      0xeea src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o
                               0x6ee77 (size before relaxing)
- .debug_str     0x00093b7a      0x689 src/ASF/sam0/utils/syscalls/gcc/syscalls.o
+ .debug_str     0x00093b76      0x689 src/ASF/sam0/utils/syscalls/gcc/syscalls.o
                                0x742e (size before relaxing)
- .debug_str     0x00094203      0x7be src/ASF/thirdparty/lvgl/src/lv_core/lv_debug.o
+ .debug_str     0x000941ff      0x7be src/ASF/thirdparty/lvgl/src/lv_core/lv_debug.o
                                0xab70 (size before relaxing)
- .debug_str     0x000949c1      0x15a src/ASF/thirdparty/lvgl/src/lv_core/lv_disp.o
+ .debug_str     0x000949bd      0x15a src/ASF/thirdparty/lvgl/src/lv_core/lv_disp.o
                                0xa76c (size before relaxing)
- .debug_str     0x00094b1b      0xca6 src/ASF/thirdparty/lvgl/src/lv_core/lv_group.o
+ .debug_str     0x00094b17      0xca6 src/ASF/thirdparty/lvgl/src/lv_core/lv_group.o
                                0xb5ff (size before relaxing)
- .debug_str     0x000957c1      0xa23 src/ASF/thirdparty/lvgl/src/lv_core/lv_indev.o
+ .debug_str     0x000957bd      0xa23 src/ASF/thirdparty/lvgl/src/lv_core/lv_indev.o
                                0xb6fb (size before relaxing)
- .debug_str     0x000961e4     0x2f29 src/ASF/thirdparty/lvgl/src/lv_core/lv_obj.o
+ .debug_str     0x000961e0     0x2f29 src/ASF/thirdparty/lvgl/src/lv_core/lv_obj.o
                                0xef98 (size before relaxing)
- .debug_str     0x0009910d      0x337 src/ASF/thirdparty/lvgl/src/lv_core/lv_refr.o
+ .debug_str     0x00099109      0x337 src/ASF/thirdparty/lvgl/src/lv_core/lv_refr.o
                                0xb1f8 (size before relaxing)
- .debug_str     0x00099444      0x322 src/ASF/thirdparty/lvgl/src/lv_core/lv_style.o
+ .debug_str     0x00099440      0x322 src/ASF/thirdparty/lvgl/src/lv_core/lv_style.o
                                0xac50 (size before relaxing)
- .debug_str     0x00099766      0x7aa src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_blend.o
+ .debug_str     0x00099762      0x7aa src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_blend.o
                                0xaefe (size before relaxing)
- .debug_str     0x00099f10      0x66c src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_img.o
+ .debug_str     0x00099f0c      0x66c src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_img.o
                                0xb486 (size before relaxing)
- .debug_str     0x0009a57c      0x3a0 src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_label.o
+ .debug_str     0x0009a578      0x3a0 src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_label.o
                                0xb446 (size before relaxing)
- .debug_str     0x0009a91c      0x24b src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_line.o
+ .debug_str     0x0009a918      0x24b src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_line.o
                                0xbf71 (size before relaxing)
- .debug_str     0x0009ab67      0x331 src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_mask.o
+ .debug_str     0x0009ab63      0x331 src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_mask.o
                                0xb1dc (size before relaxing)
- .debug_str     0x0009ae98      0x309 src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_rect.o
+ .debug_str     0x0009ae94      0x309 src/ASF/thirdparty/lvgl/src/lv_draw/lv_draw_rect.o
                                0xb62d (size before relaxing)
- .debug_str     0x0009b1a1      0x110 src/ASF/thirdparty/lvgl/src/lv_draw/lv_img_buf.o
+ .debug_str     0x0009b19d      0x110 src/ASF/thirdparty/lvgl/src/lv_draw/lv_img_buf.o
                                0x9c76 (size before relaxing)
- .debug_str     0x0009b2b1       0xe7 src/ASF/thirdparty/lvgl/src/lv_draw/lv_img_cache.o
+ .debug_str     0x0009b2ad       0xe7 src/ASF/thirdparty/lvgl/src/lv_draw/lv_img_cache.o
                                0xad56 (size before relaxing)
- .debug_str     0x0009b398      0x4a2 src/ASF/thirdparty/lvgl/src/lv_draw/lv_img_decoder.o
+ .debug_str     0x0009b394      0x4a2 src/ASF/thirdparty/lvgl/src/lv_draw/lv_img_decoder.o
                                0xb56a (size before relaxing)
- .debug_str     0x0009b83a       0x45 src/ASF/thirdparty/lvgl/src/lv_font/lv_font.o
+ .debug_str     0x0009b836       0x45 src/ASF/thirdparty/lvgl/src/lv_font/lv_font.o
                                0x7feb (size before relaxing)
- .debug_str     0x0009b87f      0x524 src/ASF/thirdparty/lvgl/src/lv_font/lv_font_fmt_txt.o
+ .debug_str     0x0009b87b      0x524 src/ASF/thirdparty/lvgl/src/lv_font/lv_font_fmt_txt.o
                                0xab60 (size before relaxing)
- .debug_str     0x0009bda3       0xf1 src/ASF/thirdparty/lvgl/src/lv_font/lv_font_montserrat_16.o
+ .debug_str     0x0009bd9f       0xf1 src/ASF/thirdparty/lvgl/src/lv_font/lv_font_montserrat_16.o
                                0xb503 (size before relaxing)
- .debug_str     0x0009be94      0x174 src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_disp.o
+ .debug_str     0x0009be90      0x174 src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_disp.o
                                0xb65a (size before relaxing)
- .debug_str     0x0009c008       0x76 src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_indev.o
+ .debug_str     0x0009c004       0x76 src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_indev.o
                                0xb3e8 (size before relaxing)
- .debug_str     0x0009c07e       0x58 src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_tick.o
+ .debug_str     0x0009c07a       0x58 src/ASF/thirdparty/lvgl/src/lv_hal/lv_hal_tick.o
                                0x4842 (size before relaxing)
- .debug_str     0x0009c0d6      0x1df src/ASF/thirdparty/lvgl/src/lv_misc/lv_anim.o
+ .debug_str     0x0009c0d2      0x1df src/ASF/thirdparty/lvgl/src/lv_misc/lv_anim.o
                                0xaf01 (size before relaxing)
- .debug_str     0x0009c2b5       0xcb src/ASF/thirdparty/lvgl/src/lv_misc/lv_area.o
+ .debug_str     0x0009c2b1       0xcb src/ASF/thirdparty/lvgl/src/lv_misc/lv_area.o
                                0x7dd3 (size before relaxing)
- .debug_str     0x0009c380       0xd5 src/ASF/thirdparty/lvgl/src/lv_misc/lv_color.o
+ .debug_str     0x0009c37c       0xd5 src/ASF/thirdparty/lvgl/src/lv_misc/lv_color.o
                                0x5483 (size before relaxing)
- .debug_str     0x0009c455      0x1ac src/ASF/thirdparty/lvgl/src/lv_misc/lv_fs.o
+ .debug_str     0x0009c451      0x1ac src/ASF/thirdparty/lvgl/src/lv_misc/lv_fs.o
                                0xafaa (size before relaxing)
- .debug_str     0x0009c601       0x98 src/ASF/thirdparty/lvgl/src/lv_misc/lv_gc.o
+ .debug_str     0x0009c5fd       0x98 src/ASF/thirdparty/lvgl/src/lv_misc/lv_gc.o
                                0x9d4c (size before relaxing)
- .debug_str     0x0009c699      0x192 src/ASF/thirdparty/lvgl/src/lv_misc/lv_ll.o
+ .debug_str     0x0009c695      0x192 src/ASF/thirdparty/lvgl/src/lv_misc/lv_ll.o
                                0x7986 (size before relaxing)
- .debug_str     0x0009c82b       0x92 src/ASF/thirdparty/lvgl/src/lv_misc/lv_math.o
+ .debug_str     0x0009c827       0x92 src/ASF/thirdparty/lvgl/src/lv_misc/lv_math.o
                                0x79d2 (size before relaxing)
- .debug_str     0x0009c8bd      0x297 src/ASF/thirdparty/lvgl/src/lv_misc/lv_mem.o
+ .debug_str     0x0009c8b9      0x297 src/ASF/thirdparty/lvgl/src/lv_misc/lv_mem.o
                                0xa064 (size before relaxing)
- .debug_str     0x0009cb54      0x1eb src/ASF/thirdparty/lvgl/src/lv_misc/lv_task.o
+ .debug_str     0x0009cb50      0x1eb src/ASF/thirdparty/lvgl/src/lv_misc/lv_task.o
                                0xaed0 (size before relaxing)
- .debug_str     0x0009cd3f      0x298 src/ASF/thirdparty/lvgl/src/lv_misc/lv_txt.o
+ .debug_str     0x0009cd3b      0x298 src/ASF/thirdparty/lvgl/src/lv_misc/lv_txt.o
                                0x87e1 (size before relaxing)
- .debug_str     0x0009cfd7       0x5f src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
+ .debug_str     0x0009cfd3       0x5f src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
                                0x8583 (size before relaxing)
- .debug_str     0x0009d036       0xc8 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
+ .debug_str     0x0009d032       0xc8 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
                                0xa83f (size before relaxing)
- .debug_str     0x0009d0fe     0x195b src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
+ .debug_str     0x0009d0fa     0x195b src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
                                0xe367 (size before relaxing)
- .debug_str     0x0009ea59       0xf4 src/devices/display/p_ssd1963.o
-                              0x8e72e (size before relaxing)
- .debug_str     0x0009eb4d       0x67 src/drivers/p_gpio.o
-                              0x88c74 (size before relaxing)
- .debug_str     0x0009ebb4       0x17 src/drivers/p_i2c.o
-                              0x886d5 (size before relaxing)
- .debug_str     0x0009ebcb     0x110e src/drivers/p_usart.o
-                              0x8b299 (size before relaxing)
- .debug_str     0x0009fcd9        0xe src/main.o
-                              0x886d6 (size before relaxing)
+ .debug_str     0x0009ea55       0xf4 src/devices/display/p_ssd1963.o
+                              0x8e72a (size before relaxing)
+ .debug_str     0x0009eb49       0x67 src/drivers/p_gpio.o
+                              0x88cb0 (size before relaxing)
+ .debug_str     0x0009ebb0       0x17 src/drivers/p_i2c.o
+                              0x886d1 (size before relaxing)
+ .debug_str     0x0009ebc7     0x110e src/drivers/p_usart.o
+                              0x8b295 (size before relaxing)
+ .debug_str     0x0009fcd5        0xe src/main.o
+                              0x886d2 (size before relaxing)
 
-.debug_frame    0x00000000     0x4794
+.debug_frame    0x00000000     0x47b8
  .debug_frame   0x00000000       0x30 src/ASF/common2/services/delay/sam0/cycle_counter.o
  .debug_frame   0x00000030       0x44 src/drivers/p_time.o
  .debug_frame   0x00000074       0x44 src/oracle.o
@@ -20685,35 +20685,35 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .debug_frame   0x00003f6c       0x64 src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
  .debug_frame   0x00003fd0       0xa8 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
  .debug_frame   0x00004078      0x170 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
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- .debug_frame   0x00004240       0x5c src/drivers/p_gpio.o
- .debug_frame   0x0000429c       0x20 src/drivers/p_i2c.o
- .debug_frame   0x000042bc       0x80 src/drivers/p_usart.o
- .debug_frame   0x0000433c       0x28 src/main.o
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+ .debug_frame   0x000041e8       0x64 src/devices/display/p_ssd1963.o
+ .debug_frame   0x0000424c       0x74 src/drivers/p_gpio.o
+ .debug_frame   0x000042c0       0x20 src/drivers/p_i2c.o
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+ .debug_frame   0x000043a8       0x20 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_divsi3.o)
+ .debug_frame   0x000043c8       0x34 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_muldi3.o)
+ .debug_frame   0x000043fc       0x3c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_udivmoddi4.o)
+ .debug_frame   0x00004438       0x2c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-init.o)
+ .debug_frame   0x00004464       0x2c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memcmp.o)
+ .debug_frame   0x00004490       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memcpy-stub.o)
+ .debug_frame   0x000044b8       0x20 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memset.o)
+ .debug_frame   0x000044d8       0x20 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-strcmp.o)
+ .debug_frame   0x000044f8       0x20 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-strcpy.o)
+ .debug_frame   0x00004518       0x44 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-vsprintf.o)
+ .debug_frame   0x0000455c       0x74 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-svfprintf.o)
+ .debug_frame   0x000045d0       0x54 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+ .debug_frame   0x00004624       0x20 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memchr-stub.o)
+ .debug_frame   0x00004644       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-memmove.o)
+ .debug_frame   0x0000466c       0x2c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-freer.o)
+ .debug_frame   0x00004698       0x2c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-mallocr.o)
+ .debug_frame   0x000046c4       0x30 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-reallocr.o)
+ .debug_frame   0x000046f4       0x2c c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-sbrkr.o)
+ .debug_frame   0x00004720       0x30 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-mlock.o)
+ .debug_frame   0x00004750       0x20 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-nano-msizer.o)
+ .debug_frame   0x00004770       0x48 c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libc_nano.a(lib_a-reent.o)
 
-.debug_loc      0x00000000    0x3d5da
+.debug_loc      0x00000000    0x3cca8
  .debug_loc     0x00000000       0x69 src/drivers/p_time.o
  .debug_loc     0x00000069       0x4d src/oracle.o
  .debug_loc     0x000000b6      0x9d5 src/ASF/sam0/drivers/sercom/sercom.o
@@ -20762,10 +20762,10 @@ OUTPUT(oracle_test_d21.elf elf32-littlearm)
  .debug_loc     0x000331ec      0x34f src/ASF/thirdparty/lvgl/src/lv_misc/lv_utils.o
  .debug_loc     0x0003353b       0x62 src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme.o
  .debug_loc     0x0003359d     0x5bdf src/ASF/thirdparty/lvgl/src/lv_themes/lv_theme_material.o
- .debug_loc     0x0003917c     0x3f38 src/devices/display/p_ssd1963.o
- .debug_loc     0x0003d0b4      0x375 src/drivers/p_gpio.o
- .debug_loc     0x0003d429      0x191 src/drivers/p_usart.o
- .debug_loc     0x0003d5ba       0x20 src/main.o
+ .debug_loc     0x0003917c     0x35b9 src/devices/display/p_ssd1963.o
+ .debug_loc     0x0003c735      0x3c2 src/drivers/p_gpio.o
+ .debug_loc     0x0003caf7      0x191 src/drivers/p_usart.o
+ .debug_loc     0x0003cc88       0x20 src/main.o
 
 Cross Reference Table
 
@@ -20906,6 +20906,7 @@ __aeabi_uidivmod                                  c:/program files (x86)/atmel/s
                                                   src/ASF/thirdparty/lvgl/src/lv_widgets/lv_calendar.o
                                                   src/ASF/thirdparty/lvgl/src/lv_misc/lv_printf.o
 __aeabi_uldivmod                                  c:/program files (x86)/atmel/studio/7.0/toolchain/arm/arm-gnu-toolchain/bin/../lib/gcc/arm-none-eabi/6.3.1/thumb/v6-m\libgcc.a(_aeabi_uldivmod.o)
+                                                  src/drivers/p_gpio.o
                                                   src/devices/display/p_ssd1963.o
                                                   src/ASF/thirdparty/lvgl/src/lv_misc/lv_printf.o
                                                   src/oracle.o
@@ -23916,6 +23917,7 @@ port_pin_set_config                               src/ASF/sam0/drivers/port/port
                                                   src/drivers/p_gpio.o
                                                   src/ASF/sam0/boards/samd21_xplained_pro/board_init.o
 portable_delay_cycles                             src/ASF/common2/services/delay/sam0/cycle_counter.o
+                                                  src/drivers/p_gpio.o
                                                   src/devices/display/p_ssd1963.o
                                                   src/oracle.o
 rx_char                                           src/drivers/p_usart.o
@@ -23999,6 +24001,7 @@ system_gclk_gen_disable                           src/ASF/sam0/drivers/system/cl
 system_gclk_gen_enable                            src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o
                                                   src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o
 system_gclk_gen_get_hz                            src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o
+                                                  src/drivers/p_gpio.o
                                                   src/devices/display/p_ssd1963.o
                                                   src/oracle.o
 system_gclk_gen_is_enabled                        src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.srec b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.srec
index b951382..b9ff69e 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.srec
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/oracle_test_d21.srec
@@ -12,10 +12,10 @@ S214000090711300007113000071130000711300004B
 S2140000A0711300007113000071130000711300003B
 S2140000B00000000010B5064C2378002B07D1054B36
 S2140000C0002B02D0044800E000BF0123237010BDBF
-S2140000D0C80000200000000018CB0100084B10B537
+S2140000D0C800002000000000A8C90100084B10B5A9
 S2140000E0002B03D00749084800E000BF0748036814
 S2140000F0002B00D110BD064B002BFBD09847F9E72C
-S21400010000000000CC00002018CB010018CB010036
+S21400010000000000CC000020A8C90100A8C901001A
 S2140001100000000010B5084A00201060074B53602E
 S214000120074C236A1B021B0AC02109060B432362E5
 S21400013090600723136010BD10E000E03F1F000032
@@ -27,14 +27,14 @@ S214000180124B9847124B9847124B9847124B98477A
 S214000190124B9847124C96235B010022114920000F
 S2140001A0114DA84701A8114B9847114B0493029490
 S2140001B001A8104B9847104B98470DB030BDC0466D
-S2140001C0451300000C000020C97801005978010092
-S2140001D0A577010015010000611800006D69010097
+S2140001C0451300000C00002059770100E976010075
+S2140001D0C575010015010000611800006D69010079
 S2140001E070260020F0000020C1F400005DF400003E
-S2140001F089740100E1F40000C579010010B5002003
+S2140001F0A9720100E1F400005578010010B5002056
 S214000200084B9847020000230748002180185941F0
 S214000210064A0023064CA047064B9847064B9847CD
 S21400022010BDC046CD100000571B0000581B000034
-S214000230DD7C0100010000205D130100F0B5DE4604
+S2140002306D7B0100010000205D130100F0B5DE4675
 S21400024057464E464546E0B587B0804604911600B0
 S2140002501F000022002300218B463F24012021009E
 S214000260009601975C4603944446059413E02024C8
@@ -57,7 +57,7 @@ S2140003601B041A4332800022E5E70022012BF9D154
 S2140003700A00002300210D4CA04702000B0000924B
 S2140003800193380000210A4CA047050080239B01FA
 S21400039040229842CFD8790FF800009A019BA047D8
-S2140003A0EA00821AD2B252032A43DBE71D7D01001F
+S2140003A0EA00821AD2B252032A43DBE7AD7B010091
 S2140003B03D02000010B582B004000E4B1B78002BE7
 S2140003C007D0002905D10B4B5B78834210D01D2047
 S2140003D00CE001A90C701320074B98471320074B1D
@@ -89,7 +89,7 @@ S2140005600300190003000400030008000300100045
 S21400057003000C000300160030B587B00B4B6A462C
 S21400058032CB32C232CB32C2009B83420BD0012325
 S2140005909A0069465258824206D00133062BF7D19C
-S2140005A0002007B030BD0023D8B2FAE73488010037
+S2140005A0002007B030BD0023D8B2FAE7C4860100A9
 S2140005B0F0B5DE4657464E464546E0B591B00500D6
 S2140005C00C00160029600800BA4B98470200236802
 S2140005D00520DB0706D511B03CBC90469946A246DE
@@ -224,7 +224,7 @@ S214000DD020D513491022CB681A42FCD00F4B1A6854
 S214000DE024231340042B01D00F4813E000200F4BA0
 S214000DF098470A4B9B681B041B0C58430AE0502379
 S214000E00074AD35C00205B0704D5044BD86801E092
-S214000E108020000210BDC0464C880100B826002085
+S214000E108020000210BDC046DC860100B8260020F7
 S214000E200008004000127A00006CDC02011200008C
 S214000E3070B50C490B6A047885784078012210401A
 S214000E4080014026B34303432A40D20180208343D7
@@ -239,7 +239,7 @@ S214000EC09A8419000E32CB681A42FCD0104A9168F8
 S214000ED00E4BD96252689A6200229A841900103228
 S214000EE0CB681A42FCD00A4B1B689BB2074A938415
 S214000EF0002008E0054944228B5C022003438B5403
-S214000F00002000E0002070477088010000080040C4
+S214000F00002000E000207047008701000008004035
 S214000F10B826002030B585B0C222D2001A4B9A609F
 S214000F201A4A53681E218B43536001236A46137086
 S214000F300024174DE0B26946A8470134252CF9D1A4
@@ -276,7 +276,7 @@ S214001110FBDB0A4B9C682402240C0D4B9847002EE0
 S21400112007D1012C07D9210028000A4B9847050053
 S21400113001E00134E540280070BDC046000C0040C8
 S214001140AD0C0000040C00409D0D0000080C004093
-S214001150ED0C0000F179010010B50400064B98472D
+S214001150ED0C00008178010010B50400064B98479E
 S214001160064B1C70064A53888021C9010B435380E6
 S214001170044B984710BDC046AD0C0000020C004062
 S214001180000C0040ED0C000010B504000F4B984713
@@ -321,15 +321,15 @@ S2140013E0D370D3780C27BB4308263343D370164BF1
 S2140013F0987B30229043202210439873997BB94300
 S214001400314399739A7BAA4322439A730F4A5368CF
 S21400141080210B4353600E4B98470E4B9847FEE7D0
-S21400142018CB010000000020C400002004000020AB
+S214001420A8C9010000000020C4000020040000201D
 S214001430C8000020384E002000ED00E0000000004C
 S214001440007000410050004100480041004000414B
-S214001450457F0100DD7901000300064A1268002A74
+S214001450D57D01006D7801000300064A1268002A57
 S21400146004D0044A1068C318136070470249014A42
 S2140014701160F6E7D0260020386E0020431E984103
 S214001480C0B2704710B5C0B00400064B9847E528B8
 S21400149001D940B010BD020021006846024B9847B3
-S2140014A0F7E7C046F17F01008D0C010010B500285B
+S2140014A0F7E7C046817E01008D0C010010B50028CC
 S2140014B001D0C06B10BD034B98470028F9D100201F
 S2140014C0F8E7C04609F6000010B5002801D0006C09
 S2140014D010BD034B98470028F9D10020F8E7C04616
@@ -370,7 +370,7 @@ S2140016F0104B98470600104B984700280BD0002E3A
 S214001700E8D034602800074B98478642E2D128008C
 S214001710074B9847DEE73200002308480849884709
 S214001720FEE7C0466D06010085060100293600006A
-S214001730751600001D0601007D1400009488010047
+S214001730751600001D0601007D14000024870100B8
 S21400174085140000002804D0C368002B03D0186856
 S21400175070470020FCE70020FAE7002803D0007D51
 S2140017608007C00F70470020FCE70000014B186898
@@ -398,12 +398,12 @@ S2140018B060211448A047144B9847144B98470120C2
 S2140018C0134B98470122014B1A70CFE7E4260020FD
 S2140018D0490A01009911010049030100F9F90000C5
 S2140018E031160000684D0020B905010030000020C8
-S2140018F0A288010091440100511C01009D42000095
+S2140018F03287010091440100511C01009D42000006
 S214001900C44C0020B84C0020F9170000F9E600008F
 S21400191059DC000070B504000D00094B98470028FC
 S21400192008D0342201231D40A35C012083432B43AF
 S214001930A35470BD22000023024803498847FEE7EF
-S2140019407D140000FC88010085140000F0B587B007
+S2140019407D1400008C87010085140000F0B587B078
 S21400195007000C0001921E00002904D00800254B49
 S214001960984700283CD003AB039400221A710592D6
 S214001970214B1B68002B00D0059303AA1E4B1A6050
@@ -415,22 +415,22 @@ S2140019C001305B060AD52068002811D03200019944
 S2140019D00C4B9847013842424241D0B207B0F0BDA6
 S2140019E022000023084809498847FEE70120F5E75A
 S2140019F00120F3E77D140000E0260020DC2600200E
-S214001A006D170000111A0000FC8801008514000004
+S214001A006D170000111A00008C8701008514000075
 S214001A1070B504000D001600002810D0094B98473A
 S214001A20002805D122000023074808498847FEE71A
 S214001A30A06933002A002100054CA04770BD012094
-S214001A40FCE7C0467D140000FC88010085140000F9
+S214001A40FCE7C0467D1400008C870100851400006A
 S214001A504D19000010B5002804D0C369002B03D030
 S214001A60984710BD0120FCE70120FAE710B50400F6
 S214001A70084B9847002805D122000023064807494E
 S214001A808847FEE700236386E369002206212000DC
-S214001A90984710BD7D140000FC88010085140000E6
+S214001A90984710BD7D1400008C8701008514000057
 S214001AA010B50400054B9847002801D0206810BDEB
 S214001AB022000023024803498847FEE77D14000001
-S214001AC0FC8801008514000070B50400094B984797
+S214001AC08C8701008514000070B50400094B984708
 S214001AD0002801D0084D06E02200002307480849E8
 S214001AE08847FEE704002000A8470028FAD1200017
-S214001AF070BDC0467D140000A11A0000FC880100DD
+S214001AF070BDC0467D140000A11A00008C8701004E
 S214001B0085140000F0B5C64600B50400194B98478A
 S214001B1000280FD02368002B03D02000164B9847D0
 S214001B2004001648164B9847071E1ED0144B9846BE
@@ -439,30 +439,30 @@ S214001B4039000E480F4B9847071E0ED03D00303523
 S214001B502800C0470028F3D0844206D001002800A1
 S214001B60B0470028ECD08442F8D1380004BC904638
 S214001B70F0BDC0467D140000C91A0000C44C002009
-S214001B806D06010085060100FC8801008514000032
+S214001B806D060100850601008C87010085140000A3
 S214001B9070B504000D000A4B9847002806D0002DAB
 S214001BA00AD0201D2900074B984770BD220000234D
 S214001BB0054806498847FEE7201D054B9847F4E789
-S214001BC07D14000085060100FC88010085140000D5
+S214001BC07D140000850601008C8701008514000046
 S214001BD06D06010070B504000D000A4B98470028FA
 S214001BE009D02000183010342178297001350134CE
 S214001BF0A042F9D170BD220000230348034988475C
-S214001C00FEE7C0467D140000FC8801008514000035
+S214001C00FEE7C0467D1400008C87010085140000A6
 S214001C1010B504000B4B9847002805D1220000237E
 S214001C2009480A498847FEE72000094B98470028DC
 S214001C3004D0238A008A181A00B210BD1023E05E72
-S214001C40FBE7C0467D140000FC88010085140000F8
+S214001C40FBE7C0467D1400008C8701008514000069
 S214001C50A11A000010B504000B4B9847002805D1C8
 S214001C602200002309480A498847FEE72000094B5E
 S214001C709847002804D0638A408A181A00B210BD1C
-S214001C801223E05EFBE7C0467D140000FC880100DE
+S214001C801223E05EFBE7C0467D1400008C8701004F
 S214001C9085140000A11A000010B50400074B9847F1
 S214001CA0002805D0A08A0130238AC01A00B210BDD1
 S214001CB022000023024803498847FEE77D140000FF
-S214001CC0FC8801008514000010B50400074B9847F7
+S214001CC08C8701008514000010B50400074B984768
 S214001CD0002805D0E08A0130638AC01A00B210BD21
 S214001CE022000023024803498847FEE77D140000CF
-S214001CF0FC8801008514000000B583B0002902D1DD
+S214001CF08C8701008514000000B583B0002902D14E
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 S214001D100821044B9847012801D10198F1E70020DB
 S214001D20EFE7C046551A0000F0B5DE465746464671
@@ -489,7 +489,7 @@ S214001E609847EDE7684D00206D06010085060100E5
 S214001E7055070100390B0100F91C0000215600002F
 S214001E80D14B000010B50400074B9847002804D03B
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-S214001EA003498847FEE7C0467D140000FC88010011
+S214001EA003498847FEE7C0467D1400008C87010082
 S214001EB085140000F0B585B004000E00304B98473E
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diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/ASF/sam0/boards/samd21_xplained_pro/board_init.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/ASF/sam0/boards/samd21_xplained_pro/board_init.o
index f61770e..a074ba2 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/ASF/sam0/boards/samd21_xplained_pro/board_init.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/ASF/sam0/boards/samd21_xplained_pro/board_init.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/devices/display/p_ssd1963.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/devices/display/p_ssd1963.o
index 608ca46..2c4c7d8 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/devices/display/p_ssd1963.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/devices/display/p_ssd1963.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_gpio.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_gpio.o
index e2e1114..5a6ed49 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_gpio.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_gpio.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_i2c.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_i2c.o
index 9eab873..f467f5e 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_i2c.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_i2c.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_time.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_time.o
index 9fdd8ba..0b2fd92 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_time.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_time.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_usart.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_usart.o
index 8a4ef00..93b9012 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_usart.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/drivers/p_usart.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/main.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/main.o
index f1c4dd6..b3255bb 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/main.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/main.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/oracle.o b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/oracle.o
index 9e0f2a4..a57c0c4 100644
Binary files a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/oracle.o and b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/Debug/src/oracle.o differ
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/oracle_test_d21.cproj b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/oracle_test_d21.cproj
index bfbdc2c..7841638 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/oracle_test_d21.cproj
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/oracle_test_d21.cproj
@@ -20,249 +20,249 @@
     <OverrideVtor>false</OverrideVtor>
     <CacheFlash>true</CacheFlash>
     <ProgFlashFromRam>true</ProgFlashFromRam>
-    <RamSnippetAddress />
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
     <UncachedRange />
     <preserveEEPROM>true</preserveEEPROM>
-    <OverrideVtorValue />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
     <BootSegment>2</BootSegment>
     <ResetRule>0</ResetRule>
     <eraseonlaunchrule>0</eraseonlaunchrule>
     <EraseKey />
     <AsfFrameworkConfig>
       <framework-data>
-  <options>
-    <option id="common.boards" value="Add" config="" content-id="Atmel.ASF" />
-    <option id="sam0.drivers.port" value="Add" config="" content-id="Atmel.ASF" />
-    <option id="sam0.drivers.sercom.i2c.master" value="Add" config="callback" content-id="Atmel.ASF" />
-    <option id="sam0.drivers.sercom.usart" value="Add" config="callback" content-id="Atmel.ASF" />
-    <option id="sam0.drivers.system" value="Add" config="" content-id="Atmel.ASF" />
-    <option id="common2.services.delay" value="Add" config="cycle" content-id="Atmel.ASF" />
-    <option id="common.applications.user_application.xplained_pro2" value="Add" config="" content-id="Atmel.ASF" />
-    <option id="common.utils" value="Add" config="" content-id="Atmel.ASF" />
-    <option id="sam0.utils.cmsis.samd21.source.template" value="Add" config="" content-id="Atmel.ASF" />
-  </options>
-  <configurations />
-  <files>
-    <file path="src/main.c" framework="" version="" source="common2/applications/xplained_pro_user_application/main.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/config/conf_board.h" framework="" version="" source="common2/applications/xplained_pro_user_application/samd21j18a_samd21_xplained_pro/config/conf_board.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/config/conf_clocks.h" framework="" version="" source="common2/applications/xplained_pro_user_application/samd21j18a_samd21_xplained_pro/config/conf_clocks.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/common/boards/board.h" framework="" version="" source="common/boards/board.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/common/utils/interrupt.h" framework="" version="" source="common/utils/interrupt.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/common/utils/interrupt/interrupt_sam_nvic.c" framework="" version="" source="common/utils/interrupt/interrupt_sam_nvic.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/common/utils/interrupt/interrupt_sam_nvic.h" framework="" version="" source="common/utils/interrupt/interrupt_sam_nvic.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/common/utils/parts.h" framework="" version="" source="common/utils/parts.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/boards/samd21_xplained_pro/board_init.c" framework="" version="" source="sam0/boards/samd21_xplained_pro/board_init.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/boards/samd21_xplained_pro/samd21_xplained_pro.h" framework="" version="" source="sam0/boards/samd21_xplained_pro/samd21_xplained_pro.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/port/port.c" framework="" version="" source="sam0/drivers/port/port.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/port/port.h" framework="" version="" source="sam0/drivers/port/port.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/port/quick_start/qs_port_basic.h" framework="" version="" source="sam0/drivers/port/quick_start/qs_port_basic.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/clock/clock.h" framework="" version="" source="sam0/drivers/system/clock/clock.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c" framework="" version="" source="sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock_config_check.h" framework="" version="" source="sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock_config_check.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock_feature.h" framework="" version="" source="sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock_feature.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.c" framework="" version="" source="sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/clock/gclk.h" framework="" version="" source="sam0/drivers/system/clock/gclk.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/interrupt/system_interrupt.c" framework="" version="" source="sam0/drivers/system/interrupt/system_interrupt.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/interrupt/system_interrupt.h" framework="" version="" source="sam0/drivers/system/interrupt/system_interrupt.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21/system_interrupt_features.h" framework="" version="" source="sam0/drivers/system/interrupt/system_interrupt_samd21/system_interrupt_features.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/pinmux/pinmux.c" framework="" version="" source="sam0/drivers/system/pinmux/pinmux.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/pinmux/pinmux.h" framework="" version="" source="sam0/drivers/system/pinmux/pinmux.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/pinmux/quick_start/qs_pinmux_basic.h" framework="" version="" source="sam0/drivers/system/pinmux/quick_start/qs_pinmux_basic.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/power/power_sam_d_r_h/power.h" framework="" version="" source="sam0/drivers/system/power/power_sam_d_r_h/power.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h/reset.h" framework="" version="" source="sam0/drivers/system/reset/reset_sam_d_r_h/reset.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/system.c" framework="" version="" source="sam0/drivers/system/system.c" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/drivers/system/system.h" framework="" version="" source="sam0/drivers/system/system.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/ac.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/ac.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/adc.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/adc.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/dac.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/dac.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/dmac.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/dmac.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/dsu.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/dsu.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/eic.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/eic.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/evsys.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/evsys.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/evsys_variant_d.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/evsys_variant_d.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/gclk.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/gclk.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/hmatrixb.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/hmatrixb.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/i2s.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/i2s.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/mtb.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/mtb.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/nvmctrl.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/nvmctrl.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/nvmctrl_variant_d.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/nvmctrl_variant_d.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/pac.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/pac.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/pm.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/pm.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/pm_variant_d.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/pm_variant_d.h" changed="False" content-id="Atmel.ASF" />
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-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/rtc.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/rtc.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/sercom.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/sercom.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/sysctrl.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/sysctrl.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/tc.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/tc.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/tcc.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/tcc.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/tcc_lighting.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/tcc_lighting.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/tcc_variant_d.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/tcc_variant_d.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/usb.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/usb.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/component/wdt.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/component/wdt.h" changed="False" content-id="Atmel.ASF" />
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-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/instance/wdt.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/instance/wdt.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/pio/samd21e15a.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/pio/samd21e15a.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/pio/samd21e15b.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/pio/samd21e15b.h" changed="False" content-id="Atmel.ASF" />
-    <file path="src/ASF/sam0/utils/cmsis/samd21/include/pio/samd21e15bu.h" framework="" version="" source="sam0/utils/cmsis/samd21/include/pio/samd21e15bu.h" changed="False" content-id="Atmel.ASF" />
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-  <offline-documentation help="" />
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-  </dependencies>
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-  <board id="board.samd21_xplained_pro" value="Add" config="" content-id="Atmel.ASF" />
-</framework-data>
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+          <option id="common.boards" value="Add" config="" content-id="Atmel.ASF" />
+          <option id="sam0.drivers.port" value="Add" config="" content-id="Atmel.ASF" />
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+          <option id="sam0.drivers.sercom.usart" value="Add" config="callback" content-id="Atmel.ASF" />
+          <option id="sam0.drivers.system" value="Add" config="" content-id="Atmel.ASF" />
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+          <option id="common.applications.user_application.xplained_pro2" value="Add" config="" content-id="Atmel.ASF" />
+          <option id="common.utils" value="Add" config="" content-id="Atmel.ASF" />
+          <option id="sam0.utils.cmsis.samd21.source.template" value="Add" config="" content-id="Atmel.ASF" />
+        </options>
+        <configurations />
+        <files>
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+          <file path="src/ASF/common/boards/board.h" framework="" version="" source="common/boards/board.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/common/utils/interrupt.h" framework="" version="" source="common/utils/interrupt.h" changed="False" content-id="Atmel.ASF" />
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+          <file path="src/ASF/common/utils/parts.h" framework="" version="" source="common/utils/parts.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/boards/samd21_xplained_pro/board_init.c" framework="" version="" source="sam0/boards/samd21_xplained_pro/board_init.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/boards/samd21_xplained_pro/samd21_xplained_pro.h" framework="" version="" source="sam0/boards/samd21_xplained_pro/samd21_xplained_pro.h" changed="False" content-id="Atmel.ASF" />
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+          <file path="src/ASF/sam0/drivers/port/port.h" framework="" version="" source="sam0/drivers/port/port.h" changed="False" content-id="Atmel.ASF" />
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+          <file path="src/ASF/sam0/drivers/system/clock/clock.h" framework="" version="" source="sam0/drivers/system/clock/clock.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c" framework="" version="" source="sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c" changed="False" content-id="Atmel.ASF" />
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+          <file path="src/ASF/sam0/drivers/sercom/sercom_pinout.h" framework="" version="3.47.0" source="sam0\drivers\sercom\sercom_pinout.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/sercom.h" framework="" version="3.47.0" source="sam0\drivers\sercom\sercom.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/usart.c" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\usart.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/usart_interrupt.c" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\usart_interrupt.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/quick_start_lin/qs_lin.h" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\quick_start_lin\qs_lin.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/quick_start/qs_usart_basic_use.h" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\quick_start\qs_usart_basic_use.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/usart_interrupt.h" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\usart_interrupt.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/quick_start_callback/qs_usart_callback.h" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\quick_start_callback\qs_usart_callback.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/usart.h" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\usart.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/usart/quick_start_dma/qs_usart_dma_use.h" framework="" version="3.47.0" source="sam0\drivers\sercom\usart\quick_start_dma\qs_usart_dma_use.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/i2c_master_interrupt.h" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\i2c_master_interrupt.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/i2c_common.h" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\i2c_common.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/quick_start_master_callback/qs_i2c_master_callback.h" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\quick_start_master_callback\qs_i2c_master_callback.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/quick_start_master/qs_i2c_master_basic_use.h" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\quick_start_master\qs_i2c_master_basic_use.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/i2c_master.h" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\i2c_master.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/quick_start_master_dma/qs_i2c_master_dma.h" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\quick_start_master_dma\qs_i2c_master_dma.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/i2c_sam0/i2c_master.c" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\i2c_sam0\i2c_master.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/sercom/i2c/i2c_sam0/i2c_master_interrupt.c" framework="" version="3.47.0" source="sam0\drivers\sercom\i2c\i2c_sam0\i2c_master_interrupt.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/common2/services/delay/sam0/cycle_counter.c" framework="" version="3.47.0" source="common2\services\delay\sam0\cycle_counter.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/common2/services/delay/sam0/cycle_counter.h" framework="" version="3.47.0" source="common2\services\delay\sam0\cycle_counter.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/common2/services/delay/delay.h" framework="" version="3.47.0" source="common2\services\delay\delay.h" changed="False" content-id="Atmel.ASF" />
+        </files>
+        <documentation help="http://asf.atmel.com/docs/3.47.0/common.applications.user_application.xplained_pro2.samd21_xplained_pro/html/index.html" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.47.0" />
+        </dependencies>
+        <project id="common.applications.user_application.xplained_pro2.samd21_xplained_pro" value="Add" config="" content-id="Atmel.ASF" />
+        <board id="board.samd21_xplained_pro" value="Add" config="" content-id="Atmel.ASF" />
+      </framework-data>
     </AsfFrameworkConfig>
   </PropertyGroup>
   <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/config/conf_board.h b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/config/conf_board.h
index 1b762ab..d32b6b2 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/config/conf_board.h
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/config/conf_board.h
@@ -53,7 +53,7 @@
 #define I2C_MASTER_PINMUX_PAD1		PINMUX_PA09D_SERCOM2_PAD1
 
 // GPIO -- SSD1963 Display Controller
-#define SSD1963_TFT_DATA_MASK		(0x1C03C3F7)
+#define SSD1963_TFT_DATA_MASK		(0xFFFF)
 #define SSD1963_TFT_DATA_PORT		((PortGroup*)&PORT->Group[1])
 #define SSD1963_TFT_DATA_DIR		PORT_PIN_DIR_OUTPUT
 #define SSD1963_TFT_DATA_PULL		PORT_PIN_PULL_NONE
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.c b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.c
index 0214a1b..d100904 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.c
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.c
@@ -51,82 +51,107 @@ static bool cmd_mode = true;
 
 void ssd1963_init(void)
 {
-    LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
-    cmd_mode = true;
-
-    LV_DRV_DELAY_MS(250);
-
+	asm volatile("nop");
+	p_gpio_parallel_wr_word(SSD1963_TFT_DATA_PORT, SSD1963_TFT_DATA_MASK, 0xAAAA);
+	asm volatile("nop");
+	delay_ms(100);
+	LV_DRV_DISP_RST(1);
+	delay_ms(100);
+	delay_ms(100);
+	ssd1963_cmd(0x0001);    // software reset
+	ssd1963_cmd(0x0001);    // software reset
+	ssd1963_cmd(0x0001);    // software reset
 
     ssd1963_cmd(0x00E2);    //PLL multiplier, set PLL clock to 120M
     ssd1963_data(0x0023);   //N=0x36 for 6.5M, 0x23 for 10M crystal
     ssd1963_data(0x0002);
-    ssd1963_data(0x0004);
+    ssd1963_data(0x0054);
     ssd1963_cmd(0x00E0);    // PLL enable
     ssd1963_data(0x0001);
-    LV_DRV_DELAY_MS(1);
+	delay_us(100);
     ssd1963_cmd(0x00E0);
     ssd1963_data(0x0003);   // now, use PLL output as system clock
-    LV_DRV_DELAY_MS(1);
-    ssd1963_cmd(0x0001);    // software reset
-    LV_DRV_DELAY_MS(1);
-    ssd1963_cmd(0x00E6);    //PLL setting for PCLK, depends on resolution
-
-    ssd1963_data(0x0001);  //HX8257C
-    ssd1963_data(0x0033);  //HX8257C
-    ssd1963_data(0x0033);  //HX8257C
-
 
     ssd1963_cmd(0x00B0);    //LCD SPECIFICATION
+    ssd1963_data(0x0028);
     ssd1963_data(0x0020);
-    ssd1963_data(0x0000);
     ssd1963_data(((SSD1963_HOR_RES - 1) >> 8) & 0X00FF); //Set HDP
     ssd1963_data((SSD1963_HOR_RES - 1) & 0X00FF);
     ssd1963_data(((SSD1963_VER_RES - 1) >> 8) & 0X00FF); //Set VDP
     ssd1963_data((SSD1963_VER_RES - 1) & 0X00FF);
     ssd1963_data(0x0000);
-    LV_DRV_DELAY_MS(1);//Delay10us(5);
-    ssd1963_cmd(0x00B4);            //HSYNC
-    ssd1963_data((SSD1963_HT >> 8) & 0X00FF); //Set HT
-    ssd1963_data(SSD1963_HT & 0X00FF);
-    ssd1963_data((SSD1963_HPS >> 8) & 0X00FF); //Set HPS
-    ssd1963_data(SSD1963_HPS & 0X00FF);
-    ssd1963_data(SSD1963_HPW);              //Set HPW
-    ssd1963_data((SSD1963_LPS >> 8) & 0X00FF); //SetLPS
-    ssd1963_data(SSD1963_LPS & 0X00FF);
-    ssd1963_data(0x0000);
-
-    ssd1963_cmd(0x00B6);            //VSYNC
-    ssd1963_data((SSD1963_VT >> 8) & 0X00FF); //Set VT
-    ssd1963_data(SSD1963_VT & 0X00FF);
-    ssd1963_data((SSD1963_VPS >> 8) & 0X00FF); //Set VPS
-    ssd1963_data(SSD1963_VPS & 0X00FF);
-    ssd1963_data(SSD1963_VPW);              //Set VPW
-    ssd1963_data((SSD1963_FPS >> 8) & 0X00FF); //Set FPS
-    ssd1963_data(SSD1963_FPS & 0X00FF);
-
-    ssd1963_cmd(0x00B8);
-    ssd1963_data(0x000f);    //GPIO is controlled by host GPIO[3:0]=output   GPIO[0]=1  LCD ON  GPIO[0]=1  LCD OFF
-    ssd1963_data(0x0001);    //GPIO0 normal
-
-    ssd1963_cmd(0x00BA);
-    ssd1963_data(0x0001);    //GPIO[0] out 1 --- LCD display on/off control PIN
-
-    ssd1963_cmd(0x0036);    //rotation
-    ssd1963_data(0x0008);   //RGB=BGR
-
-    ssd1963_cmd(0x003A);    //Set the current pixel format for RGB image data
-    ssd1963_data(0x0050);   //16-bit/pixel
-
-    ssd1963_cmd(0x00F0);    //Pixel Data Interface Format
-    ssd1963_data(0x0003);   //16-bit(565 format) data
-
-    ssd1963_cmd(0x00BC);
-    ssd1963_data(0x0040);   //contrast value
-    ssd1963_data(0x0080);   //brightness value
-    ssd1963_data(0x0040);   //saturation value
-    ssd1963_data(0x0001);   //Post Processor Enable
-
-    LV_DRV_DELAY_MS(1);
+	
+	
+	ssd1963_cmd(0x00F0);    //Pixel Data Interface Format
+	ssd1963_data(0x0003);   //16-bit(565 format) data
+	
+	
+	ssd1963_cmd(0x003A);    //Set the current pixel format for RGB image data
+	ssd1963_data(0x0050);   //16-bit/pixel
+	
+	ssd1963_cmd(0x00E6);    //PLL setting for PCLK, depends on resolution
+	ssd1963_data(0x04);
+	ssd1963_data(0x3A);
+	ssd1963_data(0xB6);
+
+ 
+
+	ssd1963_cmd(0xb4);          //SET HBP,
+	ssd1963_data(0x04);      //SET HSYNC Tatol 525
+	ssd1963_data(0x20);
+	ssd1963_data(0x00);      //SET HBP 43
+	ssd1963_data(0x30);
+	ssd1963_data(0x30);      //SET VBP 41=40+1
+	ssd1963_data(0x00);      //SET Hsync pulse start position
+	ssd1963_data(0x00);
+	ssd1963_data(0x00);      //SET Hsync pulse subpixel start position
+    //ssd1963_cmd(0x00B4);            //HSYNC
+    //ssd1963_data((SSD1963_HT >> 8) & 0X00FF); //Set HT
+    //ssd1963_data(SSD1963_HT & 0X00FF);
+    //ssd1963_data((SSD1963_HPS >> 8) & 0X00FF); //Set HPS
+    //ssd1963_data(SSD1963_HPS & 0X00FF);
+    //ssd1963_data(SSD1963_HPW);              //Set HPW
+    //ssd1963_data((SSD1963_LPS >> 8) & 0X00FF); //SetLPS
+    //ssd1963_data(SSD1963_LPS & 0X00FF);
+    //ssd1963_data(0x0000);
+
+	ssd1963_cmd(0xb6);          //SET VBP,
+	ssd1963_data(0x02);      //SET Vsync total 286=285+1
+	ssd1963_data(0x0D);
+	ssd1963_data(0x00);      //SET VBP=12
+	ssd1963_data(0x16);
+	ssd1963_data(0x04);      //SET Vsync pulse 10=9+1
+	ssd1963_data(0x00);      //SET Vsync pulse start position
+	ssd1963_data(0x00);
+    //ssd1963_cmd(0x00B6);            //VSYNC
+    //ssd1963_data((SSD1963_VT >> 8) & 0X00FF); //Set VT
+    //ssd1963_data(SSD1963_VT & 0X00FF);
+    //ssd1963_data((SSD1963_VPS >> 8) & 0X00FF); //Set VPS
+    //ssd1963_data(SSD1963_VPS & 0X00FF);
+    //ssd1963_data(SSD1963_VPW);              //Set VPW
+    //ssd1963_data((SSD1963_FPS >> 8) & 0X00FF); //Set FPS
+    //ssd1963_data(SSD1963_FPS & 0X00FF);
+
+    //ssd1963_cmd(0x00B8);
+    //ssd1963_data(0x000f);    //GPIO is controlled by host GPIO[3:0]=output   GPIO[0]=1  LCD ON  GPIO[0]=1  LCD OFF
+    //ssd1963_data(0x0001);    //GPIO0 normal
+//
+    //ssd1963_cmd(0x00BA);
+    //ssd1963_data(0x0001);    //GPIO[0] out 1 --- LCD display on/off control PIN
+//
+    //ssd1963_cmd(0x0036);    //rotation
+    //ssd1963_data(0x0008);   //RGB=BGR
+//
+//
+//
+//
+    //ssd1963_cmd(0x00BC);
+    //ssd1963_data(0x0040);   //contrast value
+    //ssd1963_data(0x0080);   //brightness value
+    //ssd1963_data(0x0040);   //saturation value
+    //ssd1963_data(0x0001);   //Post Processor Enable
+//
+    //LV_DRV_DELAY_MS(1);
 
     ssd1963_cmd(0x0029); //display on
 
@@ -138,8 +163,8 @@ void ssd1963_init(void)
     ssd1963_data(0x0000);
     ssd1963_data(0x0000);
 
-    ssd1963_cmd(0x00d0);
-    ssd1963_data(0x000d);
+    //ssd1963_cmd(0x00d0);
+    //ssd1963_data(0x000d);
 
     //DisplayBacklightOn();
 
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.h b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.h
index 3af3baf..615f6e2 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.h
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/devices/display/p_ssd1963.h
@@ -25,10 +25,10 @@ extern "C" {
 #  define SSD1963_HPS         480			// non-display period between the start of the hori sync (LLINE) signal
 #  define SSD1963_LPS         40				// horizontal sync pulse (LLINE) start location
 #  define SSD1963_HPW         5			// horizontal pulse width
-#  define SSD1963_VT          288			// vertical total (period)
+#  define SSD1963_VT          272			// vertical total (period)
 #  define SSD1963_VPS         272			// vertical period start ( non-display period in lines between the start of the frame and the first display data in line.)
-#  define SSD1963_FPS         8				// vertical sync pulse (LFRAME) start location in lines
-#  define SSD1963_VPW         8			// vertical sync pulse width
+#  define SSD1963_FPS         2				// vertical sync pulse (LFRAME) start location in lines
+#  define SSD1963_VPW         10			// vertical sync pulse width
 #  define SSD1963_HS_NEG      0   /*Negative hsync*/
 #  define SSD1963_VS_NEG      0   /*Negative vsync*/
 #  define SSD1963_ORI         0   /*0, 90, 180, 270*/
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.c b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.c
index 6e88955..3bbab3d 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.c
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.c
@@ -31,7 +31,9 @@ void p_gpio_parallel_wr_word(PortGroup* group, uint32_t mask, uint32_t data)
 {
 	port_group_set_output_level(group, mask, data);
 	port_pin_set_output_level(SSD1963_TFT_WR, 0);
+	delay_us(1);
 	port_pin_set_output_level(SSD1963_TFT_WR, 1);
+	delay_us(1);
 }
 
 void p_gpio_parallel_wr_arr(PortGroup* group, uint32_t mask, uint32_t* data, uint32_t len)
diff --git a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.h b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.h
index d45519b..3ac4faa 100644
--- a/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.h
+++ b/software/firmware/project_oracle_test_firmware/d21/oracle_test_d21/oracle_test_d21/src/drivers/p_gpio.h
@@ -11,7 +11,7 @@ void p_gpio_parallel_wr_arr(PortGroup* group, uint32_t mask, uint32_t* data, uin
 
 #define LV_DRV_DELAY_MS(x)			delay_ms(x)
 #define LV_DRV_DISP_CMD_DATA(x)		port_pin_set_output_level(SSD1963_TFT_RSDC, x)
-#define LV_DRV_DISP_RST(x)			port_pin_set_output_level(SSD1963_TFT_nRST, !x)
+#define LV_DRV_DISP_RST(x)			port_pin_set_output_level(SSD1963_TFT_nRST, x)
 #define LV_DRV_DISP_PAR_WR_WORD(x)	p_gpio_parallel_wr_word(SSD1963_TFT_DATA_PORT, SSD1963_TFT_DATA_MASK, x)
 #define LV_DRV_DISP_PAR_WR_ARRAY(x, n)	p_gpio_parallel_wr_arr(SSD1963_TFT_DATA_PORT, SSD1963_TFT_DATA_MASK, x, n)
 #define LV_DRV_DISP_PAR_CS(x)		port_pin_set_output_level(SSD1963_TFT_nCS, x)