diff --git a/doc/.~lock.parts_list.ods# b/doc/.~lock.parts_list.ods#
index 4548385..5b78b65 100644
--- a/doc/.~lock.parts_list.ods#
+++ b/doc/.~lock.parts_list.ods#
@@ -1 +1 @@
-,penguin,penguin-pc,19.03.2020 17:46,file:///home/penguin/.config/libreoffice/4;
\ No newline at end of file
+,penguin,penguin-pc,19.03.2020 23:26,file:///home/penguin/.config/libreoffice/4;
\ No newline at end of file
diff --git a/doc/parts_list.ods b/doc/parts_list.ods
index 571cfcf..e9a1591 100644
Binary files a/doc/parts_list.ods and b/doc/parts_list.ods differ
diff --git a/electrical/same54_dev_board/BRAIN.sch b/electrical/same54_dev_board/BRAIN.sch
new file mode 100644
index 0000000..2722954
--- /dev/null
+++ b/electrical/same54_dev_board/BRAIN.sch
@@ -0,0 +1,333 @@
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+$Comp
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diff --git a/electrical/same54_dev_board/BRAIN.sch-bak b/electrical/same54_dev_board/BRAIN.sch-bak
new file mode 100644
index 0000000..2722954
--- /dev/null
+++ b/electrical/same54_dev_board/BRAIN.sch-bak
@@ -0,0 +1,333 @@
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+$EndSCHEMATC
diff --git a/electrical/same54_dev_board/Power.sch b/electrical/same54_dev_board/Power.sch
new file mode 100644
index 0000000..ce96628
--- /dev/null
+++ b/electrical/same54_dev_board/Power.sch
@@ -0,0 +1,53 @@
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diff --git a/electrical/same54_dev_board/_autosave-Power.sch b/electrical/same54_dev_board/Power.sch-bak
similarity index 68%
rename from electrical/same54_dev_board/_autosave-Power.sch
rename to electrical/same54_dev_board/Power.sch-bak
index 95b6b9e..57acf94 100644
--- a/electrical/same54_dev_board/_autosave-Power.sch
+++ b/electrical/same54_dev_board/Power.sch-bak
@@ -3,7 +3,7 @@ EELAYER 30 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
-Sheet 2 4
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 Title ""
 Date ""
 Rev ""
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 Comment4 ""
 $EndDescr
 $Comp
-L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
+L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U1
 U 5 1 5E84F3B3
 P 4800 3300
-F 0 "U?" H 4800 4215 50  0000 C CNN
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 F 1 "p_ATSAME54P20A-AU" H 4800 4124 50  0000 C CNN
-F 2 "" H 3600 4550 50  0001 C CNN
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 F 3 "" H 3600 4550 50  0001 C CNN
 	5    4800 3300
 	1    0    0    -1  
diff --git a/electrical/same54_dev_board/SCREEN_INTF.sch b/electrical/same54_dev_board/SCREEN_INTF.sch
new file mode 100644
index 0000000..0b515b2
--- /dev/null
+++ b/electrical/same54_dev_board/SCREEN_INTF.sch
@@ -0,0 +1,638 @@
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+EELAYER END
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+encoding utf-8
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+F 2 "Connector_IDC:IDC-Header_2x20_P2.54mm_Horizontal" H 9500 4050 50  0001 C CNN
+F 3 "file:///home/penguin/Downloads/SSD1963_v1.6.pdf" H 9500 4050 50  0001 C CNN
+	1    9900 4050
+	1    0    0    -1  
+$EndComp
+Text GLabel 900  750  0    50   Input ~ 0
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+Text Label 1150 750  0    50   ~ 0
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+Wire Wire Line
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+Wire Wire Line
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+F 3 "" H 7900 5800 50  0001 C CNN
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+D23
+Text Notes 7150 1150 0    50   ~ 0
+LCD INTF -- LCD Interface Section\n - D[0-23] represent data pins on the 8080 (parallel) bus\n - The MAX7301 is an IO expander acting as the data bus middleman\n    between the brain and the ssd1963\n - The lcd control pins will still be controlled directly from the brain to alleviate timing issues and \n    because its just going to be easier to debug\n - The MAX7301 is going to be run at something around 20MHz so we should be ok with timing
+Wire Notes Line
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+Wire Notes Line
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+Wire Notes Line
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+Wire Notes Line
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+NoConn ~ 7900 5150
+NoConn ~ 7900 5250
+NoConn ~ 7900 5350
+NoConn ~ 7900 5450
+Text Notes 7500 2650 0    50   ~ 0
+this looks atrocious but idk how to make busses vertical ,,,
+$Comp
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+F 0 "U3" H 7200 6120 50  0000 C CNN
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+F 7 "Unavailable" H 7200 4650 50  0001 L BNN "Field7"
+F 8 "MAX7301AAX+" H 7200 4650 50  0001 L BNN "Field8"
+	1    7200 4650
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+$EndComp
+Connection ~ 7900 5750
+Wire Wire Line
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+	1    8200 3000
+	1    0    0    -1  
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+$Comp
+L power:GND #PWR0107
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+F 2 "" H 8200 3200 50  0001 C CNN
+F 3 "" H 8200 3200 50  0001 C CNN
+	1    8200 3200
+	1    0    0    -1  
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+Power Interface
+Wire Wire Line
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+MASTER_SPI_MOSI
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+~IO_EXPANDER_CS
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+TFT_TOUCH_SDA
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+Text HLabel 1350 2850 0    50   Input ~ 0
+TFT_TOUCH_INT
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+Text Label 1600 1550 0    50   ~ 0
+IO_EXP_DOUT
+Wire Wire Line
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+Wire Wire Line
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+Text Label 1600 1650 0    50   ~ 0
+IO_EXP_DIN
+Wire Wire Line
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+Text Label 1600 1750 0    50   ~ 0
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+Wire Wire Line
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+Wire Wire Line
+	1350 2300 1600 2300
+Text Label 1600 2300 0    50   ~ 0
+~TFT_RST
+Text Label 1600 2400 0    50   ~ 0
+TFT_STB
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+Text Label 1600 2650 0    50   ~ 0
+TFT_TOUCH_SDA
+Wire Wire Line
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+Wire Wire Line
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+TFT_TOUCH_INT
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+Wire Wire Line
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+Text Label 8000 3650 0    50   ~ 0
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+Wire Wire Line
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+Text Label 8000 3750 0    50   ~ 0
+IO_EXP_CLK
+Wire Wire Line
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+Text Label 8000 3850 0    50   ~ 0
+IO_EXP_DIN
+Wire Wire Line
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+Text Label 8000 3950 0    50   ~ 0
+IO_EXP_DOUT
+Wire Wire Line
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+Text Label 10600 3550 0    50   ~ 0
+~TFT_WR
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+TFT_TE
+Wire Wire Line
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+Text Label 1600 2500 0    50   ~ 0
+TFT_TE
+Wire Wire Line
+	10500 3450 10600 3450
+NoConn ~ 10500 3350
+Wire Wire Line
+	10500 3250 10600 3250
+Text Label 10600 3250 0    50   ~ 0
+TFT_TOUCH_SDA
+Wire Wire Line
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+Wire Wire Line
+	10600 3150 10600 2500
+Wire Wire Line
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+Wire Wire Line
+	10850 2500 10850 2650
+$Comp
+L power:GND #PWR?
+U 1 1 5EC6B772
+P 10850 2650
+F 0 "#PWR?" H 10850 2400 50  0001 C CNN
+F 1 "GND" H 10855 2477 50  0000 C CNN
+F 2 "" H 10850 2650 50  0001 C CNN
+F 3 "" H 10850 2650 50  0001 C CNN
+	1    10850 2650
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+TFT_TOUCH_SCL
+Text Label 9250 3350 2    50   ~ 0
+TFT_TOUCH_INT
+Wire Wire Line
+	9250 3350 9300 3350
+Text Label 9250 3450 2    50   ~ 0
+~TFT_RST
+Wire Wire Line
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+Wire Wire Line
+	9300 3550 9250 3550
+Text Label 9250 3550 2    50   ~ 0
+~TFT_CS
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+TFT_RSDC
+Text Label 10600 3650 0    50   ~ 0
+TFT_TE
+Wire Wire Line
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+Text Label 9250 3650 2    50   ~ 0
+~TFT_RD
+Wire Wire Line
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+Text Label 9200 4950 2    50   ~ 0
+TFT_STB
+Wire Bus Line
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+Wire Bus Line
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+Entry Bus Bus
+	8850 4850 8950 4750
+Wire Bus Line
+	8950 4750 9050 4750
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+Wire Bus Line
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+Wire Bus Line
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+Entry Bus Bus
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+$EndSCHEMATC
diff --git a/electrical/same54_dev_board/SCREEN_INTF.sch-bak b/electrical/same54_dev_board/SCREEN_INTF.sch-bak
new file mode 100644
index 0000000..0b515b2
--- /dev/null
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+F 2 "Connector_IDC:IDC-Header_2x20_P2.54mm_Horizontal" H 9500 4050 50  0001 C CNN
+F 3 "file:///home/penguin/Downloads/SSD1963_v1.6.pdf" H 9500 4050 50  0001 C CNN
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+LCD INTF -- LCD Interface Section\n - D[0-23] represent data pins on the 8080 (parallel) bus\n - The MAX7301 is an IO expander acting as the data bus middleman\n    between the brain and the ssd1963\n - The lcd control pins will still be controlled directly from the brain to alleviate timing issues and \n    because its just going to be easier to debug\n - The MAX7301 is going to be run at something around 20MHz so we should be ok with timing
+Wire Notes Line
+	7100 550  11150 550 
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+NoConn ~ 7900 5450
+Text Notes 7500 2650 0    50   ~ 0
+this looks atrocious but idk how to make busses vertical ,,,
+$Comp
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+F 2 "proj_modules:SOP80P1030X264-36N" H 7200 4650 50  0001 L BNN
+F 3 "https://datasheets.maximintegrated.com/en/ds/MAX7301.pdf" H 7200 4650 50  0001 L BNN
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+F 5 "Interface IC - I/O extensions Maxim Integrated MAX7301AAX+ SPI 26 MHz SSOP 36" H 7200 4650 50  0001 L BNN "Field5"
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+F 7 "Unavailable" H 7200 4650 50  0001 L BNN "Field7"
+F 8 "MAX7301AAX+" H 7200 4650 50  0001 L BNN "Field8"
+	1    7200 4650
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+$EndComp
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+	1    8200 3000
+	1    0    0    -1  
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+F 3 "" H 8200 3200 50  0001 C CNN
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+Text Label 8000 3650 0    50   ~ 0
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+Text Label 8000 3950 0    50   ~ 0
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+NoConn ~ 10500 3350
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+Text Label 10600 3250 0    50   ~ 0
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+	10850 2500 10850 2650
+$Comp
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+F 0 "#PWR?" H 10850 2400 50  0001 C CNN
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+F 2 "" H 10850 2650 50  0001 C CNN
+F 3 "" H 10850 2650 50  0001 C CNN
+	1    10850 2650
+	1    0    0    -1  
+$EndComp
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+Wire Wire Line
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+Text Label 9250 3450 2    50   ~ 0
+~TFT_RST
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+Wire Wire Line
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+~TFT_CS
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+Text Label 10600 3650 0    50   ~ 0
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+Wire Wire Line
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+~TFT_RD
+Wire Wire Line
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+Text Label 9200 4950 2    50   ~ 0
+TFT_STB
+Wire Bus Line
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+Wire Bus Line
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+Entry Bus Bus
+	8850 4850 8950 4750
+Wire Bus Line
+	8950 4750 9050 4750
+Wire Bus Line
+	8550 3950 8600 3950
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+	8600 3950 8700 3850
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+	8700 3850 8750 3850
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+Wire Bus Line
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+Wire Bus Line
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+Entry Bus Bus
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+$EndSCHEMATC
diff --git a/electrical/same54_dev_board/USB_INTF.sch b/electrical/same54_dev_board/USB_INTF.sch
new file mode 100644
index 0000000..015f51a
--- /dev/null
+++ b/electrical/same54_dev_board/USB_INTF.sch
@@ -0,0 +1,107 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 3 5
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text GLabel 900  800  0    50   Input ~ 0
+g_3v3
+Text GLabel 850  1000 0    50   Input ~ 0
+g_5v
+Wire Wire Line
+	900  800  1200 800 
+Text Label 1200 800  0    50   ~ 0
+3v3
+Wire Wire Line
+	850  1000 1200 1000
+Text Label 1200 1000 0    50   ~ 0
+5v
+$Comp
+L Connector:USB_B_Micro J1
+U 1 1 5E8480AD
+P 5050 3000
+F 0 "J1" H 5107 3467 50  0000 C CNN
+F 1 "USB_B_Micro" H 5107 3376 50  0000 C CNN
+F 2 "Connector_USB:USB_Micro-B_Wuerth_629105150521" H 5200 2950 50  0001 C CNN
+F 3 "~" H 5200 2950 50  0001 C CNN
+	1    5050 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L dk_Interface-Controllers:FT232RQ-REEL U2
+U 1 1 5E84744C
+P 7700 2500
+F 0 "U2" H 8000 1100 60  0000 C CNN
+F 1 "FT232RQ-REEL" H 8300 1200 60  0000 C CNN
+F 2 "digikey-footprints:QFN-32-1EP_5x5mm" H 7900 2700 60  0001 L CNN
+F 3 "https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT232R.pdf" H 7900 2800 60  0001 L CNN
+F 4 "768-1008-1-ND" H 7900 2900 60  0001 L CNN "Digi-Key_PN"
+F 5 "FT232RQ-REEL" H 7900 3000 60  0001 L CNN "MPN"
+F 6 "Integrated Circuits (ICs)" H 7900 3100 60  0001 L CNN "Category"
+F 7 "Interface - Controllers" H 7900 3200 60  0001 L CNN "Family"
+F 8 "https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT232R.pdf" H 7900 3300 60  0001 L CNN "DK_Datasheet_Link"
+F 9 "/product-detail/en/ftdi-future-technology-devices-international-ltd/FT232RQ-REEL/768-1008-1-ND/1836403" H 7900 3400 60  0001 L CNN "DK_Detail_Page"
+F 10 "IC USB FS SERIAL UART 32-QFN" H 7900 3500 60  0001 L CNN "Description"
+F 11 "FTDI, Future Technology Devices International Ltd" H 7900 3600 60  0001 L CNN "Manufacturer"
+F 12 "Active" H 7900 3700 60  0001 L CNN "Status"
+	1    7700 2500
+	1    0    0    -1  
+$EndComp
+Text Notes 650  700  0    50   ~ 0
+Power Interface
+Wire Notes Line
+	600  600  1400 600 
+Wire Notes Line
+	1400 600  1400 1100
+Wire Notes Line
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+Wire Notes Line
+	600  1100 600  600 
+Text Notes 650  1350 0    50   ~ 0
+Power Interface
+Text HLabel 1050 1450 0    50   Input ~ 0
+DEBUG_TX
+Wire Wire Line
+	1050 1450 1300 1450
+Text Label 1300 1450 0    50   ~ 0
+FTDI_RX
+Text HLabel 1050 1550 0    50   Input ~ 0
+DEBUG_RX
+Wire Wire Line
+	1050 1550 1300 1550
+Text Label 1300 1550 0    50   ~ 0
+FTDI_TX
+Wire Wire Line
+	5350 3000 5400 3000
+Text Label 5400 3000 0    50   ~ 0
+USB_D+
+Wire Wire Line
+	5350 3100 5400 3100
+Text Label 5400 3100 0    50   ~ 0
+USB_D-
+Wire Wire Line
+	7000 3400 6900 3400
+Wire Wire Line
+	7000 3500 6900 3500
+Text Label 6900 3400 2    50   ~ 0
+USB_D+
+Text Label 6900 3500 2    50   ~ 0
+USB_D-
+Wire Wire Line
+	8000 3000 8100 3000
+Text Label 8100 3000 0    50   ~ 0
+FTDI_TX
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diff --git a/electrical/same54_dev_board/USB_INTF.sch-bak b/electrical/same54_dev_board/USB_INTF.sch-bak
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diff --git a/electrical/same54_dev_board/_autosave-BRAIN.sch b/electrical/same54_dev_board/_autosave-BRAIN.sch
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-this looks atrocious but idk how to make busses vertical ,,,
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diff --git a/electrical/same54_dev_board/_autosave-USB_INTF.sch b/electrical/same54_dev_board/_autosave-USB_INTF.sch
deleted file mode 100644
index cbaf7a1..0000000
--- a/electrical/same54_dev_board/_autosave-USB_INTF.sch
+++ /dev/null
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diff --git a/electrical/same54_dev_board/_autosave-same54_dev_board.sch b/electrical/same54_dev_board/_autosave-same54_dev_board.sch
deleted file mode 100644
index 8e2615a..0000000
--- a/electrical/same54_dev_board/_autosave-same54_dev_board.sch
+++ /dev/null
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-	1800 6250 1900 6250
-$Comp
-L power:PWR_FLAG #FLG?
-U 1 1 5E97F87F
-P 1900 5850
-F 0 "#FLG?" H 1900 5925 50  0001 C CNN
-F 1 "PWR_FLAG" H 1900 6023 50  0000 C CNN
-F 2 "" H 1900 5850 50  0001 C CNN
-F 3 "~" H 1900 5850 50  0001 C CNN
-	1    1900 5850
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	1900 6250 1900 5850
-Connection ~ 1900 6250
-Wire Wire Line
-	1900 6250 2150 6250
-$Comp
-L power:PWR_FLAG #FLG?
-U 1 1 5E980A5B
-P 2600 5850
-F 0 "#FLG?" H 2600 5925 50  0001 C CNN
-F 1 "PWR_FLAG" H 2600 6023 50  0000 C CNN
-F 2 "" H 2600 5850 50  0001 C CNN
-F 3 "~" H 2600 5850 50  0001 C CNN
-	1    2600 5850
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	2600 6250 2600 5850
-$EndSCHEMATC
diff --git a/electrical/same54_dev_board/same54_dev_board-cache.lib b/electrical/same54_dev_board/same54_dev_board-cache.lib
index cd05942..ad80e8d 100644
--- a/electrical/same54_dev_board/same54_dev_board-cache.lib
+++ b/electrical/same54_dev_board/same54_dev_board-cache.lib
@@ -96,6 +96,158 @@ X ~TFT_CS 9 -600 500 150 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# Connector_Conn_ARM_JTAG_SWD_10
+#
+DEF Connector_Conn_ARM_JTAG_SWD_10 J 0 40 Y Y 1 F N
+F0 "J" -100 650 50 H V R CNN
+F1 "Connector_Conn_ARM_JTAG_SWD_10" -100 550 50 H V R BNN
+F2 "" 0 0 50 H I C CNN
+F3 "" -350 -1250 50 V I C CNN
+$FPLIST
+ PinHeader?2x05?P1.27mm*
+$ENDFPLIST
+DRAW
+S -400 500 400 -500 0 1 10 f
+S -110 -500 -90 -460 0 1 0 N
+S -10 -500 10 -460 0 1 0 N
+S -10 500 10 460 0 1 0 N
+S 360 90 400 110 0 1 0 N
+S 400 -110 360 -90 0 1 0 N
+S 400 -10 360 10 0 1 0 N
+S 400 310 360 290 0 1 0 N
+S 360 -210 400 -190 1 1 0 N
+X VTref 1 0 600 100 D 50 50 1 1 W
+X ~RESET~ 10 500 300 100 L 50 50 1 1 C
+X SWDIO/TMS 2 500 0 100 L 50 50 1 1 B
+X GND 3 0 -600 100 U 50 50 1 1 W
+X SWDCLK/TCK 4 500 100 100 L 50 50 1 1 O
+X GND 5 0 -600 100 U 50 50 1 1 P N
+X SWO/TDO 6 500 -100 100 L 50 50 1 1 I
+X KEY 7 -400 0 100 R 50 50 1 1 N N
+X NC/TDI 8 500 -200 100 L 50 50 1 1 O
+X GNDDetect 9 -100 -600 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Connector_USB_B_Micro
+#
+DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N
+F0 "J" -200 450 50 H V L CNN
+F1 "Connector_USB_B_Micro" -200 350 50 H V L CNN
+F2 "" 150 -50 50 H I C CNN
+F3 "" 150 -50 50 H I C CNN
+ALIAS USB_B_Mini
+$FPLIST
+ USB*
+$ENDFPLIST
+DRAW
+C -150 85 25 0 1 10 F
+C -25 135 15 0 1 10 F
+S -200 -300 200 300 0 1 10 f
+S -5 -300 5 -270 0 1 0 N
+S 10 50 -20 20 0 1 10 F
+S 200 -205 170 -195 0 1 0 N
+S 200 -105 170 -95 0 1 0 N
+S 200 -5 170 5 0 1 0 N
+S 200 195 170 205 0 1 0 N
+P 2 0 1 10 -75 85 25 85 N
+P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
+P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
+P 4 0 1 10 25 110 25 60 75 85 25 110 F
+P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
+P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
+X VBUS 1 300 200 100 L 50 50 1 1 w
+X D- 2 300 -100 100 L 50 50 1 1 P
+X D+ 3 300 0 100 L 50 50 1 1 P
+X ID 4 300 -200 100 L 50 50 1 1 P
+X GND 5 0 -400 100 U 50 50 1 1 w
+X Shield 6 -100 -400 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_C_Small
+#
+DEF Device_C_Small C 0 10 N N 1 F N
+F0 "C" 10 70 50 H V L CNN
+F1 "Device_C_Small" 10 -80 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 13 -60 -20 60 -20 N
+P 2 0 1 12 -60 20 60 20 N
+X ~ 1 0 100 80 D 50 50 1 1 P
+X ~ 2 0 -100 80 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_Crystal
+#
+DEF Device_Crystal Y 0 40 N N 1 F N
+F0 "Y" 0 150 50 H V C CNN
+F1 "Device_Crystal" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Crystal*
+$ENDFPLIST
+DRAW
+S -45 100 45 -100 0 1 12 N
+P 2 0 1 0 -100 0 -75 0 N
+P 2 0 1 20 -75 -50 -75 50 N
+P 2 0 1 20 75 -50 75 50 N
+P 2 0 1 0 100 0 75 0 N
+X 1 1 -150 0 50 R 50 50 1 1 P
+X 2 2 150 0 50 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_Crystal_GND24
+#
+DEF Device_Crystal_GND24 Y 0 40 Y N 1 F N
+F0 "Y" 125 200 50 H V L CNN
+F1 "Device_Crystal_GND24" 125 125 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Crystal*
+$ENDFPLIST
+DRAW
+S -45 100 45 -100 0 1 12 N
+P 2 0 1 0 -100 0 -80 0 N
+P 2 0 1 20 -80 -50 -80 50 N
+P 2 0 1 0 0 -150 0 -140 N
+P 2 0 1 0 0 140 0 150 N
+P 2 0 1 20 80 -50 80 50 N
+P 2 0 1 0 80 0 100 0 N
+P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N
+P 4 0 1 0 -100 90 -100 140 100 140 100 90 N
+X 1 1 -150 0 50 R 50 50 1 1 P
+X 2 2 0 200 50 D 50 50 1 1 P
+X 3 3 150 0 50 L 50 50 1 1 P
+X 4 4 0 -200 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_R_Small
+#
+DEF Device_R_Small R 0 10 N N 1 F N
+F0 "R" 30 20 50 H V L CNN
+F1 "Device_R_Small" 30 -40 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ R_*
+$ENDFPLIST
+DRAW
+S -30 70 30 -70 0 1 8 N
+X ~ 1 0 100 30 D 50 50 1 1 P
+X ~ 2 0 -100 30 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # MAX7301AAX__MAX7301AAX+
 #
 DEF MAX7301AAX__MAX7301AAX+ U 0 40 Y Y 1 L N
@@ -124,7 +276,7 @@ X P15 16 -700 -600 200 R 40 40 0 0 B
 X P16 17 -700 -700 200 R 40 40 0 0 B
 X P17 18 -700 -800 200 R 40 40 0 0 B
 X P18 19 700 500 200 L 40 40 0 0 B
-X GND 2 700 -1000 200 L 40 40 0 0 W
+X GND 2 700 -1100 200 L 40 40 0 0 W
 X P19 20 700 400 200 L 40 40 0 0 B
 X P20 21 700 300 200 L 40 40 0 0 B
 X P21 22 700 200 200 L 40 40 0 0 B
@@ -355,4 +507,61 @@ X VDDIO6 97 -1000 -800 197 R 50 50 5 1 W
 ENDDRAW
 ENDDEF
 #
+# power_+3V3
+#
+DEF power_+3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS +3.3V
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_+5V
+#
+DEF power_+5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_GND
+#
+DEF power_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "power_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_PWR_FLAG
+#
+DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 75 50 H I C CNN
+F1 "power_PWR_FLAG" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
+X pwr 1 0 0 0 U 50 50 0 0 w
+ENDDRAW
+ENDDEF
+#
 #End Library
diff --git a/electrical/same54_dev_board/same54_dev_board.kicad_pcb b/electrical/same54_dev_board/same54_dev_board.kicad_pcb
index c2b1bdc..bb9fdbc 100644
--- a/electrical/same54_dev_board/same54_dev_board.kicad_pcb
+++ b/electrical/same54_dev_board/same54_dev_board.kicad_pcb
@@ -1,110 +1,1368 @@
-(kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-3")
-
-  (general
-    (thickness 1.6)
-    (drawings 5)
-    (tracks 0)
-    (zones 0)
-    (modules 0)
-    (nets 1)
-  )
-
-  (page A4)
-  (layers
-    (0 F.Cu signal)
-    (31 B.Cu signal)
-    (32 B.Adhes user)
-    (33 F.Adhes user)
-    (34 B.Paste user)
-    (35 F.Paste user)
-    (36 B.SilkS user)
-    (37 F.SilkS user)
-    (38 B.Mask user)
-    (39 F.Mask user)
-    (40 Dwgs.User user)
-    (41 Cmts.User user)
-    (42 Eco1.User user)
-    (43 Eco2.User user)
-    (44 Edge.Cuts user)
-    (45 Margin user)
-    (46 B.CrtYd user)
-    (47 F.CrtYd user)
-    (48 B.Fab user)
-    (49 F.Fab user)
-  )
-
-  (setup
-    (last_trace_width 0.25)
-    (trace_clearance 0.2)
-    (zone_clearance 0.508)
-    (zone_45_only no)
-    (trace_min 0.2)
-    (via_size 0.8)
-    (via_drill 0.4)
-    (via_min_size 0.4)
-    (via_min_drill 0.3)
-    (uvia_size 0.3)
-    (uvia_drill 0.1)
-    (uvias_allowed no)
-    (uvia_min_size 0.2)
-    (uvia_min_drill 0.1)
-    (edge_width 0.05)
-    (segment_width 0.2)
-    (pcb_text_width 0.3)
-    (pcb_text_size 1.5 1.5)
-    (mod_edge_width 0.12)
-    (mod_text_size 1 1)
-    (mod_text_width 0.15)
-    (pad_size 1.524 1.524)
-    (pad_drill 0.762)
-    (pad_to_mask_clearance 0.051)
-    (solder_mask_min_width 0.25)
-    (aux_axis_origin 0 0)
-    (visible_elements FFFFFF7F)
-    (pcbplotparams
-      (layerselection 0x010fc_ffffffff)
-      (usegerberextensions false)
-      (usegerberattributes false)
-      (usegerberadvancedattributes false)
-      (creategerberjobfile false)
-      (excludeedgelayer true)
-      (linewidth 0.100000)
-      (plotframeref false)
-      (viasonmask false)
-      (mode 1)
-      (useauxorigin false)
-      (hpglpennumber 1)
-      (hpglpenspeed 20)
-      (hpglpendiameter 15.000000)
-      (psnegative false)
-      (psa4output false)
-      (plotreference true)
-      (plotvalue true)
-      (plotinvisibletext false)
-      (padsonsilk false)
-      (subtractmaskfromsilk false)
-      (outputformat 1)
-      (mirror false)
-      (drillshape 1)
-      (scaleselection 1)
-      (outputdirectory ""))
-  )
-
-  (net 0 "")
-
-  (net_class Default "This is the default net class."
-    (clearance 0.2)
-    (trace_width 0.25)
-    (via_dia 0.8)
-    (via_drill 0.4)
-    (uvia_dia 0.3)
-    (uvia_drill 0.1)
-  )
-
-  (gr_line (start 50.8 50.8) (end 53.34 50.8) (layer Edge.Cuts) (width 0.05) (tstamp 5E6E9EBC))
-  (gr_line (start 50.8 134.62) (end 50.8 50.8) (layer Edge.Cuts) (width 0.05))
-  (gr_line (start 228.6 134.62) (end 50.8 134.62) (layer Edge.Cuts) (width 0.05))
-  (gr_line (start 228.6 50.8) (end 228.6 134.62) (layer Edge.Cuts) (width 0.05))
-  (gr_line (start 53.34 50.8) (end 228.6 50.8) (layer Edge.Cuts) (width 0.05))
-
-)
+(kicad_pcb (version 20171130) (host pcbnew 5.1.5)
+
+  (general
+    (thickness 1.6)
+    (drawings 5)
+    (tracks 0)
+    (zones 0)
+    (modules 7)
+    (nets 212)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.051)
+    (solder_mask_min_width 0.25)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(J1-Pad6)")
+  (net 2 "Net-(J1-Pad5)")
+  (net 3 "Net-(J1-Pad4)")
+  (net 4 "Net-(J1-Pad1)")
+  (net 5 "Net-(J2-Pad8)")
+  (net 6 "Net-(J2-Pad7)")
+  (net 7 "Net-(J2-Pad6)")
+  (net 8 "Net-(J2-Pad3)")
+  (net 9 "Net-(J2-Pad4)")
+  (net 10 "Net-(J2-Pad2)")
+  (net 11 "Net-(J2-Pad1)")
+  (net 12 "Net-(J3-Pad40)")
+  (net 13 "Net-(J3-Pad39)")
+  (net 14 "Net-(J3-Pad38)")
+  (net 15 /g_SCREEN_INTF/D23)
+  (net 16 /g_SCREEN_INTF/D22)
+  (net 17 /g_SCREEN_INTF/D21)
+  (net 18 /g_SCREEN_INTF/D20)
+  (net 19 /g_SCREEN_INTF/D19)
+  (net 20 /g_SCREEN_INTF/D18)
+  (net 21 /g_SCREEN_INTF/D17)
+  (net 22 /g_SCREEN_INTF/D16)
+  (net 23 /g_SCREEN_INTF/D15)
+  (net 24 /g_SCREEN_INTF/D14)
+  (net 25 /g_SCREEN_INTF/D13)
+  (net 26 /g_SCREEN_INTF/D12)
+  (net 27 /g_SCREEN_INTF/D11)
+  (net 28 /g_SCREEN_INTF/D10)
+  (net 29 /g_SCREEN_INTF/D9)
+  (net 30 /g_SCREEN_INTF/D8)
+  (net 31 /g_SCREEN_INTF/D7)
+  (net 32 /g_SCREEN_INTF/D6)
+  (net 33 /g_SCREEN_INTF/D5)
+  (net 34 /g_SCREEN_INTF/D4)
+  (net 35 /g_SCREEN_INTF/D3)
+  (net 36 /g_SCREEN_INTF/D2)
+  (net 37 /g_SCREEN_INTF/D1)
+  (net 38 /g_SCREEN_INTF/D0)
+  (net 39 "Net-(J3-Pad6)")
+  (net 40 "Net-(U1-Pad95)")
+  (net 41 "Net-(U1-Pad94)")
+  (net 42 "Net-(U1-Pad93)")
+  (net 43 "Net-(U1-Pad92)")
+  (net 44 "Net-(U1-Pad91)")
+  (net 45 "Net-(U1-Pad89)")
+  (net 46 "Net-(U1-Pad88)")
+  (net 47 "Net-(U1-Pad87)")
+  (net 48 "Net-(U1-Pad86)")
+  (net 49 "Net-(U1-Pad85)")
+  (net 50 "Net-(U1-Pad84)")
+  (net 51 "Net-(U1-Pad83)")
+  (net 52 "Net-(U1-Pad82)")
+  (net 53 "Net-(U1-Pad81)")
+  (net 54 "Net-(U1-Pad80)")
+  (net 55 "Net-(U1-Pad79)")
+  (net 56 "Net-(U1-Pad77)")
+  (net 57 "Net-(U1-Pad76)")
+  (net 58 "Net-(U1-Pad75)")
+  (net 59 "Net-(U1-Pad74)")
+  (net 60 "Net-(U1-Pad73)")
+  (net 61 "Net-(U1-Pad72)")
+  (net 62 "Net-(U1-Pad71)")
+  (net 63 "Net-(U1-Pad70)")
+  (net 64 "Net-(U1-Pad69)")
+  (net 65 "Net-(U1-Pad68)")
+  (net 66 "Net-(U1-Pad67)")
+  (net 67 "Net-(U1-Pad66)")
+  (net 68 "Net-(U1-Pad65)")
+  (net 69 "Net-(U1-Pad32)")
+  (net 70 "Net-(U1-Pad30)")
+  (net 71 "Net-(U1-Pad29)")
+  (net 72 "Net-(U1-Pad28)")
+  (net 73 "Net-(U1-Pad27)")
+  (net 74 "Net-(U1-Pad26)")
+  (net 75 "Net-(U1-Pad25)")
+  (net 76 "Net-(U1-Pad24)")
+  (net 77 "Net-(U1-Pad23)")
+  (net 78 "Net-(U1-Pad22)")
+  (net 79 "Net-(U1-Pad21)")
+  (net 80 "Net-(U1-Pad20)")
+  (net 81 "Net-(U1-Pad19)")
+  (net 82 "Net-(U1-Pad18)")
+  (net 83 "Net-(U1-Pad17)")
+  (net 84 "Net-(U1-Pad16)")
+  (net 85 "Net-(U1-Pad15)")
+  (net 86 "Net-(U1-Pad14)")
+  (net 87 "Net-(U1-Pad13)")
+  (net 88 "Net-(U1-Pad12)")
+  (net 89 "Net-(U1-Pad11)")
+  (net 90 "Net-(U1-Pad10)")
+  (net 91 "Net-(U1-Pad9)")
+  (net 92 "Net-(U1-Pad8)")
+  (net 93 "Net-(U1-Pad7)")
+  (net 94 "Net-(U1-Pad6)")
+  (net 95 "Net-(U1-Pad5)")
+  (net 96 "Net-(U1-Pad4)")
+  (net 97 "Net-(U1-Pad3)")
+  (net 98 "Net-(C1-Pad2)")
+  (net 99 "Net-(U1-Pad127)")
+  (net 100 "Net-(U1-Pad126)")
+  (net 101 "Net-(U1-Pad125)")
+  (net 102 "Net-(U1-Pad124)")
+  (net 103 "Net-(U1-Pad123)")
+  (net 104 "Net-(U1-Pad122)")
+  (net 105 "Net-(U1-Pad121)")
+  (net 106 "Net-(U1-Pad120)")
+  (net 107 "Net-(U1-Pad119)")
+  (net 108 "Net-(U1-Pad118)")
+  (net 109 "Net-(U1-Pad117)")
+  (net 110 "Net-(U1-Pad116)")
+  (net 111 "Net-(U1-Pad115)")
+  (net 112 "Net-(U1-Pad114)")
+  (net 113 "Net-(U1-Pad113)")
+  (net 114 "Net-(U1-Pad112)")
+  (net 115 "Net-(U1-Pad111)")
+  (net 116 "Net-(U1-Pad110)")
+  (net 117 "Net-(U1-Pad109)")
+  (net 118 "Net-(U1-Pad108)")
+  (net 119 "Net-(U1-Pad107)")
+  (net 120 "Net-(U1-Pad105)")
+  (net 121 "Net-(U1-Pad104)")
+  (net 122 "Net-(U1-Pad103)")
+  (net 123 "Net-(U1-Pad102)")
+  (net 124 "Net-(U1-Pad101)")
+  (net 125 "Net-(U1-Pad100)")
+  (net 126 "Net-(U1-Pad99)")
+  (net 127 "Net-(U1-Pad98)")
+  (net 128 "Net-(U1-Pad97)")
+  (net 129 "Net-(U1-Pad61)")
+  (net 130 "Net-(U1-Pad60)")
+  (net 131 "Net-(U1-Pad59)")
+  (net 132 "Net-(U1-Pad58)")
+  (net 133 "Net-(U1-Pad57)")
+  (net 134 "Net-(U1-Pad56)")
+  (net 135 "Net-(U1-Pad55)")
+  (net 136 "Net-(U1-Pad54)")
+  (net 137 "Net-(U1-Pad52)")
+  (net 138 "Net-(U1-Pad51)")
+  (net 139 "Net-(U1-Pad50)")
+  (net 140 "Net-(U1-Pad49)")
+  (net 141 "Net-(U1-Pad48)")
+  (net 142 "Net-(U1-Pad47)")
+  (net 143 "Net-(U1-Pad46)")
+  (net 144 "Net-(U1-Pad44)")
+  (net 145 "Net-(U1-Pad43)")
+  (net 146 "Net-(U1-Pad42)")
+  (net 147 "Net-(U1-Pad41)")
+  (net 148 "Net-(U1-Pad40)")
+  (net 149 "Net-(U1-Pad39)")
+  (net 150 "Net-(U1-Pad37)")
+  (net 151 "Net-(U1-Pad36)")
+  (net 152 "Net-(U1-Pad35)")
+  (net 153 "Net-(U1-Pad34)")
+  (net 154 "Net-(U1-Pad33)")
+  (net 155 "Net-(U2-Pad32)")
+  (net 156 "Net-(U2-Pad31)")
+  (net 157 "Net-(U2-Pad29)")
+  (net 158 "Net-(U2-Pad28)")
+  (net 159 "Net-(U2-Pad27)")
+  (net 160 "Net-(U2-Pad26)")
+  (net 161 "Net-(U2-Pad24)")
+  (net 162 "Net-(U2-Pad23)")
+  (net 163 "Net-(U2-Pad22)")
+  (net 164 "Net-(U2-Pad21)")
+  (net 165 "Net-(U2-Pad20)")
+  (net 166 "Net-(U2-Pad1)")
+  (net 167 "Net-(U2-Pad18)")
+  (net 168 "Net-(U2-Pad16)")
+  (net 169 "Net-(U2-Pad13)")
+  (net 170 "Net-(U2-Pad12)")
+  (net 171 "Net-(U2-Pad11)")
+  (net 172 "Net-(U2-Pad10)")
+  (net 173 "Net-(U2-Pad8)")
+  (net 174 "Net-(U2-Pad7)")
+  (net 175 "Net-(U2-Pad6)")
+  (net 176 "Net-(U2-Pad5)")
+  (net 177 "Net-(U2-Pad4)")
+  (net 178 "Net-(U2-Pad3)")
+  (net 179 "Net-(U2-Pad33)")
+  (net 180 "Net-(U2-Pad9)")
+  (net 181 "Net-(U2-Pad17)")
+  (net 182 "Net-(U2-Pad25)")
+  (net 183 g_3v3)
+  (net 184 "Net-(U3-Pad32)")
+  (net 185 "Net-(U3-Pad31)")
+  (net 186 "Net-(U3-Pad30)")
+  (net 187 "Net-(U3-Pad29)")
+  (net 188 GND)
+  (net 189 "Net-(R1-Pad1)")
+  (net 190 /s_USB_INTF.sch/USB_D+)
+  (net 191 /s_USB_INTF.sch/USB_D-)
+  (net 192 /g_SCREEN_INTF/TFT_STB)
+  (net 193 /g_SCREEN_INTF/TFT_TE)
+  (net 194 /g_SCREEN_INTF/~TFT_RD)
+  (net 195 /g_SCREEN_INTF/~TFT_WR)
+  (net 196 /g_SCREEN_INTF/~TFT_CS)
+  (net 197 /g_SCREEN_INTF/TFT_RSDC)
+  (net 198 /g_SCREEN_INTF/~TFT_RST)
+  (net 199 /g_SCREEN_INTF/TFT_TOUCH_INT)
+  (net 200 /g_SCREEN_INTF/TFT_TOUCH_SDA)
+  (net 201 /g_SCREEN_INTF/TFT_TOUCH_SCL)
+  (net 202 "Net-(C2-Pad1)")
+  (net 203 "Net-(C5-Pad2)")
+  (net 204 "Net-(C4-Pad2)")
+  (net 205 /DEBUG_RX)
+  (net 206 "Net-(U2-Pad19)")
+  (net 207 /DEBUG_TX)
+  (net 208 /g_SCREEN_INTF/~IO_EXPANDER_CS)
+  (net 209 /g_SCREEN_INTF/MASTER_SPI_MOSI)
+  (net 210 /g_SCREEN_INTF/MASTER_SPI_CLK)
+  (net 211 /g_SCREEN_INTF/MASTER_SPI_MISO)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net /DEBUG_RX)
+    (add_net /DEBUG_TX)
+    (add_net /g_SCREEN_INTF/D0)
+    (add_net /g_SCREEN_INTF/D1)
+    (add_net /g_SCREEN_INTF/D10)
+    (add_net /g_SCREEN_INTF/D11)
+    (add_net /g_SCREEN_INTF/D12)
+    (add_net /g_SCREEN_INTF/D13)
+    (add_net /g_SCREEN_INTF/D14)
+    (add_net /g_SCREEN_INTF/D15)
+    (add_net /g_SCREEN_INTF/D16)
+    (add_net /g_SCREEN_INTF/D17)
+    (add_net /g_SCREEN_INTF/D18)
+    (add_net /g_SCREEN_INTF/D19)
+    (add_net /g_SCREEN_INTF/D2)
+    (add_net /g_SCREEN_INTF/D20)
+    (add_net /g_SCREEN_INTF/D21)
+    (add_net /g_SCREEN_INTF/D22)
+    (add_net /g_SCREEN_INTF/D23)
+    (add_net /g_SCREEN_INTF/D3)
+    (add_net /g_SCREEN_INTF/D4)
+    (add_net /g_SCREEN_INTF/D5)
+    (add_net /g_SCREEN_INTF/D6)
+    (add_net /g_SCREEN_INTF/D7)
+    (add_net /g_SCREEN_INTF/D8)
+    (add_net /g_SCREEN_INTF/D9)
+    (add_net /g_SCREEN_INTF/MASTER_SPI_CLK)
+    (add_net /g_SCREEN_INTF/MASTER_SPI_MISO)
+    (add_net /g_SCREEN_INTF/MASTER_SPI_MOSI)
+    (add_net /g_SCREEN_INTF/TFT_RSDC)
+    (add_net /g_SCREEN_INTF/TFT_STB)
+    (add_net /g_SCREEN_INTF/TFT_TE)
+    (add_net /g_SCREEN_INTF/TFT_TOUCH_INT)
+    (add_net /g_SCREEN_INTF/TFT_TOUCH_SCL)
+    (add_net /g_SCREEN_INTF/TFT_TOUCH_SDA)
+    (add_net /g_SCREEN_INTF/~IO_EXPANDER_CS)
+    (add_net /g_SCREEN_INTF/~TFT_CS)
+    (add_net /g_SCREEN_INTF/~TFT_RD)
+    (add_net /g_SCREEN_INTF/~TFT_RST)
+    (add_net /g_SCREEN_INTF/~TFT_WR)
+    (add_net /s_USB_INTF.sch/USB_D+)
+    (add_net /s_USB_INTF.sch/USB_D-)
+    (add_net GND)
+    (add_net "Net-(C1-Pad2)")
+    (add_net "Net-(C2-Pad1)")
+    (add_net "Net-(C4-Pad2)")
+    (add_net "Net-(C5-Pad2)")
+    (add_net "Net-(J1-Pad1)")
+    (add_net "Net-(J1-Pad4)")
+    (add_net "Net-(J1-Pad5)")
+    (add_net "Net-(J1-Pad6)")
+    (add_net "Net-(J2-Pad1)")
+    (add_net "Net-(J2-Pad2)")
+    (add_net "Net-(J2-Pad3)")
+    (add_net "Net-(J2-Pad4)")
+    (add_net "Net-(J2-Pad6)")
+    (add_net "Net-(J2-Pad7)")
+    (add_net "Net-(J2-Pad8)")
+    (add_net "Net-(J3-Pad38)")
+    (add_net "Net-(J3-Pad39)")
+    (add_net "Net-(J3-Pad40)")
+    (add_net "Net-(J3-Pad6)")
+    (add_net "Net-(R1-Pad1)")
+    (add_net "Net-(U1-Pad10)")
+    (add_net "Net-(U1-Pad100)")
+    (add_net "Net-(U1-Pad101)")
+    (add_net "Net-(U1-Pad102)")
+    (add_net "Net-(U1-Pad103)")
+    (add_net "Net-(U1-Pad104)")
+    (add_net "Net-(U1-Pad105)")
+    (add_net "Net-(U1-Pad107)")
+    (add_net "Net-(U1-Pad108)")
+    (add_net "Net-(U1-Pad109)")
+    (add_net "Net-(U1-Pad11)")
+    (add_net "Net-(U1-Pad110)")
+    (add_net "Net-(U1-Pad111)")
+    (add_net "Net-(U1-Pad112)")
+    (add_net "Net-(U1-Pad113)")
+    (add_net "Net-(U1-Pad114)")
+    (add_net "Net-(U1-Pad115)")
+    (add_net "Net-(U1-Pad116)")
+    (add_net "Net-(U1-Pad117)")
+    (add_net "Net-(U1-Pad118)")
+    (add_net "Net-(U1-Pad119)")
+    (add_net "Net-(U1-Pad12)")
+    (add_net "Net-(U1-Pad120)")
+    (add_net "Net-(U1-Pad121)")
+    (add_net "Net-(U1-Pad122)")
+    (add_net "Net-(U1-Pad123)")
+    (add_net "Net-(U1-Pad124)")
+    (add_net "Net-(U1-Pad125)")
+    (add_net "Net-(U1-Pad126)")
+    (add_net "Net-(U1-Pad127)")
+    (add_net "Net-(U1-Pad13)")
+    (add_net "Net-(U1-Pad14)")
+    (add_net "Net-(U1-Pad15)")
+    (add_net "Net-(U1-Pad16)")
+    (add_net "Net-(U1-Pad17)")
+    (add_net "Net-(U1-Pad18)")
+    (add_net "Net-(U1-Pad19)")
+    (add_net "Net-(U1-Pad20)")
+    (add_net "Net-(U1-Pad21)")
+    (add_net "Net-(U1-Pad22)")
+    (add_net "Net-(U1-Pad23)")
+    (add_net "Net-(U1-Pad24)")
+    (add_net "Net-(U1-Pad25)")
+    (add_net "Net-(U1-Pad26)")
+    (add_net "Net-(U1-Pad27)")
+    (add_net "Net-(U1-Pad28)")
+    (add_net "Net-(U1-Pad29)")
+    (add_net "Net-(U1-Pad3)")
+    (add_net "Net-(U1-Pad30)")
+    (add_net "Net-(U1-Pad32)")
+    (add_net "Net-(U1-Pad33)")
+    (add_net "Net-(U1-Pad34)")
+    (add_net "Net-(U1-Pad35)")
+    (add_net "Net-(U1-Pad36)")
+    (add_net "Net-(U1-Pad37)")
+    (add_net "Net-(U1-Pad39)")
+    (add_net "Net-(U1-Pad4)")
+    (add_net "Net-(U1-Pad40)")
+    (add_net "Net-(U1-Pad41)")
+    (add_net "Net-(U1-Pad42)")
+    (add_net "Net-(U1-Pad43)")
+    (add_net "Net-(U1-Pad44)")
+    (add_net "Net-(U1-Pad46)")
+    (add_net "Net-(U1-Pad47)")
+    (add_net "Net-(U1-Pad48)")
+    (add_net "Net-(U1-Pad49)")
+    (add_net "Net-(U1-Pad5)")
+    (add_net "Net-(U1-Pad50)")
+    (add_net "Net-(U1-Pad51)")
+    (add_net "Net-(U1-Pad52)")
+    (add_net "Net-(U1-Pad54)")
+    (add_net "Net-(U1-Pad55)")
+    (add_net "Net-(U1-Pad56)")
+    (add_net "Net-(U1-Pad57)")
+    (add_net "Net-(U1-Pad58)")
+    (add_net "Net-(U1-Pad59)")
+    (add_net "Net-(U1-Pad6)")
+    (add_net "Net-(U1-Pad60)")
+    (add_net "Net-(U1-Pad61)")
+    (add_net "Net-(U1-Pad65)")
+    (add_net "Net-(U1-Pad66)")
+    (add_net "Net-(U1-Pad67)")
+    (add_net "Net-(U1-Pad68)")
+    (add_net "Net-(U1-Pad69)")
+    (add_net "Net-(U1-Pad7)")
+    (add_net "Net-(U1-Pad70)")
+    (add_net "Net-(U1-Pad71)")
+    (add_net "Net-(U1-Pad72)")
+    (add_net "Net-(U1-Pad73)")
+    (add_net "Net-(U1-Pad74)")
+    (add_net "Net-(U1-Pad75)")
+    (add_net "Net-(U1-Pad76)")
+    (add_net "Net-(U1-Pad77)")
+    (add_net "Net-(U1-Pad79)")
+    (add_net "Net-(U1-Pad8)")
+    (add_net "Net-(U1-Pad80)")
+    (add_net "Net-(U1-Pad81)")
+    (add_net "Net-(U1-Pad82)")
+    (add_net "Net-(U1-Pad83)")
+    (add_net "Net-(U1-Pad84)")
+    (add_net "Net-(U1-Pad85)")
+    (add_net "Net-(U1-Pad86)")
+    (add_net "Net-(U1-Pad87)")
+    (add_net "Net-(U1-Pad88)")
+    (add_net "Net-(U1-Pad89)")
+    (add_net "Net-(U1-Pad9)")
+    (add_net "Net-(U1-Pad91)")
+    (add_net "Net-(U1-Pad92)")
+    (add_net "Net-(U1-Pad93)")
+    (add_net "Net-(U1-Pad94)")
+    (add_net "Net-(U1-Pad95)")
+    (add_net "Net-(U1-Pad97)")
+    (add_net "Net-(U1-Pad98)")
+    (add_net "Net-(U1-Pad99)")
+    (add_net "Net-(U2-Pad1)")
+    (add_net "Net-(U2-Pad10)")
+    (add_net "Net-(U2-Pad11)")
+    (add_net "Net-(U2-Pad12)")
+    (add_net "Net-(U2-Pad13)")
+    (add_net "Net-(U2-Pad16)")
+    (add_net "Net-(U2-Pad17)")
+    (add_net "Net-(U2-Pad18)")
+    (add_net "Net-(U2-Pad19)")
+    (add_net "Net-(U2-Pad20)")
+    (add_net "Net-(U2-Pad21)")
+    (add_net "Net-(U2-Pad22)")
+    (add_net "Net-(U2-Pad23)")
+    (add_net "Net-(U2-Pad24)")
+    (add_net "Net-(U2-Pad25)")
+    (add_net "Net-(U2-Pad26)")
+    (add_net "Net-(U2-Pad27)")
+    (add_net "Net-(U2-Pad28)")
+    (add_net "Net-(U2-Pad29)")
+    (add_net "Net-(U2-Pad3)")
+    (add_net "Net-(U2-Pad31)")
+    (add_net "Net-(U2-Pad32)")
+    (add_net "Net-(U2-Pad33)")
+    (add_net "Net-(U2-Pad4)")
+    (add_net "Net-(U2-Pad5)")
+    (add_net "Net-(U2-Pad6)")
+    (add_net "Net-(U2-Pad7)")
+    (add_net "Net-(U2-Pad8)")
+    (add_net "Net-(U2-Pad9)")
+    (add_net "Net-(U3-Pad29)")
+    (add_net "Net-(U3-Pad30)")
+    (add_net "Net-(U3-Pad31)")
+    (add_net "Net-(U3-Pad32)")
+    (add_net g_3v3)
+  )
+
+  (module Connector_PinSocket_1.27mm:PinSocket_2x04_P1.27mm_Vertical (layer F.Cu) (tedit 5A19A431) (tstamp 5E75429F)
+    (at 209.55 96.52)
+    (descr "Through hole straight socket strip, 2x04, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated")
+    (tags "Through hole socket strip THT 2x04 1.27mm double row")
+    (path /5E805E4F/5EA1E350)
+    (fp_text reference J2 (at -0.635 -2.135) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_ARM_JTAG_SWD_10 (at -0.635 5.945) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at -0.635 1.905 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -2.67 4.95) (end -2.67 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.38 4.95) (end -2.67 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.38 -1.15) (end 1.38 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.67 -1.15) (end 1.38 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0 -0.76) (end 0.95 -0.76) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.95 -0.76) (end 0.95 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.76 0.635) (end 0.95 0.635) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.95 0.635) (end 0.95 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.96247 4.505) (end -0.30753 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.22 4.505) (end -1.57753 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.30753 4.505) (end 0.95 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.22 -0.695) (end -2.22 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.96247 -0.695) (end -0.76 -0.695) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.22 -0.695) (end -1.57753 -0.695) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.16 4.445) (end -2.16 -0.635) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.89 4.445) (end -2.16 4.445) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.89 0.1275) (end 0.89 4.445) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.1275 -0.635) (end 0.89 0.1275) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.16 -0.635) (end 0.1275 -0.635) (layer F.Fab) (width 0.1))
+    (pad 8 thru_hole oval (at -1.27 3.81) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 5 "Net-(J2-Pad8)"))
+    (pad 7 thru_hole oval (at 0 3.81) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 6 "Net-(J2-Pad7)"))
+    (pad 6 thru_hole oval (at -1.27 2.54) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 7 "Net-(J2-Pad6)"))
+    (pad 5 thru_hole oval (at 0 2.54) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 8 "Net-(J2-Pad3)"))
+    (pad 4 thru_hole oval (at -1.27 1.27) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 9 "Net-(J2-Pad4)"))
+    (pad 3 thru_hole oval (at 0 1.27) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 8 "Net-(J2-Pad3)"))
+    (pad 2 thru_hole oval (at -1.27 0) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 10 "Net-(J2-Pad2)"))
+    (pad 1 thru_hole rect (at 0 0) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 11 "Net-(J2-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_PinSocket_1.27mm.3dshapes/PinSocket_2x04_P1.27mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm (layer F.Cu) (tedit 5A0FD1B2) (tstamp 5E752FF8)
+    (at 68.58 100.33)
+    (descr "SMD Crystal FC-135 https://support.epson.biz/td/api/doc_check.php?dl=brief_FC-135R_en.pdf")
+    (tags "SMD SMT Crystal")
+    (path /5E805E4F/5E75D825)
+    (attr smd)
+    (fp_text reference Y1 (at 0 -2) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value XOSC32 (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2 -1.15) (end 2 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 -1.15) (end -2 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 1.15) (end 2 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 0.75) (end 1.6 0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.75) (end 1.6 -0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.75) (end 1.6 0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.675 -0.875) (end 0.675 -0.875) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.675 0.875) (end 0.675 0.875) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.6 -0.75) (end -1.6 0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -2 -1.15) (end 2 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 0 -2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 2 smd rect (at -1.25 0) (size 1 1.8) (layers F.Cu F.Paste F.Mask)
+      (net 98 "Net-(C1-Pad2)"))
+    (pad 1 smd rect (at 1.25 0) (size 1 1.8) (layers F.Cu F.Paste F.Mask)
+      (net 202 "Net-(C2-Pad1)"))
+    (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3215-2Pin_3.2x1.5mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module proj_modules:SOP80P1030X264-36N (layer F.Cu) (tedit 5E702418) (tstamp 5E752FE7)
+    (at 96.52 78.74)
+    (path /5E8589A7/5E86D6D7)
+    (fp_text reference U3 (at -2.415 -8.587) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.015)))
+    )
+    (fp_text value MAX7301AAX+ (at 5.84 8.587) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.015)))
+    )
+    (fp_line (start 5.865 -8.025) (end 5.865 8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.865 -8.025) (end -5.865 8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.865 8.025) (end 5.865 8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.865 -8.025) (end 5.865 -8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.8 -7.775) (end 3.8 7.775) (layer F.Fab) (width 0.127))
+    (fp_line (start -3.8 -7.775) (end -3.8 7.775) (layer F.Fab) (width 0.127))
+    (fp_line (start -3.8 7.775) (end 3.8 7.775) (layer F.SilkS) (width 0.127))
+    (fp_line (start -3.8 -7.775) (end 3.8 -7.775) (layer F.SilkS) (width 0.127))
+    (fp_line (start -3.8 7.775) (end 3.8 7.775) (layer F.Fab) (width 0.127))
+    (fp_line (start -3.8 -7.775) (end 3.8 -7.775) (layer F.Fab) (width 0.127))
+    (fp_circle (center -6.51 -7.34) (end -6.41 -7.34) (layer F.Fab) (width 0.2))
+    (fp_circle (center -6.51 -7.34) (end -6.41 -7.34) (layer F.SilkS) (width 0.2))
+    (pad 36 smd rect (at 4.72 -6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 183 g_3v3))
+    (pad 35 smd rect (at 4.72 -6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 208 /g_SCREEN_INTF/~IO_EXPANDER_CS))
+    (pad 34 smd rect (at 4.72 -5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 209 /g_SCREEN_INTF/MASTER_SPI_MOSI))
+    (pad 33 smd rect (at 4.72 -4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 210 /g_SCREEN_INTF/MASTER_SPI_CLK))
+    (pad 32 smd rect (at 4.72 -3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 184 "Net-(U3-Pad32)"))
+    (pad 31 smd rect (at 4.72 -2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 185 "Net-(U3-Pad31)"))
+    (pad 30 smd rect (at 4.72 -2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 186 "Net-(U3-Pad30)"))
+    (pad 29 smd rect (at 4.72 -1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 187 "Net-(U3-Pad29)"))
+    (pad 28 smd rect (at 4.72 -0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 15 /g_SCREEN_INTF/D23))
+    (pad 27 smd rect (at 4.72 0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 16 /g_SCREEN_INTF/D22))
+    (pad 26 smd rect (at 4.72 1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 17 /g_SCREEN_INTF/D21))
+    (pad 25 smd rect (at 4.72 2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 18 /g_SCREEN_INTF/D20))
+    (pad 24 smd rect (at 4.72 2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 19 /g_SCREEN_INTF/D19))
+    (pad 23 smd rect (at 4.72 3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 20 /g_SCREEN_INTF/D18))
+    (pad 22 smd rect (at 4.72 4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 21 /g_SCREEN_INTF/D17))
+    (pad 21 smd rect (at 4.72 5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 22 /g_SCREEN_INTF/D16))
+    (pad 20 smd rect (at 4.72 6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 23 /g_SCREEN_INTF/D15))
+    (pad 19 smd rect (at 4.72 6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 24 /g_SCREEN_INTF/D14))
+    (pad 18 smd rect (at -4.72 6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 25 /g_SCREEN_INTF/D13))
+    (pad 17 smd rect (at -4.72 6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 26 /g_SCREEN_INTF/D12))
+    (pad 16 smd rect (at -4.72 5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 27 /g_SCREEN_INTF/D11))
+    (pad 15 smd rect (at -4.72 4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 28 /g_SCREEN_INTF/D10))
+    (pad 14 smd rect (at -4.72 3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 29 /g_SCREEN_INTF/D9))
+    (pad 13 smd rect (at -4.72 2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 30 /g_SCREEN_INTF/D8))
+    (pad 12 smd rect (at -4.72 2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 31 /g_SCREEN_INTF/D7))
+    (pad 11 smd rect (at -4.72 1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 32 /g_SCREEN_INTF/D6))
+    (pad 10 smd rect (at -4.72 0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 33 /g_SCREEN_INTF/D5))
+    (pad 9 smd rect (at -4.72 -0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 34 /g_SCREEN_INTF/D4))
+    (pad 8 smd rect (at -4.72 -1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 35 /g_SCREEN_INTF/D3))
+    (pad 7 smd rect (at -4.72 -2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 36 /g_SCREEN_INTF/D2))
+    (pad 6 smd rect (at -4.72 -2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 37 /g_SCREEN_INTF/D1))
+    (pad 5 smd rect (at -4.72 -3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 38 /g_SCREEN_INTF/D0))
+    (pad 4 smd rect (at -4.72 -4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 211 /g_SCREEN_INTF/MASTER_SPI_MISO))
+    (pad 3 smd rect (at -4.72 -5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 188 GND))
+    (pad 2 smd rect (at -4.72 -6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 188 GND))
+    (pad 1 smd rect (at -4.72 -6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 189 "Net-(R1-Pad1)"))
+  )
+
+  (module digikey-footprints:QFN-32-1EP_5x5mm (layer F.Cu) (tedit 5D2895FE) (tstamp 5E752FB3)
+    (at 55.88 59.69)
+    (path /5E7C0F59/5E84744C)
+    (attr smd)
+    (fp_text reference U2 (at 0 -4.71) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value FT232RQ-REEL (at 0 4.51) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.98 2.05) (end -3.02 2.05) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.98 -2.95) (end 1.98 2.05) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.08 2.15) (end 1.68 2.15) (layer F.SilkS) (width 0.1))
+    (fp_line (start 2.08 1.75) (end 2.08 2.15) (layer F.SilkS) (width 0.1))
+    (fp_line (start 2.08 -3.05) (end 2.08 -2.65) (layer F.SilkS) (width 0.1))
+    (fp_line (start 2.08 -3.05) (end 1.68 -3.05) (layer F.SilkS) (width 0.1))
+    (fp_line (start -3.12 2.15) (end -3.12 1.75) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.72 2.15) (end -3.12 2.15) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.62 -2.95) (end -3.02 -2.55) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.02 -2.55) (end -3.02 2.05) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.62 -2.95) (end 1.98 -2.95) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.12 -2.45) (end -3.32 -2.45) (layer F.SilkS) (width 0.1))
+    (fp_line (start -3.12 -2.65) (end -3.12 -2.45) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.72 -3.05) (end -3.12 -2.65) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.52 -3.05) (end -2.72 -3.05) (layer F.SilkS) (width 0.1))
+    (fp_text user %R (at -0.52 -0.45) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.61 2.68) (end -3.65 2.68) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.61 -3.58) (end -3.65 -3.58) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.61 -3.58) (end 2.61 2.68) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.65 2.68) (end -3.65 -3.58) (layer F.CrtYd) (width 0.05))
+    (pad 32 smd rect (at -2.27 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 155 "Net-(U2-Pad32)") (solder_mask_margin 0.07))
+    (pad 31 smd rect (at -1.77 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 156 "Net-(U2-Pad31)") (solder_mask_margin 0.07))
+    (pad 30 smd rect (at -1.27 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 205 /DEBUG_RX) (solder_mask_margin 0.07))
+    (pad 29 smd rect (at -0.77 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 157 "Net-(U2-Pad29)") (solder_mask_margin 0.07))
+    (pad 28 smd rect (at -0.27 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 158 "Net-(U2-Pad28)") (solder_mask_margin 0.07))
+    (pad 27 smd rect (at 0.23 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 159 "Net-(U2-Pad27)") (solder_mask_margin 0.07))
+    (pad 26 smd rect (at 0.73 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 160 "Net-(U2-Pad26)") (solder_mask_margin 0.07))
+    (pad 24 smd rect (at 1.955 -2.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 161 "Net-(U2-Pad24)") (solder_mask_margin 0.07))
+    (pad 23 smd rect (at 1.955 -1.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 162 "Net-(U2-Pad23)") (solder_mask_margin 0.07))
+    (pad 22 smd rect (at 1.955 -1.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 163 "Net-(U2-Pad22)") (solder_mask_margin 0.07))
+    (pad 21 smd rect (at 1.955 -0.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 164 "Net-(U2-Pad21)") (solder_mask_margin 0.07))
+    (pad 20 smd rect (at 1.955 -0.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 165 "Net-(U2-Pad20)") (solder_mask_margin 0.07))
+    (pad 19 smd rect (at 1.955 0.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 206 "Net-(U2-Pad19)") (solder_mask_margin 0.07))
+    (pad 18 smd rect (at 1.955 0.8 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 167 "Net-(U2-Pad18)") (solder_mask_margin 0.07))
+    (pad 16 smd rect (at 1.23 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 168 "Net-(U2-Pad16)") (solder_mask_margin 0.07))
+    (pad 15 smd rect (at 0.73 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 191 /s_USB_INTF.sch/USB_D-) (solder_mask_margin 0.07))
+    (pad 14 smd rect (at 0.23 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 190 /s_USB_INTF.sch/USB_D+) (solder_mask_margin 0.07))
+    (pad 13 smd rect (at -0.27 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 169 "Net-(U2-Pad13)") (solder_mask_margin 0.07))
+    (pad 12 smd rect (at -0.77 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 170 "Net-(U2-Pad12)") (solder_mask_margin 0.07))
+    (pad 11 smd rect (at -1.27 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 171 "Net-(U2-Pad11)") (solder_mask_margin 0.07))
+    (pad 10 smd rect (at -1.77 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 172 "Net-(U2-Pad10)") (solder_mask_margin 0.07))
+    (pad 8 smd rect (at -2.995 1.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 173 "Net-(U2-Pad8)") (solder_mask_margin 0.07))
+    (pad 7 smd rect (at -2.995 0.8 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 174 "Net-(U2-Pad7)") (solder_mask_margin 0.07))
+    (pad 6 smd rect (at -2.995 0.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 175 "Net-(U2-Pad6)") (solder_mask_margin 0.07))
+    (pad 5 smd rect (at -2.995 -0.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 176 "Net-(U2-Pad5)") (solder_mask_margin 0.07))
+    (pad 4 smd rect (at -2.995 -0.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 177 "Net-(U2-Pad4)") (solder_mask_margin 0.07))
+    (pad 3 smd rect (at -2.995 -1.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 178 "Net-(U2-Pad3)") (solder_mask_margin 0.07))
+    (pad 2 smd rect (at -2.995 -1.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 207 /DEBUG_TX) (solder_mask_margin 0.07))
+    (pad 1 smd rect (at -2.995 -2.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 166 "Net-(U2-Pad1)") (solder_mask_margin 0.07))
+    (pad 33 thru_hole circle (at -1.52 0.55 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -1.52 -0.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -1.52 -1.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -0.52 0.55 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -0.52 -0.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -0.52 -1.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at 0.48 0.55 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at 0.48 -0.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at 0.48 -1.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 179 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 smd rect (at -0.52 -0.45 270) (size 3.45 3.45) (layers F.Cu F.Paste F.Mask)
+      (net 179 "Net-(U2-Pad33)"))
+    (pad 9 smd rect (at -2.27 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 180 "Net-(U2-Pad9)") (solder_mask_margin 0.07))
+    (pad 17 smd rect (at 1.955 1.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 181 "Net-(U2-Pad17)") (solder_mask_margin 0.07))
+    (pad 25 smd rect (at 1.23 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 182 "Net-(U2-Pad25)") (solder_mask_margin 0.07))
+  )
+
+  (module penguin:QFP40P1600X1600X120-128N_ATSAME54P20A (layer F.Cu) (tedit 5E6D9777) (tstamp 5E752F71)
+    (at 86.36 109.22)
+    (path /5E7872D3/5E84F3B3)
+    (fp_text reference U1 (at -4.500975 -9.803025) (layer F.SilkS)
+      (effects (font (size 1.001331 1.001331) (thickness 0.015)))
+    )
+    (fp_text value p_ATSAME54P20A-AU (at 6.78639 10.114365) (layer F.Fab)
+      (effects (font (size 1.002417 1.002417) (thickness 0.015)))
+    )
+    (fp_line (start -7 7) (end -7 6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start -6.6 7) (end -7 7) (layer F.SilkS) (width 0.127))
+    (fp_line (start 7 7) (end 7 6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start 6.6 7) (end 7 7) (layer F.SilkS) (width 0.127))
+    (fp_line (start 7 -7) (end 7 -6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start 6.6 -7) (end 7 -7) (layer F.SilkS) (width 0.127))
+    (fp_line (start -7 -7) (end -7 -6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start -6.6 -7) (end -7 -7) (layer F.SilkS) (width 0.127))
+    (fp_line (start 8.655 8.655) (end 8.655 -8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.655 8.655) (end -8.655 -8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.655 -8.655) (end 8.655 -8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.655 8.655) (end 8.655 8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -7 7) (end -7 -7) (layer F.Fab) (width 0.127))
+    (fp_line (start 7 7) (end 7 -7) (layer F.Fab) (width 0.127))
+    (fp_line (start 7 -7) (end -7 -7) (layer F.Fab) (width 0.127))
+    (fp_line (start 7 7) (end -7 7) (layer F.Fab) (width 0.127))
+    (fp_circle (center -9.14 -6.44) (end -8.94 -6.44) (layer F.Fab) (width 0.1))
+    (fp_circle (center -9.14 -6.44) (end -8.94 -6.44) (layer F.SilkS) (width 0.1))
+    (pad 96 smd rect (at 7.67 -6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 95 smd rect (at 7.67 -5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 40 "Net-(U1-Pad95)"))
+    (pad 94 smd rect (at 7.67 -5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 41 "Net-(U1-Pad94)"))
+    (pad 93 smd rect (at 7.67 -5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 42 "Net-(U1-Pad93)"))
+    (pad 92 smd rect (at 7.67 -4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 43 "Net-(U1-Pad92)"))
+    (pad 91 smd rect (at 7.67 -4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 44 "Net-(U1-Pad91)"))
+    (pad 90 smd rect (at 7.67 -3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 89 smd rect (at 7.67 -3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 45 "Net-(U1-Pad89)"))
+    (pad 88 smd rect (at 7.67 -3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 46 "Net-(U1-Pad88)"))
+    (pad 87 smd rect (at 7.67 -2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 47 "Net-(U1-Pad87)"))
+    (pad 86 smd rect (at 7.67 -2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 48 "Net-(U1-Pad86)"))
+    (pad 85 smd rect (at 7.67 -1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 49 "Net-(U1-Pad85)"))
+    (pad 84 smd rect (at 7.67 -1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 50 "Net-(U1-Pad84)"))
+    (pad 83 smd rect (at 7.67 -1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 51 "Net-(U1-Pad83)"))
+    (pad 82 smd rect (at 7.67 -0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 52 "Net-(U1-Pad82)"))
+    (pad 81 smd rect (at 7.67 -0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 53 "Net-(U1-Pad81)"))
+    (pad 80 smd rect (at 7.67 0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 54 "Net-(U1-Pad80)"))
+    (pad 79 smd rect (at 7.67 0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 55 "Net-(U1-Pad79)"))
+    (pad 78 smd rect (at 7.67 1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 77 smd rect (at 7.67 1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 56 "Net-(U1-Pad77)"))
+    (pad 76 smd rect (at 7.67 1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 57 "Net-(U1-Pad76)"))
+    (pad 75 smd rect (at 7.67 2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 58 "Net-(U1-Pad75)"))
+    (pad 74 smd rect (at 7.67 2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 59 "Net-(U1-Pad74)"))
+    (pad 73 smd rect (at 7.67 3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 60 "Net-(U1-Pad73)"))
+    (pad 72 smd rect (at 7.67 3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 61 "Net-(U1-Pad72)"))
+    (pad 71 smd rect (at 7.67 3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 62 "Net-(U1-Pad71)"))
+    (pad 70 smd rect (at 7.67 4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 63 "Net-(U1-Pad70)"))
+    (pad 69 smd rect (at 7.67 4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 64 "Net-(U1-Pad69)"))
+    (pad 68 smd rect (at 7.67 5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 65 "Net-(U1-Pad68)"))
+    (pad 67 smd rect (at 7.67 5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 66 "Net-(U1-Pad67)"))
+    (pad 66 smd rect (at 7.67 5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 67 "Net-(U1-Pad66)"))
+    (pad 65 smd rect (at 7.67 6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 68 "Net-(U1-Pad65)"))
+    (pad 32 smd rect (at -7.67 6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 69 "Net-(U1-Pad32)"))
+    (pad 31 smd rect (at -7.67 5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 30 smd rect (at -7.67 5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 70 "Net-(U1-Pad30)"))
+    (pad 29 smd rect (at -7.67 5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 71 "Net-(U1-Pad29)"))
+    (pad 28 smd rect (at -7.67 4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 72 "Net-(U1-Pad28)"))
+    (pad 27 smd rect (at -7.67 4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 73 "Net-(U1-Pad27)"))
+    (pad 26 smd rect (at -7.67 3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 74 "Net-(U1-Pad26)"))
+    (pad 25 smd rect (at -7.67 3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 75 "Net-(U1-Pad25)"))
+    (pad 24 smd rect (at -7.67 3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 76 "Net-(U1-Pad24)"))
+    (pad 23 smd rect (at -7.67 2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 77 "Net-(U1-Pad23)"))
+    (pad 22 smd rect (at -7.67 2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 78 "Net-(U1-Pad22)"))
+    (pad 21 smd rect (at -7.67 1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 79 "Net-(U1-Pad21)"))
+    (pad 20 smd rect (at -7.67 1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 80 "Net-(U1-Pad20)"))
+    (pad 19 smd rect (at -7.67 1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 81 "Net-(U1-Pad19)"))
+    (pad 18 smd rect (at -7.67 0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 82 "Net-(U1-Pad18)"))
+    (pad 17 smd rect (at -7.67 0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 83 "Net-(U1-Pad17)"))
+    (pad 16 smd rect (at -7.67 -0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 84 "Net-(U1-Pad16)"))
+    (pad 15 smd rect (at -7.67 -0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 85 "Net-(U1-Pad15)"))
+    (pad 14 smd rect (at -7.67 -1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 86 "Net-(U1-Pad14)"))
+    (pad 13 smd rect (at -7.67 -1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 87 "Net-(U1-Pad13)"))
+    (pad 12 smd rect (at -7.67 -1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 88 "Net-(U1-Pad12)"))
+    (pad 11 smd rect (at -7.67 -2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 89 "Net-(U1-Pad11)"))
+    (pad 10 smd rect (at -7.67 -2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 90 "Net-(U1-Pad10)"))
+    (pad 9 smd rect (at -7.67 -3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 91 "Net-(U1-Pad9)"))
+    (pad 8 smd rect (at -7.67 -3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 92 "Net-(U1-Pad8)"))
+    (pad 7 smd rect (at -7.67 -3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 93 "Net-(U1-Pad7)"))
+    (pad 6 smd rect (at -7.67 -4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 94 "Net-(U1-Pad6)"))
+    (pad 5 smd rect (at -7.67 -4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 95 "Net-(U1-Pad5)"))
+    (pad 4 smd rect (at -7.67 -5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 96 "Net-(U1-Pad4)"))
+    (pad 3 smd rect (at -7.67 -5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 97 "Net-(U1-Pad3)"))
+    (pad 2 smd rect (at -7.67 -5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 202 "Net-(C2-Pad1)"))
+    (pad 1 smd rect (at -7.67 -6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 98 "Net-(C1-Pad2)"))
+    (pad 128 smd rect (at -6.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 183 g_3v3))
+    (pad 127 smd rect (at -5.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 99 "Net-(U1-Pad127)"))
+    (pad 126 smd rect (at -5.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 100 "Net-(U1-Pad126)"))
+    (pad 125 smd rect (at -5 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 101 "Net-(U1-Pad125)"))
+    (pad 124 smd rect (at -4.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 102 "Net-(U1-Pad124)"))
+    (pad 123 smd rect (at -4.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 103 "Net-(U1-Pad123)"))
+    (pad 122 smd rect (at -3.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 104 "Net-(U1-Pad122)"))
+    (pad 121 smd rect (at -3.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 105 "Net-(U1-Pad121)"))
+    (pad 120 smd rect (at -3 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 106 "Net-(U1-Pad120)"))
+    (pad 119 smd rect (at -2.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 107 "Net-(U1-Pad119)"))
+    (pad 118 smd rect (at -2.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 108 "Net-(U1-Pad118)"))
+    (pad 117 smd rect (at -1.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 109 "Net-(U1-Pad117)"))
+    (pad 116 smd rect (at -1.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 110 "Net-(U1-Pad116)"))
+    (pad 115 smd rect (at -1 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 111 "Net-(U1-Pad115)"))
+    (pad 114 smd rect (at -0.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 112 "Net-(U1-Pad114)"))
+    (pad 113 smd rect (at -0.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 113 "Net-(U1-Pad113)"))
+    (pad 112 smd rect (at 0.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 114 "Net-(U1-Pad112)"))
+    (pad 111 smd rect (at 0.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 115 "Net-(U1-Pad111)"))
+    (pad 110 smd rect (at 1 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 116 "Net-(U1-Pad110)"))
+    (pad 109 smd rect (at 1.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 117 "Net-(U1-Pad109)"))
+    (pad 108 smd rect (at 1.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 118 "Net-(U1-Pad108)"))
+    (pad 107 smd rect (at 2.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 119 "Net-(U1-Pad107)"))
+    (pad 106 smd rect (at 2.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 105 smd rect (at 3 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 120 "Net-(U1-Pad105)"))
+    (pad 104 smd rect (at 3.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 121 "Net-(U1-Pad104)"))
+    (pad 103 smd rect (at 3.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 122 "Net-(U1-Pad103)"))
+    (pad 102 smd rect (at 4.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 123 "Net-(U1-Pad102)"))
+    (pad 101 smd rect (at 4.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 124 "Net-(U1-Pad101)"))
+    (pad 100 smd rect (at 5 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 125 "Net-(U1-Pad100)"))
+    (pad 99 smd rect (at 5.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 126 "Net-(U1-Pad99)"))
+    (pad 98 smd rect (at 5.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 127 "Net-(U1-Pad98)"))
+    (pad 97 smd rect (at 6.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 128 "Net-(U1-Pad97)"))
+    (pad 64 smd rect (at 6.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 63 smd rect (at 5.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 203 "Net-(C5-Pad2)"))
+    (pad 62 smd rect (at 5.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 204 "Net-(C4-Pad2)"))
+    (pad 61 smd rect (at 5 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 129 "Net-(U1-Pad61)"))
+    (pad 60 smd rect (at 4.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 130 "Net-(U1-Pad60)"))
+    (pad 59 smd rect (at 4.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 131 "Net-(U1-Pad59)"))
+    (pad 58 smd rect (at 3.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 132 "Net-(U1-Pad58)"))
+    (pad 57 smd rect (at 3.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 133 "Net-(U1-Pad57)"))
+    (pad 56 smd rect (at 3 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 134 "Net-(U1-Pad56)"))
+    (pad 55 smd rect (at 2.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 135 "Net-(U1-Pad55)"))
+    (pad 54 smd rect (at 2.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 136 "Net-(U1-Pad54)"))
+    (pad 53 smd rect (at 1.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 52 smd rect (at 1.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 137 "Net-(U1-Pad52)"))
+    (pad 51 smd rect (at 1 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 138 "Net-(U1-Pad51)"))
+    (pad 50 smd rect (at 0.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 139 "Net-(U1-Pad50)"))
+    (pad 49 smd rect (at 0.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 140 "Net-(U1-Pad49)"))
+    (pad 48 smd rect (at -0.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 141 "Net-(U1-Pad48)"))
+    (pad 47 smd rect (at -0.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 142 "Net-(U1-Pad47)"))
+    (pad 46 smd rect (at -1 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 143 "Net-(U1-Pad46)"))
+    (pad 45 smd rect (at -1.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 44 smd rect (at -1.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 144 "Net-(U1-Pad44)"))
+    (pad 43 smd rect (at -2.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 145 "Net-(U1-Pad43)"))
+    (pad 42 smd rect (at -2.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 146 "Net-(U1-Pad42)"))
+    (pad 41 smd rect (at -3 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 147 "Net-(U1-Pad41)"))
+    (pad 40 smd rect (at -3.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 148 "Net-(U1-Pad40)"))
+    (pad 39 smd rect (at -3.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 149 "Net-(U1-Pad39)"))
+    (pad 38 smd rect (at -4.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 37 smd rect (at -4.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 150 "Net-(U1-Pad37)"))
+    (pad 36 smd rect (at -5 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 151 "Net-(U1-Pad36)"))
+    (pad 35 smd rect (at -5.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 152 "Net-(U1-Pad35)"))
+    (pad 34 smd rect (at -5.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 153 "Net-(U1-Pad34)"))
+    (pad 33 smd rect (at -6.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 154 "Net-(U1-Pad33)"))
+  )
+
+  (module Connector_IDC:IDC-Header_2x20_P2.54mm_Horizontal (layer F.Cu) (tedit 59DE239E) (tstamp 5E752EDB)
+    (at 72.39 64.77 90)
+    (descr "Through hole angled IDC box header, 2x20, 2.54mm pitch, double rows")
+    (tags "Through hole IDC box header THT 2x20 2.54mm double row")
+    (path /5E8589A7/5E858ED6)
+    (fp_text reference J3 (at 6.105 -6.35 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_02x20_Odd_Even_LCD_INTF (at 6.105 54.864 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 13.48 53.61) (end -1.12 53.61) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 13.48 -5.35) (end 13.48 53.61) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.12 53.61) (end -1.12 -5.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.12 -5.35) (end 13.48 -5.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.13 53.61) (end 4.13 -5.35) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 53.61) (end 13.48 53.61) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 26.38) (end 13.48 26.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 21.88) (end 13.48 21.88) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 -5.35) (end 13.48 -5.35) (layer F.SilkS) (width 0.12))
+    (fp_line (start 13.48 -5.35) (end 13.48 53.61) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0 -1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 -1.27) (end -1.27 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 5.38 -5.1) (end 13.23 -5.1) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 9.84) (end -0.32 9.84) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 7.3) (end -0.32 7.3) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 53.36) (end 4.38 -4.1) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 53.36) (end 13.23 53.36) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 47.94) (end -0.32 47.94) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 45.4) (end -0.32 45.4) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 42.86) (end -0.32 42.86) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 40.32) (end -0.32 40.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 4.76) (end -0.32 4.76) (layer F.Fab) (width 0.1))
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+    (fp_text user %R (at 8.805 24.13) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 40 thru_hole oval (at 2.54 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 12 "Net-(J3-Pad40)"))
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+      (net 13 "Net-(J3-Pad39)"))
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+      (net 14 "Net-(J3-Pad38)"))
+    (pad 37 thru_hole oval (at 0 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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+    (pad 36 thru_hole oval (at 2.54 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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+      (net 16 /g_SCREEN_INTF/D22))
+    (pad 34 thru_hole oval (at 2.54 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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+    (pad 33 thru_hole oval (at 0 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 18 /g_SCREEN_INTF/D20))
+    (pad 32 thru_hole oval (at 2.54 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 19 /g_SCREEN_INTF/D19))
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+      (net 20 /g_SCREEN_INTF/D18))
+    (pad 30 thru_hole oval (at 2.54 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 21 /g_SCREEN_INTF/D17))
+    (pad 29 thru_hole oval (at 0 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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+    (pad 28 thru_hole oval (at 2.54 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 23 /g_SCREEN_INTF/D15))
+    (pad 27 thru_hole oval (at 0 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 24 /g_SCREEN_INTF/D14))
+    (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 25 /g_SCREEN_INTF/D13))
+    (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 26 /g_SCREEN_INTF/D12))
+    (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 27 /g_SCREEN_INTF/D11))
+    (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 28 /g_SCREEN_INTF/D10))
+    (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 29 /g_SCREEN_INTF/D9))
+    (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 30 /g_SCREEN_INTF/D8))
+    (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 31 /g_SCREEN_INTF/D7))
+    (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 32 /g_SCREEN_INTF/D6))
+    (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 33 /g_SCREEN_INTF/D5))
+    (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 34 /g_SCREEN_INTF/D4))
+    (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 35 /g_SCREEN_INTF/D3))
+    (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 36 /g_SCREEN_INTF/D2))
+    (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 37 /g_SCREEN_INTF/D1))
+    (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 38 /g_SCREEN_INTF/D0))
+    (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 193 /g_SCREEN_INTF/TFT_TE))
+    (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 194 /g_SCREEN_INTF/~TFT_RD))
+    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 195 /g_SCREEN_INTF/~TFT_WR))
+    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 196 /g_SCREEN_INTF/~TFT_CS))
+    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 197 /g_SCREEN_INTF/TFT_RSDC))
+    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 198 /g_SCREEN_INTF/~TFT_RST))
+    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 39 "Net-(J3-Pad6)"))
+    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 199 /g_SCREEN_INTF/TFT_TOUCH_INT))
+    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 200 /g_SCREEN_INTF/TFT_TOUCH_SDA))
+    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 201 /g_SCREEN_INTF/TFT_TOUCH_SCL))
+    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 188 GND))
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 183 g_3v3))
+    (model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x20_P2.54mm_Horizontal.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_USB:USB_Micro-B_Wuerth_629105150521 (layer F.Cu) (tedit 5A142044) (tstamp 5E752E24)
+    (at 54.61 73.66 270)
+    (descr "USB Micro-B receptacle, http://www.mouser.com/ds/2/445/629105150521-469306.pdf")
+    (tags "usb micro receptacle")
+    (path /5E7C0F59/5E8480AD)
+    (attr smd)
+    (fp_text reference J1 (at 0 -3.5 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value USB_B_Micro (at 0 5.6 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user "PCB Edge" (at 0 3.75 90) (layer Dwgs.User)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_text user %R (at 0 1.05 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.95 -3.34) (end -4.94 -3.34) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.95 4.85) (end 4.95 -3.34) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.94 4.85) (end 4.95 4.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.94 -3.34) (end -4.94 4.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.8 -2.4) (end 2.8 -2.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.8 -2.4) (end -2.8 -2.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.8 -2.825) (end -1.8 -2.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.075 -2.825) (end -1.8 -2.825) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.15 0.75) (end 4.15 -0.65) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.15 3.3) (end 4.15 3.15) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.85 3.3) (end 4.15 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.85 3.75) (end 3.85 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start -3.85 3.3) (end -3.85 3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.15 3.3) (end -3.85 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.15 3.15) (end -4.15 3.3) (layer F.SilkS) (width 0.15))
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+    (fp_line (start -1.075 -2.95) (end -1.075 -2.725) (layer F.Fab) (width 0.15))
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+    (fp_line (start -1.525 -2.725) (end -1.525 -2.95) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.3 -2.55) (end -1.525 -2.725) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.075 -2.725) (end -1.3 -2.55) (layer F.Fab) (width 0.15))
+    (fp_line (start -2.7 3.75) (end 2.7 3.75) (layer F.Fab) (width 0.15))
+    (fp_line (start 4 -2.25) (end -4 -2.25) (layer F.Fab) (width 0.15))
+    (fp_line (start 4 3.15) (end 4 -2.25) (layer F.Fab) (width 0.15))
+    (fp_line (start 3.7 3.15) (end 4 3.15) (layer F.Fab) (width 0.15))
+    (fp_line (start 3.7 4.35) (end 3.7 3.15) (layer F.Fab) (width 0.15))
+    (fp_line (start -3.7 4.35) (end 3.7 4.35) (layer F.Fab) (width 0.15))
+    (fp_line (start -3.7 3.15) (end -3.7 4.35) (layer F.Fab) (width 0.15))
+    (fp_line (start -4 3.15) (end -3.7 3.15) (layer F.Fab) (width 0.15))
+    (fp_line (start -4 -2.25) (end -4 3.15) (layer F.Fab) (width 0.15))
+    (pad "" np_thru_hole oval (at 2.5 -0.8 270) (size 0.8 0.8) (drill 0.8) (layers *.Cu *.Mask))
+    (pad "" np_thru_hole oval (at -2.5 -0.8 270) (size 0.8 0.8) (drill 0.8) (layers *.Cu *.Mask))
+    (pad 6 thru_hole oval (at 3.875 1.95 270) (size 1.15 1.8) (drill oval 0.55 1.2) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 6 thru_hole oval (at -3.875 1.95 270) (size 1.15 1.8) (drill oval 0.55 1.2) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 6 thru_hole oval (at 3.725 -1.85 270) (size 1.45 2) (drill oval 0.85 1.4) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 6 thru_hole oval (at -3.725 -1.85 270) (size 1.45 2) (drill oval 0.85 1.4) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 5 smd rect (at 1.3 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(J1-Pad5)"))
+    (pad 4 smd rect (at 0.65 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 3 "Net-(J1-Pad4)"))
+    (pad 3 smd rect (at 0 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 190 /s_USB_INTF.sch/USB_D+))
+    (pad 2 smd rect (at -0.65 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 191 /s_USB_INTF.sch/USB_D-))
+    (pad 1 smd rect (at -1.3 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(J1-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_USB.3dshapes/USB_Micro-B_Wuerth_629105150521.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 50.8 50.8) (end 53.34 50.8) (layer Edge.Cuts) (width 0.05) (tstamp 5E6E9EBC))
+  (gr_line (start 50.8 134.62) (end 50.8 50.8) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 228.6 134.62) (end 50.8 134.62) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 228.6 50.8) (end 228.6 134.62) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 53.34 50.8) (end 228.6 50.8) (layer Edge.Cuts) (width 0.05))
+
+)
diff --git a/electrical/same54_dev_board/same54_dev_board.kicad_pcb-bak b/electrical/same54_dev_board/same54_dev_board.kicad_pcb-bak
index 02c8ecb..11e6e48 100644
--- a/electrical/same54_dev_board/same54_dev_board.kicad_pcb-bak
+++ b/electrical/same54_dev_board/same54_dev_board.kicad_pcb-bak
@@ -1 +1,1378 @@
-(kicad_pcb (version 4) (host kicad "dummy file") )
+(kicad_pcb (version 20171130) (host pcbnew 5.1.5)
+
+  (general
+    (thickness 1.6)
+    (drawings 5)
+    (tracks 0)
+    (zones 0)
+    (modules 7)
+    (nets 217)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
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+  (net 30 /g_SCREEN_INTF/D11)
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+  (net 34 /g_SCREEN_INTF/D7)
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+  (net 37 /g_SCREEN_INTF/D4)
+  (net 38 /g_SCREEN_INTF/D3)
+  (net 39 /g_SCREEN_INTF/D2)
+  (net 40 /g_SCREEN_INTF/D1)
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+  (net 46 "Net-(J3-Pad8)")
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+    (add_net "Net-(U2-Pad31)")
+    (add_net "Net-(U2-Pad32)")
+    (add_net "Net-(U2-Pad33)")
+    (add_net "Net-(U2-Pad4)")
+    (add_net "Net-(U2-Pad5)")
+    (add_net "Net-(U2-Pad6)")
+    (add_net "Net-(U2-Pad7)")
+    (add_net "Net-(U2-Pad8)")
+    (add_net "Net-(U2-Pad9)")
+    (add_net "Net-(U3-Pad29)")
+    (add_net "Net-(U3-Pad30)")
+    (add_net "Net-(U3-Pad31)")
+    (add_net "Net-(U3-Pad32)")
+    (add_net "Net-(U3-Pad33)")
+    (add_net "Net-(U3-Pad34)")
+    (add_net "Net-(U3-Pad35)")
+    (add_net "Net-(U3-Pad4)")
+    (add_net g_3v3)
+  )
+
+  (module Connector_PinSocket_1.27mm:PinSocket_2x04_P1.27mm_Vertical (layer F.Cu) (tedit 5A19A431) (tstamp 5E75429F)
+    (at 209.55 96.52)
+    (descr "Through hole straight socket strip, 2x04, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated")
+    (tags "Through hole socket strip THT 2x04 1.27mm double row")
+    (path /5E805E4F/5EA1E350)
+    (fp_text reference J2 (at -0.635 -2.135) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_ARM_JTAG_SWD_10 (at -0.635 5.945) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at -0.635 1.905 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -2.67 4.95) (end -2.67 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.38 4.95) (end -2.67 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.38 -1.15) (end 1.38 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.67 -1.15) (end 1.38 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0 -0.76) (end 0.95 -0.76) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.95 -0.76) (end 0.95 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.76 0.635) (end 0.95 0.635) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.95 0.635) (end 0.95 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.96247 4.505) (end -0.30753 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.22 4.505) (end -1.57753 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.30753 4.505) (end 0.95 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.22 -0.695) (end -2.22 4.505) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.96247 -0.695) (end -0.76 -0.695) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.22 -0.695) (end -1.57753 -0.695) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.16 4.445) (end -2.16 -0.635) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.89 4.445) (end -2.16 4.445) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.89 0.1275) (end 0.89 4.445) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.1275 -0.635) (end 0.89 0.1275) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.16 -0.635) (end 0.1275 -0.635) (layer F.Fab) (width 0.1))
+    (pad 8 thru_hole oval (at -1.27 3.81) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 7 "Net-(J2-Pad8)"))
+    (pad 7 thru_hole oval (at 0 3.81) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 8 "Net-(J2-Pad7)"))
+    (pad 6 thru_hole oval (at -1.27 2.54) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 9 "Net-(J2-Pad6)"))
+    (pad 5 thru_hole oval (at 0 2.54) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 10 "Net-(J2-Pad3)"))
+    (pad 4 thru_hole oval (at -1.27 1.27) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 11 "Net-(J2-Pad4)"))
+    (pad 3 thru_hole oval (at 0 1.27) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 10 "Net-(J2-Pad3)"))
+    (pad 2 thru_hole oval (at -1.27 0) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 12 "Net-(J2-Pad2)"))
+    (pad 1 thru_hole rect (at 0 0) (size 1 1) (drill 0.7) (layers *.Cu *.Mask)
+      (net 13 "Net-(J2-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_PinSocket_1.27mm.3dshapes/PinSocket_2x04_P1.27mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm (layer F.Cu) (tedit 5A0FD1B2) (tstamp 5E752FF8)
+    (at 68.58 100.33)
+    (descr "SMD Crystal FC-135 https://support.epson.biz/td/api/doc_check.php?dl=brief_FC-135R_en.pdf")
+    (tags "SMD SMT Crystal")
+    (path /5E805E4F/5E75D825)
+    (attr smd)
+    (fp_text reference Y1 (at 0 -2) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value XOSC32 (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2 -1.15) (end 2 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 -1.15) (end -2 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 1.15) (end 2 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 0.75) (end 1.6 0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.75) (end 1.6 -0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.75) (end 1.6 0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.675 -0.875) (end 0.675 -0.875) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.675 0.875) (end 0.675 0.875) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.6 -0.75) (end -1.6 0.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -2 -1.15) (end 2 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 0 -2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 2 smd rect (at -1.25 0) (size 1 1.8) (layers F.Cu F.Paste F.Mask)
+      (net 113 "Net-(C1-Pad2)"))
+    (pad 1 smd rect (at 1.25 0) (size 1 1.8) (layers F.Cu F.Paste F.Mask)
+      (net 216 "Net-(C2-Pad2)"))
+    (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3215-2Pin_3.2x1.5mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module proj_modules:SOP80P1030X264-36N (layer F.Cu) (tedit 5E702418) (tstamp 5E752FE7)
+    (at 96.52 78.74)
+    (path /5E8589A7/5E86D6D7)
+    (fp_text reference U3 (at -2.415 -8.587) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.015)))
+    )
+    (fp_text value MAX7301AAX+ (at 5.84 8.587) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.015)))
+    )
+    (fp_line (start 5.865 -8.025) (end 5.865 8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.865 -8.025) (end -5.865 8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.865 8.025) (end 5.865 8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.865 -8.025) (end 5.865 -8.025) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.8 -7.775) (end 3.8 7.775) (layer F.Fab) (width 0.127))
+    (fp_line (start -3.8 -7.775) (end -3.8 7.775) (layer F.Fab) (width 0.127))
+    (fp_line (start -3.8 7.775) (end 3.8 7.775) (layer F.SilkS) (width 0.127))
+    (fp_line (start -3.8 -7.775) (end 3.8 -7.775) (layer F.SilkS) (width 0.127))
+    (fp_line (start -3.8 7.775) (end 3.8 7.775) (layer F.Fab) (width 0.127))
+    (fp_line (start -3.8 -7.775) (end 3.8 -7.775) (layer F.Fab) (width 0.127))
+    (fp_circle (center -6.51 -7.34) (end -6.41 -7.34) (layer F.Fab) (width 0.2))
+    (fp_circle (center -6.51 -7.34) (end -6.41 -7.34) (layer F.SilkS) (width 0.2))
+    (pad 36 smd rect (at 4.72 -6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 205 g_3v3))
+    (pad 35 smd rect (at 4.72 -6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 206 "Net-(U3-Pad35)"))
+    (pad 34 smd rect (at 4.72 -5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 207 "Net-(U3-Pad34)"))
+    (pad 33 smd rect (at 4.72 -4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 208 "Net-(U3-Pad33)"))
+    (pad 32 smd rect (at 4.72 -3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 209 "Net-(U3-Pad32)"))
+    (pad 31 smd rect (at 4.72 -2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 210 "Net-(U3-Pad31)"))
+    (pad 30 smd rect (at 4.72 -2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 211 "Net-(U3-Pad30)"))
+    (pad 29 smd rect (at 4.72 -1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 212 "Net-(U3-Pad29)"))
+    (pad 28 smd rect (at 4.72 -0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 18 /g_SCREEN_INTF/D23))
+    (pad 27 smd rect (at 4.72 0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 19 /g_SCREEN_INTF/D22))
+    (pad 26 smd rect (at 4.72 1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 20 /g_SCREEN_INTF/D21))
+    (pad 25 smd rect (at 4.72 2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 21 /g_SCREEN_INTF/D20))
+    (pad 24 smd rect (at 4.72 2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 22 /g_SCREEN_INTF/D19))
+    (pad 23 smd rect (at 4.72 3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 23 /g_SCREEN_INTF/D18))
+    (pad 22 smd rect (at 4.72 4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 24 /g_SCREEN_INTF/D17))
+    (pad 21 smd rect (at 4.72 5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 25 /g_SCREEN_INTF/D16))
+    (pad 20 smd rect (at 4.72 6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 26 /g_SCREEN_INTF/D15))
+    (pad 19 smd rect (at 4.72 6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 27 /g_SCREEN_INTF/D14))
+    (pad 18 smd rect (at -4.72 6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 28 /g_SCREEN_INTF/D13))
+    (pad 17 smd rect (at -4.72 6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 29 /g_SCREEN_INTF/D12))
+    (pad 16 smd rect (at -4.72 5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 30 /g_SCREEN_INTF/D11))
+    (pad 15 smd rect (at -4.72 4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 31 /g_SCREEN_INTF/D10))
+    (pad 14 smd rect (at -4.72 3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 32 /g_SCREEN_INTF/D9))
+    (pad 13 smd rect (at -4.72 2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 33 /g_SCREEN_INTF/D8))
+    (pad 12 smd rect (at -4.72 2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 34 /g_SCREEN_INTF/D7))
+    (pad 11 smd rect (at -4.72 1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 35 /g_SCREEN_INTF/D6))
+    (pad 10 smd rect (at -4.72 0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 36 /g_SCREEN_INTF/D5))
+    (pad 9 smd rect (at -4.72 -0.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 37 /g_SCREEN_INTF/D4))
+    (pad 8 smd rect (at -4.72 -1.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 38 /g_SCREEN_INTF/D3))
+    (pad 7 smd rect (at -4.72 -2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 39 /g_SCREEN_INTF/D2))
+    (pad 6 smd rect (at -4.72 -2.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 40 /g_SCREEN_INTF/D1))
+    (pad 5 smd rect (at -4.72 -3.6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 41 /g_SCREEN_INTF/D0))
+    (pad 4 smd rect (at -4.72 -4.4) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 213 "Net-(U3-Pad4)"))
+    (pad 3 smd rect (at -4.72 -5.2) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 214 GND))
+    (pad 2 smd rect (at -4.72 -6) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 214 GND))
+    (pad 1 smd rect (at -4.72 -6.8) (size 1.79 0.54) (layers F.Cu F.Paste F.Mask)
+      (net 215 "Net-(R1-Pad1)"))
+  )
+
+  (module digikey-footprints:QFN-32-1EP_5x5mm (layer F.Cu) (tedit 5D2895FE) (tstamp 5E752FB3)
+    (at 55.88 59.69)
+    (path /5E7C0F59/5E84744C)
+    (attr smd)
+    (fp_text reference U2 (at 0 -4.71) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value FT232RQ-REEL (at 0 4.51) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.98 2.05) (end -3.02 2.05) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.98 -2.95) (end 1.98 2.05) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.08 2.15) (end 1.68 2.15) (layer F.SilkS) (width 0.1))
+    (fp_line (start 2.08 1.75) (end 2.08 2.15) (layer F.SilkS) (width 0.1))
+    (fp_line (start 2.08 -3.05) (end 2.08 -2.65) (layer F.SilkS) (width 0.1))
+    (fp_line (start 2.08 -3.05) (end 1.68 -3.05) (layer F.SilkS) (width 0.1))
+    (fp_line (start -3.12 2.15) (end -3.12 1.75) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.72 2.15) (end -3.12 2.15) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.62 -2.95) (end -3.02 -2.55) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.02 -2.55) (end -3.02 2.05) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.62 -2.95) (end 1.98 -2.95) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.12 -2.45) (end -3.32 -2.45) (layer F.SilkS) (width 0.1))
+    (fp_line (start -3.12 -2.65) (end -3.12 -2.45) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.72 -3.05) (end -3.12 -2.65) (layer F.SilkS) (width 0.1))
+    (fp_line (start -2.52 -3.05) (end -2.72 -3.05) (layer F.SilkS) (width 0.1))
+    (fp_text user %R (at -0.52 -0.45) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.61 2.68) (end -3.65 2.68) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.61 -3.58) (end -3.65 -3.58) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.61 -3.58) (end 2.61 2.68) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.65 2.68) (end -3.65 -3.58) (layer F.CrtYd) (width 0.05))
+    (pad 32 smd rect (at -2.27 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 173 "Net-(U2-Pad32)") (solder_mask_margin 0.07))
+    (pad 31 smd rect (at -1.77 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 174 "Net-(U2-Pad31)") (solder_mask_margin 0.07))
+    (pad 30 smd rect (at -1.27 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 175 "Net-(U2-Pad30)") (solder_mask_margin 0.07))
+    (pad 29 smd rect (at -0.77 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 176 "Net-(U2-Pad29)") (solder_mask_margin 0.07))
+    (pad 28 smd rect (at -0.27 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 177 "Net-(U2-Pad28)") (solder_mask_margin 0.07))
+    (pad 27 smd rect (at 0.23 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 178 "Net-(U2-Pad27)") (solder_mask_margin 0.07))
+    (pad 26 smd rect (at 0.73 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 179 "Net-(U2-Pad26)") (solder_mask_margin 0.07))
+    (pad 24 smd rect (at 1.955 -2.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 180 "Net-(U2-Pad24)") (solder_mask_margin 0.07))
+    (pad 23 smd rect (at 1.955 -1.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 181 "Net-(U2-Pad23)") (solder_mask_margin 0.07))
+    (pad 22 smd rect (at 1.955 -1.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 182 "Net-(U2-Pad22)") (solder_mask_margin 0.07))
+    (pad 21 smd rect (at 1.955 -0.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 183 "Net-(U2-Pad21)") (solder_mask_margin 0.07))
+    (pad 20 smd rect (at 1.955 -0.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 184 "Net-(U2-Pad20)") (solder_mask_margin 0.07))
+    (pad 19 smd rect (at 1.955 0.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 185 "Net-(U2-Pad1)") (solder_mask_margin 0.07))
+    (pad 18 smd rect (at 1.955 0.8 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 186 "Net-(U2-Pad18)") (solder_mask_margin 0.07))
+    (pad 16 smd rect (at 1.23 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 187 "Net-(U2-Pad16)") (solder_mask_margin 0.07))
+    (pad 15 smd rect (at 0.73 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 188 "Net-(U2-Pad15)") (solder_mask_margin 0.07))
+    (pad 14 smd rect (at 0.23 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 189 "Net-(U2-Pad14)") (solder_mask_margin 0.07))
+    (pad 13 smd rect (at -0.27 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 190 "Net-(U2-Pad13)") (solder_mask_margin 0.07))
+    (pad 12 smd rect (at -0.77 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 191 "Net-(U2-Pad12)") (solder_mask_margin 0.07))
+    (pad 11 smd rect (at -1.27 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 192 "Net-(U2-Pad11)") (solder_mask_margin 0.07))
+    (pad 10 smd rect (at -1.77 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 193 "Net-(U2-Pad10)") (solder_mask_margin 0.07))
+    (pad 8 smd rect (at -2.995 1.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 194 "Net-(U2-Pad8)") (solder_mask_margin 0.07))
+    (pad 7 smd rect (at -2.995 0.8 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 195 "Net-(U2-Pad7)") (solder_mask_margin 0.07))
+    (pad 6 smd rect (at -2.995 0.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 196 "Net-(U2-Pad6)") (solder_mask_margin 0.07))
+    (pad 5 smd rect (at -2.995 -0.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 197 "Net-(U2-Pad5)") (solder_mask_margin 0.07))
+    (pad 4 smd rect (at -2.995 -0.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 198 "Net-(U2-Pad4)") (solder_mask_margin 0.07))
+    (pad 3 smd rect (at -2.995 -1.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 199 "Net-(U2-Pad3)") (solder_mask_margin 0.07))
+    (pad 2 smd rect (at -2.995 -1.7 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 200 "Net-(U2-Pad2)") (solder_mask_margin 0.07))
+    (pad 1 smd rect (at -2.995 -2.2 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 185 "Net-(U2-Pad1)") (solder_mask_margin 0.07))
+    (pad 33 thru_hole circle (at -1.52 0.55 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -1.52 -0.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -1.52 -1.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -0.52 0.55 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -0.52 -0.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at -0.52 -1.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at 0.48 0.55 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at 0.48 -0.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 thru_hole circle (at 0.48 -1.45 270) (size 0.2 0.2) (drill 0.2) (layers *.Cu *.Mask)
+      (net 201 "Net-(U2-Pad33)") (solder_mask_margin 0.1))
+    (pad 33 smd rect (at -0.52 -0.45 270) (size 3.45 3.45) (layers F.Cu F.Paste F.Mask)
+      (net 201 "Net-(U2-Pad33)"))
+    (pad 9 smd rect (at -2.27 2.025 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 202 "Net-(U2-Pad9)") (solder_mask_margin 0.07))
+    (pad 17 smd rect (at 1.955 1.3 270) (size 0.28 0.85) (layers F.Cu F.Paste F.Mask)
+      (net 203 "Net-(U2-Pad17)") (solder_mask_margin 0.07))
+    (pad 25 smd rect (at 1.23 -2.925 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask)
+      (net 204 "Net-(U2-Pad25)") (solder_mask_margin 0.07))
+  )
+
+  (module penguin:QFP40P1600X1600X120-128N_ATSAME54P20A (layer F.Cu) (tedit 5E6D9777) (tstamp 5E752F71)
+    (at 86.36 109.22)
+    (path /5E7872D3/5E84F3B3)
+    (fp_text reference U1 (at -4.500975 -9.803025) (layer F.SilkS)
+      (effects (font (size 1.001331 1.001331) (thickness 0.015)))
+    )
+    (fp_text value p_ATSAME54P20A-AU (at 6.78639 10.114365) (layer F.Fab)
+      (effects (font (size 1.002417 1.002417) (thickness 0.015)))
+    )
+    (fp_line (start -7 7) (end -7 6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start -6.6 7) (end -7 7) (layer F.SilkS) (width 0.127))
+    (fp_line (start 7 7) (end 7 6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start 6.6 7) (end 7 7) (layer F.SilkS) (width 0.127))
+    (fp_line (start 7 -7) (end 7 -6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start 6.6 -7) (end 7 -7) (layer F.SilkS) (width 0.127))
+    (fp_line (start -7 -7) (end -7 -6.6) (layer F.SilkS) (width 0.127))
+    (fp_line (start -6.6 -7) (end -7 -7) (layer F.SilkS) (width 0.127))
+    (fp_line (start 8.655 8.655) (end 8.655 -8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.655 8.655) (end -8.655 -8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.655 -8.655) (end 8.655 -8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.655 8.655) (end 8.655 8.655) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -7 7) (end -7 -7) (layer F.Fab) (width 0.127))
+    (fp_line (start 7 7) (end 7 -7) (layer F.Fab) (width 0.127))
+    (fp_line (start 7 -7) (end -7 -7) (layer F.Fab) (width 0.127))
+    (fp_line (start 7 7) (end -7 7) (layer F.Fab) (width 0.127))
+    (fp_circle (center -9.14 -6.44) (end -8.94 -6.44) (layer F.Fab) (width 0.1))
+    (fp_circle (center -9.14 -6.44) (end -8.94 -6.44) (layer F.SilkS) (width 0.1))
+    (pad 96 smd rect (at 7.67 -6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 95 smd rect (at 7.67 -5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 54 "Net-(U1-Pad95)"))
+    (pad 94 smd rect (at 7.67 -5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 55 "Net-(U1-Pad94)"))
+    (pad 93 smd rect (at 7.67 -5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 56 "Net-(U1-Pad93)"))
+    (pad 92 smd rect (at 7.67 -4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 57 "Net-(U1-Pad92)"))
+    (pad 91 smd rect (at 7.67 -4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 58 "Net-(U1-Pad91)"))
+    (pad 90 smd rect (at 7.67 -3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 89 smd rect (at 7.67 -3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 59 "Net-(U1-Pad89)"))
+    (pad 88 smd rect (at 7.67 -3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 60 "Net-(U1-Pad88)"))
+    (pad 87 smd rect (at 7.67 -2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 61 "Net-(U1-Pad87)"))
+    (pad 86 smd rect (at 7.67 -2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 62 "Net-(U1-Pad86)"))
+    (pad 85 smd rect (at 7.67 -1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 63 "Net-(U1-Pad85)"))
+    (pad 84 smd rect (at 7.67 -1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 64 "Net-(U1-Pad84)"))
+    (pad 83 smd rect (at 7.67 -1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 65 "Net-(U1-Pad83)"))
+    (pad 82 smd rect (at 7.67 -0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 66 "Net-(U1-Pad82)"))
+    (pad 81 smd rect (at 7.67 -0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 67 "Net-(U1-Pad81)"))
+    (pad 80 smd rect (at 7.67 0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 68 "Net-(U1-Pad80)"))
+    (pad 79 smd rect (at 7.67 0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 69 "Net-(U1-Pad79)"))
+    (pad 78 smd rect (at 7.67 1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 77 smd rect (at 7.67 1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 70 "Net-(U1-Pad77)"))
+    (pad 76 smd rect (at 7.67 1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 71 "Net-(U1-Pad76)"))
+    (pad 75 smd rect (at 7.67 2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 72 "Net-(U1-Pad75)"))
+    (pad 74 smd rect (at 7.67 2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 73 "Net-(U1-Pad74)"))
+    (pad 73 smd rect (at 7.67 3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 74 "Net-(U1-Pad73)"))
+    (pad 72 smd rect (at 7.67 3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 75 "Net-(U1-Pad72)"))
+    (pad 71 smd rect (at 7.67 3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 76 "Net-(U1-Pad71)"))
+    (pad 70 smd rect (at 7.67 4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 77 "Net-(U1-Pad70)"))
+    (pad 69 smd rect (at 7.67 4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 78 "Net-(U1-Pad69)"))
+    (pad 68 smd rect (at 7.67 5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 79 "Net-(U1-Pad68)"))
+    (pad 67 smd rect (at 7.67 5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 80 "Net-(U1-Pad67)"))
+    (pad 66 smd rect (at 7.67 5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 81 "Net-(U1-Pad66)"))
+    (pad 65 smd rect (at 7.67 6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 82 "Net-(U1-Pad65)"))
+    (pad 32 smd rect (at -7.67 6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 83 "Net-(U1-Pad32)"))
+    (pad 31 smd rect (at -7.67 5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask))
+    (pad 30 smd rect (at -7.67 5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 84 "Net-(U1-Pad30)"))
+    (pad 29 smd rect (at -7.67 5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 85 "Net-(U1-Pad29)"))
+    (pad 28 smd rect (at -7.67 4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 86 "Net-(U1-Pad28)"))
+    (pad 27 smd rect (at -7.67 4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 87 "Net-(U1-Pad27)"))
+    (pad 26 smd rect (at -7.67 3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 88 "Net-(U1-Pad26)"))
+    (pad 25 smd rect (at -7.67 3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 89 "Net-(U1-Pad25)"))
+    (pad 24 smd rect (at -7.67 3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 90 "Net-(U1-Pad24)"))
+    (pad 23 smd rect (at -7.67 2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 91 "Net-(U1-Pad23)"))
+    (pad 22 smd rect (at -7.67 2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 92 "Net-(U1-Pad22)"))
+    (pad 21 smd rect (at -7.67 1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 93 "Net-(U1-Pad21)"))
+    (pad 20 smd rect (at -7.67 1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 94 "Net-(U1-Pad20)"))
+    (pad 19 smd rect (at -7.67 1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 95 "Net-(U1-Pad19)"))
+    (pad 18 smd rect (at -7.67 0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 96 "Net-(U1-Pad18)"))
+    (pad 17 smd rect (at -7.67 0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 97 "Net-(U1-Pad17)"))
+    (pad 16 smd rect (at -7.67 -0.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 98 "Net-(U1-Pad16)"))
+    (pad 15 smd rect (at -7.67 -0.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 99 "Net-(U1-Pad15)"))
+    (pad 14 smd rect (at -7.67 -1) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 100 "Net-(U1-Pad14)"))
+    (pad 13 smd rect (at -7.67 -1.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 101 "Net-(U1-Pad13)"))
+    (pad 12 smd rect (at -7.67 -1.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 102 "Net-(U1-Pad12)"))
+    (pad 11 smd rect (at -7.67 -2.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 103 "Net-(U1-Pad11)"))
+    (pad 10 smd rect (at -7.67 -2.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 104 "Net-(U1-Pad10)"))
+    (pad 9 smd rect (at -7.67 -3) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 105 "Net-(U1-Pad9)"))
+    (pad 8 smd rect (at -7.67 -3.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 106 "Net-(U1-Pad8)"))
+    (pad 7 smd rect (at -7.67 -3.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 107 "Net-(U1-Pad7)"))
+    (pad 6 smd rect (at -7.67 -4.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 108 "Net-(U1-Pad6)"))
+    (pad 5 smd rect (at -7.67 -4.6) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 109 "Net-(U1-Pad5)"))
+    (pad 4 smd rect (at -7.67 -5) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 110 "Net-(U1-Pad4)"))
+    (pad 3 smd rect (at -7.67 -5.4) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 111 "Net-(U1-Pad3)"))
+    (pad 2 smd rect (at -7.67 -5.8) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 112 "Net-(U1-Pad2)"))
+    (pad 1 smd rect (at -7.67 -6.2) (size 1.47 0.24) (layers F.Cu F.Paste F.Mask)
+      (net 113 "Net-(C1-Pad2)"))
+    (pad 128 smd rect (at -6.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 114 "Net-(U1-Pad128)"))
+    (pad 127 smd rect (at -5.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 115 "Net-(U1-Pad127)"))
+    (pad 126 smd rect (at -5.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 116 "Net-(U1-Pad126)"))
+    (pad 125 smd rect (at -5 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 117 "Net-(U1-Pad125)"))
+    (pad 124 smd rect (at -4.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 118 "Net-(U1-Pad124)"))
+    (pad 123 smd rect (at -4.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 119 "Net-(U1-Pad123)"))
+    (pad 122 smd rect (at -3.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 120 "Net-(U1-Pad122)"))
+    (pad 121 smd rect (at -3.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 121 "Net-(U1-Pad121)"))
+    (pad 120 smd rect (at -3 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 122 "Net-(U1-Pad120)"))
+    (pad 119 smd rect (at -2.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 123 "Net-(U1-Pad119)"))
+    (pad 118 smd rect (at -2.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 124 "Net-(U1-Pad118)"))
+    (pad 117 smd rect (at -1.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 125 "Net-(U1-Pad117)"))
+    (pad 116 smd rect (at -1.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 126 "Net-(U1-Pad116)"))
+    (pad 115 smd rect (at -1 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 127 "Net-(U1-Pad115)"))
+    (pad 114 smd rect (at -0.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 128 "Net-(U1-Pad114)"))
+    (pad 113 smd rect (at -0.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 129 "Net-(U1-Pad113)"))
+    (pad 112 smd rect (at 0.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 130 "Net-(U1-Pad112)"))
+    (pad 111 smd rect (at 0.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 131 "Net-(U1-Pad111)"))
+    (pad 110 smd rect (at 1 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 132 "Net-(U1-Pad110)"))
+    (pad 109 smd rect (at 1.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 133 "Net-(U1-Pad109)"))
+    (pad 108 smd rect (at 1.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 134 "Net-(U1-Pad108)"))
+    (pad 107 smd rect (at 2.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 135 "Net-(U1-Pad107)"))
+    (pad 106 smd rect (at 2.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 105 smd rect (at 3 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 136 "Net-(U1-Pad105)"))
+    (pad 104 smd rect (at 3.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 137 "Net-(U1-Pad104)"))
+    (pad 103 smd rect (at 3.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 138 "Net-(U1-Pad103)"))
+    (pad 102 smd rect (at 4.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 139 "Net-(U1-Pad102)"))
+    (pad 101 smd rect (at 4.6 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 140 "Net-(U1-Pad101)"))
+    (pad 100 smd rect (at 5 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 141 "Net-(U1-Pad100)"))
+    (pad 99 smd rect (at 5.4 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 142 "Net-(U1-Pad99)"))
+    (pad 98 smd rect (at 5.8 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 143 "Net-(U1-Pad98)"))
+    (pad 97 smd rect (at 6.2 -7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 144 "Net-(U1-Pad97)"))
+    (pad 64 smd rect (at 6.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 63 smd rect (at 5.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 145 "Net-(U1-Pad63)"))
+    (pad 62 smd rect (at 5.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 146 "Net-(U1-Pad62)"))
+    (pad 61 smd rect (at 5 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 147 "Net-(U1-Pad61)"))
+    (pad 60 smd rect (at 4.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 148 "Net-(U1-Pad60)"))
+    (pad 59 smd rect (at 4.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 149 "Net-(U1-Pad59)"))
+    (pad 58 smd rect (at 3.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 150 "Net-(U1-Pad58)"))
+    (pad 57 smd rect (at 3.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 151 "Net-(U1-Pad57)"))
+    (pad 56 smd rect (at 3 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 152 "Net-(U1-Pad56)"))
+    (pad 55 smd rect (at 2.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 153 "Net-(U1-Pad55)"))
+    (pad 54 smd rect (at 2.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 154 "Net-(U1-Pad54)"))
+    (pad 53 smd rect (at 1.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 52 smd rect (at 1.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 155 "Net-(U1-Pad52)"))
+    (pad 51 smd rect (at 1 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 156 "Net-(U1-Pad51)"))
+    (pad 50 smd rect (at 0.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 157 "Net-(U1-Pad50)"))
+    (pad 49 smd rect (at 0.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 158 "Net-(U1-Pad49)"))
+    (pad 48 smd rect (at -0.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 159 "Net-(U1-Pad48)"))
+    (pad 47 smd rect (at -0.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 160 "Net-(U1-Pad47)"))
+    (pad 46 smd rect (at -1 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 161 "Net-(U1-Pad46)"))
+    (pad 45 smd rect (at -1.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 44 smd rect (at -1.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 162 "Net-(U1-Pad44)"))
+    (pad 43 smd rect (at -2.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 163 "Net-(U1-Pad43)"))
+    (pad 42 smd rect (at -2.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 164 "Net-(U1-Pad42)"))
+    (pad 41 smd rect (at -3 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 165 "Net-(U1-Pad41)"))
+    (pad 40 smd rect (at -3.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 166 "Net-(U1-Pad40)"))
+    (pad 39 smd rect (at -3.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 167 "Net-(U1-Pad39)"))
+    (pad 38 smd rect (at -4.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask))
+    (pad 37 smd rect (at -4.6 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 168 "Net-(U1-Pad37)"))
+    (pad 36 smd rect (at -5 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 169 "Net-(U1-Pad36)"))
+    (pad 35 smd rect (at -5.4 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 170 "Net-(U1-Pad35)"))
+    (pad 34 smd rect (at -5.8 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 171 "Net-(U1-Pad34)"))
+    (pad 33 smd rect (at -6.2 7.67) (size 0.24 1.47) (layers F.Cu F.Paste F.Mask)
+      (net 172 "Net-(U1-Pad33)"))
+  )
+
+  (module Connector_IDC:IDC-Header_2x20_P2.54mm_Horizontal (layer F.Cu) (tedit 59DE239E) (tstamp 5E752EDB)
+    (at 72.39 64.77 90)
+    (descr "Through hole angled IDC box header, 2x20, 2.54mm pitch, double rows")
+    (tags "Through hole IDC box header THT 2x20 2.54mm double row")
+    (path /5E8589A7/5E858ED6)
+    (fp_text reference J3 (at 6.105 -6.35 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_02x20_Odd_Even_LCD_INTF (at 6.105 54.864 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 13.48 53.61) (end -1.12 53.61) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 13.48 -5.35) (end 13.48 53.61) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.12 53.61) (end -1.12 -5.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.12 -5.35) (end 13.48 -5.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.13 53.61) (end 4.13 -5.35) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 53.61) (end 13.48 53.61) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 26.38) (end 13.48 26.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 21.88) (end 13.48 21.88) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.13 -5.35) (end 13.48 -5.35) (layer F.SilkS) (width 0.12))
+    (fp_line (start 13.48 -5.35) (end 13.48 53.61) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0 -1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 -1.27) (end -1.27 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 5.38 -5.1) (end 13.23 -5.1) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 9.84) (end -0.32 9.84) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 7.3) (end -0.32 7.3) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 53.36) (end 4.38 -4.1) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 53.36) (end 13.23 53.36) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 47.94) (end -0.32 47.94) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 45.4) (end -0.32 45.4) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 42.86) (end -0.32 42.86) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 40.32) (end -0.32 40.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 4.76) (end -0.32 4.76) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 37.78) (end -0.32 37.78) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 35.24) (end -0.32 35.24) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 32.7) (end -0.32 32.7) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 30.16) (end -0.32 30.16) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 27.62) (end -0.32 27.62) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 26.38) (end 13.23 26.38) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 25.08) (end -0.32 25.08) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 22.54) (end -0.32 22.54) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 21.88) (end 13.23 21.88) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 20) (end -0.32 20) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 2.22) (end -0.32 2.22) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 17.46) (end -0.32 17.46) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 14.92) (end -0.32 14.92) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 12.38) (end -0.32 12.38) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 -4.1) (end 5.38 -5.1) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.38 -0.32) (end -0.32 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 13.23 53.36) (end 13.23 -5.1) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 9.84) (end -0.32 10.48) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 7.94) (end 4.38 7.94) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 7.3) (end -0.32 7.94) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 5.4) (end 4.38 5.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 48.58) (end 4.38 48.58) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 47.94) (end -0.32 48.58) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 46.04) (end 4.38 46.04) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 45.4) (end -0.32 46.04) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 43.5) (end 4.38 43.5) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 42.86) (end -0.32 43.5) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 40.96) (end 4.38 40.96) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 40.32) (end -0.32 40.96) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 4.76) (end -0.32 5.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 38.42) (end 4.38 38.42) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 37.78) (end -0.32 38.42) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 35.88) (end 4.38 35.88) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 35.24) (end -0.32 35.88) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 33.34) (end 4.38 33.34) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 32.7) (end -0.32 33.34) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 30.8) (end 4.38 30.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 30.16) (end -0.32 30.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 28.26) (end 4.38 28.26) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 27.62) (end -0.32 28.26) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 25.72) (end 4.38 25.72) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 25.08) (end -0.32 25.72) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 23.18) (end 4.38 23.18) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 22.54) (end -0.32 23.18) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 20.64) (end 4.38 20.64) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 20) (end -0.32 20.64) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 2.86) (end 4.38 2.86) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 2.22) (end -0.32 2.86) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 18.1) (end 4.38 18.1) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 17.46) (end -0.32 18.1) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 15.56) (end 4.38 15.56) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 14.92) (end -0.32 15.56) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 13.02) (end 4.38 13.02) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 12.38) (end -0.32 13.02) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 10.48) (end 4.38 10.48) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 0.32) (end 4.38 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.32 -0.32) (end -0.32 0.32) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 8.805 24.13) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 40 thru_hole oval (at 2.54 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 14 "Net-(J3-Pad40)"))
+    (pad 39 thru_hole oval (at 0 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 15 "Net-(J3-Pad39)"))
+    (pad 38 thru_hole oval (at 2.54 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 16 "Net-(J3-Pad38)"))
+    (pad 37 thru_hole oval (at 0 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 17 "Net-(J3-Pad37)"))
+    (pad 36 thru_hole oval (at 2.54 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 18 /g_SCREEN_INTF/D23))
+    (pad 35 thru_hole oval (at 0 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 19 /g_SCREEN_INTF/D22))
+    (pad 34 thru_hole oval (at 2.54 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 20 /g_SCREEN_INTF/D21))
+    (pad 33 thru_hole oval (at 0 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 21 /g_SCREEN_INTF/D20))
+    (pad 32 thru_hole oval (at 2.54 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 22 /g_SCREEN_INTF/D19))
+    (pad 31 thru_hole oval (at 0 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 23 /g_SCREEN_INTF/D18))
+    (pad 30 thru_hole oval (at 2.54 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 24 /g_SCREEN_INTF/D17))
+    (pad 29 thru_hole oval (at 0 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 25 /g_SCREEN_INTF/D16))
+    (pad 28 thru_hole oval (at 2.54 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 26 /g_SCREEN_INTF/D15))
+    (pad 27 thru_hole oval (at 0 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 27 /g_SCREEN_INTF/D14))
+    (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 28 /g_SCREEN_INTF/D13))
+    (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 29 /g_SCREEN_INTF/D12))
+    (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 30 /g_SCREEN_INTF/D11))
+    (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 31 /g_SCREEN_INTF/D10))
+    (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 32 /g_SCREEN_INTF/D9))
+    (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 33 /g_SCREEN_INTF/D8))
+    (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 34 /g_SCREEN_INTF/D7))
+    (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 35 /g_SCREEN_INTF/D6))
+    (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 36 /g_SCREEN_INTF/D5))
+    (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 37 /g_SCREEN_INTF/D4))
+    (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 38 /g_SCREEN_INTF/D3))
+    (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 39 /g_SCREEN_INTF/D2))
+    (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 40 /g_SCREEN_INTF/D1))
+    (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 41 /g_SCREEN_INTF/D0))
+    (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 42 "Net-(J3-Pad12)"))
+    (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 43 "Net-(J3-Pad11)"))
+    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 44 "Net-(J3-Pad10)"))
+    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 45 "Net-(J3-Pad9)"))
+    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 46 "Net-(J3-Pad8)"))
+    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 47 "Net-(J3-Pad7)"))
+    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 48 "Net-(J3-Pad6)"))
+    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 49 "Net-(J3-Pad5)"))
+    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 50 "Net-(J3-Pad4)"))
+    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 51 "Net-(J3-Pad3)"))
+    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 52 "Net-(J3-Pad2)"))
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+      (net 53 "Net-(J3-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x20_P2.54mm_Horizontal.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_USB:USB_Micro-B_Wuerth_629105150521 (layer F.Cu) (tedit 5A142044) (tstamp 5E752E24)
+    (at 54.61 73.66 270)
+    (descr "USB Micro-B receptacle, http://www.mouser.com/ds/2/445/629105150521-469306.pdf")
+    (tags "usb micro receptacle")
+    (path /5E7C0F59/5E8480AD)
+    (attr smd)
+    (fp_text reference J1 (at 0 -3.5 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value USB_B_Micro (at 0 5.6 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user "PCB Edge" (at 0 3.75 90) (layer Dwgs.User)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
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+      (effects (font (size 1 1) (thickness 0.15)))
+    )
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+    (fp_line (start 4.95 4.85) (end 4.95 -3.34) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.94 4.85) (end 4.95 4.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.94 -3.34) (end -4.94 4.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.8 -2.4) (end 2.8 -2.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.8 -2.4) (end -2.8 -2.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.8 -2.825) (end -1.8 -2.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.075 -2.825) (end -1.8 -2.825) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.15 0.75) (end 4.15 -0.65) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.15 3.3) (end 4.15 3.15) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.85 3.3) (end 4.15 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.85 3.75) (end 3.85 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start -3.85 3.3) (end -3.85 3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.15 3.3) (end -3.85 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.15 3.15) (end -4.15 3.3) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.15 -0.65) (end -4.15 0.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.075 -2.95) (end -1.075 -2.725) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.525 -2.95) (end -1.075 -2.95) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.525 -2.725) (end -1.525 -2.95) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.3 -2.55) (end -1.525 -2.725) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.075 -2.725) (end -1.3 -2.55) (layer F.Fab) (width 0.15))
+    (fp_line (start -2.7 3.75) (end 2.7 3.75) (layer F.Fab) (width 0.15))
+    (fp_line (start 4 -2.25) (end -4 -2.25) (layer F.Fab) (width 0.15))
+    (fp_line (start 4 3.15) (end 4 -2.25) (layer F.Fab) (width 0.15))
+    (fp_line (start 3.7 3.15) (end 4 3.15) (layer F.Fab) (width 0.15))
+    (fp_line (start 3.7 4.35) (end 3.7 3.15) (layer F.Fab) (width 0.15))
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+    (fp_line (start -4 3.15) (end -3.7 3.15) (layer F.Fab) (width 0.15))
+    (fp_line (start -4 -2.25) (end -4 3.15) (layer F.Fab) (width 0.15))
+    (pad "" np_thru_hole oval (at 2.5 -0.8 270) (size 0.8 0.8) (drill 0.8) (layers *.Cu *.Mask))
+    (pad "" np_thru_hole oval (at -2.5 -0.8 270) (size 0.8 0.8) (drill 0.8) (layers *.Cu *.Mask))
+    (pad 6 thru_hole oval (at 3.875 1.95 270) (size 1.15 1.8) (drill oval 0.55 1.2) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 6 thru_hole oval (at -3.875 1.95 270) (size 1.15 1.8) (drill oval 0.55 1.2) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 6 thru_hole oval (at 3.725 -1.85 270) (size 1.45 2) (drill oval 0.85 1.4) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 6 thru_hole oval (at -3.725 -1.85 270) (size 1.45 2) (drill oval 0.85 1.4) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad6)"))
+    (pad 5 smd rect (at 1.3 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(J1-Pad5)"))
+    (pad 4 smd rect (at 0.65 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 3 "Net-(J1-Pad4)"))
+    (pad 3 smd rect (at 0 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(J1-Pad3)"))
+    (pad 2 smd rect (at -0.65 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 5 "Net-(J1-Pad2)"))
+    (pad 1 smd rect (at -1.3 -1.9 270) (size 0.45 1.3) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(J1-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_USB.3dshapes/USB_Micro-B_Wuerth_629105150521.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 50.8 50.8) (end 53.34 50.8) (layer Edge.Cuts) (width 0.05) (tstamp 5E6E9EBC))
+  (gr_line (start 50.8 134.62) (end 50.8 50.8) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 228.6 134.62) (end 50.8 134.62) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 228.6 50.8) (end 228.6 134.62) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 53.34 50.8) (end 228.6 50.8) (layer Edge.Cuts) (width 0.05))
+
+)
diff --git a/electrical/same54_dev_board/same54_dev_board.sch b/electrical/same54_dev_board/same54_dev_board.sch
index 8ec7193..a5d41f4 100644
--- a/electrical/same54_dev_board/same54_dev_board.sch
+++ b/electrical/same54_dev_board/same54_dev_board.sch
@@ -1,9 +1,9 @@
 EESchema Schematic File Version 4
 EELAYER 30 0
 EELAYER END
-$Descr USLedger 17000 11000
+$Descr A 11000 8500
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-Sheet 1 1
+Sheet 1 5
 Title "Project Oracle"
 Date "2020-03-16"
 Rev "v0.1"
@@ -13,106 +13,158 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
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+F1 "USB_INTF.sch" 50
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+$EndSheet
+$Sheet
+S 750  800  3250 1450
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+F1 "BRAIN.sch" 50
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+F3 "DEBUG_RX" I R 4000 1250 50 
+F4 "MASTER_SPI_MOSI" I R 4000 1350 50 
+F5 "MASTER_SPI_MISO" I R 4000 1450 50 
+F6 "MASTER_SPI_CLK" I R 4000 1550 50 
+F7 "~TFT_SPI_CS" I R 4000 1650 50 
+F8 "~FLASH_MEM_CS" I R 4000 1750 50 
+F9 "MASTER_I2C_SDA" I R 4000 1950 50 
+F10 "MASTER_I2C_SCL" I R 4000 2050 50 
+F11 "~IO_EXPANDER_CS" I R 4000 1850 50 
+$EndSheet
+Text Notes 800  1000 0    50   ~ 0
+Brain -- ATSAME54P20A will controll peripherals, including an IO extender which,\n will handler the control of the screen (mikroe board with SSD1963)
+Text GLabel 900  6250 0    50   Input ~ 0
+g_3v3
+Text GLabel 1800 6250 0    50   Input ~ 0
+g_5v
+$Sheet
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+F3 "MASTER_SPI_MISO" I L 5750 1200 50 
+F4 "MASTER_SPI_MOSI" I L 5750 1300 50 
+F5 "~IO_EXPANDER_CS" I L 5750 1450 50 
+F6 "~TFT_CS" I L 5750 1550 50 
+F7 "~TFT_RD" I L 5750 1650 50 
+F8 "~TFT_WR" I L 5750 1750 50 
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+F14 "TFT_TOUCH_INT" I L 5750 2550 50 
+F15 "TFT_TE" I L 5750 2650 50 
+$EndSheet
+Wire Wire Line
+	900  6250 950  6250
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 $EndComp
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+	1    950  5850
 	1    0    0    -1  
 $EndComp
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+	950  6250 950  5850
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+Wire Wire Line
+	950  6250 1200 6250
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-F 2 "" H 3700 8150 50  0001 C CNN
-F 3 "" H 3700 8150 50  0001 C CNN
-	3    4900 6900
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+	1    2600 6250
 	1    0    0    -1  
 $EndComp
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+	1800 6250 1900 6250
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-L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
-U 4 1 5E7DD1DD
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-F 2 "" H 200 5850 50  0001 C CNN
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-	4    1400 4600
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 $EndComp
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+	1900 6250 2150 6250
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-U 5 1 5E7E22D4
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-F 1 "p_ATSAME54P20A-AU" H 5600 4524 50  0000 C CNN
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-$EndComp
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-$EndComp
-$Comp
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-U 1 1 5E8C31CA
-P 7000 7450
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-F 2 "SOP80P1030X264-36N" H 7000 7450 50  0001 L BNN
-F 3 "Maxim Integrated" H 7000 7450 50  0001 L BNN
-F 4 "None" H 7000 7450 50  0001 L BNN "Field4"
-F 5 "Interface IC - I/O extensions Maxim Integrated MAX7301AAX+ SPI 26 MHz SSOP 36" H 7000 7450 50  0001 L BNN "Field5"
-F 6 "SSOP-36 Maxim" H 7000 7450 50  0001 L BNN "Field6"
-F 7 "Unavailable" H 7000 7450 50  0001 L BNN "Field7"
-F 8 "MAX7301AAX+" H 7000 7450 50  0001 L BNN "Field8"
-	1    7000 7450
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+Wire Wire Line
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 $EndSCHEMATC
diff --git a/electrical/same54_dev_board/same54_dev_board.sch-bak b/electrical/same54_dev_board/same54_dev_board.sch-bak
index eca4da9..236c6d8 100644
--- a/electrical/same54_dev_board/same54_dev_board.sch-bak
+++ b/electrical/same54_dev_board/same54_dev_board.sch-bak
@@ -1,9 +1,9 @@
 EESchema Schematic File Version 4
 EELAYER 30 0
 EELAYER END
-$Descr USLedger 17000 11000
+$Descr A 11000 8500
 encoding utf-8
-Sheet 1 1
+Sheet 1 5
 Title "Project Oracle"
 Date "2020-03-16"
 Rev "v0.1"
@@ -13,90 +13,144 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
+$Sheet
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+F1 "Power.sch" 50
+$EndSheet
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+S 700  2450 3300 1900
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+$EndSheet
+$Sheet
+S 750  800  3250 1450
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+F6 "MASTER_SPI_CLK" I R 4000 1550 50 
+F7 "~TFT_SPI_CS" I R 4000 1650 50 
+F8 "~FLASH_MEM_CS" I R 4000 1750 50 
+F9 "MASTER_I2C_SDA" I R 4000 1950 50 
+F10 "MASTER_I2C_SCL" I R 4000 2050 50 
+F11 "~IO_EXPANDER_CS" I R 4000 1850 50 
+$EndSheet
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+$Sheet
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+$EndSheet
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-F 11 "FTDI, Future Technology Devices International Ltd" H 4100 4800 60  0001 L CNN "Manufacturer"
-F 12 "Active" H 4100 4900 60  0001 L CNN "Status"
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+Wire Wire Line
+	950  6250 1200 6250
 $Comp
-L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
-U 3 1 5E7DA3E5
-P 4900 6900
-F 0 "U?" H 5008 7915 50  0000 C CNN
-F 1 "p_ATSAME54P20A-AU" H 5008 7824 50  0000 C CNN
-F 2 "" H 3700 8150 50  0001 C CNN
-F 3 "" H 3700 8150 50  0001 C CNN
-	3    4900 6900
+L power:GND #PWR0103
+U 1 1 5E97DBEE
+P 2600 6250
+F 0 "#PWR0103" H 2600 6000 50  0001 C CNN
+F 1 "GND" H 2605 6077 50  0000 C CNN
+F 2 "" H 2600 6250 50  0001 C CNN
+F 3 "" H 2600 6250 50  0001 C CNN
+	1    2600 6250
 	1    0    0    -1  
 $EndComp
+Wire Wire Line
+	1800 6250 1900 6250
 $Comp
-L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
-U 4 1 5E7DD1DD
-P 1400 4600
-F 0 "U?" H 1508 5665 50  0000 C CNN
-F 1 "p_ATSAME54P20A-AU" H 1508 5574 50  0000 C CNN
-F 2 "" H 200 5850 50  0001 C CNN
-F 3 "" H 200 5850 50  0001 C CNN
-	4    1400 4600
+L power:PWR_FLAG #FLG0102
+U 1 1 5E97F87F
+P 1900 5850
+F 0 "#FLG0102" H 1900 5925 50  0001 C CNN
+F 1 "PWR_FLAG" H 1900 6023 50  0000 C CNN
+F 2 "" H 1900 5850 50  0001 C CNN
+F 3 "~" H 1900 5850 50  0001 C CNN
+	1    1900 5850
 	1    0    0    -1  
 $EndComp
+Wire Wire Line
+	1900 6250 1900 5850
+Connection ~ 1900 6250
+Wire Wire Line
+	1900 6250 2150 6250
 $Comp
-L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
-U 5 1 5E7E22D4
-P 5600 3700
-F 0 "U?" H 5600 4615 50  0000 C CNN
-F 1 "p_ATSAME54P20A-AU" H 5600 4524 50  0000 C CNN
-F 2 "" H 4400 4950 50  0001 C CNN
-F 3 "" H 4400 4950 50  0001 C CNN
-	5    5600 3700
-	1    0    0    -1  
-$EndComp
-$Comp
-L Conn_02x20_LCD_INTF:Conn_02x20_Odd_Even_LCD_INTF J?
-U 1 1 5E896181
-P 7900 4200
-F 0 "J?" H 7900 5325 50  0000 C CNN
-F 1 "Conn_02x20_Odd_Even_LCD_INTF" H 7900 5234 50  0000 C CNN
-F 2 "" H 7500 4200 50  0001 C CNN
-F 3 "~" H 7500 4200 50  0001 C CNN
-	1    7900 4200
+L power:PWR_FLAG #FLG0103
+U 1 1 5E980A5B
+P 2600 5850
+F 0 "#FLG0103" H 2600 5925 50  0001 C CNN
+F 1 "PWR_FLAG" H 2600 6023 50  0000 C CNN
+F 2 "" H 2600 5850 50  0001 C CNN
+F 3 "~" H 2600 5850 50  0001 C CNN
+	1    2600 5850
 	1    0    0    -1  
 $EndComp
+Wire Wire Line
+	2600 6250 2600 5850
+Text Label 4050 1150 0    50   ~ 0
+DEBUG_TX
+Wire Wire Line
+	4000 1150 4050 1150
+Text Label 4050 2550 0    50   ~ 0
+DEBUG_TX
+Wire Wire Line
+	4000 1250 4050 1250
+Text Label 4050 1250 0    50   ~ 0
+DEBUG_RX
+Wire Wire Line
+	4000 2550 4050 2550
+Wire Wire Line
+	4000 2650 4050 2650
+Text Label 4050 2650 0    50   ~ 0
+DEBUG_RX
 $EndSCHEMATC