commit 88c8e21ce6430ff72fc5eac4c17c09dff2738146 Author: Penguin Date: Fri Feb 11 00:46:58 2022 -0600 migrating and archiving diff --git a/README.md b/README.md new file mode 100644 index 0000000..4bd07f0 --- /dev/null +++ b/README.md @@ -0,0 +1 @@ +# skywave_flightsoftware \ No newline at end of file diff --git a/_config.yml b/_config.yml new file mode 100644 index 0000000..ddeb671 --- /dev/null +++ b/_config.yml @@ -0,0 +1 @@ +theme: jekyll-theme-time-machine \ No newline at end of file diff --git a/skywave_atxmega128a1_final.atsln b/skywave_atxmega128a1_final.atsln new file mode 100644 index 0000000..df0cce3 --- /dev/null +++ b/skywave_atxmega128a1_final.atsln @@ -0,0 +1,22 @@ + +Microsoft Visual Studio Solution File, Format Version 12.00 +# Atmel Studio Solution File, Format Version 11.00 +VisualStudioVersion = 14.0.23107.0 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "skywave_atxmega128a1_final", "skywave_atxmega128a1_final\skywave_atxmega128a1_final.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.ActiveCfg = Debug|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.Build.0 = Debug|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.ActiveCfg = Release|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/skywave_atxmega128a1_final/Debug/Makefile b/skywave_atxmega128a1_final/Debug/Makefile new file mode 100644 index 0000000..3f10baa --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/Makefile @@ -0,0 +1,511 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := \ +../src/ \ +../src/ASF/ \ +../src/ASF/common/ \ +../src/ASF/common/boards/ \ +../src/ASF/common/services/ \ +../src/ASF/common/services/clock/ \ +../src/ASF/common/services/clock/xmega/ \ +../src/ASF/common/services/delay/ \ +../src/ASF/common/services/delay/xmega/ \ +../src/ASF/common/services/ioport/ \ +../src/ASF/common/services/ioport/xmega/ \ +../src/ASF/common/services/serial/ \ +../src/ASF/common/services/serial/xmega_usart/ \ +../src/ASF/common/services/sleepmgr/ \ +../src/ASF/common/services/sleepmgr/xmega/ \ +../src/ASF/common/utils/ \ +../src/ASF/common/utils/interrupt/ \ +../src/ASF/common/utils/make/ \ +../src/ASF/common/utils/stdio/ \ +../src/ASF/common/utils/stdio/stdio_serial/ \ +../src/ASF/xmega/ \ +../src/ASF/xmega/boards/ \ +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/ \ +../src/ASF/xmega/drivers/ \ +../src/ASF/xmega/drivers/adc/ \ +../src/ASF/xmega/drivers/adc/xmega_aau/ \ +../src/ASF/xmega/drivers/cpu/ \ +../src/ASF/xmega/drivers/nvm/ \ +../src/ASF/xmega/drivers/pmic/ \ +../src/ASF/xmega/drivers/sleep/ \ +../src/ASF/xmega/drivers/tc/ \ +../src/ASF/xmega/drivers/twi/ \ +../src/ASF/xmega/drivers/usart/ \ +../src/ASF/xmega/drivers/wdt/ \ +../src/ASF/xmega/services/ \ +../src/ASF/xmega/services/pwm/ \ +../src/ASF/xmega/utils/ \ +../src/ASF/xmega/utils/assembler/ \ +../src/ASF/xmega/utils/bit_handling/ \ +../src/ASF/xmega/utils/preprocessor/ \ +../src/config/ \ +../src/drivers \ +../src/devices + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../src/ASF/common/services/clock/xmega/sysclk.c \ +../src/ASF/common/services/serial/usart_serial.c \ +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.c \ +../src/ASF/common/utils/stdio/read.c \ +../src/ASF/common/utils/stdio/write.c \ +../src/ASF/xmega/drivers/adc/adc.c \ +../src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.c \ +../src/ASF/xmega/drivers/nvm/nvm.c \ +../src/ASF/xmega/drivers/tc/tc.c \ +../src/ASF/xmega/drivers/twi/twim.c \ +../src/ASF/xmega/drivers/twi/twis.c \ +../src/ASF/xmega/drivers/usart/usart.c \ +../src/ASF/xmega/drivers/wdt/wdt.c \ +../src/ASF/xmega/services/pwm/pwm.c \ +../src/devices/ds3231.c \ +../src/devices/gps.c \ +../src/devices/mpl3115a2.c \ +../src/devices/mpu9250.c \ +../src/devices/ntcle100.c \ +../src/drivers/adc_util.c \ +../src/drivers/MahonyAHRS.c \ +../src/drivers/skywave_util.c \ +../src/drivers/twi_comms.c \ +../src/drivers/usart_comms.c \ +../src/register_map.c \ +../src/ASF/common/services/ioport/xmega/ioport_compat.c \ +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.c \ +../src/skywave.c + + +PREPROCESSING_SRCS += \ +../src/ASF/xmega/drivers/cpu/ccp.s \ +../src/ASF/xmega/drivers/nvm/nvm_asm.s + + +ASM_SRCS += + + +OBJS += \ +src/ASF/common/services/clock/xmega/sysclk.o \ +src/ASF/common/services/serial/usart_serial.o \ +src/ASF/common/services/sleepmgr/xmega/sleepmgr.o \ +src/ASF/common/utils/stdio/read.o \ +src/ASF/common/utils/stdio/write.o \ +src/ASF/xmega/drivers/adc/adc.o \ +src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.o \ +src/ASF/xmega/drivers/cpu/ccp.o \ +src/ASF/xmega/drivers/nvm/nvm.o \ +src/ASF/xmega/drivers/nvm/nvm_asm.o \ +src/ASF/xmega/drivers/tc/tc.o \ +src/ASF/xmega/drivers/twi/twim.o \ +src/ASF/xmega/drivers/twi/twis.o \ +src/ASF/xmega/drivers/usart/usart.o \ +src/ASF/xmega/drivers/wdt/wdt.o \ +src/ASF/xmega/services/pwm/pwm.o \ +src/devices/ds3231.o \ +src/devices/gps.o \ +src/devices/mpl3115a2.o \ +src/devices/mpu9250.o \ +src/devices/ntcle100.o \ +src/drivers/adc_util.o \ +src/drivers/MahonyAHRS.o \ +src/drivers/skywave_util.o \ +src/drivers/twi_comms.o \ +src/drivers/usart_comms.o \ +src/register_map.o \ +src/ASF/common/services/ioport/xmega/ioport_compat.o \ +src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.o \ +src/skywave.o + +OBJS_AS_ARGS += \ +src/ASF/common/services/clock/xmega/sysclk.o \ +src/ASF/common/services/serial/usart_serial.o \ +src/ASF/common/services/sleepmgr/xmega/sleepmgr.o \ +src/ASF/common/utils/stdio/read.o \ +src/ASF/common/utils/stdio/write.o \ +src/ASF/xmega/drivers/adc/adc.o \ +src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.o \ +src/ASF/xmega/drivers/cpu/ccp.o \ +src/ASF/xmega/drivers/nvm/nvm.o \ +src/ASF/xmega/drivers/nvm/nvm_asm.o \ +src/ASF/xmega/drivers/tc/tc.o \ +src/ASF/xmega/drivers/twi/twim.o \ +src/ASF/xmega/drivers/twi/twis.o \ +src/ASF/xmega/drivers/usart/usart.o \ +src/ASF/xmega/drivers/wdt/wdt.o \ +src/ASF/xmega/services/pwm/pwm.o \ +src/devices/ds3231.o \ +src/devices/gps.o \ +src/devices/mpl3115a2.o \ +src/devices/mpu9250.o \ +src/devices/ntcle100.o \ +src/drivers/adc_util.o \ +src/drivers/MahonyAHRS.o \ +src/drivers/skywave_util.o \ +src/drivers/twi_comms.o \ +src/drivers/usart_comms.o \ +src/register_map.o \ +src/ASF/common/services/ioport/xmega/ioport_compat.o \ +src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.o \ +src/skywave.o + +C_DEPS += \ +src/ASF/common/services/clock/xmega/sysclk.d \ +src/ASF/common/services/serial/usart_serial.d \ +src/ASF/common/services/sleepmgr/xmega/sleepmgr.d \ +src/ASF/common/utils/stdio/read.d \ +src/ASF/common/utils/stdio/write.d \ +src/ASF/xmega/drivers/adc/adc.d \ +src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.d \ +src/ASF/xmega/drivers/cpu/ccp.d \ +src/ASF/xmega/drivers/nvm/nvm.d \ +src/ASF/xmega/drivers/nvm/nvm_asm.d \ +src/ASF/xmega/drivers/tc/tc.d \ +src/ASF/xmega/drivers/twi/twim.d \ +src/ASF/xmega/drivers/twi/twis.d \ +src/ASF/xmega/drivers/usart/usart.d \ +src/ASF/xmega/drivers/wdt/wdt.d \ +src/ASF/xmega/services/pwm/pwm.d \ +src/devices/ds3231.d \ +src/devices/gps.d \ +src/devices/mpl3115a2.d \ +src/devices/mpu9250.d \ +src/devices/ntcle100.d \ +src/drivers/adc_util.d \ +src/drivers/MahonyAHRS.d \ +src/drivers/skywave_util.d \ +src/drivers/twi_comms.d \ +src/drivers/usart_comms.d \ +src/register_map.d \ +src/ASF/common/services/ioport/xmega/ioport_compat.d \ +src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.d \ +src/skywave.d + +C_DEPS_AS_ARGS += \ +src/ASF/common/services/clock/xmega/sysclk.d \ +src/ASF/common/services/serial/usart_serial.d \ +src/ASF/common/services/sleepmgr/xmega/sleepmgr.d \ +src/ASF/common/utils/stdio/read.d \ +src/ASF/common/utils/stdio/write.d \ +src/ASF/xmega/drivers/adc/adc.d \ +src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.d \ +src/ASF/xmega/drivers/cpu/ccp.d \ +src/ASF/xmega/drivers/nvm/nvm.d \ +src/ASF/xmega/drivers/nvm/nvm_asm.d \ +src/ASF/xmega/drivers/tc/tc.d \ +src/ASF/xmega/drivers/twi/twim.d \ +src/ASF/xmega/drivers/twi/twis.d \ +src/ASF/xmega/drivers/usart/usart.d \ +src/ASF/xmega/drivers/wdt/wdt.d \ +src/ASF/xmega/services/pwm/pwm.d \ +src/devices/ds3231.d \ +src/devices/gps.d \ +src/devices/mpl3115a2.d \ +src/devices/mpu9250.d \ +src/devices/ntcle100.d \ +src/drivers/adc_util.d \ +src/drivers/MahonyAHRS.d \ +src/drivers/skywave_util.d \ +src/drivers/twi_comms.d \ +src/drivers/usart_comms.d \ +src/register_map.d \ +src/ASF/common/services/ioport/xmega/ioport_compat.d \ +src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.d \ +src/skywave.d + +OUTPUT_FILE_PATH +=skywave_atxmega128a1_final.elf + +OUTPUT_FILE_PATH_AS_ARGS +=skywave_atxmega128a1_final.elf + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +src/ASF/common/services/clock/xmega/%.o: ../src/ASF/common/services/clock/xmega/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/common/services/serial/%.o: ../src/ASF/common/services/serial/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/common/services/sleepmgr/xmega/%.o: ../src/ASF/common/services/sleepmgr/xmega/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/common/utils/stdio/%.o: ../src/ASF/common/utils/stdio/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/drivers/adc/%.o: ../src/ASF/xmega/drivers/adc/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" 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-I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/drivers/nvm/%.o: ../src/ASF/xmega/drivers/nvm/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" 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-I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/drivers/twi/%.o: ../src/ASF/xmega/drivers/twi/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/drivers/usart/%.o: ../src/ASF/xmega/drivers/usart/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) 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-I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 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-I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/devices/%.o: ../src/devices/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/drivers/%.o: ../src/drivers/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/%.o: ../src/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/common/services/ioport/xmega/%.o: ../src/ASF/common/services/ioport/xmega/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/boards/xmega_a1u_xplained_pro/%.o: ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/%.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -DDEBUG -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I"../src/ASF/common/boards" -I"../src/ASF/xmega/utils/preprocessor" -I"../src/ASF/xmega/utils" -I"../src/ASF/common/utils" -I"../src/ASF/common/services/ioport" -I"../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I"../src/ASF/xmega/boards" -I"../src/config" -I"../src" -I"../src/ASF/xmega/drivers/cpu" -I"../src/ASF/xmega/drivers/nvm" -I"../src/ASF/xmega/drivers/pmic" -I"../src/ASF/xmega/drivers/sleep" -I"../src/ASF/xmega/drivers/tc" -I"../src/ASF/common/services/clock" -I"../src/ASF/common/services/delay" -I"../src/ASF/common/services/serial/xmega_usart" -I"../src/ASF/common/services/serial" -I"../src/ASF/common/services/sleepmgr" -I"../src/ASF/common/utils/stdio/stdio_serial" -I"../src/ASF/xmega/drivers/adc" -I"../src/ASF/xmega/drivers/twi" -I"../src/ASF/xmega/drivers/usart" -I"../src/ASF/xmega/services/pwm" -I"../src/ASF/xmega/drivers/wdt" -O1 -fdata-sections -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g3 -Wall -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -c -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler +src/ASF/xmega/drivers/cpu/ccp.o: ../src/ASF/xmega/drivers/cpu/ccp.s + @echo Building file: $< + @echo Invoking: AVR/GNU Assembler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -Wa,-gdwarf2 -x assembler-with-cpp -c -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -mrelax -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I "../src/ASF/common/boards" -I "../src/ASF/xmega/utils/preprocessor" -I "../src/ASF/xmega/utils" -I "../src/ASF/common/utils" -I "../src/ASF/common/services/ioport" -I "../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I "../src/ASF/xmega/boards" -I "../src/config" -I "../src" -I "../src/ASF/xmega/drivers/cpu" -I "../src/ASF/xmega/drivers/nvm" -I "../src/ASF/xmega/drivers/pmic" -I "../src/ASF/xmega/drivers/sleep" -I "../src/ASF/xmega/drivers/tc" -I "../src/ASF/common/services/clock" -I "../src/ASF/common/services/delay" -I "../src/ASF/common/services/serial/xmega_usart" -I "../src/ASF/common/services/serial" -I "../src/ASF/common/services/sleepmgr" -I "../src/ASF/common/utils/stdio/stdio_serial" -I "../src/ASF/xmega/drivers/adc" -I "../src/ASF/xmega/drivers/twi" -I "../src/ASF/xmega/drivers/usart" -I "../src/ASF/xmega/services/pwm" -I "../src/ASF/xmega/drivers/wdt" -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -Wa,-g -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/drivers/nvm/nvm_asm.o: ../src/ASF/xmega/drivers/nvm/nvm_asm.s + @echo Building file: $< + @echo Invoking: AVR/GNU Assembler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -Wa,-gdwarf2 -x assembler-with-cpp -c -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -mrelax -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I "../src/ASF/common/boards" -I "../src/ASF/xmega/utils/preprocessor" -I "../src/ASF/xmega/utils" -I "../src/ASF/common/utils" -I "../src/ASF/common/services/ioport" -I "../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I "../src/ASF/xmega/boards" -I "../src/config" -I "../src" -I "../src/ASF/xmega/drivers/cpu" -I "../src/ASF/xmega/drivers/nvm" -I "../src/ASF/xmega/drivers/pmic" -I "../src/ASF/xmega/drivers/sleep" -I "../src/ASF/xmega/drivers/tc" -I "../src/ASF/common/services/clock" -I "../src/ASF/common/services/delay" -I "../src/ASF/common/services/serial/xmega_usart" -I "../src/ASF/common/services/serial" -I "../src/ASF/common/services/sleepmgr" -I "../src/ASF/common/utils/stdio/stdio_serial" -I "../src/ASF/xmega/drivers/adc" -I "../src/ASF/xmega/drivers/twi" -I "../src/ASF/xmega/drivers/usart" -I "../src/ASF/xmega/services/pwm" -I "../src/ASF/xmega/drivers/wdt" -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -Wa,-g -o "$@" "$<" + @echo Finished building: $< + + + +src/ASF/xmega/drivers/cpu/%.o: ../src/ASF/xmega/drivers/cpu/%.s + @echo Building file: $< + @echo Invoking: AVR/GNU Assembler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -Wa,-gdwarf2 -x assembler-with-cpp -c -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -mrelax -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I "../src/ASF/common/boards" -I "../src/ASF/xmega/utils/preprocessor" -I "../src/ASF/xmega/utils" -I "../src/ASF/common/utils" -I "../src/ASF/common/services/ioport" -I "../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I "../src/ASF/xmega/boards" -I "../src/config" -I "../src" -I "../src/ASF/xmega/drivers/cpu" -I "../src/ASF/xmega/drivers/nvm" -I "../src/ASF/xmega/drivers/pmic" -I "../src/ASF/xmega/drivers/sleep" -I "../src/ASF/xmega/drivers/tc" -I "../src/ASF/common/services/clock" -I "../src/ASF/common/services/delay" -I "../src/ASF/common/services/serial/xmega_usart" -I "../src/ASF/common/services/serial" -I "../src/ASF/common/services/sleepmgr" -I "../src/ASF/common/utils/stdio/stdio_serial" -I "../src/ASF/xmega/drivers/adc" -I "../src/ASF/xmega/drivers/twi" -I "../src/ASF/xmega/drivers/usart" -I "../src/ASF/xmega/services/pwm" -I "../src/ASF/xmega/drivers/wdt" -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -Wa,-g -o "$@" "$<" + @echo Finished building: $< + + +src/ASF/xmega/drivers/nvm/%.o: ../src/ASF/xmega/drivers/nvm/%.s + @echo Building file: $< + @echo Invoking: AVR/GNU Assembler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -Wa,-gdwarf2 -x assembler-with-cpp -c -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -mrelax -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT -I "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include" -I "../src/ASF/common/boards" -I "../src/ASF/xmega/utils/preprocessor" -I "../src/ASF/xmega/utils" -I "../src/ASF/common/utils" -I "../src/ASF/common/services/ioport" -I "../src/ASF/xmega/boards/xmega_a1u_xplained_pro" -I "../src/ASF/xmega/boards" -I "../src/config" -I "../src" -I "../src/ASF/xmega/drivers/cpu" -I "../src/ASF/xmega/drivers/nvm" -I "../src/ASF/xmega/drivers/pmic" -I "../src/ASF/xmega/drivers/sleep" -I "../src/ASF/xmega/drivers/tc" -I "../src/ASF/common/services/clock" -I "../src/ASF/common/services/delay" -I "../src/ASF/common/services/serial/xmega_usart" -I "../src/ASF/common/services/serial" -I "../src/ASF/common/services/sleepmgr" -I "../src/ASF/common/utils/stdio/stdio_serial" -I "../src/ASF/xmega/drivers/adc" -I "../src/ASF/xmega/drivers/twi" -I "../src/ASF/xmega/drivers/usart" -I "../src/ASF/xmega/services/pwm" -I "../src/ASF/xmega/drivers/wdt" -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -Wa,-g -o "$@" "$<" + @echo Finished building: $< + + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="skywave_atxmega128a1_final.map" -Wl,-u,vfprintf -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=atxmega128a1u -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" -Wl,--relax -Wl,--section-start=.BOOT=0x20000, -lprintf_flt + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "skywave_atxmega128a1_final.elf" "skywave_atxmega128a1_final.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "skywave_atxmega128a1_final.elf" "skywave_atxmega128a1_final.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "skywave_atxmega128a1_final.elf" > "skywave_atxmega128a1_final.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "skywave_atxmega128a1_final.elf" "skywave_atxmega128a1_final.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "skywave_atxmega128a1_final.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "skywave_atxmega128a1_final.elf" "skywave_atxmega128a1_final.a" "skywave_atxmega128a1_final.hex" "skywave_atxmega128a1_final.lss" "skywave_atxmega128a1_final.eep" "skywave_atxmega128a1_final.map" "skywave_atxmega128a1_final.srec" "skywave_atxmega128a1_final.usersignatures" + \ No newline at end of file diff --git a/skywave_atxmega128a1_final/Debug/makedep.mk b/skywave_atxmega128a1_final/Debug/makedep.mk new file mode 100644 index 0000000..09981ac --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/makedep.mk @@ -0,0 +1,64 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +src\ASF\common\services\clock\xmega\sysclk.c + +src\ASF\common\services\serial\usart_serial.c + +src\ASF\common\services\sleepmgr\xmega\sleepmgr.c + +src\ASF\common\utils\stdio\read.c + +src\ASF\common\utils\stdio\write.c + +src\ASF\xmega\drivers\adc\adc.c + +src\ASF\xmega\drivers\adc\xmega_aau\adc_aau.c + +src\ASF\xmega\drivers\cpu\ccp.s + +src\ASF\xmega\drivers\nvm\nvm.c + +src\ASF\xmega\drivers\nvm\nvm_asm.s + +src\ASF\xmega\drivers\tc\tc.c + +src\ASF\xmega\drivers\twi\twim.c + +src\ASF\xmega\drivers\twi\twis.c + +src\ASF\xmega\drivers\usart\usart.c + +src\ASF\xmega\drivers\wdt\wdt.c + +src\ASF\xmega\services\pwm\pwm.c + +src\devices\ds3231.c + +src\devices\gps.c + +src\devices\mpl3115a2.c + +src\devices\mpu9250.c + +src\devices\ntcle100.c + +src\drivers\adc_util.c + +src\drivers\MahonyAHRS.c + +src\drivers\skywave_util.c + +src\drivers\twi_comms.c + +src\drivers\usart_comms.c + +src\register_map.c + +src\ASF\common\services\ioport\xmega\ioport_compat.c + +src\ASF\xmega\boards\xmega_a1u_xplained_pro\board_init.c + +src\skywave.c + diff --git a/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.eep b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.eep new file mode 100644 index 0000000..7c166a1 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.elf b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.elf new file mode 100644 index 0000000..8548cd0 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.elf differ diff --git a/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.hex b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.hex new file mode 100644 index 0000000..c687814 --- /dev/null +++ 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100644 index 0000000..d22825f --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.lss @@ -0,0 +1,15999 @@ + +skywave_atxmega128a1_final.elf: file format elf32-avr + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text 0000783e 00000000 00000000 00000094 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .data 000001c2 00802000 0000783e 000078d2 2**0 + CONTENTS, ALLOC, LOAD, DATA + 2 .bss 000007eb 008021c2 008021c2 00007a94 2**0 + ALLOC + 3 .comment 0000005c 00000000 00000000 00007a94 2**0 + CONTENTS, READONLY + 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00007af0 2**2 + CONTENTS, READONLY + 5 .debug_aranges 000008b8 00000000 00000000 00007b30 2**3 + CONTENTS, READONLY, DEBUGGING + 6 .debug_info 00016ca4 00000000 00000000 000083e8 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_abbrev 00007237 00000000 00000000 0001f08c 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_line 0000d797 00000000 00000000 000262c3 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_frame 0000268c 00000000 00000000 00033a5c 2**2 + CONTENTS, READONLY, DEBUGGING + 10 .debug_str 0003750b 00000000 00000000 000360e8 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .debug_loc 0000905e 00000000 00000000 0006d5f3 2**0 + CONTENTS, READONLY, DEBUGGING + 12 .debug_ranges 00000808 00000000 00000000 00076658 2**3 + CONTENTS, READONLY, DEBUGGING + 13 .debug_macro 0000ef03 00000000 00000000 00076e60 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00000000 <__vectors>: + 0: fc c1 rjmp .+1016 ; 0x3fa <__ctors_end> + 2: 00 00 nop + 4: 20 c2 rjmp .+1088 ; 0x446 <__bad_interrupt> + 6: 00 00 nop + 8: 1e c2 rjmp .+1084 ; 0x446 <__bad_interrupt> + a: 00 00 nop + c: 1c c2 rjmp .+1080 ; 0x446 <__bad_interrupt> + e: 00 00 nop + 10: 1a c2 rjmp .+1076 ; 0x446 <__bad_interrupt> + 12: 00 00 nop + 14: 18 c2 rjmp .+1072 ; 0x446 <__bad_interrupt> + 16: 00 00 nop + 18: 16 c2 rjmp .+1068 ; 0x446 <__bad_interrupt> + 1a: 00 00 nop + 1c: 14 c2 rjmp .+1064 ; 0x446 <__bad_interrupt> + 1e: 00 00 nop + 20: 12 c2 rjmp .+1060 ; 0x446 <__bad_interrupt> + 22: 00 00 nop + 24: 10 c2 rjmp .+1056 ; 0x446 <__bad_interrupt> + 26: 00 00 nop + 28: 0e c2 rjmp .+1052 ; 0x446 <__bad_interrupt> + 2a: 00 00 nop + 2c: 0c c2 rjmp .+1048 ; 0x446 <__bad_interrupt> + 2e: 00 00 nop + 30: 0a c2 rjmp .+1044 ; 0x446 <__bad_interrupt> + 32: 00 00 nop + 34: 0c 94 59 0e jmp 0x1cb2 ; 0x1cb2 <__vector_13> + 38: 4a c4 rjmp .+2196 ; 0x8ce <__vector_14> + 3a: 00 00 nop + 3c: 80 c4 rjmp .+2304 ; 0x93e <__vector_15> + 3e: 00 00 nop + 40: 0c 94 9e 2e jmp 0x5d3c ; 0x5d3c <__vector_16> + 44: b4 c4 rjmp .+2408 ; 0x9ae <__vector_17> + 46: 00 00 nop + 48: ea c4 rjmp .+2516 ; 0xa1e <__vector_18> + 4a: 00 00 nop + 4c: 20 c5 rjmp .+2624 ; 0xa8e <__vector_19> + 4e: 00 00 nop + 50: 56 c5 rjmp .+2732 ; 0xafe <__vector_20> + 52: 00 00 nop + 54: 8c c5 rjmp .+2840 ; 0xb6e <__vector_21> + 56: 00 00 nop + 58: c2 c5 rjmp .+2948 ; 0xbde <__vector_22> + 5a: 00 00 nop + 5c: f8 c5 rjmp .+3056 ; 0xc4e <__vector_23> + 5e: 00 00 nop + 60: f2 c1 rjmp .+996 ; 0x446 <__bad_interrupt> + 62: 00 00 nop + 64: 0c 94 eb 2f jmp 0x5fd6 ; 0x5fd6 <__vector_25> + 68: ee c1 rjmp .+988 ; 0x446 <__bad_interrupt> + 6a: 00 00 nop + 6c: ec c1 rjmp .+984 ; 0x446 <__bad_interrupt> + 6e: 00 00 nop + 70: 0c 94 6d 15 jmp 0x2ada ; 0x2ada <__vector_28> + 74: e8 c1 rjmp .+976 ; 0x446 <__bad_interrupt> + 76: 00 00 nop + 78: e6 c1 rjmp .+972 ; 0x446 <__bad_interrupt> + 7a: 00 00 nop + 7c: e4 c1 rjmp .+968 ; 0x446 <__bad_interrupt> + 7e: 00 00 nop + 80: e2 c1 rjmp .+964 ; 0x446 <__bad_interrupt> + 82: 00 00 nop + 84: e0 c1 rjmp .+960 ; 0x446 <__bad_interrupt> + 86: 00 00 nop + 88: de c1 rjmp .+956 ; 0x446 <__bad_interrupt> + 8a: 00 00 nop + 8c: dc c1 rjmp .+952 ; 0x446 <__bad_interrupt> + 8e: 00 00 nop + 90: da c1 rjmp .+948 ; 0x446 <__bad_interrupt> + 92: 00 00 nop + 94: d8 c1 rjmp .+944 ; 0x446 <__bad_interrupt> + 96: 00 00 nop + 98: d6 c1 rjmp .+940 ; 0x446 <__bad_interrupt> + 9a: 00 00 nop + 9c: 14 c3 rjmp .+1576 ; 0x6c6 <__vector_39> + 9e: 00 00 nop + a0: 4f c3 rjmp .+1694 ; 0x740 <__vector_40> + a2: 00 00 nop + a4: 8a c3 rjmp .+1812 ; 0x7ba <__vector_41> + a6: 00 00 nop + a8: c5 c3 rjmp .+1930 ; 0x834 <__vector_42> + aa: 00 00 nop + ac: cc c1 rjmp .+920 ; 0x446 <__bad_interrupt> + ae: 00 00 nop + b0: ca c1 rjmp .+916 ; 0x446 <__bad_interrupt> + b2: 00 00 nop + b4: c8 c1 rjmp .+912 ; 0x446 <__bad_interrupt> + b6: 00 00 nop + b8: 0c 94 bd 0e jmp 0x1d7a ; 0x1d7a <__vector_46> + bc: 0c 94 8f 08 jmp 0x111e ; 0x111e <__vector_47> + c0: 0c 94 c7 08 jmp 0x118e ; 0x118e <__vector_48> + c4: 0c 94 ff 08 jmp 0x11fe ; 0x11fe <__vector_49> + c8: 0c 94 37 09 jmp 0x126e ; 0x126e <__vector_50> + cc: 0c 94 6f 09 jmp 0x12de ; 0x12de <__vector_51> + d0: 0c 94 a7 09 jmp 0x134e ; 0x134e <__vector_52> + d4: 0c 94 df 09 jmp 0x13be ; 0x13be <__vector_53> + d8: 0c 94 17 0a jmp 0x142e ; 0x142e <__vector_54> + dc: 0c 94 4f 0a jmp 0x149e ; 0x149e <__vector_55> + e0: 0c 94 87 0a jmp 0x150e ; 0x150e <__vector_56> + e4: b0 c1 rjmp .+864 ; 0x446 <__bad_interrupt> + e6: 00 00 nop + e8: ae c1 rjmp .+860 ; 0x446 <__bad_interrupt> + ea: 00 00 nop + ec: ac c1 rjmp .+856 ; 0x446 <__bad_interrupt> + ee: 00 00 nop + f0: aa c1 rjmp .+852 ; 0x446 <__bad_interrupt> + f2: 00 00 nop + f4: a8 c1 rjmp .+848 ; 0x446 <__bad_interrupt> + f6: 00 00 nop + f8: a6 c1 rjmp .+844 ; 0x446 <__bad_interrupt> + fa: 00 00 nop + fc: a4 c1 rjmp .+840 ; 0x446 <__bad_interrupt> + fe: 00 00 nop + 100: 0c 94 96 17 jmp 0x2f2c ; 0x2f2c <__vector_64> + 104: 0c 94 ce 14 jmp 0x299c ; 0x299c <__vector_65> + 108: 0c 94 29 1d jmp 0x3a52 ; 0x3a52 <__vector_66> + 10c: 9c c1 rjmp .+824 ; 0x446 <__bad_interrupt> + 10e: 00 00 nop + 110: 9a c1 rjmp .+820 ; 0x446 <__bad_interrupt> + 112: 00 00 nop + 114: 98 c1 rjmp .+816 ; 0x446 <__bad_interrupt> + 116: 00 00 nop + 118: 96 c1 rjmp .+812 ; 0x446 <__bad_interrupt> + 11a: 00 00 nop + 11c: e0 c1 rjmp .+960 ; 0x4de <__vector_71> + 11e: 00 00 nop + 120: 1b c2 rjmp .+1078 ; 0x558 <__vector_72> + 122: 00 00 nop + 124: 56 c2 rjmp .+1196 ; 0x5d2 <__vector_73> + 126: 00 00 nop + 128: 91 c2 rjmp .+1314 ; 0x64c <__vector_74> + 12a: 00 00 nop + 12c: 8c c1 rjmp .+792 ; 0x446 <__bad_interrupt> + 12e: 00 00 nop + 130: 0c 94 8b 0e jmp 0x1d16 ; 0x1d16 <__vector_76> + 134: c4 c5 rjmp .+2952 ; 0xcbe <__vector_77> + 136: 00 00 nop + 138: fa c5 rjmp .+3060 ; 0xd2e <__vector_78> + 13a: 00 00 nop + 13c: 30 c6 rjmp .+3168 ; 0xd9e <__vector_79> + 13e: 00 00 nop + 140: 66 c6 rjmp .+3276 ; 0xe0e <__vector_80> + 142: 00 00 nop + 144: 9c c6 rjmp .+3384 ; 0xe7e <__vector_81> + 146: 00 00 nop + 148: d2 c6 rjmp .+3492 ; 0xeee <__vector_82> + 14a: 00 00 nop + 14c: 08 c7 rjmp .+3600 ; 0xf5e <__vector_83> + 14e: 00 00 nop + 150: 3e c7 rjmp .+3708 ; 0xfce <__vector_84> + 152: 00 00 nop + 154: 74 c7 rjmp .+3816 ; 0x103e <__vector_85> + 156: 00 00 nop + 158: aa c7 rjmp .+3924 ; 0x10ae <__vector_86> + 15a: 00 00 nop + 15c: 74 c1 rjmp .+744 ; 0x446 <__bad_interrupt> + 15e: 00 00 nop + 160: 72 c1 rjmp .+740 ; 0x446 <__bad_interrupt> + 162: 00 00 nop + 164: 70 c1 rjmp .+736 ; 0x446 <__bad_interrupt> + 166: 00 00 nop + 168: 6e c1 rjmp .+732 ; 0x446 <__bad_interrupt> + 16a: 00 00 nop + 16c: 6c c1 rjmp .+728 ; 0x446 <__bad_interrupt> + 16e: 00 00 nop + 170: 6a c1 rjmp .+724 ; 0x446 <__bad_interrupt> + 172: 00 00 nop + 174: 68 c1 rjmp .+720 ; 0x446 <__bad_interrupt> + 176: 00 00 nop + 178: 66 c1 rjmp .+716 ; 0x446 <__bad_interrupt> + 17a: 00 00 nop + 17c: 64 c1 rjmp .+712 ; 0x446 <__bad_interrupt> + 17e: 00 00 nop + 180: 62 c1 rjmp .+708 ; 0x446 <__bad_interrupt> + 182: 00 00 nop + 184: 60 c1 rjmp .+704 ; 0x446 <__bad_interrupt> + 186: 00 00 nop + 188: 5e c1 rjmp .+700 ; 0x446 <__bad_interrupt> + 18a: 00 00 nop + 18c: 5c c1 rjmp .+696 ; 0x446 <__bad_interrupt> + 18e: 00 00 nop + 190: 5a c1 rjmp .+692 ; 0x446 <__bad_interrupt> + 192: 00 00 nop + 194: 58 c1 rjmp .+688 ; 0x446 <__bad_interrupt> + 196: 00 00 nop + 198: 56 c1 rjmp .+684 ; 0x446 <__bad_interrupt> + 19a: 00 00 nop + 19c: 54 c1 rjmp .+680 ; 0x446 <__bad_interrupt> + 19e: 00 00 nop + 1a0: 52 c1 rjmp .+676 ; 0x446 <__bad_interrupt> + 1a2: 00 00 nop + 1a4: 50 c1 rjmp .+672 ; 0x446 <__bad_interrupt> + 1a6: 00 00 nop + 1a8: 4e c1 rjmp .+668 ; 0x446 <__bad_interrupt> + 1aa: 00 00 nop + 1ac: 0c 94 ef 0e jmp 0x1dde ; 0x1dde <__vector_107> + 1b0: 0c 94 bf 0a jmp 0x157e ; 0x157e <__vector_108> + 1b4: 0c 94 f7 0a jmp 0x15ee ; 0x15ee <__vector_109> + 1b8: 0c 94 2f 0b jmp 0x165e ; 0x165e <__vector_110> + 1bc: 0c 94 67 0b jmp 0x16ce ; 0x16ce <__vector_111> + 1c0: 0c 94 9f 0b jmp 0x173e ; 0x173e <__vector_112> + 1c4: 0c 94 d7 0b jmp 0x17ae ; 0x17ae <__vector_113> + 1c8: 0c 94 0f 0c jmp 0x181e ; 0x181e <__vector_114> + 1cc: 0c 94 47 0c jmp 0x188e ; 0x188e <__vector_115> + 1d0: 0c 94 7f 0c jmp 0x18fe ; 0x18fe <__vector_116> + 1d4: 0c 94 b7 0c jmp 0x196e ; 0x196e <__vector_117> + 1d8: 36 c1 rjmp .+620 ; 0x446 <__bad_interrupt> + 1da: 00 00 nop + 1dc: 34 c1 rjmp .+616 ; 0x446 <__bad_interrupt> + 1de: 00 00 nop + 1e0: 32 c1 rjmp .+612 ; 0x446 <__bad_interrupt> + 1e2: 00 00 nop + 1e4: 30 c1 rjmp .+608 ; 0x446 <__bad_interrupt> + 1e6: 00 00 nop + 1e8: 2e c1 rjmp .+604 ; 0x446 <__bad_interrupt> + 1ea: 00 00 nop + 1ec: 2c c1 rjmp .+600 ; 0x446 <__bad_interrupt> + 1ee: 00 00 nop + 1f0: 2a c1 rjmp .+596 ; 0x446 <__bad_interrupt> + 1f2: 00 00 nop + 1f4: 28 c1 rjmp .+592 ; 0x446 <__bad_interrupt> + 1f6: 00 00 nop + 1f8: 26 c1 rjmp .+588 ; 0x446 <__bad_interrupt> + 1fa: 00 00 nop + 1fc: fa 12 cpse r15, r26 + 1fe: 0d 13 cpse r16, r29 + 200: 20 13 cpse r18, r16 + 202: 33 13 cpse r19, r19 + 204: 46 13 cpse r20, r22 + 206: 59 13 cpse r21, r25 + 208: 6c 13 cpse r22, r28 + 20a: 7f 13 cpse r23, r31 + 20c: 03 6e ori r16, 0xE3 ; 227 + 20e: db 36 cpi r29, 0x6B ; 107 + 210: 3d 9a sbi 0x07, 5 ; 7 + 212: 99 99 sbic 0x13, 1 ; 19 + 214: 99 3d cpi r25, 0xD9 ; 217 + 216: ab aa std Y+51, r10 ; 0x33 + 218: aa 2a or r10, r26 + 21a: 3e 00 .word 0x003e ; ???? + 21c: 00 00 nop + 21e: 80 3f cpi r24, 0xF0 ; 240 + 220: 08 4a sbci r16, 0xA8 ; 168 + 222: d7 3b cpi r29, 0xB7 ; 183 + 224: 3b ce rjmp .-906 ; 0xfffffe9c <__eeprom_end+0xff7efe9c> + 226: 01 6e ori r16, 0xE1 ; 225 + 228: 84 bc out 0x24, r8 ; 36 + 22a: bf fd .word 0xfdbf ; ???? + 22c: c1 2f mov r28, r17 + 22e: 3d 6c ori r19, 0xCD ; 205 + 230: 74 31 cpi r23, 0x14 ; 20 + 232: 9a bd out 0x2a, r25 ; 42 + 234: 56 83 std Z+6, r21 ; 0x06 + 236: 3d da rcall .-2950 ; 0xfffff6b2 <__eeprom_end+0xff7ef6b2> + 238: 3d 00 .word 0x003d ; ???? + 23a: c7 7f andi r28, 0xF7 ; 247 + 23c: 11 be out 0x31, r1 ; 49 + 23e: d9 e4 ldi r29, 0x49 ; 73 + 240: bb 4c sbci r27, 0xCB ; 203 + 242: 3e 91 ld r19, -X + 244: 6b aa std Y+51, r6 ; 0x33 + 246: aa be out 0x3a, r10 ; 58 + 248: 00 00 nop + 24a: 00 80 ld r0, Z + 24c: 3f 07 cpc r19, r31 + 24e: 2c 7a andi r18, 0xAC ; 172 + 250: a5 ba out 0x15, r10 ; 21 + 252: 6c c5 rjmp .+2776 ; 0xd2c <__vector_77+0x6e> + 254: 90 da rcall .-2784 ; 0xfffff776 <__eeprom_end+0xff7ef776> + 256: 3b 93 .word 0x933b ; ???? + 258: 65 fc sbrc r6, 5 + 25a: 8b bc out 0x2b, r8 ; 43 + 25c: 53 f8 bld r5, 3 + 25e: 10 fd sbrc r17, 0 + 260: 3c 56 subi r19, 0x6C ; 108 + 262: 92 83 std Z+2, r25 ; 0x02 + 264: 4d bd out 0x2d, r20 ; 45 + 266: 87 9d mul r24, r7 + 268: 3a b6 in r3, 0x3a ; 58 + 26a: 3d cb rjmp .-2438 ; 0xfffff8e6 <__eeprom_end+0xff7ef8e6> + 26c: c9 bf out 0x39, r28 ; 57 + 26e: 5b be out 0x3b, r5 ; 59 + 270: 73 da rcall .-2842 ; 0xfffff758 <__eeprom_end+0xff7ef758> + 272: 0f c9 rjmp .-3554 ; 0xfffff492 <__eeprom_end+0xff7ef492> + 274: 3f 08 sbc r3, r15 + 276: 00 00 nop + 278: 00 be out 0x30, r0 ; 48 + 27a: 92 24 eor r9, r2 + 27c: 49 12 cpse r4, r25 + 27e: 3e ab std Y+54, r19 ; 0x36 + 280: aa aa std Y+50, r10 ; 0x32 + 282: 2a be out 0x3a, r2 ; 58 + 284: cd cc rjmp .-1638 ; 0xfffffc20 <__eeprom_end+0xff7efc20> + 286: cc 4c sbci r28, 0xCC ; 204 + 288: 3e 00 .word 0x003e ; ???? + 28a: 00 00 nop + 28c: 80 be out 0x30, r8 ; 48 + 28e: ab aa std Y+51, r10 ; 0x33 + 290: aa aa std Y+50, r10 ; 0x32 + 292: 3e 00 .word 0x003e ; ???? + 294: 00 00 nop + 296: 00 bf out 0x30, r16 ; 48 + 298: 00 00 nop + 29a: 00 80 ld r0, Z + 29c: 3f 00 .word 0x003f ; ???? + 29e: 00 00 nop + 2a0: 00 00 nop + 2a2: 08 41 sbci r16, 0x18 ; 24 + 2a4: 78 d3 rcall .+1776 ; 0x996 <__vector_15+0x58> + 2a6: bb 43 sbci r27, 0x3B ; 59 + 2a8: 87 d1 rcall .+782 ; 0x5b8 <__vector_72+0x60> + 2aa: 13 3d cpi r17, 0xD3 ; 211 + 2ac: 19 0e add r1, r25 + 2ae: 3c c3 rjmp .+1656 ; 0x928 <__vector_14+0x5a> + 2b0: bd 42 sbci r27, 0x2D ; 45 + 2b2: 82 ad ldd r24, Z+58 ; 0x3a + 2b4: 2b 3e cpi r18, 0xEB ; 235 + 2b6: 68 ec ldi r22, 0xC8 ; 200 + 2b8: 82 76 andi r24, 0x62 ; 98 + 2ba: be d9 rcall .-3204 ; 0xfffff638 <__eeprom_end+0xff7ef638> + 2bc: 8f e1 ldi r24, 0x1F ; 31 + 2be: a9 3e cpi r26, 0xE9 ; 233 + 2c0: 4c 80 ldd r4, Y+4 ; 0x04 + 2c2: ef ff .word 0xffef ; ???? + 2c4: be 01 movw r22, r28 + 2c6: c4 ff sbrs r28, 4 + 2c8: 7f 3f cpi r23, 0xFF ; 255 + 2ca: 00 00 nop + 2cc: 00 00 nop + 2ce: 00 07 cpc r16, r16 + 2d0: 63 42 sbci r22, 0x23 ; 35 + 2d2: 36 b7 in r19, 0x36 ; 54 + 2d4: 9b d8 rcall .-3786 ; 0xfffff40c <__eeprom_end+0xff7ef40c> + 2d6: a7 1a sub r10, r23 + 2d8: 39 68 ori r19, 0x89 ; 137 + 2da: 56 18 sub r5, r6 + 2dc: ae ba out 0x1e, r10 ; 30 + 2de: ab 55 subi r26, 0x5B ; 91 + 2e0: 8c 1d adc r24, r12 + 2e2: 3c b7 in r19, 0x3c ; 60 + 2e4: cc 57 subi r28, 0x7C ; 124 + 2e6: 63 bd out 0x23, r22 ; 35 + 2e8: 6d ed ldi r22, 0xDD ; 221 + 2ea: fd 75 andi r31, 0x5D ; 93 + 2ec: 3e f6 brtc .-114 ; 0x27c <__SREG__+0x23d> + 2ee: 17 72 andi r17, 0x27 ; 39 + 2f0: 31 bf out 0x31, r19 ; 49 + 2f2: 00 00 nop + 2f4: 00 80 ld r0, Z + 2f6: 3f 00 .word 0x003f ; ???? + +000002f8 <__trampolines_end>: + 2f8: 6e 61 ori r22, 0x1E ; 30 + 2fa: 6e 00 .word 0x006e ; ???? + +000002fc <__c.2332>: + 2fc: 69 6e 66 00 00 40 7a 10 f3 5a 00 a0 72 4e 18 09 inf..@z..Z..rN.. + 30c: 00 10 a5 d4 e8 00 00 e8 76 48 17 00 00 e4 0b 54 ........vH.....T + 31c: 02 00 00 ca 9a 3b 00 00 00 e1 f5 05 00 00 80 96 .....;.......... + 32c: 98 00 00 00 40 42 0f 00 00 00 a0 86 01 00 00 00 ....@B.......... + 33c: 10 27 00 00 00 00 e8 03 00 00 00 00 64 00 00 00 .'..........d... + 34c: 00 00 0a 00 00 00 00 00 01 00 00 00 00 00 2c 76 ..............,v + 35c: d8 88 dc 67 4f 08 23 df c1 df ae 59 e1 b1 b7 96 ...gO.#....Y.... + 36c: e5 e3 e4 53 c6 3a e6 51 99 76 96 e8 e6 c2 84 26 ...S.:.Q.v.....& + 37c: eb 89 8c 9b 62 ed 40 7c 6f fc ef bc 9c 9f 40 f2 ....b.@|o.....@. + 38c: ba a5 6f a5 f4 90 05 5a 2a f7 5c 93 6b 6c f9 67 ..o....Z*.\.kl.g + 39c: 6d c1 1b fc e0 e4 0d 47 fe f5 20 e6 b5 00 d0 ed m......G.. ..... + 3ac: 90 2e 03 00 94 35 77 05 00 80 84 1e 08 00 00 20 .....5w........ + 3bc: 4e 0a 00 00 00 c8 0c 33 33 33 33 0f 98 6e 12 83 N......3333..n.. + 3cc: 11 41 ef 8d 21 14 89 3b e6 55 16 cf fe e6 db 18 .A..!..;.U...... + 3dc: d1 84 4b 38 1b f7 7c 1d 90 1d a4 bb e4 24 20 32 ..K8..|......$ 2 + 3ec: 84 72 5e 22 81 00 c9 f1 24 ec a1 e5 3d 27 .r^"....$...=' + +000003fa <__ctors_end>: + 3fa: 11 24 eor r1, r1 + 3fc: 1f be out 0x3f, r1 ; 63 + 3fe: cf ef ldi r28, 0xFF ; 255 + 400: cd bf out 0x3d, r28 ; 61 + 402: df e3 ldi r29, 0x3F ; 63 + 404: de bf out 0x3e, r29 ; 62 + 406: 00 e0 ldi r16, 0x00 ; 0 + 408: 0c bf out 0x3c, r16 ; 60 + 40a: 18 be out 0x38, r1 ; 56 + 40c: 19 be out 0x39, r1 ; 57 + 40e: 1a be out 0x3a, r1 ; 58 + 410: 1b be out 0x3b, r1 ; 59 + +00000412 <__do_copy_data>: + 412: 11 e2 ldi r17, 0x21 ; 33 + 414: a0 e0 ldi r26, 0x00 ; 0 + 416: b0 e2 ldi r27, 0x20 ; 32 + 418: ee e3 ldi r30, 0x3E ; 62 + 41a: f8 e7 ldi r31, 0x78 ; 120 + 41c: 00 e0 ldi r16, 0x00 ; 0 + 41e: 0b bf out 0x3b, r16 ; 59 + 420: 02 c0 rjmp .+4 ; 0x426 <__do_copy_data+0x14> + 422: 07 90 elpm r0, Z+ + 424: 0d 92 st X+, r0 + 426: a2 3c cpi r26, 0xC2 ; 194 + 428: b1 07 cpc r27, r17 + 42a: d9 f7 brne .-10 ; 0x422 <__do_copy_data+0x10> + 42c: 1b be out 0x3b, r1 ; 59 + +0000042e <__do_clear_bss>: + 42e: 29 e2 ldi r18, 0x29 ; 41 + 430: a2 ec ldi r26, 0xC2 ; 194 + 432: b1 e2 ldi r27, 0x21 ; 33 + 434: 01 c0 rjmp .+2 ; 0x438 <.do_clear_bss_start> + +00000436 <.do_clear_bss_loop>: + 436: 1d 92 st X+, r1 + +00000438 <.do_clear_bss_start>: + 438: ad 3a cpi r26, 0xAD ; 173 + 43a: b2 07 cpc r27, r18 + 43c: e1 f7 brne .-8 ; 0x436 <.do_clear_bss_loop> + 43e: 0e 94 ce 30 call 0x619c ; 0x619c
+ 442: 0c 94 1d 3c jmp 0x783a ; 0x783a <_exit> + +00000446 <__bad_interrupt>: + 446: dc cd rjmp .-1096 ; 0x0 <__vectors> + +00000448 : +# include +#endif + + +void sysclk_init(void) +{ + 448: cf 93 push r28 + 44a: df 93 push r29 + 44c: 1f 92 push r1 + 44e: 1f 92 push r1 + 450: cd b7 in r28, 0x3d ; 61 + 452: de b7 in r29, 0x3e ; 62 +#endif + bool need_rc2mhz = false; + + /* Turn off all peripheral clocks that can be turned off. */ + for (i = 0; i <= SYSCLK_PORT_F; i++) { + *(reg++) = 0xff; + 454: 8f ef ldi r24, 0xFF ; 255 + 456: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x700070> + 45a: 80 93 71 00 sts 0x0071, r24 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> + 45e: 80 93 72 00 sts 0x0072, r24 ; 0x800072 <__TEXT_REGION_LENGTH__+0x700072> + 462: 80 93 73 00 sts 0x0073, r24 ; 0x800073 <__TEXT_REGION_LENGTH__+0x700073> + 466: 80 93 74 00 sts 0x0074, r24 ; 0x800074 <__TEXT_REGION_LENGTH__+0x700074> + 46a: 80 93 75 00 sts 0x0075, r24 ; 0x800075 <__TEXT_REGION_LENGTH__+0x700075> + 46e: 80 93 76 00 sts 0x0076, r24 ; 0x800076 <__TEXT_REGION_LENGTH__+0x700076> + +typedef uint8_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + volatile irqflags_t flags = SREG; + 472: 8f b7 in r24, 0x3f ; 63 + 474: 8a 83 std Y+2, r24 ; 0x02 + cpu_irq_disable(); + 476: f8 94 cli + return flags; + 478: 9a 81 ldd r25, Y+2 ; 0x02 + irqflags_t flags; + + Assert(id != OSC_ID_USBSOF); + + flags = cpu_irq_save(); + OSC.CTRL |= id; + 47a: e0 e5 ldi r30, 0x50 ; 80 + 47c: f0 e0 ldi r31, 0x00 ; 0 + 47e: 80 81 ld r24, Z + 480: 82 60 ori r24, 0x02 ; 2 + 482: 80 83 st Z, r24 +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); + SREG = flags; + 484: 9f bf out 0x3f, r25 ; 63 + +static inline bool osc_is_ready(uint8_t id) +{ + Assert(id != OSC_ID_USBSOF); + + return OSC.STATUS & id; + 486: 81 81 ldd r24, Z+1 ; 0x01 + * + * \param id A number identifying the oscillator to wait for. + */ +static inline void osc_wait_ready(uint8_t id) +{ + while (!osc_is_ready(id)) { + 488: 81 ff sbrs r24, 1 + 48a: fd cf rjmp .-6 ; 0x486 + default: + //unhandled_case(CONFIG_SYSCLK_SOURCE); + return; + } + + ccp_write_io((uint8_t *)&CLK.CTRL, CONFIG_SYSCLK_SOURCE); + 48c: 61 e0 ldi r22, 0x01 ; 1 + 48e: 80 e4 ldi r24, 0x40 ; 64 + 490: 90 e0 ldi r25, 0x00 ; 0 + 492: 0d d2 rcall .+1050 ; 0x8ae + +typedef uint8_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + volatile irqflags_t flags = SREG; + 494: 8f b7 in r24, 0x3f ; 63 + 496: 89 83 std Y+1, r24 ; 0x01 + cpu_irq_disable(); + 498: f8 94 cli + return flags; + 49a: 99 81 ldd r25, Y+1 ; 0x01 + irqflags_t flags; + + Assert(id != OSC_ID_USBSOF); + + flags = cpu_irq_save(); + OSC.CTRL &= ~id; + 49c: e0 e5 ldi r30, 0x50 ; 80 + 49e: f0 e0 ldi r31, 0x00 ; 0 + 4a0: 80 81 ld r24, Z + 4a2: 8e 7f andi r24, 0xFE ; 254 + 4a4: 80 83 st Z, r24 +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); + SREG = flags; + 4a6: 9f bf out 0x3f, r25 ; 63 + } + +#ifdef CONFIG_RTC_SOURCE + sysclk_rtcsrc_enable(CONFIG_RTC_SOURCE); +#endif +} + 4a8: 0f 90 pop r0 + 4aa: 0f 90 pop r0 + 4ac: df 91 pop r29 + 4ae: cf 91 pop r28 + 4b0: 08 95 ret + +000004b2 : + +void sysclk_enable_module(enum sysclk_port_id port, uint8_t id) +{ + 4b2: cf 93 push r28 + 4b4: df 93 push r29 + 4b6: 1f 92 push r1 + 4b8: cd b7 in r28, 0x3d ; 61 + 4ba: de b7 in r29, 0x3e ; 62 + +typedef uint8_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + volatile irqflags_t flags = SREG; + 4bc: 9f b7 in r25, 0x3f ; 63 + 4be: 99 83 std Y+1, r25 ; 0x01 + cpu_irq_disable(); + 4c0: f8 94 cli + return flags; + 4c2: 99 81 ldd r25, Y+1 ; 0x01 + irqflags_t flags = cpu_irq_save(); + + *((uint8_t *)&PR.PRGEN + port) &= ~id; + 4c4: e8 2f mov r30, r24 + 4c6: f0 e0 ldi r31, 0x00 ; 0 + 4c8: e0 59 subi r30, 0x90 ; 144 + 4ca: ff 4f sbci r31, 0xFF ; 255 + 4cc: 60 95 com r22 + 4ce: 80 81 ld r24, Z + 4d0: 68 23 and r22, r24 + 4d2: 60 83 st Z, r22 +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); + SREG = flags; + 4d4: 9f bf out 0x3f, r25 ; 63 + + cpu_irq_restore(flags); +} + 4d6: 0f 90 pop r0 + 4d8: df 91 pop r29 + 4da: cf 91 pop r28 + 4dc: 08 95 ret + +000004de <__vector_71>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH0_vect) +{ + 4de: 1f 92 push r1 + 4e0: 0f 92 push r0 + 4e2: 0f b6 in r0, 0x3f ; 63 + 4e4: 0f 92 push r0 + 4e6: 11 24 eor r1, r1 + 4e8: 08 b6 in r0, 0x38 ; 56 + 4ea: 0f 92 push r0 + 4ec: 18 be out 0x38, r1 ; 56 + 4ee: 09 b6 in r0, 0x39 ; 57 + 4f0: 0f 92 push r0 + 4f2: 19 be out 0x39, r1 ; 57 + 4f4: 0b b6 in r0, 0x3b ; 59 + 4f6: 0f 92 push r0 + 4f8: 1b be out 0x3b, r1 ; 59 + 4fa: 2f 93 push r18 + 4fc: 3f 93 push r19 + 4fe: 4f 93 push r20 + 500: 5f 93 push r21 + 502: 6f 93 push r22 + 504: 7f 93 push r23 + 506: 8f 93 push r24 + 508: 9f 93 push r25 + 50a: af 93 push r26 + 50c: bf 93 push r27 + 50e: ef 93 push r30 + 510: ff 93 push r31 + adca_callback(&ADCA, ADC_CH0, adc_get_result(&ADCA, ADC_CH0)); + 512: 40 91 24 02 lds r20, 0x0224 ; 0x800224 <__TEXT_REGION_LENGTH__+0x700224> + 516: 50 91 25 02 lds r21, 0x0225 ; 0x800225 <__TEXT_REGION_LENGTH__+0x700225> + 51a: e0 91 39 25 lds r30, 0x2539 ; 0x802539 + 51e: f0 91 3a 25 lds r31, 0x253A ; 0x80253a + 522: 61 e0 ldi r22, 0x01 ; 1 + 524: 80 e0 ldi r24, 0x00 ; 0 + 526: 92 e0 ldi r25, 0x02 ; 2 + 528: 19 95 eicall +} + 52a: ff 91 pop r31 + 52c: ef 91 pop r30 + 52e: bf 91 pop r27 + 530: af 91 pop r26 + 532: 9f 91 pop r25 + 534: 8f 91 pop r24 + 536: 7f 91 pop r23 + 538: 6f 91 pop r22 + 53a: 5f 91 pop r21 + 53c: 4f 91 pop r20 + 53e: 3f 91 pop r19 + 540: 2f 91 pop r18 + 542: 0f 90 pop r0 + 544: 0b be out 0x3b, r0 ; 59 + 546: 0f 90 pop r0 + 548: 09 be out 0x39, r0 ; 57 + 54a: 0f 90 pop r0 + 54c: 08 be out 0x38, r0 ; 56 + 54e: 0f 90 pop r0 + 550: 0f be out 0x3f, r0 ; 63 + 552: 0f 90 pop r0 + 554: 1f 90 pop r1 + 556: 18 95 reti + +00000558 <__vector_72>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH1_vect) +{ + 558: 1f 92 push r1 + 55a: 0f 92 push r0 + 55c: 0f b6 in r0, 0x3f ; 63 + 55e: 0f 92 push r0 + 560: 11 24 eor r1, r1 + 562: 08 b6 in r0, 0x38 ; 56 + 564: 0f 92 push r0 + 566: 18 be out 0x38, r1 ; 56 + 568: 09 b6 in r0, 0x39 ; 57 + 56a: 0f 92 push r0 + 56c: 19 be out 0x39, r1 ; 57 + 56e: 0b b6 in r0, 0x3b ; 59 + 570: 0f 92 push r0 + 572: 1b be out 0x3b, r1 ; 59 + 574: 2f 93 push r18 + 576: 3f 93 push r19 + 578: 4f 93 push r20 + 57a: 5f 93 push r21 + 57c: 6f 93 push r22 + 57e: 7f 93 push r23 + 580: 8f 93 push r24 + 582: 9f 93 push r25 + 584: af 93 push r26 + 586: bf 93 push r27 + 588: ef 93 push r30 + 58a: ff 93 push r31 + adca_callback(&ADCA, ADC_CH1, adc_get_result(&ADCA, ADC_CH1)); + 58c: 40 91 2c 02 lds r20, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> + 590: 50 91 2d 02 lds r21, 0x022D ; 0x80022d <__TEXT_REGION_LENGTH__+0x70022d> + 594: e0 91 39 25 lds r30, 0x2539 ; 0x802539 + 598: f0 91 3a 25 lds r31, 0x253A ; 0x80253a + 59c: 62 e0 ldi r22, 0x02 ; 2 + 59e: 80 e0 ldi r24, 0x00 ; 0 + 5a0: 92 e0 ldi r25, 0x02 ; 2 + 5a2: 19 95 eicall +} + 5a4: ff 91 pop r31 + 5a6: ef 91 pop r30 + 5a8: bf 91 pop r27 + 5aa: af 91 pop r26 + 5ac: 9f 91 pop r25 + 5ae: 8f 91 pop r24 + 5b0: 7f 91 pop r23 + 5b2: 6f 91 pop r22 + 5b4: 5f 91 pop r21 + 5b6: 4f 91 pop r20 + 5b8: 3f 91 pop r19 + 5ba: 2f 91 pop r18 + 5bc: 0f 90 pop r0 + 5be: 0b be out 0x3b, r0 ; 59 + 5c0: 0f 90 pop r0 + 5c2: 09 be out 0x39, r0 ; 57 + 5c4: 0f 90 pop r0 + 5c6: 08 be out 0x38, r0 ; 56 + 5c8: 0f 90 pop r0 + 5ca: 0f be out 0x3f, r0 ; 63 + 5cc: 0f 90 pop r0 + 5ce: 1f 90 pop r1 + 5d0: 18 95 reti + +000005d2 <__vector_73>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH2_vect) +{ + 5d2: 1f 92 push r1 + 5d4: 0f 92 push r0 + 5d6: 0f b6 in r0, 0x3f ; 63 + 5d8: 0f 92 push r0 + 5da: 11 24 eor r1, r1 + 5dc: 08 b6 in r0, 0x38 ; 56 + 5de: 0f 92 push r0 + 5e0: 18 be out 0x38, r1 ; 56 + 5e2: 09 b6 in r0, 0x39 ; 57 + 5e4: 0f 92 push r0 + 5e6: 19 be out 0x39, r1 ; 57 + 5e8: 0b b6 in r0, 0x3b ; 59 + 5ea: 0f 92 push r0 + 5ec: 1b be out 0x3b, r1 ; 59 + 5ee: 2f 93 push r18 + 5f0: 3f 93 push r19 + 5f2: 4f 93 push r20 + 5f4: 5f 93 push r21 + 5f6: 6f 93 push r22 + 5f8: 7f 93 push r23 + 5fa: 8f 93 push r24 + 5fc: 9f 93 push r25 + 5fe: af 93 push r26 + 600: bf 93 push r27 + 602: ef 93 push r30 + 604: ff 93 push r31 + adca_callback(&ADCA, ADC_CH2, adc_get_result(&ADCA, ADC_CH2)); + 606: 40 91 34 02 lds r20, 0x0234 ; 0x800234 <__TEXT_REGION_LENGTH__+0x700234> + 60a: 50 91 35 02 lds r21, 0x0235 ; 0x800235 <__TEXT_REGION_LENGTH__+0x700235> + 60e: e0 91 39 25 lds r30, 0x2539 ; 0x802539 + 612: f0 91 3a 25 lds r31, 0x253A ; 0x80253a + 616: 64 e0 ldi r22, 0x04 ; 4 + 618: 80 e0 ldi r24, 0x00 ; 0 + 61a: 92 e0 ldi r25, 0x02 ; 2 + 61c: 19 95 eicall +} + 61e: ff 91 pop r31 + 620: ef 91 pop r30 + 622: bf 91 pop r27 + 624: af 91 pop r26 + 626: 9f 91 pop r25 + 628: 8f 91 pop r24 + 62a: 7f 91 pop r23 + 62c: 6f 91 pop r22 + 62e: 5f 91 pop r21 + 630: 4f 91 pop r20 + 632: 3f 91 pop r19 + 634: 2f 91 pop r18 + 636: 0f 90 pop r0 + 638: 0b be out 0x3b, r0 ; 59 + 63a: 0f 90 pop r0 + 63c: 09 be out 0x39, r0 ; 57 + 63e: 0f 90 pop r0 + 640: 08 be out 0x38, r0 ; 56 + 642: 0f 90 pop r0 + 644: 0f be out 0x3f, r0 ; 63 + 646: 0f 90 pop r0 + 648: 1f 90 pop r1 + 64a: 18 95 reti + +0000064c <__vector_74>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH3_vect) +{ + 64c: 1f 92 push r1 + 64e: 0f 92 push r0 + 650: 0f b6 in r0, 0x3f ; 63 + 652: 0f 92 push r0 + 654: 11 24 eor r1, r1 + 656: 08 b6 in r0, 0x38 ; 56 + 658: 0f 92 push r0 + 65a: 18 be out 0x38, r1 ; 56 + 65c: 09 b6 in r0, 0x39 ; 57 + 65e: 0f 92 push r0 + 660: 19 be out 0x39, r1 ; 57 + 662: 0b b6 in r0, 0x3b ; 59 + 664: 0f 92 push r0 + 666: 1b be out 0x3b, r1 ; 59 + 668: 2f 93 push r18 + 66a: 3f 93 push r19 + 66c: 4f 93 push r20 + 66e: 5f 93 push r21 + 670: 6f 93 push r22 + 672: 7f 93 push r23 + 674: 8f 93 push r24 + 676: 9f 93 push r25 + 678: af 93 push r26 + 67a: bf 93 push r27 + 67c: ef 93 push r30 + 67e: ff 93 push r31 + adca_callback(&ADCA, ADC_CH3, adc_get_result(&ADCA, ADC_CH3)); + 680: 40 91 3c 02 lds r20, 0x023C ; 0x80023c <__TEXT_REGION_LENGTH__+0x70023c> + 684: 50 91 3d 02 lds r21, 0x023D ; 0x80023d <__TEXT_REGION_LENGTH__+0x70023d> + 688: e0 91 39 25 lds r30, 0x2539 ; 0x802539 + 68c: f0 91 3a 25 lds r31, 0x253A ; 0x80253a + 690: 68 e0 ldi r22, 0x08 ; 8 + 692: 80 e0 ldi r24, 0x00 ; 0 + 694: 92 e0 ldi r25, 0x02 ; 2 + 696: 19 95 eicall +} + 698: ff 91 pop r31 + 69a: ef 91 pop r30 + 69c: bf 91 pop r27 + 69e: af 91 pop r26 + 6a0: 9f 91 pop r25 + 6a2: 8f 91 pop r24 + 6a4: 7f 91 pop r23 + 6a6: 6f 91 pop r22 + 6a8: 5f 91 pop r21 + 6aa: 4f 91 pop r20 + 6ac: 3f 91 pop r19 + 6ae: 2f 91 pop r18 + 6b0: 0f 90 pop r0 + 6b2: 0b be out 0x3b, r0 ; 59 + 6b4: 0f 90 pop r0 + 6b6: 09 be out 0x39, r0 ; 57 + 6b8: 0f 90 pop r0 + 6ba: 08 be out 0x38, r0 ; 56 + 6bc: 0f 90 pop r0 + 6be: 0f be out 0x3f, r0 ; 63 + 6c0: 0f 90 pop r0 + 6c2: 1f 90 pop r1 + 6c4: 18 95 reti + +000006c6 <__vector_39>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH0_vect) +{ + 6c6: 1f 92 push r1 + 6c8: 0f 92 push r0 + 6ca: 0f b6 in r0, 0x3f ; 63 + 6cc: 0f 92 push r0 + 6ce: 11 24 eor r1, r1 + 6d0: 08 b6 in r0, 0x38 ; 56 + 6d2: 0f 92 push r0 + 6d4: 18 be out 0x38, r1 ; 56 + 6d6: 09 b6 in r0, 0x39 ; 57 + 6d8: 0f 92 push r0 + 6da: 19 be out 0x39, r1 ; 57 + 6dc: 0b b6 in r0, 0x3b ; 59 + 6de: 0f 92 push r0 + 6e0: 1b be out 0x3b, r1 ; 59 + 6e2: 2f 93 push r18 + 6e4: 3f 93 push r19 + 6e6: 4f 93 push r20 + 6e8: 5f 93 push r21 + 6ea: 6f 93 push r22 + 6ec: 7f 93 push r23 + 6ee: 8f 93 push r24 + 6f0: 9f 93 push r25 + 6f2: af 93 push r26 + 6f4: bf 93 push r27 + 6f6: ef 93 push r30 + 6f8: ff 93 push r31 + adcb_callback(&ADCB, ADC_CH0, adc_get_result(&ADCB, ADC_CH0)); + 6fa: 40 91 64 02 lds r20, 0x0264 ; 0x800264 <__TEXT_REGION_LENGTH__+0x700264> + 6fe: 50 91 65 02 lds r21, 0x0265 ; 0x800265 <__TEXT_REGION_LENGTH__+0x700265> + 702: e0 91 37 25 lds r30, 0x2537 ; 0x802537 + 706: f0 91 38 25 lds r31, 0x2538 ; 0x802538 + 70a: 61 e0 ldi r22, 0x01 ; 1 + 70c: 80 e4 ldi r24, 0x40 ; 64 + 70e: 92 e0 ldi r25, 0x02 ; 2 + 710: 19 95 eicall +} + 712: ff 91 pop r31 + 714: ef 91 pop r30 + 716: bf 91 pop r27 + 718: af 91 pop r26 + 71a: 9f 91 pop r25 + 71c: 8f 91 pop r24 + 71e: 7f 91 pop r23 + 720: 6f 91 pop r22 + 722: 5f 91 pop r21 + 724: 4f 91 pop r20 + 726: 3f 91 pop r19 + 728: 2f 91 pop r18 + 72a: 0f 90 pop r0 + 72c: 0b be out 0x3b, r0 ; 59 + 72e: 0f 90 pop r0 + 730: 09 be out 0x39, r0 ; 57 + 732: 0f 90 pop r0 + 734: 08 be out 0x38, r0 ; 56 + 736: 0f 90 pop r0 + 738: 0f be out 0x3f, r0 ; 63 + 73a: 0f 90 pop r0 + 73c: 1f 90 pop r1 + 73e: 18 95 reti + +00000740 <__vector_40>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH1_vect) +{ + 740: 1f 92 push r1 + 742: 0f 92 push r0 + 744: 0f b6 in r0, 0x3f ; 63 + 746: 0f 92 push r0 + 748: 11 24 eor r1, r1 + 74a: 08 b6 in r0, 0x38 ; 56 + 74c: 0f 92 push r0 + 74e: 18 be out 0x38, r1 ; 56 + 750: 09 b6 in r0, 0x39 ; 57 + 752: 0f 92 push r0 + 754: 19 be out 0x39, r1 ; 57 + 756: 0b b6 in r0, 0x3b ; 59 + 758: 0f 92 push r0 + 75a: 1b be out 0x3b, r1 ; 59 + 75c: 2f 93 push r18 + 75e: 3f 93 push r19 + 760: 4f 93 push r20 + 762: 5f 93 push r21 + 764: 6f 93 push r22 + 766: 7f 93 push r23 + 768: 8f 93 push r24 + 76a: 9f 93 push r25 + 76c: af 93 push r26 + 76e: bf 93 push r27 + 770: ef 93 push r30 + 772: ff 93 push r31 + adcb_callback(&ADCB, ADC_CH1, adc_get_result(&ADCB, ADC_CH1)); + 774: 40 91 6c 02 lds r20, 0x026C ; 0x80026c <__TEXT_REGION_LENGTH__+0x70026c> + 778: 50 91 6d 02 lds r21, 0x026D ; 0x80026d <__TEXT_REGION_LENGTH__+0x70026d> + 77c: e0 91 37 25 lds r30, 0x2537 ; 0x802537 + 780: f0 91 38 25 lds r31, 0x2538 ; 0x802538 + 784: 62 e0 ldi r22, 0x02 ; 2 + 786: 80 e4 ldi r24, 0x40 ; 64 + 788: 92 e0 ldi r25, 0x02 ; 2 + 78a: 19 95 eicall +} + 78c: ff 91 pop r31 + 78e: ef 91 pop r30 + 790: bf 91 pop r27 + 792: af 91 pop r26 + 794: 9f 91 pop r25 + 796: 8f 91 pop r24 + 798: 7f 91 pop r23 + 79a: 6f 91 pop r22 + 79c: 5f 91 pop r21 + 79e: 4f 91 pop r20 + 7a0: 3f 91 pop r19 + 7a2: 2f 91 pop r18 + 7a4: 0f 90 pop r0 + 7a6: 0b be out 0x3b, r0 ; 59 + 7a8: 0f 90 pop r0 + 7aa: 09 be out 0x39, r0 ; 57 + 7ac: 0f 90 pop r0 + 7ae: 08 be out 0x38, r0 ; 56 + 7b0: 0f 90 pop r0 + 7b2: 0f be out 0x3f, r0 ; 63 + 7b4: 0f 90 pop r0 + 7b6: 1f 90 pop r1 + 7b8: 18 95 reti + +000007ba <__vector_41>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH2_vect) +{ + 7ba: 1f 92 push r1 + 7bc: 0f 92 push r0 + 7be: 0f b6 in r0, 0x3f ; 63 + 7c0: 0f 92 push r0 + 7c2: 11 24 eor r1, r1 + 7c4: 08 b6 in r0, 0x38 ; 56 + 7c6: 0f 92 push r0 + 7c8: 18 be out 0x38, r1 ; 56 + 7ca: 09 b6 in r0, 0x39 ; 57 + 7cc: 0f 92 push r0 + 7ce: 19 be out 0x39, r1 ; 57 + 7d0: 0b b6 in r0, 0x3b ; 59 + 7d2: 0f 92 push r0 + 7d4: 1b be out 0x3b, r1 ; 59 + 7d6: 2f 93 push r18 + 7d8: 3f 93 push r19 + 7da: 4f 93 push r20 + 7dc: 5f 93 push r21 + 7de: 6f 93 push r22 + 7e0: 7f 93 push r23 + 7e2: 8f 93 push r24 + 7e4: 9f 93 push r25 + 7e6: af 93 push r26 + 7e8: bf 93 push r27 + 7ea: ef 93 push r30 + 7ec: ff 93 push r31 + adcb_callback(&ADCB, ADC_CH2, adc_get_result(&ADCB, ADC_CH2)); + 7ee: 40 91 74 02 lds r20, 0x0274 ; 0x800274 <__TEXT_REGION_LENGTH__+0x700274> + 7f2: 50 91 75 02 lds r21, 0x0275 ; 0x800275 <__TEXT_REGION_LENGTH__+0x700275> + 7f6: e0 91 37 25 lds r30, 0x2537 ; 0x802537 + 7fa: f0 91 38 25 lds r31, 0x2538 ; 0x802538 + 7fe: 64 e0 ldi r22, 0x04 ; 4 + 800: 80 e4 ldi r24, 0x40 ; 64 + 802: 92 e0 ldi r25, 0x02 ; 2 + 804: 19 95 eicall +} + 806: ff 91 pop r31 + 808: ef 91 pop r30 + 80a: bf 91 pop r27 + 80c: af 91 pop r26 + 80e: 9f 91 pop r25 + 810: 8f 91 pop r24 + 812: 7f 91 pop r23 + 814: 6f 91 pop r22 + 816: 5f 91 pop r21 + 818: 4f 91 pop r20 + 81a: 3f 91 pop r19 + 81c: 2f 91 pop r18 + 81e: 0f 90 pop r0 + 820: 0b be out 0x3b, r0 ; 59 + 822: 0f 90 pop r0 + 824: 09 be out 0x39, r0 ; 57 + 826: 0f 90 pop r0 + 828: 08 be out 0x38, r0 ; 56 + 82a: 0f 90 pop r0 + 82c: 0f be out 0x3f, r0 ; 63 + 82e: 0f 90 pop r0 + 830: 1f 90 pop r1 + 832: 18 95 reti + +00000834 <__vector_42>: + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH3_vect) +{ + 834: 1f 92 push r1 + 836: 0f 92 push r0 + 838: 0f b6 in r0, 0x3f ; 63 + 83a: 0f 92 push r0 + 83c: 11 24 eor r1, r1 + 83e: 08 b6 in r0, 0x38 ; 56 + 840: 0f 92 push r0 + 842: 18 be out 0x38, r1 ; 56 + 844: 09 b6 in r0, 0x39 ; 57 + 846: 0f 92 push r0 + 848: 19 be out 0x39, r1 ; 57 + 84a: 0b b6 in r0, 0x3b ; 59 + 84c: 0f 92 push r0 + 84e: 1b be out 0x3b, r1 ; 59 + 850: 2f 93 push r18 + 852: 3f 93 push r19 + 854: 4f 93 push r20 + 856: 5f 93 push r21 + 858: 6f 93 push r22 + 85a: 7f 93 push r23 + 85c: 8f 93 push r24 + 85e: 9f 93 push r25 + 860: af 93 push r26 + 862: bf 93 push r27 + 864: ef 93 push r30 + 866: ff 93 push r31 + adcb_callback(&ADCB, ADC_CH3, adc_get_result(&ADCB, ADC_CH3)); + 868: 40 91 7c 02 lds r20, 0x027C ; 0x80027c <__TEXT_REGION_LENGTH__+0x70027c> + 86c: 50 91 7d 02 lds r21, 0x027D ; 0x80027d <__TEXT_REGION_LENGTH__+0x70027d> + 870: e0 91 37 25 lds r30, 0x2537 ; 0x802537 + 874: f0 91 38 25 lds r31, 0x2538 ; 0x802538 + 878: 68 e0 ldi r22, 0x08 ; 8 + 87a: 80 e4 ldi r24, 0x40 ; 64 + 87c: 92 e0 ldi r25, 0x02 ; 2 + 87e: 19 95 eicall +} + 880: ff 91 pop r31 + 882: ef 91 pop r30 + 884: bf 91 pop r27 + 886: af 91 pop r26 + 888: 9f 91 pop r25 + 88a: 8f 91 pop r24 + 88c: 7f 91 pop r23 + 88e: 6f 91 pop r22 + 890: 5f 91 pop r21 + 892: 4f 91 pop r20 + 894: 3f 91 pop r19 + 896: 2f 91 pop r18 + 898: 0f 90 pop r0 + 89a: 0b be out 0x3b, r0 ; 59 + 89c: 0f 90 pop r0 + 89e: 09 be out 0x39, r0 ; 57 + 8a0: 0f 90 pop r0 + 8a2: 08 be out 0x38, r0 ; 56 + 8a4: 0f 90 pop r0 + 8a6: 0f be out 0x3f, r0 ; 63 + 8a8: 0f 90 pop r0 + 8aa: 1f 90 pop r1 + 8ac: 18 95 reti + +000008ae : + + PUBLIC_FUNCTION(ccp_write_io) + +#if defined(__GNUC__) + + out RAMPZ, r1 // Reset bits 23:16 of Z + 8ae: 1b be out 0x3b, r1 ; 59 + movw r30, r24 // Load addr into Z + 8b0: fc 01 movw r30, r24 + ldi r18, CCP_IOREG // Load magic CCP value + 8b2: 28 ed ldi r18, 0xD8 ; 216 + out CCP, r18 // Start CCP handshake + 8b4: 24 bf out 0x34, r18 ; 52 + st Z, r22 // Write value to I/O register + 8b6: 60 83 st Z, r22 + ret // Return to caller + 8b8: 08 95 ret + +000008ba : +#endif + +#ifndef __DOXYGEN__ + PUBLIC_FUNCTION(nvm_read_byte) +#if defined(__GNUC__) + lds r20, NVM_CMD ; Store NVM command register + 8ba: 40 91 ca 01 lds r20, 0x01CA ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + mov ZL, r22 ; Load byte index into low byte of Z. + 8be: e6 2f mov r30, r22 + mov ZH, r23 ; Load high byte into Z. + 8c0: f7 2f mov r31, r23 + sts NVM_CMD, r24 ; Load prepared command into NVM Command register. + 8c2: 80 93 ca 01 sts 0x01CA, r24 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + lpm r24, Z ; Perform an LPM to read out byte + 8c6: 84 91 lpm r24, Z + sts NVM_CMD, r20 ; Restore NVM command register + 8c8: 40 93 ca 01 sts 0x01CA, r20 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + sts NVM_CMD, r16 ; Load prepared command into NVM Command register. + lpm r16, Z ; Perform an LPM to read out byte + sts NVM_CMD, r20 ; Restore NVM command register +#endif + + ret + 8cc: 08 95 ret + +000008ce <__vector_14>: + { + cpu_irq_restore(iflags); + return; + } + cpu_irq_restore(iflags); +} + 8ce: 1f 92 push r1 + 8d0: 0f 92 push r0 + 8d2: 0f b6 in r0, 0x3f ; 63 + 8d4: 0f 92 push r0 + 8d6: 11 24 eor r1, r1 + 8d8: 08 b6 in r0, 0x38 ; 56 + 8da: 0f 92 push r0 + 8dc: 18 be out 0x38, r1 ; 56 + 8de: 09 b6 in r0, 0x39 ; 57 + 8e0: 0f 92 push r0 + 8e2: 19 be out 0x39, r1 ; 57 + 8e4: 0b b6 in r0, 0x3b ; 59 + 8e6: 0f 92 push r0 + 8e8: 1b be out 0x3b, r1 ; 59 + 8ea: 2f 93 push r18 + 8ec: 3f 93 push r19 + 8ee: 4f 93 push r20 + 8f0: 5f 93 push r21 + 8f2: 6f 93 push r22 + 8f4: 7f 93 push r23 + 8f6: 8f 93 push r24 + 8f8: 9f 93 push r25 + 8fa: af 93 push r26 + 8fc: bf 93 push r27 + 8fe: ef 93 push r30 + 900: ff 93 push r31 + 902: e0 91 0e 22 lds r30, 0x220E ; 0x80220e + 906: f0 91 0f 22 lds r31, 0x220F ; 0x80220f + 90a: 30 97 sbiw r30, 0x00 ; 0 + 90c: 09 f0 breq .+2 ; 0x910 <__vector_14+0x42> + 90e: 19 95 eicall + 910: ff 91 pop r31 + 912: ef 91 pop r30 + 914: bf 91 pop r27 + 916: af 91 pop r26 + 918: 9f 91 pop r25 + 91a: 8f 91 pop r24 + 91c: 7f 91 pop r23 + 91e: 6f 91 pop r22 + 920: 5f 91 pop r21 + 922: 4f 91 pop r20 + 924: 3f 91 pop r19 + 926: 2f 91 pop r18 + 928: 0f 90 pop r0 + 92a: 0b be out 0x3b, r0 ; 59 + 92c: 0f 90 pop r0 + 92e: 09 be out 0x39, r0 ; 57 + 930: 0f 90 pop r0 + 932: 08 be out 0x38, r0 ; 56 + 934: 0f 90 pop r0 + 936: 0f be out 0x3f, r0 ; 63 + 938: 0f 90 pop r0 + 93a: 1f 90 pop r1 + 93c: 18 95 reti + +0000093e <__vector_15>: + 93e: 1f 92 push r1 + 940: 0f 92 push r0 + 942: 0f b6 in r0, 0x3f ; 63 + 944: 0f 92 push r0 + 946: 11 24 eor r1, r1 + 948: 08 b6 in r0, 0x38 ; 56 + 94a: 0f 92 push r0 + 94c: 18 be out 0x38, r1 ; 56 + 94e: 09 b6 in r0, 0x39 ; 57 + 950: 0f 92 push r0 + 952: 19 be out 0x39, r1 ; 57 + 954: 0b b6 in r0, 0x3b ; 59 + 956: 0f 92 push r0 + 958: 1b be out 0x3b, r1 ; 59 + 95a: 2f 93 push r18 + 95c: 3f 93 push r19 + 95e: 4f 93 push r20 + 960: 5f 93 push r21 + 962: 6f 93 push r22 + 964: 7f 93 push r23 + 966: 8f 93 push r24 + 968: 9f 93 push r25 + 96a: af 93 push r26 + 96c: bf 93 push r27 + 96e: ef 93 push r30 + 970: ff 93 push r31 + 972: e0 91 0c 22 lds r30, 0x220C ; 0x80220c + 976: f0 91 0d 22 lds r31, 0x220D ; 0x80220d + 97a: 30 97 sbiw r30, 0x00 ; 0 + 97c: 09 f0 breq .+2 ; 0x980 <__vector_15+0x42> + 97e: 19 95 eicall + 980: ff 91 pop r31 + 982: ef 91 pop r30 + 984: bf 91 pop r27 + 986: af 91 pop r26 + 988: 9f 91 pop r25 + 98a: 8f 91 pop r24 + 98c: 7f 91 pop r23 + 98e: 6f 91 pop r22 + 990: 5f 91 pop r21 + 992: 4f 91 pop r20 + 994: 3f 91 pop r19 + 996: 2f 91 pop r18 + 998: 0f 90 pop r0 + 99a: 0b be out 0x3b, r0 ; 59 + 99c: 0f 90 pop r0 + 99e: 09 be out 0x39, r0 ; 57 + 9a0: 0f 90 pop r0 + 9a2: 08 be out 0x38, r0 ; 56 + 9a4: 0f 90 pop r0 + 9a6: 0f be out 0x3f, r0 ; 63 + 9a8: 0f 90 pop r0 + 9aa: 1f 90 pop r1 + 9ac: 18 95 reti + +000009ae <__vector_17>: + 9ae: 1f 92 push r1 + 9b0: 0f 92 push r0 + 9b2: 0f b6 in r0, 0x3f ; 63 + 9b4: 0f 92 push r0 + 9b6: 11 24 eor r1, r1 + 9b8: 08 b6 in r0, 0x38 ; 56 + 9ba: 0f 92 push r0 + 9bc: 18 be out 0x38, r1 ; 56 + 9be: 09 b6 in r0, 0x39 ; 57 + 9c0: 0f 92 push r0 + 9c2: 19 be out 0x39, r1 ; 57 + 9c4: 0b b6 in r0, 0x3b ; 59 + 9c6: 0f 92 push r0 + 9c8: 1b be out 0x3b, r1 ; 59 + 9ca: 2f 93 push r18 + 9cc: 3f 93 push r19 + 9ce: 4f 93 push r20 + 9d0: 5f 93 push r21 + 9d2: 6f 93 push r22 + 9d4: 7f 93 push r23 + 9d6: 8f 93 push r24 + 9d8: 9f 93 push r25 + 9da: af 93 push r26 + 9dc: bf 93 push r27 + 9de: ef 93 push r30 + 9e0: ff 93 push r31 + 9e2: e0 91 0a 22 lds r30, 0x220A ; 0x80220a + 9e6: f0 91 0b 22 lds r31, 0x220B ; 0x80220b + 9ea: 30 97 sbiw r30, 0x00 ; 0 + 9ec: 09 f0 breq .+2 ; 0x9f0 <__vector_17+0x42> + 9ee: 19 95 eicall + 9f0: ff 91 pop r31 + 9f2: ef 91 pop r30 + 9f4: bf 91 pop r27 + 9f6: af 91 pop r26 + 9f8: 9f 91 pop r25 + 9fa: 8f 91 pop r24 + 9fc: 7f 91 pop r23 + 9fe: 6f 91 pop r22 + a00: 5f 91 pop r21 + a02: 4f 91 pop r20 + a04: 3f 91 pop r19 + a06: 2f 91 pop r18 + a08: 0f 90 pop r0 + a0a: 0b be out 0x3b, r0 ; 59 + a0c: 0f 90 pop r0 + a0e: 09 be out 0x39, r0 ; 57 + a10: 0f 90 pop r0 + a12: 08 be out 0x38, r0 ; 56 + a14: 0f 90 pop r0 + a16: 0f be out 0x3f, r0 ; 63 + a18: 0f 90 pop r0 + a1a: 1f 90 pop r1 + a1c: 18 95 reti + +00000a1e <__vector_18>: + a1e: 1f 92 push r1 + a20: 0f 92 push r0 + a22: 0f b6 in r0, 0x3f ; 63 + a24: 0f 92 push r0 + a26: 11 24 eor r1, r1 + a28: 08 b6 in r0, 0x38 ; 56 + a2a: 0f 92 push r0 + a2c: 18 be out 0x38, r1 ; 56 + a2e: 09 b6 in r0, 0x39 ; 57 + a30: 0f 92 push r0 + a32: 19 be out 0x39, r1 ; 57 + a34: 0b b6 in r0, 0x3b ; 59 + a36: 0f 92 push r0 + a38: 1b be out 0x3b, r1 ; 59 + a3a: 2f 93 push r18 + a3c: 3f 93 push r19 + a3e: 4f 93 push r20 + a40: 5f 93 push r21 + a42: 6f 93 push r22 + a44: 7f 93 push r23 + a46: 8f 93 push r24 + a48: 9f 93 push r25 + a4a: af 93 push r26 + a4c: bf 93 push r27 + a4e: ef 93 push r30 + a50: ff 93 push r31 + a52: e0 91 08 22 lds r30, 0x2208 ; 0x802208 + a56: f0 91 09 22 lds r31, 0x2209 ; 0x802209 + a5a: 30 97 sbiw r30, 0x00 ; 0 + a5c: 09 f0 breq .+2 ; 0xa60 <__vector_18+0x42> + a5e: 19 95 eicall + a60: ff 91 pop r31 + a62: ef 91 pop r30 + a64: bf 91 pop r27 + a66: af 91 pop r26 + a68: 9f 91 pop r25 + a6a: 8f 91 pop r24 + a6c: 7f 91 pop r23 + a6e: 6f 91 pop r22 + a70: 5f 91 pop r21 + a72: 4f 91 pop r20 + a74: 3f 91 pop r19 + a76: 2f 91 pop r18 + a78: 0f 90 pop r0 + a7a: 0b be out 0x3b, r0 ; 59 + a7c: 0f 90 pop r0 + a7e: 09 be out 0x39, r0 ; 57 + a80: 0f 90 pop r0 + a82: 08 be out 0x38, r0 ; 56 + a84: 0f 90 pop r0 + a86: 0f be out 0x3f, r0 ; 63 + a88: 0f 90 pop r0 + a8a: 1f 90 pop r1 + a8c: 18 95 reti + +00000a8e <__vector_19>: + a8e: 1f 92 push r1 + a90: 0f 92 push r0 + a92: 0f b6 in r0, 0x3f ; 63 + a94: 0f 92 push r0 + a96: 11 24 eor r1, r1 + a98: 08 b6 in r0, 0x38 ; 56 + a9a: 0f 92 push r0 + a9c: 18 be out 0x38, r1 ; 56 + a9e: 09 b6 in r0, 0x39 ; 57 + aa0: 0f 92 push r0 + aa2: 19 be out 0x39, r1 ; 57 + aa4: 0b b6 in r0, 0x3b ; 59 + aa6: 0f 92 push r0 + aa8: 1b be out 0x3b, r1 ; 59 + aaa: 2f 93 push r18 + aac: 3f 93 push r19 + aae: 4f 93 push r20 + ab0: 5f 93 push r21 + ab2: 6f 93 push r22 + ab4: 7f 93 push r23 + ab6: 8f 93 push r24 + ab8: 9f 93 push r25 + aba: af 93 push r26 + abc: bf 93 push r27 + abe: ef 93 push r30 + ac0: ff 93 push r31 + ac2: e0 91 06 22 lds r30, 0x2206 ; 0x802206 + ac6: f0 91 07 22 lds r31, 0x2207 ; 0x802207 + aca: 30 97 sbiw r30, 0x00 ; 0 + acc: 09 f0 breq .+2 ; 0xad0 <__vector_19+0x42> + ace: 19 95 eicall + ad0: ff 91 pop r31 + ad2: ef 91 pop r30 + ad4: bf 91 pop r27 + ad6: af 91 pop r26 + ad8: 9f 91 pop r25 + ada: 8f 91 pop r24 + adc: 7f 91 pop r23 + ade: 6f 91 pop r22 + ae0: 5f 91 pop r21 + ae2: 4f 91 pop r20 + ae4: 3f 91 pop r19 + ae6: 2f 91 pop r18 + ae8: 0f 90 pop r0 + aea: 0b be out 0x3b, r0 ; 59 + aec: 0f 90 pop r0 + aee: 09 be out 0x39, r0 ; 57 + af0: 0f 90 pop r0 + af2: 08 be out 0x38, r0 ; 56 + af4: 0f 90 pop r0 + af6: 0f be out 0x3f, r0 ; 63 + af8: 0f 90 pop r0 + afa: 1f 90 pop r1 + afc: 18 95 reti + +00000afe <__vector_20>: + afe: 1f 92 push r1 + b00: 0f 92 push r0 + b02: 0f b6 in r0, 0x3f ; 63 + b04: 0f 92 push r0 + b06: 11 24 eor r1, r1 + b08: 08 b6 in r0, 0x38 ; 56 + b0a: 0f 92 push r0 + b0c: 18 be out 0x38, r1 ; 56 + b0e: 09 b6 in r0, 0x39 ; 57 + b10: 0f 92 push r0 + b12: 19 be out 0x39, r1 ; 57 + b14: 0b b6 in r0, 0x3b ; 59 + b16: 0f 92 push r0 + b18: 1b be out 0x3b, r1 ; 59 + b1a: 2f 93 push r18 + b1c: 3f 93 push r19 + b1e: 4f 93 push r20 + b20: 5f 93 push r21 + b22: 6f 93 push r22 + b24: 7f 93 push r23 + b26: 8f 93 push r24 + b28: 9f 93 push r25 + b2a: af 93 push r26 + b2c: bf 93 push r27 + b2e: ef 93 push r30 + b30: ff 93 push r31 + b32: e0 91 04 22 lds r30, 0x2204 ; 0x802204 + b36: f0 91 05 22 lds r31, 0x2205 ; 0x802205 + b3a: 30 97 sbiw r30, 0x00 ; 0 + b3c: 09 f0 breq .+2 ; 0xb40 <__vector_20+0x42> + b3e: 19 95 eicall + b40: ff 91 pop r31 + b42: ef 91 pop r30 + b44: bf 91 pop r27 + b46: af 91 pop r26 + b48: 9f 91 pop r25 + b4a: 8f 91 pop r24 + b4c: 7f 91 pop r23 + b4e: 6f 91 pop r22 + b50: 5f 91 pop r21 + b52: 4f 91 pop r20 + b54: 3f 91 pop r19 + b56: 2f 91 pop r18 + b58: 0f 90 pop r0 + b5a: 0b be out 0x3b, r0 ; 59 + b5c: 0f 90 pop r0 + b5e: 09 be out 0x39, r0 ; 57 + b60: 0f 90 pop r0 + b62: 08 be out 0x38, r0 ; 56 + b64: 0f 90 pop r0 + b66: 0f be out 0x3f, r0 ; 63 + b68: 0f 90 pop r0 + b6a: 1f 90 pop r1 + b6c: 18 95 reti + +00000b6e <__vector_21>: + b6e: 1f 92 push r1 + b70: 0f 92 push r0 + b72: 0f b6 in r0, 0x3f ; 63 + b74: 0f 92 push r0 + b76: 11 24 eor r1, r1 + b78: 08 b6 in r0, 0x38 ; 56 + b7a: 0f 92 push r0 + b7c: 18 be out 0x38, r1 ; 56 + b7e: 09 b6 in r0, 0x39 ; 57 + b80: 0f 92 push r0 + b82: 19 be out 0x39, r1 ; 57 + b84: 0b b6 in r0, 0x3b ; 59 + b86: 0f 92 push r0 + b88: 1b be out 0x3b, r1 ; 59 + b8a: 2f 93 push r18 + b8c: 3f 93 push r19 + b8e: 4f 93 push r20 + b90: 5f 93 push r21 + b92: 6f 93 push r22 + b94: 7f 93 push r23 + b96: 8f 93 push r24 + b98: 9f 93 push r25 + b9a: af 93 push r26 + b9c: bf 93 push r27 + b9e: ef 93 push r30 + ba0: ff 93 push r31 + ba2: e0 91 02 22 lds r30, 0x2202 ; 0x802202 + ba6: f0 91 03 22 lds r31, 0x2203 ; 0x802203 + baa: 30 97 sbiw r30, 0x00 ; 0 + bac: 09 f0 breq .+2 ; 0xbb0 <__vector_21+0x42> + bae: 19 95 eicall + bb0: ff 91 pop r31 + bb2: ef 91 pop r30 + bb4: bf 91 pop r27 + bb6: af 91 pop r26 + bb8: 9f 91 pop r25 + bba: 8f 91 pop r24 + bbc: 7f 91 pop r23 + bbe: 6f 91 pop r22 + bc0: 5f 91 pop r21 + bc2: 4f 91 pop r20 + bc4: 3f 91 pop r19 + bc6: 2f 91 pop r18 + bc8: 0f 90 pop r0 + bca: 0b be out 0x3b, r0 ; 59 + bcc: 0f 90 pop r0 + bce: 09 be out 0x39, r0 ; 57 + bd0: 0f 90 pop r0 + bd2: 08 be out 0x38, r0 ; 56 + bd4: 0f 90 pop r0 + bd6: 0f be out 0x3f, r0 ; 63 + bd8: 0f 90 pop r0 + bda: 1f 90 pop r1 + bdc: 18 95 reti + +00000bde <__vector_22>: + bde: 1f 92 push r1 + be0: 0f 92 push r0 + be2: 0f b6 in r0, 0x3f ; 63 + be4: 0f 92 push r0 + be6: 11 24 eor r1, r1 + be8: 08 b6 in r0, 0x38 ; 56 + bea: 0f 92 push r0 + bec: 18 be out 0x38, r1 ; 56 + bee: 09 b6 in r0, 0x39 ; 57 + bf0: 0f 92 push r0 + bf2: 19 be out 0x39, r1 ; 57 + bf4: 0b b6 in r0, 0x3b ; 59 + bf6: 0f 92 push r0 + bf8: 1b be out 0x3b, r1 ; 59 + bfa: 2f 93 push r18 + bfc: 3f 93 push r19 + bfe: 4f 93 push r20 + c00: 5f 93 push r21 + c02: 6f 93 push r22 + c04: 7f 93 push r23 + c06: 8f 93 push r24 + c08: 9f 93 push r25 + c0a: af 93 push r26 + c0c: bf 93 push r27 + c0e: ef 93 push r30 + c10: ff 93 push r31 + c12: e0 91 00 22 lds r30, 0x2200 ; 0x802200 + c16: f0 91 01 22 lds r31, 0x2201 ; 0x802201 + c1a: 30 97 sbiw r30, 0x00 ; 0 + c1c: 09 f0 breq .+2 ; 0xc20 <__vector_22+0x42> + c1e: 19 95 eicall + c20: ff 91 pop r31 + c22: ef 91 pop r30 + c24: bf 91 pop r27 + c26: af 91 pop r26 + c28: 9f 91 pop r25 + c2a: 8f 91 pop r24 + c2c: 7f 91 pop r23 + c2e: 6f 91 pop r22 + c30: 5f 91 pop r21 + c32: 4f 91 pop r20 + c34: 3f 91 pop r19 + c36: 2f 91 pop r18 + c38: 0f 90 pop r0 + c3a: 0b be out 0x3b, r0 ; 59 + c3c: 0f 90 pop r0 + c3e: 09 be out 0x39, r0 ; 57 + c40: 0f 90 pop r0 + c42: 08 be out 0x38, r0 ; 56 + c44: 0f 90 pop r0 + c46: 0f be out 0x3f, r0 ; 63 + c48: 0f 90 pop r0 + c4a: 1f 90 pop r1 + c4c: 18 95 reti + +00000c4e <__vector_23>: + c4e: 1f 92 push r1 + c50: 0f 92 push r0 + c52: 0f b6 in r0, 0x3f ; 63 + c54: 0f 92 push r0 + c56: 11 24 eor r1, r1 + c58: 08 b6 in r0, 0x38 ; 56 + c5a: 0f 92 push r0 + c5c: 18 be out 0x38, r1 ; 56 + c5e: 09 b6 in r0, 0x39 ; 57 + c60: 0f 92 push r0 + c62: 19 be out 0x39, r1 ; 57 + c64: 0b b6 in r0, 0x3b ; 59 + c66: 0f 92 push r0 + c68: 1b be out 0x3b, r1 ; 59 + c6a: 2f 93 push r18 + c6c: 3f 93 push r19 + c6e: 4f 93 push r20 + c70: 5f 93 push r21 + c72: 6f 93 push r22 + c74: 7f 93 push r23 + c76: 8f 93 push r24 + c78: 9f 93 push r25 + c7a: af 93 push r26 + c7c: bf 93 push r27 + c7e: ef 93 push r30 + c80: ff 93 push r31 + c82: e0 91 fe 21 lds r30, 0x21FE ; 0x8021fe + c86: f0 91 ff 21 lds r31, 0x21FF ; 0x8021ff + c8a: 30 97 sbiw r30, 0x00 ; 0 + c8c: 09 f0 breq .+2 ; 0xc90 <__vector_23+0x42> + c8e: 19 95 eicall + c90: ff 91 pop r31 + c92: ef 91 pop r30 + c94: bf 91 pop r27 + c96: af 91 pop r26 + c98: 9f 91 pop r25 + c9a: 8f 91 pop r24 + c9c: 7f 91 pop r23 + c9e: 6f 91 pop r22 + ca0: 5f 91 pop r21 + ca2: 4f 91 pop r20 + ca4: 3f 91 pop r19 + ca6: 2f 91 pop r18 + ca8: 0f 90 pop r0 + caa: 0b be out 0x3b, r0 ; 59 + cac: 0f 90 pop r0 + cae: 09 be out 0x39, r0 ; 57 + cb0: 0f 90 pop r0 + cb2: 08 be out 0x38, r0 ; 56 + cb4: 0f 90 pop r0 + cb6: 0f be out 0x3f, r0 ; 63 + cb8: 0f 90 pop r0 + cba: 1f 90 pop r1 + cbc: 18 95 reti + +00000cbe <__vector_77>: + cbe: 1f 92 push r1 + cc0: 0f 92 push r0 + cc2: 0f b6 in r0, 0x3f ; 63 + cc4: 0f 92 push r0 + cc6: 11 24 eor r1, r1 + cc8: 08 b6 in r0, 0x38 ; 56 + cca: 0f 92 push r0 + ccc: 18 be out 0x38, r1 ; 56 + cce: 09 b6 in r0, 0x39 ; 57 + cd0: 0f 92 push r0 + cd2: 19 be out 0x39, r1 ; 57 + cd4: 0b b6 in r0, 0x3b ; 59 + cd6: 0f 92 push r0 + cd8: 1b be out 0x3b, r1 ; 59 + cda: 2f 93 push r18 + cdc: 3f 93 push r19 + cde: 4f 93 push r20 + ce0: 5f 93 push r21 + ce2: 6f 93 push r22 + ce4: 7f 93 push r23 + ce6: 8f 93 push r24 + ce8: 9f 93 push r25 + cea: af 93 push r26 + cec: bf 93 push r27 + cee: ef 93 push r30 + cf0: ff 93 push r31 + cf2: e0 91 fc 21 lds r30, 0x21FC ; 0x8021fc + cf6: f0 91 fd 21 lds r31, 0x21FD ; 0x8021fd + cfa: 30 97 sbiw r30, 0x00 ; 0 + cfc: 09 f0 breq .+2 ; 0xd00 <__vector_77+0x42> + cfe: 19 95 eicall + d00: ff 91 pop r31 + d02: ef 91 pop r30 + d04: bf 91 pop r27 + d06: af 91 pop r26 + d08: 9f 91 pop r25 + d0a: 8f 91 pop r24 + d0c: 7f 91 pop r23 + d0e: 6f 91 pop r22 + d10: 5f 91 pop r21 + d12: 4f 91 pop r20 + d14: 3f 91 pop r19 + d16: 2f 91 pop r18 + d18: 0f 90 pop r0 + d1a: 0b be out 0x3b, r0 ; 59 + d1c: 0f 90 pop r0 + d1e: 09 be out 0x39, r0 ; 57 + d20: 0f 90 pop r0 + d22: 08 be out 0x38, r0 ; 56 + d24: 0f 90 pop r0 + d26: 0f be out 0x3f, r0 ; 63 + d28: 0f 90 pop r0 + d2a: 1f 90 pop r1 + d2c: 18 95 reti + +00000d2e <__vector_78>: + d2e: 1f 92 push r1 + d30: 0f 92 push r0 + d32: 0f b6 in r0, 0x3f ; 63 + d34: 0f 92 push r0 + d36: 11 24 eor r1, r1 + d38: 08 b6 in r0, 0x38 ; 56 + d3a: 0f 92 push r0 + d3c: 18 be out 0x38, r1 ; 56 + d3e: 09 b6 in r0, 0x39 ; 57 + d40: 0f 92 push r0 + d42: 19 be out 0x39, r1 ; 57 + d44: 0b b6 in r0, 0x3b ; 59 + d46: 0f 92 push r0 + d48: 1b be out 0x3b, r1 ; 59 + d4a: 2f 93 push r18 + d4c: 3f 93 push r19 + d4e: 4f 93 push r20 + d50: 5f 93 push r21 + d52: 6f 93 push r22 + d54: 7f 93 push r23 + d56: 8f 93 push r24 + d58: 9f 93 push r25 + d5a: af 93 push r26 + d5c: bf 93 push r27 + d5e: ef 93 push r30 + d60: ff 93 push r31 + d62: e0 91 fa 21 lds r30, 0x21FA ; 0x8021fa + d66: f0 91 fb 21 lds r31, 0x21FB ; 0x8021fb + d6a: 30 97 sbiw r30, 0x00 ; 0 + d6c: 09 f0 breq .+2 ; 0xd70 <__vector_78+0x42> + d6e: 19 95 eicall + d70: ff 91 pop r31 + d72: ef 91 pop r30 + d74: bf 91 pop r27 + d76: af 91 pop r26 + d78: 9f 91 pop r25 + d7a: 8f 91 pop r24 + d7c: 7f 91 pop r23 + d7e: 6f 91 pop r22 + d80: 5f 91 pop r21 + d82: 4f 91 pop r20 + d84: 3f 91 pop r19 + d86: 2f 91 pop r18 + d88: 0f 90 pop r0 + d8a: 0b be out 0x3b, r0 ; 59 + d8c: 0f 90 pop r0 + d8e: 09 be out 0x39, r0 ; 57 + d90: 0f 90 pop r0 + d92: 08 be out 0x38, r0 ; 56 + d94: 0f 90 pop r0 + d96: 0f be out 0x3f, r0 ; 63 + d98: 0f 90 pop r0 + d9a: 1f 90 pop r1 + d9c: 18 95 reti + +00000d9e <__vector_79>: + d9e: 1f 92 push r1 + da0: 0f 92 push r0 + da2: 0f b6 in r0, 0x3f ; 63 + da4: 0f 92 push r0 + da6: 11 24 eor r1, r1 + da8: 08 b6 in r0, 0x38 ; 56 + daa: 0f 92 push r0 + dac: 18 be out 0x38, r1 ; 56 + dae: 09 b6 in r0, 0x39 ; 57 + db0: 0f 92 push r0 + db2: 19 be out 0x39, r1 ; 57 + db4: 0b b6 in r0, 0x3b ; 59 + db6: 0f 92 push r0 + db8: 1b be out 0x3b, r1 ; 59 + dba: 2f 93 push r18 + dbc: 3f 93 push r19 + dbe: 4f 93 push r20 + dc0: 5f 93 push r21 + dc2: 6f 93 push r22 + dc4: 7f 93 push r23 + dc6: 8f 93 push r24 + dc8: 9f 93 push r25 + dca: af 93 push r26 + dcc: bf 93 push r27 + dce: ef 93 push r30 + dd0: ff 93 push r31 + dd2: e0 91 f8 21 lds r30, 0x21F8 ; 0x8021f8 + dd6: f0 91 f9 21 lds r31, 0x21F9 ; 0x8021f9 + dda: 30 97 sbiw r30, 0x00 ; 0 + ddc: 09 f0 breq .+2 ; 0xde0 <__vector_79+0x42> + dde: 19 95 eicall + de0: ff 91 pop r31 + de2: ef 91 pop r30 + de4: bf 91 pop r27 + de6: af 91 pop r26 + de8: 9f 91 pop r25 + dea: 8f 91 pop r24 + dec: 7f 91 pop r23 + dee: 6f 91 pop r22 + df0: 5f 91 pop r21 + df2: 4f 91 pop r20 + df4: 3f 91 pop r19 + df6: 2f 91 pop r18 + df8: 0f 90 pop r0 + dfa: 0b be out 0x3b, r0 ; 59 + dfc: 0f 90 pop r0 + dfe: 09 be out 0x39, r0 ; 57 + e00: 0f 90 pop r0 + e02: 08 be out 0x38, r0 ; 56 + e04: 0f 90 pop r0 + e06: 0f be out 0x3f, r0 ; 63 + e08: 0f 90 pop r0 + e0a: 1f 90 pop r1 + e0c: 18 95 reti + +00000e0e <__vector_80>: + e0e: 1f 92 push r1 + e10: 0f 92 push r0 + e12: 0f b6 in r0, 0x3f ; 63 + e14: 0f 92 push r0 + e16: 11 24 eor r1, r1 + e18: 08 b6 in r0, 0x38 ; 56 + e1a: 0f 92 push r0 + e1c: 18 be out 0x38, r1 ; 56 + e1e: 09 b6 in r0, 0x39 ; 57 + e20: 0f 92 push r0 + e22: 19 be out 0x39, r1 ; 57 + e24: 0b b6 in r0, 0x3b ; 59 + e26: 0f 92 push r0 + e28: 1b be out 0x3b, r1 ; 59 + e2a: 2f 93 push r18 + e2c: 3f 93 push r19 + e2e: 4f 93 push r20 + e30: 5f 93 push r21 + e32: 6f 93 push r22 + e34: 7f 93 push r23 + e36: 8f 93 push r24 + e38: 9f 93 push r25 + e3a: af 93 push r26 + e3c: bf 93 push r27 + e3e: ef 93 push r30 + e40: ff 93 push r31 + e42: e0 91 f6 21 lds r30, 0x21F6 ; 0x8021f6 + e46: f0 91 f7 21 lds r31, 0x21F7 ; 0x8021f7 + e4a: 30 97 sbiw r30, 0x00 ; 0 + e4c: 09 f0 breq .+2 ; 0xe50 <__vector_80+0x42> + e4e: 19 95 eicall + e50: ff 91 pop r31 + e52: ef 91 pop r30 + e54: bf 91 pop r27 + e56: af 91 pop r26 + e58: 9f 91 pop r25 + e5a: 8f 91 pop r24 + e5c: 7f 91 pop r23 + e5e: 6f 91 pop r22 + e60: 5f 91 pop r21 + e62: 4f 91 pop r20 + e64: 3f 91 pop r19 + e66: 2f 91 pop r18 + e68: 0f 90 pop r0 + e6a: 0b be out 0x3b, r0 ; 59 + e6c: 0f 90 pop r0 + e6e: 09 be out 0x39, r0 ; 57 + e70: 0f 90 pop r0 + e72: 08 be out 0x38, r0 ; 56 + e74: 0f 90 pop r0 + e76: 0f be out 0x3f, r0 ; 63 + e78: 0f 90 pop r0 + e7a: 1f 90 pop r1 + e7c: 18 95 reti + +00000e7e <__vector_81>: + e7e: 1f 92 push r1 + e80: 0f 92 push r0 + e82: 0f b6 in r0, 0x3f ; 63 + e84: 0f 92 push r0 + e86: 11 24 eor r1, r1 + e88: 08 b6 in r0, 0x38 ; 56 + e8a: 0f 92 push r0 + e8c: 18 be out 0x38, r1 ; 56 + e8e: 09 b6 in r0, 0x39 ; 57 + e90: 0f 92 push r0 + e92: 19 be out 0x39, r1 ; 57 + e94: 0b b6 in r0, 0x3b ; 59 + e96: 0f 92 push r0 + e98: 1b be out 0x3b, r1 ; 59 + e9a: 2f 93 push r18 + e9c: 3f 93 push r19 + e9e: 4f 93 push r20 + ea0: 5f 93 push r21 + ea2: 6f 93 push r22 + ea4: 7f 93 push r23 + ea6: 8f 93 push r24 + ea8: 9f 93 push r25 + eaa: af 93 push r26 + eac: bf 93 push r27 + eae: ef 93 push r30 + eb0: ff 93 push r31 + eb2: e0 91 f4 21 lds r30, 0x21F4 ; 0x8021f4 + eb6: f0 91 f5 21 lds r31, 0x21F5 ; 0x8021f5 + eba: 30 97 sbiw r30, 0x00 ; 0 + ebc: 09 f0 breq .+2 ; 0xec0 <__vector_81+0x42> + ebe: 19 95 eicall + ec0: ff 91 pop r31 + ec2: ef 91 pop r30 + ec4: bf 91 pop r27 + ec6: af 91 pop r26 + ec8: 9f 91 pop r25 + eca: 8f 91 pop r24 + ecc: 7f 91 pop r23 + ece: 6f 91 pop r22 + ed0: 5f 91 pop r21 + ed2: 4f 91 pop r20 + ed4: 3f 91 pop r19 + ed6: 2f 91 pop r18 + ed8: 0f 90 pop r0 + eda: 0b be out 0x3b, r0 ; 59 + edc: 0f 90 pop r0 + ede: 09 be out 0x39, r0 ; 57 + ee0: 0f 90 pop r0 + ee2: 08 be out 0x38, r0 ; 56 + ee4: 0f 90 pop r0 + ee6: 0f be out 0x3f, r0 ; 63 + ee8: 0f 90 pop r0 + eea: 1f 90 pop r1 + eec: 18 95 reti + +00000eee <__vector_82>: + eee: 1f 92 push r1 + ef0: 0f 92 push r0 + ef2: 0f b6 in r0, 0x3f ; 63 + ef4: 0f 92 push r0 + ef6: 11 24 eor r1, r1 + ef8: 08 b6 in r0, 0x38 ; 56 + efa: 0f 92 push r0 + efc: 18 be out 0x38, r1 ; 56 + efe: 09 b6 in r0, 0x39 ; 57 + f00: 0f 92 push r0 + f02: 19 be out 0x39, r1 ; 57 + f04: 0b b6 in r0, 0x3b ; 59 + f06: 0f 92 push r0 + f08: 1b be out 0x3b, r1 ; 59 + f0a: 2f 93 push r18 + f0c: 3f 93 push r19 + f0e: 4f 93 push r20 + f10: 5f 93 push r21 + f12: 6f 93 push r22 + f14: 7f 93 push r23 + f16: 8f 93 push r24 + f18: 9f 93 push r25 + f1a: af 93 push r26 + f1c: bf 93 push r27 + f1e: ef 93 push r30 + f20: ff 93 push r31 + f22: e0 91 f2 21 lds r30, 0x21F2 ; 0x8021f2 + f26: f0 91 f3 21 lds r31, 0x21F3 ; 0x8021f3 + f2a: 30 97 sbiw r30, 0x00 ; 0 + f2c: 09 f0 breq .+2 ; 0xf30 <__vector_82+0x42> + f2e: 19 95 eicall + f30: ff 91 pop r31 + f32: ef 91 pop r30 + f34: bf 91 pop r27 + f36: af 91 pop r26 + f38: 9f 91 pop r25 + f3a: 8f 91 pop r24 + f3c: 7f 91 pop r23 + f3e: 6f 91 pop r22 + f40: 5f 91 pop r21 + f42: 4f 91 pop r20 + f44: 3f 91 pop r19 + f46: 2f 91 pop r18 + f48: 0f 90 pop r0 + f4a: 0b be out 0x3b, r0 ; 59 + f4c: 0f 90 pop r0 + f4e: 09 be out 0x39, r0 ; 57 + f50: 0f 90 pop r0 + f52: 08 be out 0x38, r0 ; 56 + f54: 0f 90 pop r0 + f56: 0f be out 0x3f, r0 ; 63 + f58: 0f 90 pop r0 + f5a: 1f 90 pop r1 + f5c: 18 95 reti + +00000f5e <__vector_83>: + f5e: 1f 92 push r1 + f60: 0f 92 push r0 + f62: 0f b6 in r0, 0x3f ; 63 + f64: 0f 92 push r0 + f66: 11 24 eor r1, r1 + f68: 08 b6 in r0, 0x38 ; 56 + f6a: 0f 92 push r0 + f6c: 18 be out 0x38, r1 ; 56 + f6e: 09 b6 in r0, 0x39 ; 57 + f70: 0f 92 push r0 + f72: 19 be out 0x39, r1 ; 57 + f74: 0b b6 in r0, 0x3b ; 59 + f76: 0f 92 push r0 + f78: 1b be out 0x3b, r1 ; 59 + f7a: 2f 93 push r18 + f7c: 3f 93 push r19 + f7e: 4f 93 push r20 + f80: 5f 93 push r21 + f82: 6f 93 push r22 + f84: 7f 93 push r23 + f86: 8f 93 push r24 + f88: 9f 93 push r25 + f8a: af 93 push r26 + f8c: bf 93 push r27 + f8e: ef 93 push r30 + f90: ff 93 push r31 + f92: e0 91 f0 21 lds r30, 0x21F0 ; 0x8021f0 + f96: f0 91 f1 21 lds r31, 0x21F1 ; 0x8021f1 + f9a: 30 97 sbiw r30, 0x00 ; 0 + f9c: 09 f0 breq .+2 ; 0xfa0 <__vector_83+0x42> + f9e: 19 95 eicall + fa0: ff 91 pop r31 + fa2: ef 91 pop r30 + fa4: bf 91 pop r27 + fa6: af 91 pop r26 + fa8: 9f 91 pop r25 + faa: 8f 91 pop r24 + fac: 7f 91 pop r23 + fae: 6f 91 pop r22 + fb0: 5f 91 pop r21 + fb2: 4f 91 pop r20 + fb4: 3f 91 pop r19 + fb6: 2f 91 pop r18 + fb8: 0f 90 pop r0 + fba: 0b be out 0x3b, r0 ; 59 + fbc: 0f 90 pop r0 + fbe: 09 be out 0x39, r0 ; 57 + fc0: 0f 90 pop r0 + fc2: 08 be out 0x38, r0 ; 56 + fc4: 0f 90 pop r0 + fc6: 0f be out 0x3f, r0 ; 63 + fc8: 0f 90 pop r0 + fca: 1f 90 pop r1 + fcc: 18 95 reti + +00000fce <__vector_84>: + fce: 1f 92 push r1 + fd0: 0f 92 push r0 + fd2: 0f b6 in r0, 0x3f ; 63 + fd4: 0f 92 push r0 + fd6: 11 24 eor r1, r1 + fd8: 08 b6 in r0, 0x38 ; 56 + fda: 0f 92 push r0 + fdc: 18 be out 0x38, r1 ; 56 + fde: 09 b6 in r0, 0x39 ; 57 + fe0: 0f 92 push r0 + fe2: 19 be out 0x39, r1 ; 57 + fe4: 0b b6 in r0, 0x3b ; 59 + fe6: 0f 92 push r0 + fe8: 1b be out 0x3b, r1 ; 59 + fea: 2f 93 push r18 + fec: 3f 93 push r19 + fee: 4f 93 push r20 + ff0: 5f 93 push r21 + ff2: 6f 93 push r22 + ff4: 7f 93 push r23 + ff6: 8f 93 push r24 + ff8: 9f 93 push r25 + ffa: af 93 push r26 + ffc: bf 93 push r27 + ffe: ef 93 push r30 + 1000: ff 93 push r31 + 1002: e0 91 ee 21 lds r30, 0x21EE ; 0x8021ee + 1006: f0 91 ef 21 lds r31, 0x21EF ; 0x8021ef + 100a: 30 97 sbiw r30, 0x00 ; 0 + 100c: 09 f0 breq .+2 ; 0x1010 <__vector_84+0x42> + 100e: 19 95 eicall + 1010: ff 91 pop r31 + 1012: ef 91 pop r30 + 1014: bf 91 pop r27 + 1016: af 91 pop r26 + 1018: 9f 91 pop r25 + 101a: 8f 91 pop r24 + 101c: 7f 91 pop r23 + 101e: 6f 91 pop r22 + 1020: 5f 91 pop r21 + 1022: 4f 91 pop r20 + 1024: 3f 91 pop r19 + 1026: 2f 91 pop r18 + 1028: 0f 90 pop r0 + 102a: 0b be out 0x3b, r0 ; 59 + 102c: 0f 90 pop r0 + 102e: 09 be out 0x39, r0 ; 57 + 1030: 0f 90 pop r0 + 1032: 08 be out 0x38, r0 ; 56 + 1034: 0f 90 pop r0 + 1036: 0f be out 0x3f, r0 ; 63 + 1038: 0f 90 pop r0 + 103a: 1f 90 pop r1 + 103c: 18 95 reti + +0000103e <__vector_85>: + 103e: 1f 92 push r1 + 1040: 0f 92 push r0 + 1042: 0f b6 in r0, 0x3f ; 63 + 1044: 0f 92 push r0 + 1046: 11 24 eor r1, r1 + 1048: 08 b6 in r0, 0x38 ; 56 + 104a: 0f 92 push r0 + 104c: 18 be out 0x38, r1 ; 56 + 104e: 09 b6 in r0, 0x39 ; 57 + 1050: 0f 92 push r0 + 1052: 19 be out 0x39, r1 ; 57 + 1054: 0b b6 in r0, 0x3b ; 59 + 1056: 0f 92 push r0 + 1058: 1b be out 0x3b, r1 ; 59 + 105a: 2f 93 push r18 + 105c: 3f 93 push r19 + 105e: 4f 93 push r20 + 1060: 5f 93 push r21 + 1062: 6f 93 push r22 + 1064: 7f 93 push r23 + 1066: 8f 93 push r24 + 1068: 9f 93 push r25 + 106a: af 93 push r26 + 106c: bf 93 push r27 + 106e: ef 93 push r30 + 1070: ff 93 push r31 + 1072: e0 91 ec 21 lds r30, 0x21EC ; 0x8021ec + 1076: f0 91 ed 21 lds r31, 0x21ED ; 0x8021ed + 107a: 30 97 sbiw r30, 0x00 ; 0 + 107c: 09 f0 breq .+2 ; 0x1080 <__vector_85+0x42> + 107e: 19 95 eicall + 1080: ff 91 pop r31 + 1082: ef 91 pop r30 + 1084: bf 91 pop r27 + 1086: af 91 pop r26 + 1088: 9f 91 pop r25 + 108a: 8f 91 pop r24 + 108c: 7f 91 pop r23 + 108e: 6f 91 pop r22 + 1090: 5f 91 pop r21 + 1092: 4f 91 pop r20 + 1094: 3f 91 pop r19 + 1096: 2f 91 pop r18 + 1098: 0f 90 pop r0 + 109a: 0b be out 0x3b, r0 ; 59 + 109c: 0f 90 pop r0 + 109e: 09 be out 0x39, r0 ; 57 + 10a0: 0f 90 pop r0 + 10a2: 08 be out 0x38, r0 ; 56 + 10a4: 0f 90 pop r0 + 10a6: 0f be out 0x3f, r0 ; 63 + 10a8: 0f 90 pop r0 + 10aa: 1f 90 pop r1 + 10ac: 18 95 reti + +000010ae <__vector_86>: + 10ae: 1f 92 push r1 + 10b0: 0f 92 push r0 + 10b2: 0f b6 in r0, 0x3f ; 63 + 10b4: 0f 92 push r0 + 10b6: 11 24 eor r1, r1 + 10b8: 08 b6 in r0, 0x38 ; 56 + 10ba: 0f 92 push r0 + 10bc: 18 be out 0x38, r1 ; 56 + 10be: 09 b6 in r0, 0x39 ; 57 + 10c0: 0f 92 push r0 + 10c2: 19 be out 0x39, r1 ; 57 + 10c4: 0b b6 in r0, 0x3b ; 59 + 10c6: 0f 92 push r0 + 10c8: 1b be out 0x3b, r1 ; 59 + 10ca: 2f 93 push r18 + 10cc: 3f 93 push r19 + 10ce: 4f 93 push r20 + 10d0: 5f 93 push r21 + 10d2: 6f 93 push r22 + 10d4: 7f 93 push r23 + 10d6: 8f 93 push r24 + 10d8: 9f 93 push r25 + 10da: af 93 push r26 + 10dc: bf 93 push r27 + 10de: ef 93 push r30 + 10e0: ff 93 push r31 + 10e2: e0 91 ea 21 lds r30, 0x21EA ; 0x8021ea + 10e6: f0 91 eb 21 lds r31, 0x21EB ; 0x8021eb + 10ea: 30 97 sbiw r30, 0x00 ; 0 + 10ec: 09 f0 breq .+2 ; 0x10f0 <__vector_86+0x42> + 10ee: 19 95 eicall + 10f0: ff 91 pop r31 + 10f2: ef 91 pop r30 + 10f4: bf 91 pop r27 + 10f6: af 91 pop r26 + 10f8: 9f 91 pop r25 + 10fa: 8f 91 pop r24 + 10fc: 7f 91 pop r23 + 10fe: 6f 91 pop r22 + 1100: 5f 91 pop r21 + 1102: 4f 91 pop r20 + 1104: 3f 91 pop r19 + 1106: 2f 91 pop r18 + 1108: 0f 90 pop r0 + 110a: 0b be out 0x3b, r0 ; 59 + 110c: 0f 90 pop r0 + 110e: 09 be out 0x39, r0 ; 57 + 1110: 0f 90 pop r0 + 1112: 08 be out 0x38, r0 ; 56 + 1114: 0f 90 pop r0 + 1116: 0f be out 0x3f, r0 ; 63 + 1118: 0f 90 pop r0 + 111a: 1f 90 pop r1 + 111c: 18 95 reti + +0000111e <__vector_47>: + 111e: 1f 92 push r1 + 1120: 0f 92 push r0 + 1122: 0f b6 in r0, 0x3f ; 63 + 1124: 0f 92 push r0 + 1126: 11 24 eor r1, r1 + 1128: 08 b6 in r0, 0x38 ; 56 + 112a: 0f 92 push r0 + 112c: 18 be out 0x38, r1 ; 56 + 112e: 09 b6 in r0, 0x39 ; 57 + 1130: 0f 92 push r0 + 1132: 19 be out 0x39, r1 ; 57 + 1134: 0b b6 in r0, 0x3b ; 59 + 1136: 0f 92 push r0 + 1138: 1b be out 0x3b, r1 ; 59 + 113a: 2f 93 push r18 + 113c: 3f 93 push r19 + 113e: 4f 93 push r20 + 1140: 5f 93 push r21 + 1142: 6f 93 push r22 + 1144: 7f 93 push r23 + 1146: 8f 93 push r24 + 1148: 9f 93 push r25 + 114a: af 93 push r26 + 114c: bf 93 push r27 + 114e: ef 93 push r30 + 1150: ff 93 push r31 + 1152: e0 91 e8 21 lds r30, 0x21E8 ; 0x8021e8 + 1156: f0 91 e9 21 lds r31, 0x21E9 ; 0x8021e9 + 115a: 30 97 sbiw r30, 0x00 ; 0 + 115c: 09 f0 breq .+2 ; 0x1160 <__vector_47+0x42> + 115e: 19 95 eicall + 1160: ff 91 pop r31 + 1162: ef 91 pop r30 + 1164: bf 91 pop r27 + 1166: af 91 pop r26 + 1168: 9f 91 pop r25 + 116a: 8f 91 pop r24 + 116c: 7f 91 pop r23 + 116e: 6f 91 pop r22 + 1170: 5f 91 pop r21 + 1172: 4f 91 pop r20 + 1174: 3f 91 pop r19 + 1176: 2f 91 pop r18 + 1178: 0f 90 pop r0 + 117a: 0b be out 0x3b, r0 ; 59 + 117c: 0f 90 pop r0 + 117e: 09 be out 0x39, r0 ; 57 + 1180: 0f 90 pop r0 + 1182: 08 be out 0x38, r0 ; 56 + 1184: 0f 90 pop r0 + 1186: 0f be out 0x3f, r0 ; 63 + 1188: 0f 90 pop r0 + 118a: 1f 90 pop r1 + 118c: 18 95 reti + +0000118e <__vector_48>: + 118e: 1f 92 push r1 + 1190: 0f 92 push r0 + 1192: 0f b6 in r0, 0x3f ; 63 + 1194: 0f 92 push r0 + 1196: 11 24 eor r1, r1 + 1198: 08 b6 in r0, 0x38 ; 56 + 119a: 0f 92 push r0 + 119c: 18 be out 0x38, r1 ; 56 + 119e: 09 b6 in r0, 0x39 ; 57 + 11a0: 0f 92 push r0 + 11a2: 19 be out 0x39, r1 ; 57 + 11a4: 0b b6 in r0, 0x3b ; 59 + 11a6: 0f 92 push r0 + 11a8: 1b be out 0x3b, r1 ; 59 + 11aa: 2f 93 push r18 + 11ac: 3f 93 push r19 + 11ae: 4f 93 push r20 + 11b0: 5f 93 push r21 + 11b2: 6f 93 push r22 + 11b4: 7f 93 push r23 + 11b6: 8f 93 push r24 + 11b8: 9f 93 push r25 + 11ba: af 93 push r26 + 11bc: bf 93 push r27 + 11be: ef 93 push r30 + 11c0: ff 93 push r31 + 11c2: e0 91 e6 21 lds r30, 0x21E6 ; 0x8021e6 + 11c6: f0 91 e7 21 lds r31, 0x21E7 ; 0x8021e7 + 11ca: 30 97 sbiw r30, 0x00 ; 0 + 11cc: 09 f0 breq .+2 ; 0x11d0 <__vector_48+0x42> + 11ce: 19 95 eicall + 11d0: ff 91 pop r31 + 11d2: ef 91 pop r30 + 11d4: bf 91 pop r27 + 11d6: af 91 pop r26 + 11d8: 9f 91 pop r25 + 11da: 8f 91 pop r24 + 11dc: 7f 91 pop r23 + 11de: 6f 91 pop r22 + 11e0: 5f 91 pop r21 + 11e2: 4f 91 pop r20 + 11e4: 3f 91 pop r19 + 11e6: 2f 91 pop r18 + 11e8: 0f 90 pop r0 + 11ea: 0b be out 0x3b, r0 ; 59 + 11ec: 0f 90 pop r0 + 11ee: 09 be out 0x39, r0 ; 57 + 11f0: 0f 90 pop r0 + 11f2: 08 be out 0x38, r0 ; 56 + 11f4: 0f 90 pop r0 + 11f6: 0f be out 0x3f, r0 ; 63 + 11f8: 0f 90 pop r0 + 11fa: 1f 90 pop r1 + 11fc: 18 95 reti + +000011fe <__vector_49>: + 11fe: 1f 92 push r1 + 1200: 0f 92 push r0 + 1202: 0f b6 in r0, 0x3f ; 63 + 1204: 0f 92 push r0 + 1206: 11 24 eor r1, r1 + 1208: 08 b6 in r0, 0x38 ; 56 + 120a: 0f 92 push r0 + 120c: 18 be out 0x38, r1 ; 56 + 120e: 09 b6 in r0, 0x39 ; 57 + 1210: 0f 92 push r0 + 1212: 19 be out 0x39, r1 ; 57 + 1214: 0b b6 in r0, 0x3b ; 59 + 1216: 0f 92 push r0 + 1218: 1b be out 0x3b, r1 ; 59 + 121a: 2f 93 push r18 + 121c: 3f 93 push r19 + 121e: 4f 93 push r20 + 1220: 5f 93 push r21 + 1222: 6f 93 push r22 + 1224: 7f 93 push r23 + 1226: 8f 93 push r24 + 1228: 9f 93 push r25 + 122a: af 93 push r26 + 122c: bf 93 push r27 + 122e: ef 93 push r30 + 1230: ff 93 push r31 + 1232: e0 91 e4 21 lds r30, 0x21E4 ; 0x8021e4 + 1236: f0 91 e5 21 lds r31, 0x21E5 ; 0x8021e5 + 123a: 30 97 sbiw r30, 0x00 ; 0 + 123c: 09 f0 breq .+2 ; 0x1240 <__vector_49+0x42> + 123e: 19 95 eicall + 1240: ff 91 pop r31 + 1242: ef 91 pop r30 + 1244: bf 91 pop r27 + 1246: af 91 pop r26 + 1248: 9f 91 pop r25 + 124a: 8f 91 pop r24 + 124c: 7f 91 pop r23 + 124e: 6f 91 pop r22 + 1250: 5f 91 pop r21 + 1252: 4f 91 pop r20 + 1254: 3f 91 pop r19 + 1256: 2f 91 pop r18 + 1258: 0f 90 pop r0 + 125a: 0b be out 0x3b, r0 ; 59 + 125c: 0f 90 pop r0 + 125e: 09 be out 0x39, r0 ; 57 + 1260: 0f 90 pop r0 + 1262: 08 be out 0x38, r0 ; 56 + 1264: 0f 90 pop r0 + 1266: 0f be out 0x3f, r0 ; 63 + 1268: 0f 90 pop r0 + 126a: 1f 90 pop r1 + 126c: 18 95 reti + +0000126e <__vector_50>: + 126e: 1f 92 push r1 + 1270: 0f 92 push r0 + 1272: 0f b6 in r0, 0x3f ; 63 + 1274: 0f 92 push r0 + 1276: 11 24 eor r1, r1 + 1278: 08 b6 in r0, 0x38 ; 56 + 127a: 0f 92 push r0 + 127c: 18 be out 0x38, r1 ; 56 + 127e: 09 b6 in r0, 0x39 ; 57 + 1280: 0f 92 push r0 + 1282: 19 be out 0x39, r1 ; 57 + 1284: 0b b6 in r0, 0x3b ; 59 + 1286: 0f 92 push r0 + 1288: 1b be out 0x3b, r1 ; 59 + 128a: 2f 93 push r18 + 128c: 3f 93 push r19 + 128e: 4f 93 push r20 + 1290: 5f 93 push r21 + 1292: 6f 93 push r22 + 1294: 7f 93 push r23 + 1296: 8f 93 push r24 + 1298: 9f 93 push r25 + 129a: af 93 push r26 + 129c: bf 93 push r27 + 129e: ef 93 push r30 + 12a0: ff 93 push r31 + 12a2: e0 91 e2 21 lds r30, 0x21E2 ; 0x8021e2 + 12a6: f0 91 e3 21 lds r31, 0x21E3 ; 0x8021e3 + 12aa: 30 97 sbiw r30, 0x00 ; 0 + 12ac: 09 f0 breq .+2 ; 0x12b0 <__vector_50+0x42> + 12ae: 19 95 eicall + 12b0: ff 91 pop r31 + 12b2: ef 91 pop r30 + 12b4: bf 91 pop r27 + 12b6: af 91 pop r26 + 12b8: 9f 91 pop r25 + 12ba: 8f 91 pop r24 + 12bc: 7f 91 pop r23 + 12be: 6f 91 pop r22 + 12c0: 5f 91 pop r21 + 12c2: 4f 91 pop r20 + 12c4: 3f 91 pop r19 + 12c6: 2f 91 pop r18 + 12c8: 0f 90 pop r0 + 12ca: 0b be out 0x3b, r0 ; 59 + 12cc: 0f 90 pop r0 + 12ce: 09 be out 0x39, r0 ; 57 + 12d0: 0f 90 pop r0 + 12d2: 08 be out 0x38, r0 ; 56 + 12d4: 0f 90 pop r0 + 12d6: 0f be out 0x3f, r0 ; 63 + 12d8: 0f 90 pop r0 + 12da: 1f 90 pop r1 + 12dc: 18 95 reti + +000012de <__vector_51>: + 12de: 1f 92 push r1 + 12e0: 0f 92 push r0 + 12e2: 0f b6 in r0, 0x3f ; 63 + 12e4: 0f 92 push r0 + 12e6: 11 24 eor r1, r1 + 12e8: 08 b6 in r0, 0x38 ; 56 + 12ea: 0f 92 push r0 + 12ec: 18 be out 0x38, r1 ; 56 + 12ee: 09 b6 in r0, 0x39 ; 57 + 12f0: 0f 92 push r0 + 12f2: 19 be out 0x39, r1 ; 57 + 12f4: 0b b6 in r0, 0x3b ; 59 + 12f6: 0f 92 push r0 + 12f8: 1b be out 0x3b, r1 ; 59 + 12fa: 2f 93 push r18 + 12fc: 3f 93 push r19 + 12fe: 4f 93 push r20 + 1300: 5f 93 push r21 + 1302: 6f 93 push r22 + 1304: 7f 93 push r23 + 1306: 8f 93 push r24 + 1308: 9f 93 push r25 + 130a: af 93 push r26 + 130c: bf 93 push r27 + 130e: ef 93 push r30 + 1310: ff 93 push r31 + 1312: e0 91 e0 21 lds r30, 0x21E0 ; 0x8021e0 + 1316: f0 91 e1 21 lds r31, 0x21E1 ; 0x8021e1 + 131a: 30 97 sbiw r30, 0x00 ; 0 + 131c: 09 f0 breq .+2 ; 0x1320 <__vector_51+0x42> + 131e: 19 95 eicall + 1320: ff 91 pop r31 + 1322: ef 91 pop r30 + 1324: bf 91 pop r27 + 1326: af 91 pop r26 + 1328: 9f 91 pop r25 + 132a: 8f 91 pop r24 + 132c: 7f 91 pop r23 + 132e: 6f 91 pop r22 + 1330: 5f 91 pop r21 + 1332: 4f 91 pop r20 + 1334: 3f 91 pop r19 + 1336: 2f 91 pop r18 + 1338: 0f 90 pop r0 + 133a: 0b be out 0x3b, r0 ; 59 + 133c: 0f 90 pop r0 + 133e: 09 be out 0x39, r0 ; 57 + 1340: 0f 90 pop r0 + 1342: 08 be out 0x38, r0 ; 56 + 1344: 0f 90 pop r0 + 1346: 0f be out 0x3f, r0 ; 63 + 1348: 0f 90 pop r0 + 134a: 1f 90 pop r1 + 134c: 18 95 reti + +0000134e <__vector_52>: + 134e: 1f 92 push r1 + 1350: 0f 92 push r0 + 1352: 0f b6 in r0, 0x3f ; 63 + 1354: 0f 92 push r0 + 1356: 11 24 eor r1, r1 + 1358: 08 b6 in r0, 0x38 ; 56 + 135a: 0f 92 push r0 + 135c: 18 be out 0x38, r1 ; 56 + 135e: 09 b6 in r0, 0x39 ; 57 + 1360: 0f 92 push r0 + 1362: 19 be out 0x39, r1 ; 57 + 1364: 0b b6 in r0, 0x3b ; 59 + 1366: 0f 92 push r0 + 1368: 1b be out 0x3b, r1 ; 59 + 136a: 2f 93 push r18 + 136c: 3f 93 push r19 + 136e: 4f 93 push r20 + 1370: 5f 93 push r21 + 1372: 6f 93 push r22 + 1374: 7f 93 push r23 + 1376: 8f 93 push r24 + 1378: 9f 93 push r25 + 137a: af 93 push r26 + 137c: bf 93 push r27 + 137e: ef 93 push r30 + 1380: ff 93 push r31 + 1382: e0 91 de 21 lds r30, 0x21DE ; 0x8021de + 1386: f0 91 df 21 lds r31, 0x21DF ; 0x8021df + 138a: 30 97 sbiw r30, 0x00 ; 0 + 138c: 09 f0 breq .+2 ; 0x1390 <__vector_52+0x42> + 138e: 19 95 eicall + 1390: ff 91 pop r31 + 1392: ef 91 pop r30 + 1394: bf 91 pop r27 + 1396: af 91 pop r26 + 1398: 9f 91 pop r25 + 139a: 8f 91 pop r24 + 139c: 7f 91 pop r23 + 139e: 6f 91 pop r22 + 13a0: 5f 91 pop r21 + 13a2: 4f 91 pop r20 + 13a4: 3f 91 pop r19 + 13a6: 2f 91 pop r18 + 13a8: 0f 90 pop r0 + 13aa: 0b be out 0x3b, r0 ; 59 + 13ac: 0f 90 pop r0 + 13ae: 09 be out 0x39, r0 ; 57 + 13b0: 0f 90 pop r0 + 13b2: 08 be out 0x38, r0 ; 56 + 13b4: 0f 90 pop r0 + 13b6: 0f be out 0x3f, r0 ; 63 + 13b8: 0f 90 pop r0 + 13ba: 1f 90 pop r1 + 13bc: 18 95 reti + +000013be <__vector_53>: + 13be: 1f 92 push r1 + 13c0: 0f 92 push r0 + 13c2: 0f b6 in r0, 0x3f ; 63 + 13c4: 0f 92 push r0 + 13c6: 11 24 eor r1, r1 + 13c8: 08 b6 in r0, 0x38 ; 56 + 13ca: 0f 92 push r0 + 13cc: 18 be out 0x38, r1 ; 56 + 13ce: 09 b6 in r0, 0x39 ; 57 + 13d0: 0f 92 push r0 + 13d2: 19 be out 0x39, r1 ; 57 + 13d4: 0b b6 in r0, 0x3b ; 59 + 13d6: 0f 92 push r0 + 13d8: 1b be out 0x3b, r1 ; 59 + 13da: 2f 93 push r18 + 13dc: 3f 93 push r19 + 13de: 4f 93 push r20 + 13e0: 5f 93 push r21 + 13e2: 6f 93 push r22 + 13e4: 7f 93 push r23 + 13e6: 8f 93 push r24 + 13e8: 9f 93 push r25 + 13ea: af 93 push r26 + 13ec: bf 93 push r27 + 13ee: ef 93 push r30 + 13f0: ff 93 push r31 + 13f2: e0 91 dc 21 lds r30, 0x21DC ; 0x8021dc + 13f6: f0 91 dd 21 lds r31, 0x21DD ; 0x8021dd + 13fa: 30 97 sbiw r30, 0x00 ; 0 + 13fc: 09 f0 breq .+2 ; 0x1400 <__vector_53+0x42> + 13fe: 19 95 eicall + 1400: ff 91 pop r31 + 1402: ef 91 pop r30 + 1404: bf 91 pop r27 + 1406: af 91 pop r26 + 1408: 9f 91 pop r25 + 140a: 8f 91 pop r24 + 140c: 7f 91 pop r23 + 140e: 6f 91 pop r22 + 1410: 5f 91 pop r21 + 1412: 4f 91 pop r20 + 1414: 3f 91 pop r19 + 1416: 2f 91 pop r18 + 1418: 0f 90 pop r0 + 141a: 0b be out 0x3b, r0 ; 59 + 141c: 0f 90 pop r0 + 141e: 09 be out 0x39, r0 ; 57 + 1420: 0f 90 pop r0 + 1422: 08 be out 0x38, r0 ; 56 + 1424: 0f 90 pop r0 + 1426: 0f be out 0x3f, r0 ; 63 + 1428: 0f 90 pop r0 + 142a: 1f 90 pop r1 + 142c: 18 95 reti + +0000142e <__vector_54>: + 142e: 1f 92 push r1 + 1430: 0f 92 push r0 + 1432: 0f b6 in r0, 0x3f ; 63 + 1434: 0f 92 push r0 + 1436: 11 24 eor r1, r1 + 1438: 08 b6 in r0, 0x38 ; 56 + 143a: 0f 92 push r0 + 143c: 18 be out 0x38, r1 ; 56 + 143e: 09 b6 in r0, 0x39 ; 57 + 1440: 0f 92 push r0 + 1442: 19 be out 0x39, r1 ; 57 + 1444: 0b b6 in r0, 0x3b ; 59 + 1446: 0f 92 push r0 + 1448: 1b be out 0x3b, r1 ; 59 + 144a: 2f 93 push r18 + 144c: 3f 93 push r19 + 144e: 4f 93 push r20 + 1450: 5f 93 push r21 + 1452: 6f 93 push r22 + 1454: 7f 93 push r23 + 1456: 8f 93 push r24 + 1458: 9f 93 push r25 + 145a: af 93 push r26 + 145c: bf 93 push r27 + 145e: ef 93 push r30 + 1460: ff 93 push r31 + 1462: e0 91 da 21 lds r30, 0x21DA ; 0x8021da + 1466: f0 91 db 21 lds r31, 0x21DB ; 0x8021db + 146a: 30 97 sbiw r30, 0x00 ; 0 + 146c: 09 f0 breq .+2 ; 0x1470 <__vector_54+0x42> + 146e: 19 95 eicall + 1470: ff 91 pop r31 + 1472: ef 91 pop r30 + 1474: bf 91 pop r27 + 1476: af 91 pop r26 + 1478: 9f 91 pop r25 + 147a: 8f 91 pop r24 + 147c: 7f 91 pop r23 + 147e: 6f 91 pop r22 + 1480: 5f 91 pop r21 + 1482: 4f 91 pop r20 + 1484: 3f 91 pop r19 + 1486: 2f 91 pop r18 + 1488: 0f 90 pop r0 + 148a: 0b be out 0x3b, r0 ; 59 + 148c: 0f 90 pop r0 + 148e: 09 be out 0x39, r0 ; 57 + 1490: 0f 90 pop r0 + 1492: 08 be out 0x38, r0 ; 56 + 1494: 0f 90 pop r0 + 1496: 0f be out 0x3f, r0 ; 63 + 1498: 0f 90 pop r0 + 149a: 1f 90 pop r1 + 149c: 18 95 reti + +0000149e <__vector_55>: + 149e: 1f 92 push r1 + 14a0: 0f 92 push r0 + 14a2: 0f b6 in r0, 0x3f ; 63 + 14a4: 0f 92 push r0 + 14a6: 11 24 eor r1, r1 + 14a8: 08 b6 in r0, 0x38 ; 56 + 14aa: 0f 92 push r0 + 14ac: 18 be out 0x38, r1 ; 56 + 14ae: 09 b6 in r0, 0x39 ; 57 + 14b0: 0f 92 push r0 + 14b2: 19 be out 0x39, r1 ; 57 + 14b4: 0b b6 in r0, 0x3b ; 59 + 14b6: 0f 92 push r0 + 14b8: 1b be out 0x3b, r1 ; 59 + 14ba: 2f 93 push r18 + 14bc: 3f 93 push r19 + 14be: 4f 93 push r20 + 14c0: 5f 93 push r21 + 14c2: 6f 93 push r22 + 14c4: 7f 93 push r23 + 14c6: 8f 93 push r24 + 14c8: 9f 93 push r25 + 14ca: af 93 push r26 + 14cc: bf 93 push r27 + 14ce: ef 93 push r30 + 14d0: ff 93 push r31 + 14d2: e0 91 d8 21 lds r30, 0x21D8 ; 0x8021d8 + 14d6: f0 91 d9 21 lds r31, 0x21D9 ; 0x8021d9 + 14da: 30 97 sbiw r30, 0x00 ; 0 + 14dc: 09 f0 breq .+2 ; 0x14e0 <__vector_55+0x42> + 14de: 19 95 eicall + 14e0: ff 91 pop r31 + 14e2: ef 91 pop r30 + 14e4: bf 91 pop r27 + 14e6: af 91 pop r26 + 14e8: 9f 91 pop r25 + 14ea: 8f 91 pop r24 + 14ec: 7f 91 pop r23 + 14ee: 6f 91 pop r22 + 14f0: 5f 91 pop r21 + 14f2: 4f 91 pop r20 + 14f4: 3f 91 pop r19 + 14f6: 2f 91 pop r18 + 14f8: 0f 90 pop r0 + 14fa: 0b be out 0x3b, r0 ; 59 + 14fc: 0f 90 pop r0 + 14fe: 09 be out 0x39, r0 ; 57 + 1500: 0f 90 pop r0 + 1502: 08 be out 0x38, r0 ; 56 + 1504: 0f 90 pop r0 + 1506: 0f be out 0x3f, r0 ; 63 + 1508: 0f 90 pop r0 + 150a: 1f 90 pop r1 + 150c: 18 95 reti + +0000150e <__vector_56>: + 150e: 1f 92 push r1 + 1510: 0f 92 push r0 + 1512: 0f b6 in r0, 0x3f ; 63 + 1514: 0f 92 push r0 + 1516: 11 24 eor r1, r1 + 1518: 08 b6 in r0, 0x38 ; 56 + 151a: 0f 92 push r0 + 151c: 18 be out 0x38, r1 ; 56 + 151e: 09 b6 in r0, 0x39 ; 57 + 1520: 0f 92 push r0 + 1522: 19 be out 0x39, r1 ; 57 + 1524: 0b b6 in r0, 0x3b ; 59 + 1526: 0f 92 push r0 + 1528: 1b be out 0x3b, r1 ; 59 + 152a: 2f 93 push r18 + 152c: 3f 93 push r19 + 152e: 4f 93 push r20 + 1530: 5f 93 push r21 + 1532: 6f 93 push r22 + 1534: 7f 93 push r23 + 1536: 8f 93 push r24 + 1538: 9f 93 push r25 + 153a: af 93 push r26 + 153c: bf 93 push r27 + 153e: ef 93 push r30 + 1540: ff 93 push r31 + 1542: e0 91 d6 21 lds r30, 0x21D6 ; 0x8021d6 + 1546: f0 91 d7 21 lds r31, 0x21D7 ; 0x8021d7 + 154a: 30 97 sbiw r30, 0x00 ; 0 + 154c: 09 f0 breq .+2 ; 0x1550 <__vector_56+0x42> + 154e: 19 95 eicall + 1550: ff 91 pop r31 + 1552: ef 91 pop r30 + 1554: bf 91 pop r27 + 1556: af 91 pop r26 + 1558: 9f 91 pop r25 + 155a: 8f 91 pop r24 + 155c: 7f 91 pop r23 + 155e: 6f 91 pop r22 + 1560: 5f 91 pop r21 + 1562: 4f 91 pop r20 + 1564: 3f 91 pop r19 + 1566: 2f 91 pop r18 + 1568: 0f 90 pop r0 + 156a: 0b be out 0x3b, r0 ; 59 + 156c: 0f 90 pop r0 + 156e: 09 be out 0x39, r0 ; 57 + 1570: 0f 90 pop r0 + 1572: 08 be out 0x38, r0 ; 56 + 1574: 0f 90 pop r0 + 1576: 0f be out 0x3f, r0 ; 63 + 1578: 0f 90 pop r0 + 157a: 1f 90 pop r1 + 157c: 18 95 reti + +0000157e <__vector_108>: + 157e: 1f 92 push r1 + 1580: 0f 92 push r0 + 1582: 0f b6 in r0, 0x3f ; 63 + 1584: 0f 92 push r0 + 1586: 11 24 eor r1, r1 + 1588: 08 b6 in r0, 0x38 ; 56 + 158a: 0f 92 push r0 + 158c: 18 be out 0x38, r1 ; 56 + 158e: 09 b6 in r0, 0x39 ; 57 + 1590: 0f 92 push r0 + 1592: 19 be out 0x39, r1 ; 57 + 1594: 0b b6 in r0, 0x3b ; 59 + 1596: 0f 92 push r0 + 1598: 1b be out 0x3b, r1 ; 59 + 159a: 2f 93 push r18 + 159c: 3f 93 push r19 + 159e: 4f 93 push r20 + 15a0: 5f 93 push r21 + 15a2: 6f 93 push r22 + 15a4: 7f 93 push r23 + 15a6: 8f 93 push r24 + 15a8: 9f 93 push r25 + 15aa: af 93 push r26 + 15ac: bf 93 push r27 + 15ae: ef 93 push r30 + 15b0: ff 93 push r31 + 15b2: e0 91 d4 21 lds r30, 0x21D4 ; 0x8021d4 + 15b6: f0 91 d5 21 lds r31, 0x21D5 ; 0x8021d5 + 15ba: 30 97 sbiw r30, 0x00 ; 0 + 15bc: 09 f0 breq .+2 ; 0x15c0 <__vector_108+0x42> + 15be: 19 95 eicall + 15c0: ff 91 pop r31 + 15c2: ef 91 pop r30 + 15c4: bf 91 pop r27 + 15c6: af 91 pop r26 + 15c8: 9f 91 pop r25 + 15ca: 8f 91 pop r24 + 15cc: 7f 91 pop r23 + 15ce: 6f 91 pop r22 + 15d0: 5f 91 pop r21 + 15d2: 4f 91 pop r20 + 15d4: 3f 91 pop r19 + 15d6: 2f 91 pop r18 + 15d8: 0f 90 pop r0 + 15da: 0b be out 0x3b, r0 ; 59 + 15dc: 0f 90 pop r0 + 15de: 09 be out 0x39, r0 ; 57 + 15e0: 0f 90 pop r0 + 15e2: 08 be out 0x38, r0 ; 56 + 15e4: 0f 90 pop r0 + 15e6: 0f be out 0x3f, r0 ; 63 + 15e8: 0f 90 pop r0 + 15ea: 1f 90 pop r1 + 15ec: 18 95 reti + +000015ee <__vector_109>: + 15ee: 1f 92 push r1 + 15f0: 0f 92 push r0 + 15f2: 0f b6 in r0, 0x3f ; 63 + 15f4: 0f 92 push r0 + 15f6: 11 24 eor r1, r1 + 15f8: 08 b6 in r0, 0x38 ; 56 + 15fa: 0f 92 push r0 + 15fc: 18 be out 0x38, r1 ; 56 + 15fe: 09 b6 in r0, 0x39 ; 57 + 1600: 0f 92 push r0 + 1602: 19 be out 0x39, r1 ; 57 + 1604: 0b b6 in r0, 0x3b ; 59 + 1606: 0f 92 push r0 + 1608: 1b be out 0x3b, r1 ; 59 + 160a: 2f 93 push r18 + 160c: 3f 93 push r19 + 160e: 4f 93 push r20 + 1610: 5f 93 push r21 + 1612: 6f 93 push r22 + 1614: 7f 93 push r23 + 1616: 8f 93 push r24 + 1618: 9f 93 push r25 + 161a: af 93 push r26 + 161c: bf 93 push r27 + 161e: ef 93 push r30 + 1620: ff 93 push r31 + 1622: e0 91 d2 21 lds r30, 0x21D2 ; 0x8021d2 + 1626: f0 91 d3 21 lds r31, 0x21D3 ; 0x8021d3 + 162a: 30 97 sbiw r30, 0x00 ; 0 + 162c: 09 f0 breq .+2 ; 0x1630 <__vector_109+0x42> + 162e: 19 95 eicall + 1630: ff 91 pop r31 + 1632: ef 91 pop r30 + 1634: bf 91 pop r27 + 1636: af 91 pop r26 + 1638: 9f 91 pop r25 + 163a: 8f 91 pop r24 + 163c: 7f 91 pop r23 + 163e: 6f 91 pop r22 + 1640: 5f 91 pop r21 + 1642: 4f 91 pop r20 + 1644: 3f 91 pop r19 + 1646: 2f 91 pop r18 + 1648: 0f 90 pop r0 + 164a: 0b be out 0x3b, r0 ; 59 + 164c: 0f 90 pop r0 + 164e: 09 be out 0x39, r0 ; 57 + 1650: 0f 90 pop r0 + 1652: 08 be out 0x38, r0 ; 56 + 1654: 0f 90 pop r0 + 1656: 0f be out 0x3f, r0 ; 63 + 1658: 0f 90 pop r0 + 165a: 1f 90 pop r1 + 165c: 18 95 reti + +0000165e <__vector_110>: + 165e: 1f 92 push r1 + 1660: 0f 92 push r0 + 1662: 0f b6 in r0, 0x3f ; 63 + 1664: 0f 92 push r0 + 1666: 11 24 eor r1, r1 + 1668: 08 b6 in r0, 0x38 ; 56 + 166a: 0f 92 push r0 + 166c: 18 be out 0x38, r1 ; 56 + 166e: 09 b6 in r0, 0x39 ; 57 + 1670: 0f 92 push r0 + 1672: 19 be out 0x39, r1 ; 57 + 1674: 0b b6 in r0, 0x3b ; 59 + 1676: 0f 92 push r0 + 1678: 1b be out 0x3b, r1 ; 59 + 167a: 2f 93 push r18 + 167c: 3f 93 push r19 + 167e: 4f 93 push r20 + 1680: 5f 93 push r21 + 1682: 6f 93 push r22 + 1684: 7f 93 push r23 + 1686: 8f 93 push r24 + 1688: 9f 93 push r25 + 168a: af 93 push r26 + 168c: bf 93 push r27 + 168e: ef 93 push r30 + 1690: ff 93 push r31 + 1692: e0 91 d0 21 lds r30, 0x21D0 ; 0x8021d0 + 1696: f0 91 d1 21 lds r31, 0x21D1 ; 0x8021d1 + 169a: 30 97 sbiw r30, 0x00 ; 0 + 169c: 09 f0 breq .+2 ; 0x16a0 <__vector_110+0x42> + 169e: 19 95 eicall + 16a0: ff 91 pop r31 + 16a2: ef 91 pop r30 + 16a4: bf 91 pop r27 + 16a6: af 91 pop r26 + 16a8: 9f 91 pop r25 + 16aa: 8f 91 pop r24 + 16ac: 7f 91 pop r23 + 16ae: 6f 91 pop r22 + 16b0: 5f 91 pop r21 + 16b2: 4f 91 pop r20 + 16b4: 3f 91 pop r19 + 16b6: 2f 91 pop r18 + 16b8: 0f 90 pop r0 + 16ba: 0b be out 0x3b, r0 ; 59 + 16bc: 0f 90 pop r0 + 16be: 09 be out 0x39, r0 ; 57 + 16c0: 0f 90 pop r0 + 16c2: 08 be out 0x38, r0 ; 56 + 16c4: 0f 90 pop r0 + 16c6: 0f be out 0x3f, r0 ; 63 + 16c8: 0f 90 pop r0 + 16ca: 1f 90 pop r1 + 16cc: 18 95 reti + +000016ce <__vector_111>: + 16ce: 1f 92 push r1 + 16d0: 0f 92 push r0 + 16d2: 0f b6 in r0, 0x3f ; 63 + 16d4: 0f 92 push r0 + 16d6: 11 24 eor r1, r1 + 16d8: 08 b6 in r0, 0x38 ; 56 + 16da: 0f 92 push r0 + 16dc: 18 be out 0x38, r1 ; 56 + 16de: 09 b6 in r0, 0x39 ; 57 + 16e0: 0f 92 push r0 + 16e2: 19 be out 0x39, r1 ; 57 + 16e4: 0b b6 in r0, 0x3b ; 59 + 16e6: 0f 92 push r0 + 16e8: 1b be out 0x3b, r1 ; 59 + 16ea: 2f 93 push r18 + 16ec: 3f 93 push r19 + 16ee: 4f 93 push r20 + 16f0: 5f 93 push r21 + 16f2: 6f 93 push r22 + 16f4: 7f 93 push r23 + 16f6: 8f 93 push r24 + 16f8: 9f 93 push r25 + 16fa: af 93 push r26 + 16fc: bf 93 push r27 + 16fe: ef 93 push r30 + 1700: ff 93 push r31 + 1702: e0 91 ce 21 lds r30, 0x21CE ; 0x8021ce + 1706: f0 91 cf 21 lds r31, 0x21CF ; 0x8021cf + 170a: 30 97 sbiw r30, 0x00 ; 0 + 170c: 09 f0 breq .+2 ; 0x1710 <__vector_111+0x42> + 170e: 19 95 eicall + 1710: ff 91 pop r31 + 1712: ef 91 pop r30 + 1714: bf 91 pop r27 + 1716: af 91 pop r26 + 1718: 9f 91 pop r25 + 171a: 8f 91 pop r24 + 171c: 7f 91 pop r23 + 171e: 6f 91 pop r22 + 1720: 5f 91 pop r21 + 1722: 4f 91 pop r20 + 1724: 3f 91 pop r19 + 1726: 2f 91 pop r18 + 1728: 0f 90 pop r0 + 172a: 0b be out 0x3b, r0 ; 59 + 172c: 0f 90 pop r0 + 172e: 09 be out 0x39, r0 ; 57 + 1730: 0f 90 pop r0 + 1732: 08 be out 0x38, r0 ; 56 + 1734: 0f 90 pop r0 + 1736: 0f be out 0x3f, r0 ; 63 + 1738: 0f 90 pop r0 + 173a: 1f 90 pop r1 + 173c: 18 95 reti + +0000173e <__vector_112>: + 173e: 1f 92 push r1 + 1740: 0f 92 push r0 + 1742: 0f b6 in r0, 0x3f ; 63 + 1744: 0f 92 push r0 + 1746: 11 24 eor r1, r1 + 1748: 08 b6 in r0, 0x38 ; 56 + 174a: 0f 92 push r0 + 174c: 18 be out 0x38, r1 ; 56 + 174e: 09 b6 in r0, 0x39 ; 57 + 1750: 0f 92 push r0 + 1752: 19 be out 0x39, r1 ; 57 + 1754: 0b b6 in r0, 0x3b ; 59 + 1756: 0f 92 push r0 + 1758: 1b be out 0x3b, r1 ; 59 + 175a: 2f 93 push r18 + 175c: 3f 93 push r19 + 175e: 4f 93 push r20 + 1760: 5f 93 push r21 + 1762: 6f 93 push r22 + 1764: 7f 93 push r23 + 1766: 8f 93 push r24 + 1768: 9f 93 push r25 + 176a: af 93 push r26 + 176c: bf 93 push r27 + 176e: ef 93 push r30 + 1770: ff 93 push r31 + 1772: e0 91 cc 21 lds r30, 0x21CC ; 0x8021cc + 1776: f0 91 cd 21 lds r31, 0x21CD ; 0x8021cd + 177a: 30 97 sbiw r30, 0x00 ; 0 + 177c: 09 f0 breq .+2 ; 0x1780 <__vector_112+0x42> + 177e: 19 95 eicall + 1780: ff 91 pop r31 + 1782: ef 91 pop r30 + 1784: bf 91 pop r27 + 1786: af 91 pop r26 + 1788: 9f 91 pop r25 + 178a: 8f 91 pop r24 + 178c: 7f 91 pop r23 + 178e: 6f 91 pop r22 + 1790: 5f 91 pop r21 + 1792: 4f 91 pop r20 + 1794: 3f 91 pop r19 + 1796: 2f 91 pop r18 + 1798: 0f 90 pop r0 + 179a: 0b be out 0x3b, r0 ; 59 + 179c: 0f 90 pop r0 + 179e: 09 be out 0x39, r0 ; 57 + 17a0: 0f 90 pop r0 + 17a2: 08 be out 0x38, r0 ; 56 + 17a4: 0f 90 pop r0 + 17a6: 0f be out 0x3f, r0 ; 63 + 17a8: 0f 90 pop r0 + 17aa: 1f 90 pop r1 + 17ac: 18 95 reti + +000017ae <__vector_113>: + 17ae: 1f 92 push r1 + 17b0: 0f 92 push r0 + 17b2: 0f b6 in r0, 0x3f ; 63 + 17b4: 0f 92 push r0 + 17b6: 11 24 eor r1, r1 + 17b8: 08 b6 in r0, 0x38 ; 56 + 17ba: 0f 92 push r0 + 17bc: 18 be out 0x38, r1 ; 56 + 17be: 09 b6 in r0, 0x39 ; 57 + 17c0: 0f 92 push r0 + 17c2: 19 be out 0x39, r1 ; 57 + 17c4: 0b b6 in r0, 0x3b ; 59 + 17c6: 0f 92 push r0 + 17c8: 1b be out 0x3b, r1 ; 59 + 17ca: 2f 93 push r18 + 17cc: 3f 93 push r19 + 17ce: 4f 93 push r20 + 17d0: 5f 93 push r21 + 17d2: 6f 93 push r22 + 17d4: 7f 93 push r23 + 17d6: 8f 93 push r24 + 17d8: 9f 93 push r25 + 17da: af 93 push r26 + 17dc: bf 93 push r27 + 17de: ef 93 push r30 + 17e0: ff 93 push r31 + 17e2: e0 91 ca 21 lds r30, 0x21CA ; 0x8021ca + 17e6: f0 91 cb 21 lds r31, 0x21CB ; 0x8021cb + 17ea: 30 97 sbiw r30, 0x00 ; 0 + 17ec: 09 f0 breq .+2 ; 0x17f0 <__vector_113+0x42> + 17ee: 19 95 eicall + 17f0: ff 91 pop r31 + 17f2: ef 91 pop r30 + 17f4: bf 91 pop r27 + 17f6: af 91 pop r26 + 17f8: 9f 91 pop r25 + 17fa: 8f 91 pop r24 + 17fc: 7f 91 pop r23 + 17fe: 6f 91 pop r22 + 1800: 5f 91 pop r21 + 1802: 4f 91 pop r20 + 1804: 3f 91 pop r19 + 1806: 2f 91 pop r18 + 1808: 0f 90 pop r0 + 180a: 0b be out 0x3b, r0 ; 59 + 180c: 0f 90 pop r0 + 180e: 09 be out 0x39, r0 ; 57 + 1810: 0f 90 pop r0 + 1812: 08 be out 0x38, r0 ; 56 + 1814: 0f 90 pop r0 + 1816: 0f be out 0x3f, r0 ; 63 + 1818: 0f 90 pop r0 + 181a: 1f 90 pop r1 + 181c: 18 95 reti + +0000181e <__vector_114>: + 181e: 1f 92 push r1 + 1820: 0f 92 push r0 + 1822: 0f b6 in r0, 0x3f ; 63 + 1824: 0f 92 push r0 + 1826: 11 24 eor r1, r1 + 1828: 08 b6 in r0, 0x38 ; 56 + 182a: 0f 92 push r0 + 182c: 18 be out 0x38, r1 ; 56 + 182e: 09 b6 in r0, 0x39 ; 57 + 1830: 0f 92 push r0 + 1832: 19 be out 0x39, r1 ; 57 + 1834: 0b b6 in r0, 0x3b ; 59 + 1836: 0f 92 push r0 + 1838: 1b be out 0x3b, r1 ; 59 + 183a: 2f 93 push r18 + 183c: 3f 93 push r19 + 183e: 4f 93 push r20 + 1840: 5f 93 push r21 + 1842: 6f 93 push r22 + 1844: 7f 93 push r23 + 1846: 8f 93 push r24 + 1848: 9f 93 push r25 + 184a: af 93 push r26 + 184c: bf 93 push r27 + 184e: ef 93 push r30 + 1850: ff 93 push r31 + 1852: e0 91 c8 21 lds r30, 0x21C8 ; 0x8021c8 + 1856: f0 91 c9 21 lds r31, 0x21C9 ; 0x8021c9 + 185a: 30 97 sbiw r30, 0x00 ; 0 + 185c: 09 f0 breq .+2 ; 0x1860 <__vector_114+0x42> + 185e: 19 95 eicall + 1860: ff 91 pop r31 + 1862: ef 91 pop r30 + 1864: bf 91 pop r27 + 1866: af 91 pop r26 + 1868: 9f 91 pop r25 + 186a: 8f 91 pop r24 + 186c: 7f 91 pop r23 + 186e: 6f 91 pop r22 + 1870: 5f 91 pop r21 + 1872: 4f 91 pop r20 + 1874: 3f 91 pop r19 + 1876: 2f 91 pop r18 + 1878: 0f 90 pop r0 + 187a: 0b be out 0x3b, r0 ; 59 + 187c: 0f 90 pop r0 + 187e: 09 be out 0x39, r0 ; 57 + 1880: 0f 90 pop r0 + 1882: 08 be out 0x38, r0 ; 56 + 1884: 0f 90 pop r0 + 1886: 0f be out 0x3f, r0 ; 63 + 1888: 0f 90 pop r0 + 188a: 1f 90 pop r1 + 188c: 18 95 reti + +0000188e <__vector_115>: + 188e: 1f 92 push r1 + 1890: 0f 92 push r0 + 1892: 0f b6 in r0, 0x3f ; 63 + 1894: 0f 92 push r0 + 1896: 11 24 eor r1, r1 + 1898: 08 b6 in r0, 0x38 ; 56 + 189a: 0f 92 push r0 + 189c: 18 be out 0x38, r1 ; 56 + 189e: 09 b6 in r0, 0x39 ; 57 + 18a0: 0f 92 push r0 + 18a2: 19 be out 0x39, r1 ; 57 + 18a4: 0b b6 in r0, 0x3b ; 59 + 18a6: 0f 92 push r0 + 18a8: 1b be out 0x3b, r1 ; 59 + 18aa: 2f 93 push r18 + 18ac: 3f 93 push r19 + 18ae: 4f 93 push r20 + 18b0: 5f 93 push r21 + 18b2: 6f 93 push r22 + 18b4: 7f 93 push r23 + 18b6: 8f 93 push r24 + 18b8: 9f 93 push r25 + 18ba: af 93 push r26 + 18bc: bf 93 push r27 + 18be: ef 93 push r30 + 18c0: ff 93 push r31 + 18c2: e0 91 c6 21 lds r30, 0x21C6 ; 0x8021c6 + 18c6: f0 91 c7 21 lds r31, 0x21C7 ; 0x8021c7 + 18ca: 30 97 sbiw r30, 0x00 ; 0 + 18cc: 09 f0 breq .+2 ; 0x18d0 <__vector_115+0x42> + 18ce: 19 95 eicall + 18d0: ff 91 pop r31 + 18d2: ef 91 pop r30 + 18d4: bf 91 pop r27 + 18d6: af 91 pop r26 + 18d8: 9f 91 pop r25 + 18da: 8f 91 pop r24 + 18dc: 7f 91 pop r23 + 18de: 6f 91 pop r22 + 18e0: 5f 91 pop r21 + 18e2: 4f 91 pop r20 + 18e4: 3f 91 pop r19 + 18e6: 2f 91 pop r18 + 18e8: 0f 90 pop r0 + 18ea: 0b be out 0x3b, r0 ; 59 + 18ec: 0f 90 pop r0 + 18ee: 09 be out 0x39, r0 ; 57 + 18f0: 0f 90 pop r0 + 18f2: 08 be out 0x38, r0 ; 56 + 18f4: 0f 90 pop r0 + 18f6: 0f be out 0x3f, r0 ; 63 + 18f8: 0f 90 pop r0 + 18fa: 1f 90 pop r1 + 18fc: 18 95 reti + +000018fe <__vector_116>: + 18fe: 1f 92 push r1 + 1900: 0f 92 push r0 + 1902: 0f b6 in r0, 0x3f ; 63 + 1904: 0f 92 push r0 + 1906: 11 24 eor r1, r1 + 1908: 08 b6 in r0, 0x38 ; 56 + 190a: 0f 92 push r0 + 190c: 18 be out 0x38, r1 ; 56 + 190e: 09 b6 in r0, 0x39 ; 57 + 1910: 0f 92 push r0 + 1912: 19 be out 0x39, r1 ; 57 + 1914: 0b b6 in r0, 0x3b ; 59 + 1916: 0f 92 push r0 + 1918: 1b be out 0x3b, r1 ; 59 + 191a: 2f 93 push r18 + 191c: 3f 93 push r19 + 191e: 4f 93 push r20 + 1920: 5f 93 push r21 + 1922: 6f 93 push r22 + 1924: 7f 93 push r23 + 1926: 8f 93 push r24 + 1928: 9f 93 push r25 + 192a: af 93 push r26 + 192c: bf 93 push r27 + 192e: ef 93 push r30 + 1930: ff 93 push r31 + 1932: e0 91 c4 21 lds r30, 0x21C4 ; 0x8021c4 + 1936: f0 91 c5 21 lds r31, 0x21C5 ; 0x8021c5 + 193a: 30 97 sbiw r30, 0x00 ; 0 + 193c: 09 f0 breq .+2 ; 0x1940 <__vector_116+0x42> + 193e: 19 95 eicall + 1940: ff 91 pop r31 + 1942: ef 91 pop r30 + 1944: bf 91 pop r27 + 1946: af 91 pop r26 + 1948: 9f 91 pop r25 + 194a: 8f 91 pop r24 + 194c: 7f 91 pop r23 + 194e: 6f 91 pop r22 + 1950: 5f 91 pop r21 + 1952: 4f 91 pop r20 + 1954: 3f 91 pop r19 + 1956: 2f 91 pop r18 + 1958: 0f 90 pop r0 + 195a: 0b be out 0x3b, r0 ; 59 + 195c: 0f 90 pop r0 + 195e: 09 be out 0x39, r0 ; 57 + 1960: 0f 90 pop r0 + 1962: 08 be out 0x38, r0 ; 56 + 1964: 0f 90 pop r0 + 1966: 0f be out 0x3f, r0 ; 63 + 1968: 0f 90 pop r0 + 196a: 1f 90 pop r1 + 196c: 18 95 reti + +0000196e <__vector_117>: + 196e: 1f 92 push r1 + 1970: 0f 92 push r0 + 1972: 0f b6 in r0, 0x3f ; 63 + 1974: 0f 92 push r0 + 1976: 11 24 eor r1, r1 + 1978: 08 b6 in r0, 0x38 ; 56 + 197a: 0f 92 push r0 + 197c: 18 be out 0x38, r1 ; 56 + 197e: 09 b6 in r0, 0x39 ; 57 + 1980: 0f 92 push r0 + 1982: 19 be out 0x39, r1 ; 57 + 1984: 0b b6 in r0, 0x3b ; 59 + 1986: 0f 92 push r0 + 1988: 1b be out 0x3b, r1 ; 59 + 198a: 2f 93 push r18 + 198c: 3f 93 push r19 + 198e: 4f 93 push r20 + 1990: 5f 93 push r21 + 1992: 6f 93 push r22 + 1994: 7f 93 push r23 + 1996: 8f 93 push r24 + 1998: 9f 93 push r25 + 199a: af 93 push r26 + 199c: bf 93 push r27 + 199e: ef 93 push r30 + 19a0: ff 93 push r31 + 19a2: e0 91 c2 21 lds r30, 0x21C2 ; 0x8021c2 <__data_end> + 19a6: f0 91 c3 21 lds r31, 0x21C3 ; 0x8021c3 <__data_end+0x1> + 19aa: 30 97 sbiw r30, 0x00 ; 0 + 19ac: 09 f0 breq .+2 ; 0x19b0 <__vector_117+0x42> + 19ae: 19 95 eicall + 19b0: ff 91 pop r31 + 19b2: ef 91 pop r30 + 19b4: bf 91 pop r27 + 19b6: af 91 pop r26 + 19b8: 9f 91 pop r25 + 19ba: 8f 91 pop r24 + 19bc: 7f 91 pop r23 + 19be: 6f 91 pop r22 + 19c0: 5f 91 pop r21 + 19c2: 4f 91 pop r20 + 19c4: 3f 91 pop r19 + 19c6: 2f 91 pop r18 + 19c8: 0f 90 pop r0 + 19ca: 0b be out 0x3b, r0 ; 59 + 19cc: 0f 90 pop r0 + 19ce: 09 be out 0x39, r0 ; 57 + 19d0: 0f 90 pop r0 + 19d2: 08 be out 0x38, r0 ; 56 + 19d4: 0f 90 pop r0 + 19d6: 0f be out 0x3f, r0 ; 63 + 19d8: 0f 90 pop r0 + 19da: 1f 90 pop r1 + 19dc: 18 95 reti + +000019de : + 19de: 1f 93 push r17 + 19e0: cf 93 push r28 + 19e2: df 93 push r29 + 19e4: 1f 92 push r1 + 19e6: 1f 92 push r1 + 19e8: cd b7 in r28, 0x3d ; 61 + 19ea: de b7 in r29, 0x3e ; 62 + 19ec: 2f b7 in r18, 0x3f ; 63 + 19ee: 2a 83 std Y+2, r18 ; 0x02 + 19f0: f8 94 cli + 19f2: 1a 81 ldd r17, Y+2 ; 0x02 + 19f4: 28 2f mov r18, r24 + 19f6: 39 2f mov r19, r25 + 19f8: 21 15 cp r18, r1 + 19fa: 88 e0 ldi r24, 0x08 ; 8 + 19fc: 38 07 cpc r19, r24 + 19fe: 49 f4 brne .+18 ; 0x1a12 + 1a00: 61 e0 ldi r22, 0x01 ; 1 + 1a02: 83 e0 ldi r24, 0x03 ; 3 + 1a04: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a08: 64 e0 ldi r22, 0x04 ; 4 + 1a0a: 83 e0 ldi r24, 0x03 ; 3 + 1a0c: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a10: 5c c0 rjmp .+184 ; 0x1aca + 1a12: 20 34 cpi r18, 0x40 ; 64 + 1a14: 88 e0 ldi r24, 0x08 ; 8 + 1a16: 38 07 cpc r19, r24 + 1a18: 49 f4 brne .+18 ; 0x1a2c + 1a1a: 62 e0 ldi r22, 0x02 ; 2 + 1a1c: 83 e0 ldi r24, 0x03 ; 3 + 1a1e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a22: 64 e0 ldi r22, 0x04 ; 4 + 1a24: 83 e0 ldi r24, 0x03 ; 3 + 1a26: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a2a: 4f c0 rjmp .+158 ; 0x1aca + 1a2c: 21 15 cp r18, r1 + 1a2e: 89 e0 ldi r24, 0x09 ; 9 + 1a30: 38 07 cpc r19, r24 + 1a32: 49 f4 brne .+18 ; 0x1a46 + 1a34: 61 e0 ldi r22, 0x01 ; 1 + 1a36: 84 e0 ldi r24, 0x04 ; 4 + 1a38: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a3c: 64 e0 ldi r22, 0x04 ; 4 + 1a3e: 84 e0 ldi r24, 0x04 ; 4 + 1a40: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a44: 42 c0 rjmp .+132 ; 0x1aca + 1a46: 20 34 cpi r18, 0x40 ; 64 + 1a48: 89 e0 ldi r24, 0x09 ; 9 + 1a4a: 38 07 cpc r19, r24 + 1a4c: 49 f4 brne .+18 ; 0x1a60 + 1a4e: 62 e0 ldi r22, 0x02 ; 2 + 1a50: 84 e0 ldi r24, 0x04 ; 4 + 1a52: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a56: 64 e0 ldi r22, 0x04 ; 4 + 1a58: 84 e0 ldi r24, 0x04 ; 4 + 1a5a: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a5e: 35 c0 rjmp .+106 ; 0x1aca + 1a60: 21 15 cp r18, r1 + 1a62: 8a e0 ldi r24, 0x0A ; 10 + 1a64: 38 07 cpc r19, r24 + 1a66: 49 f4 brne .+18 ; 0x1a7a + 1a68: 61 e0 ldi r22, 0x01 ; 1 + 1a6a: 85 e0 ldi r24, 0x05 ; 5 + 1a6c: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a70: 64 e0 ldi r22, 0x04 ; 4 + 1a72: 85 e0 ldi r24, 0x05 ; 5 + 1a74: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a78: 28 c0 rjmp .+80 ; 0x1aca + 1a7a: 20 34 cpi r18, 0x40 ; 64 + 1a7c: 8a e0 ldi r24, 0x0A ; 10 + 1a7e: 38 07 cpc r19, r24 + 1a80: 49 f4 brne .+18 ; 0x1a94 + 1a82: 62 e0 ldi r22, 0x02 ; 2 + 1a84: 85 e0 ldi r24, 0x05 ; 5 + 1a86: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a8a: 64 e0 ldi r22, 0x04 ; 4 + 1a8c: 85 e0 ldi r24, 0x05 ; 5 + 1a8e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1a92: 1b c0 rjmp .+54 ; 0x1aca + 1a94: 21 15 cp r18, r1 + 1a96: 8b e0 ldi r24, 0x0B ; 11 + 1a98: 38 07 cpc r19, r24 + 1a9a: 49 f4 brne .+18 ; 0x1aae + 1a9c: 61 e0 ldi r22, 0x01 ; 1 + 1a9e: 86 e0 ldi r24, 0x06 ; 6 + 1aa0: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1aa4: 64 e0 ldi r22, 0x04 ; 4 + 1aa6: 86 e0 ldi r24, 0x06 ; 6 + 1aa8: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1aac: 0e c0 rjmp .+28 ; 0x1aca + 1aae: 20 34 cpi r18, 0x40 ; 64 + 1ab0: 3b 40 sbci r19, 0x0B ; 11 + 1ab2: 49 f4 brne .+18 ; 0x1ac6 + 1ab4: 62 e0 ldi r22, 0x02 ; 2 + 1ab6: 86 e0 ldi r24, 0x06 ; 6 + 1ab8: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1abc: 64 e0 ldi r22, 0x04 ; 4 + 1abe: 86 e0 ldi r24, 0x06 ; 6 + 1ac0: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 1ac4: 02 c0 rjmp .+4 ; 0x1aca + 1ac6: 1f bf out 0x3f, r17 ; 63 + 1ac8: 10 c0 rjmp .+32 ; 0x1aea + 1aca: 80 91 32 25 lds r24, 0x2532 ; 0x802532 + 1ace: 8f 3f cpi r24, 0xFF ; 255 + 1ad0: 09 f4 brne .+2 ; 0x1ad4 + 1ad2: ff cf rjmp .-2 ; 0x1ad2 + 1ad4: 8f b7 in r24, 0x3f ; 63 + 1ad6: 89 83 std Y+1, r24 ; 0x01 + 1ad8: f8 94 cli + 1ada: 99 81 ldd r25, Y+1 ; 0x01 + 1adc: e1 e3 ldi r30, 0x31 ; 49 + 1ade: f5 e2 ldi r31, 0x25 ; 37 + 1ae0: 81 81 ldd r24, Z+1 ; 0x01 + 1ae2: 8f 5f subi r24, 0xFF ; 255 + 1ae4: 81 83 std Z+1, r24 ; 0x01 + 1ae6: 9f bf out 0x3f, r25 ; 63 + 1ae8: 1f bf out 0x3f, r17 ; 63 + 1aea: 0f 90 pop r0 + 1aec: 0f 90 pop r0 + 1aee: df 91 pop r29 + 1af0: cf 91 pop r28 + 1af2: 1f 91 pop r17 + 1af4: 08 95 ret + +00001af6 : + +void tc_set_overflow_interrupt_callback(volatile void *tc, + tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + 1af6: 81 15 cp r24, r1 + 1af8: 28 e0 ldi r18, 0x08 ; 8 + 1afa: 92 07 cpc r25, r18 + 1afc: 29 f4 brne .+10 ; 0x1b08 + tc_tcc0_ovf_callback = callback; + 1afe: 60 93 0e 22 sts 0x220E, r22 ; 0x80220e + 1b02: 70 93 0f 22 sts 0x220F, r23 ; 0x80220f + 1b06: 08 95 ret + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + 1b08: 80 34 cpi r24, 0x40 ; 64 + 1b0a: 28 e0 ldi r18, 0x08 ; 8 + 1b0c: 92 07 cpc r25, r18 + 1b0e: 29 f4 brne .+10 ; 0x1b1a + tc_tcc1_ovf_callback = callback; + 1b10: 60 93 04 22 sts 0x2204, r22 ; 0x802204 + 1b14: 70 93 05 22 sts 0x2205, r23 ; 0x802205 + 1b18: 08 95 ret + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + 1b1a: 81 15 cp r24, r1 + 1b1c: 29 e0 ldi r18, 0x09 ; 9 + 1b1e: 92 07 cpc r25, r18 + 1b20: 29 f4 brne .+10 ; 0x1b2c + tc_tcd0_ovf_callback = callback; + 1b22: 60 93 fc 21 sts 0x21FC, r22 ; 0x8021fc + 1b26: 70 93 fd 21 sts 0x21FD, r23 ; 0x8021fd + 1b2a: 08 95 ret + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + 1b2c: 80 34 cpi r24, 0x40 ; 64 + 1b2e: 29 e0 ldi r18, 0x09 ; 9 + 1b30: 92 07 cpc r25, r18 + 1b32: 29 f4 brne .+10 ; 0x1b3e + tc_tcd1_ovf_callback = callback; + 1b34: 60 93 f0 21 sts 0x21F0, r22 ; 0x8021f0 + 1b38: 70 93 f1 21 sts 0x21F1, r23 ; 0x8021f1 + 1b3c: 08 95 ret + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + 1b3e: 81 15 cp r24, r1 + 1b40: 2a e0 ldi r18, 0x0A ; 10 + 1b42: 92 07 cpc r25, r18 + 1b44: 29 f4 brne .+10 ; 0x1b50 + tc_tce0_ovf_callback = callback; + 1b46: 60 93 e8 21 sts 0x21E8, r22 ; 0x8021e8 + 1b4a: 70 93 e9 21 sts 0x21E9, r23 ; 0x8021e9 + 1b4e: 08 95 ret + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + 1b50: 80 34 cpi r24, 0x40 ; 64 + 1b52: 2a e0 ldi r18, 0x0A ; 10 + 1b54: 92 07 cpc r25, r18 + 1b56: 29 f4 brne .+10 ; 0x1b62 + tc_tce1_ovf_callback = callback; + 1b58: 60 93 dc 21 sts 0x21DC, r22 ; 0x8021dc + 1b5c: 70 93 dd 21 sts 0x21DD, r23 ; 0x8021dd + 1b60: 08 95 ret + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + 1b62: 81 15 cp r24, r1 + 1b64: 2b e0 ldi r18, 0x0B ; 11 + 1b66: 92 07 cpc r25, r18 + 1b68: 29 f4 brne .+10 ; 0x1b74 + tc_tcf0_ovf_callback = callback; + 1b6a: 60 93 d4 21 sts 0x21D4, r22 ; 0x8021d4 + 1b6e: 70 93 d5 21 sts 0x21D5, r23 ; 0x8021d5 + 1b72: 08 95 ret + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + 1b74: 80 34 cpi r24, 0x40 ; 64 + 1b76: 9b 40 sbci r25, 0x0B ; 11 + 1b78: 21 f4 brne .+8 ; 0x1b82 + tc_tcf1_ovf_callback = callback; + 1b7a: 60 93 c8 21 sts 0x21C8, r22 ; 0x8021c8 + 1b7e: 70 93 c9 21 sts 0x21C9, r23 ; 0x8021c9 + 1b82: 08 95 ret + +00001b84 : + * \brief Common TWI master interrupt service routine. + * + * Check current status and calls the appropriate handler. + */ +static void twim_interrupt_handler(void) +{ + 1b84: cf 93 push r28 + 1b86: df 93 push r29 + uint8_t const master_status = transfer.bus->MASTER.STATUS; + 1b88: e0 91 10 22 lds r30, 0x2210 ; 0x802210 + 1b8c: f0 91 11 22 lds r31, 0x2211 ; 0x802211 + 1b90: 84 81 ldd r24, Z+4 ; 0x04 + + if (master_status & TWI_MASTER_ARBLOST_bm) { + 1b92: 83 ff sbrs r24, 3 + 1b94: 08 c0 rjmp .+16 ; 0x1ba6 + + transfer.bus->MASTER.STATUS = master_status | TWI_MASTER_ARBLOST_bm; + 1b96: 88 60 ori r24, 0x08 ; 8 + 1b98: 84 83 std Z+4, r24 ; 0x04 + transfer.bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + 1b9a: 83 e0 ldi r24, 0x03 ; 3 + 1b9c: 83 83 std Z+3, r24 ; 0x03 + transfer.status = ERR_BUSY; + 1b9e: 86 ef ldi r24, 0xF6 ; 246 + 1ba0: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a + 1ba4: 83 c0 rjmp .+262 ; 0x1cac + + } else if ((master_status & TWI_MASTER_BUSERR_bm) || + 1ba6: 98 2f mov r25, r24 + 1ba8: 94 71 andi r25, 0x14 ; 20 + 1baa: 31 f0 breq .+12 ; 0x1bb8 + (master_status & TWI_MASTER_RXACK_bm)) { + + transfer.bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + 1bac: 83 e0 ldi r24, 0x03 ; 3 + 1bae: 83 83 std Z+3, r24 ; 0x03 + transfer.status = ERR_IO_ERROR; + 1bb0: 8f ef ldi r24, 0xFF ; 255 + 1bb2: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a + 1bb6: 7a c0 rjmp .+244 ; 0x1cac + + } else if (master_status & TWI_MASTER_WIF_bm) { + 1bb8: 86 ff sbrs r24, 6 + 1bba: 43 c0 rjmp .+134 ; 0x1c42 + * Handles TWI transactions (master write) and responses to (N)ACK. + */ +static inline void twim_write_handler(void) +{ + TWI_t * const bus = transfer.bus; + twi_package_t * const pkg = transfer.pkg; + 1bbc: c0 e1 ldi r28, 0x10 ; 16 + 1bbe: d2 e2 ldi r29, 0x22 ; 34 + 1bc0: aa 81 ldd r26, Y+2 ; 0x02 + 1bc2: bb 81 ldd r27, Y+3 ; 0x03 + + if (transfer.addr_count < pkg->addr_length) { + 1bc4: 8c 81 ldd r24, Y+4 ; 0x04 + 1bc6: 9d 81 ldd r25, Y+5 ; 0x05 + 1bc8: 14 96 adiw r26, 0x04 ; 4 + 1bca: 2d 91 ld r18, X+ + 1bcc: 3c 91 ld r19, X + 1bce: 15 97 sbiw r26, 0x05 ; 5 + 1bd0: 82 17 cp r24, r18 + 1bd2: 93 07 cpc r25, r19 + 1bd4: 6c f4 brge .+26 ; 0x1bf0 + + const uint8_t * const data = pkg->addr; + bus->MASTER.DATA = data[transfer.addr_count++]; + 1bd6: 9c 01 movw r18, r24 + 1bd8: 2f 5f subi r18, 0xFF ; 255 + 1bda: 3f 4f sbci r19, 0xFF ; 255 + 1bdc: 20 93 14 22 sts 0x2214, r18 ; 0x802214 + 1be0: 30 93 15 22 sts 0x2215, r19 ; 0x802215 + 1be4: a8 0f add r26, r24 + 1be6: b9 1f adc r27, r25 + 1be8: 11 96 adiw r26, 0x01 ; 1 + 1bea: 8c 91 ld r24, X + 1bec: 87 83 std Z+7, r24 ; 0x07 + 1bee: 5e c0 rjmp .+188 ; 0x1cac + + } else if (transfer.data_count < pkg->length) { + 1bf0: 80 91 16 22 lds r24, 0x2216 ; 0x802216 + 1bf4: 90 91 17 22 lds r25, 0x2217 ; 0x802217 + 1bf8: 18 96 adiw r26, 0x08 ; 8 + 1bfa: 2d 91 ld r18, X+ + 1bfc: 3c 91 ld r19, X + 1bfe: 19 97 sbiw r26, 0x09 ; 9 + 1c00: 82 17 cp r24, r18 + 1c02: 93 07 cpc r25, r19 + 1c04: c8 f4 brcc .+50 ; 0x1c38 + + if (transfer.read) { + 1c06: 20 91 18 22 lds r18, 0x2218 ; 0x802218 + 1c0a: 22 23 and r18, r18 + 1c0c: 21 f0 breq .+8 ; 0x1c16 + + /* Send repeated START condition (Address|R/W=1). */ + + bus->MASTER.ADDR |= 0x01; + 1c0e: 86 81 ldd r24, Z+6 ; 0x06 + 1c10: 81 60 ori r24, 0x01 ; 1 + 1c12: 86 83 std Z+6, r24 ; 0x06 + 1c14: 4b c0 rjmp .+150 ; 0x1cac + + } else { + const uint8_t * const data = pkg->buffer; + 1c16: 16 96 adiw r26, 0x06 ; 6 + 1c18: 2d 91 ld r18, X+ + 1c1a: 3c 91 ld r19, X + 1c1c: 17 97 sbiw r26, 0x07 ; 7 + bus->MASTER.DATA = data[transfer.data_count++]; + 1c1e: ac 01 movw r20, r24 + 1c20: 4f 5f subi r20, 0xFF ; 255 + 1c22: 5f 4f sbci r21, 0xFF ; 255 + 1c24: 40 93 16 22 sts 0x2216, r20 ; 0x802216 + 1c28: 50 93 17 22 sts 0x2217, r21 ; 0x802217 + 1c2c: d9 01 movw r26, r18 + 1c2e: a8 0f add r26, r24 + 1c30: b9 1f adc r27, r25 + 1c32: 8c 91 ld r24, X + 1c34: 87 83 std Z+7, r24 ; 0x07 + 1c36: 3a c0 rjmp .+116 ; 0x1cac + + } else { + + /* Send STOP condition to complete the transaction. */ + + bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + 1c38: 83 e0 ldi r24, 0x03 ; 3 + 1c3a: 83 83 std Z+3, r24 ; 0x03 + transfer.status = STATUS_OK; + 1c3c: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a + 1c40: 35 c0 rjmp .+106 ; 0x1cac + + } else if (master_status & TWI_MASTER_WIF_bm) { + + twim_write_handler(); + + } else if (master_status & TWI_MASTER_RIF_bm) { + 1c42: 88 23 and r24, r24 + 1c44: 84 f5 brge .+96 ; 0x1ca6 + * reading bytes from the TWI slave. + */ +static inline void twim_read_handler(void) +{ + TWI_t * const bus = transfer.bus; + twi_package_t * const pkg = transfer.pkg; + 1c46: a0 e1 ldi r26, 0x10 ; 16 + 1c48: b2 e2 ldi r27, 0x22 ; 34 + 1c4a: 12 96 adiw r26, 0x02 ; 2 + 1c4c: cd 91 ld r28, X+ + 1c4e: dc 91 ld r29, X + 1c50: 13 97 sbiw r26, 0x03 ; 3 + + if (transfer.data_count < pkg->length) { + 1c52: 16 96 adiw r26, 0x06 ; 6 + 1c54: 8d 91 ld r24, X+ + 1c56: 9c 91 ld r25, X + 1c58: 17 97 sbiw r26, 0x07 ; 7 + 1c5a: 28 85 ldd r18, Y+8 ; 0x08 + 1c5c: 39 85 ldd r19, Y+9 ; 0x09 + 1c5e: 82 17 cp r24, r18 + 1c60: 93 07 cpc r25, r19 + 1c62: d8 f4 brcc .+54 ; 0x1c9a + + uint8_t * const data = pkg->buffer; + 1c64: 6e 81 ldd r22, Y+6 ; 0x06 + 1c66: 7f 81 ldd r23, Y+7 ; 0x07 + data[transfer.data_count++] = bus->MASTER.DATA; + 1c68: 9c 01 movw r18, r24 + 1c6a: 2f 5f subi r18, 0xFF ; 255 + 1c6c: 3f 4f sbci r19, 0xFF ; 255 + 1c6e: 20 93 16 22 sts 0x2216, r18 ; 0x802216 + 1c72: 30 93 17 22 sts 0x2217, r19 ; 0x802217 + 1c76: 47 81 ldd r20, Z+7 ; 0x07 + 1c78: db 01 movw r26, r22 + 1c7a: a8 0f add r26, r24 + 1c7c: b9 1f adc r27, r25 + 1c7e: 4c 93 st X, r20 + + /* If there is more to read, issue ACK and start a byte read. + * Otherwise, issue NACK and STOP to complete the transaction. + */ + if (transfer.data_count < pkg->length) { + 1c80: 88 85 ldd r24, Y+8 ; 0x08 + 1c82: 99 85 ldd r25, Y+9 ; 0x09 + 1c84: 28 17 cp r18, r24 + 1c86: 39 07 cpc r19, r25 + 1c88: 18 f4 brcc .+6 ; 0x1c90 + + bus->MASTER.CTRLC = TWI_MASTER_CMD_RECVTRANS_gc; + 1c8a: 82 e0 ldi r24, 0x02 ; 2 + 1c8c: 83 83 std Z+3, r24 ; 0x03 + 1c8e: 0e c0 rjmp .+28 ; 0x1cac + + } else { + + bus->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc; + 1c90: 87 e0 ldi r24, 0x07 ; 7 + 1c92: 83 83 std Z+3, r24 ; 0x03 + transfer.status = STATUS_OK; + 1c94: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a + 1c98: 09 c0 rjmp .+18 ; 0x1cac + + } else { + + /* Issue STOP and buffer overflow condition. */ + + bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + 1c9a: 83 e0 ldi r24, 0x03 ; 3 + 1c9c: 83 83 std Z+3, r24 ; 0x03 + transfer.status = ERR_NO_MEMORY; + 1c9e: 89 ef ldi r24, 0xF9 ; 249 + 1ca0: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a + 1ca4: 03 c0 rjmp .+6 ; 0x1cac + + twim_read_handler(); + + } else { + + transfer.status = ERR_PROTOCOL; + 1ca6: 8b ef ldi r24, 0xFB ; 251 + 1ca8: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a + } +} + 1cac: df 91 pop r29 + 1cae: cf 91 pop r28 + 1cb0: 08 95 ret + +00001cb2 <__vector_13>: + * parameters specified in the global \c transfer structure. + */ +static void twim_interrupt_handler(void); + +#ifdef TWIC +ISR(TWIC_TWIM_vect) { twim_interrupt_handler(); } + 1cb2: 1f 92 push r1 + 1cb4: 0f 92 push r0 + 1cb6: 0f b6 in r0, 0x3f ; 63 + 1cb8: 0f 92 push r0 + 1cba: 11 24 eor r1, r1 + 1cbc: 08 b6 in r0, 0x38 ; 56 + 1cbe: 0f 92 push r0 + 1cc0: 18 be out 0x38, r1 ; 56 + 1cc2: 09 b6 in r0, 0x39 ; 57 + 1cc4: 0f 92 push r0 + 1cc6: 19 be out 0x39, r1 ; 57 + 1cc8: 0b b6 in r0, 0x3b ; 59 + 1cca: 0f 92 push r0 + 1ccc: 1b be out 0x3b, r1 ; 59 + 1cce: 2f 93 push r18 + 1cd0: 3f 93 push r19 + 1cd2: 4f 93 push r20 + 1cd4: 5f 93 push r21 + 1cd6: 6f 93 push r22 + 1cd8: 7f 93 push r23 + 1cda: 8f 93 push r24 + 1cdc: 9f 93 push r25 + 1cde: af 93 push r26 + 1ce0: bf 93 push r27 + 1ce2: ef 93 push r30 + 1ce4: ff 93 push r31 + 1ce6: 4e df rcall .-356 ; 0x1b84 + 1ce8: ff 91 pop r31 + 1cea: ef 91 pop r30 + 1cec: bf 91 pop r27 + 1cee: af 91 pop r26 + 1cf0: 9f 91 pop r25 + 1cf2: 8f 91 pop r24 + 1cf4: 7f 91 pop r23 + 1cf6: 6f 91 pop r22 + 1cf8: 5f 91 pop r21 + 1cfa: 4f 91 pop r20 + 1cfc: 3f 91 pop r19 + 1cfe: 2f 91 pop r18 + 1d00: 0f 90 pop r0 + 1d02: 0b be out 0x3b, r0 ; 59 + 1d04: 0f 90 pop r0 + 1d06: 09 be out 0x39, r0 ; 57 + 1d08: 0f 90 pop r0 + 1d0a: 08 be out 0x38, r0 ; 56 + 1d0c: 0f 90 pop r0 + 1d0e: 0f be out 0x3f, r0 ; 63 + 1d10: 0f 90 pop r0 + 1d12: 1f 90 pop r1 + 1d14: 18 95 reti + +00001d16 <__vector_76>: +#endif +#ifdef TWID +ISR(TWID_TWIM_vect) { twim_interrupt_handler(); } + 1d16: 1f 92 push r1 + 1d18: 0f 92 push r0 + 1d1a: 0f b6 in r0, 0x3f ; 63 + 1d1c: 0f 92 push r0 + 1d1e: 11 24 eor r1, r1 + 1d20: 08 b6 in r0, 0x38 ; 56 + 1d22: 0f 92 push r0 + 1d24: 18 be out 0x38, r1 ; 56 + 1d26: 09 b6 in r0, 0x39 ; 57 + 1d28: 0f 92 push r0 + 1d2a: 19 be out 0x39, r1 ; 57 + 1d2c: 0b b6 in r0, 0x3b ; 59 + 1d2e: 0f 92 push r0 + 1d30: 1b be out 0x3b, r1 ; 59 + 1d32: 2f 93 push r18 + 1d34: 3f 93 push r19 + 1d36: 4f 93 push r20 + 1d38: 5f 93 push r21 + 1d3a: 6f 93 push r22 + 1d3c: 7f 93 push r23 + 1d3e: 8f 93 push r24 + 1d40: 9f 93 push r25 + 1d42: af 93 push r26 + 1d44: bf 93 push r27 + 1d46: ef 93 push r30 + 1d48: ff 93 push r31 + 1d4a: 1c df rcall .-456 ; 0x1b84 + 1d4c: ff 91 pop r31 + 1d4e: ef 91 pop r30 + 1d50: bf 91 pop r27 + 1d52: af 91 pop r26 + 1d54: 9f 91 pop r25 + 1d56: 8f 91 pop r24 + 1d58: 7f 91 pop r23 + 1d5a: 6f 91 pop r22 + 1d5c: 5f 91 pop r21 + 1d5e: 4f 91 pop r20 + 1d60: 3f 91 pop r19 + 1d62: 2f 91 pop r18 + 1d64: 0f 90 pop r0 + 1d66: 0b be out 0x3b, r0 ; 59 + 1d68: 0f 90 pop r0 + 1d6a: 09 be out 0x39, r0 ; 57 + 1d6c: 0f 90 pop r0 + 1d6e: 08 be out 0x38, r0 ; 56 + 1d70: 0f 90 pop r0 + 1d72: 0f be out 0x3f, r0 ; 63 + 1d74: 0f 90 pop r0 + 1d76: 1f 90 pop r1 + 1d78: 18 95 reti + +00001d7a <__vector_46>: +#endif +#ifdef TWIE +ISR(TWIE_TWIM_vect) { twim_interrupt_handler(); } + 1d7a: 1f 92 push r1 + 1d7c: 0f 92 push r0 + 1d7e: 0f b6 in r0, 0x3f ; 63 + 1d80: 0f 92 push r0 + 1d82: 11 24 eor r1, r1 + 1d84: 08 b6 in r0, 0x38 ; 56 + 1d86: 0f 92 push r0 + 1d88: 18 be out 0x38, r1 ; 56 + 1d8a: 09 b6 in r0, 0x39 ; 57 + 1d8c: 0f 92 push r0 + 1d8e: 19 be out 0x39, r1 ; 57 + 1d90: 0b b6 in r0, 0x3b ; 59 + 1d92: 0f 92 push r0 + 1d94: 1b be out 0x3b, r1 ; 59 + 1d96: 2f 93 push r18 + 1d98: 3f 93 push r19 + 1d9a: 4f 93 push r20 + 1d9c: 5f 93 push r21 + 1d9e: 6f 93 push r22 + 1da0: 7f 93 push r23 + 1da2: 8f 93 push r24 + 1da4: 9f 93 push r25 + 1da6: af 93 push r26 + 1da8: bf 93 push r27 + 1daa: ef 93 push r30 + 1dac: ff 93 push r31 + 1dae: ea de rcall .-556 ; 0x1b84 + 1db0: ff 91 pop r31 + 1db2: ef 91 pop r30 + 1db4: bf 91 pop r27 + 1db6: af 91 pop r26 + 1db8: 9f 91 pop r25 + 1dba: 8f 91 pop r24 + 1dbc: 7f 91 pop r23 + 1dbe: 6f 91 pop r22 + 1dc0: 5f 91 pop r21 + 1dc2: 4f 91 pop r20 + 1dc4: 3f 91 pop r19 + 1dc6: 2f 91 pop r18 + 1dc8: 0f 90 pop r0 + 1dca: 0b be out 0x3b, r0 ; 59 + 1dcc: 0f 90 pop r0 + 1dce: 09 be out 0x39, r0 ; 57 + 1dd0: 0f 90 pop r0 + 1dd2: 08 be out 0x38, r0 ; 56 + 1dd4: 0f 90 pop r0 + 1dd6: 0f be out 0x3f, r0 ; 63 + 1dd8: 0f 90 pop r0 + 1dda: 1f 90 pop r1 + 1ddc: 18 95 reti + +00001dde <__vector_107>: +#endif +#ifdef TWIF +ISR(TWIF_TWIM_vect) { twim_interrupt_handler(); } + 1dde: 1f 92 push r1 + 1de0: 0f 92 push r0 + 1de2: 0f b6 in r0, 0x3f ; 63 + 1de4: 0f 92 push r0 + 1de6: 11 24 eor r1, r1 + 1de8: 08 b6 in r0, 0x38 ; 56 + 1dea: 0f 92 push r0 + 1dec: 18 be out 0x38, r1 ; 56 + 1dee: 09 b6 in r0, 0x39 ; 57 + 1df0: 0f 92 push r0 + 1df2: 19 be out 0x39, r1 ; 57 + 1df4: 0b b6 in r0, 0x3b ; 59 + 1df6: 0f 92 push r0 + 1df8: 1b be out 0x3b, r1 ; 59 + 1dfa: 2f 93 push r18 + 1dfc: 3f 93 push r19 + 1dfe: 4f 93 push r20 + 1e00: 5f 93 push r21 + 1e02: 6f 93 push r22 + 1e04: 7f 93 push r23 + 1e06: 8f 93 push r24 + 1e08: 9f 93 push r25 + 1e0a: af 93 push r26 + 1e0c: bf 93 push r27 + 1e0e: ef 93 push r30 + 1e10: ff 93 push r31 + 1e12: b8 de rcall .-656 ; 0x1b84 + 1e14: ff 91 pop r31 + 1e16: ef 91 pop r30 + 1e18: bf 91 pop r27 + 1e1a: af 91 pop r26 + 1e1c: 9f 91 pop r25 + 1e1e: 8f 91 pop r24 + 1e20: 7f 91 pop r23 + 1e22: 6f 91 pop r22 + 1e24: 5f 91 pop r21 + 1e26: 4f 91 pop r20 + 1e28: 3f 91 pop r19 + 1e2a: 2f 91 pop r18 + 1e2c: 0f 90 pop r0 + 1e2e: 0b be out 0x3b, r0 ; 59 + 1e30: 0f 90 pop r0 + 1e32: 09 be out 0x39, r0 ; 57 + 1e34: 0f 90 pop r0 + 1e36: 08 be out 0x38, r0 ; 56 + 1e38: 0f 90 pop r0 + 1e3a: 0f be out 0x3f, r0 ; 63 + 1e3c: 0f 90 pop r0 + 1e3e: 1f 90 pop r1 + 1e40: 18 95 reti + +00001e42 : + * (see \ref twi_options_t) + * \retval STATUS_OK Transaction is successful + * \retval ERR_INVALID_ARG Invalid arguments in \c opt. + */ +status_code_t twi_master_init(TWI_t *twi, const twi_options_t *opt) +{ + 1e42: fc 01 movw r30, r24 + uint8_t const ctrla = CONF_TWIM_INTLVL | TWI_MASTER_RIEN_bm | + TWI_MASTER_WIEN_bm | TWI_MASTER_ENABLE_bm; + + twi->MASTER.BAUD = opt->speed_reg; + 1e44: db 01 movw r26, r22 + 1e46: 14 96 adiw r26, 0x04 ; 4 + 1e48: 8c 91 ld r24, X + 1e4a: 85 83 std Z+5, r24 ; 0x05 + twi->MASTER.CTRLA = ctrla; + 1e4c: 88 eb ldi r24, 0xB8 ; 184 + 1e4e: 81 83 std Z+1, r24 ; 0x01 + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc; + 1e50: 81 e0 ldi r24, 0x01 ; 1 + 1e52: 84 83 std Z+4, r24 ; 0x04 + + transfer.locked = false; + 1e54: e0 e1 ldi r30, 0x10 ; 16 + 1e56: f2 e2 ldi r31, 0x22 ; 34 + 1e58: 11 86 std Z+9, r1 ; 0x09 + transfer.status = STATUS_OK; + 1e5a: 12 86 std Z+10, r1 ; 0x0a + + /* Enable configured PMIC interrupt level. */ + + PMIC.CTRL |= CONF_PMIC_INTLVL; + 1e5c: e0 ea ldi r30, 0xA0 ; 160 + 1e5e: f0 e0 ldi r31, 0x00 ; 0 + 1e60: 82 81 ldd r24, Z+2 ; 0x02 + 1e62: 82 60 ori r24, 0x02 ; 2 + 1e64: 82 83 std Z+2, r24 ; 0x02 + + cpu_irq_enable(); + 1e66: 78 94 sei + + return STATUS_OK; +} + 1e68: 80 e0 ldi r24, 0x00 ; 0 + 1e6a: 08 95 ret + +00001e6c : + * - ERR_PROTOCOL to indicate an unexpected bus state + * - ERR_INVALID_ARG to indicate invalid arguments. + */ +status_code_t twi_master_transfer(TWI_t *twi, + const twi_package_t *package, bool read) +{ + 1e6c: cf 93 push r28 + 1e6e: df 93 push r29 + 1e70: 1f 92 push r1 + 1e72: cd b7 in r28, 0x3d ; 61 + 1e74: de b7 in r29, 0x3e ; 62 + 1e76: 9c 01 movw r18, r24 + 1e78: fb 01 movw r30, r22 + /* Do a sanity check on the arguments. */ + + if ((twi == NULL) || (package == NULL)) { + 1e7a: 89 2b or r24, r25 + 1e7c: 09 f4 brne .+2 ; 0x1e80 + 1e7e: 51 c0 rjmp .+162 ; 0x1f22 + 1e80: 30 97 sbiw r30, 0x00 ; 0 + 1e82: 09 f4 brne .+2 ; 0x1e86 + 1e84: 50 c0 rjmp .+160 ; 0x1f26 + return ERR_INVALID_ARG; + } + + /* Initiate a transaction when the bus is ready. */ + + status_code_t status = twim_acquire(package->no_wait); + 1e86: 92 85 ldd r25, Z+10 ; 0x0a + * + * \return STATUS_OK if the bus is acquired, else ERR_BUSY. + */ +static inline status_code_t twim_acquire(bool no_wait) +{ + while (transfer.locked) { + 1e88: 80 91 19 22 lds r24, 0x2219 ; 0x802219 + 1e8c: 88 23 and r24, r24 + 1e8e: 19 f0 breq .+6 ; 0x1e96 + + if (no_wait) { return ERR_BUSY; } + 1e90: 99 23 and r25, r25 + 1e92: f1 f3 breq .-4 ; 0x1e90 + 1e94: 4a c0 rjmp .+148 ; 0x1f2a + +typedef uint8_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + volatile irqflags_t flags = SREG; + 1e96: 8f b7 in r24, 0x3f ; 63 + 1e98: 89 83 std Y+1, r24 ; 0x01 + cpu_irq_disable(); + 1e9a: f8 94 cli + return flags; + 1e9c: 89 81 ldd r24, Y+1 ; 0x01 + } + + irqflags_t const flags = cpu_irq_save (); + + transfer.locked = true; + 1e9e: a0 e1 ldi r26, 0x10 ; 16 + 1ea0: b2 e2 ldi r27, 0x22 ; 34 + 1ea2: 91 e0 ldi r25, 0x01 ; 1 + 1ea4: 19 96 adiw r26, 0x09 ; 9 + 1ea6: 9c 93 st X, r25 + 1ea8: 19 97 sbiw r26, 0x09 ; 9 + transfer.status = OPERATION_IN_PROGRESS; + 1eaa: 90 e8 ldi r25, 0x80 ; 128 + 1eac: 1a 96 adiw r26, 0x0a ; 10 + 1eae: 9c 93 st X, r25 + 1eb0: 1a 97 sbiw r26, 0x0a ; 10 +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); + SREG = flags; + 1eb2: 8f bf out 0x3f, r24 ; 63 + /* Initiate a transaction when the bus is ready. */ + + status_code_t status = twim_acquire(package->no_wait); + + if (STATUS_OK == status) { + transfer.bus = (TWI_t *) twi; + 1eb4: 2d 93 st X+, r18 + 1eb6: 3c 93 st X, r19 + 1eb8: 11 97 sbiw r26, 0x01 ; 1 + transfer.pkg = (twi_package_t *) package; + 1eba: 12 96 adiw r26, 0x02 ; 2 + 1ebc: 6d 93 st X+, r22 + 1ebe: 7c 93 st X, r23 + 1ec0: 13 97 sbiw r26, 0x03 ; 3 + transfer.addr_count = 0; + 1ec2: 14 96 adiw r26, 0x04 ; 4 + 1ec4: 1d 92 st X+, r1 + 1ec6: 1c 92 st X, r1 + 1ec8: 15 97 sbiw r26, 0x05 ; 5 + transfer.data_count = 0; + 1eca: 16 96 adiw r26, 0x06 ; 6 + 1ecc: 1d 92 st X+, r1 + 1ece: 1c 92 st X, r1 + 1ed0: 17 97 sbiw r26, 0x07 ; 7 + transfer.read = read; + 1ed2: 18 96 adiw r26, 0x08 ; 8 + 1ed4: 4c 93 st X, r20 + + uint8_t const chip = (package->chip) << 1; + 1ed6: 80 81 ld r24, Z + 1ed8: 88 0f add r24, r24 + + if (package->addr_length || (false == read)) { + 1eda: 64 81 ldd r22, Z+4 ; 0x04 + 1edc: 75 81 ldd r23, Z+5 ; 0x05 + 1ede: 67 2b or r22, r23 + 1ee0: 11 f4 brne .+4 ; 0x1ee6 + 1ee2: 41 11 cpse r20, r1 + 1ee4: 03 c0 rjmp .+6 ; 0x1eec + transfer.bus->MASTER.ADDR = chip; + 1ee6: f9 01 movw r30, r18 + 1ee8: 86 83 std Z+6, r24 ; 0x06 + 1eea: 03 c0 rjmp .+6 ; 0x1ef2 + } else if (read) { + transfer.bus->MASTER.ADDR = chip | 0x01; + 1eec: 81 60 ori r24, 0x01 ; 1 + 1eee: f9 01 movw r30, r18 + 1ef0: 86 83 std Z+6, r24 ; 0x06 +{ + /* First wait for the driver event handler to indicate something + * other than a transfer in-progress, then test the bus interface + * for an Idle bus state. + */ + while (OPERATION_IN_PROGRESS == transfer.status); + 1ef2: e0 e1 ldi r30, 0x10 ; 16 + 1ef4: f2 e2 ldi r31, 0x22 ; 34 + 1ef6: 92 85 ldd r25, Z+10 ; 0x0a + 1ef8: 90 38 cpi r25, 0x80 ; 128 + 1efa: e9 f3 breq .-6 ; 0x1ef6 + * \retval false The bus is currently busy. + */ +static inline bool twim_idle (const TWI_t * twi) +{ + + return ((twi->MASTER.STATUS & TWI_MASTER_BUSSTATE_gm) + 1efc: f9 01 movw r30, r18 + 1efe: 84 81 ldd r24, Z+4 ; 0x04 + * other than a transfer in-progress, then test the bus interface + * for an Idle bus state. + */ + while (OPERATION_IN_PROGRESS == transfer.status); + + while (! twim_idle(transfer.bus)) { barrier(); } + 1f00: 83 70 andi r24, 0x03 ; 3 + 1f02: 81 30 cpi r24, 0x01 ; 1 + 1f04: 49 f0 breq .+18 ; 0x1f18 + 1f06: a0 e1 ldi r26, 0x10 ; 16 + 1f08: b2 e2 ldi r27, 0x22 ; 34 + 1f0a: ed 91 ld r30, X+ + 1f0c: fc 91 ld r31, X + 1f0e: 11 97 sbiw r26, 0x01 ; 1 + * \retval false The bus is currently busy. + */ +static inline bool twim_idle (const TWI_t * twi) +{ + + return ((twi->MASTER.STATUS & TWI_MASTER_BUSSTATE_gm) + 1f10: 84 81 ldd r24, Z+4 ; 0x04 + * other than a transfer in-progress, then test the bus interface + * for an Idle bus state. + */ + while (OPERATION_IN_PROGRESS == transfer.status); + + while (! twim_idle(transfer.bus)) { barrier(); } + 1f12: 83 70 andi r24, 0x03 ; 3 + 1f14: 81 30 cpi r24, 0x01 ; 1 + 1f16: c9 f7 brne .-14 ; 0x1f0a + + status_code_t const status = transfer.status; + 1f18: e0 e1 ldi r30, 0x10 ; 16 + 1f1a: f2 e2 ldi r31, 0x22 ; 34 + 1f1c: 82 85 ldd r24, Z+10 ; 0x0a + + transfer.locked = false; + 1f1e: 11 86 std Z+9, r1 ; 0x09 + 1f20: 05 c0 rjmp .+10 ; 0x1f2c + const twi_package_t *package, bool read) +{ + /* Do a sanity check on the arguments. */ + + if ((twi == NULL) || (package == NULL)) { + return ERR_INVALID_ARG; + 1f22: 88 ef ldi r24, 0xF8 ; 248 + 1f24: 03 c0 rjmp .+6 ; 0x1f2c + 1f26: 88 ef ldi r24, 0xF8 ; 248 + 1f28: 01 c0 rjmp .+2 ; 0x1f2c + */ +static inline status_code_t twim_acquire(bool no_wait) +{ + while (transfer.locked) { + + if (no_wait) { return ERR_BUSY; } + 1f2a: 86 ef ldi r24, 0xF6 ; 246 + + status = twim_release(); + } + + return status; +} + 1f2c: 0f 90 pop r0 + 1f2e: df 91 pop r29 + 1f30: cf 91 pop r28 + 1f32: 08 95 ret + +00001f34 : + + if (baud_offset != USART_BAUD_UNDEFINED) { + (usart)->BAUDCTRLB = (uint8_t)((uint16_t)baudctrl); + (usart)->BAUDCTRLA = (uint8_t)((uint16_t)baudctrl >> 8); + } +} + 1f34: fc 01 movw r30, r24 + 1f36: 91 81 ldd r25, Z+1 ; 0x01 + 1f38: 95 ff sbrs r25, 5 + 1f3a: fd cf rjmp .-6 ; 0x1f36 + 1f3c: 60 83 st Z, r22 + 1f3e: 80 e0 ldi r24, 0x00 ; 0 + 1f40: 90 e0 ldi r25, 0x00 ; 0 + 1f42: 08 95 ret + +00001f44 : + 1f44: fc 01 movw r30, r24 + 1f46: 91 81 ldd r25, Z+1 ; 0x01 + 1f48: 99 23 and r25, r25 + 1f4a: ec f7 brge .-6 ; 0x1f46 + 1f4c: 80 81 ld r24, Z + 1f4e: 08 95 ret + +00001f50 : + * \retval true if the hardware supports the baud rate + * \retval false if the hardware does not support the baud rate (i.e. it's + * either too high or too low.) + */ +bool usart_set_baudrate(USART_t *usart, uint32_t baud, uint32_t cpu_hz) +{ + 1f50: 4f 92 push r4 + 1f52: 5f 92 push r5 + 1f54: 6f 92 push r6 + 1f56: 7f 92 push r7 + 1f58: 8f 92 push r8 + 1f5a: 9f 92 push r9 + 1f5c: af 92 push r10 + 1f5e: bf 92 push r11 + 1f60: ef 92 push r14 + 1f62: ff 92 push r15 + 1f64: 0f 93 push r16 + 1f66: 1f 93 push r17 + 1f68: cf 93 push r28 + 1f6a: 7c 01 movw r14, r24 + 1f6c: 4a 01 movw r8, r20 + 1f6e: 5b 01 movw r10, r22 + 1f70: 28 01 movw r4, r16 + 1f72: 39 01 movw r6, r18 + /* 8 = (2^0) * 8 * (2^0) = (2^BSCALE_MIN) * 8 * (BSEL_MIN) */ + max_rate = cpu_hz / 8; + /* 4194304 = (2^7) * 8 * (2^12) = (2^BSCALE_MAX) * 8 * (BSEL_MAX+1) */ + min_rate = cpu_hz / 4194304; + + if (!((usart)->CTRLB & USART_CLK2X_bm)) { + 1f74: fc 01 movw r30, r24 + 1f76: 84 81 ldd r24, Z+4 ; 0x04 + 1f78: 82 ff sbrs r24, 2 + 1f7a: 16 c0 rjmp .+44 ; 0x1fa8 + + /* + * Check if the hardware supports the given baud rate + */ + /* 8 = (2^0) * 8 * (2^0) = (2^BSCALE_MIN) * 8 * (BSEL_MIN) */ + max_rate = cpu_hz / 8; + 1f7c: d9 01 movw r26, r18 + 1f7e: c8 01 movw r24, r16 + 1f80: 68 94 set + 1f82: 12 f8 bld r1, 2 + 1f84: b6 95 lsr r27 + 1f86: a7 95 ror r26 + 1f88: 97 95 ror r25 + 1f8a: 87 95 ror r24 + 1f8c: 16 94 lsr r1 + 1f8e: d1 f7 brne .-12 ; 0x1f84 + /* 4194304 = (2^7) * 8 * (2^12) = (2^BSCALE_MAX) * 8 * (BSEL_MAX+1) */ + min_rate = cpu_hz / 4194304; + 1f90: b9 01 movw r22, r18 + 1f92: a8 01 movw r20, r16 + 1f94: 03 2e mov r0, r19 + 1f96: 36 e1 ldi r19, 0x16 ; 22 + 1f98: 76 95 lsr r23 + 1f9a: 67 95 ror r22 + 1f9c: 57 95 ror r21 + 1f9e: 47 95 ror r20 + 1fa0: 3a 95 dec r19 + 1fa2: d1 f7 brne .-12 ; 0x1f98 + 1fa4: 30 2d mov r19, r0 + 1fa6: 15 c0 rjmp .+42 ; 0x1fd2 + + if (!((usart)->CTRLB & USART_CLK2X_bm)) { + max_rate /= 2; + 1fa8: d9 01 movw r26, r18 + 1faa: c8 01 movw r24, r16 + 1fac: 68 94 set + 1fae: 13 f8 bld r1, 3 + 1fb0: b6 95 lsr r27 + 1fb2: a7 95 ror r26 + 1fb4: 97 95 ror r25 + 1fb6: 87 95 ror r24 + 1fb8: 16 94 lsr r1 + 1fba: d1 f7 brne .-12 ; 0x1fb0 + min_rate /= 2; + 1fbc: b9 01 movw r22, r18 + 1fbe: a8 01 movw r20, r16 + 1fc0: 03 2e mov r0, r19 + 1fc2: 37 e1 ldi r19, 0x17 ; 23 + 1fc4: 76 95 lsr r23 + 1fc6: 67 95 ror r22 + 1fc8: 57 95 ror r21 + 1fca: 47 95 ror r20 + 1fcc: 3a 95 dec r19 + 1fce: d1 f7 brne .-12 ; 0x1fc4 + 1fd0: 30 2d mov r19, r0 + } + + if ((baud > max_rate) || (baud < min_rate)) { + 1fd2: 88 15 cp r24, r8 + 1fd4: 99 05 cpc r25, r9 + 1fd6: aa 05 cpc r26, r10 + 1fd8: bb 05 cpc r27, r11 + 1fda: 08 f4 brcc .+2 ; 0x1fde + 1fdc: a6 c0 rjmp .+332 ; 0x212a + 1fde: 84 16 cp r8, r20 + 1fe0: 95 06 cpc r9, r21 + 1fe2: a6 06 cpc r10, r22 + 1fe4: b7 06 cpc r11, r23 + 1fe6: 08 f4 brcc .+2 ; 0x1fea + 1fe8: a2 c0 rjmp .+324 ; 0x212e + return false; + } + + /* Check if double speed is enabled. */ + if (!((usart)->CTRLB & USART_CLK2X_bm)) { + 1fea: f7 01 movw r30, r14 + 1fec: 84 81 ldd r24, Z+4 ; 0x04 + 1fee: 82 fd sbrc r24, 2 + 1ff0: 04 c0 rjmp .+8 ; 0x1ffa + baud *= 2; + 1ff2: 88 0c add r8, r8 + 1ff4: 99 1c adc r9, r9 + 1ff6: aa 1c adc r10, r10 + 1ff8: bb 1c adc r11, r11 + } + + /* Find the lowest possible exponent. */ + limit = 0xfffU >> 4; + ratio = cpu_hz / baud; + 1ffa: c3 01 movw r24, r6 + 1ffc: b2 01 movw r22, r4 + 1ffe: a5 01 movw r20, r10 + 2000: 94 01 movw r18, r8 + 2002: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + + for (exp = -7; exp < 7; exp++) { + if (ratio < limit) { + 2006: 2f 3f cpi r18, 0xFF ; 255 + 2008: 31 05 cpc r19, r1 + 200a: 41 05 cpc r20, r1 + 200c: 51 05 cpc r21, r1 + 200e: 08 f4 brcc .+2 ; 0x2012 + 2010: 90 c0 rjmp .+288 ; 0x2132 + 2012: 8f ef ldi r24, 0xFF ; 255 + 2014: 90 e0 ldi r25, 0x00 ; 0 + 2016: a0 e0 ldi r26, 0x00 ; 0 + 2018: b0 e0 ldi r27, 0x00 ; 0 + 201a: c9 ef ldi r28, 0xF9 ; 249 + 201c: 05 c0 rjmp .+10 ; 0x2028 + 201e: 28 17 cp r18, r24 + 2020: 39 07 cpc r19, r25 + 2022: 4a 07 cpc r20, r26 + 2024: 5b 07 cpc r21, r27 + 2026: 58 f0 brcs .+22 ; 0x203e + break; + } + + limit <<= 1; + 2028: 88 0f add r24, r24 + 202a: 99 1f adc r25, r25 + 202c: aa 1f adc r26, r26 + 202e: bb 1f adc r27, r27 + + if (exp < -3) { + 2030: cd 3f cpi r28, 0xFD ; 253 + 2032: 0c f4 brge .+2 ; 0x2036 + limit |= 1; + 2034: 81 60 ori r24, 0x01 ; 1 + 2036: cf 5f subi r28, 0xFF ; 255 + + /* Find the lowest possible exponent. */ + limit = 0xfffU >> 4; + ratio = cpu_hz / baud; + + for (exp = -7; exp < 7; exp++) { + 2038: c7 30 cpi r28, 0x07 ; 7 + 203a: 89 f7 brne .-30 ; 0x201e + 203c: 4f c0 rjmp .+158 ; 0x20dc + * point. + * + * The formula for calculating BSEL is slightly different when exp is + * negative than it is when exp is positive. + */ + if (exp < 0) { + 203e: cc 23 and r28, r28 + 2040: 0c f0 brlt .+2 ; 0x2044 + 2042: 4c c0 rjmp .+152 ; 0x20dc + /* We are supposed to subtract 1, then apply BSCALE. We want to + * apply BSCALE first, so we need to turn everything inside the + * parenthesis into a single fractional expression. + */ + cpu_hz -= 8 * baud; + 2044: d5 01 movw r26, r10 + 2046: c4 01 movw r24, r8 + 2048: 88 0f add r24, r24 + 204a: 99 1f adc r25, r25 + 204c: aa 1f adc r26, r26 + 204e: bb 1f adc r27, r27 + 2050: 88 0f add r24, r24 + 2052: 99 1f adc r25, r25 + 2054: aa 1f adc r26, r26 + 2056: bb 1f adc r27, r27 + 2058: 88 0f add r24, r24 + 205a: 99 1f adc r25, r25 + 205c: aa 1f adc r26, r26 + 205e: bb 1f adc r27, r27 + 2060: 48 1a sub r4, r24 + 2062: 59 0a sbc r5, r25 + 2064: 6a 0a sbc r6, r26 + 2066: 7b 0a sbc r7, r27 + /* If we end up with a left-shift after taking the final + * divide-by-8 into account, do the shift before the divide. + * Otherwise, left-shift the denominator instead (effectively + * resulting in an overall right shift.) + */ + if (exp <= -3) { + 2068: ce 3f cpi r28, 0xFE ; 254 + 206a: f4 f4 brge .+60 ; 0x20a8 + div = ((cpu_hz << (-exp - 3)) + baud / 2) / baud; + 206c: 8d ef ldi r24, 0xFD ; 253 + 206e: 9f ef ldi r25, 0xFF ; 255 + 2070: 8c 1b sub r24, r28 + 2072: 91 09 sbc r25, r1 + 2074: c7 fd sbrc r28, 7 + 2076: 93 95 inc r25 + 2078: 04 c0 rjmp .+8 ; 0x2082 + 207a: 44 0c add r4, r4 + 207c: 55 1c adc r5, r5 + 207e: 66 1c adc r6, r6 + 2080: 77 1c adc r7, r7 + 2082: 8a 95 dec r24 + 2084: d2 f7 brpl .-12 ; 0x207a + 2086: d5 01 movw r26, r10 + 2088: c4 01 movw r24, r8 + 208a: b6 95 lsr r27 + 208c: a7 95 ror r26 + 208e: 97 95 ror r25 + 2090: 87 95 ror r24 + 2092: bc 01 movw r22, r24 + 2094: cd 01 movw r24, r26 + 2096: 64 0d add r22, r4 + 2098: 75 1d adc r23, r5 + 209a: 86 1d adc r24, r6 + 209c: 97 1d adc r25, r7 + 209e: a5 01 movw r20, r10 + 20a0: 94 01 movw r18, r8 + 20a2: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 20a6: 37 c0 rjmp .+110 ; 0x2116 + } else { + baud <<= exp + 3; + 20a8: 83 e0 ldi r24, 0x03 ; 3 + 20aa: 8c 0f add r24, r28 + 20ac: a5 01 movw r20, r10 + 20ae: 94 01 movw r18, r8 + 20b0: 04 c0 rjmp .+8 ; 0x20ba + 20b2: 22 0f add r18, r18 + 20b4: 33 1f adc r19, r19 + 20b6: 44 1f adc r20, r20 + 20b8: 55 1f adc r21, r21 + 20ba: 8a 95 dec r24 + 20bc: d2 f7 brpl .-12 ; 0x20b2 + div = (cpu_hz + baud / 2) / baud; + 20be: da 01 movw r26, r20 + 20c0: c9 01 movw r24, r18 + 20c2: b6 95 lsr r27 + 20c4: a7 95 ror r26 + 20c6: 97 95 ror r25 + 20c8: 87 95 ror r24 + 20ca: bc 01 movw r22, r24 + 20cc: cd 01 movw r24, r26 + 20ce: 64 0d add r22, r4 + 20d0: 75 1d adc r23, r5 + 20d2: 86 1d adc r24, r6 + 20d4: 97 1d adc r25, r7 + 20d6: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 20da: 1d c0 rjmp .+58 ; 0x2116 + } + } else { + /* We will always do a right shift in this case, but we need to + * shift three extra positions because of the divide-by-8. + */ + baud <<= exp + 3; + 20dc: 83 e0 ldi r24, 0x03 ; 3 + 20de: 8c 0f add r24, r28 + 20e0: a5 01 movw r20, r10 + 20e2: 94 01 movw r18, r8 + 20e4: 04 c0 rjmp .+8 ; 0x20ee + 20e6: 22 0f add r18, r18 + 20e8: 33 1f adc r19, r19 + 20ea: 44 1f adc r20, r20 + 20ec: 55 1f adc r21, r21 + 20ee: 8a 95 dec r24 + 20f0: d2 f7 brpl .-12 ; 0x20e6 + div = (cpu_hz + baud / 2) / baud - 1; + 20f2: da 01 movw r26, r20 + 20f4: c9 01 movw r24, r18 + 20f6: b6 95 lsr r27 + 20f8: a7 95 ror r26 + 20fa: 97 95 ror r25 + 20fc: 87 95 ror r24 + 20fe: bc 01 movw r22, r24 + 2100: cd 01 movw r24, r26 + 2102: 64 0d add r22, r4 + 2104: 75 1d adc r23, r5 + 2106: 86 1d adc r24, r6 + 2108: 97 1d adc r25, r7 + 210a: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 210e: 21 50 subi r18, 0x01 ; 1 + 2110: 31 09 sbc r19, r1 + 2112: 41 09 sbc r20, r1 + 2114: 51 09 sbc r21, r1 + } + + (usart)->BAUDCTRLB = (uint8_t)(((div >> 8) & 0X0F) | (exp << 4)); + 2116: 83 2f mov r24, r19 + 2118: 8f 70 andi r24, 0x0F ; 15 + 211a: c2 95 swap r28 + 211c: c0 7f andi r28, 0xF0 ; 240 + 211e: c8 2b or r28, r24 + 2120: f7 01 movw r30, r14 + 2122: c7 83 std Z+7, r28 ; 0x07 + (usart)->BAUDCTRLA = (uint8_t)div; + 2124: 26 83 std Z+6, r18 ; 0x06 + + return true; + 2126: 81 e0 ldi r24, 0x01 ; 1 + 2128: 18 c0 rjmp .+48 ; 0x215a + max_rate /= 2; + min_rate /= 2; + } + + if ((baud > max_rate) || (baud < min_rate)) { + return false; + 212a: 80 e0 ldi r24, 0x00 ; 0 + 212c: 16 c0 rjmp .+44 ; 0x215a + 212e: 80 e0 ldi r24, 0x00 ; 0 + 2130: 14 c0 rjmp .+40 ; 0x215a + if (exp < 0) { + /* We are supposed to subtract 1, then apply BSCALE. We want to + * apply BSCALE first, so we need to turn everything inside the + * parenthesis into a single fractional expression. + */ + cpu_hz -= 8 * baud; + 2132: d5 01 movw r26, r10 + 2134: c4 01 movw r24, r8 + 2136: 88 0f add r24, r24 + 2138: 99 1f adc r25, r25 + 213a: aa 1f adc r26, r26 + 213c: bb 1f adc r27, r27 + 213e: 88 0f add r24, r24 + 2140: 99 1f adc r25, r25 + 2142: aa 1f adc r26, r26 + 2144: bb 1f adc r27, r27 + 2146: 88 0f add r24, r24 + 2148: 99 1f adc r25, r25 + 214a: aa 1f adc r26, r26 + 214c: bb 1f adc r27, r27 + 214e: 48 1a sub r4, r24 + 2150: 59 0a sbc r5, r25 + 2152: 6a 0a sbc r6, r26 + 2154: 7b 0a sbc r7, r27 + + /* Find the lowest possible exponent. */ + limit = 0xfffU >> 4; + ratio = cpu_hz / baud; + + for (exp = -7; exp < 7; exp++) { + 2156: c9 ef ldi r28, 0xF9 ; 249 + 2158: 89 cf rjmp .-238 ; 0x206c + + (usart)->BAUDCTRLB = (uint8_t)(((div >> 8) & 0X0F) | (exp << 4)); + (usart)->BAUDCTRLA = (uint8_t)div; + + return true; +} + 215a: cf 91 pop r28 + 215c: 1f 91 pop r17 + 215e: 0f 91 pop r16 + 2160: ff 90 pop r15 + 2162: ef 90 pop r14 + 2164: bf 90 pop r11 + 2166: af 90 pop r10 + 2168: 9f 90 pop r9 + 216a: 8f 90 pop r8 + 216c: 7f 90 pop r7 + 216e: 6f 90 pop r6 + 2170: 5f 90 pop r5 + 2172: 4f 90 pop r4 + 2174: 08 95 ret + +00002176 : + * + * \retval true if the initialization was successfull + * \retval false if the initialization failed (error in baud rate calculation) + */ +bool usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt) +{ + 2176: 0f 93 push r16 + 2178: 1f 93 push r17 + 217a: cf 93 push r28 + 217c: df 93 push r29 + 217e: ec 01 movw r28, r24 + 2180: 8b 01 movw r16, r22 + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_enable_peripheral_clock(const volatile void *module) +{ + if (module == NULL) { + 2182: 00 97 sbiw r24, 0x00 ; 0 + 2184: 09 f4 brne .+2 ; 0x2188 + 2186: 5d c1 rjmp .+698 ; 0x2442 + Assert(false); + } +#ifdef AES + else if (module == &AES) { + 2188: 80 3c cpi r24, 0xC0 ; 192 + 218a: 91 05 cpc r25, r1 + 218c: 29 f4 brne .+10 ; 0x2198 + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES); + 218e: 60 e1 ldi r22, 0x10 ; 16 + 2190: 80 e0 ldi r24, 0x00 ; 0 + 2192: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2196: 55 c1 rjmp .+682 ; 0x2442 + } +#endif +#ifdef EBI + else if (module == &EBI) { + 2198: c0 34 cpi r28, 0x40 ; 64 + 219a: 84 e0 ldi r24, 0x04 ; 4 + 219c: d8 07 cpc r29, r24 + 219e: 29 f4 brne .+10 ; 0x21aa + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EBI); + 21a0: 68 e0 ldi r22, 0x08 ; 8 + 21a2: 80 e0 ldi r24, 0x00 ; 0 + 21a4: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 21a8: 4c c1 rjmp .+664 ; 0x2442 + } +#endif +#ifdef RTC + else if (module == &RTC) { + 21aa: c1 15 cp r28, r1 + 21ac: e4 e0 ldi r30, 0x04 ; 4 + 21ae: de 07 cpc r29, r30 + 21b0: 29 f4 brne .+10 ; 0x21bc + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); + 21b2: 64 e0 ldi r22, 0x04 ; 4 + 21b4: 80 e0 ldi r24, 0x00 ; 0 + 21b6: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 21ba: 43 c1 rjmp .+646 ; 0x2442 + } +#endif +#ifdef EVSYS + else if (module == &EVSYS) { + 21bc: c0 38 cpi r28, 0x80 ; 128 + 21be: f1 e0 ldi r31, 0x01 ; 1 + 21c0: df 07 cpc r29, r31 + 21c2: 29 f4 brne .+10 ; 0x21ce + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS); + 21c4: 62 e0 ldi r22, 0x02 ; 2 + 21c6: 80 e0 ldi r24, 0x00 ; 0 + 21c8: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 21cc: 3a c1 rjmp .+628 ; 0x2442 + } +#endif +#ifdef DMA + else if (module == &DMA) { + 21ce: c1 15 cp r28, r1 + 21d0: 81 e0 ldi r24, 0x01 ; 1 + 21d2: d8 07 cpc r29, r24 + 21d4: 29 f4 brne .+10 ; 0x21e0 + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_DMA); + 21d6: 61 e0 ldi r22, 0x01 ; 1 + 21d8: 80 e0 ldi r24, 0x00 ; 0 + 21da: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 21de: 31 c1 rjmp .+610 ; 0x2442 + else if (module == &EDMA) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA); + } +#endif +#ifdef ACA + else if (module == &ACA) { + 21e0: c0 38 cpi r28, 0x80 ; 128 + 21e2: e3 e0 ldi r30, 0x03 ; 3 + 21e4: de 07 cpc r29, r30 + 21e6: 29 f4 brne .+10 ; 0x21f2 + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_AC); + 21e8: 61 e0 ldi r22, 0x01 ; 1 + 21ea: 81 e0 ldi r24, 0x01 ; 1 + 21ec: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 21f0: 28 c1 rjmp .+592 ; 0x2442 + } +#endif +#ifdef ACB + else if (module == &ACB) { + 21f2: c0 39 cpi r28, 0x90 ; 144 + 21f4: f3 e0 ldi r31, 0x03 ; 3 + 21f6: df 07 cpc r29, r31 + 21f8: 29 f4 brne .+10 ; 0x2204 + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC); + 21fa: 61 e0 ldi r22, 0x01 ; 1 + 21fc: 82 e0 ldi r24, 0x02 ; 2 + 21fe: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2202: 1f c1 rjmp .+574 ; 0x2442 + } +#endif +#ifdef ADCA + else if (module == &ADCA) { + 2204: c1 15 cp r28, r1 + 2206: 82 e0 ldi r24, 0x02 ; 2 + 2208: d8 07 cpc r29, r24 + 220a: 29 f4 brne .+10 ; 0x2216 + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC); + 220c: 62 e0 ldi r22, 0x02 ; 2 + 220e: 81 e0 ldi r24, 0x01 ; 1 + 2210: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2214: 16 c1 rjmp .+556 ; 0x2442 + } +#endif +#ifdef ADCB + else if (module == &ADCB) { + 2216: c0 34 cpi r28, 0x40 ; 64 + 2218: e2 e0 ldi r30, 0x02 ; 2 + 221a: de 07 cpc r29, r30 + 221c: 29 f4 brne .+10 ; 0x2228 + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC); + 221e: 62 e0 ldi r22, 0x02 ; 2 + 2220: 82 e0 ldi r24, 0x02 ; 2 + 2222: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2226: 0d c1 rjmp .+538 ; 0x2442 + } +#endif +#ifdef DACA + else if (module == &DACA) { + 2228: c1 15 cp r28, r1 + 222a: f3 e0 ldi r31, 0x03 ; 3 + 222c: df 07 cpc r29, r31 + 222e: 29 f4 brne .+10 ; 0x223a + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_DAC); + 2230: 64 e0 ldi r22, 0x04 ; 4 + 2232: 81 e0 ldi r24, 0x01 ; 1 + 2234: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2238: 04 c1 rjmp .+520 ; 0x2442 + } +#endif +// Workaround for bad XMEGA D header file +#if !XMEGA_D +#ifdef DACB + else if (module == &DACB) { + 223a: c0 32 cpi r28, 0x20 ; 32 + 223c: 83 e0 ldi r24, 0x03 ; 3 + 223e: d8 07 cpc r29, r24 + 2240: 29 f4 brne .+10 ; 0x224c + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_DAC); + 2242: 64 e0 ldi r22, 0x04 ; 4 + 2244: 82 e0 ldi r24, 0x02 ; 2 + 2246: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 224a: fb c0 rjmp .+502 ; 0x2442 + } +#endif +#endif // Workaround end +#ifdef TCC0 + else if (module == &TCC0) { + 224c: c1 15 cp r28, r1 + 224e: e8 e0 ldi r30, 0x08 ; 8 + 2250: de 07 cpc r29, r30 + 2252: 29 f4 brne .+10 ; 0x225e + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0); + 2254: 61 e0 ldi r22, 0x01 ; 1 + 2256: 83 e0 ldi r24, 0x03 ; 3 + 2258: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 225c: f2 c0 rjmp .+484 ; 0x2442 + } +#endif +#ifdef TCD0 + else if (module == &TCD0) { + 225e: c1 15 cp r28, r1 + 2260: f9 e0 ldi r31, 0x09 ; 9 + 2262: df 07 cpc r29, r31 + 2264: 29 f4 brne .+10 ; 0x2270 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC0); + 2266: 61 e0 ldi r22, 0x01 ; 1 + 2268: 84 e0 ldi r24, 0x04 ; 4 + 226a: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 226e: e9 c0 rjmp .+466 ; 0x2442 + } +#endif +#ifdef TCE0 + else if (module == &TCE0) { + 2270: c1 15 cp r28, r1 + 2272: 8a e0 ldi r24, 0x0A ; 10 + 2274: d8 07 cpc r29, r24 + 2276: 29 f4 brne .+10 ; 0x2282 + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC0); + 2278: 61 e0 ldi r22, 0x01 ; 1 + 227a: 85 e0 ldi r24, 0x05 ; 5 + 227c: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2280: e0 c0 rjmp .+448 ; 0x2442 + } +#endif +#ifdef TCF0 + else if (module == &TCF0) { + 2282: c1 15 cp r28, r1 + 2284: eb e0 ldi r30, 0x0B ; 11 + 2286: de 07 cpc r29, r30 + 2288: 29 f4 brne .+10 ; 0x2294 + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC0); + 228a: 61 e0 ldi r22, 0x01 ; 1 + 228c: 86 e0 ldi r24, 0x06 ; 6 + 228e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2292: d7 c0 rjmp .+430 ; 0x2442 + } +#endif +#ifdef TCC1 + else if (module == &TCC1) { + 2294: c0 34 cpi r28, 0x40 ; 64 + 2296: f8 e0 ldi r31, 0x08 ; 8 + 2298: df 07 cpc r29, r31 + 229a: 29 f4 brne .+10 ; 0x22a6 + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC1); + 229c: 62 e0 ldi r22, 0x02 ; 2 + 229e: 83 e0 ldi r24, 0x03 ; 3 + 22a0: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 22a4: ce c0 rjmp .+412 ; 0x2442 + } +#endif +#ifdef TCD1 + else if (module == &TCD1) { + 22a6: c0 34 cpi r28, 0x40 ; 64 + 22a8: 89 e0 ldi r24, 0x09 ; 9 + 22aa: d8 07 cpc r29, r24 + 22ac: 29 f4 brne .+10 ; 0x22b8 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC1); + 22ae: 62 e0 ldi r22, 0x02 ; 2 + 22b0: 84 e0 ldi r24, 0x04 ; 4 + 22b2: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 22b6: c5 c0 rjmp .+394 ; 0x2442 + } +#endif +#ifdef TCE1 + else if (module == &TCE1) { + 22b8: c0 34 cpi r28, 0x40 ; 64 + 22ba: ea e0 ldi r30, 0x0A ; 10 + 22bc: de 07 cpc r29, r30 + 22be: 29 f4 brne .+10 ; 0x22ca + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC1); + 22c0: 62 e0 ldi r22, 0x02 ; 2 + 22c2: 85 e0 ldi r24, 0x05 ; 5 + 22c4: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 22c8: bc c0 rjmp .+376 ; 0x2442 + } +#endif +#ifdef TCF1 + else if (module == &TCF1) { + 22ca: c0 34 cpi r28, 0x40 ; 64 + 22cc: fb e0 ldi r31, 0x0B ; 11 + 22ce: df 07 cpc r29, r31 + 22d0: 29 f4 brne .+10 ; 0x22dc + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC1); + 22d2: 62 e0 ldi r22, 0x02 ; 2 + 22d4: 86 e0 ldi r24, 0x06 ; 6 + 22d6: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 22da: b3 c0 rjmp .+358 ; 0x2442 + else if (module == &TCD5) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC5); + } +#endif +#ifdef HIRESC + else if (module == &HIRESC) { + 22dc: c0 39 cpi r28, 0x90 ; 144 + 22de: 88 e0 ldi r24, 0x08 ; 8 + 22e0: d8 07 cpc r29, r24 + 22e2: 29 f4 brne .+10 ; 0x22ee + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + 22e4: 64 e0 ldi r22, 0x04 ; 4 + 22e6: 83 e0 ldi r24, 0x03 ; 3 + 22e8: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 22ec: aa c0 rjmp .+340 ; 0x2442 + } +#endif +#ifdef HIRESD + else if (module == &HIRESD) { + 22ee: c0 39 cpi r28, 0x90 ; 144 + 22f0: e9 e0 ldi r30, 0x09 ; 9 + 22f2: de 07 cpc r29, r30 + 22f4: 29 f4 brne .+10 ; 0x2300 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + 22f6: 64 e0 ldi r22, 0x04 ; 4 + 22f8: 84 e0 ldi r24, 0x04 ; 4 + 22fa: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 22fe: a1 c0 rjmp .+322 ; 0x2442 + } +#endif +#ifdef HIRESE + else if (module == &HIRESE) { + 2300: c0 39 cpi r28, 0x90 ; 144 + 2302: fa e0 ldi r31, 0x0A ; 10 + 2304: df 07 cpc r29, r31 + 2306: 29 f4 brne .+10 ; 0x2312 + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + 2308: 64 e0 ldi r22, 0x04 ; 4 + 230a: 85 e0 ldi r24, 0x05 ; 5 + 230c: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2310: 98 c0 rjmp .+304 ; 0x2442 + } +#endif +#ifdef HIRESF + else if (module == &HIRESF) { + 2312: c0 39 cpi r28, 0x90 ; 144 + 2314: 8b e0 ldi r24, 0x0B ; 11 + 2316: d8 07 cpc r29, r24 + 2318: 29 f4 brne .+10 ; 0x2324 + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + 231a: 64 e0 ldi r22, 0x04 ; 4 + 231c: 86 e0 ldi r24, 0x06 ; 6 + 231e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2322: 8f c0 rjmp .+286 ; 0x2442 + } +#endif +#ifdef SPIC + else if (module == &SPIC) { + 2324: c0 3c cpi r28, 0xC0 ; 192 + 2326: e8 e0 ldi r30, 0x08 ; 8 + 2328: de 07 cpc r29, r30 + 232a: 29 f4 brne .+10 ; 0x2336 + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_SPI); + 232c: 68 e0 ldi r22, 0x08 ; 8 + 232e: 83 e0 ldi r24, 0x03 ; 3 + 2330: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2334: 86 c0 rjmp .+268 ; 0x2442 + } +#endif +#ifdef SPID + else if (module == &SPID) { + 2336: c0 3c cpi r28, 0xC0 ; 192 + 2338: f9 e0 ldi r31, 0x09 ; 9 + 233a: df 07 cpc r29, r31 + 233c: 29 f4 brne .+10 ; 0x2348 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_SPI); + 233e: 68 e0 ldi r22, 0x08 ; 8 + 2340: 84 e0 ldi r24, 0x04 ; 4 + 2342: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2346: 7d c0 rjmp .+250 ; 0x2442 + } +#endif +#ifdef SPIE + else if (module == &SPIE) { + 2348: c0 3c cpi r28, 0xC0 ; 192 + 234a: 8a e0 ldi r24, 0x0A ; 10 + 234c: d8 07 cpc r29, r24 + 234e: 29 f4 brne .+10 ; 0x235a + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_SPI); + 2350: 68 e0 ldi r22, 0x08 ; 8 + 2352: 85 e0 ldi r24, 0x05 ; 5 + 2354: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2358: 74 c0 rjmp .+232 ; 0x2442 + } +#endif +#ifdef SPIF + else if (module == &SPIF) { + 235a: c0 3c cpi r28, 0xC0 ; 192 + 235c: eb e0 ldi r30, 0x0B ; 11 + 235e: de 07 cpc r29, r30 + 2360: 29 f4 brne .+10 ; 0x236c + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_SPI); + 2362: 68 e0 ldi r22, 0x08 ; 8 + 2364: 86 e0 ldi r24, 0x06 ; 6 + 2366: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 236a: 6b c0 rjmp .+214 ; 0x2442 + } +#endif +#ifdef USARTC0 + else if (module == &USARTC0) { + 236c: c0 3a cpi r28, 0xA0 ; 160 + 236e: f8 e0 ldi r31, 0x08 ; 8 + 2370: df 07 cpc r29, r31 + 2372: 29 f4 brne .+10 ; 0x237e + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0); + 2374: 60 e1 ldi r22, 0x10 ; 16 + 2376: 83 e0 ldi r24, 0x03 ; 3 + 2378: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 237c: 62 c0 rjmp .+196 ; 0x2442 + } +#endif +#ifdef USARTD0 + else if (module == &USARTD0) { + 237e: c0 3a cpi r28, 0xA0 ; 160 + 2380: 89 e0 ldi r24, 0x09 ; 9 + 2382: d8 07 cpc r29, r24 + 2384: 29 f4 brne .+10 ; 0x2390 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART0); + 2386: 60 e1 ldi r22, 0x10 ; 16 + 2388: 84 e0 ldi r24, 0x04 ; 4 + 238a: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 238e: 59 c0 rjmp .+178 ; 0x2442 + } +#endif +#ifdef USARTE0 + else if (module == &USARTE0) { + 2390: c0 3a cpi r28, 0xA0 ; 160 + 2392: ea e0 ldi r30, 0x0A ; 10 + 2394: de 07 cpc r29, r30 + 2396: 29 f4 brne .+10 ; 0x23a2 + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0); + 2398: 60 e1 ldi r22, 0x10 ; 16 + 239a: 85 e0 ldi r24, 0x05 ; 5 + 239c: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 23a0: 50 c0 rjmp .+160 ; 0x2442 + } +#endif +#ifdef USARTF0 + else if (module == &USARTF0) { + 23a2: c0 3a cpi r28, 0xA0 ; 160 + 23a4: fb e0 ldi r31, 0x0B ; 11 + 23a6: df 07 cpc r29, r31 + 23a8: 29 f4 brne .+10 ; 0x23b4 + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0); + 23aa: 60 e1 ldi r22, 0x10 ; 16 + 23ac: 86 e0 ldi r24, 0x06 ; 6 + 23ae: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 23b2: 47 c0 rjmp .+142 ; 0x2442 + } +#endif +#ifdef USARTC1 + else if (module == &USARTC1) { + 23b4: c0 3b cpi r28, 0xB0 ; 176 + 23b6: 88 e0 ldi r24, 0x08 ; 8 + 23b8: d8 07 cpc r29, r24 + 23ba: 29 f4 brne .+10 ; 0x23c6 + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1); + 23bc: 60 e2 ldi r22, 0x20 ; 32 + 23be: 83 e0 ldi r24, 0x03 ; 3 + 23c0: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 23c4: 3e c0 rjmp .+124 ; 0x2442 + } +#endif +#ifdef USARTD1 + else if (module == &USARTD1) { + 23c6: c0 3b cpi r28, 0xB0 ; 176 + 23c8: e9 e0 ldi r30, 0x09 ; 9 + 23ca: de 07 cpc r29, r30 + 23cc: 29 f4 brne .+10 ; 0x23d8 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART1); + 23ce: 60 e2 ldi r22, 0x20 ; 32 + 23d0: 84 e0 ldi r24, 0x04 ; 4 + 23d2: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 23d6: 35 c0 rjmp .+106 ; 0x2442 + } +#endif +#ifdef USARTE1 + else if (module == &USARTE1) { + 23d8: c0 3b cpi r28, 0xB0 ; 176 + 23da: fa e0 ldi r31, 0x0A ; 10 + 23dc: df 07 cpc r29, r31 + 23de: 29 f4 brne .+10 ; 0x23ea + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART1); + 23e0: 60 e2 ldi r22, 0x20 ; 32 + 23e2: 85 e0 ldi r24, 0x05 ; 5 + 23e4: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 23e8: 2c c0 rjmp .+88 ; 0x2442 + } +#endif +#ifdef USARTF1 + else if (module == &USARTF1) { + 23ea: c0 3b cpi r28, 0xB0 ; 176 + 23ec: 8b e0 ldi r24, 0x0B ; 11 + 23ee: d8 07 cpc r29, r24 + 23f0: 29 f4 brne .+10 ; 0x23fc + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART1); + 23f2: 60 e2 ldi r22, 0x20 ; 32 + 23f4: 86 e0 ldi r24, 0x06 ; 6 + 23f6: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 23fa: 23 c0 rjmp .+70 ; 0x2442 + } +#endif +#ifdef TWIC + else if (module == &TWIC) { + 23fc: c0 38 cpi r28, 0x80 ; 128 + 23fe: e4 e0 ldi r30, 0x04 ; 4 + 2400: de 07 cpc r29, r30 + 2402: 29 f4 brne .+10 ; 0x240e + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TWI); + 2404: 60 e4 ldi r22, 0x40 ; 64 + 2406: 83 e0 ldi r24, 0x03 ; 3 + 2408: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 240c: 1a c0 rjmp .+52 ; 0x2442 + } +#endif +#ifdef TWID + else if (module == &TWID) { + 240e: c0 39 cpi r28, 0x90 ; 144 + 2410: f4 e0 ldi r31, 0x04 ; 4 + 2412: df 07 cpc r29, r31 + 2414: 29 f4 brne .+10 ; 0x2420 + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TWI); + 2416: 60 e4 ldi r22, 0x40 ; 64 + 2418: 84 e0 ldi r24, 0x04 ; 4 + 241a: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 241e: 11 c0 rjmp .+34 ; 0x2442 + } +#endif +#ifdef TWIE + else if (module == &TWIE) { + 2420: c0 3a cpi r28, 0xA0 ; 160 + 2422: 84 e0 ldi r24, 0x04 ; 4 + 2424: d8 07 cpc r29, r24 + 2426: 29 f4 brne .+10 ; 0x2432 + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TWI); + 2428: 60 e4 ldi r22, 0x40 ; 64 + 242a: 85 e0 ldi r24, 0x05 ; 5 + 242c: 0e 94 59 02 call 0x4b2 ; 0x4b2 + 2430: 08 c0 rjmp .+16 ; 0x2442 + } +#endif +#ifdef TWIF + else if (module == &TWIF) { + 2432: c0 3b cpi r28, 0xB0 ; 176 + 2434: e4 e0 ldi r30, 0x04 ; 4 + 2436: de 07 cpc r29, r30 + 2438: 21 f4 brne .+8 ; 0x2442 + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TWI); + 243a: 60 e4 ldi r22, 0x40 ; 64 + 243c: 86 e0 ldi r24, 0x06 ; 6 + 243e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + * - 0x2 : IrDA mode. + * - 0x3 : Master SPI mode. + */ +static inline void usart_set_mode(USART_t *usart, USART_CMODE_t usartmode) +{ + (usart)->CTRLC = ((usart)->CTRLC & (~USART_CMODE_gm)) | usartmode; + 2442: 8d 81 ldd r24, Y+5 ; 0x05 + 2444: 8f 73 andi r24, 0x3F ; 63 + 2446: 8d 83 std Y+5, r24 ; 0x05 + * \param twoStopBits Enable two stop bit mode. Use bool type. + */ +static inline void usart_format_set(USART_t *usart, USART_CHSIZE_t charSize, + USART_PMODE_t parityMode, bool twoStopBits) +{ + (usart)->CTRLC = (uint8_t)charSize | parityMode + 2448: f8 01 movw r30, r16 + 244a: 95 81 ldd r25, Z+5 ; 0x05 + 244c: 84 81 ldd r24, Z+4 ; 0x04 + 244e: 89 2b or r24, r25 + 2450: 96 81 ldd r25, Z+6 ; 0x06 + 2452: 91 11 cpse r25, r1 + 2454: 98 e0 ldi r25, 0x08 ; 8 + 2456: 89 2b or r24, r25 + 2458: 8d 83 std Y+5, r24 ; 0x05 + bool result; + sysclk_enable_peripheral_clock(usart); + usart_set_mode(usart, USART_CMODE_ASYNCHRONOUS_gc); + usart_format_set(usart, opt->charlength, opt->paritytype, + opt->stopbits); + result = usart_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); + 245a: f8 01 movw r30, r16 + 245c: 40 81 ld r20, Z + 245e: 51 81 ldd r21, Z+1 ; 0x01 + 2460: 62 81 ldd r22, Z+2 ; 0x02 + 2462: 73 81 ldd r23, Z+3 ; 0x03 + 2464: 00 e0 ldi r16, 0x00 ; 0 + 2466: 18 e4 ldi r17, 0x48 ; 72 + 2468: 28 ee ldi r18, 0xE8 ; 232 + 246a: 31 e0 ldi r19, 0x01 ; 1 + 246c: ce 01 movw r24, r28 + 246e: 70 dd rcall .-1312 ; 0x1f50 + * + * \param usart Pointer to the USART module. + */ +static inline void usart_tx_enable(USART_t *usart) +{ + (usart)->CTRLB |= USART_TXEN_bm; + 2470: 9c 81 ldd r25, Y+4 ; 0x04 + 2472: 98 60 ori r25, 0x08 ; 8 + 2474: 9c 83 std Y+4, r25 ; 0x04 + * + * \param usart Pointer to the USART module + */ +static inline void usart_rx_enable(USART_t *usart) +{ + (usart)->CTRLB |= USART_RXEN_bm; + 2476: 9c 81 ldd r25, Y+4 ; 0x04 + 2478: 90 61 ori r25, 0x10 ; 16 + 247a: 9c 83 std Y+4, r25 ; 0x04 + usart_tx_enable(usart); + usart_rx_enable(usart); + + return result; +} + 247c: df 91 pop r29 + 247e: cf 91 pop r28 + 2480: 1f 91 pop r17 + 2482: 0f 91 pop r16 + 2484: 08 95 ret + +00002486 : + uint8_t temp = (WDT.WINCTRL & WDT_WPER_gm) | + (1 << WDT_WEN_bp) | (1 << WDT_WCEN_bp); + ccp_write_io((void *)&WDT.WINCTRL, temp); + wdt_wait_while_busy(); + return true; +} + 2486: 90 91 80 00 lds r25, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x700080> + 248a: 24 e0 ldi r18, 0x04 ; 4 + 248c: 82 9f mul r24, r18 + 248e: b0 01 movw r22, r0 + 2490: 11 24 eor r1, r1 + 2492: 6c 73 andi r22, 0x3C ; 60 + 2494: 92 70 andi r25, 0x02 ; 2 + 2496: 91 60 ori r25, 0x01 ; 1 + 2498: 69 2b or r22, r25 + 249a: 80 e8 ldi r24, 0x80 ; 128 + 249c: 90 e0 ldi r25, 0x00 ; 0 + 249e: 0e 94 57 04 call 0x8ae ; 0x8ae + 24a2: e0 e8 ldi r30, 0x80 ; 128 + 24a4: f0 e0 ldi r31, 0x00 ; 0 + 24a6: 82 81 ldd r24, Z+2 ; 0x02 + 24a8: 80 fd sbrc r24, 0 + 24aa: fd cf rjmp .-6 ; 0x24a6 + 24ac: 08 95 ret + +000024ae : + 24ae: 60 91 80 00 lds r22, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x700080> + 24b2: 6c 73 andi r22, 0x3C ; 60 + 24b4: 63 60 ori r22, 0x03 ; 3 + 24b6: 80 e8 ldi r24, 0x80 ; 128 + 24b8: 90 e0 ldi r25, 0x00 ; 0 + 24ba: 0e 94 57 04 call 0x8ae ; 0x8ae + 24be: e0 e8 ldi r30, 0x80 ; 128 + 24c0: f0 e0 ldi r31, 0x00 ; 0 + 24c2: 82 81 ldd r24, Z+2 ; 0x02 + 24c4: 80 fd sbrc r24, 0 + 24c6: fd cf rjmp .-6 ; 0x24c2 + 24c8: 08 95 ret + +000024ca : +uint8_t temp; + /* + * WDT enabled (minimum timeout period for max. security) + */ + temp = WDT_PER_8CLK_gc | (1 << WDT_ENABLE_bp) | (1 << WDT_CEN_bp); + ccp_write_io((void *)&WDT.CTRL, temp); + 24ca: 63 e0 ldi r22, 0x03 ; 3 + 24cc: 80 e8 ldi r24, 0x80 ; 128 + 24ce: 90 e0 ldi r25, 0x00 ; 0 + 24d0: 0e 94 57 04 call 0x8ae ; 0x8ae +/*! \brief Wait until WD settings are synchronized to the WD clock domain. + * + */ +static inline void wdt_wait_while_busy(void) +{ + while ((WDT.STATUS & WDT_SYNCBUSY_bm) == WDT_SYNCBUSY_bm) { + 24d4: e0 e8 ldi r30, 0x80 ; 128 + 24d6: f0 e0 ldi r31, 0x00 ; 0 + 24d8: 82 81 ldd r24, Z+2 ; 0x02 + 24da: 80 fd sbrc r24, 0 + 24dc: fd cf rjmp .-6 ; 0x24d8 + wdt_wait_while_busy(); + /* + * WDT enabled (maximum window period for max. security) + */ + temp = WDT_WPER_8KCLK_gc | (1 << WDT_WEN_bp) | (1 << WDT_WCEN_bp); + ccp_write_io((void *)&WDT.WINCTRL, temp); + 24de: 6b e2 ldi r22, 0x2B ; 43 + 24e0: 81 e8 ldi r24, 0x81 ; 129 + 24e2: 90 e0 ldi r25, 0x00 ; 0 + 24e4: 0e 94 57 04 call 0x8ae ; 0x8ae + 24e8: e0 e8 ldi r30, 0x80 ; 128 + 24ea: f0 e0 ldi r31, 0x00 ; 0 + 24ec: 82 81 ldd r24, Z+2 ; 0x02 + 24ee: 80 fd sbrc r24, 0 + 24f0: fd cf rjmp .-6 ; 0x24ec + wdt_wait_while_busy(); + /* + * WDT Reset during window => WDT generates an Hard Reset. + */ + wdt_reset(); + 24f2: a8 95 wdr + 24f4: ff cf rjmp .-2 ; 0x24f4 + +000024f6 : + * + * \param config Pointer to PWM configuration. + * \param freq_hz Wanted PWM frequency in Hz. + */ +void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz) +{ + 24f6: cf 92 push r12 + 24f8: df 92 push r13 + 24fa: ef 92 push r14 + 24fc: ff 92 push r15 + 24fe: cf 93 push r28 + 2500: df 93 push r29 + 2502: ec 01 movw r28, r24 + /* Avoid division by zero. */ + Assert(freq_hz != 0); + + /* Calculate the smallest divider for the requested frequency + related to the CPU frequency */ + smallest_div = cpu_hz / freq_hz / 0xFFFF; + 2504: 6b 01 movw r12, r22 + 2506: e1 2c mov r14, r1 + 2508: f1 2c mov r15, r1 + 250a: 60 e0 ldi r22, 0x00 ; 0 + 250c: 78 e4 ldi r23, 0x48 ; 72 + 250e: 88 ee ldi r24, 0xE8 ; 232 + 2510: 91 e0 ldi r25, 0x01 ; 1 + 2512: a7 01 movw r20, r14 + 2514: 96 01 movw r18, r12 + 2516: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 251a: ca 01 movw r24, r20 + 251c: b9 01 movw r22, r18 + 251e: 2f ef ldi r18, 0xFF ; 255 + 2520: 3f ef ldi r19, 0xFF ; 255 + 2522: 40 e0 ldi r20, 0x00 ; 0 + 2524: 50 e0 ldi r21, 0x00 ; 0 + 2526: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + if (smallest_div < 1) { + 252a: 21 15 cp r18, r1 + 252c: 31 05 cpc r19, r1 + 252e: 29 f4 brne .+10 ; 0x253a + dividor = 1; + config->clk_sel = PWM_CLK_DIV1; + 2530: 81 e0 ldi r24, 0x01 ; 1 + 2532: 8c 83 std Y+4, r24 ; 0x04 + + /* Calculate the smallest divider for the requested frequency + related to the CPU frequency */ + smallest_div = cpu_hz / freq_hz / 0xFFFF; + if (smallest_div < 1) { + dividor = 1; + 2534: 21 e0 ldi r18, 0x01 ; 1 + 2536: 30 e0 ldi r19, 0x00 ; 0 + 2538: 2d c0 rjmp .+90 ; 0x2594 + config->clk_sel = PWM_CLK_DIV1; + } else if (smallest_div < 2) { + 253a: 22 30 cpi r18, 0x02 ; 2 + 253c: 31 05 cpc r19, r1 + 253e: 28 f4 brcc .+10 ; 0x254a + dividor = 2; + config->clk_sel = PWM_CLK_DIV2; + 2540: 82 e0 ldi r24, 0x02 ; 2 + 2542: 8c 83 std Y+4, r24 ; 0x04 + smallest_div = cpu_hz / freq_hz / 0xFFFF; + if (smallest_div < 1) { + dividor = 1; + config->clk_sel = PWM_CLK_DIV1; + } else if (smallest_div < 2) { + dividor = 2; + 2544: 22 e0 ldi r18, 0x02 ; 2 + 2546: 30 e0 ldi r19, 0x00 ; 0 + 2548: 25 c0 rjmp .+74 ; 0x2594 + config->clk_sel = PWM_CLK_DIV2; + } else if (smallest_div < 4) { + 254a: 24 30 cpi r18, 0x04 ; 4 + 254c: 31 05 cpc r19, r1 + 254e: 28 f4 brcc .+10 ; 0x255a + dividor = 4; + config->clk_sel = PWM_CLK_DIV4; + 2550: 83 e0 ldi r24, 0x03 ; 3 + 2552: 8c 83 std Y+4, r24 ; 0x04 + config->clk_sel = PWM_CLK_DIV1; + } else if (smallest_div < 2) { + dividor = 2; + config->clk_sel = PWM_CLK_DIV2; + } else if (smallest_div < 4) { + dividor = 4; + 2554: 24 e0 ldi r18, 0x04 ; 4 + 2556: 30 e0 ldi r19, 0x00 ; 0 + 2558: 1d c0 rjmp .+58 ; 0x2594 + config->clk_sel = PWM_CLK_DIV4; + } else if (smallest_div < 8) { + 255a: 28 30 cpi r18, 0x08 ; 8 + 255c: 31 05 cpc r19, r1 + 255e: 28 f4 brcc .+10 ; 0x256a + dividor = 8; + config->clk_sel = PWM_CLK_DIV8; + 2560: 84 e0 ldi r24, 0x04 ; 4 + 2562: 8c 83 std Y+4, r24 ; 0x04 + config->clk_sel = PWM_CLK_DIV2; + } else if (smallest_div < 4) { + dividor = 4; + config->clk_sel = PWM_CLK_DIV4; + } else if (smallest_div < 8) { + dividor = 8; + 2564: 28 e0 ldi r18, 0x08 ; 8 + 2566: 30 e0 ldi r19, 0x00 ; 0 + 2568: 15 c0 rjmp .+42 ; 0x2594 + config->clk_sel = PWM_CLK_DIV8; + } else if (smallest_div < 64) { + 256a: 20 34 cpi r18, 0x40 ; 64 + 256c: 31 05 cpc r19, r1 + 256e: 28 f4 brcc .+10 ; 0x257a + dividor = 64; + config->clk_sel = PWM_CLK_DIV64; + 2570: 85 e0 ldi r24, 0x05 ; 5 + 2572: 8c 83 std Y+4, r24 ; 0x04 + config->clk_sel = PWM_CLK_DIV4; + } else if (smallest_div < 8) { + dividor = 8; + config->clk_sel = PWM_CLK_DIV8; + } else if (smallest_div < 64) { + dividor = 64; + 2574: 20 e4 ldi r18, 0x40 ; 64 + 2576: 30 e0 ldi r19, 0x00 ; 0 + 2578: 0d c0 rjmp .+26 ; 0x2594 + config->clk_sel = PWM_CLK_DIV64; + } else if (smallest_div < 256) { + 257a: 2f 3f cpi r18, 0xFF ; 255 + 257c: 31 05 cpc r19, r1 + 257e: 09 f0 breq .+2 ; 0x2582 + 2580: 28 f4 brcc .+10 ; 0x258c + dividor = 256; + config->clk_sel = PWM_CLK_DIV256; + 2582: 86 e0 ldi r24, 0x06 ; 6 + 2584: 8c 83 std Y+4, r24 ; 0x04 + config->clk_sel = PWM_CLK_DIV8; + } else if (smallest_div < 64) { + dividor = 64; + config->clk_sel = PWM_CLK_DIV64; + } else if (smallest_div < 256) { + dividor = 256; + 2586: 20 e0 ldi r18, 0x00 ; 0 + 2588: 31 e0 ldi r19, 0x01 ; 1 + 258a: 04 c0 rjmp .+8 ; 0x2594 + config->clk_sel = PWM_CLK_DIV256; + } else { + dividor = 1024; + config->clk_sel = PWM_CLK_DIV1024; + 258c: 87 e0 ldi r24, 0x07 ; 7 + 258e: 8c 83 std Y+4, r24 ; 0x04 + config->clk_sel = PWM_CLK_DIV64; + } else if (smallest_div < 256) { + dividor = 256; + config->clk_sel = PWM_CLK_DIV256; + } else { + dividor = 1024; + 2590: 20 e0 ldi r18, 0x00 ; 0 + 2592: 34 e0 ldi r19, 0x04 ; 4 + config->clk_sel = PWM_CLK_DIV1024; + } + + /* Calculate the period from the just found divider */ + config->period = cpu_hz / dividor / freq_hz; + 2594: 40 e0 ldi r20, 0x00 ; 0 + 2596: 50 e0 ldi r21, 0x00 ; 0 + 2598: 60 e0 ldi r22, 0x00 ; 0 + 259a: 78 e4 ldi r23, 0x48 ; 72 + 259c: 88 ee ldi r24, 0xE8 ; 232 + 259e: 91 e0 ldi r25, 0x01 ; 1 + 25a0: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 25a4: ca 01 movw r24, r20 + 25a6: b9 01 movw r22, r18 + 25a8: a7 01 movw r20, r14 + 25aa: 96 01 movw r18, r12 + 25ac: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 25b0: 2d 83 std Y+5, r18 ; 0x05 + 25b2: 3e 83 std Y+6, r19 ; 0x06 + + /* Make sure our period is at least 100 ticks so we are able to provide + a full range (0-100% duty cycle */ + if (config->period < 100) { + 25b4: 24 36 cpi r18, 0x64 ; 100 + 25b6: 31 05 cpc r19, r1 + 25b8: 18 f4 brcc .+6 ; 0x25c0 + /* The period is too short. */ + config->clk_sel = PWM_CLK_OFF; + 25ba: 1c 82 std Y+4, r1 ; 0x04 + config->period = 0; + 25bc: 1d 82 std Y+5, r1 ; 0x05 + 25be: 1e 82 std Y+6, r1 ; 0x06 + Assert(false); + } +} + 25c0: df 91 pop r29 + 25c2: cf 91 pop r28 + 25c4: ff 90 pop r15 + 25c6: ef 90 pop r14 + 25c8: df 90 pop r13 + 25ca: cf 90 pop r12 + 25cc: 08 95 ret + +000025ce : + * \param channel \ref pwm_channel_t "CC channel" to use for this PWM. + * \param freq_hz Frequency to use for this PWM. + */ +void pwm_init(struct pwm_config *config, enum pwm_tc_t tc, + enum pwm_channel_t channel, uint16_t freq_hz) +{ + 25ce: 0f 93 push r16 + 25d0: 1f 93 push r17 + 25d2: cf 93 push r28 + 25d4: df 93 push r29 + 25d6: ec 01 movw r28, r24 + 25d8: 89 01 movw r16, r18 + + /* Set TC and correct I/O pin to output */ +/* + * Support and FAQ: visit Atmel Support + */ + switch (tc) { + 25da: 86 2f mov r24, r22 + 25dc: 90 e0 ldi r25, 0x00 ; 0 + 25de: 88 30 cpi r24, 0x08 ; 8 + 25e0: 91 05 cpc r25, r1 + 25e2: 08 f0 brcs .+2 ; 0x25e6 + 25e4: 9e c0 rjmp .+316 ; 0x2722 + 25e6: fc 01 movw r30, r24 + 25e8: 88 27 eor r24, r24 + 25ea: e2 50 subi r30, 0x02 ; 2 + 25ec: ff 4f sbci r31, 0xFF ; 255 + 25ee: 8f 4f sbci r24, 0xFF ; 255 + 25f0: 0c 94 4f 3a jmp 0x749e ; 0x749e <__tablejump2__> +#if defined(TCC0) + case PWM_TCC0: + config->tc = &TCC0; + 25f4: 80 e0 ldi r24, 0x00 ; 0 + 25f6: 98 e0 ldi r25, 0x08 ; 8 + 25f8: 88 83 st Y, r24 + 25fa: 99 83 std Y+1, r25 ; 0x01 + PORTC.DIR |= (1 << (channel-1)); + 25fc: e0 e4 ldi r30, 0x40 ; 64 + 25fe: f6 e0 ldi r31, 0x06 ; 6 + 2600: 30 81 ld r19, Z + 2602: 81 e0 ldi r24, 0x01 ; 1 + 2604: 90 e0 ldi r25, 0x00 ; 0 + 2606: 2f ef ldi r18, 0xFF ; 255 + 2608: 24 0f add r18, r20 + 260a: 02 c0 rjmp .+4 ; 0x2610 + 260c: 88 0f add r24, r24 + 260e: 99 1f adc r25, r25 + 2610: 2a 95 dec r18 + 2612: e2 f7 brpl .-8 ; 0x260c + 2614: 83 2b or r24, r19 + 2616: 80 83 st Z, r24 + num_chan = 4; + break; + 2618: 84 c0 rjmp .+264 ; 0x2722 +#endif +#if defined(TCC1) + case PWM_TCC1: + config->tc = &TCC1; + 261a: 80 e4 ldi r24, 0x40 ; 64 + 261c: 98 e0 ldi r25, 0x08 ; 8 + 261e: 88 83 st Y, r24 + 2620: 99 83 std Y+1, r25 ; 0x01 + PORTC.DIR |= (1 << (channel+3)); + 2622: e0 e4 ldi r30, 0x40 ; 64 + 2624: f6 e0 ldi r31, 0x06 ; 6 + 2626: 30 81 ld r19, Z + 2628: 81 e0 ldi r24, 0x01 ; 1 + 262a: 90 e0 ldi r25, 0x00 ; 0 + 262c: 23 e0 ldi r18, 0x03 ; 3 + 262e: 24 0f add r18, r20 + 2630: 02 c0 rjmp .+4 ; 0x2636 + 2632: 88 0f add r24, r24 + 2634: 99 1f adc r25, r25 + 2636: 2a 95 dec r18 + 2638: e2 f7 brpl .-8 ; 0x2632 + 263a: 83 2b or r24, r19 + 263c: 80 83 st Z, r24 + num_chan = 2; + break; + 263e: 71 c0 rjmp .+226 ; 0x2722 +#endif +#if defined(TCD0) + case PWM_TCD0: + config->tc = &TCD0; + 2640: 80 e0 ldi r24, 0x00 ; 0 + 2642: 99 e0 ldi r25, 0x09 ; 9 + 2644: 88 83 st Y, r24 + 2646: 99 83 std Y+1, r25 ; 0x01 + PORTD.DIR |= (1 << (channel-1)); + 2648: e0 e6 ldi r30, 0x60 ; 96 + 264a: f6 e0 ldi r31, 0x06 ; 6 + 264c: 30 81 ld r19, Z + 264e: 81 e0 ldi r24, 0x01 ; 1 + 2650: 90 e0 ldi r25, 0x00 ; 0 + 2652: 2f ef ldi r18, 0xFF ; 255 + 2654: 24 0f add r18, r20 + 2656: 02 c0 rjmp .+4 ; 0x265c + 2658: 88 0f add r24, r24 + 265a: 99 1f adc r25, r25 + 265c: 2a 95 dec r18 + 265e: e2 f7 brpl .-8 ; 0x2658 + 2660: 83 2b or r24, r19 + 2662: 80 83 st Z, r24 + num_chan = 4; + break; + 2664: 5e c0 rjmp .+188 ; 0x2722 +#endif +#if defined(TCD1) + case PWM_TCD1: + config->tc = &TCD1; + 2666: 80 e4 ldi r24, 0x40 ; 64 + 2668: 99 e0 ldi r25, 0x09 ; 9 + 266a: 88 83 st Y, r24 + 266c: 99 83 std Y+1, r25 ; 0x01 + PORTD.DIR |= (1 << (channel+3)); + 266e: e0 e6 ldi r30, 0x60 ; 96 + 2670: f6 e0 ldi r31, 0x06 ; 6 + 2672: 30 81 ld r19, Z + 2674: 81 e0 ldi r24, 0x01 ; 1 + 2676: 90 e0 ldi r25, 0x00 ; 0 + 2678: 23 e0 ldi r18, 0x03 ; 3 + 267a: 24 0f add r18, r20 + 267c: 02 c0 rjmp .+4 ; 0x2682 + 267e: 88 0f add r24, r24 + 2680: 99 1f adc r25, r25 + 2682: 2a 95 dec r18 + 2684: e2 f7 brpl .-8 ; 0x267e + 2686: 83 2b or r24, r19 + 2688: 80 83 st Z, r24 + num_chan = 2; + break; + 268a: 4b c0 rjmp .+150 ; 0x2722 +#endif + +#if defined(TCE0) + case PWM_TCE0: + config->tc = &TCE0; + 268c: 80 e0 ldi r24, 0x00 ; 0 + 268e: 9a e0 ldi r25, 0x0A ; 10 + 2690: 88 83 st Y, r24 + 2692: 99 83 std Y+1, r25 ; 0x01 + PORTE.DIR |= (1 << (channel-1)); + 2694: e0 e8 ldi r30, 0x80 ; 128 + 2696: f6 e0 ldi r31, 0x06 ; 6 + 2698: 30 81 ld r19, Z + 269a: 81 e0 ldi r24, 0x01 ; 1 + 269c: 90 e0 ldi r25, 0x00 ; 0 + 269e: 2f ef ldi r18, 0xFF ; 255 + 26a0: 24 0f add r18, r20 + 26a2: 02 c0 rjmp .+4 ; 0x26a8 + 26a4: 88 0f add r24, r24 + 26a6: 99 1f adc r25, r25 + 26a8: 2a 95 dec r18 + 26aa: e2 f7 brpl .-8 ; 0x26a4 + 26ac: 83 2b or r24, r19 + 26ae: 80 83 st Z, r24 + num_chan = 4; + break; + 26b0: 38 c0 rjmp .+112 ; 0x2722 +#endif +#if defined(TCE1) + case PWM_TCE1: + config->tc = &TCE1; + 26b2: 80 e4 ldi r24, 0x40 ; 64 + 26b4: 9a e0 ldi r25, 0x0A ; 10 + 26b6: 88 83 st Y, r24 + 26b8: 99 83 std Y+1, r25 ; 0x01 + PORTE.DIR |= (1 << (channel+3)); + 26ba: e0 e8 ldi r30, 0x80 ; 128 + 26bc: f6 e0 ldi r31, 0x06 ; 6 + 26be: 30 81 ld r19, Z + 26c0: 81 e0 ldi r24, 0x01 ; 1 + 26c2: 90 e0 ldi r25, 0x00 ; 0 + 26c4: 23 e0 ldi r18, 0x03 ; 3 + 26c6: 24 0f add r18, r20 + 26c8: 02 c0 rjmp .+4 ; 0x26ce + 26ca: 88 0f add r24, r24 + 26cc: 99 1f adc r25, r25 + 26ce: 2a 95 dec r18 + 26d0: e2 f7 brpl .-8 ; 0x26ca + 26d2: 83 2b or r24, r19 + 26d4: 80 83 st Z, r24 + num_chan = 2; + break; + 26d6: 25 c0 rjmp .+74 ; 0x2722 +#endif + +#if defined(TCF0) + case PWM_TCF0: + config->tc = &TCF0; + 26d8: 80 e0 ldi r24, 0x00 ; 0 + 26da: 9b e0 ldi r25, 0x0B ; 11 + 26dc: 88 83 st Y, r24 + 26de: 99 83 std Y+1, r25 ; 0x01 + PORTF.DIR |= (1 << (channel-1)); + 26e0: e0 ea ldi r30, 0xA0 ; 160 + 26e2: f6 e0 ldi r31, 0x06 ; 6 + 26e4: 30 81 ld r19, Z + 26e6: 81 e0 ldi r24, 0x01 ; 1 + 26e8: 90 e0 ldi r25, 0x00 ; 0 + 26ea: 2f ef ldi r18, 0xFF ; 255 + 26ec: 24 0f add r18, r20 + 26ee: 02 c0 rjmp .+4 ; 0x26f4 + 26f0: 88 0f add r24, r24 + 26f2: 99 1f adc r25, r25 + 26f4: 2a 95 dec r18 + 26f6: e2 f7 brpl .-8 ; 0x26f0 + 26f8: 83 2b or r24, r19 + 26fa: 80 83 st Z, r24 + num_chan = 4; + break; + 26fc: 12 c0 rjmp .+36 ; 0x2722 +#endif +#if defined(TCF1) + case PWM_TCF1: + config->tc = &TCF1; + 26fe: 80 e4 ldi r24, 0x40 ; 64 + 2700: 9b e0 ldi r25, 0x0B ; 11 + 2702: 88 83 st Y, r24 + 2704: 99 83 std Y+1, r25 ; 0x01 + PORTF.DIR |= (1 << (channel+3)); + 2706: e0 ea ldi r30, 0xA0 ; 160 + 2708: f6 e0 ldi r31, 0x06 ; 6 + 270a: 30 81 ld r19, Z + 270c: 81 e0 ldi r24, 0x01 ; 1 + 270e: 90 e0 ldi r25, 0x00 ; 0 + 2710: 23 e0 ldi r18, 0x03 ; 3 + 2712: 24 0f add r18, r20 + 2714: 02 c0 rjmp .+4 ; 0x271a + 2716: 88 0f add r24, r24 + 2718: 99 1f adc r25, r25 + 271a: 2a 95 dec r18 + 271c: e2 f7 brpl .-8 ; 0x2716 + 271e: 83 2b or r24, r19 + 2720: 80 83 st Z, r24 + } + + /* Make sure we are not given a channel number larger + than this TC can handle */ + Assert(channel <= num_chan); + config->channel = channel; + 2722: 4a 83 std Y+2, r20 ; 0x02 + + /* Set the correct cc_mask */ + switch (channel) { + 2724: 42 30 cpi r20, 0x02 ; 2 + 2726: 61 f0 breq .+24 ; 0x2740 + 2728: 18 f4 brcc .+6 ; 0x2730 + 272a: 41 30 cpi r20, 0x01 ; 1 + 272c: 31 f0 breq .+12 ; 0x273a + 272e: 10 c0 rjmp .+32 ; 0x2750 + 2730: 43 30 cpi r20, 0x03 ; 3 + 2732: 49 f0 breq .+18 ; 0x2746 + 2734: 44 30 cpi r20, 0x04 ; 4 + 2736: 51 f0 breq .+20 ; 0x274c + 2738: 0b c0 rjmp .+22 ; 0x2750 + case PWM_CH_A: + config->cc_mask = TC_CCAEN; + 273a: 80 e1 ldi r24, 0x10 ; 16 + 273c: 8b 83 std Y+3, r24 ; 0x03 + break; + 273e: 08 c0 rjmp .+16 ; 0x2750 + case PWM_CH_B: + config->cc_mask = TC_CCBEN; + 2740: 80 e2 ldi r24, 0x20 ; 32 + 2742: 8b 83 std Y+3, r24 ; 0x03 + break; + 2744: 05 c0 rjmp .+10 ; 0x2750 + case PWM_CH_C: + config->cc_mask = TC_CCCEN; + 2746: 80 e4 ldi r24, 0x40 ; 64 + 2748: 8b 83 std Y+3, r24 ; 0x03 + break; + 274a: 02 c0 rjmp .+4 ; 0x2750 + case PWM_CH_D: + config->cc_mask = TC_CCDEN; + 274c: 80 e8 ldi r24, 0x80 ; 128 + 274e: 8b 83 std Y+3, r24 ; 0x03 + Assert(false); + break; + } + + /* Enable peripheral clock for this TC */ + tc_enable(config->tc); + 2750: 88 81 ld r24, Y + 2752: 99 81 ldd r25, Y+1 ; 0x01 + 2754: 44 d9 rcall .-3448 ; 0x19de + + /* Set this TC's waveform generator in single slope mode */ + tc_set_wgm(config->tc, TC_WG_SS); + 2756: e8 81 ld r30, Y + 2758: f9 81 ldd r31, Y+1 ; 0x01 + * \param tc Pointer to TC module. + * \param wgm : waveform generator + */ +static inline void tc_set_wgm(volatile void *tc, enum tc_wg_mode_t wgm) +{ + ((TC0_t *)tc)->CTRLB = (((TC0_t *)tc)->CTRLB & ~TC0_WGMODE_gm) | wgm; + 275a: 81 81 ldd r24, Z+1 ; 0x01 + 275c: 88 7f andi r24, 0xF8 ; 248 + 275e: 83 60 ori r24, 0x03 ; 3 + 2760: 81 83 std Z+1, r24 ; 0x01 + + /* Default values (disable TC and set minimum period)*/ + config->period = 0; + 2762: 1d 82 std Y+5, r1 ; 0x05 + 2764: 1e 82 std Y+6, r1 ; 0x06 + config->clk_sel = PWM_CLK_OFF; + 2766: 1c 82 std Y+4, r1 ; 0x04 + tc_write_clock_source(config->tc, PWM_CLK_OFF); + 2768: e8 81 ld r30, Y + 276a: f9 81 ldd r31, Y+1 ; 0x01 + */ +static inline void tc_write_clock_source(volatile void *tc, + TC_CLKSEL_t TC_CLKSEL_enum) +{ + ((TC0_t *)tc)->CTRLA = + (((TC0_t *)tc)->CTRLA & ~TC0_CLKSEL_gm) | + 276c: 80 81 ld r24, Z + * \note Configuring the clock also starts the timer + */ +static inline void tc_write_clock_source(volatile void *tc, + TC_CLKSEL_t TC_CLKSEL_enum) +{ + ((TC0_t *)tc)->CTRLA = + 276e: 80 7f andi r24, 0xF0 ; 240 + 2770: 80 83 st Z, r24 + + /* Set the PWM frequency */ + pwm_set_frequency(config, freq_hz); + 2772: b8 01 movw r22, r16 + 2774: ce 01 movw r24, r28 + 2776: bf de rcall .-642 ; 0x24f6 +} + 2778: df 91 pop r29 + 277a: cf 91 pop r28 + 277c: 1f 91 pop r17 + 277e: 0f 91 pop r16 + 2780: 08 95 ret + +00002782 : + * + * \param *config Pointer to the PWM configuration struct + * \param duty_cycle_scale Duty cycle as a value between 0 and 100. + */ +void pwm_start(struct pwm_config *config, uint8_t duty_cycle_scale) +{ + 2782: cf 93 push r28 + 2784: df 93 push r29 + 2786: ec 01 movw r28, r24 + */ +static inline void pwm_set_duty_cycle_percent(struct pwm_config *config, + uint8_t duty_cycle_scale) +{ + Assert( duty_cycle_scale <= 100 ); + tc_write_cc_buffer(config->tc, (enum tc_cc_channel_t)config->channel, + 2788: 2d 81 ldd r18, Y+5 ; 0x05 + 278a: 3e 81 ldd r19, Y+6 ; 0x06 + 278c: a6 2f mov r26, r22 + 278e: b0 e0 ldi r27, 0x00 ; 0 + 2790: 0e 94 58 3a call 0x74b0 ; 0x74b0 <__umulhisi3> + 2794: 24 e6 ldi r18, 0x64 ; 100 + 2796: 30 e0 ldi r19, 0x00 ; 0 + 2798: 40 e0 ldi r20, 0x00 ; 0 + 279a: 50 e0 ldi r21, 0x00 ; 0 + 279c: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4> + 27a0: 8a 81 ldd r24, Y+2 ; 0x02 + 27a2: e8 81 ld r30, Y + 27a4: f9 81 ldd r31, Y+1 ; 0x01 + * \param buffer_value Counter Buffer value + */ +static inline void tc_write_cc_buffer(volatile void *tc, + enum tc_cc_channel_t channel_index, uint16_t buffer_value) +{ + if (tc_is_tc0(void *tc)) { + 27a6: e6 fd sbrc r30, 6 + 27a8: 17 c0 rjmp .+46 ; 0x27d8 + switch (channel_index) { + 27aa: 82 30 cpi r24, 0x02 ; 2 + 27ac: 61 f0 breq .+24 ; 0x27c6 + 27ae: 18 f4 brcc .+6 ; 0x27b6 + 27b0: 81 30 cpi r24, 0x01 ; 1 + 27b2: 31 f0 breq .+12 ; 0x27c0 + 27b4: 1b c0 rjmp .+54 ; 0x27ec + 27b6: 83 30 cpi r24, 0x03 ; 3 + 27b8: 49 f0 breq .+18 ; 0x27cc + 27ba: 84 30 cpi r24, 0x04 ; 4 + 27bc: 51 f0 breq .+20 ; 0x27d2 + 27be: 16 c0 rjmp .+44 ; 0x27ec + case TC_CCA: + ((TC0_t *)tc)->CCABUF = buffer_value; + 27c0: 20 af std Z+56, r18 ; 0x38 + 27c2: 31 af std Z+57, r19 ; 0x39 + 27c4: 13 c0 rjmp .+38 ; 0x27ec + break; + case TC_CCB: + ((TC0_t *)tc)->CCBBUF = buffer_value; + 27c6: 22 af std Z+58, r18 ; 0x3a + 27c8: 33 af std Z+59, r19 ; 0x3b + 27ca: 10 c0 rjmp .+32 ; 0x27ec + break; + case TC_CCC: + ((TC0_t *)tc)->CCCBUF = buffer_value; + 27cc: 24 af std Z+60, r18 ; 0x3c + 27ce: 35 af std Z+61, r19 ; 0x3d + 27d0: 0d c0 rjmp .+26 ; 0x27ec + break; + case TC_CCD: + ((TC0_t *)tc)->CCDBUF = buffer_value; + 27d2: 26 af std Z+62, r18 ; 0x3e + 27d4: 37 af std Z+63, r19 ; 0x3f + 27d6: 0a c0 rjmp .+20 ; 0x27ec + break; + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + 27d8: 81 30 cpi r24, 0x01 ; 1 + 27da: 19 f0 breq .+6 ; 0x27e2 + 27dc: 82 30 cpi r24, 0x02 ; 2 + 27de: 21 f0 breq .+8 ; 0x27e8 + 27e0: 05 c0 rjmp .+10 ; 0x27ec + case TC_CCA: + ((TC1_t *)tc)->CCABUF = buffer_value; + 27e2: 20 af std Z+56, r18 ; 0x38 + 27e4: 31 af std Z+57, r19 ; 0x39 + 27e6: 02 c0 rjmp .+4 ; 0x27ec + break; + case TC_CCB: + ((TC1_t *)tc)->CCBBUF = buffer_value; + 27e8: 22 af std Z+58, r18 ; 0x3a + 27ea: 33 af std Z+59, r19 ; 0x3b + /* Set given duty cycle */ + pwm_set_duty_cycle_percent(config, duty_cycle_scale); + /* Set correct TC period */ + tc_write_period(config->tc, config->period); + 27ec: 8d 81 ldd r24, Y+5 ; 0x05 + 27ee: 9e 81 ldd r25, Y+6 ; 0x06 + 27f0: e8 81 ld r30, Y + 27f2: f9 81 ldd r31, Y+1 ; 0x01 + * \param tc Pointer to TC module. + * \param per_value Period value : PER + */ +static inline void tc_write_period(volatile void *tc, uint16_t per_value) +{ + ((TC0_t *)tc)->PER = per_value; + 27f4: 86 a3 std Z+38, r24 ; 0x26 + 27f6: 97 a3 std Z+39, r25 ; 0x27 + /* Enable CC channel for this TC */ + tc_enable_cc_channels(config->tc, config->cc_mask); + 27f8: 8b 81 ldd r24, Y+3 ; 0x03 + 27fa: e8 81 ld r30, Y + 27fc: f9 81 ldd r31, Y+1 ; 0x01 + * \param enablemask CC channel + */ +static inline void tc_enable_cc_channels(volatile void *tc, + enum tc_cc_channel_mask_enable_t enablemask) +{ + if (tc_is_tc0(void *tc)) { + 27fe: e6 fd sbrc r30, 6 + 2800: 04 c0 rjmp .+8 ; 0x280a + ((TC0_t *)tc)->CTRLB |= enablemask; + 2802: 91 81 ldd r25, Z+1 ; 0x01 + 2804: 89 2b or r24, r25 + 2806: 81 83 std Z+1, r24 ; 0x01 + 2808: 04 c0 rjmp .+8 ; 0x2812 + } else if (tc_is_tc1(void *tc)) { + ((TC1_t *)tc)->CTRLB |= + 280a: 91 81 ldd r25, Z+1 ; 0x01 + 280c: 80 73 andi r24, 0x30 ; 48 + 280e: 89 2b or r24, r25 + 2810: 81 83 std Z+1, r24 ; 0x01 + /* Enable TC by setting correct clock prescaler */ + tc_write_clock_source(config->tc, config->clk_sel); + 2812: e8 81 ld r30, Y + 2814: f9 81 ldd r31, Y+1 ; 0x01 + */ +static inline void tc_write_clock_source(volatile void *tc, + TC_CLKSEL_t TC_CLKSEL_enum) +{ + ((TC0_t *)tc)->CTRLA = + (((TC0_t *)tc)->CTRLA & ~TC0_CLKSEL_gm) | + 2816: 80 81 ld r24, Z + * \note Configuring the clock also starts the timer + */ +static inline void tc_write_clock_source(volatile void *tc, + TC_CLKSEL_t TC_CLKSEL_enum) +{ + ((TC0_t *)tc)->CTRLA = + 2818: 80 7f andi r24, 0xF0 ; 240 + 281a: 9c 81 ldd r25, Y+4 ; 0x04 + 281c: 89 2b or r24, r25 + 281e: 80 83 st Z, r24 +} + 2820: df 91 pop r29 + 2822: cf 91 pop r28 + 2824: 08 95 ret + +00002826 : + ds3231_status = true; +} + +void ds3231_clear_ready(void) +{ + ds3231_status = false; + 2826: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b + 282a: 08 95 ret + +0000282c : +} + +void ds3231_set_time(uint8_t hours, uint8_t minutes, uint8_t seconds) +{ + 282c: 1f 93 push r17 + 282e: cf 93 push r28 + 2830: df 93 push r29 + 2832: 16 2f mov r17, r22 + 2834: d4 2f mov r29, r20 + //high is pm + //low is am + uint8_t pm_or_am = 0; + if(hours >= 12) + 2836: 8c 30 cpi r24, 0x0C ; 12 + 2838: 38 f0 brcs .+14 ; 0x2848 + { + if(hours == 24) + 283a: 88 31 cpi r24, 0x18 ; 24 + 283c: 39 f0 breq .+14 ; 0x284c + { + hours -= 12; + } + else if(hours == 12) + 283e: 8c 30 cpi r24, 0x0C ; 12 + 2840: 41 f0 breq .+16 ; 0x2852 + { + pm_or_am = 1; + } + else + { + hours -= 12; + 2842: 8c 50 subi r24, 0x0C ; 12 + pm_or_am = 1; + 2844: 31 e0 ldi r19, 0x01 ; 1 + 2846: 06 c0 rjmp .+12 ; 0x2854 + +void ds3231_set_time(uint8_t hours, uint8_t minutes, uint8_t seconds) +{ + //high is pm + //low is am + uint8_t pm_or_am = 0; + 2848: 30 e0 ldi r19, 0x00 ; 0 + 284a: 04 c0 rjmp .+8 ; 0x2854 + 284c: 30 e0 ldi r19, 0x00 ; 0 + if(hours >= 12) + { + if(hours == 24) + { + hours -= 12; + 284e: 8c e0 ldi r24, 0x0C ; 12 + 2850: 01 c0 rjmp .+2 ; 0x2854 + } + else if(hours == 12) + { + pm_or_am = 1; + 2852: 31 e0 ldi r19, 0x01 ; 1 + } + } + uint8_t formattedSeconds = ((seconds / 10) << 4) | (seconds % 10); + uint8_t formattedMinutes = ((minutes / 10) << 4) | (minutes % 10); + uint8_t formattedHours = (1 << 6) | (pm_or_am << 5) | ((hours / 10) << 4) | (hours % 10); + twi_write(DS3231_ADDR, DS3231_HOURS, formattedHours); + 2854: cd ec ldi r28, 0xCD ; 205 + 2856: 8c 9f mul r24, r28 + 2858: 41 2d mov r20, r1 + 285a: 11 24 eor r1, r1 + 285c: 24 2f mov r18, r20 + 285e: 26 95 lsr r18 + 2860: 26 95 lsr r18 + 2862: 26 95 lsr r18 + 2864: 42 2f mov r20, r18 + 2866: 44 0f add r20, r20 + 2868: 94 2f mov r25, r20 + 286a: 99 0f add r25, r25 + 286c: 99 0f add r25, r25 + 286e: 94 0f add r25, r20 + 2870: 89 1b sub r24, r25 + 2872: 98 2f mov r25, r24 + 2874: 90 64 ori r25, 0x40 ; 64 + 2876: 83 2f mov r24, r19 + 2878: 82 95 swap r24 + 287a: 88 0f add r24, r24 + 287c: 80 7e andi r24, 0xE0 ; 224 + 287e: 89 2b or r24, r25 + 2880: 90 e1 ldi r25, 0x10 ; 16 + 2882: 29 9f mul r18, r25 + 2884: a0 01 movw r20, r0 + 2886: 11 24 eor r1, r1 + 2888: 48 2b or r20, r24 + 288a: 62 e0 ldi r22, 0x02 ; 2 + 288c: 88 e6 ldi r24, 0x68 ; 104 + 288e: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + twi_write(DS3231_ADDR, DS3231_MINUTES, formattedMinutes); + 2892: 1c 9f mul r17, r28 + 2894: 81 2d mov r24, r1 + 2896: 11 24 eor r1, r1 + 2898: 86 95 lsr r24 + 289a: 86 95 lsr r24 + 289c: 86 95 lsr r24 + 289e: 90 e1 ldi r25, 0x10 ; 16 + 28a0: 89 9f mul r24, r25 + 28a2: a0 01 movw r20, r0 + 28a4: 11 24 eor r1, r1 + 28a6: 88 0f add r24, r24 + 28a8: 98 2f mov r25, r24 + 28aa: 99 0f add r25, r25 + 28ac: 99 0f add r25, r25 + 28ae: 89 0f add r24, r25 + 28b0: 18 1b sub r17, r24 + 28b2: 41 2b or r20, r17 + 28b4: 61 e0 ldi r22, 0x01 ; 1 + 28b6: 88 e6 ldi r24, 0x68 ; 104 + 28b8: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + twi_write(DS3231_ADDR, DS3231_SECONDS, formattedSeconds); + 28bc: dc 9f mul r29, r28 + 28be: c1 2d mov r28, r1 + 28c0: 11 24 eor r1, r1 + 28c2: c6 95 lsr r28 + 28c4: c6 95 lsr r28 + 28c6: c6 95 lsr r28 + 28c8: 80 e1 ldi r24, 0x10 ; 16 + 28ca: c8 9f mul r28, r24 + 28cc: a0 01 movw r20, r0 + 28ce: 11 24 eor r1, r1 + 28d0: cc 0f add r28, r28 + 28d2: 8c 2f mov r24, r28 + 28d4: 88 0f add r24, r24 + 28d6: 88 0f add r24, r24 + 28d8: c8 0f add r28, r24 + 28da: dc 1b sub r29, r28 + 28dc: 4d 2b or r20, r29 + 28de: 60 e0 ldi r22, 0x00 ; 0 + 28e0: 88 e6 ldi r24, 0x68 ; 104 + 28e2: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 +} + 28e6: df 91 pop r29 + 28e8: cf 91 pop r28 + 28ea: 1f 91 pop r17 + 28ec: 08 95 ret + +000028ee : +static uint8_t rtc_buffer[32]; +static _Bool ds3231_status; +static sw_time timeBank; +void ds3231_init(void) +{ + ds3231_status = false; + 28ee: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b + timeBank.hour = 0; + timeBank.minute = 0; + timeBank.second = 0; + timeBank.pm_or_am = 1; + //reset and go + twi_write(DS3231_ADDR, DS3231_CTRL, 0x0); + 28f2: 40 e0 ldi r20, 0x00 ; 0 + 28f4: 6e e0 ldi r22, 0x0E ; 14 + 28f6: 88 e6 ldi r24, 0x68 ; 104 + 28f8: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + twi_write(DS3231_ADDR, DS3231_CTRL_STATUS, 0x0); + 28fc: 40 e0 ldi r20, 0x00 ; 0 + 28fe: 6f e0 ldi r22, 0x0F ; 15 + 2900: 88 e6 ldi r24, 0x68 ; 104 + 2902: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + //configure and enable interrupt + PORTD.PIN0CTRL = PORT_ISC_FALLING_gc; + 2906: e0 e6 ldi r30, 0x60 ; 96 + 2908: f6 e0 ldi r31, 0x06 ; 6 + 290a: 82 e0 ldi r24, 0x02 ; 2 + 290c: 80 8b std Z+16, r24 ; 0x10 + PORTD.INT1MASK = PIN0_bm; + 290e: 81 e0 ldi r24, 0x01 ; 1 + 2910: 83 87 std Z+11, r24 ; 0x0b + //or equals OR ELSE + PORTD.INTCTRL |= PORT_INT1LVL_HI_gc; + 2912: 81 85 ldd r24, Z+9 ; 0x09 + 2914: 8c 60 ori r24, 0x0C ; 12 + 2916: 81 87 std Z+9, r24 ; 0x09 + + //swprintf(SWDEBUG, "%#x\n", rtc_buffer); + ds3231_set_time(3, 58, 00); + 2918: 40 e0 ldi r20, 0x00 ; 0 + 291a: 6a e3 ldi r22, 0x3A ; 58 + 291c: 83 e0 ldi r24, 0x03 ; 3 + 291e: 86 cf rjmp .-244 ; 0x282c + 2920: 08 95 ret + +00002922 : + twi_write(DS3231_ADDR, DS3231_MINUTES, formattedMinutes); + twi_write(DS3231_ADDR, DS3231_SECONDS, formattedSeconds); +} + +void ds3231_get_time(sw_time* time) +{ + 2922: cf 93 push r28 + 2924: df 93 push r29 + 2926: ec 01 movw r28, r24 + twi_read(DS3231_ADDR, DS3231_SECONDS, 3, rtc_buffer); + 2928: 2c e1 ldi r18, 0x1C ; 28 + 292a: 32 e2 ldi r19, 0x22 ; 34 + 292c: 43 e0 ldi r20, 0x03 ; 3 + 292e: 60 e0 ldi r22, 0x00 ; 0 + 2930: 88 e6 ldi r24, 0x68 ; 104 + 2932: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + uint8_t hours = rtc_buffer[2]; + 2936: ec e1 ldi r30, 0x1C ; 28 + 2938: f2 e2 ldi r31, 0x22 ; 34 + 293a: 22 81 ldd r18, Z+2 ; 0x02 + uint8_t minutes = rtc_buffer[1]; + 293c: 91 81 ldd r25, Z+1 ; 0x01 + uint8_t seconds = rtc_buffer[0]; + 293e: 80 81 ld r24, Z + time->hour = (((hours & ~0b11101111) >> 4) * 10) + (hours & ~0b11110000); + 2940: 24 fb bst r18, 4 + 2942: 33 27 eor r19, r19 + 2944: 30 f9 bld r19, 0 + 2946: 33 0f add r19, r19 + 2948: 43 2f mov r20, r19 + 294a: 44 0f add r20, r20 + 294c: 44 0f add r20, r20 + 294e: 34 0f add r19, r20 + 2950: 42 2f mov r20, r18 + 2952: 4f 70 andi r20, 0x0F ; 15 + 2954: 34 0f add r19, r20 + 2956: 38 83 st Y, r19 + time->minute = (((minutes & ~0b00001111) >> 4) * 10) + (minutes & ~0b11110000); + 2958: 39 2f mov r19, r25 + 295a: 36 95 lsr r19 + 295c: 36 95 lsr r19 + 295e: 36 95 lsr r19 + 2960: 3e 71 andi r19, 0x1E ; 30 + 2962: 43 2f mov r20, r19 + 2964: 44 0f add r20, r20 + 2966: 44 0f add r20, r20 + 2968: 34 0f add r19, r20 + 296a: 9f 70 andi r25, 0x0F ; 15 + 296c: 93 0f add r25, r19 + 296e: 99 83 std Y+1, r25 ; 0x01 + time->second = (((seconds & ~0b00001111) >> 4) * 10) + (seconds & ~0b11110000); + 2970: 98 2f mov r25, r24 + 2972: 96 95 lsr r25 + 2974: 96 95 lsr r25 + 2976: 96 95 lsr r25 + 2978: 9e 71 andi r25, 0x1E ; 30 + 297a: 39 2f mov r19, r25 + 297c: 33 0f add r19, r19 + 297e: 33 0f add r19, r19 + 2980: 93 0f add r25, r19 + 2982: 8f 70 andi r24, 0x0F ; 15 + 2984: 89 0f add r24, r25 + 2986: 8a 83 std Y+2, r24 ; 0x02 + //pm is high, am is low + time->pm_or_am = (hours & (1 << 5)) ? 1 : 0; + 2988: 25 fb bst r18, 5 + 298a: 22 27 eor r18, r18 + 298c: 20 f9 bld r18, 0 + 298e: 2b 83 std Y+3, r18 ; 0x03 +} + 2990: df 91 pop r29 + 2992: cf 91 pop r28 + 2994: 08 95 ret + +00002996 : + +_Bool ds3231_is_ready(void) +{ + return ds3231_status; +} + 2996: 80 91 1b 22 lds r24, 0x221B ; 0x80221b + 299a: 08 95 ret + +0000299c <__vector_65>: + +ISR(PORTD_INT1_vect) +{ + 299c: 1f 92 push r1 + 299e: 0f 92 push r0 + 29a0: 0f b6 in r0, 0x3f ; 63 + 29a2: 0f 92 push r0 + 29a4: 11 24 eor r1, r1 + 29a6: 08 b6 in r0, 0x38 ; 56 + 29a8: 0f 92 push r0 + 29aa: 18 be out 0x38, r1 ; 56 + 29ac: 8f 93 push r24 + ds3231_set_time(3, 58, 00); +} + +void ds3231_set_ready(void) +{ + ds3231_status = true; + 29ae: 81 e0 ldi r24, 0x01 ; 1 + 29b0: 80 93 1b 22 sts 0x221B, r24 ; 0x80221b +} + +ISR(PORTD_INT1_vect) +{ + ds3231_set_ready(); + 29b4: 8f 91 pop r24 + 29b6: 0f 90 pop r0 + 29b8: 08 be out 0x38, r0 ; 56 + 29ba: 0f 90 pop r0 + 29bc: 0f be out 0x3f, r0 ; 63 + 29be: 0f 90 pop r0 + 29c0: 1f 90 pop r1 + 29c2: 18 95 reti + +000029c4 : + 29c4: fc 01 movw r30, r24 + 29c6: 12 82 std Z+2, r1 ; 0x02 + 29c8: a0 81 ld r26, Z + 29ca: b1 81 ldd r27, Z+1 ; 0x01 + 29cc: 1c 92 st X, r1 + 29ce: 82 e0 ldi r24, 0x02 ; 2 + 29d0: 83 83 std Z+3, r24 ; 0x03 + 29d2: 08 95 ret + +000029d4 : + 29d4: 0f 93 push r16 + 29d6: 1f 93 push r17 + 29d8: cf 93 push r28 + 29da: df 93 push r29 + 29dc: 88 e1 ldi r24, 0x18 ; 24 + 29de: 90 e2 ldi r25, 0x20 ; 32 + 29e0: 0e 94 e2 2e call 0x5dc4 ; 0x5dc4 + 29e4: 9f 93 push r25 + 29e6: 8f 93 push r24 + 29e8: 8e e1 ldi r24, 0x1E ; 30 + 29ea: 90 e2 ldi r25, 0x20 ; 32 + 29ec: 9f 93 push r25 + 29ee: 8f 93 push r24 + 29f0: 88 e0 ldi r24, 0x08 ; 8 + 29f2: 8f 93 push r24 + 29f4: 80 ea ldi r24, 0xA0 ; 160 + 29f6: 8f 93 push r24 + 29f8: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 29fc: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2a00: 19 95 eicall + 2a02: cc e3 ldi r28, 0x3C ; 60 + 2a04: d2 e2 ldi r29, 0x22 ; 34 + 2a06: 04 e6 ldi r16, 0x64 ; 100 + 2a08: 12 e2 ldi r17, 0x22 ; 34 + 2a0a: 0f 90 pop r0 + 2a0c: 0f 90 pop r0 + 2a0e: 0f 90 pop r0 + 2a10: 0f 90 pop r0 + 2a12: 0f 90 pop r0 + 2a14: 0f 90 pop r0 + 2a16: ce 01 movw r24, r28 + 2a18: d5 df rcall .-86 ; 0x29c4 + 2a1a: 24 96 adiw r28, 0x04 ; 4 + 2a1c: c0 17 cp r28, r16 + 2a1e: d1 07 cpc r29, r17 + 2a20: d1 f7 brne .-12 ; 0x2a16 + 2a22: e6 e4 ldi r30, 0x46 ; 70 + 2a24: f9 e2 ldi r31, 0x29 ; 41 + 2a26: 80 e8 ldi r24, 0x80 ; 128 + 2a28: 95 e2 ldi r25, 0x25 ; 37 + 2a2a: a0 e0 ldi r26, 0x00 ; 0 + 2a2c: b0 e0 ldi r27, 0x00 ; 0 + 2a2e: 80 83 st Z, r24 + 2a30: 91 83 std Z+1, r25 ; 0x01 + 2a32: a2 83 std Z+2, r26 ; 0x02 + 2a34: b3 83 std Z+3, r27 ; 0x03 + 2a36: 81 e0 ldi r24, 0x01 ; 1 + 2a38: 86 83 std Z+6, r24 ; 0x06 + 2a3a: 15 82 std Z+5, r1 ; 0x05 + 2a3c: 83 e0 ldi r24, 0x03 ; 3 + 2a3e: 84 83 std Z+4, r24 ; 0x04 + 2a40: bf 01 movw r22, r30 + 2a42: 80 eb ldi r24, 0xB0 ; 176 + 2a44: 98 e0 ldi r25, 0x08 ; 8 + 2a46: 97 db rcall .-2258 ; 0x2176 + 2a48: 82 e2 ldi r24, 0x22 ; 34 + 2a4a: 90 e2 ldi r25, 0x20 ; 32 + 2a4c: 9f 93 push r25 + 2a4e: 8f 93 push r24 + 2a50: d8 e0 ldi r29, 0x08 ; 8 + 2a52: df 93 push r29 + 2a54: c0 eb ldi r28, 0xB0 ; 176 + 2a56: cf 93 push r28 + 2a58: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 2a5c: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2a60: 19 95 eicall + 2a62: 85 e3 ldi r24, 0x35 ; 53 + 2a64: 90 e2 ldi r25, 0x20 ; 32 + 2a66: 9f 93 push r25 + 2a68: 8f 93 push r24 + 2a6a: df 93 push r29 + 2a6c: cf 93 push r28 + 2a6e: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 2a72: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2a76: 19 95 eicall + 2a78: 86 e4 ldi r24, 0x46 ; 70 + 2a7a: 90 e2 ldi r25, 0x20 ; 32 + 2a7c: 9f 93 push r25 + 2a7e: 8f 93 push r24 + 2a80: df 93 push r29 + 2a82: cf 93 push r28 + 2a84: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 2a88: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2a8c: 19 95 eicall + 2a8e: 8a e7 ldi r24, 0x7A ; 122 + 2a90: 90 e2 ldi r25, 0x20 ; 32 + 2a92: 9f 93 push r25 + 2a94: 8f 93 push r24 + 2a96: df 93 push r29 + 2a98: cf 93 push r28 + 2a9a: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 2a9e: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2aa2: 19 95 eicall + 2aa4: 84 e9 ldi r24, 0x94 ; 148 + 2aa6: 90 e2 ldi r25, 0x20 ; 32 + 2aa8: 9f 93 push r25 + 2aaa: 8f 93 push r24 + 2aac: df 93 push r29 + 2aae: cf 93 push r28 + 2ab0: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 2ab4: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2ab8: 19 95 eicall + * \param level Interrupt level of the RXD interrupt. + */ +static inline void usart_set_rx_interrupt_level(USART_t *usart, + enum usart_int_level_t level) +{ + (usart)->CTRLA = ((usart)->CTRLA & ~USART_RXCINTLVL_gm) | + 2aba: e0 eb ldi r30, 0xB0 ; 176 + 2abc: f8 e0 ldi r31, 0x08 ; 8 + 2abe: 83 81 ldd r24, Z+3 ; 0x03 + 2ac0: 8f 7c andi r24, 0xCF ; 207 + 2ac2: 80 62 ori r24, 0x20 ; 32 + 2ac4: 83 83 std Z+3, r24 ; 0x03 + 2ac6: 8d b7 in r24, 0x3d ; 61 + 2ac8: 9e b7 in r25, 0x3e ; 62 + 2aca: 44 96 adiw r24, 0x14 ; 20 + 2acc: 8d bf out 0x3d, r24 ; 61 + 2ace: 9e bf out 0x3e, r25 ; 62 + 2ad0: df 91 pop r29 + 2ad2: cf 91 pop r28 + 2ad4: 1f 91 pop r17 + 2ad6: 0f 91 pop r16 + 2ad8: 08 95 ret + +00002ada <__vector_28>: + 2ada: 1f 92 push r1 + 2adc: 0f 92 push r0 + 2ade: 0f b6 in r0, 0x3f ; 63 + 2ae0: 0f 92 push r0 + 2ae2: 11 24 eor r1, r1 + 2ae4: 08 b6 in r0, 0x38 ; 56 + 2ae6: 0f 92 push r0 + 2ae8: 18 be out 0x38, r1 ; 56 + 2aea: 09 b6 in r0, 0x39 ; 57 + 2aec: 0f 92 push r0 + 2aee: 19 be out 0x39, r1 ; 57 + 2af0: 0b b6 in r0, 0x3b ; 59 + 2af2: 0f 92 push r0 + 2af4: 1b be out 0x3b, r1 ; 59 + 2af6: 2f 93 push r18 + 2af8: 3f 93 push r19 + 2afa: 4f 93 push r20 + 2afc: 5f 93 push r21 + 2afe: 6f 93 push r22 + 2b00: 7f 93 push r23 + 2b02: 8f 93 push r24 + 2b04: 9f 93 push r25 + 2b06: af 93 push r26 + 2b08: bf 93 push r27 + 2b0a: ef 93 push r30 + 2b0c: ff 93 push r31 + 2b0e: 80 eb ldi r24, 0xB0 ; 176 + 2b10: 98 e0 ldi r25, 0x08 ; 8 + 2b12: 18 da rcall .-3024 ; 0x1f44 + 2b14: 80 93 45 29 sts 0x2945, r24 ; 0x802945 + 2b18: ff 91 pop r31 + 2b1a: ef 91 pop r30 + 2b1c: bf 91 pop r27 + 2b1e: af 91 pop r26 + 2b20: 9f 91 pop r25 + 2b22: 8f 91 pop r24 + 2b24: 7f 91 pop r23 + 2b26: 6f 91 pop r22 + 2b28: 5f 91 pop r21 + 2b2a: 4f 91 pop r20 + 2b2c: 3f 91 pop r19 + 2b2e: 2f 91 pop r18 + 2b30: 0f 90 pop r0 + 2b32: 0b be out 0x3b, r0 ; 59 + 2b34: 0f 90 pop r0 + 2b36: 09 be out 0x39, r0 ; 57 + 2b38: 0f 90 pop r0 + 2b3a: 08 be out 0x38, r0 ; 56 + 2b3c: 0f 90 pop r0 + 2b3e: 0f be out 0x3f, r0 ; 63 + 2b40: 0f 90 pop r0 + 2b42: 1f 90 pop r1 + 2b44: 18 95 reti + +00002b46 <__portable_avr_delay_cycles>: + groundAlt_Data.samplect = 1; + bInitialAltitudeSet_MPL3 = true; + set_ntcle_off(groundAlt_Data.temp); + swprintf(SWDEBUG, "GROUND ALT: %-2.2f\n", groundAlt_Data.pressure); +} + + 2b46: 04 c0 rjmp .+8 ; 0x2b50 <__portable_avr_delay_cycles+0xa> + 2b48: 61 50 subi r22, 0x01 ; 1 + 2b4a: 71 09 sbc r23, r1 + 2b4c: 81 09 sbc r24, r1 + 2b4e: 91 09 sbc r25, r1 + 2b50: 61 15 cp r22, r1 + 2b52: 71 05 cpc r23, r1 + 2b54: 81 05 cpc r24, r1 + 2b56: 91 05 cpc r25, r1 + 2b58: b9 f7 brne .-18 ; 0x2b48 <__portable_avr_delay_cycles+0x2> + 2b5a: 08 95 ret + +00002b5c : + 2b5c: 48 e0 ldi r20, 0x08 ; 8 + 2b5e: 66 e6 ldi r22, 0x66 ; 102 + 2b60: 72 e2 ldi r23, 0x22 ; 34 + 2b62: 86 ea ldi r24, 0xA6 ; 166 + 2b64: 92 e2 ldi r25, 0x22 ; 34 + 2b66: 0e 94 9d 2d call 0x5b3a ; 0x5b3a + 2b6a: 48 e0 ldi r20, 0x08 ; 8 + 2b6c: 66 e8 ldi r22, 0x86 ; 134 + 2b6e: 72 e2 ldi r23, 0x22 ; 34 + 2b70: 8b ea ldi r24, 0xAB ; 171 + 2b72: 92 e2 ldi r25, 0x22 ; 34 + 2b74: 0e 94 9d 2d call 0x5b3a ; 0x5b3a + 2b78: 10 92 65 22 sts 0x2265, r1 ; 0x802265 + 2b7c: 10 92 64 22 sts 0x2264, r1 ; 0x802264 + 2b80: 44 e0 ldi r20, 0x04 ; 4 + 2b82: 66 e2 ldi r22, 0x26 ; 38 + 2b84: 80 e6 ldi r24, 0x60 ; 96 + 2b86: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + 2b8a: 2b eb ldi r18, 0xBB ; 187 + 2b8c: 32 e2 ldi r19, 0x22 ; 34 + 2b8e: 41 e0 ldi r20, 0x01 ; 1 + 2b90: 66 e2 ldi r22, 0x26 ; 38 + 2b92: 80 e6 ldi r24, 0x60 ; 96 + 2b94: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + 2b98: 80 91 bb 22 lds r24, 0x22BB ; 0x8022bb + 2b9c: 82 fd sbrc r24, 2 + 2b9e: f5 cf rjmp .-22 ; 0x2b8a + 2ba0: 47 e0 ldi r20, 0x07 ; 7 + 2ba2: 63 e1 ldi r22, 0x13 ; 19 + 2ba4: 80 e6 ldi r24, 0x60 ; 96 + 2ba6: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + 2baa: 40 e2 ldi r20, 0x20 ; 32 + 2bac: 68 e2 ldi r22, 0x28 ; 40 + 2bae: 80 e6 ldi r24, 0x60 ; 96 + 2bb0: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + 2bb4: 40 e8 ldi r20, 0x80 ; 128 + 2bb6: 69 e2 ldi r22, 0x29 ; 41 + 2bb8: 80 e6 ldi r24, 0x60 ; 96 + 2bba: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + 2bbe: 40 e8 ldi r20, 0x80 ; 128 + 2bc0: 6a e2 ldi r22, 0x2A ; 42 + 2bc2: 80 e6 ldi r24, 0x60 ; 96 + 2bc4: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + 2bc8: 48 e9 ldi r20, 0x98 ; 152 + 2bca: 66 e2 ldi r22, 0x26 ; 38 + 2bcc: 80 e6 ldi r24, 0x60 ; 96 + 2bce: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + 2bd2: 66 e5 ldi r22, 0x56 ; 86 + 2bd4: 73 e2 ldi r23, 0x23 ; 35 + 2bd6: 88 e0 ldi r24, 0x08 ; 8 + 2bd8: 90 e0 ldi r25, 0x00 ; 0 + 2bda: b5 df rcall .-150 ; 0x2b46 <__portable_avr_delay_cycles> + 2bdc: e0 e6 ldi r30, 0x60 ; 96 + 2bde: f6 e0 ldi r31, 0x06 ; 6 + 2be0: 81 e3 ldi r24, 0x31 ; 49 + 2be2: 82 8b std Z+18, r24 ; 0x12 + 2be4: 84 e0 ldi r24, 0x04 ; 4 + 2be6: 82 87 std Z+10, r24 ; 0x0a + 2be8: 81 85 ldd r24, Z+9 ; 0x09 + 2bea: 83 60 ori r24, 0x03 ; 3 + 2bec: 81 87 std Z+9, r24 ; 0x09 + 2bee: 08 95 ret + +00002bf0 : + 2bf0: cf 93 push r28 + 2bf2: df 93 push r29 + 2bf4: 20 91 64 22 lds r18, 0x2264 ; 0x802264 + 2bf8: 22 23 and r18, r18 + 2bfa: e1 f0 breq .+56 ; 0x2c34 + 2bfc: ec 01 movw r28, r24 + 2bfe: 8b ea ldi r24, 0xAB ; 171 + 2c00: 92 e2 ldi r25, 0x22 ; 34 + 2c02: 0e 94 f8 2c call 0x59f0 ; 0x59f0 + 2c06: 6d 83 std Y+5, r22 ; 0x05 + 2c08: 7e 83 std Y+6, r23 ; 0x06 + 2c0a: 8f 83 std Y+7, r24 ; 0x07 + 2c0c: 98 87 std Y+8, r25 ; 0x08 + 2c0e: 86 ea ldi r24, 0xA6 ; 166 + 2c10: 92 e2 ldi r25, 0x22 ; 34 + 2c12: 0e 94 f8 2c call 0x59f0 ; 0x59f0 + 2c16: 20 91 b1 22 lds r18, 0x22B1 ; 0x8022b1 + 2c1a: 30 91 b2 22 lds r19, 0x22B2 ; 0x8022b2 + 2c1e: 40 91 b3 22 lds r20, 0x22B3 ; 0x8022b3 + 2c22: 50 91 b4 22 lds r21, 0x22B4 ; 0x8022b4 + 2c26: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 2c2a: 69 83 std Y+1, r22 ; 0x01 + 2c2c: 7a 83 std Y+2, r23 ; 0x02 + 2c2e: 8b 83 std Y+3, r24 ; 0x03 + 2c30: 9c 83 std Y+4, r25 ; 0x04 + 2c32: 09 c0 rjmp .+18 ; 0x2c46 + 2c34: fc 01 movw r30, r24 + 2c36: 11 82 std Z+1, r1 ; 0x01 + 2c38: 12 82 std Z+2, r1 ; 0x02 + 2c3a: 13 82 std Z+3, r1 ; 0x03 + 2c3c: 14 82 std Z+4, r1 ; 0x04 + 2c3e: 15 82 std Z+5, r1 ; 0x05 + 2c40: 16 82 std Z+6, r1 ; 0x06 + 2c42: 17 82 std Z+7, r1 ; 0x07 + 2c44: 10 86 std Z+8, r1 ; 0x08 + 2c46: df 91 pop r29 + 2c48: cf 91 pop r28 + 2c4a: 08 95 ret + +00002c4c : + 2c4c: 80 91 65 22 lds r24, 0x2265 ; 0x802265 + 2c50: 08 95 ret + +00002c52 : + 2c52: 81 11 cpse r24, r1 + 2c54: 06 c0 rjmp .+12 ; 0x2c62 + 2c56: 4a e8 ldi r20, 0x8A ; 138 + 2c58: 66 e2 ldi r22, 0x26 ; 38 + 2c5a: 80 e6 ldi r24, 0x60 ; 96 + 2c5c: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 + 2c60: 08 95 ret + 2c62: 4a e0 ldi r20, 0x0A ; 10 + 2c64: 66 e2 ldi r22, 0x26 ; 38 + 2c66: 80 e6 ldi r24, 0x60 ; 96 + 2c68: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 + 2c6c: 08 95 ret + +00002c6e : + 2c6e: cf 92 push r12 + 2c70: df 92 push r13 + 2c72: ef 92 push r14 + 2c74: ff 92 push r15 + 2c76: cf 93 push r28 + 2c78: df 93 push r29 + 2c7a: c0 eb ldi r28, 0xB0 ; 176 + 2c7c: d2 e2 ldi r29, 0x22 ; 34 + 2c7e: 69 85 ldd r22, Y+9 ; 0x09 + 2c80: 7a 85 ldd r23, Y+10 ; 0x0a + 2c82: 07 2e mov r0, r23 + 2c84: 00 0c add r0, r0 + 2c86: 88 0b sbc r24, r24 + 2c88: 99 0b sbc r25, r25 + 2c8a: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 2c8e: 6b 01 movw r12, r22 + 2c90: 7c 01 movw r14, r24 + 2c92: 9b 01 movw r18, r22 + 2c94: ac 01 movw r20, r24 + 2c96: 69 81 ldd r22, Y+1 ; 0x01 + 2c98: 7a 81 ldd r23, Y+2 ; 0x02 + 2c9a: 8b 81 ldd r24, Y+3 ; 0x03 + 2c9c: 9c 81 ldd r25, Y+4 ; 0x04 + 2c9e: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 2ca2: 69 83 std Y+1, r22 ; 0x01 + 2ca4: 7a 83 std Y+2, r23 ; 0x02 + 2ca6: 8b 83 std Y+3, r24 ; 0x03 + 2ca8: 9c 83 std Y+4, r25 ; 0x04 + 2caa: a7 01 movw r20, r14 + 2cac: 96 01 movw r18, r12 + 2cae: 6d 81 ldd r22, Y+5 ; 0x05 + 2cb0: 7e 81 ldd r23, Y+6 ; 0x06 + 2cb2: 8f 81 ldd r24, Y+7 ; 0x07 + 2cb4: 98 85 ldd r25, Y+8 ; 0x08 + 2cb6: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 2cba: 6d 83 std Y+5, r22 ; 0x05 + 2cbc: 7e 83 std Y+6, r23 ; 0x06 + 2cbe: 8f 83 std Y+7, r24 ; 0x07 + 2cc0: 98 87 std Y+8, r25 ; 0x08 + 2cc2: 21 e0 ldi r18, 0x01 ; 1 + 2cc4: 30 e0 ldi r19, 0x00 ; 0 + 2cc6: 29 87 std Y+9, r18 ; 0x09 + 2cc8: 3a 87 std Y+10, r19 ; 0x0a + 2cca: 20 93 64 22 sts 0x2264, r18 ; 0x802264 + 2cce: 0e 94 5c 30 call 0x60b8 ; 0x60b8 + 2cd2: 8c 81 ldd r24, Y+4 ; 0x04 + 2cd4: 8f 93 push r24 + 2cd6: 8b 81 ldd r24, Y+3 ; 0x03 + 2cd8: 8f 93 push r24 + 2cda: 8a 81 ldd r24, Y+2 ; 0x02 + 2cdc: 8f 93 push r24 + 2cde: 89 81 ldd r24, Y+1 ; 0x01 + 2ce0: 8f 93 push r24 + 2ce2: 86 ea ldi r24, 0xA6 ; 166 + 2ce4: 90 e2 ldi r25, 0x20 ; 32 + 2ce6: 9f 93 push r25 + 2ce8: 8f 93 push r24 + 2cea: 88 e0 ldi r24, 0x08 ; 8 + 2cec: 8f 93 push r24 + 2cee: 80 ea ldi r24, 0xA0 ; 160 + 2cf0: 8f 93 push r24 + 2cf2: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 2cf6: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 2cfa: 19 95 eicall + 2cfc: 8d b7 in r24, 0x3d ; 61 + 2cfe: 9e b7 in r25, 0x3e ; 62 + 2d00: 08 96 adiw r24, 0x08 ; 8 + 2d02: 8d bf out 0x3d, r24 ; 61 + 2d04: 9e bf out 0x3e, r25 ; 62 + 2d06: df 91 pop r29 + 2d08: cf 91 pop r28 + 2d0a: ff 90 pop r15 + 2d0c: ef 90 pop r14 + 2d0e: df 90 pop r13 + 2d10: cf 90 pop r12 + 2d12: 08 95 ret + +00002d14 : + 2d14: 8f 92 push r8 + 2d16: 9f 92 push r9 + 2d18: af 92 push r10 + 2d1a: bf 92 push r11 + 2d1c: cf 92 push r12 + 2d1e: df 92 push r13 + 2d20: ef 92 push r14 + 2d22: ff 92 push r15 + 2d24: 0f 93 push r16 + 2d26: 1f 93 push r17 + 2d28: cf 93 push r28 + 2d2a: df 93 push r29 + 2d2c: 10 92 65 22 sts 0x2265, r1 ; 0x802265 + 2d30: 2b eb ldi r18, 0xBB ; 187 + 2d32: 32 e2 ldi r19, 0x22 ; 34 + 2d34: 46 e0 ldi r20, 0x06 ; 6 + 2d36: 60 e0 ldi r22, 0x00 ; 0 + 2d38: 80 e6 ldi r24, 0x60 ; 96 + 2d3a: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + 2d3e: 80 91 bb 22 lds r24, 0x22BB ; 0x8022bb + 2d42: 83 ff sbrs r24, 3 + 2d44: da c0 rjmp .+436 ; 0x2efa + 2d46: cb eb ldi r28, 0xBB ; 187 + 2d48: d2 e2 ldi r29, 0x22 ; 34 + 2d4a: b9 80 ldd r11, Y+1 ; 0x01 + 2d4c: ca 80 ldd r12, Y+2 ; 0x02 + 2d4e: ab 80 ldd r10, Y+3 ; 0x03 + 2d50: 1c 81 ldd r17, Y+4 ; 0x04 + 2d52: 0d 81 ldd r16, Y+5 ; 0x05 + 2d54: 9e 01 movw r18, r28 + 2d56: 41 e0 ldi r20, 0x01 ; 1 + 2d58: 66 e2 ldi r22, 0x26 ; 38 + 2d5a: 80 e6 ldi r24, 0x60 ; 96 + 2d5c: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + 2d60: 88 81 ld r24, Y + 2d62: 88 23 and r24, r24 + 2d64: 1c f5 brge .+70 ; 0x2dac + 2d66: 6c 2d mov r22, r12 + 2d68: 70 e0 ldi r23, 0x00 ; 0 + 2d6a: 7b 29 or r23, r11 + 2d6c: 07 2e mov r0, r23 + 2d6e: 00 0c add r0, r0 + 2d70: 88 0b sbc r24, r24 + 2d72: 99 0b sbc r25, r25 + 2d74: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 2d78: 6b 01 movw r12, r22 + 2d7a: 7c 01 movw r14, r24 + 2d7c: ca 2d mov r28, r10 + 2d7e: c2 95 swap r28 + 2d80: cf 70 andi r28, 0x0F ; 15 + 2d82: 6c 2f mov r22, r28 + 2d84: 70 e0 ldi r23, 0x00 ; 0 + 2d86: 80 e0 ldi r24, 0x00 ; 0 + 2d88: 90 e0 ldi r25, 0x00 ; 0 + 2d8a: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 2d8e: 20 e0 ldi r18, 0x00 ; 0 + 2d90: 30 e0 ldi r19, 0x00 ; 0 + 2d92: 40 e8 ldi r20, 0x80 ; 128 + 2d94: 5d e3 ldi r21, 0x3D ; 61 + 2d96: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 2d9a: 9b 01 movw r18, r22 + 2d9c: ac 01 movw r20, r24 + 2d9e: c7 01 movw r24, r14 + 2da0: b6 01 movw r22, r12 + 2da2: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 2da6: 6b 01 movw r12, r22 + 2da8: 7c 01 movw r14, r24 + 2daa: 2f c0 rjmp .+94 ; 0x2e0a + 2dac: d1 2c mov r13, r1 + 2dae: e1 2c mov r14, r1 + 2db0: f1 2c mov r15, r1 + 2db2: fe 2c mov r15, r14 + 2db4: ed 2c mov r14, r13 + 2db6: dc 2c mov r13, r12 + 2db8: cc 24 eor r12, r12 + 2dba: eb 28 or r14, r11 + 2dbc: ca 28 or r12, r10 + 2dbe: ca 2d mov r28, r10 + 2dc0: c0 73 andi r28, 0x30 ; 48 + 2dc2: c2 95 swap r28 + 2dc4: cf 70 andi r28, 0x0F ; 15 + 2dc6: 6c 2f mov r22, r28 + 2dc8: 70 e0 ldi r23, 0x00 ; 0 + 2dca: 80 e0 ldi r24, 0x00 ; 0 + 2dcc: 90 e0 ldi r25, 0x00 ; 0 + 2dce: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf> + 2dd2: 20 e0 ldi r18, 0x00 ; 0 + 2dd4: 30 e0 ldi r19, 0x00 ; 0 + 2dd6: 40 e8 ldi r20, 0x80 ; 128 + 2dd8: 5e e3 ldi r21, 0x3E ; 62 + 2dda: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 2dde: 4b 01 movw r8, r22 + 2de0: 5c 01 movw r10, r24 + 2de2: c7 01 movw r24, r14 + 2de4: b6 01 movw r22, r12 + 2de6: 68 94 set + 2de8: 15 f8 bld r1, 5 + 2dea: 95 95 asr r25 + 2dec: 87 95 ror r24 + 2dee: 77 95 ror r23 + 2df0: 67 95 ror r22 + 2df2: 16 94 lsr r1 + 2df4: d1 f7 brne .-12 ; 0x2dea + 2df6: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 2dfa: 9b 01 movw r18, r22 + 2dfc: ac 01 movw r20, r24 + 2dfe: c5 01 movw r24, r10 + 2e00: b4 01 movw r22, r8 + 2e02: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 2e06: 6b 01 movw r12, r22 + 2e08: 7c 01 movw r14, r24 + 2e0a: a7 01 movw r20, r14 + 2e0c: 96 01 movw r18, r12 + 2e0e: c7 01 movw r24, r14 + 2e10: b6 01 movw r22, r12 + 2e12: 0e 94 b5 35 call 0x6b6a ; 0x6b6a <__unordsf2> + 2e16: 81 11 cpse r24, r1 + 2e18: 72 c0 rjmp .+228 ; 0x2efe + 2e1a: 20 e0 ldi r18, 0x00 ; 0 + 2e1c: 30 e0 ldi r19, 0x00 ; 0 + 2e1e: a9 01 movw r20, r18 + 2e20: c7 01 movw r24, r14 + 2e22: b6 01 movw r22, r12 + 2e24: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 2e28: 88 23 and r24, r24 + 2e2a: 09 f4 brne .+2 ; 0x2e2e + 2e2c: 6a c0 rjmp .+212 ; 0x2f02 + 2e2e: d0 2f mov r29, r16 + 2e30: d2 95 swap r29 + 2e32: df 70 andi r29, 0x0F ; 15 + 2e34: 6d 2f mov r22, r29 + 2e36: 70 e0 ldi r23, 0x00 ; 0 + 2e38: 80 e0 ldi r24, 0x00 ; 0 + 2e3a: 90 e0 ldi r25, 0x00 ; 0 + 2e3c: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 2e40: 20 e0 ldi r18, 0x00 ; 0 + 2e42: 30 e0 ldi r19, 0x00 ; 0 + 2e44: 40 e8 ldi r20, 0x80 ; 128 + 2e46: 5d e3 ldi r21, 0x3D ; 61 + 2e48: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 2e4c: 4b 01 movw r8, r22 + 2e4e: 5c 01 movw r10, r24 + 2e50: 61 2f mov r22, r17 + 2e52: 70 e0 ldi r23, 0x00 ; 0 + 2e54: 80 e0 ldi r24, 0x00 ; 0 + 2e56: 90 e0 ldi r25, 0x00 ; 0 + 2e58: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf> + 2e5c: 9b 01 movw r18, r22 + 2e5e: ac 01 movw r20, r24 + 2e60: c5 01 movw r24, r10 + 2e62: b4 01 movw r22, r8 + 2e64: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 2e68: 4b 01 movw r8, r22 + 2e6a: 5c 01 movw r10, r24 + 2e6c: 9b 01 movw r18, r22 + 2e6e: ac 01 movw r20, r24 + 2e70: 0e 94 b5 35 call 0x6b6a ; 0x6b6a <__unordsf2> + 2e74: 81 11 cpse r24, r1 + 2e76: 47 c0 rjmp .+142 ; 0x2f06 + 2e78: 20 e0 ldi r18, 0x00 ; 0 + 2e7a: 30 e0 ldi r19, 0x00 ; 0 + 2e7c: a9 01 movw r20, r18 + 2e7e: c5 01 movw r24, r10 + 2e80: b4 01 movw r22, r8 + 2e82: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 2e86: 88 23 and r24, r24 + 2e88: 09 f4 brne .+2 ; 0x2e8c + 2e8a: 3f c0 rjmp .+126 ; 0x2f0a + 2e8c: c0 91 64 22 lds r28, 0x2264 ; 0x802264 + 2e90: cc 23 and r28, r28 + 2e92: 69 f0 breq .+26 ; 0x2eae + 2e94: b5 01 movw r22, r10 + 2e96: a4 01 movw r20, r8 + 2e98: 8b ea ldi r24, 0xAB ; 171 + 2e9a: 92 e2 ldi r25, 0x22 ; 34 + 2e9c: 0e 94 ce 2c call 0x599c ; 0x599c + 2ea0: b7 01 movw r22, r14 + 2ea2: a6 01 movw r20, r12 + 2ea4: 86 ea ldi r24, 0xA6 ; 166 + 2ea6: 92 e2 ldi r25, 0x22 ; 34 + 2ea8: 0e 94 ce 2c call 0x599c ; 0x599c + 2eac: 31 c0 rjmp .+98 ; 0x2f10 + 2eae: c0 eb ldi r28, 0xB0 ; 176 + 2eb0: d2 e2 ldi r29, 0x22 ; 34 + 2eb2: a7 01 movw r20, r14 + 2eb4: 96 01 movw r18, r12 + 2eb6: 69 81 ldd r22, Y+1 ; 0x01 + 2eb8: 7a 81 ldd r23, Y+2 ; 0x02 + 2eba: 8b 81 ldd r24, Y+3 ; 0x03 + 2ebc: 9c 81 ldd r25, Y+4 ; 0x04 + 2ebe: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 2ec2: 69 83 std Y+1, r22 ; 0x01 + 2ec4: 7a 83 std Y+2, r23 ; 0x02 + 2ec6: 8b 83 std Y+3, r24 ; 0x03 + 2ec8: 9c 83 std Y+4, r25 ; 0x04 + 2eca: a5 01 movw r20, r10 + 2ecc: 94 01 movw r18, r8 + 2ece: 6d 81 ldd r22, Y+5 ; 0x05 + 2ed0: 7e 81 ldd r23, Y+6 ; 0x06 + 2ed2: 8f 81 ldd r24, Y+7 ; 0x07 + 2ed4: 98 85 ldd r25, Y+8 ; 0x08 + 2ed6: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 2eda: 6d 83 std Y+5, r22 ; 0x05 + 2edc: 7e 83 std Y+6, r23 ; 0x06 + 2ede: 8f 83 std Y+7, r24 ; 0x07 + 2ee0: 98 87 std Y+8, r25 ; 0x08 + 2ee2: 89 85 ldd r24, Y+9 ; 0x09 + 2ee4: 9a 85 ldd r25, Y+10 ; 0x0a + 2ee6: 01 96 adiw r24, 0x01 ; 1 + 2ee8: 89 87 std Y+9, r24 ; 0x09 + 2eea: 9a 87 std Y+10, r25 ; 0x0a + 2eec: 80 38 cpi r24, 0x80 ; 128 + 2eee: 91 05 cpc r25, r1 + 2ef0: 74 f0 brlt .+28 ; 0x2f0e + 2ef2: ce 01 movw r24, r28 + 2ef4: bc de rcall .-648 ; 0x2c6e + 2ef6: c1 e0 ldi r28, 0x01 ; 1 + 2ef8: 0b c0 rjmp .+22 ; 0x2f10 + 2efa: c0 e0 ldi r28, 0x00 ; 0 + 2efc: 09 c0 rjmp .+18 ; 0x2f10 + 2efe: c0 e0 ldi r28, 0x00 ; 0 + 2f00: 07 c0 rjmp .+14 ; 0x2f10 + 2f02: c0 e0 ldi r28, 0x00 ; 0 + 2f04: 05 c0 rjmp .+10 ; 0x2f10 + 2f06: c0 e0 ldi r28, 0x00 ; 0 + 2f08: 03 c0 rjmp .+6 ; 0x2f10 + 2f0a: c0 e0 ldi r28, 0x00 ; 0 + 2f0c: 01 c0 rjmp .+2 ; 0x2f10 + 2f0e: c1 e0 ldi r28, 0x01 ; 1 + 2f10: 8c 2f mov r24, r28 + 2f12: df 91 pop r29 + 2f14: cf 91 pop r28 + 2f16: 1f 91 pop r17 + 2f18: 0f 91 pop r16 + 2f1a: ff 90 pop r15 + 2f1c: ef 90 pop r14 + 2f1e: df 90 pop r13 + 2f20: cf 90 pop r12 + 2f22: bf 90 pop r11 + 2f24: af 90 pop r10 + 2f26: 9f 90 pop r9 + 2f28: 8f 90 pop r8 + 2f2a: 08 95 ret + +00002f2c <__vector_64>: +_Bool mpl3_checkbInitialAltitudeSet(void) +{ + return bInitialAltitudeSet_MPL3; + 2f2c: 1f 92 push r1 + 2f2e: 0f 92 push r0 + 2f30: 0f b6 in r0, 0x3f ; 63 + 2f32: 0f 92 push r0 + 2f34: 11 24 eor r1, r1 + 2f36: 08 b6 in r0, 0x38 ; 56 + 2f38: 0f 92 push r0 + 2f3a: 18 be out 0x38, r1 ; 56 + 2f3c: 8f 93 push r24 + +void mpl3_clear_data_flag(void) +{ + b_mpl3fired = false; +} + + 2f3e: 81 e0 ldi r24, 0x01 ; 1 + 2f40: 80 93 65 22 sts 0x2265, r24 ; 0x802265 + +_Bool mpl3_checkbInitialAltitudeSet(void) +{ + return bInitialAltitudeSet_MPL3; +} + + 2f44: 8f 91 pop r24 + 2f46: 0f 90 pop r0 + 2f48: 08 be out 0x38, r0 ; 56 + 2f4a: 0f 90 pop r0 + 2f4c: 0f be out 0x3f, r0 ; 63 + 2f4e: 0f 90 pop r0 + 2f50: 1f 90 pop r1 + 2f52: 18 95 reti + +00002f54 <__portable_avr_delay_cycles>: + { + case MAG_14BITS: + mag_resolution = (float)(10.f * 4912.f / 8190.f); + break; + case MAG_16BITS: + mag_resolution = (float)(10.f * 4912.f / 32760.f); + 2f54: 04 c0 rjmp .+8 ; 0x2f5e <__portable_avr_delay_cycles+0xa> + 2f56: 61 50 subi r22, 0x01 ; 1 + 2f58: 71 09 sbc r23, r1 + 2f5a: 81 09 sbc r24, r1 + 2f5c: 91 09 sbc r25, r1 + 2f5e: 61 15 cp r22, r1 + 2f60: 71 05 cpc r23, r1 + 2f62: 81 05 cpc r24, r1 + 2f64: 91 05 cpc r25, r1 + 2f66: b9 f7 brne .-18 ; 0x2f56 <__portable_avr_delay_cycles+0x2> + 2f68: 08 95 ret + +00002f6a : + 2f6a: 80 93 89 24 sts 0x2489, r24 ; 0x802489 + 2f6e: 08 95 ret + +00002f70 : + 2f70: 80 91 89 24 lds r24, 0x2489 ; 0x802489 + 2f74: 08 95 ret + +00002f76 : + 2f76: 68 2f mov r22, r24 + 2f78: 70 e0 ldi r23, 0x00 ; 0 + 2f7a: 88 ee ldi r24, 0xE8 ; 232 + 2f7c: 93 e0 ldi r25, 0x03 ; 3 + 2f7e: 0e 94 06 3a call 0x740c ; 0x740c <__udivmodhi4> + 2f82: 4f ef ldi r20, 0xFF ; 255 + 2f84: 46 0f add r20, r22 + 2f86: 69 e1 ldi r22, 0x19 ; 25 + 2f88: 89 e6 ldi r24, 0x69 ; 105 + 2f8a: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 + 2f8e: 08 95 ret + +00002f90 : + 2f90: cf 93 push r28 + 2f92: df 93 push r29 + 2f94: ec 01 movw r28, r24 + 2f96: 84 e4 ldi r24, 0x44 ; 68 + 2f98: 94 e2 ldi r25, 0x24 ; 36 + 2f9a: 0e 94 f8 2c call 0x59f0 ; 0x59f0 + 2f9e: 68 83 st Y, r22 + 2fa0: 79 83 std Y+1, r23 ; 0x01 + 2fa2: 8a 83 std Y+2, r24 ; 0x02 + 2fa4: 9b 83 std Y+3, r25 ; 0x03 + 2fa6: 87 e1 ldi r24, 0x17 ; 23 + 2fa8: 94 e2 ldi r25, 0x24 ; 36 + 2faa: 0e 94 f8 2c call 0x59f0 ; 0x59f0 + 2fae: 6c 83 std Y+4, r22 ; 0x04 + 2fb0: 7d 83 std Y+5, r23 ; 0x05 + 2fb2: 8e 83 std Y+6, r24 ; 0x06 + 2fb4: 9f 83 std Y+7, r25 ; 0x07 + 2fb6: 8a ee ldi r24, 0xEA ; 234 + 2fb8: 93 e2 ldi r25, 0x23 ; 35 + 2fba: 0e 94 f8 2c call 0x59f0 ; 0x59f0 + 2fbe: 68 87 std Y+8, r22 ; 0x08 + 2fc0: 79 87 std Y+9, r23 ; 0x09 + 2fc2: 8a 87 std Y+10, r24 ; 0x0a + 2fc4: 9b 87 std Y+11, r25 ; 0x0b + 2fc6: df 91 pop r29 + 2fc8: cf 91 pop r28 + 2fca: 08 95 ret + +00002fcc : + 2fcc: cf 93 push r28 + 2fce: df 93 push r29 + 2fd0: ec 01 movw r28, r24 + 2fd2: 8d eb ldi r24, 0xBD ; 189 + 2fd4: 93 e2 ldi r25, 0x23 ; 35 + 2fd6: 0e 94 cd 2d call 0x5b9a ; 0x5b9a + 2fda: 68 83 st Y, r22 + 2fdc: 79 83 std Y+1, r23 ; 0x01 + 2fde: 8a 83 std Y+2, r24 ; 0x02 + 2fe0: 9b 83 std Y+3, r25 ; 0x03 + 2fe2: 80 e9 ldi r24, 0x90 ; 144 + 2fe4: 93 e2 ldi r25, 0x23 ; 35 + 2fe6: 0e 94 cd 2d call 0x5b9a ; 0x5b9a + 2fea: 6c 83 std Y+4, r22 ; 0x04 + 2fec: 7d 83 std Y+5, r23 ; 0x05 + 2fee: 8e 83 std Y+6, r24 ; 0x06 + 2ff0: 9f 83 std Y+7, r25 ; 0x07 + 2ff2: 83 e6 ldi r24, 0x63 ; 99 + 2ff4: 93 e2 ldi r25, 0x23 ; 35 + 2ff6: 0e 94 cd 2d call 0x5b9a ; 0x5b9a + 2ffa: 68 87 std Y+8, r22 ; 0x08 + 2ffc: 79 87 std Y+9, r23 ; 0x09 + 2ffe: 8a 87 std Y+10, r24 ; 0x0a + 3000: 9b 87 std Y+11, r25 ; 0x0b + 3002: df 91 pop r29 + 3004: cf 91 pop r28 + 3006: 08 95 ret + +00003008 : + 3008: 2f 92 push r2 + 300a: 3f 92 push r3 + 300c: 4f 92 push r4 + 300e: 5f 92 push r5 + 3010: 6f 92 push r6 + 3012: 7f 92 push r7 + 3014: 8f 92 push r8 + 3016: 9f 92 push r9 + 3018: af 92 push r10 + 301a: bf 92 push r11 + 301c: cf 92 push r12 + 301e: df 92 push r13 + 3020: ef 92 push r14 + 3022: ff 92 push r15 + 3024: 0f 93 push r16 + 3026: 1f 93 push r17 + 3028: cf 93 push r28 + 302a: df 93 push r29 + 302c: cd b7 in r28, 0x3d ; 61 + 302e: de b7 in r29, 0x3e ; 62 + 3030: a4 97 sbiw r28, 0x24 ; 36 + 3032: cd bf out 0x3d, r28 ; 61 + 3034: de bf out 0x3e, r29 ; 62 + 3036: fc 01 movw r30, r24 + 3038: a0 80 ld r10, Z + 303a: b1 80 ldd r11, Z+1 ; 0x01 + 303c: c2 80 ldd r12, Z+2 ; 0x02 + 303e: d3 80 ldd r13, Z+3 ; 0x03 + 3040: e4 88 ldd r14, Z+20 ; 0x14 + 3042: f5 88 ldd r15, Z+21 ; 0x15 + 3044: 06 89 ldd r16, Z+22 ; 0x16 + 3046: 17 89 ldd r17, Z+23 ; 0x17 + 3048: 20 89 ldd r18, Z+16 ; 0x10 + 304a: 31 89 ldd r19, Z+17 ; 0x11 + 304c: 42 89 ldd r20, Z+18 ; 0x12 + 304e: 53 89 ldd r21, Z+19 ; 0x13 + 3050: 44 84 ldd r4, Z+12 ; 0x0c + 3052: 55 84 ldd r5, Z+13 ; 0x0d + 3054: 66 84 ldd r6, Z+14 ; 0x0e + 3056: 77 84 ldd r7, Z+15 ; 0x0f + 3058: 80 a1 ldd r24, Z+32 ; 0x20 + 305a: 91 a1 ldd r25, Z+33 ; 0x21 + 305c: a2 a1 ldd r26, Z+34 ; 0x22 + 305e: b3 a1 ldd r27, Z+35 ; 0x23 + 3060: b0 58 subi r27, 0x80 ; 128 + 3062: bf 93 push r27 + 3064: af 93 push r26 + 3066: 9f 93 push r25 + 3068: 8f 93 push r24 + 306a: 87 8d ldd r24, Z+31 ; 0x1f + 306c: 8f 93 push r24 + 306e: 86 8d ldd r24, Z+30 ; 0x1e + 3070: 8f 93 push r24 + 3072: 85 8d ldd r24, Z+29 ; 0x1d + 3074: 8f 93 push r24 + 3076: 84 8d ldd r24, Z+28 ; 0x1c + 3078: 8f 93 push r24 + 307a: 83 8d ldd r24, Z+27 ; 0x1b + 307c: 8f 93 push r24 + 307e: 82 8d ldd r24, Z+26 ; 0x1a + 3080: 8f 93 push r24 + 3082: 81 8d ldd r24, Z+25 ; 0x19 + 3084: 8f 93 push r24 + 3086: 80 8d ldd r24, Z+24 ; 0x18 + 3088: 8f 93 push r24 + 308a: 83 85 ldd r24, Z+11 ; 0x0b + 308c: 8f 93 push r24 + 308e: 82 85 ldd r24, Z+10 ; 0x0a + 3090: 8f 93 push r24 + 3092: 81 85 ldd r24, Z+9 ; 0x09 + 3094: 8f 93 push r24 + 3096: 80 85 ldd r24, Z+8 ; 0x08 + 3098: 8f 93 push r24 + 309a: 87 81 ldd r24, Z+7 ; 0x07 + 309c: 8f 93 push r24 + 309e: 86 81 ldd r24, Z+6 ; 0x06 + 30a0: 8f 93 push r24 + 30a2: 85 81 ldd r24, Z+5 ; 0x05 + 30a4: 8f 93 push r24 + 30a6: 84 81 ldd r24, Z+4 ; 0x04 + 30a8: 8f 93 push r24 + 30aa: c3 01 movw r24, r6 + 30ac: b2 01 movw r22, r4 + 30ae: 0e 94 22 24 call 0x4844 ; 0x4844 + 30b2: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 30b6: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 30ba: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 30be: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 30c2: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start> + 30c6: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1> + 30ca: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2> + 30ce: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3> + 30d2: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 + 30d6: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 + 30da: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 + 30de: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 + 30e2: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 + 30e6: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 + 30ea: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 + 30ee: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 + 30f2: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 30f6: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 30fa: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 30fe: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 3102: e9 82 std Y+1, r14 ; 0x01 + 3104: fa 82 std Y+2, r15 ; 0x02 + 3106: 0b 83 std Y+3, r16 ; 0x03 + 3108: 1c 83 std Y+4, r17 ; 0x04 + 310a: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 310e: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 3112: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 3116: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 311a: ed 82 std Y+5, r14 ; 0x05 + 311c: fe 82 std Y+6, r15 ; 0x06 + 311e: 0f 83 std Y+7, r16 ; 0x07 + 3120: 18 87 std Y+8, r17 ; 0x08 + 3122: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 3126: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 312a: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 312e: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 3132: e9 86 std Y+9, r14 ; 0x09 + 3134: fa 86 std Y+10, r15 ; 0x0a + 3136: 0b 87 std Y+11, r16 ; 0x0b + 3138: 1c 87 std Y+12, r17 ; 0x0c + 313a: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 313e: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 3142: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 3146: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 314a: ed 86 std Y+13, r14 ; 0x0d + 314c: fe 86 std Y+14, r15 ; 0x0e + 314e: 0f 87 std Y+15, r16 ; 0x0f + 3150: 18 8b std Y+16, r17 ; 0x10 + 3152: e0 90 a4 24 lds r14, 0x24A4 ; 0x8024a4 + 3156: f0 90 a5 24 lds r15, 0x24A5 ; 0x8024a5 + 315a: 00 91 a6 24 lds r16, 0x24A6 ; 0x8024a6 + 315e: 10 91 a7 24 lds r17, 0x24A7 ; 0x8024a7 + 3162: e9 8a std Y+17, r14 ; 0x11 + 3164: fa 8a std Y+18, r15 ; 0x12 + 3166: 0b 8b std Y+19, r16 ; 0x13 + 3168: 1c 8b std Y+20, r17 ; 0x14 + 316a: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 316e: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 3172: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 3176: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 317a: ed 8a std Y+21, r14 ; 0x15 + 317c: fe 8a std Y+22, r15 ; 0x16 + 317e: 0f 8b std Y+23, r16 ; 0x17 + 3180: 18 8f std Y+24, r17 ; 0x18 + 3182: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start> + 3186: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1> + 318a: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2> + 318e: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3> + 3192: e9 a2 std Y+33, r14 ; 0x21 + 3194: fa a2 std Y+34, r15 ; 0x22 + 3196: 0b a3 std Y+35, r16 ; 0x23 + 3198: 1c a3 std Y+36, r17 ; 0x24 + 319a: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 319e: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 31a2: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 31a6: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 31aa: e9 8e std Y+25, r14 ; 0x19 + 31ac: fa 8e std Y+26, r15 ; 0x1a + 31ae: 0b 8f std Y+27, r16 ; 0x1b + 31b0: 1c 8f std Y+28, r17 ; 0x1c + 31b2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 31b6: 6b 01 movw r12, r22 + 31b8: 7c 01 movw r14, r24 + 31ba: a3 01 movw r20, r6 + 31bc: 92 01 movw r18, r4 + 31be: c5 01 movw r24, r10 + 31c0: b4 01 movw r22, r8 + 31c2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 31c6: 9b 01 movw r18, r22 + 31c8: ac 01 movw r20, r24 + 31ca: c7 01 movw r24, r14 + 31cc: b6 01 movw r22, r12 + 31ce: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 31d2: 4b 01 movw r8, r22 + 31d4: 5c 01 movw r10, r24 + 31d6: 2d 81 ldd r18, Y+5 ; 0x05 + 31d8: 3e 81 ldd r19, Y+6 ; 0x06 + 31da: 4f 81 ldd r20, Y+7 ; 0x07 + 31dc: 58 85 ldd r21, Y+8 ; 0x08 + 31de: 69 81 ldd r22, Y+1 ; 0x01 + 31e0: 7a 81 ldd r23, Y+2 ; 0x02 + 31e2: 8b 81 ldd r24, Y+3 ; 0x03 + 31e4: 9c 81 ldd r25, Y+4 ; 0x04 + 31e6: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 31ea: 9b 01 movw r18, r22 + 31ec: ac 01 movw r20, r24 + 31ee: c5 01 movw r24, r10 + 31f0: b4 01 movw r22, r8 + 31f2: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 31f6: 4b 01 movw r8, r22 + 31f8: 5c 01 movw r10, r24 + 31fa: 2d 85 ldd r18, Y+13 ; 0x0d + 31fc: 3e 85 ldd r19, Y+14 ; 0x0e + 31fe: 4f 85 ldd r20, Y+15 ; 0x0f + 3200: 58 89 ldd r21, Y+16 ; 0x10 + 3202: 69 85 ldd r22, Y+9 ; 0x09 + 3204: 7a 85 ldd r23, Y+10 ; 0x0a + 3206: 8b 85 ldd r24, Y+11 ; 0x0b + 3208: 9c 85 ldd r25, Y+12 ; 0x0c + 320a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 320e: 9b 01 movw r18, r22 + 3210: ac 01 movw r20, r24 + 3212: c5 01 movw r24, r10 + 3214: b4 01 movw r22, r8 + 3216: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 321a: 2b 01 movw r4, r22 + 321c: 3c 01 movw r6, r24 + 321e: 2d 89 ldd r18, Y+21 ; 0x15 + 3220: 3e 89 ldd r19, Y+22 ; 0x16 + 3222: 4f 89 ldd r20, Y+23 ; 0x17 + 3224: 58 8d ldd r21, Y+24 ; 0x18 + 3226: 69 89 ldd r22, Y+17 ; 0x11 + 3228: 7a 89 ldd r23, Y+18 ; 0x12 + 322a: 8b 89 ldd r24, Y+19 ; 0x13 + 322c: 9c 89 ldd r25, Y+20 ; 0x14 + 322e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3232: 4b 01 movw r8, r22 + 3234: 5c 01 movw r10, r24 + 3236: 29 8d ldd r18, Y+25 ; 0x19 + 3238: 3a 8d ldd r19, Y+26 ; 0x1a + 323a: 4b 8d ldd r20, Y+27 ; 0x1b + 323c: 5c 8d ldd r21, Y+28 ; 0x1c + 323e: 69 a1 ldd r22, Y+33 ; 0x21 + 3240: 7a a1 ldd r23, Y+34 ; 0x22 + 3242: 8b a1 ldd r24, Y+35 ; 0x23 + 3244: 9c a1 ldd r25, Y+36 ; 0x24 + 3246: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 324a: 9b 01 movw r18, r22 + 324c: ac 01 movw r20, r24 + 324e: c5 01 movw r24, r10 + 3250: b4 01 movw r22, r8 + 3252: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3256: 9b 01 movw r18, r22 + 3258: ac 01 movw r20, r24 + 325a: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 325e: a3 01 movw r20, r6 + 3260: 92 01 movw r18, r4 + 3262: 0e 94 5e 32 call 0x64bc ; 0x64bc + 3266: 0f 2e mov r0, r31 + 3268: f6 e7 ldi r31, 0x76 ; 118 + 326a: 2f 2e mov r2, r31 + 326c: f9 e2 ldi r31, 0x29 ; 41 + 326e: 3f 2e mov r3, r31 + 3270: f0 2d mov r31, r0 + 3272: f1 01 movw r30, r2 + 3274: 60 83 st Z, r22 + 3276: 71 83 std Z+1, r23 ; 0x01 + 3278: 82 83 std Z+2, r24 ; 0x02 + 327a: 93 83 std Z+3, r25 ; 0x03 + 327c: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 + 3280: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 + 3284: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 + 3288: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 + 328c: 20 91 9c 24 lds r18, 0x249C ; 0x80249c + 3290: 30 91 9d 24 lds r19, 0x249D ; 0x80249d + 3294: 40 91 9e 24 lds r20, 0x249E ; 0x80249e + 3298: 50 91 9f 24 lds r21, 0x249F ; 0x80249f + 329c: 80 90 00 20 lds r8, 0x2000 ; 0x802000 <__data_start> + 32a0: 90 90 01 20 lds r9, 0x2001 ; 0x802001 <__data_start+0x1> + 32a4: a0 90 02 20 lds r10, 0x2002 ; 0x802002 <__data_start+0x2> + 32a8: b0 90 03 20 lds r11, 0x2003 ; 0x802003 <__data_start+0x3> + 32ac: 40 90 a0 24 lds r4, 0x24A0 ; 0x8024a0 + 32b0: 50 90 a1 24 lds r5, 0x24A1 ; 0x8024a1 + 32b4: 60 90 a2 24 lds r6, 0x24A2 ; 0x8024a2 + 32b8: 70 90 a3 24 lds r7, 0x24A3 ; 0x8024a3 + 32bc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 32c0: 6b 01 movw r12, r22 + 32c2: 7c 01 movw r14, r24 + 32c4: a3 01 movw r20, r6 + 32c6: 92 01 movw r18, r4 + 32c8: c5 01 movw r24, r10 + 32ca: b4 01 movw r22, r8 + 32cc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 32d0: 9b 01 movw r18, r22 + 32d2: ac 01 movw r20, r24 + 32d4: c7 01 movw r24, r14 + 32d6: b6 01 movw r22, r12 + 32d8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 32dc: 9b 01 movw r18, r22 + 32de: ac 01 movw r20, r24 + 32e0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 32e4: 0e 94 38 32 call 0x6470 ; 0x6470 + 32e8: dc 01 movw r26, r24 + 32ea: cb 01 movw r24, r22 + 32ec: b0 58 subi r27, 0x80 ; 128 + 32ee: 80 93 7a 29 sts 0x297A, r24 ; 0x80297a + 32f2: 90 93 7b 29 sts 0x297B, r25 ; 0x80297b + 32f6: a0 93 7c 29 sts 0x297C, r26 ; 0x80297c + 32fa: b0 93 7d 29 sts 0x297D, r27 ; 0x80297d + 32fe: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 3302: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 3306: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 330a: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 330e: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start> + 3312: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1> + 3316: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2> + 331a: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3> + 331e: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 + 3322: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 + 3326: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 + 332a: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 + 332e: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 + 3332: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 + 3336: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 + 333a: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 + 333e: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 3342: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 3346: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 334a: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 334e: e9 82 std Y+1, r14 ; 0x01 + 3350: fa 82 std Y+2, r15 ; 0x02 + 3352: 0b 83 std Y+3, r16 ; 0x03 + 3354: 1c 83 std Y+4, r17 ; 0x04 + 3356: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 335a: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 335e: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 3362: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 3366: ed 82 std Y+5, r14 ; 0x05 + 3368: fe 82 std Y+6, r15 ; 0x06 + 336a: 0f 83 std Y+7, r16 ; 0x07 + 336c: 18 87 std Y+8, r17 ; 0x08 + 336e: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 3372: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 3376: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 337a: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 337e: e9 86 std Y+9, r14 ; 0x09 + 3380: fa 86 std Y+10, r15 ; 0x0a + 3382: 0b 87 std Y+11, r16 ; 0x0b + 3384: 1c 87 std Y+12, r17 ; 0x0c + 3386: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 338a: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 338e: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 3392: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 3396: ed 86 std Y+13, r14 ; 0x0d + 3398: fe 86 std Y+14, r15 ; 0x0e + 339a: 0f 87 std Y+15, r16 ; 0x0f + 339c: 18 8b std Y+16, r17 ; 0x10 + 339e: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start> + 33a2: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1> + 33a6: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2> + 33aa: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3> + 33ae: e9 8a std Y+17, r14 ; 0x11 + 33b0: fa 8a std Y+18, r15 ; 0x12 + 33b2: 0b 8b std Y+19, r16 ; 0x13 + 33b4: 1c 8b std Y+20, r17 ; 0x14 + 33b6: e0 90 a4 24 lds r14, 0x24A4 ; 0x8024a4 + 33ba: f0 90 a5 24 lds r15, 0x24A5 ; 0x8024a5 + 33be: 00 91 a6 24 lds r16, 0x24A6 ; 0x8024a6 + 33c2: 10 91 a7 24 lds r17, 0x24A7 ; 0x8024a7 + 33c6: ed 8a std Y+21, r14 ; 0x15 + 33c8: fe 8a std Y+22, r15 ; 0x16 + 33ca: 0f 8b std Y+23, r16 ; 0x17 + 33cc: 18 8f std Y+24, r17 ; 0x18 + 33ce: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 33d2: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 33d6: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 33da: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 33de: e9 a2 std Y+33, r14 ; 0x21 + 33e0: fa a2 std Y+34, r15 ; 0x22 + 33e2: 0b a3 std Y+35, r16 ; 0x23 + 33e4: 1c a3 std Y+36, r17 ; 0x24 + 33e6: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 33ea: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 33ee: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 33f2: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 33f6: e9 8e std Y+25, r14 ; 0x19 + 33f8: fa 8e std Y+26, r15 ; 0x1a + 33fa: 0b 8f std Y+27, r16 ; 0x1b + 33fc: 1c 8f std Y+28, r17 ; 0x1c + 33fe: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3402: 6b 01 movw r12, r22 + 3404: 7c 01 movw r14, r24 + 3406: a3 01 movw r20, r6 + 3408: 92 01 movw r18, r4 + 340a: c5 01 movw r24, r10 + 340c: b4 01 movw r22, r8 + 340e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3412: 9b 01 movw r18, r22 + 3414: ac 01 movw r20, r24 + 3416: c7 01 movw r24, r14 + 3418: b6 01 movw r22, r12 + 341a: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 341e: 4b 01 movw r8, r22 + 3420: 5c 01 movw r10, r24 + 3422: 2d 81 ldd r18, Y+5 ; 0x05 + 3424: 3e 81 ldd r19, Y+6 ; 0x06 + 3426: 4f 81 ldd r20, Y+7 ; 0x07 + 3428: 58 85 ldd r21, Y+8 ; 0x08 + 342a: 69 81 ldd r22, Y+1 ; 0x01 + 342c: 7a 81 ldd r23, Y+2 ; 0x02 + 342e: 8b 81 ldd r24, Y+3 ; 0x03 + 3430: 9c 81 ldd r25, Y+4 ; 0x04 + 3432: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3436: 9b 01 movw r18, r22 + 3438: ac 01 movw r20, r24 + 343a: c5 01 movw r24, r10 + 343c: b4 01 movw r22, r8 + 343e: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 3442: 4b 01 movw r8, r22 + 3444: 5c 01 movw r10, r24 + 3446: 2d 85 ldd r18, Y+13 ; 0x0d + 3448: 3e 85 ldd r19, Y+14 ; 0x0e + 344a: 4f 85 ldd r20, Y+15 ; 0x0f + 344c: 58 89 ldd r21, Y+16 ; 0x10 + 344e: 69 85 ldd r22, Y+9 ; 0x09 + 3450: 7a 85 ldd r23, Y+10 ; 0x0a + 3452: 8b 85 ldd r24, Y+11 ; 0x0b + 3454: 9c 85 ldd r25, Y+12 ; 0x0c + 3456: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 345a: 9b 01 movw r18, r22 + 345c: ac 01 movw r20, r24 + 345e: c5 01 movw r24, r10 + 3460: b4 01 movw r22, r8 + 3462: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3466: 2b 01 movw r4, r22 + 3468: 3c 01 movw r6, r24 + 346a: 2d 89 ldd r18, Y+21 ; 0x15 + 346c: 3e 89 ldd r19, Y+22 ; 0x16 + 346e: 4f 89 ldd r20, Y+23 ; 0x17 + 3470: 58 8d ldd r21, Y+24 ; 0x18 + 3472: 69 89 ldd r22, Y+17 ; 0x11 + 3474: 7a 89 ldd r23, Y+18 ; 0x12 + 3476: 8b 89 ldd r24, Y+19 ; 0x13 + 3478: 9c 89 ldd r25, Y+20 ; 0x14 + 347a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 347e: 4b 01 movw r8, r22 + 3480: 5c 01 movw r10, r24 + 3482: 29 8d ldd r18, Y+25 ; 0x19 + 3484: 3a 8d ldd r19, Y+26 ; 0x1a + 3486: 4b 8d ldd r20, Y+27 ; 0x1b + 3488: 5c 8d ldd r21, Y+28 ; 0x1c + 348a: 69 a1 ldd r22, Y+33 ; 0x21 + 348c: 7a a1 ldd r23, Y+34 ; 0x22 + 348e: 8b a1 ldd r24, Y+35 ; 0x23 + 3490: 9c a1 ldd r25, Y+36 ; 0x24 + 3492: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3496: 9b 01 movw r18, r22 + 3498: ac 01 movw r20, r24 + 349a: c5 01 movw r24, r10 + 349c: b4 01 movw r22, r8 + 349e: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 34a2: 9b 01 movw r18, r22 + 34a4: ac 01 movw r20, r24 + 34a6: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 34aa: a3 01 movw r20, r6 + 34ac: 92 01 movw r18, r4 + 34ae: 0e 94 5e 32 call 0x64bc ; 0x64bc + 34b2: 60 93 7e 29 sts 0x297E, r22 ; 0x80297e + 34b6: 70 93 7f 29 sts 0x297F, r23 ; 0x80297f + 34ba: 80 93 80 29 sts 0x2980, r24 ; 0x802980 + 34be: 90 93 81 29 sts 0x2981, r25 ; 0x802981 + 34c2: 60 91 7a 29 lds r22, 0x297A ; 0x80297a + 34c6: 70 91 7b 29 lds r23, 0x297B ; 0x80297b + 34ca: 80 91 7c 29 lds r24, 0x297C ; 0x80297c + 34ce: 90 91 7d 29 lds r25, 0x297D ; 0x80297d + 34d2: 2d ee ldi r18, 0xED ; 237 + 34d4: 3e e2 ldi r19, 0x2E ; 46 + 34d6: 45 e6 ldi r20, 0x65 ; 101 + 34d8: 52 e4 ldi r21, 0x42 ; 66 + 34da: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 34de: 60 93 7a 29 sts 0x297A, r22 ; 0x80297a + 34e2: 70 93 7b 29 sts 0x297B, r23 ; 0x80297b + 34e6: 80 93 7c 29 sts 0x297C, r24 ; 0x80297c + 34ea: 90 93 7d 29 sts 0x297D, r25 ; 0x80297d + 34ee: f1 01 movw r30, r2 + 34f0: 60 81 ld r22, Z + 34f2: 71 81 ldd r23, Z+1 ; 0x01 + 34f4: 82 81 ldd r24, Z+2 ; 0x02 + 34f6: 93 81 ldd r25, Z+3 ; 0x03 + 34f8: 2d ee ldi r18, 0xED ; 237 + 34fa: 3e e2 ldi r19, 0x2E ; 46 + 34fc: 45 e6 ldi r20, 0x65 ; 101 + 34fe: 52 e4 ldi r21, 0x42 ; 66 + 3500: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3504: f1 01 movw r30, r2 + 3506: 60 83 st Z, r22 + 3508: 71 83 std Z+1, r23 ; 0x01 + 350a: 82 83 std Z+2, r24 ; 0x02 + 350c: 93 83 std Z+3, r25 ; 0x03 + 350e: 60 91 7e 29 lds r22, 0x297E ; 0x80297e + 3512: 70 91 7f 29 lds r23, 0x297F ; 0x80297f + 3516: 80 91 80 29 lds r24, 0x2980 ; 0x802980 + 351a: 90 91 81 29 lds r25, 0x2981 ; 0x802981 + 351e: 2d ee ldi r18, 0xED ; 237 + 3520: 3e e2 ldi r19, 0x2E ; 46 + 3522: 45 e6 ldi r20, 0x65 ; 101 + 3524: 52 e4 ldi r21, 0x42 ; 66 + 3526: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 352a: 60 93 7e 29 sts 0x297E, r22 ; 0x80297e + 352e: 70 93 7f 29 sts 0x297F, r23 ; 0x80297f + 3532: 80 93 80 29 sts 0x2980, r24 ; 0x802980 + 3536: 90 93 81 29 sts 0x2981, r25 ; 0x802981 + 353a: f1 01 movw r30, r2 + 353c: 40 81 ld r20, Z + 353e: 51 81 ldd r21, Z+1 ; 0x01 + 3540: 62 81 ldd r22, Z+2 ; 0x02 + 3542: 73 81 ldd r23, Z+3 ; 0x03 + 3544: 8d eb ldi r24, 0xBD ; 189 + 3546: 93 e2 ldi r25, 0x23 ; 35 + 3548: 0e 94 a3 2d call 0x5b46 ; 0x5b46 + 354c: 40 91 7a 29 lds r20, 0x297A ; 0x80297a + 3550: 50 91 7b 29 lds r21, 0x297B ; 0x80297b + 3554: 60 91 7c 29 lds r22, 0x297C ; 0x80297c + 3558: 70 91 7d 29 lds r23, 0x297D ; 0x80297d + 355c: 80 e9 ldi r24, 0x90 ; 144 + 355e: 93 e2 ldi r25, 0x23 ; 35 + 3560: 0e 94 a3 2d call 0x5b46 ; 0x5b46 + 3564: 40 91 7e 29 lds r20, 0x297E ; 0x80297e + 3568: 50 91 7f 29 lds r21, 0x297F ; 0x80297f + 356c: 60 91 80 29 lds r22, 0x2980 ; 0x802980 + 3570: 70 91 81 29 lds r23, 0x2981 ; 0x802981 + 3574: 83 e6 ldi r24, 0x63 ; 99 + 3576: 93 e2 ldi r25, 0x23 ; 35 + 3578: 0e 94 a3 2d call 0x5b46 ; 0x5b46 + 357c: cd bf out 0x3d, r28 ; 61 + 357e: de bf out 0x3e, r29 ; 62 + 3580: a4 96 adiw r28, 0x24 ; 36 + 3582: cd bf out 0x3d, r28 ; 61 + 3584: de bf out 0x3e, r29 ; 62 + 3586: df 91 pop r29 + 3588: cf 91 pop r28 + 358a: 1f 91 pop r17 + 358c: 0f 91 pop r16 + 358e: ff 90 pop r15 + 3590: ef 90 pop r14 + 3592: df 90 pop r13 + 3594: cf 90 pop r12 + 3596: bf 90 pop r11 + 3598: af 90 pop r10 + 359a: 9f 90 pop r9 + 359c: 8f 90 pop r8 + 359e: 7f 90 pop r7 + 35a0: 6f 90 pop r6 + 35a2: 5f 90 pop r5 + 35a4: 4f 90 pop r4 + 35a6: 3f 90 pop r3 + 35a8: 2f 90 pop r2 + 35aa: 08 95 ret + +000035ac : + 35ac: cf 92 push r12 + 35ae: df 92 push r13 + 35b0: ef 92 push r14 + 35b2: ff 92 push r15 + 35b4: 0f 93 push r16 + 35b6: 1f 93 push r17 + 35b8: cf 93 push r28 + 35ba: df 93 push r29 + 35bc: 29 e4 ldi r18, 0x49 ; 73 + 35be: 34 e2 ldi r19, 0x24 ; 36 + 35c0: 4f e0 ldi r20, 0x0F ; 15 + 35c2: 6a e3 ldi r22, 0x3A ; 58 + 35c4: 89 e6 ldi r24, 0x69 ; 105 + 35c6: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + 35ca: 80 91 49 24 lds r24, 0x2449 ; 0x802449 + 35ce: 80 ff sbrs r24, 0 + 35d0: 32 c1 rjmp .+612 ; 0x3836 + 35d2: e9 e4 ldi r30, 0x49 ; 73 + 35d4: f4 e2 ldi r31, 0x24 ; 36 + 35d6: 81 81 ldd r24, Z+1 ; 0x01 + 35d8: 90 e0 ldi r25, 0x00 ; 0 + 35da: 98 2f mov r25, r24 + 35dc: 88 27 eor r24, r24 + 35de: 22 81 ldd r18, Z+2 ; 0x02 + 35e0: 82 2b or r24, r18 + 35e2: 0e e8 ldi r16, 0x8E ; 142 + 35e4: 19 e2 ldi r17, 0x29 ; 41 + 35e6: d8 01 movw r26, r16 + 35e8: 8d 93 st X+, r24 + 35ea: 9c 93 st X, r25 + 35ec: 11 97 sbiw r26, 0x01 ; 1 + 35ee: 83 81 ldd r24, Z+3 ; 0x03 + 35f0: 90 e0 ldi r25, 0x00 ; 0 + 35f2: 98 2f mov r25, r24 + 35f4: 88 27 eor r24, r24 + 35f6: 24 81 ldd r18, Z+4 ; 0x04 + 35f8: 82 2b or r24, r18 + 35fa: 12 96 adiw r26, 0x02 ; 2 + 35fc: 8d 93 st X+, r24 + 35fe: 9c 93 st X, r25 + 3600: 13 97 sbiw r26, 0x03 ; 3 + 3602: 85 81 ldd r24, Z+5 ; 0x05 + 3604: 90 e0 ldi r25, 0x00 ; 0 + 3606: 98 2f mov r25, r24 + 3608: 88 27 eor r24, r24 + 360a: 26 81 ldd r18, Z+6 ; 0x06 + 360c: 82 2b or r24, r18 + 360e: 14 96 adiw r26, 0x04 ; 4 + 3610: 8d 93 st X+, r24 + 3612: 9c 93 st X, r25 + 3614: 15 97 sbiw r26, 0x05 ; 5 + 3616: 81 85 ldd r24, Z+9 ; 0x09 + 3618: 90 e0 ldi r25, 0x00 ; 0 + 361a: 98 2f mov r25, r24 + 361c: 88 27 eor r24, r24 + 361e: 22 85 ldd r18, Z+10 ; 0x0a + 3620: 82 2b or r24, r18 + 3622: 16 96 adiw r26, 0x06 ; 6 + 3624: 8d 93 st X+, r24 + 3626: 9c 93 st X, r25 + 3628: 17 97 sbiw r26, 0x07 ; 7 + 362a: 83 85 ldd r24, Z+11 ; 0x0b + 362c: 90 e0 ldi r25, 0x00 ; 0 + 362e: 98 2f mov r25, r24 + 3630: 88 27 eor r24, r24 + 3632: 24 85 ldd r18, Z+12 ; 0x0c + 3634: 82 2b or r24, r18 + 3636: 18 96 adiw r26, 0x08 ; 8 + 3638: 8d 93 st X+, r24 + 363a: 9c 93 st X, r25 + 363c: 19 97 sbiw r26, 0x09 ; 9 + 363e: 85 85 ldd r24, Z+13 ; 0x0d + 3640: 90 e0 ldi r25, 0x00 ; 0 + 3642: 98 2f mov r25, r24 + 3644: 88 27 eor r24, r24 + 3646: 26 85 ldd r18, Z+14 ; 0x0e + 3648: 82 2b or r24, r18 + 364a: 1a 96 adiw r26, 0x0a ; 10 + 364c: 8d 93 st X+, r24 + 364e: 9c 93 st X, r25 + 3650: 1b 97 sbiw r26, 0x0b ; 11 + 3652: 6d 91 ld r22, X+ + 3654: 7c 91 ld r23, X + 3656: c0 90 8a 29 lds r12, 0x298A ; 0x80298a + 365a: d0 90 8b 29 lds r13, 0x298B ; 0x80298b + 365e: e0 90 8c 29 lds r14, 0x298C ; 0x80298c + 3662: f0 90 8d 29 lds r15, 0x298D ; 0x80298d + 3666: 07 2e mov r0, r23 + 3668: 00 0c add r0, r0 + 366a: 88 0b sbc r24, r24 + 366c: 99 0b sbc r25, r25 + 366e: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 3672: a7 01 movw r20, r14 + 3674: 96 01 movw r18, r12 + 3676: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 367a: c2 e5 ldi r28, 0x52 ; 82 + 367c: d9 e2 ldi r29, 0x29 ; 41 + 367e: 68 83 st Y, r22 + 3680: 79 83 std Y+1, r23 ; 0x01 + 3682: 8a 83 std Y+2, r24 ; 0x02 + 3684: 9b 83 std Y+3, r25 ; 0x03 + 3686: f8 01 movw r30, r16 + 3688: 62 81 ldd r22, Z+2 ; 0x02 + 368a: 73 81 ldd r23, Z+3 ; 0x03 + 368c: c0 90 8a 29 lds r12, 0x298A ; 0x80298a + 3690: d0 90 8b 29 lds r13, 0x298B ; 0x80298b + 3694: e0 90 8c 29 lds r14, 0x298C ; 0x80298c + 3698: f0 90 8d 29 lds r15, 0x298D ; 0x80298d + 369c: 07 2e mov r0, r23 + 369e: 00 0c add r0, r0 + 36a0: 88 0b sbc r24, r24 + 36a2: 99 0b sbc r25, r25 + 36a4: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 36a8: a7 01 movw r20, r14 + 36aa: 96 01 movw r18, r12 + 36ac: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 36b0: 6c 83 std Y+4, r22 ; 0x04 + 36b2: 7d 83 std Y+5, r23 ; 0x05 + 36b4: 8e 83 std Y+6, r24 ; 0x06 + 36b6: 9f 83 std Y+7, r25 ; 0x07 + 36b8: d8 01 movw r26, r16 + 36ba: 14 96 adiw r26, 0x04 ; 4 + 36bc: 6d 91 ld r22, X+ + 36be: 7c 91 ld r23, X + 36c0: 15 97 sbiw r26, 0x05 ; 5 + 36c2: c0 90 8a 29 lds r12, 0x298A ; 0x80298a + 36c6: d0 90 8b 29 lds r13, 0x298B ; 0x80298b + 36ca: e0 90 8c 29 lds r14, 0x298C ; 0x80298c + 36ce: f0 90 8d 29 lds r15, 0x298D ; 0x80298d + 36d2: 07 2e mov r0, r23 + 36d4: 00 0c add r0, r0 + 36d6: 88 0b sbc r24, r24 + 36d8: 99 0b sbc r25, r25 + 36da: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 36de: a7 01 movw r20, r14 + 36e0: 96 01 movw r18, r12 + 36e2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 36e6: 68 87 std Y+8, r22 ; 0x08 + 36e8: 79 87 std Y+9, r23 ; 0x09 + 36ea: 8a 87 std Y+10, r24 ; 0x0a + 36ec: 9b 87 std Y+11, r25 ; 0x0b + 36ee: f8 01 movw r30, r16 + 36f0: 66 81 ldd r22, Z+6 ; 0x06 + 36f2: 77 81 ldd r23, Z+7 ; 0x07 + 36f4: c0 90 86 29 lds r12, 0x2986 ; 0x802986 + 36f8: d0 90 87 29 lds r13, 0x2987 ; 0x802987 + 36fc: e0 90 88 29 lds r14, 0x2988 ; 0x802988 + 3700: f0 90 89 29 lds r15, 0x2989 ; 0x802989 + 3704: 07 2e mov r0, r23 + 3706: 00 0c add r0, r0 + 3708: 88 0b sbc r24, r24 + 370a: 99 0b sbc r25, r25 + 370c: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 3710: a7 01 movw r20, r14 + 3712: 96 01 movw r18, r12 + 3714: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3718: 6c 87 std Y+12, r22 ; 0x0c + 371a: 7d 87 std Y+13, r23 ; 0x0d + 371c: 8e 87 std Y+14, r24 ; 0x0e + 371e: 9f 87 std Y+15, r25 ; 0x0f + 3720: d8 01 movw r26, r16 + 3722: 18 96 adiw r26, 0x08 ; 8 + 3724: 6d 91 ld r22, X+ + 3726: 7c 91 ld r23, X + 3728: 19 97 sbiw r26, 0x09 ; 9 + 372a: c0 90 86 29 lds r12, 0x2986 ; 0x802986 + 372e: d0 90 87 29 lds r13, 0x2987 ; 0x802987 + 3732: e0 90 88 29 lds r14, 0x2988 ; 0x802988 + 3736: f0 90 89 29 lds r15, 0x2989 ; 0x802989 + 373a: 07 2e mov r0, r23 + 373c: 00 0c add r0, r0 + 373e: 88 0b sbc r24, r24 + 3740: 99 0b sbc r25, r25 + 3742: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 3746: a7 01 movw r20, r14 + 3748: 96 01 movw r18, r12 + 374a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 374e: 68 8b std Y+16, r22 ; 0x10 + 3750: 79 8b std Y+17, r23 ; 0x11 + 3752: 8a 8b std Y+18, r24 ; 0x12 + 3754: 9b 8b std Y+19, r25 ; 0x13 + 3756: f8 01 movw r30, r16 + 3758: 62 85 ldd r22, Z+10 ; 0x0a + 375a: 73 85 ldd r23, Z+11 ; 0x0b + 375c: c0 90 86 29 lds r12, 0x2986 ; 0x802986 + 3760: d0 90 87 29 lds r13, 0x2987 ; 0x802987 + 3764: e0 90 88 29 lds r14, 0x2988 ; 0x802988 + 3768: f0 90 89 29 lds r15, 0x2989 ; 0x802989 + 376c: 07 2e mov r0, r23 + 376e: 00 0c add r0, r0 + 3770: 88 0b sbc r24, r24 + 3772: 99 0b sbc r25, r25 + 3774: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 3778: a7 01 movw r20, r14 + 377a: 96 01 movw r18, r12 + 377c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3780: 6c 8b std Y+20, r22 ; 0x14 + 3782: 7d 8b std Y+21, r23 ; 0x15 + 3784: 8e 8b std Y+22, r24 ; 0x16 + 3786: 9f 8b std Y+23, r25 ; 0x17 + 3788: 18 8e std Y+24, r1 ; 0x18 + 378a: 19 8e std Y+25, r1 ; 0x19 + 378c: 1a 8e std Y+26, r1 ; 0x1a + 378e: 1b 8e std Y+27, r1 ; 0x1b + 3790: 1c 8e std Y+28, r1 ; 0x1c + 3792: 1d 8e std Y+29, r1 ; 0x1d + 3794: 1e 8e std Y+30, r1 ; 0x1e + 3796: 1f 8e std Y+31, r1 ; 0x1f + 3798: 18 a2 std Y+32, r1 ; 0x20 + 379a: 19 a2 std Y+33, r1 ; 0x21 + 379c: 1a a2 std Y+34, r1 ; 0x22 + 379e: 1b a2 std Y+35, r1 ; 0x23 + 37a0: 08 85 ldd r16, Y+8 ; 0x08 + 37a2: 19 85 ldd r17, Y+9 ; 0x09 + 37a4: 2a 85 ldd r18, Y+10 ; 0x0a + 37a6: 3b 85 ldd r19, Y+11 ; 0x0b + 37a8: 4c 81 ldd r20, Y+4 ; 0x04 + 37aa: 5d 81 ldd r21, Y+5 ; 0x05 + 37ac: 6e 81 ldd r22, Y+6 ; 0x06 + 37ae: 7f 81 ldd r23, Y+7 ; 0x07 + 37b0: 88 81 ld r24, Y + 37b2: 99 81 ldd r25, Y+1 ; 0x01 + 37b4: aa 81 ldd r26, Y+2 ; 0x02 + 37b6: bb 81 ldd r27, Y+3 ; 0x03 + 37b8: 3f 93 push r19 + 37ba: 2f 93 push r18 + 37bc: 1f 93 push r17 + 37be: 0f 93 push r16 + 37c0: 7f 93 push r23 + 37c2: 6f 93 push r22 + 37c4: 5f 93 push r21 + 37c6: 4f 93 push r20 + 37c8: bf 93 push r27 + 37ca: af 93 push r26 + 37cc: 9f 93 push r25 + 37ce: 8f 93 push r24 + 37d0: 8a eb ldi r24, 0xBA ; 186 + 37d2: 90 e2 ldi r25, 0x20 ; 32 + 37d4: 9f 93 push r25 + 37d6: 8f 93 push r24 + 37d8: 88 e0 ldi r24, 0x08 ; 8 + 37da: 8f 93 push r24 + 37dc: 80 ea ldi r24, 0xA0 ; 160 + 37de: 8f 93 push r24 + 37e0: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 37e4: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 37e8: 19 95 eicall + 37ea: 48 81 ld r20, Y + 37ec: 59 81 ldd r21, Y+1 ; 0x01 + 37ee: 6a 81 ldd r22, Y+2 ; 0x02 + 37f0: 7b 81 ldd r23, Y+3 ; 0x03 + 37f2: 84 e4 ldi r24, 0x44 ; 68 + 37f4: 94 e2 ldi r25, 0x24 ; 36 + 37f6: 0e 94 ce 2c call 0x599c ; 0x599c + 37fa: 4c 81 ldd r20, Y+4 ; 0x04 + 37fc: 5d 81 ldd r21, Y+5 ; 0x05 + 37fe: 6e 81 ldd r22, Y+6 ; 0x06 + 3800: 7f 81 ldd r23, Y+7 ; 0x07 + 3802: 87 e1 ldi r24, 0x17 ; 23 + 3804: 94 e2 ldi r25, 0x24 ; 36 + 3806: 0e 94 ce 2c call 0x599c ; 0x599c + 380a: 48 85 ldd r20, Y+8 ; 0x08 + 380c: 59 85 ldd r21, Y+9 ; 0x09 + 380e: 6a 85 ldd r22, Y+10 ; 0x0a + 3810: 7b 85 ldd r23, Y+11 ; 0x0b + 3812: 8a ee ldi r24, 0xEA ; 234 + 3814: 93 e2 ldi r25, 0x23 ; 35 + 3816: 0e 94 ce 2c call 0x599c ; 0x599c + 381a: ce 01 movw r24, r28 + 381c: f5 db rcall .-2070 ; 0x3008 + 381e: 29 e4 ldi r18, 0x49 ; 73 + 3820: 34 e2 ldi r19, 0x24 ; 36 + 3822: 41 e0 ldi r20, 0x01 ; 1 + 3824: 6a e3 ldi r22, 0x3A ; 58 + 3826: 89 e6 ldi r24, 0x69 ; 105 + 3828: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + 382c: 8d b7 in r24, 0x3d ; 61 + 382e: 9e b7 in r25, 0x3e ; 62 + 3830: 40 96 adiw r24, 0x10 ; 16 + 3832: 8d bf out 0x3d, r24 ; 61 + 3834: 9e bf out 0x3e, r25 ; 62 + 3836: df 91 pop r29 + 3838: cf 91 pop r28 + 383a: 1f 91 pop r17 + 383c: 0f 91 pop r16 + 383e: ff 90 pop r15 + 3840: ef 90 pop r14 + 3842: df 90 pop r13 + 3844: cf 90 pop r12 + 3846: 08 95 ret + +00003848 : + 3848: 29 e4 ldi r18, 0x49 ; 73 + 384a: 34 e2 ldi r19, 0x24 ; 36 + 384c: 41 e0 ldi r20, 0x01 ; 1 + 384e: 65 e7 ldi r22, 0x75 ; 117 + 3850: 89 e6 ldi r24, 0x69 ; 105 + 3852: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 + 3856: 80 91 49 24 lds r24, 0x2449 ; 0x802449 + 385a: 81 37 cpi r24, 0x71 ; 113 + 385c: 89 f4 brne .+34 ; 0x3880 + 385e: 80 ed ldi r24, 0xD0 ; 208 + 3860: 90 e2 ldi r25, 0x20 ; 32 + 3862: 9f 93 push r25 + 3864: 8f 93 push r24 + 3866: 88 e0 ldi r24, 0x08 ; 8 + 3868: 8f 93 push r24 + 386a: 80 ea ldi r24, 0xA0 ; 160 + 386c: 8f 93 push r24 + 386e: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 3872: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 3876: 19 95 eicall + 3878: 0f 90 pop r0 + 387a: 0f 90 pop r0 + 387c: 0f 90 pop r0 + 387e: 0f 90 pop r0 + 3880: 08 95 ret + +00003882 : + 3882: 81 30 cpi r24, 0x01 ; 1 + 3884: 99 f0 breq .+38 ; 0x38ac + 3886: 28 f0 brcs .+10 ; 0x3892 + 3888: 82 30 cpi r24, 0x02 ; 2 + 388a: e9 f0 breq .+58 ; 0x38c6 + 388c: 83 30 cpi r24, 0x03 ; 3 + 388e: 41 f1 breq .+80 ; 0x38e0 + 3890: 33 c0 rjmp .+102 ; 0x38f8 + 3892: 80 e0 ldi r24, 0x00 ; 0 + 3894: 90 e0 ldi r25, 0x00 ; 0 + 3896: a0 e8 ldi r26, 0x80 ; 128 + 3898: b8 e3 ldi r27, 0x38 ; 56 + 389a: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a + 389e: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b + 38a2: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c + 38a6: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d + 38aa: 26 c0 rjmp .+76 ; 0x38f8 + 38ac: 80 e0 ldi r24, 0x00 ; 0 + 38ae: 90 e0 ldi r25, 0x00 ; 0 + 38b0: a0 e0 ldi r26, 0x00 ; 0 + 38b2: b9 e3 ldi r27, 0x39 ; 57 + 38b4: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a + 38b8: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b + 38bc: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c + 38c0: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d + 38c4: 19 c0 rjmp .+50 ; 0x38f8 + 38c6: 80 e0 ldi r24, 0x00 ; 0 + 38c8: 90 e0 ldi r25, 0x00 ; 0 + 38ca: a0 e8 ldi r26, 0x80 ; 128 + 38cc: b9 e3 ldi r27, 0x39 ; 57 + 38ce: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a + 38d2: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b + 38d6: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c + 38da: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d + 38de: 0c c0 rjmp .+24 ; 0x38f8 + 38e0: 80 e0 ldi r24, 0x00 ; 0 + 38e2: 90 e0 ldi r25, 0x00 ; 0 + 38e4: a0 e0 ldi r26, 0x00 ; 0 + 38e6: ba e3 ldi r27, 0x3A ; 58 + 38e8: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a + 38ec: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b + 38f0: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c + 38f4: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d + 38f8: 48 e1 ldi r20, 0x18 ; 24 + 38fa: 6c e1 ldi r22, 0x1C ; 28 + 38fc: 89 e6 ldi r24, 0x69 ; 105 + 38fe: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 + 3902: 08 95 ret + +00003904 : + } +} + +void set_gyro_resolution(gyroScale scale) +{ + switch(scale) + 3904: 81 30 cpi r24, 0x01 ; 1 + 3906: 99 f0 breq .+38 ; 0x392e + 3908: 28 f0 brcs .+10 ; 0x3914 + 390a: 82 30 cpi r24, 0x02 ; 2 + 390c: e9 f0 breq .+58 ; 0x3948 + 390e: 83 30 cpi r24, 0x03 ; 3 + 3910: 41 f1 breq .+80 ; 0x3962 + 3912: 33 c0 rjmp .+102 ; 0x397a + { + case GYRO_250DPS: + gyro_resolution = (float)(250.0/32760.0); + 3914: 81 ea ldi r24, 0xA1 ; 161 + 3916: 9f e0 ldi r25, 0x0F ; 15 + 3918: aa ef ldi r26, 0xFA ; 250 + 391a: bb e3 ldi r27, 0x3B ; 59 + 391c: 80 93 86 29 sts 0x2986, r24 ; 0x802986 + 3920: 90 93 87 29 sts 0x2987, r25 ; 0x802987 + 3924: a0 93 88 29 sts 0x2988, r26 ; 0x802988 + 3928: b0 93 89 29 sts 0x2989, r27 ; 0x802989 + break; + 392c: 26 c0 rjmp .+76 ; 0x397a + case GYRO_500DPS: + gyro_resolution = (float)(500.0/32760.0); + 392e: 81 ea ldi r24, 0xA1 ; 161 + 3930: 9f e0 ldi r25, 0x0F ; 15 + 3932: aa e7 ldi r26, 0x7A ; 122 + 3934: bc e3 ldi r27, 0x3C ; 60 + 3936: 80 93 86 29 sts 0x2986, r24 ; 0x802986 + 393a: 90 93 87 29 sts 0x2987, r25 ; 0x802987 + 393e: a0 93 88 29 sts 0x2988, r26 ; 0x802988 + 3942: b0 93 89 29 sts 0x2989, r27 ; 0x802989 + break; + 3946: 19 c0 rjmp .+50 ; 0x397a + case GYRO_1000DPS: + gyro_resolution = (float)(1000.0/32760.0); + 3948: 81 ea ldi r24, 0xA1 ; 161 + 394a: 9f e0 ldi r25, 0x0F ; 15 + 394c: aa ef ldi r26, 0xFA ; 250 + 394e: bc e3 ldi r27, 0x3C ; 60 + 3950: 80 93 86 29 sts 0x2986, r24 ; 0x802986 + 3954: 90 93 87 29 sts 0x2987, r25 ; 0x802987 + 3958: a0 93 88 29 sts 0x2988, r26 ; 0x802988 + 395c: b0 93 89 29 sts 0x2989, r27 ; 0x802989 + break; + 3960: 0c c0 rjmp .+24 ; 0x397a + case GYRO_2000DPS: + gyro_resolution = (float)(2000.0/32768.0); + 3962: 80 e0 ldi r24, 0x00 ; 0 + 3964: 90 e0 ldi r25, 0x00 ; 0 + 3966: aa e7 ldi r26, 0x7A ; 122 + 3968: bd e3 ldi r27, 0x3D ; 61 + 396a: 80 93 86 29 sts 0x2986, r24 ; 0x802986 + 396e: 90 93 87 29 sts 0x2987, r25 ; 0x802987 + 3972: a0 93 88 29 sts 0x2988, r26 ; 0x802988 + 3976: b0 93 89 29 sts 0x2989, r27 ; 0x802989 + break; + default: + break; + } + twi_write(MPU_ADDR, GYRO_CONFIG, (MPU_GYRO_SCALE << 3)); + 397a: 48 e1 ldi r20, 0x18 ; 24 + 397c: 6b e1 ldi r22, 0x1B ; 27 + 397e: 89 e6 ldi r24, 0x69 ; 105 + 3980: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 + 3984: 08 95 ret + +00003986 : + + +void mpu_init(void) +{ + b_mag_calibrate = false; + init_circ_buffer_double(&cb_yaw, yaw_buff, 10); + 3986: 4a e0 ldi r20, 0x0A ; 10 + 3988: 65 e9 ldi r22, 0x95 ; 149 + 398a: 73 e2 ldi r23, 0x23 ; 35 + 398c: 8d eb ldi r24, 0xBD ; 189 + 398e: 93 e2 ldi r25, 0x23 ; 35 + 3990: 0e 94 72 2e call 0x5ce4 ; 0x5ce4 + init_circ_buffer_double(&cb_pitch, pitch_buff, 10); + 3994: 4a e0 ldi r20, 0x0A ; 10 + 3996: 68 e6 ldi r22, 0x68 ; 104 + 3998: 73 e2 ldi r23, 0x23 ; 35 + 399a: 80 e9 ldi r24, 0x90 ; 144 + 399c: 93 e2 ldi r25, 0x23 ; 35 + 399e: 0e 94 72 2e call 0x5ce4 ; 0x5ce4 + init_circ_buffer_double(&cb_roll, roll_buff, 10); + 39a2: 4a e0 ldi r20, 0x0A ; 10 + 39a4: 6b e3 ldi r22, 0x3B ; 59 + 39a6: 73 e2 ldi r23, 0x23 ; 35 + 39a8: 83 e6 ldi r24, 0x63 ; 99 + 39aa: 93 e2 ldi r25, 0x23 ; 35 + 39ac: 0e 94 72 2e call 0x5ce4 ; 0x5ce4 + + init_circ_buffer_float(&cb_accel_x, accel_buff_x, 10); + 39b0: 4a e0 ldi r20, 0x0A ; 10 + 39b2: 6c e1 ldi r22, 0x1C ; 28 + 39b4: 74 e2 ldi r23, 0x24 ; 36 + 39b6: 84 e4 ldi r24, 0x44 ; 68 + 39b8: 94 e2 ldi r25, 0x24 ; 36 + 39ba: 0e 94 9d 2d call 0x5b3a ; 0x5b3a + init_circ_buffer_float(&cb_accel_y, accel_buff_y, 10); + 39be: 4a e0 ldi r20, 0x0A ; 10 + 39c0: 6f ee ldi r22, 0xEF ; 239 + 39c2: 73 e2 ldi r23, 0x23 ; 35 + 39c4: 87 e1 ldi r24, 0x17 ; 23 + 39c6: 94 e2 ldi r25, 0x24 ; 36 + 39c8: 0e 94 9d 2d call 0x5b3a ; 0x5b3a + init_circ_buffer_float(&cb_accel_z, accel_buff_z, 10); + 39cc: 4a e0 ldi r20, 0x0A ; 10 + 39ce: 62 ec ldi r22, 0xC2 ; 194 + 39d0: 73 e2 ldi r23, 0x23 ; 35 + 39d2: 8a ee ldi r24, 0xEA ; 234 + 39d4: 93 e2 ldi r25, 0x23 ; 35 + 39d6: 0e 94 9d 2d call 0x5b3a ; 0x5b3a + + //reset imu + twi_write(MPU_ADDR, PWR_MGMT_1, 0x80); + 39da: 40 e8 ldi r20, 0x80 ; 128 + 39dc: 6b e6 ldi r22, 0x6B ; 107 + 39de: 89 e6 ldi r24, 0x69 ; 105 + 39e0: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + delay_ms(100); + 39e4: 66 e5 ldi r22, 0x56 ; 86 + 39e6: 73 e2 ldi r23, 0x23 ; 35 + 39e8: 88 e0 ldi r24, 0x08 ; 8 + 39ea: 90 e0 ldi r25, 0x00 ; 0 + 39ec: b3 da rcall .-2714 ; 0x2f54 <__portable_avr_delay_cycles> + twi_write(MPU_ADDR, PWR_MGMT_1, 0x01); + 39ee: 41 e0 ldi r20, 0x01 ; 1 + 39f0: 6b e6 ldi r22, 0x6B ; 107 + 39f2: 89 e6 ldi r24, 0x69 ; 105 + 39f4: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + twi_write(MPU_ADDR, PWR_MGMT_2, 0x00); + 39f8: 40 e0 ldi r20, 0x00 ; 0 + 39fa: 6c e6 ldi r22, 0x6C ; 108 + 39fc: 89 e6 ldi r24, 0x69 ; 105 + 39fe: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + + delay_ms(100); + 3a02: 66 e5 ldi r22, 0x56 ; 86 + 3a04: 73 e2 ldi r23, 0x23 ; 35 + 3a06: 88 e0 ldi r24, 0x08 ; 8 + 3a08: 90 e0 ldi r25, 0x00 ; 0 + 3a0a: a4 da rcall .-2744 ; 0x2f54 <__portable_avr_delay_cycles> + //clock source config + //enable gyro + accel + //gyro init + twi_write(MPU_ADDR, MPU_CONFIG, 0x02); //gyro low pass filter config + 3a0c: 42 e0 ldi r20, 0x02 ; 2 + 3a0e: 6a e1 ldi r22, 0x1A ; 26 + 3a10: 89 e6 ldi r24, 0x69 ; 105 + 3a12: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + set_gyro_resolution(GYRO_2000DPS); + 3a16: 83 e0 ldi r24, 0x03 ; 3 + //accel config + set_accel_resolution(ACCEL_16G); + 3a18: 75 df rcall .-278 ; 0x3904 + 3a1a: 83 e0 ldi r24, 0x03 ; 3 + 3a1c: 32 df rcall .-412 ; 0x3882 + twi_write(MPU_ADDR, ACCEL_CONFIG2, 0x02); //accel low pass filter config + 3a1e: 42 e0 ldi r20, 0x02 ; 2 + 3a20: 6d e1 ldi r22, 0x1D ; 29 + 3a22: 89 e6 ldi r24, 0x69 ; 105 + 3a24: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + //sample rate config + mpu_set_sample_rate(MPU_SAMPLE_RATE); + 3a28: 84 e6 ldi r24, 0x64 ; 100 + 3a2a: a5 da rcall .-2742 ; 0x2f76 + //mpu int config + twi_write(MPU_ADDR, INT_PIN_CFG, 0x22); + 3a2c: 42 e2 ldi r20, 0x22 ; 34 + 3a2e: 67 e3 ldi r22, 0x37 ; 55 + 3a30: 89 e6 ldi r24, 0x69 ; 105 + 3a32: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + twi_write(MPU_ADDR, INT_ENABLE, 0x01); + 3a36: 41 e0 ldi r20, 0x01 ; 1 + 3a38: 68 e3 ldi r22, 0x38 ; 56 + 3a3a: 89 e6 ldi r24, 0x69 ; 105 + 3a3c: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 + //not using mag + //mpu_mag_wai(); + //mag init + //mag_init(); + //int pin config on mcu + PORTA.PIN2CTRL = PORT_OPC_PULLDOWN_gc | PORT_ISC_RISING_gc; + 3a40: e0 e0 ldi r30, 0x00 ; 0 + 3a42: f6 e0 ldi r31, 0x06 ; 6 + 3a44: 81 e1 ldi r24, 0x11 ; 17 + 3a46: 82 8b std Z+18, r24 ; 0x12 + PORTA.INT0MASK = PIN2_bm; + 3a48: 84 e0 ldi r24, 0x04 ; 4 + 3a4a: 82 87 std Z+10, r24 ; 0x0a + PORTA.INTCTRL = PORT_INT0LVL_HI_gc; + 3a4c: 83 e0 ldi r24, 0x03 ; 3 + 3a4e: 81 87 std Z+9, r24 ; 0x09 + 3a50: 08 95 ret + +00003a52 <__vector_66>: + } + twi_write(MPU_ADDR, GYRO_CONFIG, (MPU_GYRO_SCALE << 3)); +} + +ISR(PORTA_INT0_vect) +{ + 3a52: 1f 92 push r1 + 3a54: 0f 92 push r0 + 3a56: 0f b6 in r0, 0x3f ; 63 + 3a58: 0f 92 push r0 + 3a5a: 11 24 eor r1, r1 + 3a5c: 08 b6 in r0, 0x38 ; 56 + 3a5e: 0f 92 push r0 + 3a60: 18 be out 0x38, r1 ; 56 + 3a62: 8f 93 push r24 + delay_ms(10); +} + +void set_mpu_data_status(_Bool status) +{ + b_mpu_data_ready = status; + 3a64: 81 e0 ldi r24, 0x01 ; 1 + 3a66: 80 93 89 24 sts 0x2489, r24 ; 0x802489 +} + +ISR(PORTA_INT0_vect) +{ + set_mpu_data_status(true); + 3a6a: 8f 91 pop r24 + 3a6c: 0f 90 pop r0 + 3a6e: 08 be out 0x38, r0 ; 56 + 3a70: 0f 90 pop r0 + 3a72: 0f be out 0x3f, r0 ; 63 + 3a74: 0f 90 pop r0 + 3a76: 1f 90 pop r1 + 3a78: 18 95 reti + +00003a7a : + +void get_ntcle_temp(void) +{ + ntcle100_data.temp += (get_oversampled_ntcle_temp(NTCLE100_OVERSAMPLE_AMOUNT) - temp_off); + ntcle100_data.samplect++; +} + 3a7a: e0 e0 ldi r30, 0x00 ; 0 + 3a7c: f2 e0 ldi r31, 0x02 ; 2 + 3a7e: 80 a1 ldd r24, Z+32 ; 0x20 + 3a80: 80 68 ori r24, 0x80 ; 128 + 3a82: 80 a3 std Z+32, r24 ; 0x20 + 3a84: 08 95 ret + +00003a86 : + 3a86: f9 df rcall .-14 ; 0x3a7a + 3a88: e0 e0 ldi r30, 0x00 ; 0 + 3a8a: f2 e0 ldi r31, 0x02 ; 2 + 3a8c: 83 a1 ldd r24, Z+35 ; 0x23 + 3a8e: 88 23 and r24, r24 + 3a90: e9 f3 breq .-6 ; 0x3a8c + 3a92: e0 e0 ldi r30, 0x00 ; 0 + 3a94: f2 e0 ldi r31, 0x02 ; 2 + 3a96: 84 a1 ldd r24, Z+36 ; 0x24 + 3a98: 95 a1 ldd r25, Z+37 ; 0x25 + 3a9a: 16 82 std Z+6, r1 ; 0x06 + 3a9c: 08 95 ret + +00003a9e : + 3a9e: 8f 92 push r8 + 3aa0: 9f 92 push r9 + 3aa2: af 92 push r10 + 3aa4: bf 92 push r11 + 3aa6: cf 92 push r12 + 3aa8: df 92 push r13 + 3aaa: ef 92 push r14 + 3aac: ff 92 push r15 + 3aae: cf 93 push r28 + 3ab0: c4 2f mov r28, r20 + 3ab2: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf> + 3ab6: 20 e0 ldi r18, 0x00 ; 0 + 3ab8: 30 e4 ldi r19, 0x40 ; 64 + 3aba: 4c e1 ldi r20, 0x1C ; 28 + 3abc: 56 e4 ldi r21, 0x46 ; 70 + 3abe: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 3ac2: 0e 94 61 34 call 0x68c2 ; 0x68c2 + 3ac6: 6b 01 movw r12, r22 + 3ac8: 7c 01 movw r14, r24 + 3aca: 9b 01 movw r18, r22 + 3acc: ac 01 movw r20, r24 + 3ace: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3ad2: 22 e8 ldi r18, 0x82 ; 130 + 3ad4: 35 ed ldi r19, 0xD5 ; 213 + 3ad6: 4f e2 ldi r20, 0x2F ; 47 + 3ad8: 56 e3 ldi r21, 0x36 ; 54 + 3ada: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3ade: 4b 01 movw r8, r22 + 3ae0: 5c 01 movw r10, r24 + 3ae2: 21 ef ldi r18, 0xF1 ; 241 + 3ae4: 3b eb ldi r19, 0xBB ; 187 + 3ae6: 46 e8 ldi r20, 0x86 ; 134 + 3ae8: 59 e3 ldi r21, 0x39 ; 57 + 3aea: c7 01 movw r24, r14 + 3aec: b6 01 movw r22, r12 + 3aee: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3af2: 2d e0 ldi r18, 0x0D ; 13 + 3af4: 3f ec ldi r19, 0xCF ; 207 + 3af6: 4b e5 ldi r20, 0x5B ; 91 + 3af8: 5b e3 ldi r21, 0x3B ; 59 + 3afa: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3afe: 9b 01 movw r18, r22 + 3b00: ac 01 movw r20, r24 + 3b02: c5 01 movw r24, r10 + 3b04: b4 01 movw r22, r8 + 3b06: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3b0a: 4b 01 movw r8, r22 + 3b0c: 5c 01 movw r10, r24 + 3b0e: 20 e0 ldi r18, 0x00 ; 0 + 3b10: 30 e0 ldi r19, 0x00 ; 0 + 3b12: 40 e4 ldi r20, 0x40 ; 64 + 3b14: 50 e4 ldi r21, 0x40 ; 64 + 3b16: c7 01 movw r24, r14 + 3b18: b6 01 movw r22, r12 + 3b1a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3b1e: 2a e6 ldi r18, 0x6A ; 106 + 3b20: 33 e1 ldi r19, 0x13 ; 19 + 3b22: 49 e8 ldi r20, 0x89 ; 137 + 3b24: 53 e3 ldi r21, 0x33 ; 51 + 3b26: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3b2a: 9b 01 movw r18, r22 + 3b2c: ac 01 movw r20, r24 + 3b2e: c5 01 movw r24, r10 + 3b30: b4 01 movw r22, r8 + 3b32: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3b36: 9b 01 movw r18, r22 + 3b38: ac 01 movw r20, r24 + 3b3a: 60 e0 ldi r22, 0x00 ; 0 + 3b3c: 70 e0 ldi r23, 0x00 ; 0 + 3b3e: 80 e8 ldi r24, 0x80 ; 128 + 3b40: 9f e3 ldi r25, 0x3F ; 63 + 3b42: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 3b46: cc 23 and r28, r28 + 3b48: 89 f0 breq .+34 ; 0x3b6c + 3b4a: 23 e3 ldi r18, 0x33 ; 51 + 3b4c: 33 e9 ldi r19, 0x93 ; 147 + 3b4e: 48 e8 ldi r20, 0x88 ; 136 + 3b50: 53 e4 ldi r21, 0x43 ; 67 + 3b52: c6 2e mov r12, r22 + 3b54: d7 2e mov r13, r23 + 3b56: e8 2e mov r14, r24 + 3b58: f9 2e mov r15, r25 + 3b5a: c7 01 movw r24, r14 + 3b5c: b6 01 movw r22, r12 + 3b5e: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 3b62: 56 2f mov r21, r22 + 3b64: 47 2f mov r20, r23 + 3b66: 38 2f mov r19, r24 + 3b68: 29 2f mov r18, r25 + 3b6a: 04 c0 rjmp .+8 ; 0x3b74 + 3b6c: 56 2f mov r21, r22 + 3b6e: 47 2f mov r20, r23 + 3b70: 38 2f mov r19, r24 + 3b72: 29 2f mov r18, r25 + 3b74: 65 2f mov r22, r21 + 3b76: 74 2f mov r23, r20 + 3b78: 83 2f mov r24, r19 + 3b7a: 92 2f mov r25, r18 + 3b7c: cf 91 pop r28 + 3b7e: ff 90 pop r15 + 3b80: ef 90 pop r14 + 3b82: df 90 pop r13 + 3b84: cf 90 pop r12 + 3b86: bf 90 pop r11 + 3b88: af 90 pop r10 + 3b8a: 9f 90 pop r9 + 3b8c: 8f 90 pop r8 + 3b8e: 08 95 ret + +00003b90 : + 3b90: ea e8 ldi r30, 0x8A ; 138 + 3b92: f4 e2 ldi r31, 0x24 ; 36 + 3b94: 10 82 st Z, r1 + 3b96: 11 82 std Z+1, r1 ; 0x01 + 3b98: 12 82 std Z+2, r1 ; 0x02 + 3b9a: 13 82 std Z+3, r1 ; 0x03 + 3b9c: 14 82 std Z+4, r1 ; 0x04 + 3b9e: 15 82 std Z+5, r1 ; 0x05 + 3ba0: 08 95 ret + +00003ba2 : + 3ba2: ff 92 push r15 + 3ba4: 0f 93 push r16 + 3ba6: 1f 93 push r17 + 3ba8: cf 93 push r28 + 3baa: df 93 push r29 + 3bac: 8c 01 movw r16, r24 + 3bae: f6 2e mov r15, r22 + 3bb0: ca e8 ldi r28, 0x8A ; 138 + 3bb2: d4 e2 ldi r29, 0x24 ; 36 + 3bb4: 6c 81 ldd r22, Y+4 ; 0x04 + 3bb6: 7d 81 ldd r23, Y+5 ; 0x05 + 3bb8: 07 2e mov r0, r23 + 3bba: 00 0c add r0, r0 + 3bbc: 88 0b sbc r24, r24 + 3bbe: 99 0b sbc r25, r25 + 3bc0: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 3bc4: 9b 01 movw r18, r22 + 3bc6: ac 01 movw r20, r24 + 3bc8: 68 81 ld r22, Y + 3bca: 79 81 ldd r23, Y+1 ; 0x01 + 3bcc: 8a 81 ldd r24, Y+2 ; 0x02 + 3bce: 9b 81 ldd r25, Y+3 ; 0x03 + 3bd0: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 3bd4: f8 01 movw r30, r16 + 3bd6: 60 83 st Z, r22 + 3bd8: 71 83 std Z+1, r23 ; 0x01 + 3bda: 82 83 std Z+2, r24 ; 0x02 + 3bdc: 93 83 std Z+3, r25 ; 0x03 + 3bde: f1 10 cpse r15, r1 + 3be0: d7 df rcall .-82 ; 0x3b90 + 3be2: df 91 pop r29 + 3be4: cf 91 pop r28 + 3be6: 1f 91 pop r17 + 3be8: 0f 91 pop r16 + 3bea: ff 90 pop r15 + 3bec: 08 95 ret + +00003bee : + 3bee: 4f 92 push r4 + 3bf0: 5f 92 push r5 + 3bf2: 6f 92 push r6 + 3bf4: 7f 92 push r7 + 3bf6: 8f 92 push r8 + 3bf8: 9f 92 push r9 + 3bfa: af 92 push r10 + 3bfc: bf 92 push r11 + 3bfe: cf 92 push r12 + 3c00: df 92 push r13 + 3c02: ef 92 push r14 + 3c04: ff 92 push r15 + 3c06: 0f 93 push r16 + 3c08: 1f 93 push r17 + 3c0a: cf 93 push r28 + 3c0c: df 93 push r29 + 3c0e: 8c 01 movw r16, r24 + 3c10: 18 16 cp r1, r24 + 3c12: 19 06 cpc r1, r25 + 3c14: 0c f0 brlt .+2 ; 0x3c18 + 3c16: 40 c0 rjmp .+128 ; 0x3c98 + 3c18: c0 e0 ldi r28, 0x00 ; 0 + 3c1a: d0 e0 ldi r29, 0x00 ; 0 + 3c1c: 81 2c mov r8, r1 + 3c1e: 91 2c mov r9, r1 + 3c20: 54 01 movw r10, r8 + 3c22: 31 df rcall .-414 ; 0x3a86 + 3c24: bc 01 movw r22, r24 + 3c26: 80 e0 ldi r24, 0x00 ; 0 + 3c28: 90 e0 ldi r25, 0x00 ; 0 + 3c2a: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf> + 3c2e: 20 e0 ldi r18, 0x00 ; 0 + 3c30: 30 e0 ldi r19, 0x00 ; 0 + 3c32: 44 e0 ldi r20, 0x04 ; 4 + 3c34: 50 e4 ldi r21, 0x40 ; 64 + 3c36: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3c3a: 20 e0 ldi r18, 0x00 ; 0 + 3c3c: 30 e0 ldi r19, 0x00 ; 0 + 3c3e: 40 e8 ldi r20, 0x80 ; 128 + 3c40: 59 e3 ldi r21, 0x39 ; 57 + 3c42: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3c46: 6b 01 movw r12, r22 + 3c48: 7c 01 movw r14, r24 + 3c4a: 20 e0 ldi r18, 0x00 ; 0 + 3c4c: 30 e2 ldi r19, 0x20 ; 32 + 3c4e: 4b e4 ldi r20, 0x4B ; 75 + 3c50: 56 e4 ldi r21, 0x46 ; 70 + 3c52: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3c56: 2b 01 movw r4, r22 + 3c58: 3c 01 movw r6, r24 + 3c5a: a7 01 movw r20, r14 + 3c5c: 96 01 movw r18, r12 + 3c5e: 63 e3 ldi r22, 0x33 ; 51 + 3c60: 73 e3 ldi r23, 0x33 ; 51 + 3c62: 83 e5 ldi r24, 0x53 ; 83 + 3c64: 90 e4 ldi r25, 0x40 ; 64 + 3c66: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 3c6a: 9b 01 movw r18, r22 + 3c6c: ac 01 movw r20, r24 + 3c6e: c3 01 movw r24, r6 + 3c70: b2 01 movw r22, r4 + 3c72: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 3c76: 0e 94 22 33 call 0x6644 ; 0x6644 <__fixunssfsi> + 3c7a: 41 e0 ldi r20, 0x01 ; 1 + 3c7c: 10 df rcall .-480 ; 0x3a9e + 3c7e: 9b 01 movw r18, r22 + 3c80: ac 01 movw r20, r24 + 3c82: c5 01 movw r24, r10 + 3c84: b4 01 movw r22, r8 + 3c86: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3c8a: 4b 01 movw r8, r22 + 3c8c: 5c 01 movw r10, r24 + 3c8e: 21 96 adiw r28, 0x01 ; 1 + 3c90: 0c 17 cp r16, r28 + 3c92: 1d 07 cpc r17, r29 + 3c94: 31 f6 brne .-116 ; 0x3c22 + 3c96: 03 c0 rjmp .+6 ; 0x3c9e + 3c98: 81 2c mov r8, r1 + 3c9a: 91 2c mov r9, r1 + 3c9c: 54 01 movw r10, r8 + 3c9e: b8 01 movw r22, r16 + 3ca0: 11 0f add r17, r17 + 3ca2: 88 0b sbc r24, r24 + 3ca4: 99 0b sbc r25, r25 + 3ca6: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf> + 3caa: 9b 01 movw r18, r22 + 3cac: ac 01 movw r20, r24 + 3cae: c5 01 movw r24, r10 + 3cb0: b4 01 movw r22, r8 + 3cb2: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3> + 3cb6: df 91 pop r29 + 3cb8: cf 91 pop r28 + 3cba: 1f 91 pop r17 + 3cbc: 0f 91 pop r16 + 3cbe: ff 90 pop r15 + 3cc0: ef 90 pop r14 + 3cc2: df 90 pop r13 + 3cc4: cf 90 pop r12 + 3cc6: bf 90 pop r11 + 3cc8: af 90 pop r10 + 3cca: 9f 90 pop r9 + 3ccc: 8f 90 pop r8 + 3cce: 7f 90 pop r7 + 3cd0: 6f 90 pop r6 + 3cd2: 5f 90 pop r5 + 3cd4: 4f 90 pop r4 + 3cd6: 08 95 ret + +00003cd8 : + ntcle100_data.samplect = 0; +} + +float get_ntcle_temp_now(void) +{ + return (get_oversampled_ntcle_temp(NTCLE100_OVERSAMPLE_AMOUNT) - temp_off); + 3cd8: 84 e0 ldi r24, 0x04 ; 4 + 3cda: 90 e0 ldi r25, 0x00 ; 0 + 3cdc: 88 df rcall .-240 ; 0x3bee + 3cde: 20 91 a0 29 lds r18, 0x29A0 ; 0x8029a0 + 3ce2: 30 91 a1 29 lds r19, 0x29A1 ; 0x8029a1 + 3ce6: 40 91 a2 29 lds r20, 0x29A2 ; 0x8029a2 + 3cea: 50 91 a3 29 lds r21, 0x29A3 ; 0x8029a3 + 3cee: 0c 94 d3 31 jmp 0x63a6 ; 0x63a6 <__subsf3> +} + 3cf2: 08 95 ret + +00003cf4 : +{ + ADCA.CH0.CTRL |= 0b10000000; +} + +void ntcle100_init(void) +{ + 3cf4: cf 93 push r28 + 3cf6: df 93 push r29 + temp_off = 0; + 3cf8: 10 92 a0 29 sts 0x29A0, r1 ; 0x8029a0 + 3cfc: 10 92 a1 29 sts 0x29A1, r1 ; 0x8029a1 + 3d00: 10 92 a2 29 sts 0x29A2, r1 ; 0x8029a2 + 3d04: 10 92 a3 29 sts 0x29A3, r1 ; 0x8029a3 + //enable adc channel 0 + ADCA.CH0.CTRL = 0b00000001; + 3d08: e0 e0 ldi r30, 0x00 ; 0 + 3d0a: f2 e0 ldi r31, 0x02 ; 2 + 3d0c: 81 e0 ldi r24, 0x01 ; 1 + 3d0e: 80 a3 std Z+32, r24 ; 0x20 + //pin 0 for ch0 + ADCA.CH0.MUXCTRL = 0b00000000; + 3d10: 11 a2 std Z+33, r1 ; 0x21 + swprintf(SWDEBUG, "Test temp: %-2.2f\n", get_ntcle_temp_now()); + 3d12: c0 91 3d 25 lds r28, 0x253D ; 0x80253d + 3d16: d0 91 3e 25 lds r29, 0x253E ; 0x80253e + 3d1a: de df rcall .-68 ; 0x3cd8 + 3d1c: 9f 93 push r25 + 3d1e: 8f 93 push r24 + 3d20: 7f 93 push r23 + 3d22: 6f 93 push r22 + 3d24: 8c ee ldi r24, 0xEC ; 236 + 3d26: 90 e2 ldi r25, 0x20 ; 32 + 3d28: 9f 93 push r25 + 3d2a: 8f 93 push r24 + 3d2c: 88 e0 ldi r24, 0x08 ; 8 + 3d2e: 8f 93 push r24 + 3d30: 80 ea ldi r24, 0xA0 ; 160 + 3d32: 8f 93 push r24 + 3d34: fe 01 movw r30, r28 + 3d36: 19 95 eicall +} + 3d38: 8d b7 in r24, 0x3d ; 61 + 3d3a: 9e b7 in r25, 0x3e ; 62 + 3d3c: 08 96 adiw r24, 0x08 ; 8 + 3d3e: 8d bf out 0x3d, r24 ; 61 + 3d40: 9e bf out 0x3e, r25 ; 62 + 3d42: df 91 pop r29 + 3d44: cf 91 pop r28 + 3d46: 08 95 ret + +00003d48 : + */ + +#include "drivers/adc_util.h" + +void adc_util_init(void) +{ + 3d48: 0f 93 push r16 + 3d4a: 1f 93 push r17 + 3d4c: cf 93 push r28 + 3d4e: df 93 push r29 + //enable adca + ADCA.CTRLA = 0b00000001; + 3d50: 00 e0 ldi r16, 0x00 ; 0 + 3d52: 12 e0 ldi r17, 0x02 ; 2 + 3d54: 81 e0 ldi r24, 0x01 ; 1 + 3d56: f8 01 movw r30, r16 + 3d58: 80 83 st Z, r24 + //enable unsigned 12 bit res + ADCA.CTRLB = 0b00000000; + 3d5a: 11 82 std Z+1, r1 ; 0x01 + //[5:4] = 01 for Vcc/1.6 as ref voltage + ADCA.REFCTRL = 0b00010000; + 3d5c: 80 e1 ldi r24, 0x10 ; 16 + 3d5e: 82 83 std Z+2, r24 ; 0x02 + + ADCA.PRESCALER = 0b00000101; + 3d60: 85 e0 ldi r24, 0x05 ; 5 + 3d62: 84 83 std Z+4, r24 ; 0x04 + * + * \param address Byte offset into the signature row + */ +static inline uint8_t nvm_read_production_signature_row(uint8_t address) +{ + return nvm_read_byte(NVM_CMD_READ_CALIB_ROW_gc, address); + 3d64: 61 e2 ldi r22, 0x21 ; 33 + 3d66: 70 e0 ldi r23, 0x00 ; 0 + 3d68: 82 e0 ldi r24, 0x02 ; 2 + 3d6a: 0e 94 5d 04 call 0x8ba ; 0x8ba + uint16_t data; + + switch (cal) { +#ifdef ADCA + case ADC_CAL_ADCA: + data = nvm_read_production_signature_row(ADCACAL1); + 3d6e: c8 2f mov r28, r24 + 3d70: d0 e0 ldi r29, 0x00 ; 0 + data <<= 8; + 3d72: dc 2f mov r29, r28 + 3d74: cc 27 eor r28, r28 + 3d76: 60 e2 ldi r22, 0x20 ; 32 + 3d78: 70 e0 ldi r23, 0x00 ; 0 + 3d7a: 82 e0 ldi r24, 0x02 ; 2 + 3d7c: 0e 94 5d 04 call 0x8ba ; 0x8ba + data |= nvm_read_production_signature_row(ADCACAL0); + 3d80: c8 2b or r28, r24 + ADCA.CAL = adc_get_calibration_data(ADC_CAL_ADCA); + 3d82: f8 01 movw r30, r16 + 3d84: c4 87 std Z+12, r28 ; 0x0c + 3d86: d5 87 std Z+13, r29 ; 0x0d + ////enable adc 1 + //ADCA.CH1.CTRL = 0b00000001; +// + ////pin 1 for ch1 + //ADCA.CH1.MUXCTRL = 0b00001000; +} + 3d88: df 91 pop r29 + 3d8a: cf 91 pop r28 + 3d8c: 1f 91 pop r17 + 3d8e: 0f 91 pop r16 + 3d90: 08 95 ret + +00003d92 : + 3d92: 4f 92 push r4 + 3d94: 5f 92 push r5 + 3d96: 6f 92 push r6 + 3d98: 7f 92 push r7 + 3d9a: 8f 92 push r8 + 3d9c: 9f 92 push r9 + 3d9e: af 92 push r10 + 3da0: bf 92 push r11 + 3da2: cf 92 push r12 + 3da4: df 92 push r13 + 3da6: ef 92 push r14 + 3da8: ff 92 push r15 + 3daa: 0f 93 push r16 + 3dac: 1f 93 push r17 + 3dae: cf 93 push r28 + 3db0: df 93 push r29 + 3db2: cd b7 in r28, 0x3d ; 61 + 3db4: de b7 in r29, 0x3e ; 62 + 3db6: a4 97 sbiw r28, 0x24 ; 36 + 3db8: cd bf out 0x3d, r28 ; 61 + 3dba: de bf out 0x3e, r29 ; 62 + 3dbc: 69 87 std Y+9, r22 ; 0x09 + 3dbe: 7a 87 std Y+10, r23 ; 0x0a + 3dc0: 8b 87 std Y+11, r24 ; 0x0b + 3dc2: 9c 87 std Y+12, r25 ; 0x0c + 3dc4: 2d 87 std Y+13, r18 ; 0x0d + 3dc6: 3e 87 std Y+14, r19 ; 0x0e + 3dc8: 4f 87 std Y+15, r20 ; 0x0f + 3dca: 58 8b std Y+16, r21 ; 0x10 + 3dcc: e9 8a std Y+17, r14 ; 0x11 + 3dce: fa 8a std Y+18, r15 ; 0x12 + 3dd0: 0b 8b std Y+19, r16 ; 0x13 + 3dd2: 1c 8b std Y+20, r17 ; 0x14 + 3dd4: 20 e0 ldi r18, 0x00 ; 0 + 3dd6: 30 e0 ldi r19, 0x00 ; 0 + 3dd8: a9 01 movw r20, r18 + 3dda: c6 01 movw r24, r12 + 3ddc: b5 01 movw r22, r10 + 3dde: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 3de2: 81 11 cpse r24, r1 + 3de4: 17 c0 rjmp .+46 ; 0x3e14 + 3de6: 20 e0 ldi r18, 0x00 ; 0 + 3de8: 30 e0 ldi r19, 0x00 ; 0 + 3dea: a9 01 movw r20, r18 + 3dec: 68 ad ldd r22, Y+56 ; 0x38 + 3dee: 79 ad ldd r23, Y+57 ; 0x39 + 3df0: 8a ad ldd r24, Y+58 ; 0x3a + 3df2: 9b ad ldd r25, Y+59 ; 0x3b + 3df4: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 3df8: 81 11 cpse r24, r1 + 3dfa: 0c c0 rjmp .+24 ; 0x3e14 + 3dfc: 20 e0 ldi r18, 0x00 ; 0 + 3dfe: 30 e0 ldi r19, 0x00 ; 0 + 3e00: a9 01 movw r20, r18 + 3e02: 6c ad ldd r22, Y+60 ; 0x3c + 3e04: 7d ad ldd r23, Y+61 ; 0x3d + 3e06: 8e ad ldd r24, Y+62 ; 0x3e + 3e08: 9f ad ldd r25, Y+63 ; 0x3f + 3e0a: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 3e0e: 88 23 and r24, r24 + 3e10: 09 f4 brne .+2 ; 0x3e14 + 3e12: 89 c2 rjmp .+1298 ; 0x4326 <__stack+0x327> + 3e14: a6 01 movw r20, r12 + 3e16: 95 01 movw r18, r10 + 3e18: c6 01 movw r24, r12 + 3e1a: b5 01 movw r22, r10 + 3e1c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3e20: 2b 01 movw r4, r22 + 3e22: 3c 01 movw r6, r24 + 3e24: 28 ad ldd r18, Y+56 ; 0x38 + 3e26: 39 ad ldd r19, Y+57 ; 0x39 + 3e28: 4a ad ldd r20, Y+58 ; 0x3a + 3e2a: 5b ad ldd r21, Y+59 ; 0x3b + 3e2c: ca 01 movw r24, r20 + 3e2e: b9 01 movw r22, r18 + 3e30: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3e34: 9b 01 movw r18, r22 + 3e36: ac 01 movw r20, r24 + 3e38: c3 01 movw r24, r6 + 3e3a: b2 01 movw r22, r4 + 3e3c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3e40: 2b 01 movw r4, r22 + 3e42: 3c 01 movw r6, r24 + 3e44: 2c ad ldd r18, Y+60 ; 0x3c + 3e46: 3d ad ldd r19, Y+61 ; 0x3d + 3e48: 4e ad ldd r20, Y+62 ; 0x3e + 3e4a: 5f ad ldd r21, Y+63 ; 0x3f + 3e4c: ca 01 movw r24, r20 + 3e4e: b9 01 movw r22, r18 + 3e50: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3e54: 9b 01 movw r18, r22 + 3e56: ac 01 movw r20, r24 + 3e58: c3 01 movw r24, r6 + 3e5a: b2 01 movw r22, r4 + 3e5c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3e60: 2b 01 movw r4, r22 + 3e62: 3c 01 movw r6, r24 + 3e64: 75 94 asr r7 + 3e66: 67 94 ror r6 + 3e68: 57 94 ror r5 + 3e6a: 47 94 ror r4 + 3e6c: 1f ed ldi r17, 0xDF ; 223 + 3e6e: e1 2e mov r14, r17 + 3e70: 19 e5 ldi r17, 0x59 ; 89 + 3e72: f1 2e mov r15, r17 + 3e74: 07 e3 ldi r16, 0x37 ; 55 + 3e76: 1f e5 ldi r17, 0x5F ; 95 + 3e78: e4 18 sub r14, r4 + 3e7a: f5 08 sbc r15, r5 + 3e7c: 06 09 sbc r16, r6 + 3e7e: 17 09 sbc r17, r7 + 3e80: 20 e0 ldi r18, 0x00 ; 0 + 3e82: 30 e0 ldi r19, 0x00 ; 0 + 3e84: 40 e0 ldi r20, 0x00 ; 0 + 3e86: 5f e3 ldi r21, 0x3F ; 63 + 3e88: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3e8c: a8 01 movw r20, r16 + 3e8e: 97 01 movw r18, r14 + 3e90: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3e94: a8 01 movw r20, r16 + 3e96: 97 01 movw r18, r14 + 3e98: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3e9c: 9b 01 movw r18, r22 + 3e9e: ac 01 movw r20, r24 + 3ea0: 60 e0 ldi r22, 0x00 ; 0 + 3ea2: 70 e0 ldi r23, 0x00 ; 0 + 3ea4: 80 ec ldi r24, 0xC0 ; 192 + 3ea6: 9f e3 ldi r25, 0x3F ; 63 + 3ea8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 3eac: a8 01 movw r20, r16 + 3eae: 97 01 movw r18, r14 + 3eb0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3eb4: 2b 01 movw r4, r22 + 3eb6: 3c 01 movw r6, r24 + 3eb8: 9b 01 movw r18, r22 + 3eba: ac 01 movw r20, r24 + 3ebc: c6 01 movw r24, r12 + 3ebe: b5 01 movw r22, r10 + 3ec0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3ec4: 69 83 std Y+1, r22 ; 0x01 + 3ec6: 7a 83 std Y+2, r23 ; 0x02 + 3ec8: 8b 83 std Y+3, r24 ; 0x03 + 3eca: 9c 83 std Y+4, r25 ; 0x04 + 3ecc: a3 01 movw r20, r6 + 3ece: 92 01 movw r18, r4 + 3ed0: 68 ad ldd r22, Y+56 ; 0x38 + 3ed2: 79 ad ldd r23, Y+57 ; 0x39 + 3ed4: 8a ad ldd r24, Y+58 ; 0x3a + 3ed6: 9b ad ldd r25, Y+59 ; 0x3b + 3ed8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3edc: 6d 83 std Y+5, r22 ; 0x05 + 3ede: 7e 83 std Y+6, r23 ; 0x06 + 3ee0: 8f 83 std Y+7, r24 ; 0x07 + 3ee2: 98 87 std Y+8, r25 ; 0x08 + 3ee4: a3 01 movw r20, r6 + 3ee6: 92 01 movw r18, r4 + 3ee8: 6c ad ldd r22, Y+60 ; 0x3c + 3eea: 7d ad ldd r23, Y+61 ; 0x3d + 3eec: 8e ad ldd r24, Y+62 ; 0x3e + 3eee: 9f ad ldd r25, Y+63 ; 0x3f + 3ef0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3ef4: 6d 8b std Y+21, r22 ; 0x15 + 3ef6: 7e 8b std Y+22, r23 ; 0x16 + 3ef8: 8f 8b std Y+23, r24 ; 0x17 + 3efa: 98 8f std Y+24, r25 ; 0x18 + 3efc: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 + 3f00: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 + 3f04: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 + 3f08: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 + 3f0c: 20 91 9c 24 lds r18, 0x249C ; 0x80249c + 3f10: 30 91 9d 24 lds r19, 0x249D ; 0x80249d + 3f14: 40 91 9e 24 lds r20, 0x249E ; 0x80249e + 3f18: 50 91 9f 24 lds r21, 0x249F ; 0x80249f + 3f1c: 80 90 00 20 lds r8, 0x2000 ; 0x802000 <__data_start> + 3f20: 90 90 01 20 lds r9, 0x2001 ; 0x802001 <__data_start+0x1> + 3f24: a0 90 02 20 lds r10, 0x2002 ; 0x802002 <__data_start+0x2> + 3f28: b0 90 03 20 lds r11, 0x2003 ; 0x802003 <__data_start+0x3> + 3f2c: 40 90 a0 24 lds r4, 0x24A0 ; 0x8024a0 + 3f30: 50 90 a1 24 lds r5, 0x24A1 ; 0x8024a1 + 3f34: 60 90 a2 24 lds r6, 0x24A2 ; 0x8024a2 + 3f38: 70 90 a3 24 lds r7, 0x24A3 ; 0x8024a3 + 3f3c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3f40: 6b 01 movw r12, r22 + 3f42: 7c 01 movw r14, r24 + 3f44: a3 01 movw r20, r6 + 3f46: 92 01 movw r18, r4 + 3f48: c5 01 movw r24, r10 + 3f4a: b4 01 movw r22, r8 + 3f4c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3f50: 9b 01 movw r18, r22 + 3f52: ac 01 movw r20, r24 + 3f54: c7 01 movw r24, r14 + 3f56: b6 01 movw r22, r12 + 3f58: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 3f5c: 69 8f std Y+25, r22 ; 0x19 + 3f5e: 7a 8f std Y+26, r23 ; 0x1a + 3f60: 8b 8f std Y+27, r24 ; 0x1b + 3f62: 9c 8f std Y+28, r25 ; 0x1c + 3f64: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 3f68: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 3f6c: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 3f70: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 3f74: 20 91 a4 24 lds r18, 0x24A4 ; 0x8024a4 + 3f78: 30 91 a5 24 lds r19, 0x24A5 ; 0x8024a5 + 3f7c: 40 91 a6 24 lds r20, 0x24A6 ; 0x8024a6 + 3f80: 50 91 a7 24 lds r21, 0x24A7 ; 0x8024a7 + 3f84: 80 90 a0 24 lds r8, 0x24A0 ; 0x8024a0 + 3f88: 90 90 a1 24 lds r9, 0x24A1 ; 0x8024a1 + 3f8c: a0 90 a2 24 lds r10, 0x24A2 ; 0x8024a2 + 3f90: b0 90 a3 24 lds r11, 0x24A3 ; 0x8024a3 + 3f94: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 3f98: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 3f9c: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 3fa0: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 3fa4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3fa8: 6b 01 movw r12, r22 + 3faa: 7c 01 movw r14, r24 + 3fac: a3 01 movw r20, r6 + 3fae: 92 01 movw r18, r4 + 3fb0: c5 01 movw r24, r10 + 3fb2: b4 01 movw r22, r8 + 3fb4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 3fb8: 9b 01 movw r18, r22 + 3fba: ac 01 movw r20, r24 + 3fbc: c7 01 movw r24, r14 + 3fbe: b6 01 movw r22, r12 + 3fc0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 3fc4: 6d 8f std Y+29, r22 ; 0x1d + 3fc6: 7e 8f std Y+30, r23 ; 0x1e + 3fc8: 8f 8f std Y+31, r24 ; 0x1f + 3fca: 98 a3 std Y+32, r25 ; 0x20 + 3fcc: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 3fd0: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 3fd4: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 3fd8: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 3fdc: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start> + 3fe0: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1> + 3fe4: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2> + 3fe8: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3> + 3fec: 80 90 9c 24 lds r8, 0x249C ; 0x80249c + 3ff0: 90 90 9d 24 lds r9, 0x249D ; 0x80249d + 3ff4: a0 90 9e 24 lds r10, 0x249E ; 0x80249e + 3ff8: b0 90 9f 24 lds r11, 0x249F ; 0x80249f + 3ffc: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 4000: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 4004: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 4008: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 400c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4010: 20 e0 ldi r18, 0x00 ; 0 + 4012: 30 e0 ldi r19, 0x00 ; 0 + 4014: 40 e0 ldi r20, 0x00 ; 0 + 4016: 5f e3 ldi r21, 0x3F ; 63 + 4018: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 401c: 6b 01 movw r12, r22 + 401e: 7c 01 movw r14, r24 + 4020: a3 01 movw r20, r6 + 4022: 92 01 movw r18, r4 + 4024: c5 01 movw r24, r10 + 4026: b4 01 movw r22, r8 + 4028: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 402c: 9b 01 movw r18, r22 + 402e: ac 01 movw r20, r24 + 4030: c7 01 movw r24, r14 + 4032: b6 01 movw r22, r12 + 4034: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4038: 6b 01 movw r12, r22 + 403a: 7c 01 movw r14, r24 + 403c: 9b 01 movw r18, r22 + 403e: ac 01 movw r20, r24 + 4040: 6d 81 ldd r22, Y+5 ; 0x05 + 4042: 7e 81 ldd r23, Y+6 ; 0x06 + 4044: 8f 81 ldd r24, Y+7 ; 0x07 + 4046: 98 85 ldd r25, Y+8 ; 0x08 + 4048: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 404c: 4b 01 movw r8, r22 + 404e: 5c 01 movw r10, r24 + 4050: 2d 8d ldd r18, Y+29 ; 0x1d + 4052: 3e 8d ldd r19, Y+30 ; 0x1e + 4054: 4f 8d ldd r20, Y+31 ; 0x1f + 4056: 58 a1 ldd r21, Y+32 ; 0x20 + 4058: 6d 89 ldd r22, Y+21 ; 0x15 + 405a: 7e 89 ldd r23, Y+22 ; 0x16 + 405c: 8f 89 ldd r24, Y+23 ; 0x17 + 405e: 98 8d ldd r25, Y+24 ; 0x18 + 4060: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4064: 9b 01 movw r18, r22 + 4066: ac 01 movw r20, r24 + 4068: c5 01 movw r24, r10 + 406a: b4 01 movw r22, r8 + 406c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4070: 69 a3 std Y+33, r22 ; 0x21 + 4072: 7a a3 std Y+34, r23 ; 0x22 + 4074: 8b a3 std Y+35, r24 ; 0x23 + 4076: 9c a3 std Y+36, r25 ; 0x24 + 4078: 29 8d ldd r18, Y+25 ; 0x19 + 407a: 3a 8d ldd r19, Y+26 ; 0x1a + 407c: 4b 8d ldd r20, Y+27 ; 0x1b + 407e: 5c 8d ldd r21, Y+28 ; 0x1c + 4080: 6d 89 ldd r22, Y+21 ; 0x15 + 4082: 7e 89 ldd r23, Y+22 ; 0x16 + 4084: 8f 89 ldd r24, Y+23 ; 0x17 + 4086: 98 8d ldd r25, Y+24 ; 0x18 + 4088: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 408c: 4b 01 movw r8, r22 + 408e: 5c 01 movw r10, r24 + 4090: a7 01 movw r20, r14 + 4092: 96 01 movw r18, r12 + 4094: 69 81 ldd r22, Y+1 ; 0x01 + 4096: 7a 81 ldd r23, Y+2 ; 0x02 + 4098: 8b 81 ldd r24, Y+3 ; 0x03 + 409a: 9c 81 ldd r25, Y+4 ; 0x04 + 409c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 40a0: 9b 01 movw r18, r22 + 40a2: ac 01 movw r20, r24 + 40a4: c5 01 movw r24, r10 + 40a6: b4 01 movw r22, r8 + 40a8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 40ac: 4b 01 movw r8, r22 + 40ae: 5c 01 movw r10, r24 + 40b0: 2d 8d ldd r18, Y+29 ; 0x1d + 40b2: 3e 8d ldd r19, Y+30 ; 0x1e + 40b4: 4f 8d ldd r20, Y+31 ; 0x1f + 40b6: 58 a1 ldd r21, Y+32 ; 0x20 + 40b8: 69 81 ldd r22, Y+1 ; 0x01 + 40ba: 7a 81 ldd r23, Y+2 ; 0x02 + 40bc: 8b 81 ldd r24, Y+3 ; 0x03 + 40be: 9c 81 ldd r25, Y+4 ; 0x04 + 40c0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 40c4: 6b 01 movw r12, r22 + 40c6: 7c 01 movw r14, r24 + 40c8: 29 8d ldd r18, Y+25 ; 0x19 + 40ca: 3a 8d ldd r19, Y+26 ; 0x1a + 40cc: 4b 8d ldd r20, Y+27 ; 0x1b + 40ce: 5c 8d ldd r21, Y+28 ; 0x1c + 40d0: 6d 81 ldd r22, Y+5 ; 0x05 + 40d2: 7e 81 ldd r23, Y+6 ; 0x06 + 40d4: 8f 81 ldd r24, Y+7 ; 0x07 + 40d6: 98 85 ldd r25, Y+8 ; 0x08 + 40d8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 40dc: 9b 01 movw r18, r22 + 40de: ac 01 movw r20, r24 + 40e0: c7 01 movw r24, r14 + 40e2: b6 01 movw r22, r12 + 40e4: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 40e8: 6b 01 movw r12, r22 + 40ea: 7c 01 movw r14, r24 + 40ec: 60 91 a8 24 lds r22, 0x24A8 ; 0x8024a8 + 40f0: 70 91 a9 24 lds r23, 0x24A9 ; 0x8024a9 + 40f4: 80 91 aa 24 lds r24, 0x24AA ; 0x8024aa + 40f8: 90 91 ab 24 lds r25, 0x24AB ; 0x8024ab + 40fc: 20 e0 ldi r18, 0x00 ; 0 + 40fe: 30 e0 ldi r19, 0x00 ; 0 + 4100: a9 01 movw r20, r18 + 4102: 0e 94 51 34 call 0x68a2 ; 0x68a2 <__gesf2> + 4106: 18 16 cp r1, r24 + 4108: 0c f0 brlt .+2 ; 0x410c <__stack+0x10d> + 410a: ab c0 rjmp .+342 ; 0x4262 <__stack+0x263> + 410c: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 + 4110: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 + 4114: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa + 4118: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab + 411c: 40 90 98 24 lds r4, 0x2498 ; 0x802498 + 4120: 50 90 99 24 lds r5, 0x2499 ; 0x802499 + 4124: 60 90 9a 24 lds r6, 0x249A ; 0x80249a + 4128: 70 90 9b 24 lds r7, 0x249B ; 0x80249b + 412c: 69 a1 ldd r22, Y+33 ; 0x21 + 412e: 7a a1 ldd r23, Y+34 ; 0x22 + 4130: 8b a1 ldd r24, Y+35 ; 0x23 + 4132: 9c a1 ldd r25, Y+36 ; 0x24 + 4134: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4138: 2a ef ldi r18, 0xFA ; 250 + 413a: 39 ec ldi r19, 0xC9 ; 201 + 413c: 44 e3 ldi r20, 0x34 ; 52 + 413e: 59 e3 ldi r21, 0x39 ; 57 + 4140: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4144: a3 01 movw r20, r6 + 4146: 92 01 movw r18, r4 + 4148: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 414c: 60 93 98 24 sts 0x2498, r22 ; 0x802498 + 4150: 70 93 99 24 sts 0x2499, r23 ; 0x802499 + 4154: 80 93 9a 24 sts 0x249A, r24 ; 0x80249a + 4158: 90 93 9b 24 sts 0x249B, r25 ; 0x80249b + 415c: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 + 4160: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 + 4164: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa + 4168: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab + 416c: 40 90 94 24 lds r4, 0x2494 ; 0x802494 + 4170: 50 90 95 24 lds r5, 0x2495 ; 0x802495 + 4174: 60 90 96 24 lds r6, 0x2496 ; 0x802496 + 4178: 70 90 97 24 lds r7, 0x2497 ; 0x802497 + 417c: c5 01 movw r24, r10 + 417e: b4 01 movw r22, r8 + 4180: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4184: 2a ef ldi r18, 0xFA ; 250 + 4186: 39 ec ldi r19, 0xC9 ; 201 + 4188: 44 e3 ldi r20, 0x34 ; 52 + 418a: 59 e3 ldi r21, 0x39 ; 57 + 418c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4190: a3 01 movw r20, r6 + 4192: 92 01 movw r18, r4 + 4194: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4198: 60 93 94 24 sts 0x2494, r22 ; 0x802494 + 419c: 70 93 95 24 sts 0x2495, r23 ; 0x802495 + 41a0: 80 93 96 24 sts 0x2496, r24 ; 0x802496 + 41a4: 90 93 97 24 sts 0x2497, r25 ; 0x802497 + 41a8: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 + 41ac: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 + 41b0: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa + 41b4: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab + 41b8: 40 90 90 24 lds r4, 0x2490 ; 0x802490 + 41bc: 50 90 91 24 lds r5, 0x2491 ; 0x802491 + 41c0: 60 90 92 24 lds r6, 0x2492 ; 0x802492 + 41c4: 70 90 93 24 lds r7, 0x2493 ; 0x802493 + 41c8: c7 01 movw r24, r14 + 41ca: b6 01 movw r22, r12 + 41cc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 41d0: 2a ef ldi r18, 0xFA ; 250 + 41d2: 39 ec ldi r19, 0xC9 ; 201 + 41d4: 44 e3 ldi r20, 0x34 ; 52 + 41d6: 59 e3 ldi r21, 0x39 ; 57 + 41d8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 41dc: a3 01 movw r20, r6 + 41de: 92 01 movw r18, r4 + 41e0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 41e4: 60 93 90 24 sts 0x2490, r22 ; 0x802490 + 41e8: 70 93 91 24 sts 0x2491, r23 ; 0x802491 + 41ec: 80 93 92 24 sts 0x2492, r24 ; 0x802492 + 41f0: 90 93 93 24 sts 0x2493, r25 ; 0x802493 + 41f4: 20 91 98 24 lds r18, 0x2498 ; 0x802498 + 41f8: 30 91 99 24 lds r19, 0x2499 ; 0x802499 + 41fc: 40 91 9a 24 lds r20, 0x249A ; 0x80249a + 4200: 50 91 9b 24 lds r21, 0x249B ; 0x80249b + 4204: 69 85 ldd r22, Y+9 ; 0x09 + 4206: 7a 85 ldd r23, Y+10 ; 0x0a + 4208: 8b 85 ldd r24, Y+11 ; 0x0b + 420a: 9c 85 ldd r25, Y+12 ; 0x0c + 420c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4210: 69 87 std Y+9, r22 ; 0x09 + 4212: 7a 87 std Y+10, r23 ; 0x0a + 4214: 8b 87 std Y+11, r24 ; 0x0b + 4216: 9c 87 std Y+12, r25 ; 0x0c + 4218: 20 91 94 24 lds r18, 0x2494 ; 0x802494 + 421c: 30 91 95 24 lds r19, 0x2495 ; 0x802495 + 4220: 40 91 96 24 lds r20, 0x2496 ; 0x802496 + 4224: 50 91 97 24 lds r21, 0x2497 ; 0x802497 + 4228: 6d 85 ldd r22, Y+13 ; 0x0d + 422a: 7e 85 ldd r23, Y+14 ; 0x0e + 422c: 8f 85 ldd r24, Y+15 ; 0x0f + 422e: 98 89 ldd r25, Y+16 ; 0x10 + 4230: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4234: 6d 87 std Y+13, r22 ; 0x0d + 4236: 7e 87 std Y+14, r23 ; 0x0e + 4238: 8f 87 std Y+15, r24 ; 0x0f + 423a: 98 8b std Y+16, r25 ; 0x10 + 423c: 20 91 90 24 lds r18, 0x2490 ; 0x802490 + 4240: 30 91 91 24 lds r19, 0x2491 ; 0x802491 + 4244: 40 91 92 24 lds r20, 0x2492 ; 0x802492 + 4248: 50 91 93 24 lds r21, 0x2493 ; 0x802493 + 424c: 69 89 ldd r22, Y+17 ; 0x11 + 424e: 7a 89 ldd r23, Y+18 ; 0x12 + 4250: 8b 89 ldd r24, Y+19 ; 0x13 + 4252: 9c 89 ldd r25, Y+20 ; 0x14 + 4254: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4258: 69 8b std Y+17, r22 ; 0x11 + 425a: 7a 8b std Y+18, r23 ; 0x12 + 425c: 8b 8b std Y+19, r24 ; 0x13 + 425e: 9c 8b std Y+20, r25 ; 0x14 + 4260: 18 c0 rjmp .+48 ; 0x4292 <__stack+0x293> + 4262: 10 92 98 24 sts 0x2498, r1 ; 0x802498 + 4266: 10 92 99 24 sts 0x2499, r1 ; 0x802499 + 426a: 10 92 9a 24 sts 0x249A, r1 ; 0x80249a + 426e: 10 92 9b 24 sts 0x249B, r1 ; 0x80249b + 4272: 10 92 94 24 sts 0x2494, r1 ; 0x802494 + 4276: 10 92 95 24 sts 0x2495, r1 ; 0x802495 + 427a: 10 92 96 24 sts 0x2496, r1 ; 0x802496 + 427e: 10 92 97 24 sts 0x2497, r1 ; 0x802497 + 4282: 10 92 90 24 sts 0x2490, r1 ; 0x802490 + 4286: 10 92 91 24 sts 0x2491, r1 ; 0x802491 + 428a: 10 92 92 24 sts 0x2492, r1 ; 0x802492 + 428e: 10 92 93 24 sts 0x2493, r1 ; 0x802493 + 4292: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 4296: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 429a: 40 91 06 20 lds r20, 0x2006 ; 0x802006 + 429e: 50 91 07 20 lds r21, 0x2007 ; 0x802007 + 42a2: 69 a1 ldd r22, Y+33 ; 0x21 + 42a4: 7a a1 ldd r23, Y+34 ; 0x22 + 42a6: 8b a1 ldd r24, Y+35 ; 0x23 + 42a8: 9c a1 ldd r25, Y+36 ; 0x24 + 42aa: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 42ae: 9b 01 movw r18, r22 + 42b0: ac 01 movw r20, r24 + 42b2: 69 85 ldd r22, Y+9 ; 0x09 + 42b4: 7a 85 ldd r23, Y+10 ; 0x0a + 42b6: 8b 85 ldd r24, Y+11 ; 0x0b + 42b8: 9c 85 ldd r25, Y+12 ; 0x0c + 42ba: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 42be: 69 87 std Y+9, r22 ; 0x09 + 42c0: 7a 87 std Y+10, r23 ; 0x0a + 42c2: 8b 87 std Y+11, r24 ; 0x0b + 42c4: 9c 87 std Y+12, r25 ; 0x0c + 42c6: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 42ca: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 42ce: 40 91 06 20 lds r20, 0x2006 ; 0x802006 + 42d2: 50 91 07 20 lds r21, 0x2007 ; 0x802007 + 42d6: c5 01 movw r24, r10 + 42d8: b4 01 movw r22, r8 + 42da: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 42de: 9b 01 movw r18, r22 + 42e0: ac 01 movw r20, r24 + 42e2: 6d 85 ldd r22, Y+13 ; 0x0d + 42e4: 7e 85 ldd r23, Y+14 ; 0x0e + 42e6: 8f 85 ldd r24, Y+15 ; 0x0f + 42e8: 98 89 ldd r25, Y+16 ; 0x10 + 42ea: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 42ee: 6d 87 std Y+13, r22 ; 0x0d + 42f0: 7e 87 std Y+14, r23 ; 0x0e + 42f2: 8f 87 std Y+15, r24 ; 0x0f + 42f4: 98 8b std Y+16, r25 ; 0x10 + 42f6: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 42fa: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 42fe: 40 91 06 20 lds r20, 0x2006 ; 0x802006 + 4302: 50 91 07 20 lds r21, 0x2007 ; 0x802007 + 4306: c7 01 movw r24, r14 + 4308: b6 01 movw r22, r12 + 430a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 430e: 9b 01 movw r18, r22 + 4310: ac 01 movw r20, r24 + 4312: 69 89 ldd r22, Y+17 ; 0x11 + 4314: 7a 89 ldd r23, Y+18 ; 0x12 + 4316: 8b 89 ldd r24, Y+19 ; 0x13 + 4318: 9c 89 ldd r25, Y+20 ; 0x14 + 431a: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 431e: 69 8b std Y+17, r22 ; 0x11 + 4320: 7a 8b std Y+18, r23 ; 0x12 + 4322: 8b 8b std Y+19, r24 ; 0x13 + 4324: 9c 8b std Y+20, r25 ; 0x14 + 4326: 2a ef ldi r18, 0xFA ; 250 + 4328: 39 ec ldi r19, 0xC9 ; 201 + 432a: 44 eb ldi r20, 0xB4 ; 180 + 432c: 58 e3 ldi r21, 0x38 ; 56 + 432e: 69 85 ldd r22, Y+9 ; 0x09 + 4330: 7a 85 ldd r23, Y+10 ; 0x0a + 4332: 8b 85 ldd r24, Y+11 ; 0x0b + 4334: 9c 85 ldd r25, Y+12 ; 0x0c + 4336: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 433a: 69 87 std Y+9, r22 ; 0x09 + 433c: 7a 87 std Y+10, r23 ; 0x0a + 433e: 8b 87 std Y+11, r24 ; 0x0b + 4340: 9c 87 std Y+12, r25 ; 0x0c + 4342: 2a ef ldi r18, 0xFA ; 250 + 4344: 39 ec ldi r19, 0xC9 ; 201 + 4346: 44 eb ldi r20, 0xB4 ; 180 + 4348: 58 e3 ldi r21, 0x38 ; 56 + 434a: 6d 85 ldd r22, Y+13 ; 0x0d + 434c: 7e 85 ldd r23, Y+14 ; 0x0e + 434e: 8f 85 ldd r24, Y+15 ; 0x0f + 4350: 98 89 ldd r25, Y+16 ; 0x10 + 4352: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4356: 6d 87 std Y+13, r22 ; 0x0d + 4358: 7e 87 std Y+14, r23 ; 0x0e + 435a: 8f 87 std Y+15, r24 ; 0x0f + 435c: 98 8b std Y+16, r25 ; 0x10 + 435e: 2a ef ldi r18, 0xFA ; 250 + 4360: 39 ec ldi r19, 0xC9 ; 201 + 4362: 44 eb ldi r20, 0xB4 ; 180 + 4364: 58 e3 ldi r21, 0x38 ; 56 + 4366: 69 89 ldd r22, Y+17 ; 0x11 + 4368: 7a 89 ldd r23, Y+18 ; 0x12 + 436a: 8b 89 ldd r24, Y+19 ; 0x13 + 436c: 9c 89 ldd r25, Y+20 ; 0x14 + 436e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4372: 69 8b std Y+17, r22 ; 0x11 + 4374: 7a 8b std Y+18, r23 ; 0x12 + 4376: 8b 8b std Y+19, r24 ; 0x13 + 4378: 9c 8b std Y+20, r25 ; 0x14 + 437a: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start> + 437e: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1> + 4382: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2> + 4386: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3> + 438a: ed 82 std Y+5, r14 ; 0x05 + 438c: fe 82 std Y+6, r15 ; 0x06 + 438e: 0f 83 std Y+7, r16 ; 0x07 + 4390: 18 87 std Y+8, r17 ; 0x08 + 4392: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 + 4396: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 + 439a: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 + 439e: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 + 43a2: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 43a6: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 43aa: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 43ae: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 43b2: ed 8a std Y+21, r14 ; 0x15 + 43b4: fe 8a std Y+22, r15 ; 0x16 + 43b6: 0f 8b std Y+23, r16 ; 0x17 + 43b8: 18 8f std Y+24, r17 ; 0x18 + 43ba: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 43be: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 43c2: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 43c6: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 43ca: c0 90 00 20 lds r12, 0x2000 ; 0x802000 <__data_start> + 43ce: d0 90 01 20 lds r13, 0x2001 ; 0x802001 <__data_start+0x1> + 43d2: e0 90 02 20 lds r14, 0x2002 ; 0x802002 <__data_start+0x2> + 43d6: f0 90 03 20 lds r15, 0x2003 ; 0x802003 <__data_start+0x3> + 43da: c5 01 movw r24, r10 + 43dc: b4 01 movw r22, r8 + 43de: 90 58 subi r25, 0x80 ; 128 + 43e0: 29 85 ldd r18, Y+9 ; 0x09 + 43e2: 3a 85 ldd r19, Y+10 ; 0x0a + 43e4: 4b 85 ldd r20, Y+11 ; 0x0b + 43e6: 5c 85 ldd r21, Y+12 ; 0x0c + 43e8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 43ec: 69 83 std Y+1, r22 ; 0x01 + 43ee: 7a 83 std Y+2, r23 ; 0x02 + 43f0: 8b 83 std Y+3, r24 ; 0x03 + 43f2: 9c 83 std Y+4, r25 ; 0x04 + 43f4: 2d 89 ldd r18, Y+21 ; 0x15 + 43f6: 3e 89 ldd r19, Y+22 ; 0x16 + 43f8: 4f 89 ldd r20, Y+23 ; 0x17 + 43fa: 58 8d ldd r21, Y+24 ; 0x18 + 43fc: 6d 85 ldd r22, Y+13 ; 0x0d + 43fe: 7e 85 ldd r23, Y+14 ; 0x0e + 4400: 8f 85 ldd r24, Y+15 ; 0x0f + 4402: 98 89 ldd r25, Y+16 ; 0x10 + 4404: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4408: 9b 01 movw r18, r22 + 440a: ac 01 movw r20, r24 + 440c: 69 81 ldd r22, Y+1 ; 0x01 + 440e: 7a 81 ldd r23, Y+2 ; 0x02 + 4410: 8b 81 ldd r24, Y+3 ; 0x03 + 4412: 9c 81 ldd r25, Y+4 ; 0x04 + 4414: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4418: 69 83 std Y+1, r22 ; 0x01 + 441a: 7a 83 std Y+2, r23 ; 0x02 + 441c: 8b 83 std Y+3, r24 ; 0x03 + 441e: 9c 83 std Y+4, r25 ; 0x04 + 4420: a3 01 movw r20, r6 + 4422: 92 01 movw r18, r4 + 4424: 69 89 ldd r22, Y+17 ; 0x11 + 4426: 7a 89 ldd r23, Y+18 ; 0x12 + 4428: 8b 89 ldd r24, Y+19 ; 0x13 + 442a: 9c 89 ldd r25, Y+20 ; 0x14 + 442c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4430: 9b 01 movw r18, r22 + 4432: ac 01 movw r20, r24 + 4434: 69 81 ldd r22, Y+1 ; 0x01 + 4436: 7a 81 ldd r23, Y+2 ; 0x02 + 4438: 8b 81 ldd r24, Y+3 ; 0x03 + 443a: 9c 81 ldd r25, Y+4 ; 0x04 + 443c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4440: a7 01 movw r20, r14 + 4442: 96 01 movw r18, r12 + 4444: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4448: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start> + 444c: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1> + 4450: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2> + 4454: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3> + 4458: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 445c: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 4460: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 4464: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 4468: c0 90 a4 24 lds r12, 0x24A4 ; 0x8024a4 + 446c: d0 90 a5 24 lds r13, 0x24A5 ; 0x8024a5 + 4470: e0 90 a6 24 lds r14, 0x24A6 ; 0x8024a6 + 4474: f0 90 a7 24 lds r15, 0x24A7 ; 0x8024a7 + 4478: 2d 81 ldd r18, Y+5 ; 0x05 + 447a: 3e 81 ldd r19, Y+6 ; 0x06 + 447c: 4f 81 ldd r20, Y+7 ; 0x07 + 447e: 58 85 ldd r21, Y+8 ; 0x08 + 4480: 69 85 ldd r22, Y+9 ; 0x09 + 4482: 7a 85 ldd r23, Y+10 ; 0x0a + 4484: 8b 85 ldd r24, Y+11 ; 0x0b + 4486: 9c 85 ldd r25, Y+12 ; 0x0c + 4488: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 448c: 69 83 std Y+1, r22 ; 0x01 + 448e: 7a 83 std Y+2, r23 ; 0x02 + 4490: 8b 83 std Y+3, r24 ; 0x03 + 4492: 9c 83 std Y+4, r25 ; 0x04 + 4494: 2d 89 ldd r18, Y+21 ; 0x15 + 4496: 3e 89 ldd r19, Y+22 ; 0x16 + 4498: 4f 89 ldd r20, Y+23 ; 0x17 + 449a: 58 8d ldd r21, Y+24 ; 0x18 + 449c: 69 89 ldd r22, Y+17 ; 0x11 + 449e: 7a 89 ldd r23, Y+18 ; 0x12 + 44a0: 8b 89 ldd r24, Y+19 ; 0x13 + 44a2: 9c 89 ldd r25, Y+20 ; 0x14 + 44a4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 44a8: 9b 01 movw r18, r22 + 44aa: ac 01 movw r20, r24 + 44ac: 69 81 ldd r22, Y+1 ; 0x01 + 44ae: 7a 81 ldd r23, Y+2 ; 0x02 + 44b0: 8b 81 ldd r24, Y+3 ; 0x03 + 44b2: 9c 81 ldd r25, Y+4 ; 0x04 + 44b4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 44b8: 69 83 std Y+1, r22 ; 0x01 + 44ba: 7a 83 std Y+2, r23 ; 0x02 + 44bc: 8b 83 std Y+3, r24 ; 0x03 + 44be: 9c 83 std Y+4, r25 ; 0x04 + 44c0: a3 01 movw r20, r6 + 44c2: 92 01 movw r18, r4 + 44c4: 6d 85 ldd r22, Y+13 ; 0x0d + 44c6: 7e 85 ldd r23, Y+14 ; 0x0e + 44c8: 8f 85 ldd r24, Y+15 ; 0x0f + 44ca: 98 89 ldd r25, Y+16 ; 0x10 + 44cc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 44d0: 9b 01 movw r18, r22 + 44d2: ac 01 movw r20, r24 + 44d4: 69 81 ldd r22, Y+1 ; 0x01 + 44d6: 7a 81 ldd r23, Y+2 ; 0x02 + 44d8: 8b 81 ldd r24, Y+3 ; 0x03 + 44da: 9c 81 ldd r25, Y+4 ; 0x04 + 44dc: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 44e0: a7 01 movw r20, r14 + 44e2: 96 01 movw r18, r12 + 44e4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 44e8: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 + 44ec: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 + 44f0: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 + 44f4: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 + 44f8: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 44fc: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 4500: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 4504: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 4508: c0 90 a0 24 lds r12, 0x24A0 ; 0x8024a0 + 450c: d0 90 a1 24 lds r13, 0x24A1 ; 0x8024a1 + 4510: e0 90 a2 24 lds r14, 0x24A2 ; 0x8024a2 + 4514: f0 90 a3 24 lds r15, 0x24A3 ; 0x8024a3 + 4518: 2d 81 ldd r18, Y+5 ; 0x05 + 451a: 3e 81 ldd r19, Y+6 ; 0x06 + 451c: 4f 81 ldd r20, Y+7 ; 0x07 + 451e: 58 85 ldd r21, Y+8 ; 0x08 + 4520: 6d 85 ldd r22, Y+13 ; 0x0d + 4522: 7e 85 ldd r23, Y+14 ; 0x0e + 4524: 8f 85 ldd r24, Y+15 ; 0x0f + 4526: 98 89 ldd r25, Y+16 ; 0x10 + 4528: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 452c: 69 83 std Y+1, r22 ; 0x01 + 452e: 7a 83 std Y+2, r23 ; 0x02 + 4530: 8b 83 std Y+3, r24 ; 0x03 + 4532: 9c 83 std Y+4, r25 ; 0x04 + 4534: a5 01 movw r20, r10 + 4536: 94 01 movw r18, r8 + 4538: 69 89 ldd r22, Y+17 ; 0x11 + 453a: 7a 89 ldd r23, Y+18 ; 0x12 + 453c: 8b 89 ldd r24, Y+19 ; 0x13 + 453e: 9c 89 ldd r25, Y+20 ; 0x14 + 4540: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4544: 9b 01 movw r18, r22 + 4546: ac 01 movw r20, r24 + 4548: 69 81 ldd r22, Y+1 ; 0x01 + 454a: 7a 81 ldd r23, Y+2 ; 0x02 + 454c: 8b 81 ldd r24, Y+3 ; 0x03 + 454e: 9c 81 ldd r25, Y+4 ; 0x04 + 4550: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4554: 69 83 std Y+1, r22 ; 0x01 + 4556: 7a 83 std Y+2, r23 ; 0x02 + 4558: 8b 83 std Y+3, r24 ; 0x03 + 455a: 9c 83 std Y+4, r25 ; 0x04 + 455c: a3 01 movw r20, r6 + 455e: 92 01 movw r18, r4 + 4560: 69 85 ldd r22, Y+9 ; 0x09 + 4562: 7a 85 ldd r23, Y+10 ; 0x0a + 4564: 8b 85 ldd r24, Y+11 ; 0x0b + 4566: 9c 85 ldd r25, Y+12 ; 0x0c + 4568: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 456c: 9b 01 movw r18, r22 + 456e: ac 01 movw r20, r24 + 4570: 69 81 ldd r22, Y+1 ; 0x01 + 4572: 7a 81 ldd r23, Y+2 ; 0x02 + 4574: 8b 81 ldd r24, Y+3 ; 0x03 + 4576: 9c 81 ldd r25, Y+4 ; 0x04 + 4578: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 457c: a7 01 movw r20, r14 + 457e: 96 01 movw r18, r12 + 4580: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4584: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 + 4588: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 + 458c: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 + 4590: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 + 4594: c0 90 9c 24 lds r12, 0x249C ; 0x80249c + 4598: d0 90 9d 24 lds r13, 0x249D ; 0x80249d + 459c: e0 90 9e 24 lds r14, 0x249E ; 0x80249e + 45a0: f0 90 9f 24 lds r15, 0x249F ; 0x80249f + 45a4: 2d 81 ldd r18, Y+5 ; 0x05 + 45a6: 3e 81 ldd r19, Y+6 ; 0x06 + 45a8: 4f 81 ldd r20, Y+7 ; 0x07 + 45aa: 58 85 ldd r21, Y+8 ; 0x08 + 45ac: 69 89 ldd r22, Y+17 ; 0x11 + 45ae: 7a 89 ldd r23, Y+18 ; 0x12 + 45b0: 8b 89 ldd r24, Y+19 ; 0x13 + 45b2: 9c 89 ldd r25, Y+20 ; 0x14 + 45b4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 45b8: 2b 01 movw r4, r22 + 45ba: 3c 01 movw r6, r24 + 45bc: a5 01 movw r20, r10 + 45be: 94 01 movw r18, r8 + 45c0: 6d 85 ldd r22, Y+13 ; 0x0d + 45c2: 7e 85 ldd r23, Y+14 ; 0x0e + 45c4: 8f 85 ldd r24, Y+15 ; 0x0f + 45c6: 98 89 ldd r25, Y+16 ; 0x10 + 45c8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 45cc: 9b 01 movw r18, r22 + 45ce: ac 01 movw r20, r24 + 45d0: c3 01 movw r24, r6 + 45d2: b2 01 movw r22, r4 + 45d4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 45d8: 4b 01 movw r8, r22 + 45da: 5c 01 movw r10, r24 + 45dc: 2d 89 ldd r18, Y+21 ; 0x15 + 45de: 3e 89 ldd r19, Y+22 ; 0x16 + 45e0: 4f 89 ldd r20, Y+23 ; 0x17 + 45e2: 58 8d ldd r21, Y+24 ; 0x18 + 45e4: 69 85 ldd r22, Y+9 ; 0x09 + 45e6: 7a 85 ldd r23, Y+10 ; 0x0a + 45e8: 8b 85 ldd r24, Y+11 ; 0x0b + 45ea: 9c 85 ldd r25, Y+12 ; 0x0c + 45ec: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 45f0: 9b 01 movw r18, r22 + 45f2: ac 01 movw r20, r24 + 45f4: c5 01 movw r24, r10 + 45f6: b4 01 movw r22, r8 + 45f8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 45fc: a7 01 movw r20, r14 + 45fe: 96 01 movw r18, r12 + 4600: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4604: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c + 4608: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d + 460c: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e + 4610: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f + 4614: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 4618: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 461c: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 4620: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 4624: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start> + 4628: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1> + 462c: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2> + 4630: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3> + 4634: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 + 4638: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 + 463c: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 + 4640: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 + 4644: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 + 4648: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 + 464c: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 + 4650: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 + 4654: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 4658: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 465c: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 4660: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 4664: e9 86 std Y+9, r14 ; 0x09 + 4666: fa 86 std Y+10, r15 ; 0x0a + 4668: 0b 87 std Y+11, r16 ; 0x0b + 466a: 1c 87 std Y+12, r17 ; 0x0c + 466c: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 4670: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 4674: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 4678: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 467c: ed 86 std Y+13, r14 ; 0x0d + 467e: fe 86 std Y+14, r15 ; 0x0e + 4680: 0f 87 std Y+15, r16 ; 0x0f + 4682: 18 8b std Y+16, r17 ; 0x10 + 4684: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 4688: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 468c: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 4690: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 4694: e9 82 std Y+1, r14 ; 0x01 + 4696: fa 82 std Y+2, r15 ; 0x02 + 4698: 0b 83 std Y+3, r16 ; 0x03 + 469a: 1c 83 std Y+4, r17 ; 0x04 + 469c: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 46a0: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 46a4: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 46a8: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 46ac: e9 8a std Y+17, r14 ; 0x11 + 46ae: fa 8a std Y+18, r15 ; 0x12 + 46b0: 0b 8b std Y+19, r16 ; 0x13 + 46b2: 1c 8b std Y+20, r17 ; 0x14 + 46b4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 46b8: 6b 01 movw r12, r22 + 46ba: 7c 01 movw r14, r24 + 46bc: a3 01 movw r20, r6 + 46be: 92 01 movw r18, r4 + 46c0: c5 01 movw r24, r10 + 46c2: b4 01 movw r22, r8 + 46c4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 46c8: 9b 01 movw r18, r22 + 46ca: ac 01 movw r20, r24 + 46cc: c7 01 movw r24, r14 + 46ce: b6 01 movw r22, r12 + 46d0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 46d4: 4b 01 movw r8, r22 + 46d6: 5c 01 movw r10, r24 + 46d8: 2d 85 ldd r18, Y+13 ; 0x0d + 46da: 3e 85 ldd r19, Y+14 ; 0x0e + 46dc: 4f 85 ldd r20, Y+15 ; 0x0f + 46de: 58 89 ldd r21, Y+16 ; 0x10 + 46e0: 69 85 ldd r22, Y+9 ; 0x09 + 46e2: 7a 85 ldd r23, Y+10 ; 0x0a + 46e4: 8b 85 ldd r24, Y+11 ; 0x0b + 46e6: 9c 85 ldd r25, Y+12 ; 0x0c + 46e8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 46ec: 9b 01 movw r18, r22 + 46ee: ac 01 movw r20, r24 + 46f0: c5 01 movw r24, r10 + 46f2: b4 01 movw r22, r8 + 46f4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 46f8: 4b 01 movw r8, r22 + 46fa: 5c 01 movw r10, r24 + 46fc: 29 89 ldd r18, Y+17 ; 0x11 + 46fe: 3a 89 ldd r19, Y+18 ; 0x12 + 4700: 4b 89 ldd r20, Y+19 ; 0x13 + 4702: 5c 89 ldd r21, Y+20 ; 0x14 + 4704: 69 81 ldd r22, Y+1 ; 0x01 + 4706: 7a 81 ldd r23, Y+2 ; 0x02 + 4708: 8b 81 ldd r24, Y+3 ; 0x03 + 470a: 9c 81 ldd r25, Y+4 ; 0x04 + 470c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4710: 9b 01 movw r18, r22 + 4712: ac 01 movw r20, r24 + 4714: c5 01 movw r24, r10 + 4716: b4 01 movw r22, r8 + 4718: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 471c: 4b 01 movw r8, r22 + 471e: 5c 01 movw r10, r24 + 4720: b5 94 asr r11 + 4722: a7 94 ror r10 + 4724: 97 94 ror r9 + 4726: 87 94 ror r8 + 4728: 0f 2e mov r0, r31 + 472a: ff ed ldi r31, 0xDF ; 223 + 472c: cf 2e mov r12, r31 + 472e: f9 e5 ldi r31, 0x59 ; 89 + 4730: df 2e mov r13, r31 + 4732: f7 e3 ldi r31, 0x37 ; 55 + 4734: ef 2e mov r14, r31 + 4736: ff e5 ldi r31, 0x5F ; 95 + 4738: ff 2e mov r15, r31 + 473a: f0 2d mov r31, r0 + 473c: c8 18 sub r12, r8 + 473e: d9 08 sbc r13, r9 + 4740: ea 08 sbc r14, r10 + 4742: fb 08 sbc r15, r11 + 4744: 20 e0 ldi r18, 0x00 ; 0 + 4746: 30 e0 ldi r19, 0x00 ; 0 + 4748: 40 e0 ldi r20, 0x00 ; 0 + 474a: 5f e3 ldi r21, 0x3F ; 63 + 474c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4750: a7 01 movw r20, r14 + 4752: 96 01 movw r18, r12 + 4754: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4758: a7 01 movw r20, r14 + 475a: 96 01 movw r18, r12 + 475c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4760: 9b 01 movw r18, r22 + 4762: ac 01 movw r20, r24 + 4764: 60 e0 ldi r22, 0x00 ; 0 + 4766: 70 e0 ldi r23, 0x00 ; 0 + 4768: 80 ec ldi r24, 0xC0 ; 192 + 476a: 9f e3 ldi r25, 0x3F ; 63 + 476c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4770: a7 01 movw r20, r14 + 4772: 96 01 movw r18, r12 + 4774: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4778: 6b 01 movw r12, r22 + 477a: 7c 01 movw r14, r24 + 477c: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 4780: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 4784: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 4788: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 478c: a7 01 movw r20, r14 + 478e: 96 01 movw r18, r12 + 4790: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4794: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start> + 4798: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1> + 479c: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2> + 47a0: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3> + 47a4: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 + 47a8: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 + 47ac: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 + 47b0: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 + 47b4: a7 01 movw r20, r14 + 47b6: 96 01 movw r18, r12 + 47b8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 47bc: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 + 47c0: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 + 47c4: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 + 47c8: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 + 47cc: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 + 47d0: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 + 47d4: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 + 47d8: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 + 47dc: a7 01 movw r20, r14 + 47de: 96 01 movw r18, r12 + 47e0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 47e4: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 + 47e8: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 + 47ec: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 + 47f0: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 + 47f4: 60 91 9c 24 lds r22, 0x249C ; 0x80249c + 47f8: 70 91 9d 24 lds r23, 0x249D ; 0x80249d + 47fc: 80 91 9e 24 lds r24, 0x249E ; 0x80249e + 4800: 90 91 9f 24 lds r25, 0x249F ; 0x80249f + 4804: a7 01 movw r20, r14 + 4806: 96 01 movw r18, r12 + 4808: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 480c: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c + 4810: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d + 4814: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e + 4818: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f + 481c: a4 96 adiw r28, 0x24 ; 36 + 481e: cd bf out 0x3d, r28 ; 61 + 4820: de bf out 0x3e, r29 ; 62 + 4822: df 91 pop r29 + 4824: cf 91 pop r28 + 4826: 1f 91 pop r17 + 4828: 0f 91 pop r16 + 482a: ff 90 pop r15 + 482c: ef 90 pop r14 + 482e: df 90 pop r13 + 4830: cf 90 pop r12 + 4832: bf 90 pop r11 + 4834: af 90 pop r10 + 4836: 9f 90 pop r9 + 4838: 8f 90 pop r8 + 483a: 7f 90 pop r7 + 483c: 6f 90 pop r6 + 483e: 5f 90 pop r5 + 4840: 4f 90 pop r4 + 4842: 08 95 ret + +00004844 : + 4844: 2f 92 push r2 + 4846: 3f 92 push r3 + 4848: 4f 92 push r4 + 484a: 5f 92 push r5 + 484c: 6f 92 push r6 + 484e: 7f 92 push r7 + 4850: 8f 92 push r8 + 4852: 9f 92 push r9 + 4854: af 92 push r10 + 4856: bf 92 push r11 + 4858: cf 92 push r12 + 485a: df 92 push r13 + 485c: ef 92 push r14 + 485e: ff 92 push r15 + 4860: 0f 93 push r16 + 4862: 1f 93 push r17 + 4864: cf 93 push r28 + 4866: df 93 push r29 + 4868: cd b7 in r28, 0x3d ; 61 + 486a: de b7 in r29, 0x3e ; 62 + 486c: c8 55 subi r28, 0x58 ; 88 + 486e: d1 09 sbc r29, r1 + 4870: cd bf out 0x3d, r28 ; 61 + 4872: de bf out 0x3e, r29 ; 62 + 4874: 69 8b std Y+17, r22 ; 0x11 + 4876: 7a 8b std Y+18, r23 ; 0x12 + 4878: 8b 8b std Y+19, r24 ; 0x13 + 487a: 9c 8b std Y+20, r25 ; 0x14 + 487c: 29 8f std Y+25, r18 ; 0x19 + 487e: 3a 8f std Y+26, r19 ; 0x1a + 4880: 4b 8f std Y+27, r20 ; 0x1b + 4882: 5c 8f std Y+28, r21 ; 0x1c + 4884: e9 82 std Y+1, r14 ; 0x01 + 4886: fa 82 std Y+2, r15 ; 0x02 + 4888: 0b 83 std Y+3, r16 ; 0x03 + 488a: 1c 83 std Y+4, r17 ; 0x04 + 488c: af 96 adiw r28, 0x2f ; 47 + 488e: ff ac ldd r15, Y+63 ; 0x3f + 4890: af 97 sbiw r28, 0x2f ; 47 + 4892: e0 96 adiw r28, 0x30 ; 48 + 4894: ef ac ldd r14, Y+63 ; 0x3f + 4896: e0 97 sbiw r28, 0x30 ; 48 + 4898: e1 96 adiw r28, 0x31 ; 49 + 489a: 9f ac ldd r9, Y+63 ; 0x3f + 489c: e1 97 sbiw r28, 0x31 ; 49 + 489e: e2 96 adiw r28, 0x32 ; 50 + 48a0: 8f ac ldd r8, Y+63 ; 0x3f + 48a2: e2 97 sbiw r28, 0x32 ; 50 + 48a4: e3 96 adiw r28, 0x33 ; 51 + 48a6: 1f ad ldd r17, Y+63 ; 0x3f + 48a8: e3 97 sbiw r28, 0x33 ; 51 + 48aa: e4 96 adiw r28, 0x34 ; 52 + 48ac: 0f ad ldd r16, Y+63 ; 0x3f + 48ae: e4 97 sbiw r28, 0x34 ; 52 + 48b0: e5 96 adiw r28, 0x35 ; 53 + 48b2: 3f ac ldd r3, Y+63 ; 0x3f + 48b4: e5 97 sbiw r28, 0x35 ; 53 + 48b6: e6 96 adiw r28, 0x36 ; 54 + 48b8: 2f ac ldd r2, Y+63 ; 0x3f + 48ba: e6 97 sbiw r28, 0x36 ; 54 + 48bc: 20 e0 ldi r18, 0x00 ; 0 + 48be: 30 e0 ldi r19, 0x00 ; 0 + 48c0: a9 01 movw r20, r18 + 48c2: ea 96 adiw r28, 0x3a ; 58 + 48c4: 6c ad ldd r22, Y+60 ; 0x3c + 48c6: 7d ad ldd r23, Y+61 ; 0x3d + 48c8: 8e ad ldd r24, Y+62 ; 0x3e + 48ca: 9f ad ldd r25, Y+63 ; 0x3f + 48cc: ea 97 sbiw r28, 0x3a ; 58 + 48ce: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 48d2: 81 11 cpse r24, r1 + 48d4: 35 c0 rjmp .+106 ; 0x4940 + 48d6: 20 e0 ldi r18, 0x00 ; 0 + 48d8: 30 e0 ldi r19, 0x00 ; 0 + 48da: a9 01 movw r20, r18 + 48dc: ee 96 adiw r28, 0x3e ; 62 + 48de: 6c ad ldd r22, Y+60 ; 0x3c + 48e0: 7d ad ldd r23, Y+61 ; 0x3d + 48e2: 8e ad ldd r24, Y+62 ; 0x3e + 48e4: 9f ad ldd r25, Y+63 ; 0x3f + 48e6: ee 97 sbiw r28, 0x3e ; 62 + 48e8: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 48ec: 81 11 cpse r24, r1 + 48ee: 28 c0 rjmp .+80 ; 0x4940 + 48f0: 20 e0 ldi r18, 0x00 ; 0 + 48f2: 30 e0 ldi r19, 0x00 ; 0 + 48f4: a9 01 movw r20, r18 + 48f6: c2 58 subi r28, 0x82 ; 130 + 48f8: df 4f sbci r29, 0xFF ; 255 + 48fa: 68 81 ld r22, Y + 48fc: 79 81 ldd r23, Y+1 ; 0x01 + 48fe: 8a 81 ldd r24, Y+2 ; 0x02 + 4900: 9b 81 ldd r25, Y+3 ; 0x03 + 4902: ce 57 subi r28, 0x7E ; 126 + 4904: d0 40 sbci r29, 0x00 ; 0 + 4906: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 490a: 81 11 cpse r24, r1 + 490c: 19 c0 rjmp .+50 ; 0x4940 + 490e: 2f 92 push r2 + 4910: 3f 92 push r3 + 4912: 0f 93 push r16 + 4914: 1f 93 push r17 + 4916: 8f 92 push r8 + 4918: 9f 92 push r9 + 491a: ef 92 push r14 + 491c: ff 92 push r15 + 491e: e9 80 ldd r14, Y+1 ; 0x01 + 4920: fa 80 ldd r15, Y+2 ; 0x02 + 4922: 0b 81 ldd r16, Y+3 ; 0x03 + 4924: 1c 81 ldd r17, Y+4 ; 0x04 + 4926: 29 8d ldd r18, Y+25 ; 0x19 + 4928: 3a 8d ldd r19, Y+26 ; 0x1a + 492a: 4b 8d ldd r20, Y+27 ; 0x1b + 492c: 5c 8d ldd r21, Y+28 ; 0x1c + 492e: 69 89 ldd r22, Y+17 ; 0x11 + 4930: 7a 89 ldd r23, Y+18 ; 0x12 + 4932: 8b 89 ldd r24, Y+19 ; 0x13 + 4934: 9c 89 ldd r25, Y+20 ; 0x14 + 4936: 2d da rcall .-2982 ; 0x3d92 + 4938: cd bf out 0x3d, r28 ; 61 + 493a: de bf out 0x3e, r29 ; 62 + 493c: 0c 94 b3 2c jmp 0x5966 ; 0x5966 + 4940: 20 e0 ldi r18, 0x00 ; 0 + 4942: 30 e0 ldi r19, 0x00 ; 0 + 4944: a9 01 movw r20, r18 + 4946: c6 01 movw r24, r12 + 4948: b5 01 movw r22, r10 + 494a: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 494e: 81 11 cpse r24, r1 + 4950: 17 c0 rjmp .+46 ; 0x4980 + 4952: 20 e0 ldi r18, 0x00 ; 0 + 4954: 30 e0 ldi r19, 0x00 ; 0 + 4956: a9 01 movw r20, r18 + 4958: 6f 2d mov r22, r15 + 495a: 7e 2d mov r23, r14 + 495c: 89 2d mov r24, r9 + 495e: 98 2d mov r25, r8 + 4960: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 4964: 81 11 cpse r24, r1 + 4966: 0c c0 rjmp .+24 ; 0x4980 + 4968: 20 e0 ldi r18, 0x00 ; 0 + 496a: 30 e0 ldi r19, 0x00 ; 0 + 496c: a9 01 movw r20, r18 + 496e: 61 2f mov r22, r17 + 4970: 70 2f mov r23, r16 + 4972: 83 2d mov r24, r3 + 4974: 92 2d mov r25, r2 + 4976: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2> + 497a: 88 23 and r24, r24 + 497c: 09 f4 brne .+2 ; 0x4980 + 497e: 89 c5 rjmp .+2834 ; 0x5492 + 4980: a6 01 movw r20, r12 + 4982: 95 01 movw r18, r10 + 4984: c6 01 movw r24, r12 + 4986: b5 01 movw r22, r10 + 4988: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 498c: 2b 01 movw r4, r22 + 498e: 3c 01 movw r6, r24 + 4990: 2f 2d mov r18, r15 + 4992: 3e 2d mov r19, r14 + 4994: 49 2d mov r20, r9 + 4996: 58 2d mov r21, r8 + 4998: 6f 2d mov r22, r15 + 499a: 7e 2d mov r23, r14 + 499c: 89 2d mov r24, r9 + 499e: 98 2d mov r25, r8 + 49a0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 49a4: 9b 01 movw r18, r22 + 49a6: ac 01 movw r20, r24 + 49a8: c3 01 movw r24, r6 + 49aa: b2 01 movw r22, r4 + 49ac: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 49b0: 2b 01 movw r4, r22 + 49b2: 3c 01 movw r6, r24 + 49b4: 21 2f mov r18, r17 + 49b6: 30 2f mov r19, r16 + 49b8: 43 2d mov r20, r3 + 49ba: 52 2d mov r21, r2 + 49bc: 61 2f mov r22, r17 + 49be: 70 2f mov r23, r16 + 49c0: 83 2d mov r24, r3 + 49c2: 92 2d mov r25, r2 + 49c4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 49c8: 9b 01 movw r18, r22 + 49ca: ac 01 movw r20, r24 + 49cc: c3 01 movw r24, r6 + 49ce: b2 01 movw r22, r4 + 49d0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 49d4: 2b 01 movw r4, r22 + 49d6: 3c 01 movw r6, r24 + 49d8: 75 94 asr r7 + 49da: 67 94 ror r6 + 49dc: 57 94 ror r5 + 49de: 47 94 ror r4 + 49e0: 2f ed ldi r18, 0xDF ; 223 + 49e2: 39 e5 ldi r19, 0x59 ; 89 + 49e4: 47 e3 ldi r20, 0x37 ; 55 + 49e6: 5f e5 ldi r21, 0x5F ; 95 + 49e8: 24 19 sub r18, r4 + 49ea: 35 09 sbc r19, r5 + 49ec: 46 09 sbc r20, r6 + 49ee: 57 09 sbc r21, r7 + 49f0: 29 01 movw r4, r18 + 49f2: 3a 01 movw r6, r20 + 49f4: 20 e0 ldi r18, 0x00 ; 0 + 49f6: 30 e0 ldi r19, 0x00 ; 0 + 49f8: 40 e0 ldi r20, 0x00 ; 0 + 49fa: 5f e3 ldi r21, 0x3F ; 63 + 49fc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a00: a3 01 movw r20, r6 + 4a02: 92 01 movw r18, r4 + 4a04: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a08: a3 01 movw r20, r6 + 4a0a: 92 01 movw r18, r4 + 4a0c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a10: 9b 01 movw r18, r22 + 4a12: ac 01 movw r20, r24 + 4a14: 60 e0 ldi r22, 0x00 ; 0 + 4a16: 70 e0 ldi r23, 0x00 ; 0 + 4a18: 80 ec ldi r24, 0xC0 ; 192 + 4a1a: 9f e3 ldi r25, 0x3F ; 63 + 4a1c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4a20: a3 01 movw r20, r6 + 4a22: 92 01 movw r18, r4 + 4a24: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a28: 2b 01 movw r4, r22 + 4a2a: 3c 01 movw r6, r24 + 4a2c: 9b 01 movw r18, r22 + 4a2e: ac 01 movw r20, r24 + 4a30: c6 01 movw r24, r12 + 4a32: b5 01 movw r22, r10 + 4a34: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a38: 6d ab std Y+53, r22 ; 0x35 + 4a3a: 7e ab std Y+54, r23 ; 0x36 + 4a3c: 8f ab std Y+55, r24 ; 0x37 + 4a3e: 98 af std Y+56, r25 ; 0x38 + 4a40: a3 01 movw r20, r6 + 4a42: 92 01 movw r18, r4 + 4a44: 6f 2d mov r22, r15 + 4a46: 7e 2d mov r23, r14 + 4a48: 89 2d mov r24, r9 + 4a4a: 98 2d mov r25, r8 + 4a4c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a50: 69 af std Y+57, r22 ; 0x39 + 4a52: 7a af std Y+58, r23 ; 0x3a + 4a54: 8b af std Y+59, r24 ; 0x3b + 4a56: 9c af std Y+60, r25 ; 0x3c + 4a58: a3 01 movw r20, r6 + 4a5a: 92 01 movw r18, r4 + 4a5c: 61 2f mov r22, r17 + 4a5e: 70 2f mov r23, r16 + 4a60: 83 2d mov r24, r3 + 4a62: 92 2d mov r25, r2 + 4a64: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a68: 21 96 adiw r28, 0x01 ; 1 + 4a6a: 6c af std Y+60, r22 ; 0x3c + 4a6c: 7d af std Y+61, r23 ; 0x3d + 4a6e: 8e af std Y+62, r24 ; 0x3e + 4a70: 9f af std Y+63, r25 ; 0x3f + 4a72: 21 97 sbiw r28, 0x01 ; 1 + 4a74: ea 96 adiw r28, 0x3a ; 58 + 4a76: 2c ad ldd r18, Y+60 ; 0x3c + 4a78: 3d ad ldd r19, Y+61 ; 0x3d + 4a7a: 4e ad ldd r20, Y+62 ; 0x3e + 4a7c: 5f ad ldd r21, Y+63 ; 0x3f + 4a7e: ea 97 sbiw r28, 0x3a ; 58 + 4a80: ca 01 movw r24, r20 + 4a82: b9 01 movw r22, r18 + 4a84: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4a88: 6b 01 movw r12, r22 + 4a8a: 7c 01 movw r14, r24 + 4a8c: ee 96 adiw r28, 0x3e ; 62 + 4a8e: 2c ad ldd r18, Y+60 ; 0x3c + 4a90: 3d ad ldd r19, Y+61 ; 0x3d + 4a92: 4e ad ldd r20, Y+62 ; 0x3e + 4a94: 5f ad ldd r21, Y+63 ; 0x3f + 4a96: ee 97 sbiw r28, 0x3e ; 62 + 4a98: ca 01 movw r24, r20 + 4a9a: b9 01 movw r22, r18 + 4a9c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4aa0: 9b 01 movw r18, r22 + 4aa2: ac 01 movw r20, r24 + 4aa4: c7 01 movw r24, r14 + 4aa6: b6 01 movw r22, r12 + 4aa8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4aac: 6b 01 movw r12, r22 + 4aae: 7c 01 movw r14, r24 + 4ab0: c2 58 subi r28, 0x82 ; 130 + 4ab2: df 4f sbci r29, 0xFF ; 255 + 4ab4: 28 81 ld r18, Y + 4ab6: 39 81 ldd r19, Y+1 ; 0x01 + 4ab8: 4a 81 ldd r20, Y+2 ; 0x02 + 4aba: 5b 81 ldd r21, Y+3 ; 0x03 + 4abc: ce 57 subi r28, 0x7E ; 126 + 4abe: d0 40 sbci r29, 0x00 ; 0 + 4ac0: ca 01 movw r24, r20 + 4ac2: b9 01 movw r22, r18 + 4ac4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4ac8: 9b 01 movw r18, r22 + 4aca: ac 01 movw r20, r24 + 4acc: c7 01 movw r24, r14 + 4ace: b6 01 movw r22, r12 + 4ad0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4ad4: 8b 01 movw r16, r22 + 4ad6: 9c 01 movw r18, r24 + 4ad8: 35 95 asr r19 + 4ada: 27 95 ror r18 + 4adc: 17 95 ror r17 + 4ade: 07 95 ror r16 + 4ae0: 0f 2e mov r0, r31 + 4ae2: ff ed ldi r31, 0xDF ; 223 + 4ae4: cf 2e mov r12, r31 + 4ae6: f9 e5 ldi r31, 0x59 ; 89 + 4ae8: df 2e mov r13, r31 + 4aea: f7 e3 ldi r31, 0x37 ; 55 + 4aec: ef 2e mov r14, r31 + 4aee: ff e5 ldi r31, 0x5F ; 95 + 4af0: ff 2e mov r15, r31 + 4af2: f0 2d mov r31, r0 + 4af4: c0 1a sub r12, r16 + 4af6: d1 0a sbc r13, r17 + 4af8: e2 0a sbc r14, r18 + 4afa: f3 0a sbc r15, r19 + 4afc: 20 e0 ldi r18, 0x00 ; 0 + 4afe: 30 e0 ldi r19, 0x00 ; 0 + 4b00: 40 e0 ldi r20, 0x00 ; 0 + 4b02: 5f e3 ldi r21, 0x3F ; 63 + 4b04: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b08: a7 01 movw r20, r14 + 4b0a: 96 01 movw r18, r12 + 4b0c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b10: a7 01 movw r20, r14 + 4b12: 96 01 movw r18, r12 + 4b14: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b18: 9b 01 movw r18, r22 + 4b1a: ac 01 movw r20, r24 + 4b1c: 60 e0 ldi r22, 0x00 ; 0 + 4b1e: 70 e0 ldi r23, 0x00 ; 0 + 4b20: 80 ec ldi r24, 0xC0 ; 192 + 4b22: 9f e3 ldi r25, 0x3F ; 63 + 4b24: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4b28: a7 01 movw r20, r14 + 4b2a: 96 01 movw r18, r12 + 4b2c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b30: 6b 01 movw r12, r22 + 4b32: 7c 01 movw r14, r24 + 4b34: 9b 01 movw r18, r22 + 4b36: ac 01 movw r20, r24 + 4b38: ea 96 adiw r28, 0x3a ; 58 + 4b3a: 6c ad ldd r22, Y+60 ; 0x3c + 4b3c: 7d ad ldd r23, Y+61 ; 0x3d + 4b3e: 8e ad ldd r24, Y+62 ; 0x3e + 4b40: 9f ad ldd r25, Y+63 ; 0x3f + 4b42: ea 97 sbiw r28, 0x3a ; 58 + 4b44: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b48: 6d 83 std Y+5, r22 ; 0x05 + 4b4a: 7e 83 std Y+6, r23 ; 0x06 + 4b4c: 8f 83 std Y+7, r24 ; 0x07 + 4b4e: 98 87 std Y+8, r25 ; 0x08 + 4b50: a7 01 movw r20, r14 + 4b52: 96 01 movw r18, r12 + 4b54: ee 96 adiw r28, 0x3e ; 62 + 4b56: 6c ad ldd r22, Y+60 ; 0x3c + 4b58: 7d ad ldd r23, Y+61 ; 0x3d + 4b5a: 8e ad ldd r24, Y+62 ; 0x3e + 4b5c: 9f ad ldd r25, Y+63 ; 0x3f + 4b5e: ee 97 sbiw r28, 0x3e ; 62 + 4b60: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b64: 69 87 std Y+9, r22 ; 0x09 + 4b66: 7a 87 std Y+10, r23 ; 0x0a + 4b68: 8b 87 std Y+11, r24 ; 0x0b + 4b6a: 9c 87 std Y+12, r25 ; 0x0c + 4b6c: a7 01 movw r20, r14 + 4b6e: 96 01 movw r18, r12 + 4b70: c2 58 subi r28, 0x82 ; 130 + 4b72: df 4f sbci r29, 0xFF ; 255 + 4b74: 68 81 ld r22, Y + 4b76: 79 81 ldd r23, Y+1 ; 0x01 + 4b78: 8a 81 ldd r24, Y+2 ; 0x02 + 4b7a: 9b 81 ldd r25, Y+3 ; 0x03 + 4b7c: ce 57 subi r28, 0x7E ; 126 + 4b7e: d0 40 sbci r29, 0x00 ; 0 + 4b80: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4b84: 6d 87 std Y+13, r22 ; 0x0d + 4b86: 7e 87 std Y+14, r23 ; 0x0e + 4b88: 8f 87 std Y+15, r24 ; 0x0f + 4b8a: 98 8b std Y+16, r25 ; 0x10 + 4b8c: 40 90 00 20 lds r4, 0x2000 ; 0x802000 <__data_start> + 4b90: 50 90 01 20 lds r5, 0x2001 ; 0x802001 <__data_start+0x1> + 4b94: 60 90 02 20 lds r6, 0x2002 ; 0x802002 <__data_start+0x2> + 4b98: 70 90 03 20 lds r7, 0x2003 ; 0x802003 <__data_start+0x3> + 4b9c: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start> + 4ba0: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1> + 4ba4: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2> + 4ba8: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3> + 4bac: 69 96 adiw r28, 0x19 ; 25 + 4bae: ec ae std Y+60, r14 ; 0x3c + 4bb0: fd ae std Y+61, r15 ; 0x3d + 4bb2: 0e af std Y+62, r16 ; 0x3e + 4bb4: 1f af std Y+63, r17 ; 0x3f + 4bb6: 69 97 sbiw r28, 0x19 ; 25 + 4bb8: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 4bbc: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 4bc0: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 4bc4: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 4bc8: 20 91 a4 24 lds r18, 0x24A4 ; 0x8024a4 + 4bcc: 30 91 a5 24 lds r19, 0x24A5 ; 0x8024a5 + 4bd0: 40 91 a6 24 lds r20, 0x24A6 ; 0x8024a6 + 4bd4: 50 91 a7 24 lds r21, 0x24A7 ; 0x8024a7 + 4bd8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4bdc: 69 a3 std Y+33, r22 ; 0x21 + 4bde: 7a a3 std Y+34, r23 ; 0x22 + 4be0: 8b a3 std Y+35, r24 ; 0x23 + 4be2: 9c a3 std Y+36, r25 ; 0x24 + 4be4: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 4be8: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 4bec: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 4bf0: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 4bf4: 20 91 a0 24 lds r18, 0x24A0 ; 0x8024a0 + 4bf8: 30 91 a1 24 lds r19, 0x24A1 ; 0x8024a1 + 4bfc: 40 91 a2 24 lds r20, 0x24A2 ; 0x8024a2 + 4c00: 50 91 a3 24 lds r21, 0x24A3 ; 0x8024a3 + 4c04: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4c08: 6d 8f std Y+29, r22 ; 0x1d + 4c0a: 7e 8f std Y+30, r23 ; 0x1e + 4c0c: 8f 8f std Y+31, r24 ; 0x1f + 4c0e: 98 a3 std Y+32, r25 ; 0x20 + 4c10: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 4c14: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 4c18: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 4c1c: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 4c20: 20 91 9c 24 lds r18, 0x249C ; 0x80249c + 4c24: 30 91 9d 24 lds r19, 0x249D ; 0x80249d + 4c28: 40 91 9e 24 lds r20, 0x249E ; 0x80249e + 4c2c: 50 91 9f 24 lds r21, 0x249F ; 0x80249f + 4c30: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4c34: 6d 8b std Y+21, r22 ; 0x15 + 4c36: 7e 8b std Y+22, r23 ; 0x16 + 4c38: 8f 8b std Y+23, r24 ; 0x17 + 4c3a: 98 8f std Y+24, r25 ; 0x18 + 4c3c: c0 90 a4 24 lds r12, 0x24A4 ; 0x8024a4 + 4c40: d0 90 a5 24 lds r13, 0x24A5 ; 0x8024a5 + 4c44: e0 90 a6 24 lds r14, 0x24A6 ; 0x8024a6 + 4c48: f0 90 a7 24 lds r15, 0x24A7 ; 0x8024a7 + 4c4c: 00 91 a4 24 lds r16, 0x24A4 ; 0x8024a4 + 4c50: 10 91 a5 24 lds r17, 0x24A5 ; 0x8024a5 + 4c54: 20 91 a6 24 lds r18, 0x24A6 ; 0x8024a6 + 4c58: 30 91 a7 24 lds r19, 0x24A7 ; 0x8024a7 + 4c5c: 09 ab std Y+49, r16 ; 0x31 + 4c5e: 1a ab std Y+50, r17 ; 0x32 + 4c60: 2b ab std Y+51, r18 ; 0x33 + 4c62: 3c ab std Y+52, r19 ; 0x34 + 4c64: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 + 4c68: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 + 4c6c: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 + 4c70: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 + 4c74: 20 91 a0 24 lds r18, 0x24A0 ; 0x8024a0 + 4c78: 30 91 a1 24 lds r19, 0x24A1 ; 0x8024a1 + 4c7c: 40 91 a2 24 lds r20, 0x24A2 ; 0x8024a2 + 4c80: 50 91 a3 24 lds r21, 0x24A3 ; 0x8024a3 + 4c84: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4c88: 69 a7 std Y+41, r22 ; 0x29 + 4c8a: 7a a7 std Y+42, r23 ; 0x2a + 4c8c: 8b a7 std Y+43, r24 ; 0x2b + 4c8e: 9c a7 std Y+44, r25 ; 0x2c + 4c90: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 + 4c94: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 + 4c98: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 + 4c9c: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 + 4ca0: 20 91 9c 24 lds r18, 0x249C ; 0x80249c + 4ca4: 30 91 9d 24 lds r19, 0x249D ; 0x80249d + 4ca8: 40 91 9e 24 lds r20, 0x249E ; 0x80249e + 4cac: 50 91 9f 24 lds r21, 0x249F ; 0x80249f + 4cb0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4cb4: 6d a7 std Y+45, r22 ; 0x2d + 4cb6: 7e a7 std Y+46, r23 ; 0x2e + 4cb8: 8f a7 std Y+47, r24 ; 0x2f + 4cba: 98 ab std Y+48, r25 ; 0x30 + 4cbc: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 + 4cc0: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 + 4cc4: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 + 4cc8: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 + 4ccc: 20 91 a0 24 lds r18, 0x24A0 ; 0x8024a0 + 4cd0: 30 91 a1 24 lds r19, 0x24A1 ; 0x8024a1 + 4cd4: 40 91 a2 24 lds r20, 0x24A2 ; 0x8024a2 + 4cd8: 50 91 a3 24 lds r21, 0x24A3 ; 0x8024a3 + 4cdc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4ce0: 25 96 adiw r28, 0x05 ; 5 + 4ce2: 6c af std Y+60, r22 ; 0x3c + 4ce4: 7d af std Y+61, r23 ; 0x3d + 4ce6: 8e af std Y+62, r24 ; 0x3e + 4ce8: 9f af std Y+63, r25 ; 0x3f + 4cea: 25 97 sbiw r28, 0x05 ; 5 + 4cec: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 + 4cf0: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 + 4cf4: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 + 4cf8: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 + 4cfc: 20 91 9c 24 lds r18, 0x249C ; 0x80249c + 4d00: 30 91 9d 24 lds r19, 0x249D ; 0x80249d + 4d04: 40 91 9e 24 lds r20, 0x249E ; 0x80249e + 4d08: 50 91 9f 24 lds r21, 0x249F ; 0x80249f + 4d0c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4d10: 29 96 adiw r28, 0x09 ; 9 + 4d12: 6c af std Y+60, r22 ; 0x3c + 4d14: 7d af std Y+61, r23 ; 0x3d + 4d16: 8e af std Y+62, r24 ; 0x3e + 4d18: 9f af std Y+63, r25 ; 0x3f + 4d1a: 29 97 sbiw r28, 0x09 ; 9 + 4d1c: 60 91 9c 24 lds r22, 0x249C ; 0x80249c + 4d20: 70 91 9d 24 lds r23, 0x249D ; 0x80249d + 4d24: 80 91 9e 24 lds r24, 0x249E ; 0x80249e + 4d28: 90 91 9f 24 lds r25, 0x249F ; 0x80249f + 4d2c: 20 91 9c 24 lds r18, 0x249C ; 0x80249c + 4d30: 30 91 9d 24 lds r19, 0x249D ; 0x80249d + 4d34: 40 91 9e 24 lds r20, 0x249E ; 0x80249e + 4d38: 50 91 9f 24 lds r21, 0x249F ; 0x80249f + 4d3c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4d40: 6d a3 std Y+37, r22 ; 0x25 + 4d42: 7e a3 std Y+38, r23 ; 0x26 + 4d44: 8f a3 std Y+39, r24 ; 0x27 + 4d46: 98 a7 std Y+40, r25 ; 0x28 + 4d48: 25 96 adiw r28, 0x05 ; 5 + 4d4a: 2c ad ldd r18, Y+60 ; 0x3c + 4d4c: 3d ad ldd r19, Y+61 ; 0x3d + 4d4e: 4e ad ldd r20, Y+62 ; 0x3e + 4d50: 5f ad ldd r21, Y+63 ; 0x3f + 4d52: 25 97 sbiw r28, 0x05 ; 5 + 4d54: 60 e0 ldi r22, 0x00 ; 0 + 4d56: 70 e0 ldi r23, 0x00 ; 0 + 4d58: 80 e0 ldi r24, 0x00 ; 0 + 4d5a: 9f e3 ldi r25, 0x3F ; 63 + 4d5c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4d60: 2d a1 ldd r18, Y+37 ; 0x25 + 4d62: 3e a1 ldd r19, Y+38 ; 0x26 + 4d64: 4f a1 ldd r20, Y+39 ; 0x27 + 4d66: 58 a5 ldd r21, Y+40 ; 0x28 + 4d68: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4d6c: 2d 96 adiw r28, 0x0d ; 13 + 4d6e: 6c af std Y+60, r22 ; 0x3c + 4d70: 7d af std Y+61, r23 ; 0x3d + 4d72: 8e af std Y+62, r24 ; 0x3e + 4d74: 9f af std Y+63, r25 ; 0x3f + 4d76: 2d 97 sbiw r28, 0x0d ; 13 + 4d78: 2d 89 ldd r18, Y+21 ; 0x15 + 4d7a: 3e 89 ldd r19, Y+22 ; 0x16 + 4d7c: 4f 89 ldd r20, Y+23 ; 0x17 + 4d7e: 58 8d ldd r21, Y+24 ; 0x18 + 4d80: 69 a5 ldd r22, Y+41 ; 0x29 + 4d82: 7a a5 ldd r23, Y+42 ; 0x2a + 4d84: 8b a5 ldd r24, Y+43 ; 0x2b + 4d86: 9c a5 ldd r25, Y+44 ; 0x2c + 4d88: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4d8c: 61 96 adiw r28, 0x11 ; 17 + 4d8e: 6c af std Y+60, r22 ; 0x3c + 4d90: 7d af std Y+61, r23 ; 0x3d + 4d92: 8e af std Y+62, r24 ; 0x3e + 4d94: 9f af std Y+63, r25 ; 0x3f + 4d96: 61 97 sbiw r28, 0x11 ; 17 + 4d98: 2d a5 ldd r18, Y+45 ; 0x2d + 4d9a: 3e a5 ldd r19, Y+46 ; 0x2e + 4d9c: 4f a5 ldd r20, Y+47 ; 0x2f + 4d9e: 58 a9 ldd r21, Y+48 ; 0x30 + 4da0: 6d 8d ldd r22, Y+29 ; 0x1d + 4da2: 7e 8d ldd r23, Y+30 ; 0x1e + 4da4: 8f 8d ldd r24, Y+31 ; 0x1f + 4da6: 98 a1 ldd r25, Y+32 ; 0x20 + 4da8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4dac: 65 96 adiw r28, 0x15 ; 21 + 4dae: 6c af std Y+60, r22 ; 0x3c + 4db0: 7d af std Y+61, r23 ; 0x3d + 4db2: 8e af std Y+62, r24 ; 0x3e + 4db4: 9f af std Y+63, r25 ; 0x3f + 4db6: 65 97 sbiw r28, 0x15 ; 21 + 4db8: 2d 96 adiw r28, 0x0d ; 13 + 4dba: 2c ad ldd r18, Y+60 ; 0x3c + 4dbc: 3d ad ldd r19, Y+61 ; 0x3d + 4dbe: 4e ad ldd r20, Y+62 ; 0x3e + 4dc0: 5f ad ldd r21, Y+63 ; 0x3f + 4dc2: 2d 97 sbiw r28, 0x0d ; 13 + 4dc4: 6d 81 ldd r22, Y+5 ; 0x05 + 4dc6: 7e 81 ldd r23, Y+6 ; 0x06 + 4dc8: 8f 81 ldd r24, Y+7 ; 0x07 + 4dca: 98 85 ldd r25, Y+8 ; 0x08 + 4dcc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4dd0: 4b 01 movw r8, r22 + 4dd2: 5c 01 movw r10, r24 + 4dd4: 61 96 adiw r28, 0x11 ; 17 + 4dd6: 2c ad ldd r18, Y+60 ; 0x3c + 4dd8: 3d ad ldd r19, Y+61 ; 0x3d + 4dda: 4e ad ldd r20, Y+62 ; 0x3e + 4ddc: 5f ad ldd r21, Y+63 ; 0x3f + 4dde: 61 97 sbiw r28, 0x11 ; 17 + 4de0: 69 85 ldd r22, Y+9 ; 0x09 + 4de2: 7a 85 ldd r23, Y+10 ; 0x0a + 4de4: 8b 85 ldd r24, Y+11 ; 0x0b + 4de6: 9c 85 ldd r25, Y+12 ; 0x0c + 4de8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4dec: 9b 01 movw r18, r22 + 4dee: ac 01 movw r20, r24 + 4df0: c5 01 movw r24, r10 + 4df2: b4 01 movw r22, r8 + 4df4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4df8: 4b 01 movw r8, r22 + 4dfa: 5c 01 movw r10, r24 + 4dfc: 65 96 adiw r28, 0x15 ; 21 + 4dfe: 2c ad ldd r18, Y+60 ; 0x3c + 4e00: 3d ad ldd r19, Y+61 ; 0x3d + 4e02: 4e ad ldd r20, Y+62 ; 0x3e + 4e04: 5f ad ldd r21, Y+63 ; 0x3f + 4e06: 65 97 sbiw r28, 0x15 ; 21 + 4e08: 6d 85 ldd r22, Y+13 ; 0x0d + 4e0a: 7e 85 ldd r23, Y+14 ; 0x0e + 4e0c: 8f 85 ldd r24, Y+15 ; 0x0f + 4e0e: 98 89 ldd r25, Y+16 ; 0x10 + 4e10: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4e14: 9b 01 movw r18, r22 + 4e16: ac 01 movw r20, r24 + 4e18: c5 01 movw r24, r10 + 4e1a: b4 01 movw r22, r8 + 4e1c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4e20: 9b 01 movw r18, r22 + 4e22: ac 01 movw r20, r24 + 4e24: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4e28: 4b 01 movw r8, r22 + 4e2a: 5c 01 movw r10, r24 + 4e2c: 29 a9 ldd r18, Y+49 ; 0x31 + 4e2e: 3a a9 ldd r19, Y+50 ; 0x32 + 4e30: 4b a9 ldd r20, Y+51 ; 0x33 + 4e32: 5c a9 ldd r21, Y+52 ; 0x34 + 4e34: c7 01 movw r24, r14 + 4e36: b6 01 movw r22, r12 + 4e38: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4e3c: 9b 01 movw r18, r22 + 4e3e: ac 01 movw r20, r24 + 4e40: 60 e0 ldi r22, 0x00 ; 0 + 4e42: 70 e0 ldi r23, 0x00 ; 0 + 4e44: 80 e0 ldi r24, 0x00 ; 0 + 4e46: 9f e3 ldi r25, 0x3F ; 63 + 4e48: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4e4c: 69 ab std Y+49, r22 ; 0x31 + 4e4e: 7a ab std Y+50, r23 ; 0x32 + 4e50: 8b ab std Y+51, r24 ; 0x33 + 4e52: 9c ab std Y+52, r25 ; 0x34 + 4e54: 29 a5 ldd r18, Y+41 ; 0x29 + 4e56: 3a a5 ldd r19, Y+42 ; 0x2a + 4e58: 4b a5 ldd r20, Y+43 ; 0x2b + 4e5a: 5c a5 ldd r21, Y+44 ; 0x2c + 4e5c: 6d 89 ldd r22, Y+21 ; 0x15 + 4e5e: 7e 89 ldd r23, Y+22 ; 0x16 + 4e60: 8f 89 ldd r24, Y+23 ; 0x17 + 4e62: 98 8d ldd r25, Y+24 ; 0x18 + 4e64: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4e68: 2d 81 ldd r18, Y+5 ; 0x05 + 4e6a: 3e 81 ldd r19, Y+6 ; 0x06 + 4e6c: 4f 81 ldd r20, Y+7 ; 0x07 + 4e6e: 58 85 ldd r21, Y+8 ; 0x08 + 4e70: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4e74: 6b 01 movw r12, r22 + 4e76: 7c 01 movw r14, r24 + 4e78: 2d a1 ldd r18, Y+37 ; 0x25 + 4e7a: 3e a1 ldd r19, Y+38 ; 0x26 + 4e7c: 4f a1 ldd r20, Y+39 ; 0x27 + 4e7e: 58 a5 ldd r21, Y+40 ; 0x28 + 4e80: 69 a9 ldd r22, Y+49 ; 0x31 + 4e82: 7a a9 ldd r23, Y+50 ; 0x32 + 4e84: 8b a9 ldd r24, Y+51 ; 0x33 + 4e86: 9c a9 ldd r25, Y+52 ; 0x34 + 4e88: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4e8c: 29 85 ldd r18, Y+9 ; 0x09 + 4e8e: 3a 85 ldd r19, Y+10 ; 0x0a + 4e90: 4b 85 ldd r20, Y+11 ; 0x0b + 4e92: 5c 85 ldd r21, Y+12 ; 0x0c + 4e94: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4e98: 9b 01 movw r18, r22 + 4e9a: ac 01 movw r20, r24 + 4e9c: c7 01 movw r24, r14 + 4e9e: b6 01 movw r22, r12 + 4ea0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4ea4: 6b 01 movw r12, r22 + 4ea6: 7c 01 movw r14, r24 + 4ea8: 29 a1 ldd r18, Y+33 ; 0x21 + 4eaa: 3a a1 ldd r19, Y+34 ; 0x22 + 4eac: 4b a1 ldd r20, Y+35 ; 0x23 + 4eae: 5c a1 ldd r21, Y+36 ; 0x24 + 4eb0: 29 96 adiw r28, 0x09 ; 9 + 4eb2: 6c ad ldd r22, Y+60 ; 0x3c + 4eb4: 7d ad ldd r23, Y+61 ; 0x3d + 4eb6: 8e ad ldd r24, Y+62 ; 0x3e + 4eb8: 9f ad ldd r25, Y+63 ; 0x3f + 4eba: 29 97 sbiw r28, 0x09 ; 9 + 4ebc: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4ec0: 2d 85 ldd r18, Y+13 ; 0x0d + 4ec2: 3e 85 ldd r19, Y+14 ; 0x0e + 4ec4: 4f 85 ldd r20, Y+15 ; 0x0f + 4ec6: 58 89 ldd r21, Y+16 ; 0x10 + 4ec8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4ecc: 9b 01 movw r18, r22 + 4ece: ac 01 movw r20, r24 + 4ed0: c7 01 movw r24, r14 + 4ed2: b6 01 movw r22, r12 + 4ed4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4ed8: 9b 01 movw r18, r22 + 4eda: ac 01 movw r20, r24 + 4edc: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4ee0: 6b 01 movw r12, r22 + 4ee2: 7c 01 movw r14, r24 + 4ee4: a5 01 movw r20, r10 + 4ee6: 94 01 movw r18, r8 + 4ee8: c5 01 movw r24, r10 + 4eea: b4 01 movw r22, r8 + 4eec: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4ef0: 6d 8b std Y+21, r22 ; 0x15 + 4ef2: 7e 8b std Y+22, r23 ; 0x16 + 4ef4: 8f 8b std Y+23, r24 ; 0x17 + 4ef6: 98 8f std Y+24, r25 ; 0x18 + 4ef8: a5 01 movw r20, r10 + 4efa: 94 01 movw r18, r8 + 4efc: c5 01 movw r24, r10 + 4efe: b4 01 movw r22, r8 + 4f00: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4f04: 4b 01 movw r8, r22 + 4f06: 5c 01 movw r10, r24 + 4f08: a7 01 movw r20, r14 + 4f0a: 96 01 movw r18, r12 + 4f0c: c7 01 movw r24, r14 + 4f0e: b6 01 movw r22, r12 + 4f10: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4f14: 9b 01 movw r18, r22 + 4f16: ac 01 movw r20, r24 + 4f18: c5 01 movw r24, r10 + 4f1a: b4 01 movw r22, r8 + 4f1c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4f20: 0e 94 74 35 call 0x6ae8 ; 0x6ae8 + 4f24: 4b 01 movw r8, r22 + 4f26: 5c 01 movw r10, r24 + 4f28: 2d 8d ldd r18, Y+29 ; 0x1d + 4f2a: 3e 8d ldd r19, Y+30 ; 0x1e + 4f2c: 4f 8d ldd r20, Y+31 ; 0x1f + 4f2e: 58 a1 ldd r21, Y+32 ; 0x20 + 4f30: 6d a5 ldd r22, Y+45 ; 0x2d + 4f32: 7e a5 ldd r23, Y+46 ; 0x2e + 4f34: 8f a5 ldd r24, Y+47 ; 0x2f + 4f36: 98 a9 ldd r25, Y+48 ; 0x30 + 4f38: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4f3c: 6d 8f std Y+29, r22 ; 0x1d + 4f3e: 7e 8f std Y+30, r23 ; 0x1e + 4f40: 8f 8f std Y+31, r24 ; 0x1f + 4f42: 98 a3 std Y+32, r25 ; 0x20 + 4f44: 29 96 adiw r28, 0x09 ; 9 + 4f46: 2c ad ldd r18, Y+60 ; 0x3c + 4f48: 3d ad ldd r19, Y+61 ; 0x3d + 4f4a: 4e ad ldd r20, Y+62 ; 0x3e + 4f4c: 5f ad ldd r21, Y+63 ; 0x3f + 4f4e: 29 97 sbiw r28, 0x09 ; 9 + 4f50: 69 a1 ldd r22, Y+33 ; 0x21 + 4f52: 7a a1 ldd r23, Y+34 ; 0x22 + 4f54: 8b a1 ldd r24, Y+35 ; 0x23 + 4f56: 9c a1 ldd r25, Y+36 ; 0x24 + 4f58: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4f5c: 69 a3 std Y+33, r22 ; 0x21 + 4f5e: 7a a3 std Y+34, r23 ; 0x22 + 4f60: 8b a3 std Y+35, r24 ; 0x23 + 4f62: 9c a3 std Y+36, r25 ; 0x24 + 4f64: 25 96 adiw r28, 0x05 ; 5 + 4f66: 2c ad ldd r18, Y+60 ; 0x3c + 4f68: 3d ad ldd r19, Y+61 ; 0x3d + 4f6a: 4e ad ldd r20, Y+62 ; 0x3e + 4f6c: 5f ad ldd r21, Y+63 ; 0x3f + 4f6e: 25 97 sbiw r28, 0x05 ; 5 + 4f70: 69 a9 ldd r22, Y+49 ; 0x31 + 4f72: 7a a9 ldd r23, Y+50 ; 0x32 + 4f74: 8b a9 ldd r24, Y+51 ; 0x33 + 4f76: 9c a9 ldd r25, Y+52 ; 0x34 + 4f78: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 4f7c: 6d 8b std Y+21, r22 ; 0x15 + 4f7e: 7e 8b std Y+22, r23 ; 0x16 + 4f80: 8f 8b std Y+23, r24 ; 0x17 + 4f82: 98 8f std Y+24, r25 ; 0x18 + 4f84: 2d 8d ldd r18, Y+29 ; 0x1d + 4f86: 3e 8d ldd r19, Y+30 ; 0x1e + 4f88: 4f 8d ldd r20, Y+31 ; 0x1f + 4f8a: 58 a1 ldd r21, Y+32 ; 0x20 + 4f8c: 6d 81 ldd r22, Y+5 ; 0x05 + 4f8e: 7e 81 ldd r23, Y+6 ; 0x06 + 4f90: 8f 81 ldd r24, Y+7 ; 0x07 + 4f92: 98 85 ldd r25, Y+8 ; 0x08 + 4f94: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4f98: 6b 01 movw r12, r22 + 4f9a: 7c 01 movw r14, r24 + 4f9c: 29 a1 ldd r18, Y+33 ; 0x21 + 4f9e: 3a a1 ldd r19, Y+34 ; 0x22 + 4fa0: 4b a1 ldd r20, Y+35 ; 0x23 + 4fa2: 5c a1 ldd r21, Y+36 ; 0x24 + 4fa4: 69 85 ldd r22, Y+9 ; 0x09 + 4fa6: 7a 85 ldd r23, Y+10 ; 0x0a + 4fa8: 8b 85 ldd r24, Y+11 ; 0x0b + 4faa: 9c 85 ldd r25, Y+12 ; 0x0c + 4fac: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4fb0: 9b 01 movw r18, r22 + 4fb2: ac 01 movw r20, r24 + 4fb4: c7 01 movw r24, r14 + 4fb6: b6 01 movw r22, r12 + 4fb8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4fbc: 6b 01 movw r12, r22 + 4fbe: 7c 01 movw r14, r24 + 4fc0: 2d 89 ldd r18, Y+21 ; 0x15 + 4fc2: 3e 89 ldd r19, Y+22 ; 0x16 + 4fc4: 4f 89 ldd r20, Y+23 ; 0x17 + 4fc6: 58 8d ldd r21, Y+24 ; 0x18 + 4fc8: 6d 85 ldd r22, Y+13 ; 0x0d + 4fca: 7e 85 ldd r23, Y+14 ; 0x0e + 4fcc: 8f 85 ldd r24, Y+15 ; 0x0f + 4fce: 98 89 ldd r25, Y+16 ; 0x10 + 4fd0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 4fd4: 9b 01 movw r18, r22 + 4fd6: ac 01 movw r20, r24 + 4fd8: c7 01 movw r24, r14 + 4fda: b6 01 movw r22, r12 + 4fdc: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4fe0: 9b 01 movw r18, r22 + 4fe2: ac 01 movw r20, r24 + 4fe4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 4fe8: 6b 01 movw r12, r22 + 4fea: 7c 01 movw r14, r24 + 4fec: 69 96 adiw r28, 0x19 ; 25 + 4fee: 2c ad ldd r18, Y+60 ; 0x3c + 4ff0: 3d ad ldd r19, Y+61 ; 0x3d + 4ff2: 4e ad ldd r20, Y+62 ; 0x3e + 4ff4: 5f ad ldd r21, Y+63 ; 0x3f + 4ff6: 69 97 sbiw r28, 0x19 ; 25 + 4ff8: c3 01 movw r24, r6 + 4ffa: b2 01 movw r22, r4 + 4ffc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5000: 20 e0 ldi r18, 0x00 ; 0 + 5002: 30 e0 ldi r19, 0x00 ; 0 + 5004: 40 e0 ldi r20, 0x00 ; 0 + 5006: 5f e3 ldi r21, 0x3F ; 63 + 5008: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 500c: 2d a1 ldd r18, Y+37 ; 0x25 + 500e: 3e a1 ldd r19, Y+38 ; 0x26 + 5010: 4f a1 ldd r20, Y+39 ; 0x27 + 5012: 58 a5 ldd r21, Y+40 ; 0x28 + 5014: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 5018: 6d a3 std Y+37, r22 ; 0x25 + 501a: 7e a3 std Y+38, r23 ; 0x26 + 501c: 8f a3 std Y+39, r24 ; 0x27 + 501e: 98 a7 std Y+40, r25 ; 0x28 + 5020: a5 01 movw r20, r10 + 5022: 94 01 movw r18, r8 + 5024: 2d 96 adiw r28, 0x0d ; 13 + 5026: 6c ad ldd r22, Y+60 ; 0x3c + 5028: 7d ad ldd r23, Y+61 ; 0x3d + 502a: 8e ad ldd r24, Y+62 ; 0x3e + 502c: 9f ad ldd r25, Y+63 ; 0x3f + 502e: 2d 97 sbiw r28, 0x0d ; 13 + 5030: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5034: 2b 01 movw r4, r22 + 5036: 3c 01 movw r6, r24 + 5038: a7 01 movw r20, r14 + 503a: 96 01 movw r18, r12 + 503c: 6d 8d ldd r22, Y+29 ; 0x1d + 503e: 7e 8d ldd r23, Y+30 ; 0x1e + 5040: 8f 8d ldd r24, Y+31 ; 0x1f + 5042: 98 a1 ldd r25, Y+32 ; 0x20 + 5044: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5048: 9b 01 movw r18, r22 + 504a: ac 01 movw r20, r24 + 504c: c3 01 movw r24, r6 + 504e: b2 01 movw r22, r4 + 5050: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 5054: 69 a7 std Y+41, r22 ; 0x29 + 5056: 7a a7 std Y+42, r23 ; 0x2a + 5058: 8b a7 std Y+43, r24 ; 0x2b + 505a: 9c a7 std Y+44, r25 ; 0x2c + 505c: a5 01 movw r20, r10 + 505e: 94 01 movw r18, r8 + 5060: 61 96 adiw r28, 0x11 ; 17 + 5062: 6c ad ldd r22, Y+60 ; 0x3c + 5064: 7d ad ldd r23, Y+61 ; 0x3d + 5066: 8e ad ldd r24, Y+62 ; 0x3e + 5068: 9f ad ldd r25, Y+63 ; 0x3f + 506a: 61 97 sbiw r28, 0x11 ; 17 + 506c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5070: 2b 01 movw r4, r22 + 5072: 3c 01 movw r6, r24 + 5074: a7 01 movw r20, r14 + 5076: 96 01 movw r18, r12 + 5078: 69 a1 ldd r22, Y+33 ; 0x21 + 507a: 7a a1 ldd r23, Y+34 ; 0x22 + 507c: 8b a1 ldd r24, Y+35 ; 0x23 + 507e: 9c a1 ldd r25, Y+36 ; 0x24 + 5080: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5084: 9b 01 movw r18, r22 + 5086: ac 01 movw r20, r24 + 5088: c3 01 movw r24, r6 + 508a: b2 01 movw r22, r4 + 508c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 5090: 6d a7 std Y+45, r22 ; 0x2d + 5092: 7e a7 std Y+46, r23 ; 0x2e + 5094: 8f a7 std Y+47, r24 ; 0x2f + 5096: 98 ab std Y+48, r25 ; 0x30 + 5098: a5 01 movw r20, r10 + 509a: 94 01 movw r18, r8 + 509c: 65 96 adiw r28, 0x15 ; 21 + 509e: 6c ad ldd r22, Y+60 ; 0x3c + 50a0: 7d ad ldd r23, Y+61 ; 0x3d + 50a2: 8e ad ldd r24, Y+62 ; 0x3e + 50a4: 9f ad ldd r25, Y+63 ; 0x3f + 50a6: 65 97 sbiw r28, 0x15 ; 21 + 50a8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 50ac: 2b 01 movw r4, r22 + 50ae: 3c 01 movw r6, r24 + 50b0: a7 01 movw r20, r14 + 50b2: 96 01 movw r18, r12 + 50b4: 6d 89 ldd r22, Y+21 ; 0x15 + 50b6: 7e 89 ldd r23, Y+22 ; 0x16 + 50b8: 8f 89 ldd r24, Y+23 ; 0x17 + 50ba: 98 8d ldd r25, Y+24 ; 0x18 + 50bc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 50c0: 9b 01 movw r18, r22 + 50c2: ac 01 movw r20, r24 + 50c4: c3 01 movw r24, r6 + 50c6: b2 01 movw r22, r4 + 50c8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 50cc: 6b 01 movw r12, r22 + 50ce: 7c 01 movw r14, r24 + 50d0: 2d a1 ldd r18, Y+37 ; 0x25 + 50d2: 3e a1 ldd r19, Y+38 ; 0x26 + 50d4: 4f a1 ldd r20, Y+39 ; 0x27 + 50d6: 58 a5 ldd r21, Y+40 ; 0x28 + 50d8: 69 ad ldd r22, Y+57 ; 0x39 + 50da: 7a ad ldd r23, Y+58 ; 0x3a + 50dc: 8b ad ldd r24, Y+59 ; 0x3b + 50de: 9c ad ldd r25, Y+60 ; 0x3c + 50e0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 50e4: 4b 01 movw r8, r22 + 50e6: 5c 01 movw r10, r24 + 50e8: 29 a1 ldd r18, Y+33 ; 0x21 + 50ea: 3a a1 ldd r19, Y+34 ; 0x22 + 50ec: 4b a1 ldd r20, Y+35 ; 0x23 + 50ee: 5c a1 ldd r21, Y+36 ; 0x24 + 50f0: 21 96 adiw r28, 0x01 ; 1 + 50f2: 6c ad ldd r22, Y+60 ; 0x3c + 50f4: 7d ad ldd r23, Y+61 ; 0x3d + 50f6: 8e ad ldd r24, Y+62 ; 0x3e + 50f8: 9f ad ldd r25, Y+63 ; 0x3f + 50fa: 21 97 sbiw r28, 0x01 ; 1 + 50fc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5100: 9b 01 movw r18, r22 + 5102: ac 01 movw r20, r24 + 5104: c5 01 movw r24, r10 + 5106: b4 01 movw r22, r8 + 5108: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 510c: 4b 01 movw r8, r22 + 510e: 5c 01 movw r10, r24 + 5110: a7 01 movw r20, r14 + 5112: 96 01 movw r18, r12 + 5114: 69 85 ldd r22, Y+9 ; 0x09 + 5116: 7a 85 ldd r23, Y+10 ; 0x0a + 5118: 8b 85 ldd r24, Y+11 ; 0x0b + 511a: 9c 85 ldd r25, Y+12 ; 0x0c + 511c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5120: 2b 01 movw r4, r22 + 5122: 3c 01 movw r6, r24 + 5124: 2d a5 ldd r18, Y+45 ; 0x2d + 5126: 3e a5 ldd r19, Y+46 ; 0x2e + 5128: 4f a5 ldd r20, Y+47 ; 0x2f + 512a: 58 a9 ldd r21, Y+48 ; 0x30 + 512c: 6d 85 ldd r22, Y+13 ; 0x0d + 512e: 7e 85 ldd r23, Y+14 ; 0x0e + 5130: 8f 85 ldd r24, Y+15 ; 0x0f + 5132: 98 89 ldd r25, Y+16 ; 0x10 + 5134: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5138: 9b 01 movw r18, r22 + 513a: ac 01 movw r20, r24 + 513c: c3 01 movw r24, r6 + 513e: b2 01 movw r22, r4 + 5140: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 5144: 9b 01 movw r18, r22 + 5146: ac 01 movw r20, r24 + 5148: c5 01 movw r24, r10 + 514a: b4 01 movw r22, r8 + 514c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 5150: 6d 8b std Y+21, r22 ; 0x15 + 5152: 7e 8b std Y+22, r23 ; 0x16 + 5154: 8f 8b std Y+23, r24 ; 0x17 + 5156: 98 8f std Y+24, r25 ; 0x18 + 5158: 2d 8d ldd r18, Y+29 ; 0x1d + 515a: 3e 8d ldd r19, Y+30 ; 0x1e + 515c: 4f 8d ldd r20, Y+31 ; 0x1f + 515e: 58 a1 ldd r21, Y+32 ; 0x20 + 5160: 21 96 adiw r28, 0x01 ; 1 + 5162: 6c ad ldd r22, Y+60 ; 0x3c + 5164: 7d ad ldd r23, Y+61 ; 0x3d + 5166: 8e ad ldd r24, Y+62 ; 0x3e + 5168: 9f ad ldd r25, Y+63 ; 0x3f + 516a: 21 97 sbiw r28, 0x01 ; 1 + 516c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5170: 4b 01 movw r8, r22 + 5172: 5c 01 movw r10, r24 + 5174: 2d a1 ldd r18, Y+37 ; 0x25 + 5176: 3e a1 ldd r19, Y+38 ; 0x26 + 5178: 4f a1 ldd r20, Y+39 ; 0x27 + 517a: 58 a5 ldd r21, Y+40 ; 0x28 + 517c: 6d a9 ldd r22, Y+53 ; 0x35 + 517e: 7e a9 ldd r23, Y+54 ; 0x36 + 5180: 8f a9 ldd r24, Y+55 ; 0x37 + 5182: 98 ad ldd r25, Y+56 ; 0x38 + 5184: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5188: 9b 01 movw r18, r22 + 518a: ac 01 movw r20, r24 + 518c: c5 01 movw r24, r10 + 518e: b4 01 movw r22, r8 + 5190: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 5194: 4b 01 movw r8, r22 + 5196: 5c 01 movw r10, r24 + 5198: 29 a5 ldd r18, Y+41 ; 0x29 + 519a: 3a a5 ldd r19, Y+42 ; 0x2a + 519c: 4b a5 ldd r20, Y+43 ; 0x2b + 519e: 5c a5 ldd r21, Y+44 ; 0x2c + 51a0: 6d 85 ldd r22, Y+13 ; 0x0d + 51a2: 7e 85 ldd r23, Y+14 ; 0x0e + 51a4: 8f 85 ldd r24, Y+15 ; 0x0f + 51a6: 98 89 ldd r25, Y+16 ; 0x10 + 51a8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 51ac: 2b 01 movw r4, r22 + 51ae: 3c 01 movw r6, r24 + 51b0: a7 01 movw r20, r14 + 51b2: 96 01 movw r18, r12 + 51b4: 6d 81 ldd r22, Y+5 ; 0x05 + 51b6: 7e 81 ldd r23, Y+6 ; 0x06 + 51b8: 8f 81 ldd r24, Y+7 ; 0x07 + 51ba: 98 85 ldd r25, Y+8 ; 0x08 + 51bc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 51c0: 9b 01 movw r18, r22 + 51c2: ac 01 movw r20, r24 + 51c4: c3 01 movw r24, r6 + 51c6: b2 01 movw r22, r4 + 51c8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 51cc: 9b 01 movw r18, r22 + 51ce: ac 01 movw r20, r24 + 51d0: c5 01 movw r24, r10 + 51d2: b4 01 movw r22, r8 + 51d4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 51d8: 4b 01 movw r8, r22 + 51da: 5c 01 movw r10, r24 + 51dc: 29 a1 ldd r18, Y+33 ; 0x21 + 51de: 3a a1 ldd r19, Y+34 ; 0x22 + 51e0: 4b a1 ldd r20, Y+35 ; 0x23 + 51e2: 5c a1 ldd r21, Y+36 ; 0x24 + 51e4: 6d a9 ldd r22, Y+53 ; 0x35 + 51e6: 7e a9 ldd r23, Y+54 ; 0x36 + 51e8: 8f a9 ldd r24, Y+55 ; 0x37 + 51ea: 98 ad ldd r25, Y+56 ; 0x38 + 51ec: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 51f0: 6b 01 movw r12, r22 + 51f2: 7c 01 movw r14, r24 + 51f4: 2d 8d ldd r18, Y+29 ; 0x1d + 51f6: 3e 8d ldd r19, Y+30 ; 0x1e + 51f8: 4f 8d ldd r20, Y+31 ; 0x1f + 51fa: 58 a1 ldd r21, Y+32 ; 0x20 + 51fc: 69 ad ldd r22, Y+57 ; 0x39 + 51fe: 7a ad ldd r23, Y+58 ; 0x3a + 5200: 8b ad ldd r24, Y+59 ; 0x3b + 5202: 9c ad ldd r25, Y+60 ; 0x3c + 5204: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5208: 9b 01 movw r18, r22 + 520a: ac 01 movw r20, r24 + 520c: c7 01 movw r24, r14 + 520e: b6 01 movw r22, r12 + 5210: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 5214: 6b 01 movw r12, r22 + 5216: 7c 01 movw r14, r24 + 5218: 2d a5 ldd r18, Y+45 ; 0x2d + 521a: 3e a5 ldd r19, Y+46 ; 0x2e + 521c: 4f a5 ldd r20, Y+47 ; 0x2f + 521e: 58 a9 ldd r21, Y+48 ; 0x30 + 5220: 6d 81 ldd r22, Y+5 ; 0x05 + 5222: 7e 81 ldd r23, Y+6 ; 0x06 + 5224: 8f 81 ldd r24, Y+7 ; 0x07 + 5226: 98 85 ldd r25, Y+8 ; 0x08 + 5228: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 522c: 2b 01 movw r4, r22 + 522e: 3c 01 movw r6, r24 + 5230: 29 a5 ldd r18, Y+41 ; 0x29 + 5232: 3a a5 ldd r19, Y+42 ; 0x2a + 5234: 4b a5 ldd r20, Y+43 ; 0x2b + 5236: 5c a5 ldd r21, Y+44 ; 0x2c + 5238: 69 85 ldd r22, Y+9 ; 0x09 + 523a: 7a 85 ldd r23, Y+10 ; 0x0a + 523c: 8b 85 ldd r24, Y+11 ; 0x0b + 523e: 9c 85 ldd r25, Y+12 ; 0x0c + 5240: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5244: 9b 01 movw r18, r22 + 5246: ac 01 movw r20, r24 + 5248: c3 01 movw r24, r6 + 524a: b2 01 movw r22, r4 + 524c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3> + 5250: 9b 01 movw r18, r22 + 5252: ac 01 movw r20, r24 + 5254: c7 01 movw r24, r14 + 5256: b6 01 movw r22, r12 + 5258: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 525c: 6b 01 movw r12, r22 + 525e: 7c 01 movw r14, r24 + 5260: 60 91 a8 24 lds r22, 0x24A8 ; 0x8024a8 + 5264: 70 91 a9 24 lds r23, 0x24A9 ; 0x8024a9 + 5268: 80 91 aa 24 lds r24, 0x24AA ; 0x8024aa + 526c: 90 91 ab 24 lds r25, 0x24AB ; 0x8024ab + 5270: 20 e0 ldi r18, 0x00 ; 0 + 5272: 30 e0 ldi r19, 0x00 ; 0 + 5274: a9 01 movw r20, r18 + 5276: 0e 94 51 34 call 0x68a2 ; 0x68a2 <__gesf2> + 527a: 18 16 cp r1, r24 + 527c: 0c f0 brlt .+2 ; 0x5280 + 527e: aa c0 rjmp .+340 ; 0x53d4 + 5280: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 + 5284: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 + 5288: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa + 528c: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab + 5290: 40 90 98 24 lds r4, 0x2498 ; 0x802498 + 5294: 50 90 99 24 lds r5, 0x2499 ; 0x802499 + 5298: 60 90 9a 24 lds r6, 0x249A ; 0x80249a + 529c: 70 90 9b 24 lds r7, 0x249B ; 0x80249b + 52a0: 6d 89 ldd r22, Y+21 ; 0x15 + 52a2: 7e 89 ldd r23, Y+22 ; 0x16 + 52a4: 8f 89 ldd r24, Y+23 ; 0x17 + 52a6: 98 8d ldd r25, Y+24 ; 0x18 + 52a8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 52ac: 2a ef ldi r18, 0xFA ; 250 + 52ae: 39 ec ldi r19, 0xC9 ; 201 + 52b0: 44 e3 ldi r20, 0x34 ; 52 + 52b2: 59 e3 ldi r21, 0x39 ; 57 + 52b4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 52b8: a3 01 movw r20, r6 + 52ba: 92 01 movw r18, r4 + 52bc: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 52c0: 60 93 98 24 sts 0x2498, r22 ; 0x802498 + 52c4: 70 93 99 24 sts 0x2499, r23 ; 0x802499 + 52c8: 80 93 9a 24 sts 0x249A, r24 ; 0x80249a + 52cc: 90 93 9b 24 sts 0x249B, r25 ; 0x80249b + 52d0: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 + 52d4: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 + 52d8: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa + 52dc: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab + 52e0: 40 90 94 24 lds r4, 0x2494 ; 0x802494 + 52e4: 50 90 95 24 lds r5, 0x2495 ; 0x802495 + 52e8: 60 90 96 24 lds r6, 0x2496 ; 0x802496 + 52ec: 70 90 97 24 lds r7, 0x2497 ; 0x802497 + 52f0: c5 01 movw r24, r10 + 52f2: b4 01 movw r22, r8 + 52f4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 52f8: 2a ef ldi r18, 0xFA ; 250 + 52fa: 39 ec ldi r19, 0xC9 ; 201 + 52fc: 44 e3 ldi r20, 0x34 ; 52 + 52fe: 59 e3 ldi r21, 0x39 ; 57 + 5300: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5304: a3 01 movw r20, r6 + 5306: 92 01 movw r18, r4 + 5308: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 530c: 60 93 94 24 sts 0x2494, r22 ; 0x802494 + 5310: 70 93 95 24 sts 0x2495, r23 ; 0x802495 + 5314: 80 93 96 24 sts 0x2496, r24 ; 0x802496 + 5318: 90 93 97 24 sts 0x2497, r25 ; 0x802497 + 531c: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 + 5320: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 + 5324: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa + 5328: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab + 532c: 40 90 90 24 lds r4, 0x2490 ; 0x802490 + 5330: 50 90 91 24 lds r5, 0x2491 ; 0x802491 + 5334: 60 90 92 24 lds r6, 0x2492 ; 0x802492 + 5338: 70 90 93 24 lds r7, 0x2493 ; 0x802493 + 533c: c7 01 movw r24, r14 + 533e: b6 01 movw r22, r12 + 5340: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5344: 2a ef ldi r18, 0xFA ; 250 + 5346: 39 ec ldi r19, 0xC9 ; 201 + 5348: 44 e3 ldi r20, 0x34 ; 52 + 534a: 59 e3 ldi r21, 0x39 ; 57 + 534c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5350: a3 01 movw r20, r6 + 5352: 92 01 movw r18, r4 + 5354: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 5358: 60 93 90 24 sts 0x2490, r22 ; 0x802490 + 535c: 70 93 91 24 sts 0x2491, r23 ; 0x802491 + 5360: 80 93 92 24 sts 0x2492, r24 ; 0x802492 + 5364: 90 93 93 24 sts 0x2493, r25 ; 0x802493 + 5368: 20 91 98 24 lds r18, 0x2498 ; 0x802498 + 536c: 30 91 99 24 lds r19, 0x2499 ; 0x802499 + 5370: 40 91 9a 24 lds r20, 0x249A ; 0x80249a + 5374: 50 91 9b 24 lds r21, 0x249B ; 0x80249b + 5378: 69 89 ldd r22, Y+17 ; 0x11 + 537a: 7a 89 ldd r23, Y+18 ; 0x12 + 537c: 8b 89 ldd r24, Y+19 ; 0x13 + 537e: 9c 89 ldd r25, Y+20 ; 0x14 + 5380: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 5384: 69 8b std Y+17, r22 ; 0x11 + 5386: 7a 8b std Y+18, r23 ; 0x12 + 5388: 8b 8b std Y+19, r24 ; 0x13 + 538a: 9c 8b std Y+20, r25 ; 0x14 + 538c: 20 91 94 24 lds r18, 0x2494 ; 0x802494 + 5390: 30 91 95 24 lds r19, 0x2495 ; 0x802495 + 5394: 40 91 96 24 lds r20, 0x2496 ; 0x802496 + 5398: 50 91 97 24 lds r21, 0x2497 ; 0x802497 + 539c: 69 8d ldd r22, Y+25 ; 0x19 + 539e: 7a 8d ldd r23, Y+26 ; 0x1a + 53a0: 8b 8d ldd r24, Y+27 ; 0x1b + 53a2: 9c 8d ldd r25, Y+28 ; 0x1c + 53a4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3> + 53a8: 69 8f std Y+25, r22 ; 0x19 + 53aa: 7a 8f std Y+26, r23 ; 0x1a + 53ac: 8b 8f std Y+27, r24 ; 0x1b + 53ae: 9c 8f std Y+28, r25 ; 0x1c + 53b0: 20 91 90 24 lds r18, 0x2490 ; 0x802490 + 53b4: 30 91 91 24 lds r19, 0x2491 ; 0x802491 + 53b8: 40 91 92 24 lds r20, 0x2492 ; 0x802492 + 53bc: 50 91 93 24 lds r21, 0x2493 ; 0x802493 + 53c0: 69 81 ldd r22, Y+1 ; 0x01 + 53c2: 7a 81 ldd r23, Y+2 ; 0x02 + 53c4: 8b 81 ldd r24, Y+3 ; 0x03 + 53c6: 9c 81 ldd r25, Y+4 ; 0x04 + 53c8: ef d7 rcall .+4062 ; 0x63a8 <__addsf3> + 53ca: 69 83 std Y+1, r22 ; 0x01 + 53cc: 7a 83 std Y+2, r23 ; 0x02 + 53ce: 8b 83 std Y+3, r24 ; 0x03 + 53d0: 9c 83 std Y+4, r25 ; 0x04 + 53d2: 18 c0 rjmp .+48 ; 0x5404 + 53d4: 10 92 98 24 sts 0x2498, r1 ; 0x802498 + 53d8: 10 92 99 24 sts 0x2499, r1 ; 0x802499 + 53dc: 10 92 9a 24 sts 0x249A, r1 ; 0x80249a + 53e0: 10 92 9b 24 sts 0x249B, r1 ; 0x80249b + 53e4: 10 92 94 24 sts 0x2494, r1 ; 0x802494 + 53e8: 10 92 95 24 sts 0x2495, r1 ; 0x802495 + 53ec: 10 92 96 24 sts 0x2496, r1 ; 0x802496 + 53f0: 10 92 97 24 sts 0x2497, r1 ; 0x802497 + 53f4: 10 92 90 24 sts 0x2490, r1 ; 0x802490 + 53f8: 10 92 91 24 sts 0x2491, r1 ; 0x802491 + 53fc: 10 92 92 24 sts 0x2492, r1 ; 0x802492 + 5400: 10 92 93 24 sts 0x2493, r1 ; 0x802493 + 5404: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 5408: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 540c: 40 91 06 20 lds r20, 0x2006 ; 0x802006 + 5410: 50 91 07 20 lds r21, 0x2007 ; 0x802007 + 5414: 6d 89 ldd r22, Y+21 ; 0x15 + 5416: 7e 89 ldd r23, Y+22 ; 0x16 + 5418: 8f 89 ldd r24, Y+23 ; 0x17 + 541a: 98 8d ldd r25, Y+24 ; 0x18 + 541c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5420: 9b 01 movw r18, r22 + 5422: ac 01 movw r20, r24 + 5424: 69 89 ldd r22, Y+17 ; 0x11 + 5426: 7a 89 ldd r23, Y+18 ; 0x12 + 5428: 8b 89 ldd r24, Y+19 ; 0x13 + 542a: 9c 89 ldd r25, Y+20 ; 0x14 + 542c: bd d7 rcall .+3962 ; 0x63a8 <__addsf3> + 542e: 69 8b std Y+17, r22 ; 0x11 + 5430: 7a 8b std Y+18, r23 ; 0x12 + 5432: 8b 8b std Y+19, r24 ; 0x13 + 5434: 9c 8b std Y+20, r25 ; 0x14 + 5436: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 543a: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 543e: 40 91 06 20 lds r20, 0x2006 ; 0x802006 + 5442: 50 91 07 20 lds r21, 0x2007 ; 0x802007 + 5446: c5 01 movw r24, r10 + 5448: b4 01 movw r22, r8 + 544a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 544e: 9b 01 movw r18, r22 + 5450: ac 01 movw r20, r24 + 5452: 69 8d ldd r22, Y+25 ; 0x19 + 5454: 7a 8d ldd r23, Y+26 ; 0x1a + 5456: 8b 8d ldd r24, Y+27 ; 0x1b + 5458: 9c 8d ldd r25, Y+28 ; 0x1c + 545a: a6 d7 rcall .+3916 ; 0x63a8 <__addsf3> + 545c: 69 8f std Y+25, r22 ; 0x19 + 545e: 7a 8f std Y+26, r23 ; 0x1a + 5460: 8b 8f std Y+27, r24 ; 0x1b + 5462: 9c 8f std Y+28, r25 ; 0x1c + 5464: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 5468: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 546c: 40 91 06 20 lds r20, 0x2006 ; 0x802006 + 5470: 50 91 07 20 lds r21, 0x2007 ; 0x802007 + 5474: c7 01 movw r24, r14 + 5476: b6 01 movw r22, r12 + 5478: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 547c: 9b 01 movw r18, r22 + 547e: ac 01 movw r20, r24 + 5480: 69 81 ldd r22, Y+1 ; 0x01 + 5482: 7a 81 ldd r23, Y+2 ; 0x02 + 5484: 8b 81 ldd r24, Y+3 ; 0x03 + 5486: 9c 81 ldd r25, Y+4 ; 0x04 + 5488: 8f d7 rcall .+3870 ; 0x63a8 <__addsf3> + 548a: 69 83 std Y+1, r22 ; 0x01 + 548c: 7a 83 std Y+2, r23 ; 0x02 + 548e: 8b 83 std Y+3, r24 ; 0x03 + 5490: 9c 83 std Y+4, r25 ; 0x04 + 5492: 2a ef ldi r18, 0xFA ; 250 + 5494: 39 ec ldi r19, 0xC9 ; 201 + 5496: 44 eb ldi r20, 0xB4 ; 180 + 5498: 58 e3 ldi r21, 0x38 ; 56 + 549a: 69 89 ldd r22, Y+17 ; 0x11 + 549c: 7a 89 ldd r23, Y+18 ; 0x12 + 549e: 8b 89 ldd r24, Y+19 ; 0x13 + 54a0: 9c 89 ldd r25, Y+20 ; 0x14 + 54a2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 54a6: 6d 83 std Y+5, r22 ; 0x05 + 54a8: 7e 83 std Y+6, r23 ; 0x06 + 54aa: 8f 83 std Y+7, r24 ; 0x07 + 54ac: 98 87 std Y+8, r25 ; 0x08 + 54ae: 2a ef ldi r18, 0xFA ; 250 + 54b0: 39 ec ldi r19, 0xC9 ; 201 + 54b2: 44 eb ldi r20, 0xB4 ; 180 + 54b4: 58 e3 ldi r21, 0x38 ; 56 + 54b6: 69 8d ldd r22, Y+25 ; 0x19 + 54b8: 7a 8d ldd r23, Y+26 ; 0x1a + 54ba: 8b 8d ldd r24, Y+27 ; 0x1b + 54bc: 9c 8d ldd r25, Y+28 ; 0x1c + 54be: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 54c2: 69 87 std Y+9, r22 ; 0x09 + 54c4: 7a 87 std Y+10, r23 ; 0x0a + 54c6: 8b 87 std Y+11, r24 ; 0x0b + 54c8: 9c 87 std Y+12, r25 ; 0x0c + 54ca: 2a ef ldi r18, 0xFA ; 250 + 54cc: 39 ec ldi r19, 0xC9 ; 201 + 54ce: 44 eb ldi r20, 0xB4 ; 180 + 54d0: 58 e3 ldi r21, 0x38 ; 56 + 54d2: 69 81 ldd r22, Y+1 ; 0x01 + 54d4: 7a 81 ldd r23, Y+2 ; 0x02 + 54d6: 8b 81 ldd r24, Y+3 ; 0x03 + 54d8: 9c 81 ldd r25, Y+4 ; 0x04 + 54da: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 54de: 6d 87 std Y+13, r22 ; 0x0d + 54e0: 7e 87 std Y+14, r23 ; 0x0e + 54e2: 8f 87 std Y+15, r24 ; 0x0f + 54e4: 98 8b std Y+16, r25 ; 0x10 + 54e6: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start> + 54ea: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1> + 54ee: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2> + 54f2: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3> + 54f6: e9 8a std Y+17, r14 ; 0x11 + 54f8: fa 8a std Y+18, r15 ; 0x12 + 54fa: 0b 8b std Y+19, r16 ; 0x13 + 54fc: 1c 8b std Y+20, r17 ; 0x14 + 54fe: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 + 5502: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 + 5506: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 + 550a: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 + 550e: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 5512: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 5516: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 551a: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 551e: e9 8e std Y+25, r14 ; 0x19 + 5520: fa 8e std Y+26, r15 ; 0x1a + 5522: 0b 8f std Y+27, r16 ; 0x1b + 5524: 1c 8f std Y+28, r17 ; 0x1c + 5526: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 552a: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 552e: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 5532: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 5536: c0 90 00 20 lds r12, 0x2000 ; 0x802000 <__data_start> + 553a: d0 90 01 20 lds r13, 0x2001 ; 0x802001 <__data_start+0x1> + 553e: e0 90 02 20 lds r14, 0x2002 ; 0x802002 <__data_start+0x2> + 5542: f0 90 03 20 lds r15, 0x2003 ; 0x802003 <__data_start+0x3> + 5546: c5 01 movw r24, r10 + 5548: b4 01 movw r22, r8 + 554a: 90 58 subi r25, 0x80 ; 128 + 554c: 2d 81 ldd r18, Y+5 ; 0x05 + 554e: 3e 81 ldd r19, Y+6 ; 0x06 + 5550: 4f 81 ldd r20, Y+7 ; 0x07 + 5552: 58 85 ldd r21, Y+8 ; 0x08 + 5554: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5558: 69 83 std Y+1, r22 ; 0x01 + 555a: 7a 83 std Y+2, r23 ; 0x02 + 555c: 8b 83 std Y+3, r24 ; 0x03 + 555e: 9c 83 std Y+4, r25 ; 0x04 + 5560: 29 8d ldd r18, Y+25 ; 0x19 + 5562: 3a 8d ldd r19, Y+26 ; 0x1a + 5564: 4b 8d ldd r20, Y+27 ; 0x1b + 5566: 5c 8d ldd r21, Y+28 ; 0x1c + 5568: 69 85 ldd r22, Y+9 ; 0x09 + 556a: 7a 85 ldd r23, Y+10 ; 0x0a + 556c: 8b 85 ldd r24, Y+11 ; 0x0b + 556e: 9c 85 ldd r25, Y+12 ; 0x0c + 5570: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5574: 9b 01 movw r18, r22 + 5576: ac 01 movw r20, r24 + 5578: 69 81 ldd r22, Y+1 ; 0x01 + 557a: 7a 81 ldd r23, Y+2 ; 0x02 + 557c: 8b 81 ldd r24, Y+3 ; 0x03 + 557e: 9c 81 ldd r25, Y+4 ; 0x04 + 5580: 12 d7 rcall .+3620 ; 0x63a6 <__subsf3> + 5582: 69 83 std Y+1, r22 ; 0x01 + 5584: 7a 83 std Y+2, r23 ; 0x02 + 5586: 8b 83 std Y+3, r24 ; 0x03 + 5588: 9c 83 std Y+4, r25 ; 0x04 + 558a: a3 01 movw r20, r6 + 558c: 92 01 movw r18, r4 + 558e: 6d 85 ldd r22, Y+13 ; 0x0d + 5590: 7e 85 ldd r23, Y+14 ; 0x0e + 5592: 8f 85 ldd r24, Y+15 ; 0x0f + 5594: 98 89 ldd r25, Y+16 ; 0x10 + 5596: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 559a: 9b 01 movw r18, r22 + 559c: ac 01 movw r20, r24 + 559e: 69 81 ldd r22, Y+1 ; 0x01 + 55a0: 7a 81 ldd r23, Y+2 ; 0x02 + 55a2: 8b 81 ldd r24, Y+3 ; 0x03 + 55a4: 9c 81 ldd r25, Y+4 ; 0x04 + 55a6: ff d6 rcall .+3582 ; 0x63a6 <__subsf3> + 55a8: a7 01 movw r20, r14 + 55aa: 96 01 movw r18, r12 + 55ac: fd d6 rcall .+3578 ; 0x63a8 <__addsf3> + 55ae: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start> + 55b2: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1> + 55b6: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2> + 55ba: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3> + 55be: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 55c2: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 55c6: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 55ca: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 55ce: c0 90 a4 24 lds r12, 0x24A4 ; 0x8024a4 + 55d2: d0 90 a5 24 lds r13, 0x24A5 ; 0x8024a5 + 55d6: e0 90 a6 24 lds r14, 0x24A6 ; 0x8024a6 + 55da: f0 90 a7 24 lds r15, 0x24A7 ; 0x8024a7 + 55de: 29 89 ldd r18, Y+17 ; 0x11 + 55e0: 3a 89 ldd r19, Y+18 ; 0x12 + 55e2: 4b 89 ldd r20, Y+19 ; 0x13 + 55e4: 5c 89 ldd r21, Y+20 ; 0x14 + 55e6: 6d 81 ldd r22, Y+5 ; 0x05 + 55e8: 7e 81 ldd r23, Y+6 ; 0x06 + 55ea: 8f 81 ldd r24, Y+7 ; 0x07 + 55ec: 98 85 ldd r25, Y+8 ; 0x08 + 55ee: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 55f2: 69 83 std Y+1, r22 ; 0x01 + 55f4: 7a 83 std Y+2, r23 ; 0x02 + 55f6: 8b 83 std Y+3, r24 ; 0x03 + 55f8: 9c 83 std Y+4, r25 ; 0x04 + 55fa: 29 8d ldd r18, Y+25 ; 0x19 + 55fc: 3a 8d ldd r19, Y+26 ; 0x1a + 55fe: 4b 8d ldd r20, Y+27 ; 0x1b + 5600: 5c 8d ldd r21, Y+28 ; 0x1c + 5602: 6d 85 ldd r22, Y+13 ; 0x0d + 5604: 7e 85 ldd r23, Y+14 ; 0x0e + 5606: 8f 85 ldd r24, Y+15 ; 0x0f + 5608: 98 89 ldd r25, Y+16 ; 0x10 + 560a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 560e: 9b 01 movw r18, r22 + 5610: ac 01 movw r20, r24 + 5612: 69 81 ldd r22, Y+1 ; 0x01 + 5614: 7a 81 ldd r23, Y+2 ; 0x02 + 5616: 8b 81 ldd r24, Y+3 ; 0x03 + 5618: 9c 81 ldd r25, Y+4 ; 0x04 + 561a: c6 d6 rcall .+3468 ; 0x63a8 <__addsf3> + 561c: 69 83 std Y+1, r22 ; 0x01 + 561e: 7a 83 std Y+2, r23 ; 0x02 + 5620: 8b 83 std Y+3, r24 ; 0x03 + 5622: 9c 83 std Y+4, r25 ; 0x04 + 5624: a3 01 movw r20, r6 + 5626: 92 01 movw r18, r4 + 5628: 69 85 ldd r22, Y+9 ; 0x09 + 562a: 7a 85 ldd r23, Y+10 ; 0x0a + 562c: 8b 85 ldd r24, Y+11 ; 0x0b + 562e: 9c 85 ldd r25, Y+12 ; 0x0c + 5630: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5634: 9b 01 movw r18, r22 + 5636: ac 01 movw r20, r24 + 5638: 69 81 ldd r22, Y+1 ; 0x01 + 563a: 7a 81 ldd r23, Y+2 ; 0x02 + 563c: 8b 81 ldd r24, Y+3 ; 0x03 + 563e: 9c 81 ldd r25, Y+4 ; 0x04 + 5640: b2 d6 rcall .+3428 ; 0x63a6 <__subsf3> + 5642: a7 01 movw r20, r14 + 5644: 96 01 movw r18, r12 + 5646: b0 d6 rcall .+3424 ; 0x63a8 <__addsf3> + 5648: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 + 564c: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 + 5650: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 + 5654: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 + 5658: 40 90 9c 24 lds r4, 0x249C ; 0x80249c + 565c: 50 90 9d 24 lds r5, 0x249D ; 0x80249d + 5660: 60 90 9e 24 lds r6, 0x249E ; 0x80249e + 5664: 70 90 9f 24 lds r7, 0x249F ; 0x80249f + 5668: c0 90 a0 24 lds r12, 0x24A0 ; 0x8024a0 + 566c: d0 90 a1 24 lds r13, 0x24A1 ; 0x8024a1 + 5670: e0 90 a2 24 lds r14, 0x24A2 ; 0x8024a2 + 5674: f0 90 a3 24 lds r15, 0x24A3 ; 0x8024a3 + 5678: 29 89 ldd r18, Y+17 ; 0x11 + 567a: 3a 89 ldd r19, Y+18 ; 0x12 + 567c: 4b 89 ldd r20, Y+19 ; 0x13 + 567e: 5c 89 ldd r21, Y+20 ; 0x14 + 5680: 69 85 ldd r22, Y+9 ; 0x09 + 5682: 7a 85 ldd r23, Y+10 ; 0x0a + 5684: 8b 85 ldd r24, Y+11 ; 0x0b + 5686: 9c 85 ldd r25, Y+12 ; 0x0c + 5688: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 568c: 69 83 std Y+1, r22 ; 0x01 + 568e: 7a 83 std Y+2, r23 ; 0x02 + 5690: 8b 83 std Y+3, r24 ; 0x03 + 5692: 9c 83 std Y+4, r25 ; 0x04 + 5694: a5 01 movw r20, r10 + 5696: 94 01 movw r18, r8 + 5698: 6d 85 ldd r22, Y+13 ; 0x0d + 569a: 7e 85 ldd r23, Y+14 ; 0x0e + 569c: 8f 85 ldd r24, Y+15 ; 0x0f + 569e: 98 89 ldd r25, Y+16 ; 0x10 + 56a0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 56a4: 9b 01 movw r18, r22 + 56a6: ac 01 movw r20, r24 + 56a8: 69 81 ldd r22, Y+1 ; 0x01 + 56aa: 7a 81 ldd r23, Y+2 ; 0x02 + 56ac: 8b 81 ldd r24, Y+3 ; 0x03 + 56ae: 9c 81 ldd r25, Y+4 ; 0x04 + 56b0: 7a d6 rcall .+3316 ; 0x63a6 <__subsf3> + 56b2: 69 83 std Y+1, r22 ; 0x01 + 56b4: 7a 83 std Y+2, r23 ; 0x02 + 56b6: 8b 83 std Y+3, r24 ; 0x03 + 56b8: 9c 83 std Y+4, r25 ; 0x04 + 56ba: a3 01 movw r20, r6 + 56bc: 92 01 movw r18, r4 + 56be: 6d 81 ldd r22, Y+5 ; 0x05 + 56c0: 7e 81 ldd r23, Y+6 ; 0x06 + 56c2: 8f 81 ldd r24, Y+7 ; 0x07 + 56c4: 98 85 ldd r25, Y+8 ; 0x08 + 56c6: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 56ca: 9b 01 movw r18, r22 + 56cc: ac 01 movw r20, r24 + 56ce: 69 81 ldd r22, Y+1 ; 0x01 + 56d0: 7a 81 ldd r23, Y+2 ; 0x02 + 56d2: 8b 81 ldd r24, Y+3 ; 0x03 + 56d4: 9c 81 ldd r25, Y+4 ; 0x04 + 56d6: 68 d6 rcall .+3280 ; 0x63a8 <__addsf3> + 56d8: a7 01 movw r20, r14 + 56da: 96 01 movw r18, r12 + 56dc: 65 d6 rcall .+3274 ; 0x63a8 <__addsf3> + 56de: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 + 56e2: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 + 56e6: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 + 56ea: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 + 56ee: c0 90 9c 24 lds r12, 0x249C ; 0x80249c + 56f2: d0 90 9d 24 lds r13, 0x249D ; 0x80249d + 56f6: e0 90 9e 24 lds r14, 0x249E ; 0x80249e + 56fa: f0 90 9f 24 lds r15, 0x249F ; 0x80249f + 56fe: 29 89 ldd r18, Y+17 ; 0x11 + 5700: 3a 89 ldd r19, Y+18 ; 0x12 + 5702: 4b 89 ldd r20, Y+19 ; 0x13 + 5704: 5c 89 ldd r21, Y+20 ; 0x14 + 5706: 6d 85 ldd r22, Y+13 ; 0x0d + 5708: 7e 85 ldd r23, Y+14 ; 0x0e + 570a: 8f 85 ldd r24, Y+15 ; 0x0f + 570c: 98 89 ldd r25, Y+16 ; 0x10 + 570e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5712: 2b 01 movw r4, r22 + 5714: 3c 01 movw r6, r24 + 5716: a5 01 movw r20, r10 + 5718: 94 01 movw r18, r8 + 571a: 69 85 ldd r22, Y+9 ; 0x09 + 571c: 7a 85 ldd r23, Y+10 ; 0x0a + 571e: 8b 85 ldd r24, Y+11 ; 0x0b + 5720: 9c 85 ldd r25, Y+12 ; 0x0c + 5722: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5726: 9b 01 movw r18, r22 + 5728: ac 01 movw r20, r24 + 572a: c3 01 movw r24, r6 + 572c: b2 01 movw r22, r4 + 572e: 3c d6 rcall .+3192 ; 0x63a8 <__addsf3> + 5730: 4b 01 movw r8, r22 + 5732: 5c 01 movw r10, r24 + 5734: 29 8d ldd r18, Y+25 ; 0x19 + 5736: 3a 8d ldd r19, Y+26 ; 0x1a + 5738: 4b 8d ldd r20, Y+27 ; 0x1b + 573a: 5c 8d ldd r21, Y+28 ; 0x1c + 573c: 6d 81 ldd r22, Y+5 ; 0x05 + 573e: 7e 81 ldd r23, Y+6 ; 0x06 + 5740: 8f 81 ldd r24, Y+7 ; 0x07 + 5742: 98 85 ldd r25, Y+8 ; 0x08 + 5744: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5748: 9b 01 movw r18, r22 + 574a: ac 01 movw r20, r24 + 574c: c5 01 movw r24, r10 + 574e: b4 01 movw r22, r8 + 5750: 2a d6 rcall .+3156 ; 0x63a6 <__subsf3> + 5752: a7 01 movw r20, r14 + 5754: 96 01 movw r18, r12 + 5756: 28 d6 rcall .+3152 ; 0x63a8 <__addsf3> + 5758: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c + 575c: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d + 5760: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e + 5764: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f + 5768: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 576c: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 5770: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 5774: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 5778: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start> + 577c: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1> + 5780: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2> + 5784: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3> + 5788: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 + 578c: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 + 5790: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 + 5794: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 + 5798: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 + 579c: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 + 57a0: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 + 57a4: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 + 57a8: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 57ac: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 57b0: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 57b4: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 57b8: ed 82 std Y+5, r14 ; 0x05 + 57ba: fe 82 std Y+6, r15 ; 0x06 + 57bc: 0f 83 std Y+7, r16 ; 0x07 + 57be: 18 87 std Y+8, r17 ; 0x08 + 57c0: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 + 57c4: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 + 57c8: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 + 57cc: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 + 57d0: e9 86 std Y+9, r14 ; 0x09 + 57d2: fa 86 std Y+10, r15 ; 0x0a + 57d4: 0b 87 std Y+11, r16 ; 0x0b + 57d6: 1c 87 std Y+12, r17 ; 0x0c + 57d8: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 57dc: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 57e0: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 57e4: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 57e8: e9 82 std Y+1, r14 ; 0x01 + 57ea: fa 82 std Y+2, r15 ; 0x02 + 57ec: 0b 83 std Y+3, r16 ; 0x03 + 57ee: 1c 83 std Y+4, r17 ; 0x04 + 57f0: e0 90 9c 24 lds r14, 0x249C ; 0x80249c + 57f4: f0 90 9d 24 lds r15, 0x249D ; 0x80249d + 57f8: 00 91 9e 24 lds r16, 0x249E ; 0x80249e + 57fc: 10 91 9f 24 lds r17, 0x249F ; 0x80249f + 5800: ed 86 std Y+13, r14 ; 0x0d + 5802: fe 86 std Y+14, r15 ; 0x0e + 5804: 0f 87 std Y+15, r16 ; 0x0f + 5806: 18 8b std Y+16, r17 ; 0x10 + 5808: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 580c: 6b 01 movw r12, r22 + 580e: 7c 01 movw r14, r24 + 5810: a3 01 movw r20, r6 + 5812: 92 01 movw r18, r4 + 5814: c5 01 movw r24, r10 + 5816: b4 01 movw r22, r8 + 5818: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 581c: 9b 01 movw r18, r22 + 581e: ac 01 movw r20, r24 + 5820: c7 01 movw r24, r14 + 5822: b6 01 movw r22, r12 + 5824: c1 d5 rcall .+2946 ; 0x63a8 <__addsf3> + 5826: 4b 01 movw r8, r22 + 5828: 5c 01 movw r10, r24 + 582a: 29 85 ldd r18, Y+9 ; 0x09 + 582c: 3a 85 ldd r19, Y+10 ; 0x0a + 582e: 4b 85 ldd r20, Y+11 ; 0x0b + 5830: 5c 85 ldd r21, Y+12 ; 0x0c + 5832: 6d 81 ldd r22, Y+5 ; 0x05 + 5834: 7e 81 ldd r23, Y+6 ; 0x06 + 5836: 8f 81 ldd r24, Y+7 ; 0x07 + 5838: 98 85 ldd r25, Y+8 ; 0x08 + 583a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 583e: 9b 01 movw r18, r22 + 5840: ac 01 movw r20, r24 + 5842: c5 01 movw r24, r10 + 5844: b4 01 movw r22, r8 + 5846: b0 d5 rcall .+2912 ; 0x63a8 <__addsf3> + 5848: 4b 01 movw r8, r22 + 584a: 5c 01 movw r10, r24 + 584c: 2d 85 ldd r18, Y+13 ; 0x0d + 584e: 3e 85 ldd r19, Y+14 ; 0x0e + 5850: 4f 85 ldd r20, Y+15 ; 0x0f + 5852: 58 89 ldd r21, Y+16 ; 0x10 + 5854: 69 81 ldd r22, Y+1 ; 0x01 + 5856: 7a 81 ldd r23, Y+2 ; 0x02 + 5858: 8b 81 ldd r24, Y+3 ; 0x03 + 585a: 9c 81 ldd r25, Y+4 ; 0x04 + 585c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5860: 9b 01 movw r18, r22 + 5862: ac 01 movw r20, r24 + 5864: c5 01 movw r24, r10 + 5866: b4 01 movw r22, r8 + 5868: 9f d5 rcall .+2878 ; 0x63a8 <__addsf3> + 586a: 8b 01 movw r16, r22 + 586c: 9c 01 movw r18, r24 + 586e: 35 95 asr r19 + 5870: 27 95 ror r18 + 5872: 17 95 ror r17 + 5874: 07 95 ror r16 + 5876: 0f 2e mov r0, r31 + 5878: ff ed ldi r31, 0xDF ; 223 + 587a: cf 2e mov r12, r31 + 587c: f9 e5 ldi r31, 0x59 ; 89 + 587e: df 2e mov r13, r31 + 5880: f7 e3 ldi r31, 0x37 ; 55 + 5882: ef 2e mov r14, r31 + 5884: ff e5 ldi r31, 0x5F ; 95 + 5886: ff 2e mov r15, r31 + 5888: f0 2d mov r31, r0 + 588a: c0 1a sub r12, r16 + 588c: d1 0a sbc r13, r17 + 588e: e2 0a sbc r14, r18 + 5890: f3 0a sbc r15, r19 + 5892: 20 e0 ldi r18, 0x00 ; 0 + 5894: 30 e0 ldi r19, 0x00 ; 0 + 5896: 40 e0 ldi r20, 0x00 ; 0 + 5898: 5f e3 ldi r21, 0x3F ; 63 + 589a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 589e: a7 01 movw r20, r14 + 58a0: 96 01 movw r18, r12 + 58a2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 58a6: a7 01 movw r20, r14 + 58a8: 96 01 movw r18, r12 + 58aa: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 58ae: 9b 01 movw r18, r22 + 58b0: ac 01 movw r20, r24 + 58b2: 60 e0 ldi r22, 0x00 ; 0 + 58b4: 70 e0 ldi r23, 0x00 ; 0 + 58b6: 80 ec ldi r24, 0xC0 ; 192 + 58b8: 9f e3 ldi r25, 0x3F ; 63 + 58ba: 75 d5 rcall .+2794 ; 0x63a6 <__subsf3> + 58bc: a7 01 movw r20, r14 + 58be: 96 01 movw r18, r12 + 58c0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 58c4: 6b 01 movw r12, r22 + 58c6: 7c 01 movw r14, r24 + 58c8: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start> + 58cc: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1> + 58d0: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2> + 58d4: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3> + 58d8: a7 01 movw r20, r14 + 58da: 96 01 movw r18, r12 + 58dc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 58e0: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start> + 58e4: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1> + 58e8: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2> + 58ec: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3> + 58f0: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 + 58f4: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 + 58f8: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 + 58fc: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 + 5900: a7 01 movw r20, r14 + 5902: 96 01 movw r18, r12 + 5904: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5908: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 + 590c: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 + 5910: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 + 5914: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 + 5918: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 + 591c: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 + 5920: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 + 5924: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 + 5928: a7 01 movw r20, r14 + 592a: 96 01 movw r18, r12 + 592c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3> + 5930: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 + 5934: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 + 5938: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 + 593c: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 + 5940: 60 91 9c 24 lds r22, 0x249C ; 0x80249c + 5944: 70 91 9d 24 lds r23, 0x249D ; 0x80249d + 5948: 80 91 9e 24 lds r24, 0x249E ; 0x80249e + 594c: 90 91 9f 24 lds r25, 0x249F ; 0x80249f + 5950: a7 01 movw r20, r14 + 5952: 96 01 movw r18, r12 + 5954: f6 d7 rcall .+4076 ; 0x6942 <__mulsf3> + 5956: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c + 595a: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d + 595e: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e + 5962: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f + 5966: c8 5a subi r28, 0xA8 ; 168 + 5968: df 4f sbci r29, 0xFF ; 255 + 596a: cd bf out 0x3d, r28 ; 61 + 596c: de bf out 0x3e, r29 ; 62 + 596e: df 91 pop r29 + 5970: cf 91 pop r28 + 5972: 1f 91 pop r17 + 5974: 0f 91 pop r16 + 5976: ff 90 pop r15 + 5978: ef 90 pop r14 + 597a: df 90 pop r13 + 597c: cf 90 pop r12 + 597e: bf 90 pop r11 + 5980: af 90 pop r10 + 5982: 9f 90 pop r9 + 5984: 8f 90 pop r8 + 5986: 7f 90 pop r7 + 5988: 6f 90 pop r6 + 598a: 5f 90 pop r5 + 598c: 4f 90 pop r4 + 598e: 3f 90 pop r3 + 5990: 2f 90 pop r2 + 5992: 08 95 ret + +00005994 : + 5994: 81 e0 ldi r24, 0x01 ; 1 + 5996: 80 93 ac 24 sts 0x24AC, r24 ; 0x8024ac + 599a: 08 95 ret + +0000599c : + 599c: fc 01 movw r30, r24 + 599e: 83 81 ldd r24, Z+3 ; 0x03 + 59a0: a1 81 ldd r26, Z+1 ; 0x01 + 59a2: b2 81 ldd r27, Z+2 ; 0x02 + 59a4: 94 e0 ldi r25, 0x04 ; 4 + 59a6: 89 9f mul r24, r25 + 59a8: a0 0d add r26, r0 + 59aa: b1 1d adc r27, r1 + 59ac: 11 24 eor r1, r1 + 59ae: 1d 92 st X+, r1 + 59b0: 1d 92 st X+, r1 + 59b2: 1d 92 st X+, r1 + 59b4: 1c 92 st X, r1 + 59b6: 13 97 sbiw r26, 0x03 ; 3 + 59b8: 83 81 ldd r24, Z+3 ; 0x03 + 59ba: a1 81 ldd r26, Z+1 ; 0x01 + 59bc: b2 81 ldd r27, Z+2 ; 0x02 + 59be: 94 e0 ldi r25, 0x04 ; 4 + 59c0: 89 9f mul r24, r25 + 59c2: a0 0d add r26, r0 + 59c4: b1 1d adc r27, r1 + 59c6: 11 24 eor r1, r1 + 59c8: 4d 93 st X+, r20 + 59ca: 5d 93 st X+, r21 + 59cc: 6d 93 st X+, r22 + 59ce: 7c 93 st X, r23 + 59d0: 13 97 sbiw r26, 0x03 ; 3 + 59d2: 20 81 ld r18, Z + 59d4: 83 81 ldd r24, Z+3 ; 0x03 + 59d6: 90 e0 ldi r25, 0x00 ; 0 + 59d8: 01 96 adiw r24, 0x01 ; 1 + 59da: 62 2f mov r22, r18 + 59dc: 70 e0 ldi r23, 0x00 ; 0 + 59de: 0e 94 1a 3a call 0x7434 ; 0x7434 <__divmodhi4> + 59e2: 83 83 std Z+3, r24 ; 0x03 + 59e4: 84 81 ldd r24, Z+4 ; 0x04 + 59e6: 82 17 cp r24, r18 + 59e8: 10 f4 brcc .+4 ; 0x59ee + 59ea: 8f 5f subi r24, 0xFF ; 255 + 59ec: 84 83 std Z+4, r24 ; 0x04 + 59ee: 08 95 ret + +000059f0 : + 59f0: 4f 92 push r4 + 59f2: 5f 92 push r5 + 59f4: 6f 92 push r6 + 59f6: 7f 92 push r7 + 59f8: 8f 92 push r8 + 59fa: 9f 92 push r9 + 59fc: af 92 push r10 + 59fe: bf 92 push r11 + 5a00: cf 92 push r12 + 5a02: df 92 push r13 + 5a04: ef 92 push r14 + 5a06: ff 92 push r15 + 5a08: 0f 93 push r16 + 5a0a: 1f 93 push r17 + 5a0c: cf 93 push r28 + 5a0e: df 93 push r29 + 5a10: fc 01 movw r30, r24 + 5a12: d4 81 ldd r29, Z+4 ; 0x04 + 5a14: dd 23 and r29, r29 + 5a16: 09 f4 brne .+2 ; 0x5a1a + 5a18: 7c c0 rjmp .+248 ; 0x5b12 + 5a1a: b0 80 ld r11, Z + 5a1c: db 15 cp r29, r11 + 5a1e: 39 f0 breq .+14 ; 0x5a2e + 5a20: b1 10 cpse r11, r1 + 5a22: 53 c0 rjmp .+166 ; 0x5aca + 5a24: 80 e0 ldi r24, 0x00 ; 0 + 5a26: c1 2c mov r12, r1 + 5a28: d1 2c mov r13, r1 + 5a2a: 76 01 movw r14, r12 + 5a2c: 63 c0 rjmp .+198 ; 0x5af4 + 5a2e: 01 81 ldd r16, Z+1 ; 0x01 + 5a30: 12 81 ldd r17, Z+2 ; 0x02 + 5a32: 78 01 movw r14, r16 + 5a34: c0 e0 ldi r28, 0x00 ; 0 + 5a36: 91 2c mov r9, r1 + 5a38: 81 2c mov r8, r1 + 5a3a: f7 01 movw r30, r14 + 5a3c: 41 90 ld r4, Z+ + 5a3e: 51 90 ld r5, Z+ + 5a40: 61 90 ld r6, Z+ + 5a42: 71 90 ld r7, Z+ + 5a44: 7f 01 movw r14, r30 + 5a46: f8 01 movw r30, r16 + 5a48: 84 e0 ldi r24, 0x04 ; 4 + 5a4a: 98 9e mul r9, r24 + 5a4c: e0 0d add r30, r0 + 5a4e: f1 1d adc r31, r1 + 5a50: 11 24 eor r1, r1 + 5a52: 20 81 ld r18, Z + 5a54: 31 81 ldd r19, Z+1 ; 0x01 + 5a56: 42 81 ldd r20, Z+2 ; 0x02 + 5a58: 53 81 ldd r21, Z+3 ; 0x03 + 5a5a: c3 01 movw r24, r6 + 5a5c: b2 01 movw r22, r4 + 5a5e: 21 d7 rcall .+3650 ; 0x68a2 <__gesf2> + 5a60: 18 16 cp r1, r24 + 5a62: 8c f0 brlt .+34 ; 0x5a86 + 5a64: f8 01 movw r30, r16 + 5a66: 84 e0 ldi r24, 0x04 ; 4 + 5a68: 88 9e mul r8, r24 + 5a6a: e0 0d add r30, r0 + 5a6c: f1 1d adc r31, r1 + 5a6e: 11 24 eor r1, r1 + 5a70: 20 81 ld r18, Z + 5a72: 31 81 ldd r19, Z+1 ; 0x01 + 5a74: 42 81 ldd r20, Z+2 ; 0x02 + 5a76: 53 81 ldd r21, Z+3 ; 0x03 + 5a78: c3 01 movw r24, r6 + 5a7a: b2 01 movw r22, r4 + 5a7c: 72 d5 rcall .+2788 ; 0x6562 <__cmpsf2> + 5a7e: 88 23 and r24, r24 + 5a80: 1c f4 brge .+6 ; 0x5a88 + 5a82: 8c 2e mov r8, r28 + 5a84: 01 c0 rjmp .+2 ; 0x5a88 + 5a86: 9c 2e mov r9, r28 + 5a88: cf 5f subi r28, 0xFF ; 255 + 5a8a: dc 13 cpse r29, r28 + 5a8c: d6 cf rjmp .-84 ; 0x5a3a + 5a8e: a1 2c mov r10, r1 + 5a90: b1 2c mov r11, r1 + 5a92: c0 e0 ldi r28, 0x00 ; 0 + 5a94: c1 2c mov r12, r1 + 5a96: d1 2c mov r13, r1 + 5a98: 76 01 movw r14, r12 + 5a9a: 8c 16 cp r8, r28 + 5a9c: 71 f0 breq .+28 ; 0x5aba + 5a9e: 9c 16 cp r9, r28 + 5aa0: 61 f0 breq .+24 ; 0x5aba + 5aa2: f8 01 movw r30, r16 + 5aa4: ea 0d add r30, r10 + 5aa6: fb 1d adc r31, r11 + 5aa8: 20 81 ld r18, Z + 5aaa: 31 81 ldd r19, Z+1 ; 0x01 + 5aac: 42 81 ldd r20, Z+2 ; 0x02 + 5aae: 53 81 ldd r21, Z+3 ; 0x03 + 5ab0: c7 01 movw r24, r14 + 5ab2: b6 01 movw r22, r12 + 5ab4: 79 d4 rcall .+2290 ; 0x63a8 <__addsf3> + 5ab6: 6b 01 movw r12, r22 + 5ab8: 7c 01 movw r14, r24 + 5aba: cf 5f subi r28, 0xFF ; 255 + 5abc: e4 e0 ldi r30, 0x04 ; 4 + 5abe: ae 0e add r10, r30 + 5ac0: b1 1c adc r11, r1 + 5ac2: dc 13 cpse r29, r28 + 5ac4: ea cf rjmp .-44 ; 0x5a9a + 5ac6: 82 e0 ldi r24, 0x02 ; 2 + 5ac8: 15 c0 rjmp .+42 ; 0x5af4 + 5aca: 01 81 ldd r16, Z+1 ; 0x01 + 5acc: 12 81 ldd r17, Z+2 ; 0x02 + 5ace: c0 e0 ldi r28, 0x00 ; 0 + 5ad0: c1 2c mov r12, r1 + 5ad2: d1 2c mov r13, r1 + 5ad4: 76 01 movw r14, r12 + 5ad6: f8 01 movw r30, r16 + 5ad8: 21 91 ld r18, Z+ + 5ada: 31 91 ld r19, Z+ + 5adc: 41 91 ld r20, Z+ + 5ade: 51 91 ld r21, Z+ + 5ae0: 8f 01 movw r16, r30 + 5ae2: c7 01 movw r24, r14 + 5ae4: b6 01 movw r22, r12 + 5ae6: 60 d4 rcall .+2240 ; 0x63a8 <__addsf3> + 5ae8: 6b 01 movw r12, r22 + 5aea: 7c 01 movw r14, r24 + 5aec: cf 5f subi r28, 0xFF ; 255 + 5aee: bc 12 cpse r11, r28 + 5af0: f2 cf rjmp .-28 ; 0x5ad6 + 5af2: 80 e0 ldi r24, 0x00 ; 0 + 5af4: 6d 2f mov r22, r29 + 5af6: 70 e0 ldi r23, 0x00 ; 0 + 5af8: 68 1b sub r22, r24 + 5afa: 71 09 sbc r23, r1 + 5afc: 07 2e mov r0, r23 + 5afe: 00 0c add r0, r0 + 5b00: 88 0b sbc r24, r24 + 5b02: 99 0b sbc r25, r25 + 5b04: cd d5 rcall .+2970 ; 0x66a0 <__floatsisf> + 5b06: 9b 01 movw r18, r22 + 5b08: ac 01 movw r20, r24 + 5b0a: c7 01 movw r24, r14 + 5b0c: b6 01 movw r22, r12 + 5b0e: 2d d5 rcall .+2650 ; 0x656a <__divsf3> + 5b10: 03 c0 rjmp .+6 ; 0x5b18 + 5b12: 60 e0 ldi r22, 0x00 ; 0 + 5b14: 70 e0 ldi r23, 0x00 ; 0 + 5b16: cb 01 movw r24, r22 + 5b18: df 91 pop r29 + 5b1a: cf 91 pop r28 + 5b1c: 1f 91 pop r17 + 5b1e: 0f 91 pop r16 + 5b20: ff 90 pop r15 + 5b22: ef 90 pop r14 + 5b24: df 90 pop r13 + 5b26: cf 90 pop r12 + 5b28: bf 90 pop r11 + 5b2a: af 90 pop r10 + 5b2c: 9f 90 pop r9 + 5b2e: 8f 90 pop r8 + 5b30: 7f 90 pop r7 + 5b32: 6f 90 pop r6 + 5b34: 5f 90 pop r5 + 5b36: 4f 90 pop r4 + 5b38: 08 95 ret + +00005b3a : + 5b3a: fc 01 movw r30, r24 + 5b3c: 14 82 std Z+4, r1 ; 0x04 + 5b3e: 40 83 st Z, r20 + 5b40: 61 83 std Z+1, r22 ; 0x01 + 5b42: 72 83 std Z+2, r23 ; 0x02 + 5b44: 08 95 ret + +00005b46 : + 5b46: fc 01 movw r30, r24 + 5b48: 83 81 ldd r24, Z+3 ; 0x03 + 5b4a: a1 81 ldd r26, Z+1 ; 0x01 + 5b4c: b2 81 ldd r27, Z+2 ; 0x02 + 5b4e: 94 e0 ldi r25, 0x04 ; 4 + 5b50: 89 9f mul r24, r25 + 5b52: a0 0d add r26, r0 + 5b54: b1 1d adc r27, r1 + 5b56: 11 24 eor r1, r1 + 5b58: 1d 92 st X+, r1 + 5b5a: 1d 92 st X+, r1 + 5b5c: 1d 92 st X+, r1 + 5b5e: 1c 92 st X, r1 + 5b60: 13 97 sbiw r26, 0x03 ; 3 + 5b62: 83 81 ldd r24, Z+3 ; 0x03 + 5b64: a1 81 ldd r26, Z+1 ; 0x01 + 5b66: b2 81 ldd r27, Z+2 ; 0x02 + 5b68: 94 e0 ldi r25, 0x04 ; 4 + 5b6a: 89 9f mul r24, r25 + 5b6c: a0 0d add r26, r0 + 5b6e: b1 1d adc r27, r1 + 5b70: 11 24 eor r1, r1 + 5b72: 4d 93 st X+, r20 + 5b74: 5d 93 st X+, r21 + 5b76: 6d 93 st X+, r22 + 5b78: 7c 93 st X, r23 + 5b7a: 13 97 sbiw r26, 0x03 ; 3 + 5b7c: 20 81 ld r18, Z + 5b7e: 83 81 ldd r24, Z+3 ; 0x03 + 5b80: 90 e0 ldi r25, 0x00 ; 0 + 5b82: 01 96 adiw r24, 0x01 ; 1 + 5b84: 62 2f mov r22, r18 + 5b86: 70 e0 ldi r23, 0x00 ; 0 + 5b88: 0e 94 1a 3a call 0x7434 ; 0x7434 <__divmodhi4> + 5b8c: 83 83 std Z+3, r24 ; 0x03 + 5b8e: 84 81 ldd r24, Z+4 ; 0x04 + 5b90: 82 17 cp r24, r18 + 5b92: 10 f4 brcc .+4 ; 0x5b98 + 5b94: 8f 5f subi r24, 0xFF ; 255 + 5b96: 84 83 std Z+4, r24 ; 0x04 + 5b98: 08 95 ret + +00005b9a : + 5b9a: 4f 92 push r4 + 5b9c: 5f 92 push r5 + 5b9e: 6f 92 push r6 + 5ba0: 7f 92 push r7 + 5ba2: 8f 92 push r8 + 5ba4: 9f 92 push r9 + 5ba6: af 92 push r10 + 5ba8: bf 92 push r11 + 5baa: cf 92 push r12 + 5bac: df 92 push r13 + 5bae: ef 92 push r14 + 5bb0: ff 92 push r15 + 5bb2: 0f 93 push r16 + 5bb4: 1f 93 push r17 + 5bb6: cf 93 push r28 + 5bb8: df 93 push r29 + 5bba: fc 01 movw r30, r24 + 5bbc: d4 81 ldd r29, Z+4 ; 0x04 + 5bbe: dd 23 and r29, r29 + 5bc0: 09 f4 brne .+2 ; 0x5bc4 + 5bc2: 7c c0 rjmp .+248 ; 0x5cbc + 5bc4: b0 80 ld r11, Z + 5bc6: db 15 cp r29, r11 + 5bc8: 39 f0 breq .+14 ; 0x5bd8 + 5bca: b1 10 cpse r11, r1 + 5bcc: 53 c0 rjmp .+166 ; 0x5c74 + 5bce: 80 e0 ldi r24, 0x00 ; 0 + 5bd0: c1 2c mov r12, r1 + 5bd2: d1 2c mov r13, r1 + 5bd4: 76 01 movw r14, r12 + 5bd6: 63 c0 rjmp .+198 ; 0x5c9e + 5bd8: 01 81 ldd r16, Z+1 ; 0x01 + 5bda: 12 81 ldd r17, Z+2 ; 0x02 + 5bdc: 78 01 movw r14, r16 + 5bde: c0 e0 ldi r28, 0x00 ; 0 + 5be0: 91 2c mov r9, r1 + 5be2: 81 2c mov r8, r1 + 5be4: f7 01 movw r30, r14 + 5be6: 41 90 ld r4, Z+ + 5be8: 51 90 ld r5, Z+ + 5bea: 61 90 ld r6, Z+ + 5bec: 71 90 ld r7, Z+ + 5bee: 7f 01 movw r14, r30 + 5bf0: f8 01 movw r30, r16 + 5bf2: 84 e0 ldi r24, 0x04 ; 4 + 5bf4: 98 9e mul r9, r24 + 5bf6: e0 0d add r30, r0 + 5bf8: f1 1d adc r31, r1 + 5bfa: 11 24 eor r1, r1 + 5bfc: 20 81 ld r18, Z + 5bfe: 31 81 ldd r19, Z+1 ; 0x01 + 5c00: 42 81 ldd r20, Z+2 ; 0x02 + 5c02: 53 81 ldd r21, Z+3 ; 0x03 + 5c04: c3 01 movw r24, r6 + 5c06: b2 01 movw r22, r4 + 5c08: 4c d6 rcall .+3224 ; 0x68a2 <__gesf2> + 5c0a: 18 16 cp r1, r24 + 5c0c: 8c f0 brlt .+34 ; 0x5c30 + 5c0e: f8 01 movw r30, r16 + 5c10: 84 e0 ldi r24, 0x04 ; 4 + 5c12: 88 9e mul r8, r24 + 5c14: e0 0d add r30, r0 + 5c16: f1 1d adc r31, r1 + 5c18: 11 24 eor r1, r1 + 5c1a: 20 81 ld r18, Z + 5c1c: 31 81 ldd r19, Z+1 ; 0x01 + 5c1e: 42 81 ldd r20, Z+2 ; 0x02 + 5c20: 53 81 ldd r21, Z+3 ; 0x03 + 5c22: c3 01 movw r24, r6 + 5c24: b2 01 movw r22, r4 + 5c26: 9d d4 rcall .+2362 ; 0x6562 <__cmpsf2> + 5c28: 88 23 and r24, r24 + 5c2a: 1c f4 brge .+6 ; 0x5c32 + 5c2c: 8c 2e mov r8, r28 + 5c2e: 01 c0 rjmp .+2 ; 0x5c32 + 5c30: 9c 2e mov r9, r28 + 5c32: cf 5f subi r28, 0xFF ; 255 + 5c34: dc 13 cpse r29, r28 + 5c36: d6 cf rjmp .-84 ; 0x5be4 + 5c38: a1 2c mov r10, r1 + 5c3a: b1 2c mov r11, r1 + 5c3c: c0 e0 ldi r28, 0x00 ; 0 + 5c3e: c1 2c mov r12, r1 + 5c40: d1 2c mov r13, r1 + 5c42: 76 01 movw r14, r12 + 5c44: 8c 16 cp r8, r28 + 5c46: 71 f0 breq .+28 ; 0x5c64 + 5c48: 9c 16 cp r9, r28 + 5c4a: 61 f0 breq .+24 ; 0x5c64 + 5c4c: f8 01 movw r30, r16 + 5c4e: ea 0d add r30, r10 + 5c50: fb 1d adc r31, r11 + 5c52: 20 81 ld r18, Z + 5c54: 31 81 ldd r19, Z+1 ; 0x01 + 5c56: 42 81 ldd r20, Z+2 ; 0x02 + 5c58: 53 81 ldd r21, Z+3 ; 0x03 + 5c5a: c7 01 movw r24, r14 + 5c5c: b6 01 movw r22, r12 + 5c5e: a4 d3 rcall .+1864 ; 0x63a8 <__addsf3> + 5c60: 6b 01 movw r12, r22 + 5c62: 7c 01 movw r14, r24 + 5c64: cf 5f subi r28, 0xFF ; 255 + 5c66: e4 e0 ldi r30, 0x04 ; 4 + 5c68: ae 0e add r10, r30 + 5c6a: b1 1c adc r11, r1 + 5c6c: dc 13 cpse r29, r28 + 5c6e: ea cf rjmp .-44 ; 0x5c44 + 5c70: 82 e0 ldi r24, 0x02 ; 2 + 5c72: 15 c0 rjmp .+42 ; 0x5c9e + 5c74: 01 81 ldd r16, Z+1 ; 0x01 + 5c76: 12 81 ldd r17, Z+2 ; 0x02 + 5c78: c0 e0 ldi r28, 0x00 ; 0 + 5c7a: c1 2c mov r12, r1 + 5c7c: d1 2c mov r13, r1 + 5c7e: 76 01 movw r14, r12 + 5c80: f8 01 movw r30, r16 + 5c82: 21 91 ld r18, Z+ + 5c84: 31 91 ld r19, Z+ + 5c86: 41 91 ld r20, Z+ + 5c88: 51 91 ld r21, Z+ + 5c8a: 8f 01 movw r16, r30 + 5c8c: c7 01 movw r24, r14 + 5c8e: b6 01 movw r22, r12 + 5c90: 8b d3 rcall .+1814 ; 0x63a8 <__addsf3> + 5c92: 6b 01 movw r12, r22 + 5c94: 7c 01 movw r14, r24 + 5c96: cf 5f subi r28, 0xFF ; 255 + 5c98: bc 12 cpse r11, r28 + 5c9a: f2 cf rjmp .-28 ; 0x5c80 + 5c9c: 80 e0 ldi r24, 0x00 ; 0 + 5c9e: 6d 2f mov r22, r29 + 5ca0: 70 e0 ldi r23, 0x00 ; 0 + 5ca2: 68 1b sub r22, r24 + 5ca4: 71 09 sbc r23, r1 + 5ca6: 07 2e mov r0, r23 + 5ca8: 00 0c add r0, r0 + 5caa: 88 0b sbc r24, r24 + 5cac: 99 0b sbc r25, r25 + 5cae: f8 d4 rcall .+2544 ; 0x66a0 <__floatsisf> + 5cb0: 9b 01 movw r18, r22 + 5cb2: ac 01 movw r20, r24 + 5cb4: c7 01 movw r24, r14 + 5cb6: b6 01 movw r22, r12 + 5cb8: 58 d4 rcall .+2224 ; 0x656a <__divsf3> + 5cba: 03 c0 rjmp .+6 ; 0x5cc2 + 5cbc: 60 e0 ldi r22, 0x00 ; 0 + 5cbe: 70 e0 ldi r23, 0x00 ; 0 + 5cc0: cb 01 movw r24, r22 + 5cc2: df 91 pop r29 + 5cc4: cf 91 pop r28 + 5cc6: 1f 91 pop r17 + 5cc8: 0f 91 pop r16 + 5cca: ff 90 pop r15 + 5ccc: ef 90 pop r14 + 5cce: df 90 pop r13 + 5cd0: cf 90 pop r12 + 5cd2: bf 90 pop r11 + 5cd4: af 90 pop r10 + 5cd6: 9f 90 pop r9 + 5cd8: 8f 90 pop r8 + 5cda: 7f 90 pop r7 + 5cdc: 6f 90 pop r6 + 5cde: 5f 90 pop r5 + 5ce0: 4f 90 pop r4 + 5ce2: 08 95 ret + +00005ce4 : + 5ce4: fc 01 movw r30, r24 + 5ce6: 14 82 std Z+4, r1 ; 0x04 + 5ce8: 40 83 st Z, r20 + 5cea: 61 83 std Z+1, r22 ; 0x01 + 5cec: 72 83 std Z+2, r23 ; 0x02 + 5cee: 08 95 ret + +00005cf0 : + 5cf0: 10 92 ac 24 sts 0x24AC, r1 ; 0x8024ac + 5cf4: 20 e2 ldi r18, 0x20 ; 32 + 5cf6: 30 e0 ldi r19, 0x00 ; 0 + 5cf8: 42 e0 ldi r20, 0x02 ; 2 + 5cfa: 64 e0 ldi r22, 0x04 ; 4 + 5cfc: 8d ea ldi r24, 0xAD ; 173 + 5cfe: 94 e2 ldi r25, 0x24 ; 36 + 5d00: 0e 94 e7 12 call 0x25ce ; 0x25ce + 5d04: 64 e6 ldi r22, 0x64 ; 100 + 5d06: 8d ea ldi r24, 0xAD ; 173 + 5d08: 94 e2 ldi r25, 0x24 ; 36 + 5d0a: 0e 94 c1 13 call 0x2782 ; 0x2782 + 5d0e: e0 91 ad 24 lds r30, 0x24AD ; 0x8024ad + 5d12: f0 91 ae 24 lds r31, 0x24AE ; 0x8024ae + 5d16: 86 81 ldd r24, Z+6 ; 0x06 + 5d18: 8c 7f andi r24, 0xFC ; 252 + 5d1a: 86 83 std Z+6, r24 ; 0x06 + 5d1c: 86 81 ldd r24, Z+6 ; 0x06 + 5d1e: 81 60 ori r24, 0x01 ; 1 + 5d20: 86 83 std Z+6, r24 ; 0x06 + 5d22: 6a ec ldi r22, 0xCA ; 202 + 5d24: 7c e2 ldi r23, 0x2C ; 44 + 5d26: cf 01 movw r24, r30 + 5d28: 0c 94 7b 0d jmp 0x1af6 ; 0x1af6 + 5d2c: 08 95 ret + +00005d2e : + 5d2e: 80 e0 ldi r24, 0x00 ; 0 + 5d30: 0c 94 29 16 jmp 0x2c52 ; 0x2c52 + 5d34: 08 95 ret + +00005d36 : + 5d36: 80 91 ac 24 lds r24, 0x24AC ; 0x8024ac + 5d3a: 08 95 ret + +00005d3c <__vector_16>: + 5d3c: 1f 92 push r1 + 5d3e: 0f 92 push r0 + 5d40: 0f b6 in r0, 0x3f ; 63 + 5d42: 0f 92 push r0 + 5d44: 11 24 eor r1, r1 + 5d46: 08 b6 in r0, 0x38 ; 56 + 5d48: 0f 92 push r0 + 5d4a: 18 be out 0x38, r1 ; 56 + 5d4c: 2f 93 push r18 + 5d4e: 3f 93 push r19 + 5d50: 4f 93 push r20 + 5d52: 5f 93 push r21 + 5d54: 6f 93 push r22 + 5d56: 7f 93 push r23 + 5d58: 8f 93 push r24 + 5d5a: 9f 93 push r25 + 5d5c: af 93 push r26 + 5d5e: 20 91 a4 29 lds r18, 0x29A4 ; 0x8029a4 + 5d62: 30 91 a5 29 lds r19, 0x29A5 ; 0x8029a5 + 5d66: 40 91 a6 29 lds r20, 0x29A6 ; 0x8029a6 + 5d6a: 50 91 a7 29 lds r21, 0x29A7 ; 0x8029a7 + 5d6e: 60 91 a8 29 lds r22, 0x29A8 ; 0x8029a8 + 5d72: 70 91 a9 29 lds r23, 0x29A9 ; 0x8029a9 + 5d76: 80 91 aa 29 lds r24, 0x29AA ; 0x8029aa + 5d7a: 90 91 ab 29 lds r25, 0x29AB ; 0x8029ab + 5d7e: a1 e0 ldi r26, 0x01 ; 1 + 5d80: 0e 94 67 3a call 0x74ce ; 0x74ce <__adddi3_s8> + 5d84: 20 93 a4 29 sts 0x29A4, r18 ; 0x8029a4 + 5d88: 30 93 a5 29 sts 0x29A5, r19 ; 0x8029a5 + 5d8c: 40 93 a6 29 sts 0x29A6, r20 ; 0x8029a6 + 5d90: 50 93 a7 29 sts 0x29A7, r21 ; 0x8029a7 + 5d94: 60 93 a8 29 sts 0x29A8, r22 ; 0x8029a8 + 5d98: 70 93 a9 29 sts 0x29A9, r23 ; 0x8029a9 + 5d9c: 80 93 aa 29 sts 0x29AA, r24 ; 0x8029aa + 5da0: 90 93 ab 29 sts 0x29AB, r25 ; 0x8029ab + 5da4: af 91 pop r26 + 5da6: 9f 91 pop r25 + 5da8: 8f 91 pop r24 + 5daa: 7f 91 pop r23 + 5dac: 6f 91 pop r22 + 5dae: 5f 91 pop r21 + 5db0: 4f 91 pop r20 + 5db2: 3f 91 pop r19 + 5db4: 2f 91 pop r18 + 5db6: 0f 90 pop r0 + 5db8: 08 be out 0x38, r0 ; 56 + 5dba: 0f 90 pop r0 + 5dbc: 0f be out 0x3f, r0 ; 63 + 5dbe: 0f 90 pop r0 + 5dc0: 1f 90 pop r1 + 5dc2: 18 95 reti + +00005dc4 : + 5dc4: 8f 92 push r8 + 5dc6: 9f 92 push r9 + 5dc8: af 92 push r10 + 5dca: bf 92 push r11 + 5dcc: cf 92 push r12 + 5dce: df 92 push r13 + 5dd0: ef 92 push r14 + 5dd2: ff 92 push r15 + 5dd4: 0f 93 push r16 + 5dd6: 1f 93 push r17 + 5dd8: cf 93 push r28 + 5dda: df 93 push r29 + 5ddc: fc 01 movw r30, r24 + 5dde: 01 90 ld r0, Z+ + 5de0: 00 20 and r0, r0 + 5de2: e9 f7 brne .-6 ; 0x5dde + 5de4: 31 97 sbiw r30, 0x01 ; 1 + 5de6: 7f 01 movw r14, r30 + 5de8: e8 1a sub r14, r24 + 5dea: f9 0a sbc r15, r25 + 5dec: 47 01 movw r8, r14 + 5dee: 1e 14 cp r1, r14 + 5df0: 1f 04 cpc r1, r15 + 5df2: 0c f0 brlt .+2 ; 0x5df6 + 5df4: 43 c0 rjmp .+134 ; 0x5e7c + 5df6: 6c 01 movw r12, r24 + 5df8: 10 e0 ldi r17, 0x00 ; 0 + 5dfa: a1 2c mov r10, r1 + 5dfc: b1 2c mov r11, r1 + 5dfe: 00 e0 ldi r16, 0x00 ; 0 + 5e00: f6 01 movw r30, r12 + 5e02: e1 0f add r30, r17 + 5e04: f1 1d adc r31, r1 + 5e06: c0 81 ld r28, Z + 5e08: 8c 2f mov r24, r28 + 5e0a: 0c 2e mov r0, r28 + 5e0c: 00 0c add r0, r0 + 5e0e: 99 0b sbc r25, r25 + 5e10: c0 97 sbiw r24, 0x30 ; 48 + 5e12: 0a 97 sbiw r24, 0x0a ; 10 + 5e14: 38 f0 brcs .+14 ; 0x5e24 + 5e16: cd 32 cpi r28, 0x2D ; 45 + 5e18: 21 f5 brne .+72 ; 0x5e62 + 5e1a: 81 e0 ldi r24, 0x01 ; 1 + 5e1c: e8 1a sub r14, r24 + 5e1e: f1 08 sbc r15, r1 + 5e20: 01 e0 ldi r16, 0x01 ; 1 + 5e22: 1f c0 rjmp .+62 ; 0x5e62 + 5e24: 81 e0 ldi r24, 0x01 ; 1 + 5e26: e8 1a sub r14, r24 + 5e28: f1 08 sbc r15, r1 + 5e2a: b7 01 movw r22, r14 + 5e2c: 0f 2c mov r0, r15 + 5e2e: 00 0c add r0, r0 + 5e30: 88 0b sbc r24, r24 + 5e32: 99 0b sbc r25, r25 + 5e34: 35 d4 rcall .+2154 ; 0x66a0 <__floatsisf> + 5e36: 9b 01 movw r18, r22 + 5e38: ac 01 movw r20, r24 + 5e3a: 60 e0 ldi r22, 0x00 ; 0 + 5e3c: 70 e0 ldi r23, 0x00 ; 0 + 5e3e: 80 e2 ldi r24, 0x20 ; 32 + 5e40: 91 e4 ldi r25, 0x41 ; 65 + 5e42: e2 d5 rcall .+3012 ; 0x6a08 + 5e44: 2d d6 rcall .+3162 ; 0x6aa0 + 5e46: 0c 2e mov r0, r28 + 5e48: 00 0c add r0, r0 + 5e4a: dd 0b sbc r29, r29 + 5e4c: e0 97 sbiw r28, 0x30 ; 48 + 5e4e: f5 d3 rcall .+2026 ; 0x663a <__fixsfsi> + 5e50: c6 9f mul r28, r22 + 5e52: 90 01 movw r18, r0 + 5e54: c7 9f mul r28, r23 + 5e56: 30 0d add r19, r0 + 5e58: d6 9f mul r29, r22 + 5e5a: 30 0d add r19, r0 + 5e5c: 11 24 eor r1, r1 + 5e5e: a2 0e add r10, r18 + 5e60: b3 1e adc r11, r19 + 5e62: 1f 5f subi r17, 0xFF ; 255 + 5e64: 81 2f mov r24, r17 + 5e66: 90 e0 ldi r25, 0x00 ; 0 + 5e68: 88 15 cp r24, r8 + 5e6a: 99 05 cpc r25, r9 + 5e6c: 4c f2 brlt .-110 ; 0x5e00 + 5e6e: 00 23 and r16, r16 + 5e70: 41 f0 breq .+16 ; 0x5e82 + 5e72: 88 27 eor r24, r24 + 5e74: 99 27 eor r25, r25 + 5e76: 8a 19 sub r24, r10 + 5e78: 9b 09 sbc r25, r11 + 5e7a: 04 c0 rjmp .+8 ; 0x5e84 + 5e7c: 80 e0 ldi r24, 0x00 ; 0 + 5e7e: 90 e0 ldi r25, 0x00 ; 0 + 5e80: 01 c0 rjmp .+2 ; 0x5e84 + 5e82: c5 01 movw r24, r10 + 5e84: df 91 pop r29 + 5e86: cf 91 pop r28 + 5e88: 1f 91 pop r17 + 5e8a: 0f 91 pop r16 + 5e8c: ff 90 pop r15 + 5e8e: ef 90 pop r14 + 5e90: df 90 pop r13 + 5e92: cf 90 pop r12 + 5e94: bf 90 pop r11 + 5e96: af 90 pop r10 + 5e98: 9f 90 pop r9 + 5e9a: 8f 90 pop r8 + 5e9c: 08 95 ret + +00005e9e : + static twi_options_t twi_conf = + { + .speed = TWI_SPEED, + .speed_reg = TWI_BAUD(32000000, TWI_SPEED) + }; + twi_master_init(TWI_MASTER, &twi_conf); + 5e9e: 68 e0 ldi r22, 0x08 ; 8 + 5ea0: 70 e2 ldi r23, 0x20 ; 32 + 5ea2: 80 eb ldi r24, 0xB0 ; 176 + 5ea4: 94 e0 ldi r25, 0x04 ; 4 + 5ea6: 0e 94 21 0f call 0x1e42 ; 0x1e42 + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_master_enable(TWI_t *twi) +{ + twi->MASTER.CTRLA |= TWI_MASTER_ENABLE_bm; + 5eaa: e0 eb ldi r30, 0xB0 ; 176 + 5eac: f4 e0 ldi r31, 0x04 ; 4 + 5eae: 81 81 ldd r24, Z+1 ; 0x01 + 5eb0: 88 60 ori r24, 0x08 ; 8 + 5eb2: 81 83 std Z+1, r24 ; 0x01 + twi_master_enable(TWI_MASTER); + univ_pkt.no_wait = true; + 5eb4: e4 ef ldi r30, 0xF4 ; 244 + 5eb6: f4 e2 ldi r31, 0x24 ; 36 + 5eb8: 81 e0 ldi r24, 0x01 ; 1 + 5eba: 82 87 std Z+10, r24 ; 0x0a + univ_pkt.addr_length = 1; + 5ebc: 81 e0 ldi r24, 0x01 ; 1 + 5ebe: 90 e0 ldi r25, 0x00 ; 0 + 5ec0: 84 83 std Z+4, r24 ; 0x04 + 5ec2: 95 83 std Z+5, r25 ; 0x05 + univ_pkt.length = 1; + 5ec4: 80 87 std Z+8, r24 ; 0x08 + 5ec6: 91 87 std Z+9, r25 ; 0x09 + univ_pkt.buffer = buffer; + 5ec8: 84 eb ldi r24, 0xB4 ; 180 + 5eca: 94 e2 ldi r25, 0x24 ; 36 + 5ecc: 86 83 std Z+6, r24 ; 0x06 + 5ece: 97 83 std Z+7, r25 ; 0x07 + 5ed0: 08 95 ret + +00005ed2 : + //swprintf(SWDEBUG, "TWI INIT SUCCESS\n"); +} + +void twi_write(uint8_t slave_address, uint8_t regi, uint8_t data) +{ + univ_pkt.chip = slave_address; + 5ed2: e4 ef ldi r30, 0xF4 ; 244 + 5ed4: f4 e2 ldi r31, 0x24 ; 36 + 5ed6: 80 83 st Z, r24 + univ_pkt.addr[0] = regi; + 5ed8: 61 83 std Z+1, r22 ; 0x01 + buffer[0] = data; + 5eda: 40 93 b4 24 sts 0x24B4, r20 ; 0x8024b4 + univ_pkt.length = 1; + 5ede: 81 e0 ldi r24, 0x01 ; 1 + 5ee0: 90 e0 ldi r25, 0x00 ; 0 + 5ee2: 80 87 std Z+8, r24 ; 0x08 + 5ee4: 91 87 std Z+9, r25 ; 0x09 + * \return STATUS_OK If all bytes were written, error code otherwise + */ +static inline status_code_t twi_master_write(TWI_t *twi, + const twi_package_t *package) +{ + return twi_master_transfer (twi, package, false); + 5ee6: 40 e0 ldi r20, 0x00 ; 0 + 5ee8: bf 01 movw r22, r30 + 5eea: 80 eb ldi r24, 0xB0 ; 176 + 5eec: 94 e0 ldi r25, 0x04 ; 4 + 5eee: 0c 94 36 0f jmp 0x1e6c ; 0x1e6c + 5ef2: 08 95 ret + +00005ef4 : + twi_master_write(TWI_MASTER, &univ_pkt); +} + +void twi_read(uint8_t slave_address, uint8_t regi, uint8_t data_length, uint8_t* dataBuffer) +{ + 5ef4: 0f 93 push r16 + 5ef6: 1f 93 push r17 + 5ef8: cf 93 push r28 + 5efa: c4 2f mov r28, r20 + 5efc: 89 01 movw r16, r18 + univ_pkt.chip = slave_address; + 5efe: e4 ef ldi r30, 0xF4 ; 244 + 5f00: f4 e2 ldi r31, 0x24 ; 36 + 5f02: 80 83 st Z, r24 + univ_pkt.addr[0] = regi; + 5f04: 61 83 std Z+1, r22 ; 0x01 + univ_pkt.length = data_length; + 5f06: 84 2f mov r24, r20 + 5f08: 90 e0 ldi r25, 0x00 ; 0 + 5f0a: 80 87 std Z+8, r24 ; 0x08 + 5f0c: 91 87 std Z+9, r25 ; 0x09 + * \return STATUS_OK If all bytes were read, error code otherwise + */ +static inline status_code_t twi_master_read(TWI_t *twi, + const twi_package_t *package) +{ + return twi_master_transfer (twi, package, true); + 5f0e: 41 e0 ldi r20, 0x01 ; 1 + 5f10: bf 01 movw r22, r30 + 5f12: 80 eb ldi r24, 0xB0 ; 176 + 5f14: 94 e0 ldi r25, 0x04 ; 4 + 5f16: 0e 94 36 0f call 0x1e6c ; 0x1e6c + twi_master_read(TWI_MASTER, &univ_pkt); + for(uint8_t x = 0; x < data_length; x++) + 5f1a: cc 23 and r28, r28 + 5f1c: 81 f0 breq .+32 ; 0x5f3e + 5f1e: a4 eb ldi r26, 0xB4 ; 180 + 5f20: b4 e2 ldi r27, 0x24 ; 36 + 5f22: f8 01 movw r30, r16 + 5f24: c1 50 subi r28, 0x01 ; 1 + 5f26: 2c 2f mov r18, r28 + 5f28: 30 e0 ldi r19, 0x00 ; 0 + 5f2a: 2f 5f subi r18, 0xFF ; 255 + 5f2c: 3f 4f sbci r19, 0xFF ; 255 + 5f2e: 20 0f add r18, r16 + 5f30: 31 1f adc r19, r17 + { + dataBuffer[x] = 0; + 5f32: 10 82 st Z, r1 + dataBuffer[x] = buffer[x]; + 5f34: 8d 91 ld r24, X+ + 5f36: 81 93 st Z+, r24 +{ + univ_pkt.chip = slave_address; + univ_pkt.addr[0] = regi; + univ_pkt.length = data_length; + twi_master_read(TWI_MASTER, &univ_pkt); + for(uint8_t x = 0; x < data_length; x++) + 5f38: e2 17 cp r30, r18 + 5f3a: f3 07 cpc r31, r19 + 5f3c: d1 f7 brne .-12 ; 0x5f32 + { + dataBuffer[x] = 0; + dataBuffer[x] = buffer[x]; + } +} + 5f3e: cf 91 pop r28 + 5f40: 1f 91 pop r17 + 5f42: 0f 91 pop r16 + 5f44: 08 95 ret + +00005f46 : + //usart_init_rs232(USART_GPS, &gps_uart_conf); + //enable interrupts for incoming messages through usart + usart_set_rx_interrupt_level(USART_XBEE, USART_INT_LVL_HI); + //uncomment if file system is implemented with open logger + //usart_set_rx_interrupt_level(USART_OPENLOGGER, USART_INT_LVL_HI); + //usart_set_rx_interrupt_level(USART_GPS, USART_INT_LVL_MED); + 5f46: ef 92 push r14 + 5f48: ff 92 push r15 + 5f4a: 0f 93 push r16 + 5f4c: 1f 93 push r17 + 5f4e: cf 93 push r28 + 5f50: df 93 push r29 + 5f52: cd b7 in r28, 0x3d ; 61 + 5f54: de b7 in r29, 0x3e ; 62 + 5f56: da 95 dec r29 + 5f58: cd bf out 0x3d, r28 ; 61 + 5f5a: de bf out 0x3e, r29 ; 62 + 5f5c: c6 5f subi r28, 0xF6 ; 246 + 5f5e: de 4f sbci r29, 0xFE ; 254 + 5f60: e8 80 ld r14, Y + 5f62: f9 80 ldd r15, Y+1 ; 0x01 + 5f64: ca 50 subi r28, 0x0A ; 10 + 5f66: d1 40 sbci r29, 0x01 ; 1 + //swprintf(SWDEBUG, "USART ONLINE\n"); +} + +void sw_rs232_printf(USART_t* usart_channel, const char* text, ...) + 5f68: ae 01 movw r20, r28 + 5f6a: 42 5f subi r20, 0xF2 ; 242 + 5f6c: 5e 4f sbci r21, 0xFE ; 254 + 5f6e: c4 5f subi r28, 0xF4 ; 244 + 5f70: de 4f sbci r29, 0xFE ; 254 + 5f72: 68 81 ld r22, Y + 5f74: 79 81 ldd r23, Y+1 ; 0x01 + 5f76: cc 50 subi r28, 0x0C ; 12 + 5f78: d1 40 sbci r29, 0x01 ; 1 + 5f7a: ce 01 movw r24, r28 + 5f7c: 01 96 adiw r24, 0x01 ; 1 + 5f7e: 0e 94 9d 3b call 0x773a ; 0x773a +{ + char write_buffer[256]; + va_list args; + va_start(args, text); + vsprintf(write_buffer, text, args); + 5f82: 69 81 ldd r22, Y+1 ; 0x01 + 5f84: 66 23 and r22, r22 + 5f86: 59 f0 breq .+22 ; 0x5f9e + 5f88: 8e 01 movw r16, r28 + 5f8a: 0e 5f subi r16, 0xFE ; 254 + 5f8c: 1f 4f sbci r17, 0xFF ; 255 + va_end(args); + //must make const string because hacky syntax below only works with const string + 5f8e: c7 01 movw r24, r14 + 5f90: 0e 94 9a 0f call 0x1f34 ; 0x1f34 +void sw_rs232_printf(USART_t* usart_channel, const char* text, ...) +{ + char write_buffer[256]; + va_list args; + va_start(args, text); + vsprintf(write_buffer, text, args); + 5f94: f8 01 movw r30, r16 + 5f96: 61 91 ld r22, Z+ + 5f98: 8f 01 movw r16, r30 + 5f9a: 61 11 cpse r22, r1 + 5f9c: f8 cf rjmp .-16 ; 0x5f8e + va_end(args); + //must make const string because hacky syntax below only works with const string + const char* p_wb = write_buffer; + //this syntax is hacky and I don't like it, BUT it cuts down on code and saves me time. I'll clean it up if I have time + 5f9e: d3 95 inc r29 + 5fa0: cd bf out 0x3d, r28 ; 61 + 5fa2: de bf out 0x3e, r29 ; 62 + 5fa4: df 91 pop r29 + 5fa6: cf 91 pop r28 + 5fa8: 1f 91 pop r17 + 5faa: 0f 91 pop r16 + 5fac: ff 90 pop r15 + 5fae: ef 90 pop r14 + 5fb0: 08 95 ret + +00005fb2 : +static void sw_rs232_printf(USART_t* usart_channel, const char* text, ...); + +void usart_comms_init() +{ + //set our global swprintf function to use our local and private sw_rs232_printf function + swprintf = &sw_rs232_printf; + 5fb2: 83 ea ldi r24, 0xA3 ; 163 + 5fb4: 9f e2 ldi r25, 0x2F ; 47 + 5fb6: 80 93 3d 25 sts 0x253D, r24 ; 0x80253d + 5fba: 90 93 3e 25 sts 0x253E, r25 ; 0x80253e + .stopbits = true, + .paritytype = USART_PMODE_DISABLED_gc, + .charlength = USART_CHSIZE_8BIT_gc + }; + static usart_rs232_options_t openlogger_uart_conf = + { + 5fbe: 61 e1 ldi r22, 0x11 ; 17 + 5fc0: 70 e2 ldi r23, 0x20 ; 32 + 5fc2: 80 ea ldi r24, 0xA0 ; 160 + 5fc4: 98 e0 ldi r25, 0x08 ; 8 + 5fc6: 0e 94 bb 10 call 0x2176 ; 0x2176 + 5fca: e0 ea ldi r30, 0xA0 ; 160 + 5fcc: f8 e0 ldi r31, 0x08 ; 8 + 5fce: 83 81 ldd r24, Z+3 ; 0x03 + 5fd0: 80 63 ori r24, 0x30 ; 48 + 5fd2: 83 83 std Z+3, r24 ; 0x03 + 5fd4: 08 95 ret + +00005fd6 <__vector_25>: + //must make const string because hacky syntax below only works with const string + const char* p_wb = write_buffer; + //this syntax is hacky and I don't like it, BUT it cuts down on code and saves me time. I'll clean it up if I have time + while(*p_wb) + { + usart_putchar(usart_channel, *p_wb++); + 5fd6: 1f 92 push r1 + 5fd8: 0f 92 push r0 + 5fda: 0f b6 in r0, 0x3f ; 63 + 5fdc: 0f 92 push r0 + 5fde: 11 24 eor r1, r1 + 5fe0: 08 b6 in r0, 0x38 ; 56 + 5fe2: 0f 92 push r0 + 5fe4: 18 be out 0x38, r1 ; 56 + 5fe6: 09 b6 in r0, 0x39 ; 57 + 5fe8: 0f 92 push r0 + 5fea: 19 be out 0x39, r1 ; 57 + 5fec: 0b b6 in r0, 0x3b ; 59 + 5fee: 0f 92 push r0 + 5ff0: 1b be out 0x3b, r1 ; 59 + 5ff2: 2f 93 push r18 + 5ff4: 3f 93 push r19 + 5ff6: 4f 93 push r20 + 5ff8: 5f 93 push r21 + 5ffa: 6f 93 push r22 + 5ffc: 7f 93 push r23 + 5ffe: 8f 93 push r24 + 6000: 9f 93 push r25 + 6002: af 93 push r26 + 6004: bf 93 push r27 + 6006: ef 93 push r30 + 6008: ff 93 push r31 + } + 600a: 80 ea ldi r24, 0xA0 ; 160 + 600c: 98 e0 ldi r25, 0x08 ; 8 + 600e: 0e 94 a2 0f call 0x1f44 ; 0x1f44 + 6012: 80 93 ac 29 sts 0x29AC, r24 ; 0x8029ac +} + + 6016: 80 91 ac 29 lds r24, 0x29AC ; 0x8029ac + 601a: 80 36 cpi r24, 0x60 ; 96 + 601c: 11 f4 brne .+4 ; 0x6022 <__vector_25+0x4c> +ISR(USARTC0_RXC_vect) +{ + 601e: 0e 94 65 12 call 0x24ca ; 0x24ca + xbee_response_temp = usart_getchar(USART_XBEE); + //usart_putchar(USART_XBEE, '!'); + if(xbee_response_temp == 'k') + 6022: ff 91 pop r31 + 6024: ef 91 pop r30 + 6026: bf 91 pop r27 + 6028: af 91 pop r26 + 602a: 9f 91 pop r25 + 602c: 8f 91 pop r24 + 602e: 7f 91 pop r23 + 6030: 6f 91 pop r22 + 6032: 5f 91 pop r21 + 6034: 4f 91 pop r20 + 6036: 3f 91 pop r19 + 6038: 2f 91 pop r18 + 603a: 0f 90 pop r0 + 603c: 0b be out 0x3b, r0 ; 59 + 603e: 0f 90 pop r0 + 6040: 09 be out 0x39, r0 ; 57 + 6042: 0f 90 pop r0 + 6044: 08 be out 0x38, r0 ; 56 + 6046: 0f 90 pop r0 + 6048: 0f be out 0x3f, r0 ; 63 + 604a: 0f 90 pop r0 + 604c: 1f 90 pop r1 + 604e: 18 95 reti + +00006050 : +#include "ioport_compat.h" + +#if defined(IOPORT_XMEGA_COMPAT) +void ioport_configure_port_pin(void *port, pin_mask_t pin_mask, + port_pin_flags_t flags) +{ + 6050: cf 93 push r28 + 6052: df 93 push r29 + 6054: fc 01 movw r30, r24 + uint8_t pin; + + for (pin = 0; pin < 8; pin++) { + if (pin_mask & (1 << pin)) { + *((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8; + 6056: 20 e0 ldi r18, 0x00 ; 0 + 6058: 30 e0 ldi r19, 0x00 ; 0 + port_pin_flags_t flags) +{ + uint8_t pin; + + for (pin = 0; pin < 8; pin++) { + if (pin_mask & (1 << pin)) { + 605a: c6 2f mov r28, r22 + 605c: d0 e0 ldi r29, 0x00 ; 0 + 605e: de 01 movw r26, r28 + 6060: 02 2e mov r0, r18 + 6062: 02 c0 rjmp .+4 ; 0x6068 + 6064: b5 95 asr r27 + 6066: a7 95 ror r26 + 6068: 0a 94 dec r0 + 606a: e2 f7 brpl .-8 ; 0x6064 + 606c: a0 fd sbrc r26, 0 + *((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8; + 606e: 50 8b std Z+16, r21 ; 0x10 + 6070: 2f 5f subi r18, 0xFF ; 255 + 6072: 3f 4f sbci r19, 0xFF ; 255 + 6074: 31 96 adiw r30, 0x01 ; 1 +void ioport_configure_port_pin(void *port, pin_mask_t pin_mask, + port_pin_flags_t flags) +{ + uint8_t pin; + + for (pin = 0; pin < 8; pin++) { + 6076: 28 30 cpi r18, 0x08 ; 8 + 6078: 31 05 cpc r19, r1 + 607a: 89 f7 brne .-30 ; 0x605e + if (pin_mask & (1 << pin)) { + *((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8; + } + } + /* Select direction and initial pin state */ + if (flags & IOPORT_DIR_OUTPUT) { + 607c: 40 ff sbrs r20, 0 + 607e: 0a c0 rjmp .+20 ; 0x6094 + if (flags & IOPORT_INIT_HIGH) { + 6080: 41 ff sbrs r20, 1 + 6082: 03 c0 rjmp .+6 ; 0x608a + *((uint8_t *)port + PORT_OUTSET) = pin_mask; + 6084: fc 01 movw r30, r24 + 6086: 65 83 std Z+5, r22 ; 0x05 + 6088: 02 c0 rjmp .+4 ; 0x608e + } else { + *((uint8_t *)port + PORT_OUTCLR) = pin_mask; + 608a: fc 01 movw r30, r24 + 608c: 66 83 std Z+6, r22 ; 0x06 + } + + *((uint8_t *)port + PORT_DIRSET) = pin_mask; + 608e: fc 01 movw r30, r24 + 6090: 61 83 std Z+1, r22 ; 0x01 + 6092: 02 c0 rjmp .+4 ; 0x6098 + } else { + *((uint8_t *)port + PORT_DIRCLR) = pin_mask; + 6094: fc 01 movw r30, r24 + 6096: 62 83 std Z+2, r22 ; 0x02 + } +} + 6098: df 91 pop r29 + 609a: cf 91 pop r28 + 609c: 08 95 ret + +0000609e : + * \param flags Bitmask of flags specifying additional configuration + * parameters. + */ +static inline void ioport_configure_pin(port_pin_t pin, port_pin_flags_t flags) +{ + ioport_configure_port_pin(arch_ioport_pin_to_base(pin), + 609e: 43 e0 ldi r20, 0x03 ; 3 + 60a0: 50 e0 ldi r21, 0x00 ; 0 + 60a2: 68 e0 ldi r22, 0x08 ; 8 + 60a4: 80 ec ldi r24, 0xC0 ; 192 + 60a6: 97 e0 ldi r25, 0x07 ; 7 + 60a8: d3 df rcall .-90 ; 0x6050 + 60aa: 40 e0 ldi r20, 0x00 ; 0 + 60ac: 58 e1 ldi r21, 0x18 ; 24 + 60ae: 64 e0 ldi r22, 0x04 ; 4 + 60b0: 80 ec ldi r24, 0xC0 ; 192 + 60b2: 97 e0 ldi r25, 0x07 ; 7 + 60b4: cd cf rjmp .-102 ; 0x6050 + 60b6: 08 95 ret + +000060b8 : +{ + sw_state_manager = SW_STANDBY; + sensor_ready_status = 0b11100000; + //initialize all function pointers to avoid oopsies + swprintf = NULL; + //chip init + 60b8: cf 92 push r12 + 60ba: df 92 push r13 + 60bc: ef 92 push r14 + 60be: ff 92 push r15 + 60c0: 6b 01 movw r12, r22 + 60c2: 7c 01 movw r14, r24 + board_init(); + 60c4: 0e 94 6c 1e call 0x3cd8 ; 0x3cd8 + 60c8: a7 01 movw r20, r14 + 60ca: 96 01 movw r18, r12 + 60cc: 6c d1 rcall .+728 ; 0x63a6 <__subsf3> + 60ce: 60 93 a0 29 sts 0x29A0, r22 ; 0x8029a0 + 60d2: 70 93 a1 29 sts 0x29A1, r23 ; 0x8029a1 + 60d6: 80 93 a2 29 sts 0x29A2, r24 ; 0x8029a2 + 60da: 90 93 a3 29 sts 0x29A3, r25 ; 0x8029a3 + sysclk_init(); + 60de: ff 90 pop r15 + 60e0: ef 90 pop r14 + 60e2: df 90 pop r13 + 60e4: cf 90 pop r12 + 60e6: 08 95 ret + +000060e8 : + wdt_set_timeout_period(WDT_2S); + + + 60e8: cf 93 push r28 + 60ea: df 93 push r29 + //pin config + 60ec: 10 92 30 25 sts 0x2530, r1 ; 0x802530 + //mpu addr pin + 60f0: 80 ee ldi r24, 0xE0 ; 224 + 60f2: 80 93 3f 25 sts 0x253F, r24 ; 0x80253f + + //xbee + 60f6: 10 92 3b 25 sts 0x253B, r1 ; 0x80253b + 60fa: 10 92 3c 25 sts 0x253C, r1 ; 0x80253c + PORTC.DIR |= 0b00001000; + 60fe: 10 92 3d 25 sts 0x253D, r1 ; 0x80253d + 6102: 10 92 3e 25 sts 0x253E, r1 ; 0x80253e + PORTC.OUT |= 0b00001000; + //openlog + 6106: cb df rcall .-106 ; 0x609e + PORTF.DIR |= 0b00001000; + 6108: 0e 94 24 02 call 0x448 ; 0x448 + PORTF.OUT |= 0b00001000; + 610c: 88 e0 ldi r24, 0x08 ; 8 + 610e: 0e 94 43 12 call 0x2486 ; 0x2486 + + + sysclk_enable_peripheral_clock(TWI_MASTER); + sysclk_enable_peripheral_clock(USART_XBEE); + sysclk_enable_peripheral_clock(USART_GPS); + sysclk_enable_peripheral_clock(USART_OPENLOGGER); + 6112: e0 e4 ldi r30, 0x40 ; 64 + 6114: f6 e0 ldi r31, 0x06 ; 6 + 6116: 80 81 ld r24, Z + 6118: 88 60 ori r24, 0x08 ; 8 + 611a: 80 83 st Z, r24 + sysclk_enable_peripheral_clock(&ADCA); + 611c: 84 81 ldd r24, Z+4 ; 0x04 + 611e: 88 60 ori r24, 0x08 ; 8 + 6120: 84 83 std Z+4, r24 ; 0x04 + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0); + + 6122: c0 ea ldi r28, 0xA0 ; 160 + 6124: d6 e0 ldi r29, 0x06 ; 6 + 6126: 88 81 ld r24, Y + 6128: 88 60 ori r24, 0x08 ; 8 + 612a: 88 83 st Y, r24 + + 612c: 8c 81 ldd r24, Y+4 ; 0x04 + 612e: 88 60 ori r24, 0x08 ; 8 + 6130: 8c 83 std Y+4, r24 ; 0x04 + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TWI); + } +#endif +#ifdef TWIF + else if (module == &TWIF) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TWI); + 6132: 60 e4 ldi r22, 0x40 ; 64 + 6134: 86 e0 ldi r24, 0x06 ; 6 + 6136: 0e 94 59 02 call 0x4b2 ; 0x4b2 + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_SPI); + } +#endif +#ifdef USARTC0 + else if (module == &USARTC0) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0); + 613a: 60 e1 ldi r22, 0x10 ; 16 + 613c: 83 e0 ldi r24, 0x03 ; 3 + 613e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0); + } +#endif +#ifdef USARTC1 + else if (module == &USARTC1) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1); + 6142: 60 e2 ldi r22, 0x20 ; 32 + 6144: 83 e0 ldi r24, 0x03 ; 3 + 6146: 0e 94 59 02 call 0x4b2 ; 0x4b2 + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0); + } +#endif +#ifdef USARTF0 + else if (module == &USARTF0) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0); + 614a: 60 e1 ldi r22, 0x10 ; 16 + 614c: 86 e0 ldi r24, 0x06 ; 6 + 614e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC); + } +#endif +#ifdef ADCA + else if (module == &ADCA) { + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC); + 6152: 62 e0 ldi r22, 0x02 ; 2 + 6154: 81 e0 ldi r24, 0x01 ; 1 + 6156: 0e 94 59 02 call 0x4b2 ; 0x4b2 + //initialize drivers + usart_comms_init(); + twi_comms_init(); + adc_util_init(); + skywave_util_init(); + //enable interrupts at all levels + 615a: 61 e0 ldi r22, 0x01 ; 1 + 615c: 83 e0 ldi r24, 0x03 ; 3 + 615e: 0e 94 59 02 call 0x4b2 ; 0x4b2 + irq_initialize_vectors(); + cpu_irq_enable(); + + //wdt_enable(); + //initialize device drivers + 6162: 88 e3 ldi r24, 0x38 ; 56 + 6164: 88 8b std Y+16, r24 ; 0x10 + ds3231_init(); + mpl3_init(); + mpu_wai(); + 6166: 89 8b std Y+17, r24 ; 0x11 + delay_ms(2000); + 6168: 24 df rcall .-440 ; 0x5fb2 + 616a: 99 de rcall .-718 ; 0x5e9e + mpu_init(); + 616c: 0e 94 a4 1e call 0x3d48 ; 0x3d48 + //ntcle100_init(); + + sw_32hz_timer_init(); + 6170: 87 e0 ldi r24, 0x07 ; 7 + 6172: 80 93 a2 00 sts 0x00A2, r24 ; 0x8000a2 <__TEXT_REGION_LENGTH__+0x7000a2> +} + 6176: 78 94 sei + +_Bool bSensorsReady() + 6178: 0e 94 57 12 call 0x24ae ; 0x24ae +{ + if(sensor_ready_status == 0xFF) + 617c: 0e 94 77 14 call 0x28ee ; 0x28ee + { + 6180: 0e 94 ae 15 call 0x2b5c ; 0x2b5c + return true; + 6184: 0e 94 24 1c call 0x3848 ; 0x3848 + } + 6188: 0e 94 c3 1c call 0x3986 ; 0x3986 + return false; + 618c: 0e 94 7a 1e call 0x3cf4 ; 0x3cf4 +} + 6190: 0e 94 ea 14 call 0x29d4 ; 0x29d4 + + 6194: ad dd rcall .-1190 ; 0x5cf0 + + 6196: df 91 pop r29 + 6198: cf 91 pop r28 + 619a: 08 95 ret + +0000619c
: +static void sw_fs_standby_init(void); +static void sw_fs_ascent_init(void); +static void sw_fs_first_descent_init(void); + +typedef struct +{ + 619c: a5 df rcall .-182 ; 0x60e8 + case SW_FIRST_DESCENT: + + break; + case SW_SEC_DESCENT: + + break; + 619e: 0f 2e mov r0, r31 + 61a0: f3 e3 ldi r31, 0x33 ; 51 + 61a2: 8f 2e mov r8, r31 + 61a4: f0 e2 ldi r31, 0x20 ; 32 + 61a6: 9f 2e mov r9, r31 + 61a8: f0 2d mov r31, r0 + 61aa: 68 94 set + 61ac: 44 24 eor r4, r4 + 61ae: 43 f8 bld r4, 3 + 61b0: 0f 2e mov r0, r31 + 61b2: f0 ea ldi r31, 0xA0 ; 160 + 61b4: 5f 2e mov r5, r31 + 61b6: f0 2d mov r31, r0 + case SW_FINAL: + + break; + }; +} + 61b8: 0f 2e mov r0, r31 + 61ba: f5 e0 ldi r31, 0x05 ; 5 + 61bc: cf 2e mov r12, r31 + 61be: f1 e2 ldi r31, 0x21 ; 33 + 61c0: df 2e mov r13, r31 + 61c2: f0 2d mov r31, r0 +// +void set_ntcle_off(float t_off) + 61c4: 0f 2e mov r0, r31 + 61c6: f6 e3 ldi r31, 0x36 ; 54 + 61c8: ef 2e mov r14, r31 + 61ca: f1 e2 ldi r31, 0x21 ; 33 + 61cc: ff 2e mov r15, r31 + 61ce: f0 2d mov r31, r0 +{ + temp_off = (get_ntcle_temp_now() - t_off); + 61d0: 0e e5 ldi r16, 0x5E ; 94 + 61d2: 11 e2 ldi r17, 0x21 ; 33 +} + + 61d4: 0f 2e mov r0, r31 + 61d6: ff ef ldi r31, 0xFF ; 255 + 61d8: 2f 2e mov r2, r31 + 61da: f0 e2 ldi r31, 0x20 ; 32 + 61dc: 3f 2e mov r3, r31 + 61de: f0 2d mov r31, r0 +static sw_data_bank missionData; +static _Bool bSensorsReady(void); + + 61e0: 0f 2e mov r0, r31 + 61e2: f3 eb ldi r31, 0xB3 ; 179 + 61e4: 6f 2e mov r6, r31 + 61e6: f1 e2 ldi r31, 0x21 ; 33 + 61e8: 7f 2e mov r7, r31 + 61ea: f0 2d mov r31, r0 +{ + sw_time missionTime; + mpl3_Data mpl3Data; + ntcle100_Data ntcle100Data; + uint16_t packet_count; +}sw_data_bank; + 61ec: a8 95 wdr + 61ee: a3 dd rcall .-1210 ; 0x5d36 + +void handle_flight_state(void) + 61f0: 81 11 cpse r24, r1 + 61f2: 9d dd rcall .-1222 ; 0x5d2e +{ + switch(sw_state_manager) + { + 61f4: 0e 94 26 16 call 0x2c4c ; 0x2c4c + 61f8: 81 11 cpse r24, r1 + case SW_STANDBY: + + 61fa: 0e 94 8a 16 call 0x2d14 ; 0x2d14 + break; + case SW_ASCENT: + 61fe: 0e 94 b8 17 call 0x2f70 ; 0x2f70 + 6202: 88 23 and r24, r24 + 6204: 29 f0 breq .+10 ; 0x6210 + + break; + 6206: 0e 94 d6 1a call 0x35ac ; 0x35ac + case SW_FIRST_DESCENT: + 620a: 80 e0 ldi r24, 0x00 ; 0 + 620c: 0e 94 b5 17 call 0x2f6a ; 0x2f6a + + break; + case SW_SEC_DESCENT: + 6210: 0e 94 cb 14 call 0x2996 ; 0x2996 + 6214: 88 23 and r24, r24 + 6216: 51 f3 breq .-44 ; 0x61ec + + break; + 6218: 9f 92 push r9 + 621a: 8f 92 push r8 + 621c: 4f 92 push r4 + 621e: 5f 92 push r5 + 6220: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 6224: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 6228: 19 95 eicall + case SW_FINAL: + 622a: 61 e0 ldi r22, 0x01 ; 1 + 622c: 8f ef ldi r24, 0xFF ; 255 + 622e: 94 e2 ldi r25, 0x24 ; 36 + 6230: 0e 94 f8 15 call 0x2bf0 ; 0x2bf0 + + 6234: 61 e0 ldi r22, 0x01 ; 1 + 6236: 8a e0 ldi r24, 0x0A ; 10 + 6238: 95 e2 ldi r25, 0x25 ; 37 + 623a: 0e 94 d1 1d call 0x3ba2 ; 0x3ba2 + break; + 623e: 8c e1 ldi r24, 0x1C ; 28 + 6240: 95 e2 ldi r25, 0x25 ; 37 + 6242: 0e 94 e6 17 call 0x2fcc ; 0x2fcc + }; + 6246: 80 e1 ldi r24, 0x10 ; 16 + 6248: 95 e2 ldi r25, 0x25 ; 37 + 624a: 0e 94 c8 17 call 0x2f90 ; 0x2f90 +} +// + 624e: cf ef ldi r28, 0xFF ; 255 + 6250: d4 e2 ldi r29, 0x24 ; 36 + break; + case SW_FINAL: + + break; + }; +} + 6252: 8c 8d ldd r24, Y+28 ; 0x1c + 6254: 8f 93 push r24 + 6256: 8b 8d ldd r24, Y+27 ; 0x1b + 6258: 8f 93 push r24 + 625a: 8a 8d ldd r24, Y+26 ; 0x1a + 625c: 8f 93 push r24 + 625e: 89 8d ldd r24, Y+25 ; 0x19 + 6260: 8f 93 push r24 + 6262: 88 8d ldd r24, Y+24 ; 0x18 + 6264: 8f 93 push r24 + 6266: 8f 89 ldd r24, Y+23 ; 0x17 + 6268: 8f 93 push r24 + 626a: 8e 89 ldd r24, Y+22 ; 0x16 + 626c: 8f 93 push r24 + 626e: 8d 89 ldd r24, Y+21 ; 0x15 + 6270: 8f 93 push r24 + 6272: 8c 89 ldd r24, Y+20 ; 0x14 + 6274: 8f 93 push r24 + 6276: 8b 89 ldd r24, Y+19 ; 0x13 + 6278: 8f 93 push r24 + 627a: 8a 89 ldd r24, Y+18 ; 0x12 + 627c: 8f 93 push r24 + 627e: 89 89 ldd r24, Y+17 ; 0x11 + 6280: 8f 93 push r24 + 6282: df 92 push r13 + 6284: cf 92 push r12 + 6286: 4f 92 push r4 + 6288: 5f 92 push r5 + 628a: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 628e: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 6292: 19 95 eicall +// +void set_ntcle_off(float t_off) + 6294: 88 a5 ldd r24, Y+40 ; 0x28 + 6296: 8f 93 push r24 + 6298: 8f a1 ldd r24, Y+39 ; 0x27 + 629a: 8f 93 push r24 + 629c: 8e a1 ldd r24, Y+38 ; 0x26 + 629e: 8f 93 push r24 + 62a0: 8d a1 ldd r24, Y+37 ; 0x25 + 62a2: 8f 93 push r24 + 62a4: 8c a1 ldd r24, Y+36 ; 0x24 + 62a6: 8f 93 push r24 + 62a8: 8b a1 ldd r24, Y+35 ; 0x23 + 62aa: 8f 93 push r24 + 62ac: 8a a1 ldd r24, Y+34 ; 0x22 + 62ae: 8f 93 push r24 + 62b0: 89 a1 ldd r24, Y+33 ; 0x21 + 62b2: 8f 93 push r24 + 62b4: 88 a1 ldd r24, Y+32 ; 0x20 + 62b6: 8f 93 push r24 + 62b8: 8f 8d ldd r24, Y+31 ; 0x1f + 62ba: 8f 93 push r24 + 62bc: 8e 8d ldd r24, Y+30 ; 0x1e + 62be: 8f 93 push r24 + 62c0: 8d 8d ldd r24, Y+29 ; 0x1d + 62c2: 8f 93 push r24 + 62c4: ff 92 push r15 + 62c6: ef 92 push r14 + 62c8: 4f 92 push r4 + 62ca: 5f 92 push r5 + 62cc: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 62d0: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 62d4: 19 95 eicall +{ + temp_off = (get_ntcle_temp_now() - t_off); + 62d6: 2d b7 in r18, 0x3d ; 61 + 62d8: 3e b7 in r19, 0x3e ; 62 + 62da: 2c 5d subi r18, 0xDC ; 220 + 62dc: 3f 4f sbci r19, 0xFF ; 255 + 62de: 2d bf out 0x3d, r18 ; 61 + 62e0: 3e bf out 0x3e, r19 ; 62 + 62e2: 88 85 ldd r24, Y+8 ; 0x08 + 62e4: 8f 93 push r24 + 62e6: 8f 81 ldd r24, Y+7 ; 0x07 + 62e8: 8f 93 push r24 + 62ea: 8e 81 ldd r24, Y+6 ; 0x06 + 62ec: 8f 93 push r24 + 62ee: 8d 81 ldd r24, Y+5 ; 0x05 + 62f0: 8f 93 push r24 + 62f2: 8c 81 ldd r24, Y+4 ; 0x04 + 62f4: 8f 93 push r24 + 62f6: 8b 81 ldd r24, Y+3 ; 0x03 + 62f8: 8f 93 push r24 + 62fa: 8a 81 ldd r24, Y+2 ; 0x02 + 62fc: 8f 93 push r24 + 62fe: 89 81 ldd r24, Y+1 ; 0x01 + 6300: 8f 93 push r24 + 6302: 1f 93 push r17 + 6304: 0f 93 push r16 + 6306: 4f 92 push r4 + 6308: 5f 92 push r5 + 630a: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 630e: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 6312: 19 95 eicall +} + 6314: 8c e2 ldi r24, 0x2C ; 44 + 6316: 95 e2 ldi r25, 0x25 ; 37 + 6318: 0e 94 91 14 call 0x2922 ; 0x2922 + + 631c: e0 91 3d 25 lds r30, 0x253D ; 0x80253d + 6320: f0 91 3e 25 lds r31, 0x253E ; 0x80253e + 6324: 8d b7 in r24, 0x3d ; 61 + 6326: 9e b7 in r25, 0x3e ; 62 + 6328: 0c 96 adiw r24, 0x0c ; 12 + 632a: 8d bf out 0x3d, r24 ; 61 + 632c: 9e bf out 0x3e, r25 ; 62 + 632e: 88 a9 ldd r24, Y+48 ; 0x30 + 6330: 81 11 cpse r24, r1 + 6332: 05 c0 rjmp .+10 ; 0x633e + 6334: 22 e0 ldi r18, 0x02 ; 2 + 6336: 31 e2 ldi r19, 0x21 ; 33 + 6338: 82 2f mov r24, r18 + 633a: 93 2f mov r25, r19 + 633c: 02 c0 rjmp .+4 ; 0x6342 + 633e: 82 2d mov r24, r2 + 6340: 93 2d mov r25, r3 + 6342: 9f 93 push r25 + 6344: 8f 93 push r24 +static sw_data_bank missionData; + 6346: af ef ldi r26, 0xFF ; 255 + 6348: b4 e2 ldi r27, 0x24 ; 36 +// +void set_ntcle_off(float t_off) +{ + temp_off = (get_ntcle_temp_now() - t_off); +} + + 634a: 9f 96 adiw r26, 0x2f ; 47 + 634c: 8c 91 ld r24, X + 634e: 9f 97 sbiw r26, 0x2f ; 47 + 6350: 1f 92 push r1 + 6352: 8f 93 push r24 + 6354: 9e 96 adiw r26, 0x2e ; 46 + 6356: 8c 91 ld r24, X + 6358: 9e 97 sbiw r26, 0x2e ; 46 + 635a: 1f 92 push r1 + 635c: 8f 93 push r24 + 635e: 9d 96 adiw r26, 0x2d ; 45 + 6360: 8c 91 ld r24, X + 6362: 1f 92 push r1 + 6364: 8f 93 push r24 + 6366: 85 e8 ldi r24, 0x85 ; 133 + 6368: 91 e2 ldi r25, 0x21 ; 33 + 636a: 9f 93 push r25 + 636c: 8f 93 push r24 + 636e: 4f 92 push r4 + 6370: 5f 92 push r5 + 6372: 19 95 eicall +static sw_data_bank missionData; +static _Bool bSensorsReady(void); + + 6374: a0 90 3d 25 lds r10, 0x253D ; 0x80253d + 6378: b0 90 3e 25 lds r11, 0x253E ; 0x80253e + 637c: 0e 94 6c 1e call 0x3cd8 ; 0x3cd8 + 6380: 9f 93 push r25 + 6382: 8f 93 push r24 + 6384: 7f 93 push r23 + 6386: 6f 93 push r22 + 6388: 7f 92 push r7 + 638a: 6f 92 push r6 + 638c: 4f 92 push r4 + 638e: 5f 92 push r5 + 6390: f5 01 movw r30, r10 + 6392: 19 95 eicall +int main(void) + 6394: 0e 94 13 14 call 0x2826 ; 0x2826 + 6398: 2d b7 in r18, 0x3d ; 61 + 639a: 3e b7 in r19, 0x3e ; 62 + 639c: 2c 5e subi r18, 0xEC ; 236 + 639e: 3f 4f sbci r19, 0xFF ; 255 + 63a0: 2d bf out 0x3d, r18 ; 61 + 63a2: 3e bf out 0x3e, r19 ; 62 + 63a4: 23 cf rjmp .-442 ; 0x61ec + +000063a6 <__subsf3>: + 63a6: 50 58 subi r21, 0x80 ; 128 + +000063a8 <__addsf3>: + 63a8: bb 27 eor r27, r27 + 63aa: aa 27 eor r26, r26 + 63ac: 0e d0 rcall .+28 ; 0x63ca <__addsf3x> + 63ae: 3f c2 rjmp .+1150 ; 0x682e <__fp_round> + 63b0: 30 d2 rcall .+1120 ; 0x6812 <__fp_pscA> + 63b2: 30 f0 brcs .+12 ; 0x63c0 <__addsf3+0x18> + 63b4: 35 d2 rcall .+1130 ; 0x6820 <__fp_pscB> + 63b6: 20 f0 brcs .+8 ; 0x63c0 <__addsf3+0x18> + 63b8: 31 f4 brne .+12 ; 0x63c6 <__addsf3+0x1e> + 63ba: 9f 3f cpi r25, 0xFF ; 255 + 63bc: 11 f4 brne .+4 ; 0x63c2 <__addsf3+0x1a> + 63be: 1e f4 brtc .+6 ; 0x63c6 <__addsf3+0x1e> + 63c0: ef c1 rjmp .+990 ; 0x67a0 <__fp_nan> + 63c2: 0e f4 brtc .+2 ; 0x63c6 <__addsf3+0x1e> + 63c4: e0 95 com r30 + 63c6: e7 fb bst r30, 7 + 63c8: e5 c1 rjmp .+970 ; 0x6794 <__fp_inf> + +000063ca <__addsf3x>: + 63ca: e9 2f mov r30, r25 + 63cc: 41 d2 rcall .+1154 ; 0x6850 <__fp_split3> + 63ce: 80 f3 brcs .-32 ; 0x63b0 <__addsf3+0x8> + 63d0: ba 17 cp r27, r26 + 63d2: 62 07 cpc r22, r18 + 63d4: 73 07 cpc r23, r19 + 63d6: 84 07 cpc r24, r20 + 63d8: 95 07 cpc r25, r21 + 63da: 18 f0 brcs .+6 ; 0x63e2 <__addsf3x+0x18> + 63dc: 71 f4 brne .+28 ; 0x63fa <__addsf3x+0x30> + 63de: 9e f5 brtc .+102 ; 0x6446 <__addsf3x+0x7c> + 63e0: 59 c2 rjmp .+1202 ; 0x6894 <__fp_zero> + 63e2: 0e f4 brtc .+2 ; 0x63e6 <__addsf3x+0x1c> + 63e4: e0 95 com r30 + 63e6: 0b 2e mov r0, r27 + 63e8: ba 2f mov r27, r26 + 63ea: a0 2d mov r26, r0 + 63ec: 0b 01 movw r0, r22 + 63ee: b9 01 movw r22, r18 + 63f0: 90 01 movw r18, r0 + 63f2: 0c 01 movw r0, r24 + 63f4: ca 01 movw r24, r20 + 63f6: a0 01 movw r20, r0 + 63f8: 11 24 eor r1, r1 + 63fa: ff 27 eor r31, r31 + 63fc: 59 1b sub r21, r25 + 63fe: 99 f0 breq .+38 ; 0x6426 <__addsf3x+0x5c> + 6400: 59 3f cpi r21, 0xF9 ; 249 + 6402: 50 f4 brcc .+20 ; 0x6418 <__addsf3x+0x4e> + 6404: 50 3e cpi r21, 0xE0 ; 224 + 6406: 68 f1 brcs .+90 ; 0x6462 <__addsf3x+0x98> + 6408: 1a 16 cp r1, r26 + 640a: f0 40 sbci r31, 0x00 ; 0 + 640c: a2 2f mov r26, r18 + 640e: 23 2f mov r18, r19 + 6410: 34 2f mov r19, r20 + 6412: 44 27 eor r20, r20 + 6414: 58 5f subi r21, 0xF8 ; 248 + 6416: f3 cf rjmp .-26 ; 0x63fe <__addsf3x+0x34> + 6418: 46 95 lsr r20 + 641a: 37 95 ror r19 + 641c: 27 95 ror r18 + 641e: a7 95 ror r26 + 6420: f0 40 sbci r31, 0x00 ; 0 + 6422: 53 95 inc r21 + 6424: c9 f7 brne .-14 ; 0x6418 <__addsf3x+0x4e> + 6426: 7e f4 brtc .+30 ; 0x6446 <__addsf3x+0x7c> + 6428: 1f 16 cp r1, r31 + 642a: ba 0b sbc r27, r26 + 642c: 62 0b sbc r22, r18 + 642e: 73 0b sbc r23, r19 + 6430: 84 0b sbc r24, r20 + 6432: ba f0 brmi .+46 ; 0x6462 <__addsf3x+0x98> + 6434: 91 50 subi r25, 0x01 ; 1 + 6436: a1 f0 breq .+40 ; 0x6460 <__addsf3x+0x96> + 6438: ff 0f add r31, r31 + 643a: bb 1f adc r27, r27 + 643c: 66 1f adc r22, r22 + 643e: 77 1f adc r23, r23 + 6440: 88 1f adc r24, r24 + 6442: c2 f7 brpl .-16 ; 0x6434 <__addsf3x+0x6a> + 6444: 0e c0 rjmp .+28 ; 0x6462 <__addsf3x+0x98> + 6446: ba 0f add r27, r26 + 6448: 62 1f adc r22, r18 + 644a: 73 1f adc r23, r19 + 644c: 84 1f adc r24, r20 + 644e: 48 f4 brcc .+18 ; 0x6462 <__addsf3x+0x98> + 6450: 87 95 ror r24 + 6452: 77 95 ror r23 + 6454: 67 95 ror r22 + 6456: b7 95 ror r27 + 6458: f7 95 ror r31 + 645a: 9e 3f cpi r25, 0xFE ; 254 + 645c: 08 f0 brcs .+2 ; 0x6460 <__addsf3x+0x96> + 645e: b3 cf rjmp .-154 ; 0x63c6 <__addsf3+0x1e> + 6460: 93 95 inc r25 + 6462: 88 0f add r24, r24 + 6464: 08 f0 brcs .+2 ; 0x6468 <__addsf3x+0x9e> + 6466: 99 27 eor r25, r25 + 6468: ee 0f add r30, r30 + 646a: 97 95 ror r25 + 646c: 87 95 ror r24 + 646e: 08 95 ret + +00006470 : + 6470: 9f 93 push r25 + 6472: 9f 77 andi r25, 0x7F ; 127 + 6474: ee e3 ldi r30, 0x3E ; 62 + 6476: 89 37 cpi r24, 0x79 ; 121 + 6478: 9e 07 cpc r25, r30 + 647a: 20 f4 brcc .+8 ; 0x6484 + 647c: ec e0 ldi r30, 0x0C ; 12 + 647e: f2 e0 ldi r31, 0x02 ; 2 + 6480: b7 d1 rcall .+878 ; 0x67f0 <__fp_powsodd> + 6482: 09 c0 rjmp .+18 ; 0x6496 + 6484: 48 d1 rcall .+656 ; 0x6716 <__fp_arccos> + 6486: 90 58 subi r25, 0x80 ; 128 + 6488: a2 ea ldi r26, 0xA2 ; 162 + 648a: 2a ed ldi r18, 0xDA ; 218 + 648c: 3f e0 ldi r19, 0x0F ; 15 + 648e: 49 ec ldi r20, 0xC9 ; 201 + 6490: 5f e3 ldi r21, 0x3F ; 63 + 6492: 9b df rcall .-202 ; 0x63ca <__addsf3x> + 6494: cc d1 rcall .+920 ; 0x682e <__fp_round> + 6496: 0f 90 pop r0 + 6498: 07 fc sbrc r0, 7 + 649a: 90 58 subi r25, 0x80 ; 128 + 649c: 08 95 ret + 649e: b9 d1 rcall .+882 ; 0x6812 <__fp_pscA> + 64a0: 58 f0 brcs .+22 ; 0x64b8 + 64a2: 80 e8 ldi r24, 0x80 ; 128 + 64a4: 91 e0 ldi r25, 0x01 ; 1 + 64a6: 09 f4 brne .+2 ; 0x64aa + 64a8: 9e ef ldi r25, 0xFE ; 254 + 64aa: ba d1 rcall .+884 ; 0x6820 <__fp_pscB> + 64ac: 28 f0 brcs .+10 ; 0x64b8 + 64ae: 40 e8 ldi r20, 0x80 ; 128 + 64b0: 51 e0 ldi r21, 0x01 ; 1 + 64b2: 59 f4 brne .+22 ; 0x64ca + 64b4: 5e ef ldi r21, 0xFE ; 254 + 64b6: 09 c0 rjmp .+18 ; 0x64ca + 64b8: 73 c1 rjmp .+742 ; 0x67a0 <__fp_nan> + 64ba: ec c1 rjmp .+984 ; 0x6894 <__fp_zero> + +000064bc : + 64bc: e9 2f mov r30, r25 + 64be: e0 78 andi r30, 0x80 ; 128 + 64c0: c7 d1 rcall .+910 ; 0x6850 <__fp_split3> + 64c2: 68 f3 brcs .-38 ; 0x649e + 64c4: 09 2e mov r0, r25 + 64c6: 05 2a or r0, r21 + 64c8: c1 f3 breq .-16 ; 0x64ba + 64ca: 26 17 cp r18, r22 + 64cc: 37 07 cpc r19, r23 + 64ce: 48 07 cpc r20, r24 + 64d0: 59 07 cpc r21, r25 + 64d2: 38 f0 brcs .+14 ; 0x64e2 + 64d4: 0e 2e mov r0, r30 + 64d6: 07 f8 bld r0, 7 + 64d8: e0 25 eor r30, r0 + 64da: 69 f0 breq .+26 ; 0x64f6 + 64dc: e0 25 eor r30, r0 + 64de: e0 64 ori r30, 0x40 ; 64 + 64e0: 0a c0 rjmp .+20 ; 0x64f6 + 64e2: ef 63 ori r30, 0x3F ; 63 + 64e4: 07 f8 bld r0, 7 + 64e6: 00 94 com r0 + 64e8: 07 fa bst r0, 7 + 64ea: db 01 movw r26, r22 + 64ec: b9 01 movw r22, r18 + 64ee: 9d 01 movw r18, r26 + 64f0: dc 01 movw r26, r24 + 64f2: ca 01 movw r24, r20 + 64f4: ad 01 movw r20, r26 + 64f6: ef 93 push r30 + 64f8: 47 d0 rcall .+142 ; 0x6588 <__divsf3_pse> + 64fa: 99 d1 rcall .+818 ; 0x682e <__fp_round> + 64fc: 0a d0 rcall .+20 ; 0x6512 + 64fe: 5f 91 pop r21 + 6500: 55 23 and r21, r21 + 6502: 31 f0 breq .+12 ; 0x6510 + 6504: 2b ed ldi r18, 0xDB ; 219 + 6506: 3f e0 ldi r19, 0x0F ; 15 + 6508: 49 e4 ldi r20, 0x49 ; 73 + 650a: 50 fd sbrc r21, 0 + 650c: 49 ec ldi r20, 0xC9 ; 201 + 650e: 4c cf rjmp .-360 ; 0x63a8 <__addsf3> + 6510: 08 95 ret + +00006512 : + 6512: df 93 push r29 + 6514: dd 27 eor r29, r29 + 6516: b9 2f mov r27, r25 + 6518: bf 77 andi r27, 0x7F ; 127 + 651a: 40 e8 ldi r20, 0x80 ; 128 + 651c: 5f e3 ldi r21, 0x3F ; 63 + 651e: 16 16 cp r1, r22 + 6520: 17 06 cpc r1, r23 + 6522: 48 07 cpc r20, r24 + 6524: 5b 07 cpc r21, r27 + 6526: 10 f4 brcc .+4 ; 0x652c + 6528: d9 2f mov r29, r25 + 652a: bf d1 rcall .+894 ; 0x68aa + 652c: 9f 93 push r25 + 652e: 8f 93 push r24 + 6530: 7f 93 push r23 + 6532: 6f 93 push r22 + 6534: 17 d3 rcall .+1582 ; 0x6b64 + 6536: e0 e2 ldi r30, 0x20 ; 32 + 6538: f2 e0 ldi r31, 0x02 ; 2 + 653a: 35 d1 rcall .+618 ; 0x67a6 <__fp_powser> + 653c: 78 d1 rcall .+752 ; 0x682e <__fp_round> + 653e: 2f 91 pop r18 + 6540: 3f 91 pop r19 + 6542: 4f 91 pop r20 + 6544: 5f 91 pop r21 + 6546: 09 d2 rcall .+1042 ; 0x695a <__mulsf3x> + 6548: dd 23 and r29, r29 + 654a: 49 f0 breq .+18 ; 0x655e + 654c: 90 58 subi r25, 0x80 ; 128 + 654e: a2 ea ldi r26, 0xA2 ; 162 + 6550: 2a ed ldi r18, 0xDA ; 218 + 6552: 3f e0 ldi r19, 0x0F ; 15 + 6554: 49 ec ldi r20, 0xC9 ; 201 + 6556: 5f e3 ldi r21, 0x3F ; 63 + 6558: d0 78 andi r29, 0x80 ; 128 + 655a: 5d 27 eor r21, r29 + 655c: 36 df rcall .-404 ; 0x63ca <__addsf3x> + 655e: df 91 pop r29 + 6560: 66 c1 rjmp .+716 ; 0x682e <__fp_round> + +00006562 <__cmpsf2>: + 6562: f4 d0 rcall .+488 ; 0x674c <__fp_cmp> + 6564: 08 f4 brcc .+2 ; 0x6568 <__cmpsf2+0x6> + 6566: 81 e0 ldi r24, 0x01 ; 1 + 6568: 08 95 ret + +0000656a <__divsf3>: + 656a: 0c d0 rcall .+24 ; 0x6584 <__divsf3x> + 656c: 60 c1 rjmp .+704 ; 0x682e <__fp_round> + 656e: 58 d1 rcall .+688 ; 0x6820 <__fp_pscB> + 6570: 40 f0 brcs .+16 ; 0x6582 <__divsf3+0x18> + 6572: 4f d1 rcall .+670 ; 0x6812 <__fp_pscA> + 6574: 30 f0 brcs .+12 ; 0x6582 <__divsf3+0x18> + 6576: 21 f4 brne .+8 ; 0x6580 <__divsf3+0x16> + 6578: 5f 3f cpi r21, 0xFF ; 255 + 657a: 19 f0 breq .+6 ; 0x6582 <__divsf3+0x18> + 657c: 0b c1 rjmp .+534 ; 0x6794 <__fp_inf> + 657e: 51 11 cpse r21, r1 + 6580: 8a c1 rjmp .+788 ; 0x6896 <__fp_szero> + 6582: 0e c1 rjmp .+540 ; 0x67a0 <__fp_nan> + +00006584 <__divsf3x>: + 6584: 65 d1 rcall .+714 ; 0x6850 <__fp_split3> + 6586: 98 f3 brcs .-26 ; 0x656e <__divsf3+0x4> + +00006588 <__divsf3_pse>: + 6588: 99 23 and r25, r25 + 658a: c9 f3 breq .-14 ; 0x657e <__divsf3+0x14> + 658c: 55 23 and r21, r21 + 658e: b1 f3 breq .-20 ; 0x657c <__divsf3+0x12> + 6590: 95 1b sub r25, r21 + 6592: 55 0b sbc r21, r21 + 6594: bb 27 eor r27, r27 + 6596: aa 27 eor r26, r26 + 6598: 62 17 cp r22, r18 + 659a: 73 07 cpc r23, r19 + 659c: 84 07 cpc r24, r20 + 659e: 38 f0 brcs .+14 ; 0x65ae <__divsf3_pse+0x26> + 65a0: 9f 5f subi r25, 0xFF ; 255 + 65a2: 5f 4f sbci r21, 0xFF ; 255 + 65a4: 22 0f add r18, r18 + 65a6: 33 1f adc r19, r19 + 65a8: 44 1f adc r20, r20 + 65aa: aa 1f adc r26, r26 + 65ac: a9 f3 breq .-22 ; 0x6598 <__divsf3_pse+0x10> + 65ae: 33 d0 rcall .+102 ; 0x6616 <__divsf3_pse+0x8e> + 65b0: 0e 2e mov r0, r30 + 65b2: 3a f0 brmi .+14 ; 0x65c2 <__divsf3_pse+0x3a> + 65b4: e0 e8 ldi r30, 0x80 ; 128 + 65b6: 30 d0 rcall .+96 ; 0x6618 <__divsf3_pse+0x90> + 65b8: 91 50 subi r25, 0x01 ; 1 + 65ba: 50 40 sbci r21, 0x00 ; 0 + 65bc: e6 95 lsr r30 + 65be: 00 1c adc r0, r0 + 65c0: ca f7 brpl .-14 ; 0x65b4 <__divsf3_pse+0x2c> + 65c2: 29 d0 rcall .+82 ; 0x6616 <__divsf3_pse+0x8e> + 65c4: fe 2f mov r31, r30 + 65c6: 27 d0 rcall .+78 ; 0x6616 <__divsf3_pse+0x8e> + 65c8: 66 0f add r22, r22 + 65ca: 77 1f adc r23, r23 + 65cc: 88 1f adc r24, r24 + 65ce: bb 1f adc r27, r27 + 65d0: 26 17 cp r18, r22 + 65d2: 37 07 cpc r19, r23 + 65d4: 48 07 cpc r20, r24 + 65d6: ab 07 cpc r26, r27 + 65d8: b0 e8 ldi r27, 0x80 ; 128 + 65da: 09 f0 breq .+2 ; 0x65de <__divsf3_pse+0x56> + 65dc: bb 0b sbc r27, r27 + 65de: 80 2d mov r24, r0 + 65e0: bf 01 movw r22, r30 + 65e2: ff 27 eor r31, r31 + 65e4: 93 58 subi r25, 0x83 ; 131 + 65e6: 5f 4f sbci r21, 0xFF ; 255 + 65e8: 2a f0 brmi .+10 ; 0x65f4 <__divsf3_pse+0x6c> + 65ea: 9e 3f cpi r25, 0xFE ; 254 + 65ec: 51 05 cpc r21, r1 + 65ee: 68 f0 brcs .+26 ; 0x660a <__divsf3_pse+0x82> + 65f0: d1 c0 rjmp .+418 ; 0x6794 <__fp_inf> + 65f2: 51 c1 rjmp .+674 ; 0x6896 <__fp_szero> + 65f4: 5f 3f cpi r21, 0xFF ; 255 + 65f6: ec f3 brlt .-6 ; 0x65f2 <__divsf3_pse+0x6a> + 65f8: 98 3e cpi r25, 0xE8 ; 232 + 65fa: dc f3 brlt .-10 ; 0x65f2 <__divsf3_pse+0x6a> + 65fc: 86 95 lsr r24 + 65fe: 77 95 ror r23 + 6600: 67 95 ror r22 + 6602: b7 95 ror r27 + 6604: f7 95 ror r31 + 6606: 9f 5f subi r25, 0xFF ; 255 + 6608: c9 f7 brne .-14 ; 0x65fc <__divsf3_pse+0x74> + 660a: 88 0f add r24, r24 + 660c: 91 1d adc r25, r1 + 660e: 96 95 lsr r25 + 6610: 87 95 ror r24 + 6612: 97 f9 bld r25, 7 + 6614: 08 95 ret + 6616: e1 e0 ldi r30, 0x01 ; 1 + 6618: 66 0f add r22, r22 + 661a: 77 1f adc r23, r23 + 661c: 88 1f adc r24, r24 + 661e: bb 1f adc r27, r27 + 6620: 62 17 cp r22, r18 + 6622: 73 07 cpc r23, r19 + 6624: 84 07 cpc r24, r20 + 6626: ba 07 cpc r27, r26 + 6628: 20 f0 brcs .+8 ; 0x6632 <__divsf3_pse+0xaa> + 662a: 62 1b sub r22, r18 + 662c: 73 0b sbc r23, r19 + 662e: 84 0b sbc r24, r20 + 6630: ba 0b sbc r27, r26 + 6632: ee 1f adc r30, r30 + 6634: 88 f7 brcc .-30 ; 0x6618 <__divsf3_pse+0x90> + 6636: e0 95 com r30 + 6638: 08 95 ret + +0000663a <__fixsfsi>: + 663a: 04 d0 rcall .+8 ; 0x6644 <__fixunssfsi> + 663c: 68 94 set + 663e: b1 11 cpse r27, r1 + 6640: 2a c1 rjmp .+596 ; 0x6896 <__fp_szero> + 6642: 08 95 ret + +00006644 <__fixunssfsi>: + 6644: 0d d1 rcall .+538 ; 0x6860 <__fp_splitA> + 6646: 88 f0 brcs .+34 ; 0x666a <__fixunssfsi+0x26> + 6648: 9f 57 subi r25, 0x7F ; 127 + 664a: 90 f0 brcs .+36 ; 0x6670 <__fixunssfsi+0x2c> + 664c: b9 2f mov r27, r25 + 664e: 99 27 eor r25, r25 + 6650: b7 51 subi r27, 0x17 ; 23 + 6652: a0 f0 brcs .+40 ; 0x667c <__fixunssfsi+0x38> + 6654: d1 f0 breq .+52 ; 0x668a <__fixunssfsi+0x46> + 6656: 66 0f add r22, r22 + 6658: 77 1f adc r23, r23 + 665a: 88 1f adc r24, r24 + 665c: 99 1f adc r25, r25 + 665e: 1a f0 brmi .+6 ; 0x6666 <__fixunssfsi+0x22> + 6660: ba 95 dec r27 + 6662: c9 f7 brne .-14 ; 0x6656 <__fixunssfsi+0x12> + 6664: 12 c0 rjmp .+36 ; 0x668a <__fixunssfsi+0x46> + 6666: b1 30 cpi r27, 0x01 ; 1 + 6668: 81 f0 breq .+32 ; 0x668a <__fixunssfsi+0x46> + 666a: 14 d1 rcall .+552 ; 0x6894 <__fp_zero> + 666c: b1 e0 ldi r27, 0x01 ; 1 + 666e: 08 95 ret + 6670: 11 c1 rjmp .+546 ; 0x6894 <__fp_zero> + 6672: 67 2f mov r22, r23 + 6674: 78 2f mov r23, r24 + 6676: 88 27 eor r24, r24 + 6678: b8 5f subi r27, 0xF8 ; 248 + 667a: 39 f0 breq .+14 ; 0x668a <__fixunssfsi+0x46> + 667c: b9 3f cpi r27, 0xF9 ; 249 + 667e: cc f3 brlt .-14 ; 0x6672 <__fixunssfsi+0x2e> + 6680: 86 95 lsr r24 + 6682: 77 95 ror r23 + 6684: 67 95 ror r22 + 6686: b3 95 inc r27 + 6688: d9 f7 brne .-10 ; 0x6680 <__fixunssfsi+0x3c> + 668a: 3e f4 brtc .+14 ; 0x669a <__fixunssfsi+0x56> + 668c: 90 95 com r25 + 668e: 80 95 com r24 + 6690: 70 95 com r23 + 6692: 61 95 neg r22 + 6694: 7f 4f sbci r23, 0xFF ; 255 + 6696: 8f 4f sbci r24, 0xFF ; 255 + 6698: 9f 4f sbci r25, 0xFF ; 255 + 669a: 08 95 ret + +0000669c <__floatunsisf>: + 669c: e8 94 clt + 669e: 09 c0 rjmp .+18 ; 0x66b2 <__floatsisf+0x12> + +000066a0 <__floatsisf>: + 66a0: 97 fb bst r25, 7 + 66a2: 3e f4 brtc .+14 ; 0x66b2 <__floatsisf+0x12> + 66a4: 90 95 com r25 + 66a6: 80 95 com r24 + 66a8: 70 95 com r23 + 66aa: 61 95 neg r22 + 66ac: 7f 4f sbci r23, 0xFF ; 255 + 66ae: 8f 4f sbci r24, 0xFF ; 255 + 66b0: 9f 4f sbci r25, 0xFF ; 255 + 66b2: 99 23 and r25, r25 + 66b4: a9 f0 breq .+42 ; 0x66e0 <__floatsisf+0x40> + 66b6: f9 2f mov r31, r25 + 66b8: 96 e9 ldi r25, 0x96 ; 150 + 66ba: bb 27 eor r27, r27 + 66bc: 93 95 inc r25 + 66be: f6 95 lsr r31 + 66c0: 87 95 ror r24 + 66c2: 77 95 ror r23 + 66c4: 67 95 ror r22 + 66c6: b7 95 ror r27 + 66c8: f1 11 cpse r31, r1 + 66ca: f8 cf rjmp .-16 ; 0x66bc <__floatsisf+0x1c> + 66cc: fa f4 brpl .+62 ; 0x670c <__floatsisf+0x6c> + 66ce: bb 0f add r27, r27 + 66d0: 11 f4 brne .+4 ; 0x66d6 <__floatsisf+0x36> + 66d2: 60 ff sbrs r22, 0 + 66d4: 1b c0 rjmp .+54 ; 0x670c <__floatsisf+0x6c> + 66d6: 6f 5f subi r22, 0xFF ; 255 + 66d8: 7f 4f sbci r23, 0xFF ; 255 + 66da: 8f 4f sbci r24, 0xFF ; 255 + 66dc: 9f 4f sbci r25, 0xFF ; 255 + 66de: 16 c0 rjmp .+44 ; 0x670c <__floatsisf+0x6c> + 66e0: 88 23 and r24, r24 + 66e2: 11 f0 breq .+4 ; 0x66e8 <__floatsisf+0x48> + 66e4: 96 e9 ldi r25, 0x96 ; 150 + 66e6: 11 c0 rjmp .+34 ; 0x670a <__floatsisf+0x6a> + 66e8: 77 23 and r23, r23 + 66ea: 21 f0 breq .+8 ; 0x66f4 <__floatsisf+0x54> + 66ec: 9e e8 ldi r25, 0x8E ; 142 + 66ee: 87 2f mov r24, r23 + 66f0: 76 2f mov r23, r22 + 66f2: 05 c0 rjmp .+10 ; 0x66fe <__floatsisf+0x5e> + 66f4: 66 23 and r22, r22 + 66f6: 71 f0 breq .+28 ; 0x6714 <__floatsisf+0x74> + 66f8: 96 e8 ldi r25, 0x86 ; 134 + 66fa: 86 2f mov r24, r22 + 66fc: 70 e0 ldi r23, 0x00 ; 0 + 66fe: 60 e0 ldi r22, 0x00 ; 0 + 6700: 2a f0 brmi .+10 ; 0x670c <__floatsisf+0x6c> + 6702: 9a 95 dec r25 + 6704: 66 0f add r22, r22 + 6706: 77 1f adc r23, r23 + 6708: 88 1f adc r24, r24 + 670a: da f7 brpl .-10 ; 0x6702 <__floatsisf+0x62> + 670c: 88 0f add r24, r24 + 670e: 96 95 lsr r25 + 6710: 87 95 ror r24 + 6712: 97 f9 bld r25, 7 + 6714: 08 95 ret + +00006716 <__fp_arccos>: + 6716: df 93 push r29 + 6718: cf 93 push r28 + 671a: 1f 93 push r17 + 671c: 0f 93 push r16 + 671e: 8b 01 movw r16, r22 + 6720: ec 01 movw r28, r24 + 6722: ed e4 ldi r30, 0x4D ; 77 + 6724: f2 e0 ldi r31, 0x02 ; 2 + 6726: 3f d0 rcall .+126 ; 0x67a6 <__fp_powser> + 6728: 82 d0 rcall .+260 ; 0x682e <__fp_round> + 672a: 98 01 movw r18, r16 + 672c: ae 01 movw r20, r28 + 672e: 8b 01 movw r16, r22 + 6730: ec 01 movw r28, r24 + 6732: 60 e0 ldi r22, 0x00 ; 0 + 6734: 70 e0 ldi r23, 0x00 ; 0 + 6736: 80 e8 ldi r24, 0x80 ; 128 + 6738: 9f e3 ldi r25, 0x3F ; 63 + 673a: 35 de rcall .-918 ; 0x63a6 <__subsf3> + 673c: d5 d1 rcall .+938 ; 0x6ae8 + 673e: 98 01 movw r18, r16 + 6740: ae 01 movw r20, r28 + 6742: 0f 91 pop r16 + 6744: 1f 91 pop r17 + 6746: cf 91 pop r28 + 6748: df 91 pop r29 + 674a: 07 c1 rjmp .+526 ; 0x695a <__mulsf3x> + +0000674c <__fp_cmp>: + 674c: 99 0f add r25, r25 + 674e: 00 08 sbc r0, r0 + 6750: 55 0f add r21, r21 + 6752: aa 0b sbc r26, r26 + 6754: e0 e8 ldi r30, 0x80 ; 128 + 6756: fe ef ldi r31, 0xFE ; 254 + 6758: 16 16 cp r1, r22 + 675a: 17 06 cpc r1, r23 + 675c: e8 07 cpc r30, r24 + 675e: f9 07 cpc r31, r25 + 6760: c0 f0 brcs .+48 ; 0x6792 <__fp_cmp+0x46> + 6762: 12 16 cp r1, r18 + 6764: 13 06 cpc r1, r19 + 6766: e4 07 cpc r30, r20 + 6768: f5 07 cpc r31, r21 + 676a: 98 f0 brcs .+38 ; 0x6792 <__fp_cmp+0x46> + 676c: 62 1b sub r22, r18 + 676e: 73 0b sbc r23, r19 + 6770: 84 0b sbc r24, r20 + 6772: 95 0b sbc r25, r21 + 6774: 39 f4 brne .+14 ; 0x6784 <__fp_cmp+0x38> + 6776: 0a 26 eor r0, r26 + 6778: 61 f0 breq .+24 ; 0x6792 <__fp_cmp+0x46> + 677a: 23 2b or r18, r19 + 677c: 24 2b or r18, r20 + 677e: 25 2b or r18, r21 + 6780: 21 f4 brne .+8 ; 0x678a <__fp_cmp+0x3e> + 6782: 08 95 ret + 6784: 0a 26 eor r0, r26 + 6786: 09 f4 brne .+2 ; 0x678a <__fp_cmp+0x3e> + 6788: a1 40 sbci r26, 0x01 ; 1 + 678a: a6 95 lsr r26 + 678c: 8f ef ldi r24, 0xFF ; 255 + 678e: 81 1d adc r24, r1 + 6790: 81 1d adc r24, r1 + 6792: 08 95 ret + +00006794 <__fp_inf>: + 6794: 97 f9 bld r25, 7 + 6796: 9f 67 ori r25, 0x7F ; 127 + 6798: 80 e8 ldi r24, 0x80 ; 128 + 679a: 70 e0 ldi r23, 0x00 ; 0 + 679c: 60 e0 ldi r22, 0x00 ; 0 + 679e: 08 95 ret + +000067a0 <__fp_nan>: + 67a0: 9f ef ldi r25, 0xFF ; 255 + 67a2: 80 ec ldi r24, 0xC0 ; 192 + 67a4: 08 95 ret + +000067a6 <__fp_powser>: + 67a6: df 93 push r29 + 67a8: cf 93 push r28 + 67aa: 1f 93 push r17 + 67ac: 0f 93 push r16 + 67ae: ff 92 push r15 + 67b0: ef 92 push r14 + 67b2: df 92 push r13 + 67b4: 7b 01 movw r14, r22 + 67b6: 8c 01 movw r16, r24 + 67b8: 68 94 set + 67ba: 05 c0 rjmp .+10 ; 0x67c6 <__fp_powser+0x20> + 67bc: da 2e mov r13, r26 + 67be: ef 01 movw r28, r30 + 67c0: cc d0 rcall .+408 ; 0x695a <__mulsf3x> + 67c2: fe 01 movw r30, r28 + 67c4: e8 94 clt + 67c6: a5 91 lpm r26, Z+ + 67c8: 25 91 lpm r18, Z+ + 67ca: 35 91 lpm r19, Z+ + 67cc: 45 91 lpm r20, Z+ + 67ce: 55 91 lpm r21, Z+ + 67d0: ae f3 brts .-22 ; 0x67bc <__fp_powser+0x16> + 67d2: ef 01 movw r28, r30 + 67d4: fa dd rcall .-1036 ; 0x63ca <__addsf3x> + 67d6: fe 01 movw r30, r28 + 67d8: 97 01 movw r18, r14 + 67da: a8 01 movw r20, r16 + 67dc: da 94 dec r13 + 67de: 79 f7 brne .-34 ; 0x67be <__fp_powser+0x18> + 67e0: df 90 pop r13 + 67e2: ef 90 pop r14 + 67e4: ff 90 pop r15 + 67e6: 0f 91 pop r16 + 67e8: 1f 91 pop r17 + 67ea: cf 91 pop r28 + 67ec: df 91 pop r29 + 67ee: 08 95 ret + +000067f0 <__fp_powsodd>: + 67f0: 9f 93 push r25 + 67f2: 8f 93 push r24 + 67f4: 7f 93 push r23 + 67f6: 6f 93 push r22 + 67f8: ff 93 push r31 + 67fa: ef 93 push r30 + 67fc: 9b 01 movw r18, r22 + 67fe: ac 01 movw r20, r24 + 6800: a0 d0 rcall .+320 ; 0x6942 <__mulsf3> + 6802: ef 91 pop r30 + 6804: ff 91 pop r31 + 6806: cf df rcall .-98 ; 0x67a6 <__fp_powser> + 6808: 2f 91 pop r18 + 680a: 3f 91 pop r19 + 680c: 4f 91 pop r20 + 680e: 5f 91 pop r21 + 6810: 98 c0 rjmp .+304 ; 0x6942 <__mulsf3> + +00006812 <__fp_pscA>: + 6812: 00 24 eor r0, r0 + 6814: 0a 94 dec r0 + 6816: 16 16 cp r1, r22 + 6818: 17 06 cpc r1, r23 + 681a: 18 06 cpc r1, r24 + 681c: 09 06 cpc r0, r25 + 681e: 08 95 ret + +00006820 <__fp_pscB>: + 6820: 00 24 eor r0, r0 + 6822: 0a 94 dec r0 + 6824: 12 16 cp r1, r18 + 6826: 13 06 cpc r1, r19 + 6828: 14 06 cpc r1, r20 + 682a: 05 06 cpc r0, r21 + 682c: 08 95 ret + +0000682e <__fp_round>: + 682e: 09 2e mov r0, r25 + 6830: 03 94 inc r0 + 6832: 00 0c add r0, r0 + 6834: 11 f4 brne .+4 ; 0x683a <__fp_round+0xc> + 6836: 88 23 and r24, r24 + 6838: 52 f0 brmi .+20 ; 0x684e <__fp_round+0x20> + 683a: bb 0f add r27, r27 + 683c: 40 f4 brcc .+16 ; 0x684e <__fp_round+0x20> + 683e: bf 2b or r27, r31 + 6840: 11 f4 brne .+4 ; 0x6846 <__fp_round+0x18> + 6842: 60 ff sbrs r22, 0 + 6844: 04 c0 rjmp .+8 ; 0x684e <__fp_round+0x20> + 6846: 6f 5f subi r22, 0xFF ; 255 + 6848: 7f 4f sbci r23, 0xFF ; 255 + 684a: 8f 4f sbci r24, 0xFF ; 255 + 684c: 9f 4f sbci r25, 0xFF ; 255 + 684e: 08 95 ret + +00006850 <__fp_split3>: + 6850: 57 fd sbrc r21, 7 + 6852: 90 58 subi r25, 0x80 ; 128 + 6854: 44 0f add r20, r20 + 6856: 55 1f adc r21, r21 + 6858: 59 f0 breq .+22 ; 0x6870 <__fp_splitA+0x10> + 685a: 5f 3f cpi r21, 0xFF ; 255 + 685c: 71 f0 breq .+28 ; 0x687a <__fp_splitA+0x1a> + 685e: 47 95 ror r20 + +00006860 <__fp_splitA>: + 6860: 88 0f add r24, r24 + 6862: 97 fb bst r25, 7 + 6864: 99 1f adc r25, r25 + 6866: 61 f0 breq .+24 ; 0x6880 <__fp_splitA+0x20> + 6868: 9f 3f cpi r25, 0xFF ; 255 + 686a: 79 f0 breq .+30 ; 0x688a <__fp_splitA+0x2a> + 686c: 87 95 ror r24 + 686e: 08 95 ret + 6870: 12 16 cp r1, r18 + 6872: 13 06 cpc r1, r19 + 6874: 14 06 cpc r1, r20 + 6876: 55 1f adc r21, r21 + 6878: f2 cf rjmp .-28 ; 0x685e <__fp_split3+0xe> + 687a: 46 95 lsr r20 + 687c: f1 df rcall .-30 ; 0x6860 <__fp_splitA> + 687e: 08 c0 rjmp .+16 ; 0x6890 <__fp_splitA+0x30> + 6880: 16 16 cp r1, r22 + 6882: 17 06 cpc r1, r23 + 6884: 18 06 cpc r1, r24 + 6886: 99 1f adc r25, r25 + 6888: f1 cf rjmp .-30 ; 0x686c <__fp_splitA+0xc> + 688a: 86 95 lsr r24 + 688c: 71 05 cpc r23, r1 + 688e: 61 05 cpc r22, r1 + 6890: 08 94 sec + 6892: 08 95 ret + +00006894 <__fp_zero>: + 6894: e8 94 clt + +00006896 <__fp_szero>: + 6896: bb 27 eor r27, r27 + 6898: 66 27 eor r22, r22 + 689a: 77 27 eor r23, r23 + 689c: cb 01 movw r24, r22 + 689e: 97 f9 bld r25, 7 + 68a0: 08 95 ret + +000068a2 <__gesf2>: + 68a2: 54 df rcall .-344 ; 0x674c <__fp_cmp> + 68a4: 08 f4 brcc .+2 ; 0x68a8 <__gesf2+0x6> + 68a6: 8f ef ldi r24, 0xFF ; 255 + 68a8: 08 95 ret + +000068aa : + 68aa: 9b 01 movw r18, r22 + 68ac: ac 01 movw r20, r24 + 68ae: 60 e0 ldi r22, 0x00 ; 0 + 68b0: 70 e0 ldi r23, 0x00 ; 0 + 68b2: 80 e8 ldi r24, 0x80 ; 128 + 68b4: 9f e3 ldi r25, 0x3F ; 63 + 68b6: 59 ce rjmp .-846 ; 0x656a <__divsf3> + 68b8: 0e f0 brts .+2 ; 0x68bc + 68ba: a7 c1 rjmp .+846 ; 0x6c0a <__fp_mpack> + 68bc: 71 cf rjmp .-286 ; 0x67a0 <__fp_nan> + 68be: 68 94 set + 68c0: 69 cf rjmp .-302 ; 0x6794 <__fp_inf> + +000068c2 : + 68c2: ce df rcall .-100 ; 0x6860 <__fp_splitA> + 68c4: c8 f3 brcs .-14 ; 0x68b8 + 68c6: 99 23 and r25, r25 + 68c8: d1 f3 breq .-12 ; 0x68be + 68ca: c6 f3 brts .-16 ; 0x68bc + 68cc: df 93 push r29 + 68ce: cf 93 push r28 + 68d0: 1f 93 push r17 + 68d2: 0f 93 push r16 + 68d4: ff 92 push r15 + 68d6: c9 2f mov r28, r25 + 68d8: dd 27 eor r29, r29 + 68da: 88 23 and r24, r24 + 68dc: 2a f0 brmi .+10 ; 0x68e8 + 68de: 21 97 sbiw r28, 0x01 ; 1 + 68e0: 66 0f add r22, r22 + 68e2: 77 1f adc r23, r23 + 68e4: 88 1f adc r24, r24 + 68e6: da f7 brpl .-10 ; 0x68de + 68e8: 20 e0 ldi r18, 0x00 ; 0 + 68ea: 30 e0 ldi r19, 0x00 ; 0 + 68ec: 40 e8 ldi r20, 0x80 ; 128 + 68ee: 5f eb ldi r21, 0xBF ; 191 + 68f0: 9f e3 ldi r25, 0x3F ; 63 + 68f2: 88 39 cpi r24, 0x98 ; 152 + 68f4: 20 f0 brcs .+8 ; 0x68fe + 68f6: 80 3e cpi r24, 0xE0 ; 224 + 68f8: 30 f0 brcs .+12 ; 0x6906 + 68fa: 21 96 adiw r28, 0x01 ; 1 + 68fc: 8f 77 andi r24, 0x7F ; 127 + 68fe: 54 dd rcall .-1368 ; 0x63a8 <__addsf3> + 6900: e5 e7 ldi r30, 0x75 ; 117 + 6902: f2 e0 ldi r31, 0x02 ; 2 + 6904: 03 c0 rjmp .+6 ; 0x690c + 6906: 50 dd rcall .-1376 ; 0x63a8 <__addsf3> + 6908: e2 ea ldi r30, 0xA2 ; 162 + 690a: f2 e0 ldi r31, 0x02 ; 2 + 690c: 4c df rcall .-360 ; 0x67a6 <__fp_powser> + 690e: 8b 01 movw r16, r22 + 6910: be 01 movw r22, r28 + 6912: ec 01 movw r28, r24 + 6914: fb 2e mov r15, r27 + 6916: 6f 57 subi r22, 0x7F ; 127 + 6918: 71 09 sbc r23, r1 + 691a: 75 95 asr r23 + 691c: 77 1f adc r23, r23 + 691e: 88 0b sbc r24, r24 + 6920: 99 0b sbc r25, r25 + 6922: be de rcall .-644 ; 0x66a0 <__floatsisf> + 6924: 28 e1 ldi r18, 0x18 ; 24 + 6926: 32 e7 ldi r19, 0x72 ; 114 + 6928: 41 e3 ldi r20, 0x31 ; 49 + 692a: 5f e3 ldi r21, 0x3F ; 63 + 692c: 16 d0 rcall .+44 ; 0x695a <__mulsf3x> + 692e: af 2d mov r26, r15 + 6930: 98 01 movw r18, r16 + 6932: ae 01 movw r20, r28 + 6934: ff 90 pop r15 + 6936: 0f 91 pop r16 + 6938: 1f 91 pop r17 + 693a: cf 91 pop r28 + 693c: df 91 pop r29 + 693e: 45 dd rcall .-1398 ; 0x63ca <__addsf3x> + 6940: 76 cf rjmp .-276 ; 0x682e <__fp_round> + +00006942 <__mulsf3>: + 6942: 0b d0 rcall .+22 ; 0x695a <__mulsf3x> + 6944: 74 cf rjmp .-280 ; 0x682e <__fp_round> + 6946: 65 df rcall .-310 ; 0x6812 <__fp_pscA> + 6948: 28 f0 brcs .+10 ; 0x6954 <__mulsf3+0x12> + 694a: 6a df rcall .-300 ; 0x6820 <__fp_pscB> + 694c: 18 f0 brcs .+6 ; 0x6954 <__mulsf3+0x12> + 694e: 95 23 and r25, r21 + 6950: 09 f0 breq .+2 ; 0x6954 <__mulsf3+0x12> + 6952: 20 cf rjmp .-448 ; 0x6794 <__fp_inf> + 6954: 25 cf rjmp .-438 ; 0x67a0 <__fp_nan> + 6956: 11 24 eor r1, r1 + 6958: 9e cf rjmp .-196 ; 0x6896 <__fp_szero> + +0000695a <__mulsf3x>: + 695a: 7a df rcall .-268 ; 0x6850 <__fp_split3> + 695c: a0 f3 brcs .-24 ; 0x6946 <__mulsf3+0x4> + +0000695e <__mulsf3_pse>: + 695e: 95 9f mul r25, r21 + 6960: d1 f3 breq .-12 ; 0x6956 <__mulsf3+0x14> + 6962: 95 0f add r25, r21 + 6964: 50 e0 ldi r21, 0x00 ; 0 + 6966: 55 1f adc r21, r21 + 6968: 62 9f mul r22, r18 + 696a: f0 01 movw r30, r0 + 696c: 72 9f mul r23, r18 + 696e: bb 27 eor r27, r27 + 6970: f0 0d add r31, r0 + 6972: b1 1d adc r27, r1 + 6974: 63 9f mul r22, r19 + 6976: aa 27 eor r26, r26 + 6978: f0 0d add r31, r0 + 697a: b1 1d adc r27, r1 + 697c: aa 1f adc r26, r26 + 697e: 64 9f mul r22, r20 + 6980: 66 27 eor r22, r22 + 6982: b0 0d add r27, r0 + 6984: a1 1d adc r26, r1 + 6986: 66 1f adc r22, r22 + 6988: 82 9f mul r24, r18 + 698a: 22 27 eor r18, r18 + 698c: b0 0d add r27, r0 + 698e: a1 1d adc r26, r1 + 6990: 62 1f adc r22, r18 + 6992: 73 9f mul r23, r19 + 6994: b0 0d add r27, r0 + 6996: a1 1d adc r26, r1 + 6998: 62 1f adc r22, r18 + 699a: 83 9f mul r24, r19 + 699c: a0 0d add r26, r0 + 699e: 61 1d adc r22, r1 + 69a0: 22 1f adc r18, r18 + 69a2: 74 9f mul r23, r20 + 69a4: 33 27 eor r19, r19 + 69a6: a0 0d add r26, r0 + 69a8: 61 1d adc r22, r1 + 69aa: 23 1f adc r18, r19 + 69ac: 84 9f mul r24, r20 + 69ae: 60 0d add r22, r0 + 69b0: 21 1d adc r18, r1 + 69b2: 82 2f mov r24, r18 + 69b4: 76 2f mov r23, r22 + 69b6: 6a 2f mov r22, r26 + 69b8: 11 24 eor r1, r1 + 69ba: 9f 57 subi r25, 0x7F ; 127 + 69bc: 50 40 sbci r21, 0x00 ; 0 + 69be: 8a f0 brmi .+34 ; 0x69e2 <__mulsf3_pse+0x84> + 69c0: e1 f0 breq .+56 ; 0x69fa <__mulsf3_pse+0x9c> + 69c2: 88 23 and r24, r24 + 69c4: 4a f0 brmi .+18 ; 0x69d8 <__mulsf3_pse+0x7a> + 69c6: ee 0f add r30, r30 + 69c8: ff 1f adc r31, r31 + 69ca: bb 1f adc r27, r27 + 69cc: 66 1f adc r22, r22 + 69ce: 77 1f adc r23, r23 + 69d0: 88 1f adc r24, r24 + 69d2: 91 50 subi r25, 0x01 ; 1 + 69d4: 50 40 sbci r21, 0x00 ; 0 + 69d6: a9 f7 brne .-22 ; 0x69c2 <__mulsf3_pse+0x64> + 69d8: 9e 3f cpi r25, 0xFE ; 254 + 69da: 51 05 cpc r21, r1 + 69dc: 70 f0 brcs .+28 ; 0x69fa <__mulsf3_pse+0x9c> + 69de: da ce rjmp .-588 ; 0x6794 <__fp_inf> + 69e0: 5a cf rjmp .-332 ; 0x6896 <__fp_szero> + 69e2: 5f 3f cpi r21, 0xFF ; 255 + 69e4: ec f3 brlt .-6 ; 0x69e0 <__mulsf3_pse+0x82> + 69e6: 98 3e cpi r25, 0xE8 ; 232 + 69e8: dc f3 brlt .-10 ; 0x69e0 <__mulsf3_pse+0x82> + 69ea: 86 95 lsr r24 + 69ec: 77 95 ror r23 + 69ee: 67 95 ror r22 + 69f0: b7 95 ror r27 + 69f2: f7 95 ror r31 + 69f4: e7 95 ror r30 + 69f6: 9f 5f subi r25, 0xFF ; 255 + 69f8: c1 f7 brne .-16 ; 0x69ea <__mulsf3_pse+0x8c> + 69fa: fe 2b or r31, r30 + 69fc: 88 0f add r24, r24 + 69fe: 91 1d adc r25, r1 + 6a00: 96 95 lsr r25 + 6a02: 87 95 ror r24 + 6a04: 97 f9 bld r25, 7 + 6a06: 08 95 ret + +00006a08 : + 6a08: fa 01 movw r30, r20 + 6a0a: ee 0f add r30, r30 + 6a0c: ff 1f adc r31, r31 + 6a0e: 30 96 adiw r30, 0x00 ; 0 + 6a10: 21 05 cpc r18, r1 + 6a12: 31 05 cpc r19, r1 + 6a14: 99 f1 breq .+102 ; 0x6a7c + 6a16: 61 15 cp r22, r1 + 6a18: 71 05 cpc r23, r1 + 6a1a: 61 f4 brne .+24 ; 0x6a34 + 6a1c: 80 38 cpi r24, 0x80 ; 128 + 6a1e: bf e3 ldi r27, 0x3F ; 63 + 6a20: 9b 07 cpc r25, r27 + 6a22: 49 f1 breq .+82 ; 0x6a76 + 6a24: 68 94 set + 6a26: 90 38 cpi r25, 0x80 ; 128 + 6a28: 81 05 cpc r24, r1 + 6a2a: 61 f0 breq .+24 ; 0x6a44 + 6a2c: 80 38 cpi r24, 0x80 ; 128 + 6a2e: bf ef ldi r27, 0xFF ; 255 + 6a30: 9b 07 cpc r25, r27 + 6a32: 41 f0 breq .+16 ; 0x6a44 + 6a34: 99 23 and r25, r25 + 6a36: 42 f5 brpl .+80 ; 0x6a88 + 6a38: ff 3f cpi r31, 0xFF ; 255 + 6a3a: e1 05 cpc r30, r1 + 6a3c: 31 05 cpc r19, r1 + 6a3e: 21 05 cpc r18, r1 + 6a40: 11 f1 breq .+68 ; 0x6a86 + 6a42: e8 94 clt + 6a44: 08 94 sec + 6a46: e7 95 ror r30 + 6a48: d9 01 movw r26, r18 + 6a4a: aa 23 and r26, r26 + 6a4c: 29 f4 brne .+10 ; 0x6a58 + 6a4e: ab 2f mov r26, r27 + 6a50: be 2f mov r27, r30 + 6a52: f8 5f subi r31, 0xF8 ; 248 + 6a54: d0 f3 brcs .-12 ; 0x6a4a + 6a56: 10 c0 rjmp .+32 ; 0x6a78 + 6a58: ff 5f subi r31, 0xFF ; 255 + 6a5a: 70 f4 brcc .+28 ; 0x6a78 + 6a5c: a6 95 lsr r26 + 6a5e: e0 f7 brcc .-8 ; 0x6a58 + 6a60: f7 39 cpi r31, 0x97 ; 151 + 6a62: 50 f0 brcs .+20 ; 0x6a78 + 6a64: 19 f0 breq .+6 ; 0x6a6c + 6a66: ff 3a cpi r31, 0xAF ; 175 + 6a68: 38 f4 brcc .+14 ; 0x6a78 + 6a6a: 9f 77 andi r25, 0x7F ; 127 + 6a6c: 9f 93 push r25 + 6a6e: 0c d0 rcall .+24 ; 0x6a88 + 6a70: 0f 90 pop r0 + 6a72: 07 fc sbrc r0, 7 + 6a74: 90 58 subi r25, 0x80 ; 128 + 6a76: 08 95 ret + 6a78: 3e f0 brts .+14 ; 0x6a88 + 6a7a: 92 ce rjmp .-732 ; 0x67a0 <__fp_nan> + 6a7c: 60 e0 ldi r22, 0x00 ; 0 + 6a7e: 70 e0 ldi r23, 0x00 ; 0 + 6a80: 80 e8 ldi r24, 0x80 ; 128 + 6a82: 9f e3 ldi r25, 0x3F ; 63 + 6a84: 08 95 ret + 6a86: 4f e7 ldi r20, 0x7F ; 127 + 6a88: 9f 77 andi r25, 0x7F ; 127 + 6a8a: 5f 93 push r21 + 6a8c: 4f 93 push r20 + 6a8e: 3f 93 push r19 + 6a90: 2f 93 push r18 + 6a92: 17 df rcall .-466 ; 0x68c2 + 6a94: 2f 91 pop r18 + 6a96: 3f 91 pop r19 + 6a98: 4f 91 pop r20 + 6a9a: 5f 91 pop r21 + 6a9c: 52 df rcall .-348 ; 0x6942 <__mulsf3> + 6a9e: 6e c0 rjmp .+220 ; 0x6b7c + +00006aa0 : + 6aa0: df de rcall .-578 ; 0x6860 <__fp_splitA> + 6aa2: e0 f0 brcs .+56 ; 0x6adc + 6aa4: 9e 37 cpi r25, 0x7E ; 126 + 6aa6: d8 f0 brcs .+54 ; 0x6ade + 6aa8: 96 39 cpi r25, 0x96 ; 150 + 6aaa: b8 f4 brcc .+46 ; 0x6ada + 6aac: 9e 38 cpi r25, 0x8E ; 142 + 6aae: 48 f4 brcc .+18 ; 0x6ac2 + 6ab0: 67 2f mov r22, r23 + 6ab2: 78 2f mov r23, r24 + 6ab4: 88 27 eor r24, r24 + 6ab6: 98 5f subi r25, 0xF8 ; 248 + 6ab8: f9 cf rjmp .-14 ; 0x6aac + 6aba: 86 95 lsr r24 + 6abc: 77 95 ror r23 + 6abe: 67 95 ror r22 + 6ac0: 93 95 inc r25 + 6ac2: 95 39 cpi r25, 0x95 ; 149 + 6ac4: d0 f3 brcs .-12 ; 0x6aba + 6ac6: b6 2f mov r27, r22 + 6ac8: b1 70 andi r27, 0x01 ; 1 + 6aca: 6b 0f add r22, r27 + 6acc: 71 1d adc r23, r1 + 6ace: 81 1d adc r24, r1 + 6ad0: 20 f4 brcc .+8 ; 0x6ada + 6ad2: 87 95 ror r24 + 6ad4: 77 95 ror r23 + 6ad6: 67 95 ror r22 + 6ad8: 93 95 inc r25 + 6ada: 7c c0 rjmp .+248 ; 0x6bd4 <__fp_mintl> + 6adc: 96 c0 rjmp .+300 ; 0x6c0a <__fp_mpack> + 6ade: db ce rjmp .-586 ; 0x6896 <__fp_szero> + 6ae0: 11 f4 brne .+4 ; 0x6ae6 + 6ae2: 0e f4 brtc .+2 ; 0x6ae6 + 6ae4: 5d ce rjmp .-838 ; 0x67a0 <__fp_nan> + 6ae6: 91 c0 rjmp .+290 ; 0x6c0a <__fp_mpack> + +00006ae8 : + 6ae8: bb de rcall .-650 ; 0x6860 <__fp_splitA> + 6aea: d0 f3 brcs .-12 ; 0x6ae0 + 6aec: 99 23 and r25, r25 + 6aee: d9 f3 breq .-10 ; 0x6ae6 + 6af0: ce f3 brts .-14 ; 0x6ae4 + 6af2: 9f 57 subi r25, 0x7F ; 127 + 6af4: 55 0b sbc r21, r21 + 6af6: 87 ff sbrs r24, 7 + 6af8: 96 d0 rcall .+300 ; 0x6c26 <__fp_norm2> + 6afa: 00 24 eor r0, r0 + 6afc: a0 e6 ldi r26, 0x60 ; 96 + 6afe: 40 ea ldi r20, 0xA0 ; 160 + 6b00: 90 01 movw r18, r0 + 6b02: 80 58 subi r24, 0x80 ; 128 + 6b04: 56 95 lsr r21 + 6b06: 97 95 ror r25 + 6b08: 28 f4 brcc .+10 ; 0x6b14 + 6b0a: 80 5c subi r24, 0xC0 ; 192 + 6b0c: 66 0f add r22, r22 + 6b0e: 77 1f adc r23, r23 + 6b10: 88 1f adc r24, r24 + 6b12: 20 f0 brcs .+8 ; 0x6b1c + 6b14: 26 17 cp r18, r22 + 6b16: 37 07 cpc r19, r23 + 6b18: 48 07 cpc r20, r24 + 6b1a: 30 f4 brcc .+12 ; 0x6b28 + 6b1c: 62 1b sub r22, r18 + 6b1e: 73 0b sbc r23, r19 + 6b20: 84 0b sbc r24, r20 + 6b22: 20 29 or r18, r0 + 6b24: 31 29 or r19, r1 + 6b26: 4a 2b or r20, r26 + 6b28: a6 95 lsr r26 + 6b2a: 17 94 ror r1 + 6b2c: 07 94 ror r0 + 6b2e: 20 25 eor r18, r0 + 6b30: 31 25 eor r19, r1 + 6b32: 4a 27 eor r20, r26 + 6b34: 58 f7 brcc .-42 ; 0x6b0c + 6b36: 66 0f add r22, r22 + 6b38: 77 1f adc r23, r23 + 6b3a: 88 1f adc r24, r24 + 6b3c: 20 f0 brcs .+8 ; 0x6b46 + 6b3e: 26 17 cp r18, r22 + 6b40: 37 07 cpc r19, r23 + 6b42: 48 07 cpc r20, r24 + 6b44: 30 f4 brcc .+12 ; 0x6b52 + 6b46: 62 0b sbc r22, r18 + 6b48: 73 0b sbc r23, r19 + 6b4a: 84 0b sbc r24, r20 + 6b4c: 20 0d add r18, r0 + 6b4e: 31 1d adc r19, r1 + 6b50: 41 1d adc r20, r1 + 6b52: a0 95 com r26 + 6b54: 81 f7 brne .-32 ; 0x6b36 + 6b56: b9 01 movw r22, r18 + 6b58: 84 2f mov r24, r20 + 6b5a: 91 58 subi r25, 0x81 ; 129 + 6b5c: 88 0f add r24, r24 + 6b5e: 96 95 lsr r25 + 6b60: 87 95 ror r24 + 6b62: 08 95 ret + +00006b64 : + 6b64: 9b 01 movw r18, r22 + 6b66: ac 01 movw r20, r24 + 6b68: ec ce rjmp .-552 ; 0x6942 <__mulsf3> + +00006b6a <__unordsf2>: + 6b6a: f0 dd rcall .-1056 ; 0x674c <__fp_cmp> + 6b6c: 88 0b sbc r24, r24 + 6b6e: 99 0b sbc r25, r25 + 6b70: 08 95 ret + 6b72: 19 f4 brne .+6 ; 0x6b7a <__unordsf2+0x10> + 6b74: 0e f0 brts .+2 ; 0x6b78 <__unordsf2+0xe> + 6b76: 0e ce rjmp .-996 ; 0x6794 <__fp_inf> + 6b78: 8d ce rjmp .-742 ; 0x6894 <__fp_zero> + 6b7a: 12 ce rjmp .-988 ; 0x67a0 <__fp_nan> + +00006b7c : + 6b7c: 71 de rcall .-798 ; 0x6860 <__fp_splitA> + 6b7e: c8 f3 brcs .-14 ; 0x6b72 <__unordsf2+0x8> + 6b80: 96 38 cpi r25, 0x86 ; 134 + 6b82: c0 f7 brcc .-16 ; 0x6b74 <__unordsf2+0xa> + 6b84: 07 f8 bld r0, 7 + 6b86: 0f 92 push r0 + 6b88: e8 94 clt + 6b8a: 2b e3 ldi r18, 0x3B ; 59 + 6b8c: 3a ea ldi r19, 0xAA ; 170 + 6b8e: 48 eb ldi r20, 0xB8 ; 184 + 6b90: 5f e7 ldi r21, 0x7F ; 127 + 6b92: e5 de rcall .-566 ; 0x695e <__mulsf3_pse> + 6b94: 0f 92 push r0 + 6b96: 0f 92 push r0 + 6b98: 0f 92 push r0 + 6b9a: 4d b7 in r20, 0x3d ; 61 + 6b9c: 5e b7 in r21, 0x3e ; 62 + 6b9e: 0f 92 push r0 + 6ba0: 7f d0 rcall .+254 ; 0x6ca0 + 6ba2: ef ec ldi r30, 0xCF ; 207 + 6ba4: f2 e0 ldi r31, 0x02 ; 2 + 6ba6: ff dd rcall .-1026 ; 0x67a6 <__fp_powser> + 6ba8: 4f 91 pop r20 + 6baa: 5f 91 pop r21 + 6bac: ef 91 pop r30 + 6bae: ff 91 pop r31 + 6bb0: e5 95 asr r30 + 6bb2: ee 1f adc r30, r30 + 6bb4: ff 1f adc r31, r31 + 6bb6: 49 f0 breq .+18 ; 0x6bca + 6bb8: fe 57 subi r31, 0x7E ; 126 + 6bba: e0 68 ori r30, 0x80 ; 128 + 6bbc: 44 27 eor r20, r20 + 6bbe: ee 0f add r30, r30 + 6bc0: 44 1f adc r20, r20 + 6bc2: fa 95 dec r31 + 6bc4: e1 f7 brne .-8 ; 0x6bbe + 6bc6: 41 95 neg r20 + 6bc8: 55 0b sbc r21, r21 + 6bca: 36 d0 rcall .+108 ; 0x6c38 + 6bcc: 0f 90 pop r0 + 6bce: 07 fe sbrs r0, 7 + 6bd0: 6c ce rjmp .-808 ; 0x68aa + 6bd2: 08 95 ret + +00006bd4 <__fp_mintl>: + 6bd4: 88 23 and r24, r24 + 6bd6: 71 f4 brne .+28 ; 0x6bf4 <__fp_mintl+0x20> + 6bd8: 77 23 and r23, r23 + 6bda: 21 f0 breq .+8 ; 0x6be4 <__fp_mintl+0x10> + 6bdc: 98 50 subi r25, 0x08 ; 8 + 6bde: 87 2b or r24, r23 + 6be0: 76 2f mov r23, r22 + 6be2: 07 c0 rjmp .+14 ; 0x6bf2 <__fp_mintl+0x1e> + 6be4: 66 23 and r22, r22 + 6be6: 11 f4 brne .+4 ; 0x6bec <__fp_mintl+0x18> + 6be8: 99 27 eor r25, r25 + 6bea: 0d c0 rjmp .+26 ; 0x6c06 <__fp_mintl+0x32> + 6bec: 90 51 subi r25, 0x10 ; 16 + 6bee: 86 2b or r24, r22 + 6bf0: 70 e0 ldi r23, 0x00 ; 0 + 6bf2: 60 e0 ldi r22, 0x00 ; 0 + 6bf4: 2a f0 brmi .+10 ; 0x6c00 <__fp_mintl+0x2c> + 6bf6: 9a 95 dec r25 + 6bf8: 66 0f add r22, r22 + 6bfa: 77 1f adc r23, r23 + 6bfc: 88 1f adc r24, r24 + 6bfe: da f7 brpl .-10 ; 0x6bf6 <__fp_mintl+0x22> + 6c00: 88 0f add r24, r24 + 6c02: 96 95 lsr r25 + 6c04: 87 95 ror r24 + 6c06: 97 f9 bld r25, 7 + 6c08: 08 95 ret + +00006c0a <__fp_mpack>: + 6c0a: 9f 3f cpi r25, 0xFF ; 255 + 6c0c: 31 f0 breq .+12 ; 0x6c1a <__fp_mpack_finite+0xc> + +00006c0e <__fp_mpack_finite>: + 6c0e: 91 50 subi r25, 0x01 ; 1 + 6c10: 20 f4 brcc .+8 ; 0x6c1a <__fp_mpack_finite+0xc> + 6c12: 87 95 ror r24 + 6c14: 77 95 ror r23 + 6c16: 67 95 ror r22 + 6c18: b7 95 ror r27 + 6c1a: 88 0f add r24, r24 + 6c1c: 91 1d adc r25, r1 + 6c1e: 96 95 lsr r25 + 6c20: 87 95 ror r24 + 6c22: 97 f9 bld r25, 7 + 6c24: 08 95 ret + +00006c26 <__fp_norm2>: + 6c26: 91 50 subi r25, 0x01 ; 1 + 6c28: 50 40 sbci r21, 0x00 ; 0 + 6c2a: 66 0f add r22, r22 + 6c2c: 77 1f adc r23, r23 + 6c2e: 88 1f adc r24, r24 + 6c30: d2 f7 brpl .-12 ; 0x6c26 <__fp_norm2> + 6c32: 08 95 ret + 6c34: af cd rjmp .-1186 ; 0x6794 <__fp_inf> + 6c36: e9 cf rjmp .-46 ; 0x6c0a <__fp_mpack> + +00006c38 : + 6c38: 13 de rcall .-986 ; 0x6860 <__fp_splitA> + 6c3a: e8 f3 brcs .-6 ; 0x6c36 <__fp_norm2+0x10> + 6c3c: 99 23 and r25, r25 + 6c3e: d9 f3 breq .-10 ; 0x6c36 <__fp_norm2+0x10> + 6c40: 94 0f add r25, r20 + 6c42: 51 1d adc r21, r1 + 6c44: bb f3 brvs .-18 ; 0x6c34 <__fp_norm2+0xe> + 6c46: 91 50 subi r25, 0x01 ; 1 + 6c48: 50 40 sbci r21, 0x00 ; 0 + 6c4a: 94 f0 brlt .+36 ; 0x6c70 + 6c4c: 59 f0 breq .+22 ; 0x6c64 + 6c4e: 88 23 and r24, r24 + 6c50: 32 f0 brmi .+12 ; 0x6c5e + 6c52: 66 0f add r22, r22 + 6c54: 77 1f adc r23, r23 + 6c56: 88 1f adc r24, r24 + 6c58: 91 50 subi r25, 0x01 ; 1 + 6c5a: 50 40 sbci r21, 0x00 ; 0 + 6c5c: c1 f7 brne .-16 ; 0x6c4e + 6c5e: 9e 3f cpi r25, 0xFE ; 254 + 6c60: 51 05 cpc r21, r1 + 6c62: 44 f7 brge .-48 ; 0x6c34 <__fp_norm2+0xe> + 6c64: 88 0f add r24, r24 + 6c66: 91 1d adc r25, r1 + 6c68: 96 95 lsr r25 + 6c6a: 87 95 ror r24 + 6c6c: 97 f9 bld r25, 7 + 6c6e: 08 95 ret + 6c70: 5f 3f cpi r21, 0xFF ; 255 + 6c72: ac f0 brlt .+42 ; 0x6c9e + 6c74: 98 3e cpi r25, 0xE8 ; 232 + 6c76: 9c f0 brlt .+38 ; 0x6c9e + 6c78: bb 27 eor r27, r27 + 6c7a: 86 95 lsr r24 + 6c7c: 77 95 ror r23 + 6c7e: 67 95 ror r22 + 6c80: b7 95 ror r27 + 6c82: 08 f4 brcc .+2 ; 0x6c86 + 6c84: b1 60 ori r27, 0x01 ; 1 + 6c86: 93 95 inc r25 + 6c88: c1 f7 brne .-16 ; 0x6c7a + 6c8a: bb 0f add r27, r27 + 6c8c: 58 f7 brcc .-42 ; 0x6c64 + 6c8e: 11 f4 brne .+4 ; 0x6c94 + 6c90: 60 ff sbrs r22, 0 + 6c92: e8 cf rjmp .-48 ; 0x6c64 + 6c94: 6f 5f subi r22, 0xFF ; 255 + 6c96: 7f 4f sbci r23, 0xFF ; 255 + 6c98: 8f 4f sbci r24, 0xFF ; 255 + 6c9a: 9f 4f sbci r25, 0xFF ; 255 + 6c9c: e3 cf rjmp .-58 ; 0x6c64 + 6c9e: fb cd rjmp .-1034 ; 0x6896 <__fp_szero> + +00006ca0 : + 6ca0: fa 01 movw r30, r20 + 6ca2: dc 01 movw r26, r24 + 6ca4: aa 0f add r26, r26 + 6ca6: bb 1f adc r27, r27 + 6ca8: 9b 01 movw r18, r22 + 6caa: ac 01 movw r20, r24 + 6cac: bf 57 subi r27, 0x7F ; 127 + 6cae: 28 f4 brcc .+10 ; 0x6cba + 6cb0: 22 27 eor r18, r18 + 6cb2: 33 27 eor r19, r19 + 6cb4: 44 27 eor r20, r20 + 6cb6: 50 78 andi r21, 0x80 ; 128 + 6cb8: 1f c0 rjmp .+62 ; 0x6cf8 + 6cba: b7 51 subi r27, 0x17 ; 23 + 6cbc: 88 f4 brcc .+34 ; 0x6ce0 + 6cbe: ab 2f mov r26, r27 + 6cc0: 00 24 eor r0, r0 + 6cc2: 46 95 lsr r20 + 6cc4: 37 95 ror r19 + 6cc6: 27 95 ror r18 + 6cc8: 01 1c adc r0, r1 + 6cca: a3 95 inc r26 + 6ccc: d2 f3 brmi .-12 ; 0x6cc2 + 6cce: 00 20 and r0, r0 + 6cd0: 69 f0 breq .+26 ; 0x6cec + 6cd2: 22 0f add r18, r18 + 6cd4: 33 1f adc r19, r19 + 6cd6: 44 1f adc r20, r20 + 6cd8: b3 95 inc r27 + 6cda: da f3 brmi .-10 ; 0x6cd2 + 6cdc: 0d d0 rcall .+26 ; 0x6cf8 + 6cde: 63 cb rjmp .-2362 ; 0x63a6 <__subsf3> + 6ce0: 61 30 cpi r22, 0x01 ; 1 + 6ce2: 71 05 cpc r23, r1 + 6ce4: a0 e8 ldi r26, 0x80 ; 128 + 6ce6: 8a 07 cpc r24, r26 + 6ce8: b9 46 sbci r27, 0x69 ; 105 + 6cea: 30 f4 brcc .+12 ; 0x6cf8 + 6cec: 9b 01 movw r18, r22 + 6cee: ac 01 movw r20, r24 + 6cf0: 66 27 eor r22, r22 + 6cf2: 77 27 eor r23, r23 + 6cf4: 88 27 eor r24, r24 + 6cf6: 90 78 andi r25, 0x80 ; 128 + 6cf8: 30 96 adiw r30, 0x00 ; 0 + 6cfa: 21 f0 breq .+8 ; 0x6d04 + 6cfc: 20 83 st Z, r18 + 6cfe: 31 83 std Z+1, r19 ; 0x01 + 6d00: 42 83 std Z+2, r20 ; 0x02 + 6d02: 53 83 std Z+3, r21 ; 0x03 + 6d04: 08 95 ret + +00006d06 : + 6d06: 2f 92 push r2 + 6d08: 3f 92 push r3 + 6d0a: 4f 92 push r4 + 6d0c: 5f 92 push r5 + 6d0e: 6f 92 push r6 + 6d10: 7f 92 push r7 + 6d12: 8f 92 push r8 + 6d14: 9f 92 push r9 + 6d16: af 92 push r10 + 6d18: bf 92 push r11 + 6d1a: cf 92 push r12 + 6d1c: df 92 push r13 + 6d1e: ef 92 push r14 + 6d20: ff 92 push r15 + 6d22: 0f 93 push r16 + 6d24: 1f 93 push r17 + 6d26: cf 93 push r28 + 6d28: df 93 push r29 + 6d2a: cd b7 in r28, 0x3d ; 61 + 6d2c: de b7 in r29, 0x3e ; 62 + 6d2e: 60 97 sbiw r28, 0x10 ; 16 + 6d30: cd bf out 0x3d, r28 ; 61 + 6d32: de bf out 0x3e, r29 ; 62 + 6d34: 7c 01 movw r14, r24 + 6d36: 1b 01 movw r2, r22 + 6d38: 6a 01 movw r12, r20 + 6d3a: fc 01 movw r30, r24 + 6d3c: 16 82 std Z+6, r1 ; 0x06 + 6d3e: 17 82 std Z+7, r1 ; 0x07 + 6d40: 83 81 ldd r24, Z+3 ; 0x03 + 6d42: 81 ff sbrs r24, 1 + 6d44: 2a c3 rjmp .+1620 ; 0x739a + 6d46: 9e 01 movw r18, r28 + 6d48: 2f 5f subi r18, 0xFF ; 255 + 6d4a: 3f 4f sbci r19, 0xFF ; 255 + 6d4c: 39 01 movw r6, r18 + 6d4e: f7 01 movw r30, r14 + 6d50: 93 81 ldd r25, Z+3 ; 0x03 + 6d52: f1 01 movw r30, r2 + 6d54: 93 fd sbrc r25, 3 + 6d56: 85 91 lpm r24, Z+ + 6d58: 93 ff sbrs r25, 3 + 6d5a: 81 91 ld r24, Z+ + 6d5c: 1f 01 movw r2, r30 + 6d5e: 88 23 and r24, r24 + 6d60: 09 f4 brne .+2 ; 0x6d64 + 6d62: 17 c3 rjmp .+1582 ; 0x7392 + 6d64: 85 32 cpi r24, 0x25 ; 37 + 6d66: 39 f4 brne .+14 ; 0x6d76 + 6d68: 93 fd sbrc r25, 3 + 6d6a: 85 91 lpm r24, Z+ + 6d6c: 93 ff sbrs r25, 3 + 6d6e: 81 91 ld r24, Z+ + 6d70: 1f 01 movw r2, r30 + 6d72: 85 32 cpi r24, 0x25 ; 37 + 6d74: 31 f4 brne .+12 ; 0x6d82 + 6d76: b7 01 movw r22, r14 + 6d78: 90 e0 ldi r25, 0x00 ; 0 + 6d7a: a3 d4 rcall .+2374 ; 0x76c2 + 6d7c: 56 01 movw r10, r12 + 6d7e: 65 01 movw r12, r10 + 6d80: e6 cf rjmp .-52 ; 0x6d4e + 6d82: 10 e0 ldi r17, 0x00 ; 0 + 6d84: 51 2c mov r5, r1 + 6d86: 91 2c mov r9, r1 + 6d88: ff e1 ldi r31, 0x1F ; 31 + 6d8a: f9 15 cp r31, r9 + 6d8c: d8 f0 brcs .+54 ; 0x6dc4 + 6d8e: 8b 32 cpi r24, 0x2B ; 43 + 6d90: 79 f0 breq .+30 ; 0x6db0 + 6d92: 38 f4 brcc .+14 ; 0x6da2 + 6d94: 80 32 cpi r24, 0x20 ; 32 + 6d96: 79 f0 breq .+30 ; 0x6db6 + 6d98: 83 32 cpi r24, 0x23 ; 35 + 6d9a: a1 f4 brne .+40 ; 0x6dc4 + 6d9c: f9 2d mov r31, r9 + 6d9e: f0 61 ori r31, 0x10 ; 16 + 6da0: 2e c0 rjmp .+92 ; 0x6dfe + 6da2: 8d 32 cpi r24, 0x2D ; 45 + 6da4: 61 f0 breq .+24 ; 0x6dbe + 6da6: 80 33 cpi r24, 0x30 ; 48 + 6da8: 69 f4 brne .+26 ; 0x6dc4 + 6daa: 29 2d mov r18, r9 + 6dac: 21 60 ori r18, 0x01 ; 1 + 6dae: 2d c0 rjmp .+90 ; 0x6e0a + 6db0: 39 2d mov r19, r9 + 6db2: 32 60 ori r19, 0x02 ; 2 + 6db4: 93 2e mov r9, r19 + 6db6: 89 2d mov r24, r9 + 6db8: 84 60 ori r24, 0x04 ; 4 + 6dba: 98 2e mov r9, r24 + 6dbc: 2a c0 rjmp .+84 ; 0x6e12 + 6dbe: e9 2d mov r30, r9 + 6dc0: e8 60 ori r30, 0x08 ; 8 + 6dc2: 15 c0 rjmp .+42 ; 0x6dee + 6dc4: 97 fc sbrc r9, 7 + 6dc6: 2d c0 rjmp .+90 ; 0x6e22 + 6dc8: 20 ed ldi r18, 0xD0 ; 208 + 6dca: 28 0f add r18, r24 + 6dcc: 2a 30 cpi r18, 0x0A ; 10 + 6dce: 88 f4 brcc .+34 ; 0x6df2 + 6dd0: 96 fe sbrs r9, 6 + 6dd2: 06 c0 rjmp .+12 ; 0x6de0 + 6dd4: 3a e0 ldi r19, 0x0A ; 10 + 6dd6: 13 9f mul r17, r19 + 6dd8: 20 0d add r18, r0 + 6dda: 11 24 eor r1, r1 + 6ddc: 12 2f mov r17, r18 + 6dde: 19 c0 rjmp .+50 ; 0x6e12 + 6de0: 8a e0 ldi r24, 0x0A ; 10 + 6de2: 58 9e mul r5, r24 + 6de4: 20 0d add r18, r0 + 6de6: 11 24 eor r1, r1 + 6de8: 52 2e mov r5, r18 + 6dea: e9 2d mov r30, r9 + 6dec: e0 62 ori r30, 0x20 ; 32 + 6dee: 9e 2e mov r9, r30 + 6df0: 10 c0 rjmp .+32 ; 0x6e12 + 6df2: 8e 32 cpi r24, 0x2E ; 46 + 6df4: 31 f4 brne .+12 ; 0x6e02 + 6df6: 96 fc sbrc r9, 6 + 6df8: cc c2 rjmp .+1432 ; 0x7392 + 6dfa: f9 2d mov r31, r9 + 6dfc: f0 64 ori r31, 0x40 ; 64 + 6dfe: 9f 2e mov r9, r31 + 6e00: 08 c0 rjmp .+16 ; 0x6e12 + 6e02: 8c 36 cpi r24, 0x6C ; 108 + 6e04: 21 f4 brne .+8 ; 0x6e0e + 6e06: 29 2d mov r18, r9 + 6e08: 20 68 ori r18, 0x80 ; 128 + 6e0a: 92 2e mov r9, r18 + 6e0c: 02 c0 rjmp .+4 ; 0x6e12 + 6e0e: 88 36 cpi r24, 0x68 ; 104 + 6e10: 41 f4 brne .+16 ; 0x6e22 + 6e12: f1 01 movw r30, r2 + 6e14: 93 fd sbrc r25, 3 + 6e16: 85 91 lpm r24, Z+ + 6e18: 93 ff sbrs r25, 3 + 6e1a: 81 91 ld r24, Z+ + 6e1c: 1f 01 movw r2, r30 + 6e1e: 81 11 cpse r24, r1 + 6e20: b3 cf rjmp .-154 ; 0x6d88 + 6e22: 9b eb ldi r25, 0xBB ; 187 + 6e24: 98 0f add r25, r24 + 6e26: 93 30 cpi r25, 0x03 ; 3 + 6e28: 20 f4 brcc .+8 ; 0x6e32 + 6e2a: 99 2d mov r25, r9 + 6e2c: 90 61 ori r25, 0x10 ; 16 + 6e2e: 80 5e subi r24, 0xE0 ; 224 + 6e30: 07 c0 rjmp .+14 ; 0x6e40 + 6e32: 9b e9 ldi r25, 0x9B ; 155 + 6e34: 98 0f add r25, r24 + 6e36: 93 30 cpi r25, 0x03 ; 3 + 6e38: 08 f0 brcs .+2 ; 0x6e3c + 6e3a: 59 c1 rjmp .+690 ; 0x70ee + 6e3c: 99 2d mov r25, r9 + 6e3e: 9f 7e andi r25, 0xEF ; 239 + 6e40: 96 ff sbrs r25, 6 + 6e42: 16 e0 ldi r17, 0x06 ; 6 + 6e44: 9f 73 andi r25, 0x3F ; 63 + 6e46: 99 2e mov r9, r25 + 6e48: 85 36 cpi r24, 0x65 ; 101 + 6e4a: 19 f4 brne .+6 ; 0x6e52 + 6e4c: 90 64 ori r25, 0x40 ; 64 + 6e4e: 99 2e mov r9, r25 + 6e50: 08 c0 rjmp .+16 ; 0x6e62 + 6e52: 86 36 cpi r24, 0x66 ; 102 + 6e54: 21 f4 brne .+8 ; 0x6e5e + 6e56: 39 2f mov r19, r25 + 6e58: 30 68 ori r19, 0x80 ; 128 + 6e5a: 93 2e mov r9, r19 + 6e5c: 02 c0 rjmp .+4 ; 0x6e62 + 6e5e: 11 11 cpse r17, r1 + 6e60: 11 50 subi r17, 0x01 ; 1 + 6e62: 97 fe sbrs r9, 7 + 6e64: 07 c0 rjmp .+14 ; 0x6e74 + 6e66: 1c 33 cpi r17, 0x3C ; 60 + 6e68: 50 f4 brcc .+20 ; 0x6e7e + 6e6a: 44 24 eor r4, r4 + 6e6c: 43 94 inc r4 + 6e6e: 41 0e add r4, r17 + 6e70: 27 e0 ldi r18, 0x07 ; 7 + 6e72: 0b c0 rjmp .+22 ; 0x6e8a + 6e74: 18 30 cpi r17, 0x08 ; 8 + 6e76: 38 f0 brcs .+14 ; 0x6e86 + 6e78: 27 e0 ldi r18, 0x07 ; 7 + 6e7a: 17 e0 ldi r17, 0x07 ; 7 + 6e7c: 05 c0 rjmp .+10 ; 0x6e88 + 6e7e: 27 e0 ldi r18, 0x07 ; 7 + 6e80: 9c e3 ldi r25, 0x3C ; 60 + 6e82: 49 2e mov r4, r25 + 6e84: 02 c0 rjmp .+4 ; 0x6e8a + 6e86: 21 2f mov r18, r17 + 6e88: 41 2c mov r4, r1 + 6e8a: 56 01 movw r10, r12 + 6e8c: 84 e0 ldi r24, 0x04 ; 4 + 6e8e: a8 0e add r10, r24 + 6e90: b1 1c adc r11, r1 + 6e92: f6 01 movw r30, r12 + 6e94: 60 81 ld r22, Z + 6e96: 71 81 ldd r23, Z+1 ; 0x01 + 6e98: 82 81 ldd r24, Z+2 ; 0x02 + 6e9a: 93 81 ldd r25, Z+3 ; 0x03 + 6e9c: 04 2d mov r16, r4 + 6e9e: a3 01 movw r20, r6 + 6ea0: 22 d3 rcall .+1604 ; 0x74e6 <__ftoa_engine> + 6ea2: 6c 01 movw r12, r24 + 6ea4: f9 81 ldd r31, Y+1 ; 0x01 + 6ea6: fc 87 std Y+12, r31 ; 0x0c + 6ea8: f0 ff sbrs r31, 0 + 6eaa: 02 c0 rjmp .+4 ; 0x6eb0 + 6eac: f3 ff sbrs r31, 3 + 6eae: 06 c0 rjmp .+12 ; 0x6ebc + 6eb0: 91 fc sbrc r9, 1 + 6eb2: 06 c0 rjmp .+12 ; 0x6ec0 + 6eb4: 92 fe sbrs r9, 2 + 6eb6: 06 c0 rjmp .+12 ; 0x6ec4 + 6eb8: 00 e2 ldi r16, 0x20 ; 32 + 6eba: 05 c0 rjmp .+10 ; 0x6ec6 + 6ebc: 0d e2 ldi r16, 0x2D ; 45 + 6ebe: 03 c0 rjmp .+6 ; 0x6ec6 + 6ec0: 0b e2 ldi r16, 0x2B ; 43 + 6ec2: 01 c0 rjmp .+2 ; 0x6ec6 + 6ec4: 00 e0 ldi r16, 0x00 ; 0 + 6ec6: 8c 85 ldd r24, Y+12 ; 0x0c + 6ec8: 8c 70 andi r24, 0x0C ; 12 + 6eca: 19 f0 breq .+6 ; 0x6ed2 + 6ecc: 01 11 cpse r16, r1 + 6ece: 43 c2 rjmp .+1158 ; 0x7356 + 6ed0: 80 c2 rjmp .+1280 ; 0x73d2 + 6ed2: 97 fe sbrs r9, 7 + 6ed4: 10 c0 rjmp .+32 ; 0x6ef6 + 6ed6: 4c 0c add r4, r12 + 6ed8: fc 85 ldd r31, Y+12 ; 0x0c + 6eda: f4 ff sbrs r31, 4 + 6edc: 04 c0 rjmp .+8 ; 0x6ee6 + 6ede: 8a 81 ldd r24, Y+2 ; 0x02 + 6ee0: 81 33 cpi r24, 0x31 ; 49 + 6ee2: 09 f4 brne .+2 ; 0x6ee6 + 6ee4: 4a 94 dec r4 + 6ee6: 14 14 cp r1, r4 + 6ee8: 74 f5 brge .+92 ; 0x6f46 + 6eea: 28 e0 ldi r18, 0x08 ; 8 + 6eec: 24 15 cp r18, r4 + 6eee: 78 f5 brcc .+94 ; 0x6f4e + 6ef0: 88 e0 ldi r24, 0x08 ; 8 + 6ef2: 48 2e mov r4, r24 + 6ef4: 2c c0 rjmp .+88 ; 0x6f4e + 6ef6: 96 fc sbrc r9, 6 + 6ef8: 2a c0 rjmp .+84 ; 0x6f4e + 6efa: 81 2f mov r24, r17 + 6efc: 90 e0 ldi r25, 0x00 ; 0 + 6efe: 8c 15 cp r24, r12 + 6f00: 9d 05 cpc r25, r13 + 6f02: 9c f0 brlt .+38 ; 0x6f2a + 6f04: 3c ef ldi r19, 0xFC ; 252 + 6f06: c3 16 cp r12, r19 + 6f08: 3f ef ldi r19, 0xFF ; 255 + 6f0a: d3 06 cpc r13, r19 + 6f0c: 74 f0 brlt .+28 ; 0x6f2a + 6f0e: 89 2d mov r24, r9 + 6f10: 80 68 ori r24, 0x80 ; 128 + 6f12: 98 2e mov r9, r24 + 6f14: 0a c0 rjmp .+20 ; 0x6f2a + 6f16: e2 e0 ldi r30, 0x02 ; 2 + 6f18: f0 e0 ldi r31, 0x00 ; 0 + 6f1a: ec 0f add r30, r28 + 6f1c: fd 1f adc r31, r29 + 6f1e: e1 0f add r30, r17 + 6f20: f1 1d adc r31, r1 + 6f22: 80 81 ld r24, Z + 6f24: 80 33 cpi r24, 0x30 ; 48 + 6f26: 19 f4 brne .+6 ; 0x6f2e + 6f28: 11 50 subi r17, 0x01 ; 1 + 6f2a: 11 11 cpse r17, r1 + 6f2c: f4 cf rjmp .-24 ; 0x6f16 + 6f2e: 97 fe sbrs r9, 7 + 6f30: 0e c0 rjmp .+28 ; 0x6f4e + 6f32: 44 24 eor r4, r4 + 6f34: 43 94 inc r4 + 6f36: 41 0e add r4, r17 + 6f38: 81 2f mov r24, r17 + 6f3a: 90 e0 ldi r25, 0x00 ; 0 + 6f3c: c8 16 cp r12, r24 + 6f3e: d9 06 cpc r13, r25 + 6f40: 2c f4 brge .+10 ; 0x6f4c + 6f42: 1c 19 sub r17, r12 + 6f44: 04 c0 rjmp .+8 ; 0x6f4e + 6f46: 44 24 eor r4, r4 + 6f48: 43 94 inc r4 + 6f4a: 01 c0 rjmp .+2 ; 0x6f4e + 6f4c: 10 e0 ldi r17, 0x00 ; 0 + 6f4e: 97 fe sbrs r9, 7 + 6f50: 06 c0 rjmp .+12 ; 0x6f5e + 6f52: 1c 14 cp r1, r12 + 6f54: 1d 04 cpc r1, r13 + 6f56: 34 f4 brge .+12 ; 0x6f64 + 6f58: c6 01 movw r24, r12 + 6f5a: 01 96 adiw r24, 0x01 ; 1 + 6f5c: 05 c0 rjmp .+10 ; 0x6f68 + 6f5e: 85 e0 ldi r24, 0x05 ; 5 + 6f60: 90 e0 ldi r25, 0x00 ; 0 + 6f62: 02 c0 rjmp .+4 ; 0x6f68 + 6f64: 81 e0 ldi r24, 0x01 ; 1 + 6f66: 90 e0 ldi r25, 0x00 ; 0 + 6f68: 01 11 cpse r16, r1 + 6f6a: 01 96 adiw r24, 0x01 ; 1 + 6f6c: 11 23 and r17, r17 + 6f6e: 31 f0 breq .+12 ; 0x6f7c + 6f70: 21 2f mov r18, r17 + 6f72: 30 e0 ldi r19, 0x00 ; 0 + 6f74: 2f 5f subi r18, 0xFF ; 255 + 6f76: 3f 4f sbci r19, 0xFF ; 255 + 6f78: 82 0f add r24, r18 + 6f7a: 93 1f adc r25, r19 + 6f7c: 25 2d mov r18, r5 + 6f7e: 30 e0 ldi r19, 0x00 ; 0 + 6f80: 82 17 cp r24, r18 + 6f82: 93 07 cpc r25, r19 + 6f84: 14 f4 brge .+4 ; 0x6f8a + 6f86: 58 1a sub r5, r24 + 6f88: 01 c0 rjmp .+2 ; 0x6f8c + 6f8a: 51 2c mov r5, r1 + 6f8c: 89 2d mov r24, r9 + 6f8e: 89 70 andi r24, 0x09 ; 9 + 6f90: 41 f4 brne .+16 ; 0x6fa2 + 6f92: 55 20 and r5, r5 + 6f94: 31 f0 breq .+12 ; 0x6fa2 + 6f96: b7 01 movw r22, r14 + 6f98: 80 e2 ldi r24, 0x20 ; 32 + 6f9a: 90 e0 ldi r25, 0x00 ; 0 + 6f9c: 92 d3 rcall .+1828 ; 0x76c2 + 6f9e: 5a 94 dec r5 + 6fa0: f8 cf rjmp .-16 ; 0x6f92 + 6fa2: 00 23 and r16, r16 + 6fa4: 21 f0 breq .+8 ; 0x6fae + 6fa6: b7 01 movw r22, r14 + 6fa8: 80 2f mov r24, r16 + 6faa: 90 e0 ldi r25, 0x00 ; 0 + 6fac: 8a d3 rcall .+1812 ; 0x76c2 + 6fae: 93 fc sbrc r9, 3 + 6fb0: 08 c0 rjmp .+16 ; 0x6fc2 + 6fb2: 55 20 and r5, r5 + 6fb4: 31 f0 breq .+12 ; 0x6fc2 + 6fb6: b7 01 movw r22, r14 + 6fb8: 80 e3 ldi r24, 0x30 ; 48 + 6fba: 90 e0 ldi r25, 0x00 ; 0 + 6fbc: 82 d3 rcall .+1796 ; 0x76c2 + 6fbe: 5a 94 dec r5 + 6fc0: f8 cf rjmp .-16 ; 0x6fb2 + 6fc2: 97 fe sbrs r9, 7 + 6fc4: 4a c0 rjmp .+148 ; 0x705a + 6fc6: 46 01 movw r8, r12 + 6fc8: d7 fe sbrs r13, 7 + 6fca: 02 c0 rjmp .+4 ; 0x6fd0 + 6fcc: 81 2c mov r8, r1 + 6fce: 91 2c mov r9, r1 + 6fd0: c6 01 movw r24, r12 + 6fd2: 88 19 sub r24, r8 + 6fd4: 99 09 sbc r25, r9 + 6fd6: f3 01 movw r30, r6 + 6fd8: e8 0f add r30, r24 + 6fda: f9 1f adc r31, r25 + 6fdc: ed 87 std Y+13, r30 ; 0x0d + 6fde: fe 87 std Y+14, r31 ; 0x0e + 6fe0: 96 01 movw r18, r12 + 6fe2: 24 19 sub r18, r4 + 6fe4: 31 09 sbc r19, r1 + 6fe6: 2f 87 std Y+15, r18 ; 0x0f + 6fe8: 38 8b std Y+16, r19 ; 0x10 + 6fea: 01 2f mov r16, r17 + 6fec: 10 e0 ldi r17, 0x00 ; 0 + 6fee: 11 95 neg r17 + 6ff0: 01 95 neg r16 + 6ff2: 11 09 sbc r17, r1 + 6ff4: 3f ef ldi r19, 0xFF ; 255 + 6ff6: 83 16 cp r8, r19 + 6ff8: 93 06 cpc r9, r19 + 6ffa: 21 f4 brne .+8 ; 0x7004 + 6ffc: b7 01 movw r22, r14 + 6ffe: 8e e2 ldi r24, 0x2E ; 46 + 7000: 90 e0 ldi r25, 0x00 ; 0 + 7002: 5f d3 rcall .+1726 ; 0x76c2 + 7004: c8 14 cp r12, r8 + 7006: d9 04 cpc r13, r9 + 7008: 4c f0 brlt .+18 ; 0x701c + 700a: 8f 85 ldd r24, Y+15 ; 0x0f + 700c: 98 89 ldd r25, Y+16 ; 0x10 + 700e: 88 15 cp r24, r8 + 7010: 99 05 cpc r25, r9 + 7012: 24 f4 brge .+8 ; 0x701c + 7014: ed 85 ldd r30, Y+13 ; 0x0d + 7016: fe 85 ldd r31, Y+14 ; 0x0e + 7018: 81 81 ldd r24, Z+1 ; 0x01 + 701a: 01 c0 rjmp .+2 ; 0x701e + 701c: 80 e3 ldi r24, 0x30 ; 48 + 701e: f1 e0 ldi r31, 0x01 ; 1 + 7020: 8f 1a sub r8, r31 + 7022: 91 08 sbc r9, r1 + 7024: 2d 85 ldd r18, Y+13 ; 0x0d + 7026: 3e 85 ldd r19, Y+14 ; 0x0e + 7028: 2f 5f subi r18, 0xFF ; 255 + 702a: 3f 4f sbci r19, 0xFF ; 255 + 702c: 2d 87 std Y+13, r18 ; 0x0d + 702e: 3e 87 std Y+14, r19 ; 0x0e + 7030: 80 16 cp r8, r16 + 7032: 91 06 cpc r9, r17 + 7034: 24 f0 brlt .+8 ; 0x703e + 7036: b7 01 movw r22, r14 + 7038: 90 e0 ldi r25, 0x00 ; 0 + 703a: 43 d3 rcall .+1670 ; 0x76c2 + 703c: db cf rjmp .-74 ; 0x6ff4 + 703e: c8 14 cp r12, r8 + 7040: d9 04 cpc r13, r9 + 7042: 41 f4 brne .+16 ; 0x7054 + 7044: 9a 81 ldd r25, Y+2 ; 0x02 + 7046: 96 33 cpi r25, 0x36 ; 54 + 7048: 20 f4 brcc .+8 ; 0x7052 + 704a: 95 33 cpi r25, 0x35 ; 53 + 704c: 19 f4 brne .+6 ; 0x7054 + 704e: 3c 85 ldd r19, Y+12 ; 0x0c + 7050: 34 ff sbrs r19, 4 + 7052: 81 e3 ldi r24, 0x31 ; 49 + 7054: b7 01 movw r22, r14 + 7056: 90 e0 ldi r25, 0x00 ; 0 + 7058: 48 c0 rjmp .+144 ; 0x70ea + 705a: 8a 81 ldd r24, Y+2 ; 0x02 + 705c: 81 33 cpi r24, 0x31 ; 49 + 705e: 19 f0 breq .+6 ; 0x7066 + 7060: 9c 85 ldd r25, Y+12 ; 0x0c + 7062: 9f 7e andi r25, 0xEF ; 239 + 7064: 9c 87 std Y+12, r25 ; 0x0c + 7066: b7 01 movw r22, r14 + 7068: 90 e0 ldi r25, 0x00 ; 0 + 706a: 2b d3 rcall .+1622 ; 0x76c2 + 706c: 11 11 cpse r17, r1 + 706e: 05 c0 rjmp .+10 ; 0x707a + 7070: 94 fc sbrc r9, 4 + 7072: 16 c0 rjmp .+44 ; 0x70a0 + 7074: 85 e6 ldi r24, 0x65 ; 101 + 7076: 90 e0 ldi r25, 0x00 ; 0 + 7078: 15 c0 rjmp .+42 ; 0x70a4 + 707a: b7 01 movw r22, r14 + 707c: 8e e2 ldi r24, 0x2E ; 46 + 707e: 90 e0 ldi r25, 0x00 ; 0 + 7080: 20 d3 rcall .+1600 ; 0x76c2 + 7082: 1e 5f subi r17, 0xFE ; 254 + 7084: 82 e0 ldi r24, 0x02 ; 2 + 7086: 01 e0 ldi r16, 0x01 ; 1 + 7088: 08 0f add r16, r24 + 708a: f3 01 movw r30, r6 + 708c: e8 0f add r30, r24 + 708e: f1 1d adc r31, r1 + 7090: 80 81 ld r24, Z + 7092: b7 01 movw r22, r14 + 7094: 90 e0 ldi r25, 0x00 ; 0 + 7096: 15 d3 rcall .+1578 ; 0x76c2 + 7098: 80 2f mov r24, r16 + 709a: 01 13 cpse r16, r17 + 709c: f4 cf rjmp .-24 ; 0x7086 + 709e: e8 cf rjmp .-48 ; 0x7070 + 70a0: 85 e4 ldi r24, 0x45 ; 69 + 70a2: 90 e0 ldi r25, 0x00 ; 0 + 70a4: b7 01 movw r22, r14 + 70a6: 0d d3 rcall .+1562 ; 0x76c2 + 70a8: d7 fc sbrc r13, 7 + 70aa: 06 c0 rjmp .+12 ; 0x70b8 + 70ac: c1 14 cp r12, r1 + 70ae: d1 04 cpc r13, r1 + 70b0: 41 f4 brne .+16 ; 0x70c2 + 70b2: ec 85 ldd r30, Y+12 ; 0x0c + 70b4: e4 ff sbrs r30, 4 + 70b6: 05 c0 rjmp .+10 ; 0x70c2 + 70b8: d1 94 neg r13 + 70ba: c1 94 neg r12 + 70bc: d1 08 sbc r13, r1 + 70be: 8d e2 ldi r24, 0x2D ; 45 + 70c0: 01 c0 rjmp .+2 ; 0x70c4 + 70c2: 8b e2 ldi r24, 0x2B ; 43 + 70c4: b7 01 movw r22, r14 + 70c6: 90 e0 ldi r25, 0x00 ; 0 + 70c8: fc d2 rcall .+1528 ; 0x76c2 + 70ca: 80 e3 ldi r24, 0x30 ; 48 + 70cc: 2a e0 ldi r18, 0x0A ; 10 + 70ce: c2 16 cp r12, r18 + 70d0: d1 04 cpc r13, r1 + 70d2: 2c f0 brlt .+10 ; 0x70de + 70d4: 8f 5f subi r24, 0xFF ; 255 + 70d6: fa e0 ldi r31, 0x0A ; 10 + 70d8: cf 1a sub r12, r31 + 70da: d1 08 sbc r13, r1 + 70dc: f7 cf rjmp .-18 ; 0x70cc + 70de: b7 01 movw r22, r14 + 70e0: 90 e0 ldi r25, 0x00 ; 0 + 70e2: ef d2 rcall .+1502 ; 0x76c2 + 70e4: b7 01 movw r22, r14 + 70e6: c6 01 movw r24, r12 + 70e8: c0 96 adiw r24, 0x30 ; 48 + 70ea: eb d2 rcall .+1494 ; 0x76c2 + 70ec: 49 c1 rjmp .+658 ; 0x7380 + 70ee: 83 36 cpi r24, 0x63 ; 99 + 70f0: 31 f0 breq .+12 ; 0x70fe + 70f2: 83 37 cpi r24, 0x73 ; 115 + 70f4: 79 f0 breq .+30 ; 0x7114 + 70f6: 83 35 cpi r24, 0x53 ; 83 + 70f8: 09 f0 breq .+2 ; 0x70fc + 70fa: 52 c0 rjmp .+164 ; 0x71a0 + 70fc: 1f c0 rjmp .+62 ; 0x713c + 70fe: 56 01 movw r10, r12 + 7100: 32 e0 ldi r19, 0x02 ; 2 + 7102: a3 0e add r10, r19 + 7104: b1 1c adc r11, r1 + 7106: f6 01 movw r30, r12 + 7108: 80 81 ld r24, Z + 710a: 89 83 std Y+1, r24 ; 0x01 + 710c: 01 e0 ldi r16, 0x01 ; 1 + 710e: 10 e0 ldi r17, 0x00 ; 0 + 7110: 63 01 movw r12, r6 + 7112: 11 c0 rjmp .+34 ; 0x7136 + 7114: 56 01 movw r10, r12 + 7116: f2 e0 ldi r31, 0x02 ; 2 + 7118: af 0e add r10, r31 + 711a: b1 1c adc r11, r1 + 711c: f6 01 movw r30, r12 + 711e: c0 80 ld r12, Z + 7120: d1 80 ldd r13, Z+1 ; 0x01 + 7122: 96 fe sbrs r9, 6 + 7124: 03 c0 rjmp .+6 ; 0x712c + 7126: 61 2f mov r22, r17 + 7128: 70 e0 ldi r23, 0x00 ; 0 + 712a: 02 c0 rjmp .+4 ; 0x7130 + 712c: 6f ef ldi r22, 0xFF ; 255 + 712e: 7f ef ldi r23, 0xFF ; 255 + 7130: c6 01 movw r24, r12 + 7132: bc d2 rcall .+1400 ; 0x76ac + 7134: 8c 01 movw r16, r24 + 7136: f9 2d mov r31, r9 + 7138: ff 77 andi r31, 0x7F ; 127 + 713a: 13 c0 rjmp .+38 ; 0x7162 + 713c: 56 01 movw r10, r12 + 713e: 22 e0 ldi r18, 0x02 ; 2 + 7140: a2 0e add r10, r18 + 7142: b1 1c adc r11, r1 + 7144: f6 01 movw r30, r12 + 7146: c0 80 ld r12, Z + 7148: d1 80 ldd r13, Z+1 ; 0x01 + 714a: 96 fe sbrs r9, 6 + 714c: 03 c0 rjmp .+6 ; 0x7154 + 714e: 61 2f mov r22, r17 + 7150: 70 e0 ldi r23, 0x00 ; 0 + 7152: 02 c0 rjmp .+4 ; 0x7158 + 7154: 6f ef ldi r22, 0xFF ; 255 + 7156: 7f ef ldi r23, 0xFF ; 255 + 7158: c6 01 movw r24, r12 + 715a: 9d d2 rcall .+1338 ; 0x7696 + 715c: 8c 01 movw r16, r24 + 715e: f9 2d mov r31, r9 + 7160: f0 68 ori r31, 0x80 ; 128 + 7162: 9f 2e mov r9, r31 + 7164: f3 fd sbrc r31, 3 + 7166: 18 c0 rjmp .+48 ; 0x7198 + 7168: 85 2d mov r24, r5 + 716a: 90 e0 ldi r25, 0x00 ; 0 + 716c: 08 17 cp r16, r24 + 716e: 19 07 cpc r17, r25 + 7170: 98 f4 brcc .+38 ; 0x7198 + 7172: b7 01 movw r22, r14 + 7174: 80 e2 ldi r24, 0x20 ; 32 + 7176: 90 e0 ldi r25, 0x00 ; 0 + 7178: a4 d2 rcall .+1352 ; 0x76c2 + 717a: 5a 94 dec r5 + 717c: f5 cf rjmp .-22 ; 0x7168 + 717e: f6 01 movw r30, r12 + 7180: 97 fc sbrc r9, 7 + 7182: 85 91 lpm r24, Z+ + 7184: 97 fe sbrs r9, 7 + 7186: 81 91 ld r24, Z+ + 7188: 6f 01 movw r12, r30 + 718a: b7 01 movw r22, r14 + 718c: 90 e0 ldi r25, 0x00 ; 0 + 718e: 99 d2 rcall .+1330 ; 0x76c2 + 7190: 51 10 cpse r5, r1 + 7192: 5a 94 dec r5 + 7194: 01 50 subi r16, 0x01 ; 1 + 7196: 11 09 sbc r17, r1 + 7198: 01 15 cp r16, r1 + 719a: 11 05 cpc r17, r1 + 719c: 81 f7 brne .-32 ; 0x717e + 719e: f0 c0 rjmp .+480 ; 0x7380 + 71a0: 84 36 cpi r24, 0x64 ; 100 + 71a2: 11 f0 breq .+4 ; 0x71a8 + 71a4: 89 36 cpi r24, 0x69 ; 105 + 71a6: 59 f5 brne .+86 ; 0x71fe + 71a8: 56 01 movw r10, r12 + 71aa: 97 fe sbrs r9, 7 + 71ac: 09 c0 rjmp .+18 ; 0x71c0 + 71ae: 24 e0 ldi r18, 0x04 ; 4 + 71b0: a2 0e add r10, r18 + 71b2: b1 1c adc r11, r1 + 71b4: f6 01 movw r30, r12 + 71b6: 60 81 ld r22, Z + 71b8: 71 81 ldd r23, Z+1 ; 0x01 + 71ba: 82 81 ldd r24, Z+2 ; 0x02 + 71bc: 93 81 ldd r25, Z+3 ; 0x03 + 71be: 0a c0 rjmp .+20 ; 0x71d4 + 71c0: f2 e0 ldi r31, 0x02 ; 2 + 71c2: af 0e add r10, r31 + 71c4: b1 1c adc r11, r1 + 71c6: f6 01 movw r30, r12 + 71c8: 60 81 ld r22, Z + 71ca: 71 81 ldd r23, Z+1 ; 0x01 + 71cc: 07 2e mov r0, r23 + 71ce: 00 0c add r0, r0 + 71d0: 88 0b sbc r24, r24 + 71d2: 99 0b sbc r25, r25 + 71d4: f9 2d mov r31, r9 + 71d6: ff 76 andi r31, 0x6F ; 111 + 71d8: 9f 2e mov r9, r31 + 71da: 97 ff sbrs r25, 7 + 71dc: 09 c0 rjmp .+18 ; 0x71f0 + 71de: 90 95 com r25 + 71e0: 80 95 com r24 + 71e2: 70 95 com r23 + 71e4: 61 95 neg r22 + 71e6: 7f 4f sbci r23, 0xFF ; 255 + 71e8: 8f 4f sbci r24, 0xFF ; 255 + 71ea: 9f 4f sbci r25, 0xFF ; 255 + 71ec: f0 68 ori r31, 0x80 ; 128 + 71ee: 9f 2e mov r9, r31 + 71f0: 2a e0 ldi r18, 0x0A ; 10 + 71f2: 30 e0 ldi r19, 0x00 ; 0 + 71f4: a3 01 movw r20, r6 + 71f6: c3 d2 rcall .+1414 ; 0x777e <__ultoa_invert> + 71f8: c8 2e mov r12, r24 + 71fa: c6 18 sub r12, r6 + 71fc: 3e c0 rjmp .+124 ; 0x727a + 71fe: 09 2d mov r16, r9 + 7200: 85 37 cpi r24, 0x75 ; 117 + 7202: 21 f4 brne .+8 ; 0x720c + 7204: 0f 7e andi r16, 0xEF ; 239 + 7206: 2a e0 ldi r18, 0x0A ; 10 + 7208: 30 e0 ldi r19, 0x00 ; 0 + 720a: 1d c0 rjmp .+58 ; 0x7246 + 720c: 09 7f andi r16, 0xF9 ; 249 + 720e: 8f 36 cpi r24, 0x6F ; 111 + 7210: 91 f0 breq .+36 ; 0x7236 + 7212: 18 f4 brcc .+6 ; 0x721a + 7214: 88 35 cpi r24, 0x58 ; 88 + 7216: 59 f0 breq .+22 ; 0x722e + 7218: bc c0 rjmp .+376 ; 0x7392 + 721a: 80 37 cpi r24, 0x70 ; 112 + 721c: 19 f0 breq .+6 ; 0x7224 + 721e: 88 37 cpi r24, 0x78 ; 120 + 7220: 11 f0 breq .+4 ; 0x7226 + 7222: b7 c0 rjmp .+366 ; 0x7392 + 7224: 00 61 ori r16, 0x10 ; 16 + 7226: 04 ff sbrs r16, 4 + 7228: 09 c0 rjmp .+18 ; 0x723c + 722a: 04 60 ori r16, 0x04 ; 4 + 722c: 07 c0 rjmp .+14 ; 0x723c + 722e: 94 fe sbrs r9, 4 + 7230: 08 c0 rjmp .+16 ; 0x7242 + 7232: 06 60 ori r16, 0x06 ; 6 + 7234: 06 c0 rjmp .+12 ; 0x7242 + 7236: 28 e0 ldi r18, 0x08 ; 8 + 7238: 30 e0 ldi r19, 0x00 ; 0 + 723a: 05 c0 rjmp .+10 ; 0x7246 + 723c: 20 e1 ldi r18, 0x10 ; 16 + 723e: 30 e0 ldi r19, 0x00 ; 0 + 7240: 02 c0 rjmp .+4 ; 0x7246 + 7242: 20 e1 ldi r18, 0x10 ; 16 + 7244: 32 e0 ldi r19, 0x02 ; 2 + 7246: 56 01 movw r10, r12 + 7248: 07 ff sbrs r16, 7 + 724a: 09 c0 rjmp .+18 ; 0x725e + 724c: 84 e0 ldi r24, 0x04 ; 4 + 724e: a8 0e add r10, r24 + 7250: b1 1c adc r11, r1 + 7252: f6 01 movw r30, r12 + 7254: 60 81 ld r22, Z + 7256: 71 81 ldd r23, Z+1 ; 0x01 + 7258: 82 81 ldd r24, Z+2 ; 0x02 + 725a: 93 81 ldd r25, Z+3 ; 0x03 + 725c: 08 c0 rjmp .+16 ; 0x726e + 725e: f2 e0 ldi r31, 0x02 ; 2 + 7260: af 0e add r10, r31 + 7262: b1 1c adc r11, r1 + 7264: f6 01 movw r30, r12 + 7266: 60 81 ld r22, Z + 7268: 71 81 ldd r23, Z+1 ; 0x01 + 726a: 80 e0 ldi r24, 0x00 ; 0 + 726c: 90 e0 ldi r25, 0x00 ; 0 + 726e: a3 01 movw r20, r6 + 7270: 86 d2 rcall .+1292 ; 0x777e <__ultoa_invert> + 7272: c8 2e mov r12, r24 + 7274: c6 18 sub r12, r6 + 7276: 0f 77 andi r16, 0x7F ; 127 + 7278: 90 2e mov r9, r16 + 727a: 96 fe sbrs r9, 6 + 727c: 0b c0 rjmp .+22 ; 0x7294 + 727e: 09 2d mov r16, r9 + 7280: 0e 7f andi r16, 0xFE ; 254 + 7282: c1 16 cp r12, r17 + 7284: 50 f4 brcc .+20 ; 0x729a + 7286: 94 fe sbrs r9, 4 + 7288: 0a c0 rjmp .+20 ; 0x729e + 728a: 92 fc sbrc r9, 2 + 728c: 08 c0 rjmp .+16 ; 0x729e + 728e: 09 2d mov r16, r9 + 7290: 0e 7e andi r16, 0xEE ; 238 + 7292: 05 c0 rjmp .+10 ; 0x729e + 7294: dc 2c mov r13, r12 + 7296: 09 2d mov r16, r9 + 7298: 03 c0 rjmp .+6 ; 0x72a0 + 729a: dc 2c mov r13, r12 + 729c: 01 c0 rjmp .+2 ; 0x72a0 + 729e: d1 2e mov r13, r17 + 72a0: 04 ff sbrs r16, 4 + 72a2: 0d c0 rjmp .+26 ; 0x72be + 72a4: fe 01 movw r30, r28 + 72a6: ec 0d add r30, r12 + 72a8: f1 1d adc r31, r1 + 72aa: 80 81 ld r24, Z + 72ac: 80 33 cpi r24, 0x30 ; 48 + 72ae: 11 f4 brne .+4 ; 0x72b4 + 72b0: 09 7e andi r16, 0xE9 ; 233 + 72b2: 09 c0 rjmp .+18 ; 0x72c6 + 72b4: 02 ff sbrs r16, 2 + 72b6: 06 c0 rjmp .+12 ; 0x72c4 + 72b8: d3 94 inc r13 + 72ba: d3 94 inc r13 + 72bc: 04 c0 rjmp .+8 ; 0x72c6 + 72be: 80 2f mov r24, r16 + 72c0: 86 78 andi r24, 0x86 ; 134 + 72c2: 09 f0 breq .+2 ; 0x72c6 + 72c4: d3 94 inc r13 + 72c6: 03 fd sbrc r16, 3 + 72c8: 10 c0 rjmp .+32 ; 0x72ea + 72ca: 00 ff sbrs r16, 0 + 72cc: 06 c0 rjmp .+12 ; 0x72da + 72ce: 1c 2d mov r17, r12 + 72d0: d5 14 cp r13, r5 + 72d2: 78 f4 brcc .+30 ; 0x72f2 + 72d4: 15 0d add r17, r5 + 72d6: 1d 19 sub r17, r13 + 72d8: 0c c0 rjmp .+24 ; 0x72f2 + 72da: d5 14 cp r13, r5 + 72dc: 50 f4 brcc .+20 ; 0x72f2 + 72de: b7 01 movw r22, r14 + 72e0: 80 e2 ldi r24, 0x20 ; 32 + 72e2: 90 e0 ldi r25, 0x00 ; 0 + 72e4: ee d1 rcall .+988 ; 0x76c2 + 72e6: d3 94 inc r13 + 72e8: f8 cf rjmp .-16 ; 0x72da + 72ea: d5 14 cp r13, r5 + 72ec: 10 f4 brcc .+4 ; 0x72f2 + 72ee: 5d 18 sub r5, r13 + 72f0: 01 c0 rjmp .+2 ; 0x72f4 + 72f2: 51 2c mov r5, r1 + 72f4: 04 ff sbrs r16, 4 + 72f6: 0f c0 rjmp .+30 ; 0x7316 + 72f8: b7 01 movw r22, r14 + 72fa: 80 e3 ldi r24, 0x30 ; 48 + 72fc: 90 e0 ldi r25, 0x00 ; 0 + 72fe: e1 d1 rcall .+962 ; 0x76c2 + 7300: 02 ff sbrs r16, 2 + 7302: 16 c0 rjmp .+44 ; 0x7330 + 7304: 01 fd sbrc r16, 1 + 7306: 03 c0 rjmp .+6 ; 0x730e + 7308: 88 e7 ldi r24, 0x78 ; 120 + 730a: 90 e0 ldi r25, 0x00 ; 0 + 730c: 02 c0 rjmp .+4 ; 0x7312 + 730e: 88 e5 ldi r24, 0x58 ; 88 + 7310: 90 e0 ldi r25, 0x00 ; 0 + 7312: b7 01 movw r22, r14 + 7314: 0c c0 rjmp .+24 ; 0x732e + 7316: 80 2f mov r24, r16 + 7318: 86 78 andi r24, 0x86 ; 134 + 731a: 51 f0 breq .+20 ; 0x7330 + 731c: 01 ff sbrs r16, 1 + 731e: 02 c0 rjmp .+4 ; 0x7324 + 7320: 8b e2 ldi r24, 0x2B ; 43 + 7322: 01 c0 rjmp .+2 ; 0x7326 + 7324: 80 e2 ldi r24, 0x20 ; 32 + 7326: 07 fd sbrc r16, 7 + 7328: 8d e2 ldi r24, 0x2D ; 45 + 732a: b7 01 movw r22, r14 + 732c: 90 e0 ldi r25, 0x00 ; 0 + 732e: c9 d1 rcall .+914 ; 0x76c2 + 7330: c1 16 cp r12, r17 + 7332: 30 f4 brcc .+12 ; 0x7340 + 7334: b7 01 movw r22, r14 + 7336: 80 e3 ldi r24, 0x30 ; 48 + 7338: 90 e0 ldi r25, 0x00 ; 0 + 733a: c3 d1 rcall .+902 ; 0x76c2 + 733c: 11 50 subi r17, 0x01 ; 1 + 733e: f8 cf rjmp .-16 ; 0x7330 + 7340: ca 94 dec r12 + 7342: f3 01 movw r30, r6 + 7344: ec 0d add r30, r12 + 7346: f1 1d adc r31, r1 + 7348: 80 81 ld r24, Z + 734a: b7 01 movw r22, r14 + 734c: 90 e0 ldi r25, 0x00 ; 0 + 734e: b9 d1 rcall .+882 ; 0x76c2 + 7350: c1 10 cpse r12, r1 + 7352: f6 cf rjmp .-20 ; 0x7340 + 7354: 15 c0 rjmp .+42 ; 0x7380 + 7356: f4 e0 ldi r31, 0x04 ; 4 + 7358: f5 15 cp r31, r5 + 735a: 50 f5 brcc .+84 ; 0x73b0 + 735c: 84 e0 ldi r24, 0x04 ; 4 + 735e: 58 1a sub r5, r24 + 7360: 93 fe sbrs r9, 3 + 7362: 1e c0 rjmp .+60 ; 0x73a0 + 7364: 01 11 cpse r16, r1 + 7366: 25 c0 rjmp .+74 ; 0x73b2 + 7368: 2c 85 ldd r18, Y+12 ; 0x0c + 736a: 23 ff sbrs r18, 3 + 736c: 27 c0 rjmp .+78 ; 0x73bc + 736e: 08 ef ldi r16, 0xF8 ; 248 + 7370: 12 e0 ldi r17, 0x02 ; 2 + 7372: 39 2d mov r19, r9 + 7374: 30 71 andi r19, 0x10 ; 16 + 7376: 93 2e mov r9, r19 + 7378: f8 01 movw r30, r16 + 737a: 84 91 lpm r24, Z + 737c: 81 11 cpse r24, r1 + 737e: 21 c0 rjmp .+66 ; 0x73c2 + 7380: 55 20 and r5, r5 + 7382: 09 f4 brne .+2 ; 0x7386 + 7384: fc cc rjmp .-1544 ; 0x6d7e + 7386: b7 01 movw r22, r14 + 7388: 80 e2 ldi r24, 0x20 ; 32 + 738a: 90 e0 ldi r25, 0x00 ; 0 + 738c: 9a d1 rcall .+820 ; 0x76c2 + 738e: 5a 94 dec r5 + 7390: f7 cf rjmp .-18 ; 0x7380 + 7392: f7 01 movw r30, r14 + 7394: 86 81 ldd r24, Z+6 ; 0x06 + 7396: 97 81 ldd r25, Z+7 ; 0x07 + 7398: 23 c0 rjmp .+70 ; 0x73e0 + 739a: 8f ef ldi r24, 0xFF ; 255 + 739c: 9f ef ldi r25, 0xFF ; 255 + 739e: 20 c0 rjmp .+64 ; 0x73e0 + 73a0: b7 01 movw r22, r14 + 73a2: 80 e2 ldi r24, 0x20 ; 32 + 73a4: 90 e0 ldi r25, 0x00 ; 0 + 73a6: 8d d1 rcall .+794 ; 0x76c2 + 73a8: 5a 94 dec r5 + 73aa: 51 10 cpse r5, r1 + 73ac: f9 cf rjmp .-14 ; 0x73a0 + 73ae: da cf rjmp .-76 ; 0x7364 + 73b0: 51 2c mov r5, r1 + 73b2: b7 01 movw r22, r14 + 73b4: 80 2f mov r24, r16 + 73b6: 90 e0 ldi r25, 0x00 ; 0 + 73b8: 84 d1 rcall .+776 ; 0x76c2 + 73ba: d6 cf rjmp .-84 ; 0x7368 + 73bc: 0c ef ldi r16, 0xFC ; 252 + 73be: 12 e0 ldi r17, 0x02 ; 2 + 73c0: d8 cf rjmp .-80 ; 0x7372 + 73c2: 91 10 cpse r9, r1 + 73c4: 80 52 subi r24, 0x20 ; 32 + 73c6: b7 01 movw r22, r14 + 73c8: 90 e0 ldi r25, 0x00 ; 0 + 73ca: 7b d1 rcall .+758 ; 0x76c2 + 73cc: 0f 5f subi r16, 0xFF ; 255 + 73ce: 1f 4f sbci r17, 0xFF ; 255 + 73d0: d3 cf rjmp .-90 ; 0x7378 + 73d2: 23 e0 ldi r18, 0x03 ; 3 + 73d4: 25 15 cp r18, r5 + 73d6: 10 f4 brcc .+4 ; 0x73dc + 73d8: 83 e0 ldi r24, 0x03 ; 3 + 73da: c1 cf rjmp .-126 ; 0x735e + 73dc: 51 2c mov r5, r1 + 73de: c4 cf rjmp .-120 ; 0x7368 + 73e0: 60 96 adiw r28, 0x10 ; 16 + 73e2: cd bf out 0x3d, r28 ; 61 + 73e4: de bf out 0x3e, r29 ; 62 + 73e6: df 91 pop r29 + 73e8: cf 91 pop r28 + 73ea: 1f 91 pop r17 + 73ec: 0f 91 pop r16 + 73ee: ff 90 pop r15 + 73f0: ef 90 pop r14 + 73f2: df 90 pop r13 + 73f4: cf 90 pop r12 + 73f6: bf 90 pop r11 + 73f8: af 90 pop r10 + 73fa: 9f 90 pop r9 + 73fc: 8f 90 pop r8 + 73fe: 7f 90 pop r7 + 7400: 6f 90 pop r6 + 7402: 5f 90 pop r5 + 7404: 4f 90 pop r4 + 7406: 3f 90 pop r3 + 7408: 2f 90 pop r2 + 740a: 08 95 ret + +0000740c <__udivmodhi4>: + 740c: aa 1b sub r26, r26 + 740e: bb 1b sub r27, r27 + 7410: 51 e1 ldi r21, 0x11 ; 17 + 7412: 07 c0 rjmp .+14 ; 0x7422 <__udivmodhi4_ep> + +00007414 <__udivmodhi4_loop>: + 7414: aa 1f adc r26, r26 + 7416: bb 1f adc r27, r27 + 7418: a6 17 cp r26, r22 + 741a: b7 07 cpc r27, r23 + 741c: 10 f0 brcs .+4 ; 0x7422 <__udivmodhi4_ep> + 741e: a6 1b sub r26, r22 + 7420: b7 0b sbc r27, r23 + +00007422 <__udivmodhi4_ep>: + 7422: 88 1f adc r24, r24 + 7424: 99 1f adc r25, r25 + 7426: 5a 95 dec r21 + 7428: a9 f7 brne .-22 ; 0x7414 <__udivmodhi4_loop> + 742a: 80 95 com r24 + 742c: 90 95 com r25 + 742e: bc 01 movw r22, r24 + 7430: cd 01 movw r24, r26 + 7432: 08 95 ret + +00007434 <__divmodhi4>: + 7434: 97 fb bst r25, 7 + 7436: 07 2e mov r0, r23 + 7438: 16 f4 brtc .+4 ; 0x743e <__divmodhi4+0xa> + 743a: 00 94 com r0 + 743c: 06 d0 rcall .+12 ; 0x744a <__divmodhi4_neg1> + 743e: 77 fd sbrc r23, 7 + 7440: 08 d0 rcall .+16 ; 0x7452 <__divmodhi4_neg2> + 7442: e4 df rcall .-56 ; 0x740c <__udivmodhi4> + 7444: 07 fc sbrc r0, 7 + 7446: 05 d0 rcall .+10 ; 0x7452 <__divmodhi4_neg2> + 7448: 3e f4 brtc .+14 ; 0x7458 <__divmodhi4_exit> + +0000744a <__divmodhi4_neg1>: + 744a: 90 95 com r25 + 744c: 81 95 neg r24 + 744e: 9f 4f sbci r25, 0xFF ; 255 + 7450: 08 95 ret + +00007452 <__divmodhi4_neg2>: + 7452: 70 95 com r23 + 7454: 61 95 neg r22 + 7456: 7f 4f sbci r23, 0xFF ; 255 + +00007458 <__divmodhi4_exit>: + 7458: 08 95 ret + +0000745a <__udivmodsi4>: + 745a: a1 e2 ldi r26, 0x21 ; 33 + 745c: 1a 2e mov r1, r26 + 745e: aa 1b sub r26, r26 + 7460: bb 1b sub r27, r27 + 7462: fd 01 movw r30, r26 + 7464: 0d c0 rjmp .+26 ; 0x7480 <__udivmodsi4_ep> + +00007466 <__udivmodsi4_loop>: + 7466: aa 1f adc r26, r26 + 7468: bb 1f adc r27, r27 + 746a: ee 1f adc r30, r30 + 746c: ff 1f adc r31, r31 + 746e: a2 17 cp r26, r18 + 7470: b3 07 cpc r27, r19 + 7472: e4 07 cpc r30, r20 + 7474: f5 07 cpc r31, r21 + 7476: 20 f0 brcs .+8 ; 0x7480 <__udivmodsi4_ep> + 7478: a2 1b sub r26, r18 + 747a: b3 0b sbc r27, r19 + 747c: e4 0b sbc r30, r20 + 747e: f5 0b sbc r31, r21 + +00007480 <__udivmodsi4_ep>: + 7480: 66 1f adc r22, r22 + 7482: 77 1f adc r23, r23 + 7484: 88 1f adc r24, r24 + 7486: 99 1f adc r25, r25 + 7488: 1a 94 dec r1 + 748a: 69 f7 brne .-38 ; 0x7466 <__udivmodsi4_loop> + 748c: 60 95 com r22 + 748e: 70 95 com r23 + 7490: 80 95 com r24 + 7492: 90 95 com r25 + 7494: 9b 01 movw r18, r22 + 7496: ac 01 movw r20, r24 + 7498: bd 01 movw r22, r26 + 749a: cf 01 movw r24, r30 + 749c: 08 95 ret + +0000749e <__tablejump2__>: + 749e: ee 0f add r30, r30 + 74a0: ff 1f adc r31, r31 + 74a2: 88 1f adc r24, r24 + 74a4: 8b bf out 0x3b, r24 ; 59 + 74a6: 07 90 elpm r0, Z+ + 74a8: f6 91 elpm r31, Z + 74aa: e0 2d mov r30, r0 + 74ac: 1b be out 0x3b, r1 ; 59 + 74ae: 19 94 eijmp + +000074b0 <__umulhisi3>: + 74b0: a2 9f mul r26, r18 + 74b2: b0 01 movw r22, r0 + 74b4: b3 9f mul r27, r19 + 74b6: c0 01 movw r24, r0 + 74b8: a3 9f mul r26, r19 + 74ba: 70 0d add r23, r0 + 74bc: 81 1d adc r24, r1 + 74be: 11 24 eor r1, r1 + 74c0: 91 1d adc r25, r1 + 74c2: b2 9f mul r27, r18 + 74c4: 70 0d add r23, r0 + 74c6: 81 1d adc r24, r1 + 74c8: 11 24 eor r1, r1 + 74ca: 91 1d adc r25, r1 + 74cc: 08 95 ret + +000074ce <__adddi3_s8>: + 74ce: 00 24 eor r0, r0 + 74d0: a7 fd sbrc r26, 7 + 74d2: 00 94 com r0 + 74d4: 2a 0f add r18, r26 + 74d6: 30 1d adc r19, r0 + 74d8: 40 1d adc r20, r0 + 74da: 50 1d adc r21, r0 + 74dc: 60 1d adc r22, r0 + 74de: 70 1d adc r23, r0 + 74e0: 80 1d adc r24, r0 + 74e2: 90 1d adc r25, r0 + 74e4: 08 95 ret + +000074e6 <__ftoa_engine>: + 74e6: 28 30 cpi r18, 0x08 ; 8 + 74e8: 08 f0 brcs .+2 ; 0x74ec <__ftoa_engine+0x6> + 74ea: 27 e0 ldi r18, 0x07 ; 7 + 74ec: 33 27 eor r19, r19 + 74ee: da 01 movw r26, r20 + 74f0: 99 0f add r25, r25 + 74f2: 31 1d adc r19, r1 + 74f4: 87 fd sbrc r24, 7 + 74f6: 91 60 ori r25, 0x01 ; 1 + 74f8: 00 96 adiw r24, 0x00 ; 0 + 74fa: 61 05 cpc r22, r1 + 74fc: 71 05 cpc r23, r1 + 74fe: 39 f4 brne .+14 ; 0x750e <__ftoa_engine+0x28> + 7500: 32 60 ori r19, 0x02 ; 2 + 7502: 2e 5f subi r18, 0xFE ; 254 + 7504: 3d 93 st X+, r19 + 7506: 30 e3 ldi r19, 0x30 ; 48 + 7508: 2a 95 dec r18 + 750a: e1 f7 brne .-8 ; 0x7504 <__ftoa_engine+0x1e> + 750c: 08 95 ret + 750e: 9f 3f cpi r25, 0xFF ; 255 + 7510: 30 f0 brcs .+12 ; 0x751e <__ftoa_engine+0x38> + 7512: 80 38 cpi r24, 0x80 ; 128 + 7514: 71 05 cpc r23, r1 + 7516: 61 05 cpc r22, r1 + 7518: 09 f0 breq .+2 ; 0x751c <__ftoa_engine+0x36> + 751a: 3c 5f subi r19, 0xFC ; 252 + 751c: 3c 5f subi r19, 0xFC ; 252 + 751e: 3d 93 st X+, r19 + 7520: 91 30 cpi r25, 0x01 ; 1 + 7522: 08 f0 brcs .+2 ; 0x7526 <__ftoa_engine+0x40> + 7524: 80 68 ori r24, 0x80 ; 128 + 7526: 91 1d adc r25, r1 + 7528: df 93 push r29 + 752a: cf 93 push r28 + 752c: 1f 93 push r17 + 752e: 0f 93 push r16 + 7530: ff 92 push r15 + 7532: ef 92 push r14 + 7534: 19 2f mov r17, r25 + 7536: 98 7f andi r25, 0xF8 ; 248 + 7538: 96 95 lsr r25 + 753a: e9 2f mov r30, r25 + 753c: 96 95 lsr r25 + 753e: 96 95 lsr r25 + 7540: e9 0f add r30, r25 + 7542: ff 27 eor r31, r31 + 7544: e6 5a subi r30, 0xA6 ; 166 + 7546: fc 4f sbci r31, 0xFC ; 252 + 7548: 99 27 eor r25, r25 + 754a: 33 27 eor r19, r19 + 754c: ee 24 eor r14, r14 + 754e: ff 24 eor r15, r15 + 7550: a7 01 movw r20, r14 + 7552: e7 01 movw r28, r14 + 7554: 05 90 lpm r0, Z+ + 7556: 08 94 sec + 7558: 07 94 ror r0 + 755a: 28 f4 brcc .+10 ; 0x7566 <__ftoa_engine+0x80> + 755c: 36 0f add r19, r22 + 755e: e7 1e adc r14, r23 + 7560: f8 1e adc r15, r24 + 7562: 49 1f adc r20, r25 + 7564: 51 1d adc r21, r1 + 7566: 66 0f add r22, r22 + 7568: 77 1f adc r23, r23 + 756a: 88 1f adc r24, r24 + 756c: 99 1f adc r25, r25 + 756e: 06 94 lsr r0 + 7570: a1 f7 brne .-24 ; 0x755a <__ftoa_engine+0x74> + 7572: 05 90 lpm r0, Z+ + 7574: 07 94 ror r0 + 7576: 28 f4 brcc .+10 ; 0x7582 <__ftoa_engine+0x9c> + 7578: e7 0e add r14, r23 + 757a: f8 1e adc r15, r24 + 757c: 49 1f adc r20, r25 + 757e: 56 1f adc r21, r22 + 7580: c1 1d adc r28, r1 + 7582: 77 0f add r23, r23 + 7584: 88 1f adc r24, r24 + 7586: 99 1f adc r25, r25 + 7588: 66 1f adc r22, r22 + 758a: 06 94 lsr r0 + 758c: a1 f7 brne .-24 ; 0x7576 <__ftoa_engine+0x90> + 758e: 05 90 lpm r0, Z+ + 7590: 07 94 ror r0 + 7592: 28 f4 brcc .+10 ; 0x759e <__ftoa_engine+0xb8> + 7594: f8 0e add r15, r24 + 7596: 49 1f adc r20, r25 + 7598: 56 1f adc r21, r22 + 759a: c7 1f adc r28, r23 + 759c: d1 1d adc r29, r1 + 759e: 88 0f add r24, r24 + 75a0: 99 1f adc r25, r25 + 75a2: 66 1f adc r22, r22 + 75a4: 77 1f adc r23, r23 + 75a6: 06 94 lsr r0 + 75a8: a1 f7 brne .-24 ; 0x7592 <__ftoa_engine+0xac> + 75aa: 05 90 lpm r0, Z+ + 75ac: 07 94 ror r0 + 75ae: 20 f4 brcc .+8 ; 0x75b8 <__ftoa_engine+0xd2> + 75b0: 49 0f add r20, r25 + 75b2: 56 1f adc r21, r22 + 75b4: c7 1f adc r28, r23 + 75b6: d8 1f adc r29, r24 + 75b8: 99 0f add r25, r25 + 75ba: 66 1f adc r22, r22 + 75bc: 77 1f adc r23, r23 + 75be: 88 1f adc r24, r24 + 75c0: 06 94 lsr r0 + 75c2: a9 f7 brne .-22 ; 0x75ae <__ftoa_engine+0xc8> + 75c4: 84 91 lpm r24, Z + 75c6: 10 95 com r17 + 75c8: 17 70 andi r17, 0x07 ; 7 + 75ca: 41 f0 breq .+16 ; 0x75dc <__ftoa_engine+0xf6> + 75cc: d6 95 lsr r29 + 75ce: c7 95 ror r28 + 75d0: 57 95 ror r21 + 75d2: 47 95 ror r20 + 75d4: f7 94 ror r15 + 75d6: e7 94 ror r14 + 75d8: 1a 95 dec r17 + 75da: c1 f7 brne .-16 ; 0x75cc <__ftoa_engine+0xe6> + 75dc: e0 e0 ldi r30, 0x00 ; 0 + 75de: f3 e0 ldi r31, 0x03 ; 3 + 75e0: 68 94 set + 75e2: 15 90 lpm r1, Z+ + 75e4: 15 91 lpm r17, Z+ + 75e6: 35 91 lpm r19, Z+ + 75e8: 65 91 lpm r22, Z+ + 75ea: 95 91 lpm r25, Z+ + 75ec: 05 90 lpm r0, Z+ + 75ee: 7f e2 ldi r23, 0x2F ; 47 + 75f0: 73 95 inc r23 + 75f2: e1 18 sub r14, r1 + 75f4: f1 0a sbc r15, r17 + 75f6: 43 0b sbc r20, r19 + 75f8: 56 0b sbc r21, r22 + 75fa: c9 0b sbc r28, r25 + 75fc: d0 09 sbc r29, r0 + 75fe: c0 f7 brcc .-16 ; 0x75f0 <__ftoa_engine+0x10a> + 7600: e1 0c add r14, r1 + 7602: f1 1e adc r15, r17 + 7604: 43 1f adc r20, r19 + 7606: 56 1f adc r21, r22 + 7608: c9 1f adc r28, r25 + 760a: d0 1d adc r29, r0 + 760c: 7e f4 brtc .+30 ; 0x762c <__ftoa_engine+0x146> + 760e: 70 33 cpi r23, 0x30 ; 48 + 7610: 11 f4 brne .+4 ; 0x7616 <__ftoa_engine+0x130> + 7612: 8a 95 dec r24 + 7614: e6 cf rjmp .-52 ; 0x75e2 <__ftoa_engine+0xfc> + 7616: e8 94 clt + 7618: 01 50 subi r16, 0x01 ; 1 + 761a: 30 f0 brcs .+12 ; 0x7628 <__ftoa_engine+0x142> + 761c: 08 0f add r16, r24 + 761e: 0a f4 brpl .+2 ; 0x7622 <__ftoa_engine+0x13c> + 7620: 00 27 eor r16, r16 + 7622: 02 17 cp r16, r18 + 7624: 08 f4 brcc .+2 ; 0x7628 <__ftoa_engine+0x142> + 7626: 20 2f mov r18, r16 + 7628: 23 95 inc r18 + 762a: 02 2f mov r16, r18 + 762c: 7a 33 cpi r23, 0x3A ; 58 + 762e: 28 f0 brcs .+10 ; 0x763a <__ftoa_engine+0x154> + 7630: 79 e3 ldi r23, 0x39 ; 57 + 7632: 7d 93 st X+, r23 + 7634: 2a 95 dec r18 + 7636: e9 f7 brne .-6 ; 0x7632 <__ftoa_engine+0x14c> + 7638: 10 c0 rjmp .+32 ; 0x765a <__ftoa_engine+0x174> + 763a: 7d 93 st X+, r23 + 763c: 2a 95 dec r18 + 763e: 89 f6 brne .-94 ; 0x75e2 <__ftoa_engine+0xfc> + 7640: 06 94 lsr r0 + 7642: 97 95 ror r25 + 7644: 67 95 ror r22 + 7646: 37 95 ror r19 + 7648: 17 95 ror r17 + 764a: 17 94 ror r1 + 764c: e1 18 sub r14, r1 + 764e: f1 0a sbc r15, r17 + 7650: 43 0b sbc r20, r19 + 7652: 56 0b sbc r21, r22 + 7654: c9 0b sbc r28, r25 + 7656: d0 09 sbc r29, r0 + 7658: 98 f0 brcs .+38 ; 0x7680 <__ftoa_engine+0x19a> + 765a: 23 95 inc r18 + 765c: 7e 91 ld r23, -X + 765e: 73 95 inc r23 + 7660: 7a 33 cpi r23, 0x3A ; 58 + 7662: 08 f0 brcs .+2 ; 0x7666 <__ftoa_engine+0x180> + 7664: 70 e3 ldi r23, 0x30 ; 48 + 7666: 7c 93 st X, r23 + 7668: 20 13 cpse r18, r16 + 766a: b8 f7 brcc .-18 ; 0x765a <__ftoa_engine+0x174> + 766c: 7e 91 ld r23, -X + 766e: 70 61 ori r23, 0x10 ; 16 + 7670: 7d 93 st X+, r23 + 7672: 30 f0 brcs .+12 ; 0x7680 <__ftoa_engine+0x19a> + 7674: 83 95 inc r24 + 7676: 71 e3 ldi r23, 0x31 ; 49 + 7678: 7d 93 st X+, r23 + 767a: 70 e3 ldi r23, 0x30 ; 48 + 767c: 2a 95 dec r18 + 767e: e1 f7 brne .-8 ; 0x7678 <__ftoa_engine+0x192> + 7680: 11 24 eor r1, r1 + 7682: ef 90 pop r14 + 7684: ff 90 pop r15 + 7686: 0f 91 pop r16 + 7688: 1f 91 pop r17 + 768a: cf 91 pop r28 + 768c: df 91 pop r29 + 768e: 99 27 eor r25, r25 + 7690: 87 fd sbrc r24, 7 + 7692: 90 95 com r25 + 7694: 08 95 ret + +00007696 : + 7696: fc 01 movw r30, r24 + 7698: 05 90 lpm r0, Z+ + 769a: 61 50 subi r22, 0x01 ; 1 + 769c: 70 40 sbci r23, 0x00 ; 0 + 769e: 01 10 cpse r0, r1 + 76a0: d8 f7 brcc .-10 ; 0x7698 + 76a2: 80 95 com r24 + 76a4: 90 95 com r25 + 76a6: 8e 0f add r24, r30 + 76a8: 9f 1f adc r25, r31 + 76aa: 08 95 ret + +000076ac : + 76ac: fc 01 movw r30, r24 + 76ae: 61 50 subi r22, 0x01 ; 1 + 76b0: 70 40 sbci r23, 0x00 ; 0 + 76b2: 01 90 ld r0, Z+ + 76b4: 01 10 cpse r0, r1 + 76b6: d8 f7 brcc .-10 ; 0x76ae + 76b8: 80 95 com r24 + 76ba: 90 95 com r25 + 76bc: 8e 0f add r24, r30 + 76be: 9f 1f adc r25, r31 + 76c0: 08 95 ret + +000076c2 : + 76c2: 0f 93 push r16 + 76c4: 1f 93 push r17 + 76c6: cf 93 push r28 + 76c8: df 93 push r29 + 76ca: fb 01 movw r30, r22 + 76cc: 23 81 ldd r18, Z+3 ; 0x03 + 76ce: 21 fd sbrc r18, 1 + 76d0: 03 c0 rjmp .+6 ; 0x76d8 + 76d2: 8f ef ldi r24, 0xFF ; 255 + 76d4: 9f ef ldi r25, 0xFF ; 255 + 76d6: 2c c0 rjmp .+88 ; 0x7730 + 76d8: 22 ff sbrs r18, 2 + 76da: 16 c0 rjmp .+44 ; 0x7708 + 76dc: 46 81 ldd r20, Z+6 ; 0x06 + 76de: 57 81 ldd r21, Z+7 ; 0x07 + 76e0: 24 81 ldd r18, Z+4 ; 0x04 + 76e2: 35 81 ldd r19, Z+5 ; 0x05 + 76e4: 42 17 cp r20, r18 + 76e6: 53 07 cpc r21, r19 + 76e8: 44 f4 brge .+16 ; 0x76fa + 76ea: a0 81 ld r26, Z + 76ec: b1 81 ldd r27, Z+1 ; 0x01 + 76ee: 9d 01 movw r18, r26 + 76f0: 2f 5f subi r18, 0xFF ; 255 + 76f2: 3f 4f sbci r19, 0xFF ; 255 + 76f4: 20 83 st Z, r18 + 76f6: 31 83 std Z+1, r19 ; 0x01 + 76f8: 8c 93 st X, r24 + 76fa: 26 81 ldd r18, Z+6 ; 0x06 + 76fc: 37 81 ldd r19, Z+7 ; 0x07 + 76fe: 2f 5f subi r18, 0xFF ; 255 + 7700: 3f 4f sbci r19, 0xFF ; 255 + 7702: 26 83 std Z+6, r18 ; 0x06 + 7704: 37 83 std Z+7, r19 ; 0x07 + 7706: 14 c0 rjmp .+40 ; 0x7730 + 7708: 8b 01 movw r16, r22 + 770a: ec 01 movw r28, r24 + 770c: fb 01 movw r30, r22 + 770e: 00 84 ldd r0, Z+8 ; 0x08 + 7710: f1 85 ldd r31, Z+9 ; 0x09 + 7712: e0 2d mov r30, r0 + 7714: 19 95 eicall + 7716: 89 2b or r24, r25 + 7718: e1 f6 brne .-72 ; 0x76d2 + 771a: d8 01 movw r26, r16 + 771c: 16 96 adiw r26, 0x06 ; 6 + 771e: 8d 91 ld r24, X+ + 7720: 9c 91 ld r25, X + 7722: 17 97 sbiw r26, 0x07 ; 7 + 7724: 01 96 adiw r24, 0x01 ; 1 + 7726: 16 96 adiw r26, 0x06 ; 6 + 7728: 8d 93 st X+, r24 + 772a: 9c 93 st X, r25 + 772c: 17 97 sbiw r26, 0x07 ; 7 + 772e: ce 01 movw r24, r28 + 7730: df 91 pop r29 + 7732: cf 91 pop r28 + 7734: 1f 91 pop r17 + 7736: 0f 91 pop r16 + 7738: 08 95 ret + +0000773a : + 773a: 0f 93 push r16 + 773c: 1f 93 push r17 + 773e: cf 93 push r28 + 7740: df 93 push r29 + 7742: cd b7 in r28, 0x3d ; 61 + 7744: de b7 in r29, 0x3e ; 62 + 7746: 2e 97 sbiw r28, 0x0e ; 14 + 7748: cd bf out 0x3d, r28 ; 61 + 774a: de bf out 0x3e, r29 ; 62 + 774c: 8c 01 movw r16, r24 + 774e: 86 e0 ldi r24, 0x06 ; 6 + 7750: 8c 83 std Y+4, r24 ; 0x04 + 7752: 09 83 std Y+1, r16 ; 0x01 + 7754: 1a 83 std Y+2, r17 ; 0x02 + 7756: 8f ef ldi r24, 0xFF ; 255 + 7758: 9f e7 ldi r25, 0x7F ; 127 + 775a: 8d 83 std Y+5, r24 ; 0x05 + 775c: 9e 83 std Y+6, r25 ; 0x06 + 775e: ce 01 movw r24, r28 + 7760: 01 96 adiw r24, 0x01 ; 1 + 7762: d1 da rcall .-2654 ; 0x6d06 + 7764: ef 81 ldd r30, Y+7 ; 0x07 + 7766: f8 85 ldd r31, Y+8 ; 0x08 + 7768: e0 0f add r30, r16 + 776a: f1 1f adc r31, r17 + 776c: 10 82 st Z, r1 + 776e: 2e 96 adiw r28, 0x0e ; 14 + 7770: cd bf out 0x3d, r28 ; 61 + 7772: de bf out 0x3e, r29 ; 62 + 7774: df 91 pop r29 + 7776: cf 91 pop r28 + 7778: 1f 91 pop r17 + 777a: 0f 91 pop r16 + 777c: 08 95 ret + +0000777e <__ultoa_invert>: + 777e: fa 01 movw r30, r20 + 7780: aa 27 eor r26, r26 + 7782: 28 30 cpi r18, 0x08 ; 8 + 7784: 51 f1 breq .+84 ; 0x77da <__ultoa_invert+0x5c> + 7786: 20 31 cpi r18, 0x10 ; 16 + 7788: 81 f1 breq .+96 ; 0x77ea <__ultoa_invert+0x6c> + 778a: e8 94 clt + 778c: 6f 93 push r22 + 778e: 6e 7f andi r22, 0xFE ; 254 + 7790: 6e 5f subi r22, 0xFE ; 254 + 7792: 7f 4f sbci r23, 0xFF ; 255 + 7794: 8f 4f sbci r24, 0xFF ; 255 + 7796: 9f 4f sbci r25, 0xFF ; 255 + 7798: af 4f sbci r26, 0xFF ; 255 + 779a: b1 e0 ldi r27, 0x01 ; 1 + 779c: 3e d0 rcall .+124 ; 0x781a <__ultoa_invert+0x9c> + 779e: b4 e0 ldi r27, 0x04 ; 4 + 77a0: 3c d0 rcall .+120 ; 0x781a <__ultoa_invert+0x9c> + 77a2: 67 0f add r22, r23 + 77a4: 78 1f adc r23, r24 + 77a6: 89 1f adc r24, r25 + 77a8: 9a 1f adc r25, r26 + 77aa: a1 1d adc r26, r1 + 77ac: 68 0f add r22, r24 + 77ae: 79 1f adc r23, r25 + 77b0: 8a 1f adc r24, r26 + 77b2: 91 1d adc r25, r1 + 77b4: a1 1d adc r26, r1 + 77b6: 6a 0f add r22, r26 + 77b8: 71 1d adc r23, r1 + 77ba: 81 1d adc r24, r1 + 77bc: 91 1d adc r25, r1 + 77be: a1 1d adc r26, r1 + 77c0: 20 d0 rcall .+64 ; 0x7802 <__ultoa_invert+0x84> + 77c2: 09 f4 brne .+2 ; 0x77c6 <__ultoa_invert+0x48> + 77c4: 68 94 set + 77c6: 3f 91 pop r19 + 77c8: 2a e0 ldi r18, 0x0A ; 10 + 77ca: 26 9f mul r18, r22 + 77cc: 11 24 eor r1, r1 + 77ce: 30 19 sub r19, r0 + 77d0: 30 5d subi r19, 0xD0 ; 208 + 77d2: 31 93 st Z+, r19 + 77d4: de f6 brtc .-74 ; 0x778c <__ultoa_invert+0xe> + 77d6: cf 01 movw r24, r30 + 77d8: 08 95 ret + 77da: 46 2f mov r20, r22 + 77dc: 47 70 andi r20, 0x07 ; 7 + 77de: 40 5d subi r20, 0xD0 ; 208 + 77e0: 41 93 st Z+, r20 + 77e2: b3 e0 ldi r27, 0x03 ; 3 + 77e4: 0f d0 rcall .+30 ; 0x7804 <__ultoa_invert+0x86> + 77e6: c9 f7 brne .-14 ; 0x77da <__ultoa_invert+0x5c> + 77e8: f6 cf rjmp .-20 ; 0x77d6 <__ultoa_invert+0x58> + 77ea: 46 2f mov r20, r22 + 77ec: 4f 70 andi r20, 0x0F ; 15 + 77ee: 40 5d subi r20, 0xD0 ; 208 + 77f0: 4a 33 cpi r20, 0x3A ; 58 + 77f2: 18 f0 brcs .+6 ; 0x77fa <__ultoa_invert+0x7c> + 77f4: 49 5d subi r20, 0xD9 ; 217 + 77f6: 31 fd sbrc r19, 1 + 77f8: 40 52 subi r20, 0x20 ; 32 + 77fa: 41 93 st Z+, r20 + 77fc: 02 d0 rcall .+4 ; 0x7802 <__ultoa_invert+0x84> + 77fe: a9 f7 brne .-22 ; 0x77ea <__ultoa_invert+0x6c> + 7800: ea cf rjmp .-44 ; 0x77d6 <__ultoa_invert+0x58> + 7802: b4 e0 ldi r27, 0x04 ; 4 + 7804: a6 95 lsr r26 + 7806: 97 95 ror r25 + 7808: 87 95 ror r24 + 780a: 77 95 ror r23 + 780c: 67 95 ror r22 + 780e: ba 95 dec r27 + 7810: c9 f7 brne .-14 ; 0x7804 <__ultoa_invert+0x86> + 7812: 00 97 sbiw r24, 0x00 ; 0 + 7814: 61 05 cpc r22, r1 + 7816: 71 05 cpc r23, r1 + 7818: 08 95 ret + 781a: 9b 01 movw r18, r22 + 781c: ac 01 movw r20, r24 + 781e: 0a 2e mov r0, r26 + 7820: 06 94 lsr r0 + 7822: 57 95 ror r21 + 7824: 47 95 ror r20 + 7826: 37 95 ror r19 + 7828: 27 95 ror r18 + 782a: ba 95 dec r27 + 782c: c9 f7 brne .-14 ; 0x7820 <__ultoa_invert+0xa2> + 782e: 62 0f add r22, r18 + 7830: 73 1f adc r23, r19 + 7832: 84 1f adc r24, r20 + 7834: 95 1f adc r25, r21 + 7836: a0 1d adc r26, r0 + 7838: 08 95 ret + +0000783a <_exit>: + 783a: f8 94 cli + +0000783c <__stop_program>: + 783c: ff cf rjmp .-2 ; 0x783c <__stop_program> diff --git a/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.map b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.map new file mode 100644 index 0000000..d55651a --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.map @@ -0,0 +1,4964 @@ +Archive member included to satisfy reference by file (symbol) + +c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libm.a(addsf3.o) + src/devices/mpl3115a2.o (__subsf3) +c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libm.a(addsf3x.o) + c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libm.a(addsf3.o) (__addsf3x) +c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libm.a(asin.o) + src/devices/mpu9250.o (asin) +c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libm.a(atan2.o) + src/devices/mpu9250.o (atan2) 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src/ASF/common/services/clock/xmega/sysclk.o: \ + ../src/ASF/common/services/clock/xmega/sysclk.c \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/nvm/nvm.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/clock/xmega/sysclk.o b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/clock/xmega/sysclk.o new file mode 100644 index 0000000..b63b64e Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/clock/xmega/sysclk.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/ioport/xmega/ioport_compat.d b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/ioport/xmega/ioport_compat.d new file mode 100644 index 0000000..5bba80e --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/ioport/xmega/ioport_compat.d @@ -0,0 +1,101 @@ +src/ASF/common/services/ioport/xmega/ioport_compat.d \ + src/ASF/common/services/ioport/xmega/ioport_compat.o: \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.c \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/common/utils/parts.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/common/services/ioport/xmega/../xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/../xmega/ioport_compat.h + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/common/services/ioport/xmega/../xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/../xmega/ioport_compat.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/ioport/xmega/ioport_compat.o b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/ioport/xmega/ioport_compat.o new file mode 100644 index 0000000..cb38bf8 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/ioport/xmega/ioport_compat.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/serial/usart_serial.d b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/serial/usart_serial.d new file mode 100644 index 0000000..7a8925e --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/serial/usart_serial.d @@ -0,0 +1,137 @@ +src/ASF/common/services/serial/usart_serial.d \ + src/ASF/common/services/serial/usart_serial.o: \ + ../src/ASF/common/services/serial/usart_serial.c \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/utils/parts.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/usart/usart.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/config/conf_usart_serial.h + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/config/conf_usart_serial.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/serial/usart_serial.o b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/serial/usart_serial.o new file mode 100644 index 0000000..68124f5 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/serial/usart_serial.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/sleepmgr/xmega/sleepmgr.d b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/sleepmgr/xmega/sleepmgr.d new file mode 100644 index 0000000..c69ea69 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/sleepmgr/xmega/sleepmgr.d @@ -0,0 +1,104 @@ +src/ASF/common/services/sleepmgr/xmega/sleepmgr.d \ + src/ASF/common/services/sleepmgr/xmega/sleepmgr.o: \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.c \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/services/sleepmgr/xmega/sleepmgr.o b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/sleepmgr/xmega/sleepmgr.o new file mode 100644 index 0000000..ef89bf2 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/common/services/sleepmgr/xmega/sleepmgr.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/read.d b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/read.d new file mode 100644 index 0000000..d417dc4 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/read.d @@ -0,0 +1,88 @@ +src/ASF/common/utils/stdio/read.d src/ASF/common/utils/stdio/read.o: \ + ../src/ASF/common/utils/stdio/read.c ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/read.o b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/read.o new file mode 100644 index 0000000..f2afc89 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/read.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/write.d b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/write.d new file mode 100644 index 0000000..51700f2 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/write.d @@ -0,0 +1,88 @@ +src/ASF/common/utils/stdio/write.d src/ASF/common/utils/stdio/write.o: \ + ../src/ASF/common/utils/stdio/write.c ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/write.o b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/write.o new file mode 100644 index 0000000..2a24447 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/common/utils/stdio/write.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.d new file mode 100644 index 0000000..7e316aa --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.d @@ -0,0 +1,109 @@ +src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.d \ + src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.o: \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.c \ + ../src/ASF/common/boards/board.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.o new file mode 100644 index 0000000..c069caa Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/adc.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/adc.d new file mode 100644 index 0000000..55a30d1 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/adc.d @@ -0,0 +1,140 @@ +src/ASF/xmega/drivers/adc/adc.d src/ASF/xmega/drivers/adc/adc.o: \ + ../src/ASF/xmega/drivers/adc/adc.c ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/config/conf_adc.h \ + ../src/ASF/xmega/drivers/nvm/nvm.h ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/adc.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/adc.o new file mode 100644 index 0000000..f008686 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/adc.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.d new file mode 100644 index 0000000..39c8760 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.d @@ -0,0 +1,143 @@ +src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.d \ + src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.o: \ + ../src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.c \ + ../src/ASF/xmega/drivers/adc/xmega_aau/../adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h + +../src/ASF/xmega/drivers/adc/xmega_aau/../adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.o new file mode 100644 index 0000000..149ebef Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/cpu/ccp.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/cpu/ccp.d new file mode 100644 index 0000000..85fae6d --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/cpu/ccp.d @@ -0,0 +1,34 @@ +src/ASF/xmega/drivers/cpu/ccp.d src/ASF/xmega/drivers/cpu/ccp.o: \ + ../src/ASF/xmega/drivers/cpu/ccp.s ../src/ASF/xmega/utils/assembler.h \ + ../src/ASF/xmega/utils/assembler/gas.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h + +../src/ASF/xmega/utils/assembler.h: + +../src/ASF/xmega/utils/assembler/gas.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/cpu/ccp.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/cpu/ccp.o new file mode 100644 index 0000000..eb8dbe1 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/cpu/ccp.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm.d new file mode 100644 index 0000000..cf0f59e --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm.d @@ -0,0 +1,96 @@ +src/ASF/xmega/drivers/nvm/nvm.d src/ASF/xmega/drivers/nvm/nvm.o: \ + ../src/ASF/xmega/drivers/nvm/nvm.c ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\string.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\string.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm.o new file mode 100644 index 0000000..ad6c907 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm_asm.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm_asm.d new file mode 100644 index 0000000..935a8ab --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm_asm.d @@ -0,0 +1,35 @@ +src/ASF/xmega/drivers/nvm/nvm_asm.d src/ASF/xmega/drivers/nvm/nvm_asm.o: \ + ../src/ASF/xmega/drivers/nvm/nvm_asm.s \ + ../src/ASF/xmega/utils/assembler.h \ + ../src/ASF/xmega/utils/assembler/gas.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h + +../src/ASF/xmega/utils/assembler.h: + +../src/ASF/xmega/utils/assembler/gas.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm_asm.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm_asm.o new file mode 100644 index 0000000..e432e52 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/nvm/nvm_asm.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/tc/tc.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/tc/tc.d new file mode 100644 index 0000000..05ffa4e --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/tc/tc.d @@ -0,0 +1,140 @@ +src/ASF/xmega/drivers/tc/tc.d src/ASF/xmega/drivers/tc/tc.o: \ + ../src/ASF/xmega/drivers/tc/tc.c \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + ../src/ASF/common/utils/interrupt.h ../src/ASF/common/utils/parts.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/tc/tc.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/tc/tc.o new file mode 100644 index 0000000..dabf02e Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/tc/tc.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twim.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twim.d new file mode 100644 index 0000000..4b1cc5f --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twim.d @@ -0,0 +1,99 @@ +src/ASF/xmega/drivers/twi/twim.d src/ASF/xmega/drivers/twi/twim.o: \ + ../src/ASF/xmega/drivers/twi/twim.c ../src/ASF/xmega/drivers/twi/twim.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/utils/status_codes.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twim.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twim.o new file mode 100644 index 0000000..4952be4 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twim.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twis.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twis.d new file mode 100644 index 0000000..8f1c576 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twis.d @@ -0,0 +1,94 @@ +src/ASF/xmega/drivers/twi/twis.d src/ASF/xmega/drivers/twi/twis.o: \ + ../src/ASF/xmega/drivers/twi/twis.c ../src/ASF/xmega/drivers/twi/twis.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twis.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twis.o new file mode 100644 index 0000000..eb0f8f9 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/twi/twis.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/usart/usart.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/usart/usart.d new file mode 100644 index 0000000..89ec159 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/usart/usart.d @@ -0,0 +1,140 @@ +src/ASF/xmega/drivers/usart/usart.d src/ASF/xmega/drivers/usart/usart.o: \ + ../src/ASF/xmega/drivers/usart/usart.c \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/drivers/usart/usart.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/utils/status_codes.h + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/utils/status_codes.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/usart/usart.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/usart/usart.o new file mode 100644 index 0000000..70b1532 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/usart/usart.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/wdt/wdt.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/wdt/wdt.d new file mode 100644 index 0000000..5584db1 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/wdt/wdt.d @@ -0,0 +1,93 @@ +src/ASF/xmega/drivers/wdt/wdt.d src/ASF/xmega/drivers/wdt/wdt.o: \ + ../src/ASF/xmega/drivers/wdt/wdt.c ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h ../src/ASF/xmega/drivers/wdt/wdt.h + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/wdt/wdt.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/wdt/wdt.o new file mode 100644 index 0000000..549b796 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/drivers/wdt/wdt.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/services/pwm/pwm.d b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/services/pwm/pwm.d new file mode 100644 index 0000000..e900d59 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/services/pwm/pwm.d @@ -0,0 +1,216 @@ +src/ASF/xmega/services/pwm/pwm.d src/ASF/xmega/services/pwm/pwm.o: \ + ../src/ASF/xmega/services/pwm/pwm.c ../src/asf.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: diff --git a/skywave_atxmega128a1_final/Debug/src/ASF/xmega/services/pwm/pwm.o b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/services/pwm/pwm.o new file mode 100644 index 0000000..98f63e2 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/ASF/xmega/services/pwm/pwm.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/devices/ds3231.d b/skywave_atxmega128a1_final/Debug/src/devices/ds3231.d new file mode 100644 index 0000000..ec3d03b --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/devices/ds3231.d @@ -0,0 +1,227 @@ +src/devices/ds3231.d src/devices/ds3231.o: ../src/devices/ds3231.c \ + ../src/devices/ds3231.h ../src/skywave.h ../src/asf.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/drivers/twi_comms.h ../src/register_map.h ../src/asf.h + +../src/devices/ds3231.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/drivers/twi_comms.h: + +../src/register_map.h: + +../src/asf.h: diff --git a/skywave_atxmega128a1_final/Debug/src/devices/ds3231.o b/skywave_atxmega128a1_final/Debug/src/devices/ds3231.o new file mode 100644 index 0000000..58a9bd5 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/devices/ds3231.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/devices/gps.d b/skywave_atxmega128a1_final/Debug/src/devices/gps.d new file mode 100644 index 0000000..7aee95f --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/devices/gps.d @@ -0,0 +1,230 @@ +src/devices/gps.d src/devices/gps.o: ../src/devices/gps.c \ + ../src/drivers/usart_comms.h ../src/skywave.h ../src/asf.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/devices/gps.h ../src/register_map.h ../src/asf.h \ + ../src/drivers/skywave_util.h + +../src/drivers/usart_comms.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/devices/gps.h: + +../src/register_map.h: + +../src/asf.h: + +../src/drivers/skywave_util.h: diff --git a/skywave_atxmega128a1_final/Debug/src/devices/gps.o b/skywave_atxmega128a1_final/Debug/src/devices/gps.o new file mode 100644 index 0000000..f221172 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/devices/gps.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/devices/mpl3115a2.d b/skywave_atxmega128a1_final/Debug/src/devices/mpl3115a2.d new file mode 100644 index 0000000..698c321 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/devices/mpl3115a2.d @@ -0,0 +1,234 @@ +src/devices/mpl3115a2.d src/devices/mpl3115a2.o: \ + ../src/devices/mpl3115a2.c ../src/devices/mpl3115a2.h ../src/skywave.h \ + ../src/asf.h ../src/ASF/xmega/drivers/adc/adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/drivers/twi_comms.h ../src/register_map.h ../src/asf.h \ + ../src/drivers/skywave_util.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +../src/devices/mpl3115a2.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/drivers/twi_comms.h: + +../src/register_map.h: + +../src/asf.h: + +../src/drivers/skywave_util.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/skywave_atxmega128a1_final/Debug/src/devices/mpl3115a2.o b/skywave_atxmega128a1_final/Debug/src/devices/mpl3115a2.o new file mode 100644 index 0000000..f42df42 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/devices/mpl3115a2.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/devices/mpu9250.d b/skywave_atxmega128a1_final/Debug/src/devices/mpu9250.d new file mode 100644 index 0000000..00bf1ba --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/devices/mpu9250.d @@ -0,0 +1,235 @@ +src/devices/mpu9250.d src/devices/mpu9250.o: ../src/devices/mpu9250.c \ + ../src/devices/mpu9250.h ../src/skywave.h ../src/asf.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/register_map.h ../src/asf.h ../src/drivers/skywave_util.h \ + ../src/drivers/twi_comms.h ../src/drivers/MahonyAHRS.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +../src/devices/mpu9250.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/register_map.h: + +../src/asf.h: + +../src/drivers/skywave_util.h: + +../src/drivers/twi_comms.h: + +../src/drivers/MahonyAHRS.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/skywave_atxmega128a1_final/Debug/src/devices/mpu9250.o b/skywave_atxmega128a1_final/Debug/src/devices/mpu9250.o new file mode 100644 index 0000000..456e762 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/devices/mpu9250.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/devices/ntcle100.d b/skywave_atxmega128a1_final/Debug/src/devices/ntcle100.d new file mode 100644 index 0000000..ee8e1b2 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/devices/ntcle100.d @@ -0,0 +1,226 @@ +src/devices/ntcle100.d src/devices/ntcle100.o: ../src/devices/ntcle100.c \ + ../src/devices/ntcle100.h ../src/skywave.h ../src/asf.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/drivers/adc_util.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +../src/devices/ntcle100.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/drivers/adc_util.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/skywave_atxmega128a1_final/Debug/src/devices/ntcle100.o b/skywave_atxmega128a1_final/Debug/src/devices/ntcle100.o new file mode 100644 index 0000000..77259b0 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/devices/ntcle100.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/MahonyAHRS.d b/skywave_atxmega128a1_final/Debug/src/drivers/MahonyAHRS.d new file mode 100644 index 0000000..67f5daa --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/drivers/MahonyAHRS.d @@ -0,0 +1,7 @@ +src/drivers/MahonyAHRS.d src/drivers/MahonyAHRS.o: \ + ../src/drivers/MahonyAHRS.c ../src/drivers/MahonyAHRS.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +../src/drivers/MahonyAHRS.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/MahonyAHRS.o b/skywave_atxmega128a1_final/Debug/src/drivers/MahonyAHRS.o new file mode 100644 index 0000000..5a8596e Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/drivers/MahonyAHRS.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/adc_util.d b/skywave_atxmega128a1_final/Debug/src/drivers/adc_util.d new file mode 100644 index 0000000..c3458b0 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/drivers/adc_util.d @@ -0,0 +1,220 @@ +src/drivers/adc_util.d src/drivers/adc_util.o: ../src/drivers/adc_util.c \ + ../src/drivers/adc_util.h ../src/skywave.h ../src/asf.h \ + ../src/ASF/xmega/drivers/adc/adc.h ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h + +../src/drivers/adc_util.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/adc_util.o b/skywave_atxmega128a1_final/Debug/src/drivers/adc_util.o new file mode 100644 index 0000000..3619886 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/drivers/adc_util.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/skywave_util.d b/skywave_atxmega128a1_final/Debug/src/drivers/skywave_util.d new file mode 100644 index 0000000..183d7ec --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/drivers/skywave_util.d @@ -0,0 +1,242 @@ +src/drivers/skywave_util.d src/drivers/skywave_util.o: \ + ../src/drivers/skywave_util.c ../src/drivers/skywave_util.h \ + ../src/skywave.h ../src/asf.h ../src/ASF/xmega/drivers/adc/adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/register_map.h ../src/asf.h ../src/devices/ntcle100.h \ + ../src/devices/mpl3115a2.h ../src/drivers/twi_comms.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\string.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\ctype.h + +../src/drivers/skywave_util.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/register_map.h: + +../src/asf.h: + +../src/devices/ntcle100.h: + +../src/devices/mpl3115a2.h: + +../src/drivers/twi_comms.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\string.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\ctype.h: diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/skywave_util.o b/skywave_atxmega128a1_final/Debug/src/drivers/skywave_util.o new file mode 100644 index 0000000..3cac01f Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/drivers/skywave_util.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/twi_comms.d b/skywave_atxmega128a1_final/Debug/src/drivers/twi_comms.d new file mode 100644 index 0000000..8073da9 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/drivers/twi_comms.d @@ -0,0 +1,226 @@ +src/drivers/twi_comms.d src/drivers/twi_comms.o: \ + ../src/drivers/twi_comms.c ../src/drivers/twi_comms.h ../src/skywave.h \ + ../src/asf.h ../src/ASF/xmega/drivers/adc/adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/register_map.h ../src/asf.h + +../src/drivers/twi_comms.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/register_map.h: + +../src/asf.h: diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/twi_comms.o b/skywave_atxmega128a1_final/Debug/src/drivers/twi_comms.o new file mode 100644 index 0000000..23ec69d Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/drivers/twi_comms.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/usart_comms.d b/skywave_atxmega128a1_final/Debug/src/drivers/usart_comms.d new file mode 100644 index 0000000..e4c4e67 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/drivers/usart_comms.d @@ -0,0 +1,221 @@ +src/drivers/usart_comms.d src/drivers/usart_comms.o: \ + ../src/drivers/usart_comms.c ../src/drivers/usart_comms.h \ + ../src/skywave.h ../src/asf.h ../src/ASF/xmega/drivers/adc/adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h + +../src/drivers/usart_comms.h: + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: diff --git a/skywave_atxmega128a1_final/Debug/src/drivers/usart_comms.o b/skywave_atxmega128a1_final/Debug/src/drivers/usart_comms.o new file mode 100644 index 0000000..8cf773f Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/drivers/usart_comms.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/register_map.d b/skywave_atxmega128a1_final/Debug/src/register_map.d new file mode 100644 index 0000000..1ed98b2 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/register_map.d @@ -0,0 +1,218 @@ +src/register_map.d src/register_map.o: ../src/register_map.c \ + ../src/register_map.h ../src/asf.h ../src/ASF/xmega/drivers/adc/adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h + +../src/register_map.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: diff --git a/skywave_atxmega128a1_final/Debug/src/register_map.o b/skywave_atxmega128a1_final/Debug/src/register_map.o new file mode 100644 index 0000000..0326cc9 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/register_map.o differ diff --git a/skywave_atxmega128a1_final/Debug/src/skywave.d b/skywave_atxmega128a1_final/Debug/src/skywave.d new file mode 100644 index 0000000..98100c3 --- /dev/null +++ b/skywave_atxmega128a1_final/Debug/src/skywave.d @@ -0,0 +1,253 @@ +src/skywave.d src/skywave.o: ../src/skywave.c ../src/skywave.h \ + ../src/asf.h ../src/ASF/xmega/drivers/adc/adc.h \ + ../src/ASF/xmega/utils/compiler.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \ + ../src/ASF/common/utils/parts.h \ + ../src/ASF/xmega/utils/bit_handling/clz_ctz.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/preprocessor/tpaste.h \ + ../src/ASF/xmega/utils/preprocessor/stringz.h \ + ../src/ASF/xmega/utils/preprocessor/mrepeat.h \ + ../src/ASF/xmega/utils/preprocessor/preprocessor.h \ + ../src/ASF/xmega/utils/progmem.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h \ + ../src/ASF/common/utils/interrupt.h \ + ../src/ASF/common/utils/interrupt/interrupt_avr8.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + ../src/config/conf_adc.h ../src/ASF/xmega/drivers/nvm/nvm.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/sleepmgr/sleepmgr.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/config/conf_sleepmgr.h ../src/ASF/xmega/drivers/sleep/sleep.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h \ + ../src/ASF/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/ASF/common/services/clock/xmega/sysclk.h \ + ../src/ASF/common/boards/board.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/config/conf_board.h ../src/ASF/common/services/clock/osc.h \ + ../src/ASF/common/services/clock/xmega/osc.h \ + ../src/ASF/common/services/clock/pll.h \ + ../src/ASF/common/services/clock/xmega/pll.h \ + ../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h \ + ../src/ASF/xmega/drivers/cpu/ccp.h \ + ../src/ASF/common/services/delay/delay.h \ + ../src/ASF/common/services/delay/xmega/cycle_counter.h \ + ../src/ASF/common/services/ioport/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport.h \ + ../src/ASF/common/services/ioport/xmega/ioport_compat.h \ + ../src/ASF/common/services/ioport/xmega/../ioport.h \ + ../src/ASF/xmega/drivers/pmic/pmic.h ../src/ASF/xmega/services/pwm/pwm.h \ + ../src/ASF/xmega/drivers/tc/tc.h ../src/ASF/xmega/utils/status_codes.h \ + ../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h \ + ../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ + ../src/ASF/common/services/serial/serial.h \ + ../src/ASF/common/services/serial/xmega_usart/usart_serial.h \ + ../src/ASF/xmega/drivers/usart/usart.h ../src/config/conf_usart_serial.h \ + ../src/ASF/xmega/drivers/twi/twim.h ../src/config/conf_twim.h \ + ../src/ASF/xmega/drivers/twi/twi_common.h \ + ../src/ASF/xmega/drivers/twi/twis.h ../src/ASF/xmega/drivers/wdt/wdt.h \ + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h \ + ../src/drivers/usart_comms.h ../src/skywave.h ../src/drivers/adc_util.h \ + ../src/devices/mpu9250.h ../src/register_map.h ../src/asf.h \ + ../src/drivers/skywave_util.h ../src/devices/ds3231.h \ + ../src/devices/mpl3115a2.h ../src/drivers/twi_comms.h \ + ../src/devices/ntcle100.h ../src/devices/gps.h \ + ../src/drivers/skywave_util.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +../src/skywave.h: + +../src/asf.h: + +../src/ASF/xmega/drivers/adc/adc.h: + +../src/ASF/xmega/utils/compiler.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include/avr/iox128a1u.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\xmega.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\builtins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h: + +../src/ASF/common/utils/parts.h: + +../src/ASF/xmega/utils/bit_handling/clz_ctz.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/preprocessor/tpaste.h: + +../src/ASF/xmega/utils/preprocessor/stringz.h: + +../src/ASF/xmega/utils/preprocessor/mrepeat.h: + +../src/ASF/xmega/utils/preprocessor/preprocessor.h: + +../src/ASF/xmega/utils/progmem.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\pgmspace.h: + +../src/ASF/common/utils/interrupt.h: + +../src/ASF/common/utils/interrupt/interrupt_avr8.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +../src/config/conf_adc.h: + +../src/ASF/xmega/drivers/nvm/nvm.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/sleepmgr/sleepmgr.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/config/conf_sleepmgr.h: + +../src/ASF/xmega/drivers/sleep/sleep.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sleep.h: + +../src/ASF/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/ASF/common/services/clock/xmega/sysclk.h: + +../src/ASF/common/boards/board.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/config/conf_board.h: + +../src/ASF/common/services/clock/osc.h: + +../src/ASF/common/services/clock/xmega/osc.h: + +../src/ASF/common/services/clock/pll.h: + +../src/ASF/common/services/clock/xmega/pll.h: + +../src/ASF/xmega/drivers/cpu/xmega_reset_cause.h: + +../src/ASF/xmega/drivers/cpu/ccp.h: + +../src/ASF/common/services/delay/delay.h: + +../src/ASF/common/services/delay/xmega/cycle_counter.h: + +../src/ASF/common/services/ioport/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport.h: + +../src/ASF/common/services/ioport/xmega/ioport_compat.h: + +../src/ASF/common/services/ioport/xmega/../ioport.h: + +../src/ASF/xmega/drivers/pmic/pmic.h: + +../src/ASF/xmega/services/pwm/pwm.h: + +../src/ASF/xmega/drivers/tc/tc.h: + +../src/ASF/xmega/utils/status_codes.h: + +../src/ASF/common/services/sleepmgr/xmega/sleepmgr.h: + +../src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h: + +../src/ASF/common/services/serial/serial.h: + +../src/ASF/common/services/serial/xmega_usart/usart_serial.h: + +../src/ASF/xmega/drivers/usart/usart.h: + +../src/config/conf_usart_serial.h: + +../src/ASF/xmega/drivers/twi/twim.h: + +../src/config/conf_twim.h: + +../src/ASF/xmega/drivers/twi/twi_common.h: + +../src/ASF/xmega/drivers/twi/twis.h: + +../src/ASF/xmega/drivers/wdt/wdt.h: + +../src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h: + +../src/drivers/usart_comms.h: + +../src/skywave.h: + +../src/drivers/adc_util.h: + +../src/devices/mpu9250.h: + +../src/register_map.h: + +../src/asf.h: + +../src/drivers/skywave_util.h: + +../src/devices/ds3231.h: + +../src/devices/mpl3115a2.h: + +../src/drivers/twi_comms.h: + +../src/devices/ntcle100.h: + +../src/devices/gps.h: + +../src/drivers/skywave_util.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/skywave_atxmega128a1_final/Debug/src/skywave.o b/skywave_atxmega128a1_final/Debug/src/skywave.o new file mode 100644 index 0000000..a87d408 Binary files /dev/null and b/skywave_atxmega128a1_final/Debug/src/skywave.o differ diff --git a/skywave_atxmega128a1_final/skywave_atxmega128a1_final.componentinfo.xml b/skywave_atxmega128a1_final/skywave_atxmega128a1_final.componentinfo.xml new file mode 100644 index 0000000..8065ff0 --- /dev/null +++ b/skywave_atxmega128a1_final/skywave_atxmega128a1_final.componentinfo.xml @@ -0,0 +1,86 @@ + + + + + + + Device + Startup + + + Atmel + 1.1.0 + C:/Program Files (x86)\Atmel\Studio\7.0\Packs + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include + + include + C + + + include + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\include\avr\iox128a1u.h + + header + C + yosCbrwlbeL5+jCAc91yyg== + + include/avr/iox128a1u.h + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\templates\main.c + template + source + C Exe + GUqiSvpXdTpcHY92I1HrZg== + + templates/main.c + Main file (.c) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\templates\main.cpp + template + source + C Exe + YXFphlh0CtZJU+ebktABgQ== + + templates/main.cpp + Main file (.cpp) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u + + libraryPrefix + GCC + + + gcc/dev/atxmega128a1u + + + + + XMEGAA_DFP + C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/Atmel.XMEGAA_DFP.pdsc + 1.1.68 + true + ATxmega128A1U + + + + Resolved + Fixed + true + + + \ No newline at end of file diff --git a/skywave_atxmega128a1_final/skywave_atxmega128a1_final.cproj b/skywave_atxmega128a1_final/skywave_atxmega128a1_final.cproj new file mode 100644 index 0000000..efe71c5 --- /dev/null +++ b/skywave_atxmega128a1_final/skywave_atxmega128a1_final.cproj @@ -0,0 +1,697 @@ + + + + 2.0 + 7.0 + com.Atmel.AVRGCC8.C + dce6c7e3-ee26-4d79-826b-08594b9ad897 + ATxmega128A1U + xmegaau + Executable + C + $(MSBuildProjectName) + .elf + $(MSBuildProjectDirectory)\$(Configuration) + skywave_atxmega128a1_final + skywave_atxmega128a1_final + skywave_atxmega128a1_final + Native + true + false + true + true + 0x20000000 + + true + exception_table + 2 + 0 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + com.atmel.avrdbg.tool.atmelice + J41800007041 + 0x1E974C + + + + 7500000 + + JTAG + + com.atmel.avrdbg.tool.atmelice + J41800007041 + Atmel-ICE + + JTAG + 7500000 + + + + 7500000 + + JTAG + + com.atmel.avrdbg.tool.jtagice3plus + J30200029021 + JTAGICE3 + + + + + 7499999 + + JTAG + + com.atmel.avrdbg.tool.jtagicemk3 + J30200029021 + JTAGICE3 + + + + + + -mmcu=atxmega128a1u -B "%24(PackRepoDir)\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" + True + True + True + True + False + + + NDEBUG + BOARD=XMEGA_A1U_XPLAINED_PRO + IOPORT_XMEGA_COMPAT + + + + + %24(PackRepoDir)\atmel\XMEGAA_DFP\1.1.68\include + ../src/ASF/common/boards + ../src/ASF/xmega/utils/preprocessor + ../src/ASF/xmega/utils + ../src/ASF/common/utils + ../src/ASF/common/services/ioport + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro + ../src/ASF/xmega/boards + ../src/config + ../src + ../src/ASF/xmega/drivers/cpu + ../src/ASF/xmega/drivers/nvm + ../src/ASF/xmega/drivers/pmic + ../src/ASF/xmega/drivers/sleep + ../src/ASF/xmega/drivers/tc + ../src/ASF/common/services/clock + ../src/ASF/common/services/delay + ../src/ASF/common/services/serial/xmega_usart + ../src/ASF/common/services/serial + ../src/ASF/common/services/sleepmgr + ../src/ASF/common/utils/stdio/stdio_serial + ../src/ASF/xmega/drivers/adc + ../src/ASF/xmega/drivers/twi + ../src/ASF/xmega/drivers/usart + ../src/ASF/xmega/services/pwm + ../src/ASF/xmega/drivers/wdt + + + Optimize for size (-Os) + -fdata-sections + True + True + True + -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + + + libm + + + -Wl,--relax -Wl,--section-start=.BOOT=0x20000 + -mrelax -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT + + + %24(PackRepoDir)\atmel\XMEGAA_DFP\1.1.68\include + ../src/ASF/common/boards + ../src/ASF/xmega/utils/preprocessor + ../src/ASF/xmega/utils + ../src/ASF/common/utils + ../src/ASF/common/services/ioport + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro + ../src/ASF/xmega/boards + ../src/config + ../src + ../src/ASF/xmega/drivers/cpu + ../src/ASF/xmega/drivers/nvm + ../src/ASF/xmega/drivers/pmic + ../src/ASF/xmega/drivers/sleep + ../src/ASF/xmega/drivers/tc + ../src/ASF/common/services/clock + ../src/ASF/common/services/delay + ../src/ASF/common/services/serial/xmega_usart + ../src/ASF/common/services/serial + ../src/ASF/common/services/sleepmgr + ../src/ASF/common/utils/stdio/stdio_serial + ../src/ASF/xmega/drivers/adc + ../src/ASF/xmega/drivers/twi + ../src/ASF/xmega/drivers/usart + ../src/ASF/xmega/services/pwm + ../src/ASF/xmega/drivers/wdt + + + + + + + + + -mmcu=atxmega128a1u -B "%24(PackRepoDir)\atmel\XMEGAA_DFP\1.1.68\gcc\dev\atxmega128a1u" + True + True + True + True + False + + + DEBUG + BOARD=XMEGA_A1U_XPLAINED_PRO + IOPORT_XMEGA_COMPAT + + + + + %24(PackRepoDir)\atmel\XMEGAA_DFP\1.1.68\include + ../src/ASF/common/boards + ../src/ASF/xmega/utils/preprocessor + ../src/ASF/xmega/utils + ../src/ASF/common/utils + ../src/ASF/common/services/ioport + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro + ../src/ASF/xmega/boards + ../src/config + ../src + ../src/ASF/xmega/drivers/cpu + ../src/ASF/xmega/drivers/nvm + ../src/ASF/xmega/drivers/pmic + ../src/ASF/xmega/drivers/sleep + ../src/ASF/xmega/drivers/tc + ../src/ASF/common/services/clock + ../src/ASF/common/services/delay + ../src/ASF/common/services/serial/xmega_usart + ../src/ASF/common/services/serial + ../src/ASF/common/services/sleepmgr + ../src/ASF/common/utils/stdio/stdio_serial + ../src/ASF/xmega/drivers/adc + ../src/ASF/xmega/drivers/twi + ../src/ASF/xmega/drivers/usart + ../src/ASF/xmega/services/pwm + ../src/ASF/xmega/drivers/wdt + + + Optimize (-O1) + -fdata-sections + True + True + Maximum (-g3) + True + -std=gnu99 -fno-strict-aliasing -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + + + libm + + + -Wl,--relax -Wl,--section-start=.BOOT=0x20000, -lprintf_flt + -mrelax -DBOARD=XMEGA_A1U_XPLAINED_PRO -DIOPORT_XMEGA_COMPAT + + + %24(PackRepoDir)\atmel\XMEGAA_DFP\1.1.68\include + ../src/ASF/common/boards + ../src/ASF/xmega/utils/preprocessor + ../src/ASF/xmega/utils + ../src/ASF/common/utils + ../src/ASF/common/services/ioport + ../src/ASF/xmega/boards/xmega_a1u_xplained_pro + ../src/ASF/xmega/boards + ../src/config + ../src + ../src/ASF/xmega/drivers/cpu + ../src/ASF/xmega/drivers/nvm + ../src/ASF/xmega/drivers/pmic + ../src/ASF/xmega/drivers/sleep + ../src/ASF/xmega/drivers/tc + ../src/ASF/common/services/clock + ../src/ASF/common/services/delay + ../src/ASF/common/services/serial/xmega_usart + ../src/ASF/common/services/serial + ../src/ASF/common/services/sleepmgr + ../src/ASF/common/utils/stdio/stdio_serial + ../src/ASF/xmega/drivers/adc + ../src/ASF/xmega/drivers/twi + ../src/ASF/xmega/drivers/usart + ../src/ASF/xmega/services/pwm + ../src/ASF/xmega/drivers/wdt + + + Default (-Wa,-g) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + + \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/ASF/common/boards/board.h b/skywave_atxmega128a1_final/src/ASF/common/boards/board.h new file mode 100644 index 0000000..0dc09cd --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/boards/board.h @@ -0,0 +1,448 @@ +/** + * \file + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board (parameter BOARD). + * + * Copyright (c) 2009-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/** + * \defgroup group_common_boards Generic board support + * + * The generic board support module includes board-specific definitions + * and function prototypes, such as the board initialization function. + * + * \{ + */ + +#include "compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C-EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board. +#define UC3L_EK 7 //!< AT32UC3L-EK board. +#define XPLAIN 8 //!< ATxmega128A1 Xplain board. +#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board. +#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board. +#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board. +#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board. +#define STK600_RCUC3D 16 //!< STK600 RCUC3D board. +#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board. +#define XMEGA_B1_XPLAINED 18 //!< ATxmega128B1 Xplained board. +#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board. +#define XMEGA_A1U_XPLAINED_PRO 20 //!< ATxmega128A1U XMEGA-A1U Xplained Pro board. +#define STK600_RCUC3L4 21 //!< ATUCL4 STK600 board. +#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board. +#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board. +#define STK600_RC044X 24 //!< STK600 with RC044X routing card board. +#define STK600_RCUC3B0 25 //!< STK600 RCUC3B0 board. +#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board. +#define XMEGA_A3BU_XPLAINED 27 //!< ATxmega256A3BU Xplained board. +#define STK600_RC064X_LCDX 28 //!< XMEGAB3 STK600 RC064X LCDX board. +#define STK600_RC100X_LCDX 29 //!< XMEGAB1 STK600 RC100X LCDX board. +#define UC3B_BOARD_CONTROLLER 30 //!< AT32UC3B1 board controller for Atmel boards. +#define RZ600 31 //!< AT32UC3A RZ600 MCU board. +#define SAM3S_EK 32 //!< SAM3S-EK board. +#define SAM3U_EK 33 //!< SAM3U-EK board. +#define SAM3X_EK 34 //!< SAM3X-EK board. +#define SAM3N_EK 35 //!< SAM3N-EK board. +#define SAM3S_EK2 36 //!< SAM3S-EK2 board. +#define SAM4S_EK 37 //!< SAM4S-EK board. +#define STK600_RCUC3A0 38 //!< STK600 RCUC3A0 board. +#define STK600_MEGA 39 //!< STK600 MEGA board. +#define MEGA_1284P_XPLAINED 40 //!< ATmega1284P Xplained board. +#define SAM4S_XPLAINED 41 //!< SAM4S Xplained board. +#define ATXMEGA128A1_QT600 42 //!< QT600 ATXMEGA128A1 MCU board. +#define ARDUINO_DUE_X 43 //!< Arduino Due/X board. +#define STK600_RCUC3L3 44 //!< ATUCL3 STK600 board. +#define SAM4L_EK 45 //!< SAM4L-EK board. +#define STK600_MEGA_RF 46 //!< STK600 MEGA RF EVK board. +#define XMEGA_C3_XPLAINED 47 //!< ATxmega384C3 Xplained board. +#define STK600_RC032X 48 //!< STK600 with RC032X routing card board. +#define SAM4S_EK2 49 //!< SAM4S-EK2 board. +#define XMEGA_E5_XPLAINED 50 //!< ATxmega32E5 Xplained board. +#define SAM4E_EK 51 //!< SAM4E-EK board. +#define ATMEGA256RFR2_XPLAINED_PRO 52 //!< ATmega256RFR2 Xplained Pro board. +#define SAM4S_XPLAINED_PRO 53 //!< SAM4S Xplained Pro board. +#define SAM4L_XPLAINED_PRO 54 //!< SAM4L Xplained Pro board. +#define ATMEGA256RFR2_ZIGBIT 55 //!< ATmega256RFR2 zigbit. +#define XMEGA_RF233_ZIGBIT 56 //!< ATxmega256A3U with AT86RF233 Zigbit. +#define XMEGA_RF212B_ZIGBIT 57 //!< ATxmega256A3U with AT86RF212B Zigbit. +#define SAM4S_WPIR_RD 58 //!< SAM4S-WPIR-RD board. +#define SAMD20_XPLAINED_PRO 59 //!< SAM D20 Xplained Pro board. +#define SAM4L8_XPLAINED_PRO 60 //!< SAM4L8 Xplained Pro board. +#define SAM4N_XPLAINED_PRO 61 //!< SAM4N Xplained Pro board. +#define XMEGA_A3_REB_CBB 62 //!< XMEGA REB Controller Base board. +#define ATMEGARFX_RCB 63 //!< RFR2 & RFA1 RCB. +#define SAM4C_EK 64 //!< SAM4C-EK board. +#define RCB256RFR2_XPRO 65 //!< RFR2 RCB Xplained Pro board. +#define SAMG53_XPLAINED_PRO 66 //!< SAMG53 Xplained Pro board. +#define SAM4CP16BMB 67 //!< SAM4CP16BMB board. +#define SAM4E_XPLAINED_PRO 68 //!< SAM4E Xplained Pro board. +#define SAMD21_XPLAINED_PRO 69 //!< SAM D21 Xplained Pro board. +#define SAMR21_XPLAINED_PRO 70 //!< SAM R21 Xplained Pro board. +#define SAM4CMP_DB 71 //!< SAM4CMP demo board. +#define SAM4CMS_DB 72 //!< SAM4CMS demo board. +#define ATPL230AMB 73 //!< ATPL230AMB board. +#define SAMD11_XPLAINED_PRO 74 //!< SAM D11 Xplained Pro board. +#define SAMG55_XPLAINED_PRO 75 //!< SAMG55 Xplained Pro board. +#define SAML21_XPLAINED_PRO 76 //!< SAM L21 Xplained Pro board. +#define SAMD10_XPLAINED_MINI 77 //!< SAM D10 Xplained Mini board. +#define SAMDA1_XPLAINED_PRO 78 //!< SAM DA1 Xplained Pro board. +#define SAMW25_XPLAINED_PRO 79 //!< SAMW25 Xplained Pro board. +#define SAMC21_XPLAINED_PRO 80 //!< SAM C21 Xplained Pro board. +#define SAMV71_XPLAINED_ULTRA 81 //!< SAMV71 Xplained Ultra board. +#define ATMEGA328P_XPLAINED_MINI 82 //!< ATMEGA328P Xplained MINI board. +#define ATMEGA328PB_XPLAINED_MINI 83 //!< ATMEGA328PB Xplained MINI board. +#define SAMB11_XPLAINED_PRO 84 //!< SAM B11 Xplained Pro board. +#define SAME70_XPLAINED 85 //!< SAME70 Xplained board. +#define SAML22_XPLAINED_PRO 86 //!< SAM L22 Xplained Pro board. +#define SAML22_XPLAINED_PRO_B 87 //!< SAM L22 Xplained Pro board. +#define SAMR21ZLL_EK 88 //!< SAMR21ZLL-EK board. +#define ATMEGA168PB_XPLAINED_MINI 89 //!< ATMEGA168PB Xplained MINI board. +#define ATMEGA324PB_XPLAINED_PRO 90 //!< ATMEGA324PB Xplained Pro board. +#define SAMB11CSP_XPLAINED_PRO 91 //!< SAM B11 CSP Xplained Pro board. +#define SAMB11ZR_XPLAINED_PRO 92 //!< SAM B11 ZR Xplained Pro board. +#define SAMR30_XPLAINED_PRO 93 //!< SAM R30 Xplained Pro board. +#define SAMHA1G16A_XPLAINED_PRO 94 //!< SAM HA1G16A Xplained Pro board. +#define SIMULATOR_XMEGA_A1 97 //!< Simulator for XMEGA A1 devices. +#define AVR_SIMULATOR_UC3 98 //!< Simulator for the AVR UC3 device family. +#define USER_BOARD 99 //!< User-reserved board (if any). +#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader). +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board +#define MC300 2 //!< AT32UC3 MC300 board +#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1 +#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2 +#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board +#define SENSORS_XPLAINED_LIGHTPROX_1 6 //!< Xplained light & proximity sensor board +#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A" +#define RZ600_AT86RF231 8 //!< AT86RF231 RF board in RZ600 +#define RZ600_AT86RF230B 9 //!< AT86RF230B RF board in RZ600 +#define RZ600_AT86RF212 10 //!< AT86RF212 RF board in RZ600 +#define SENSORS_XPLAINED_BREADBOARD 11 //!< Xplained sensor development breadboard +#define SECURITY_XPLAINED 12 //!< Xplained ATSHA204 board +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 +# include "evk1100/evk1100.h" +#elif BOARD == EVK1101 +# include "evk1101/evk1101.h" +#elif BOARD == UC3C_EK +# include "uc3c_ek/uc3c_ek.h" +#elif BOARD == EVK1104 +# include "evk1104/evk1104.h" +#elif BOARD == EVK1105 +# include "evk1105/evk1105.h" +#elif BOARD == STK600_RCUC3L0 +# include "stk600/rcuc3l0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK +# include "uc3l_ek/uc3l_ek.h" +#elif BOARD == STK600_RCUC3L4 +# include "stk600/rcuc3l4/stk600_rcuc3l4.h" +#elif BOARD == XPLAIN +# include "xplain/xplain.h" +#elif BOARD == STK600_MEGA + /*No header-file to include*/ +#elif BOARD == STK600_MEGA_RF +# include "stk600.h" +#elif BOARD == ATMEGA256RFR2_XPLAINED_PRO +# include "atmega256rfr2_xplained_pro/atmega256rfr2_xplained_pro.h" +#elif BOARD == ATMEGA256RFR2_ZIGBIT +# include "atmega256rfr2_zigbit/atmega256rfr2_zigbit.h" +#elif BOARD == STK600_RC032X +# include "stk600/rc032x/stk600_rc032x.h" +#elif BOARD == STK600_RC044X +# include "stk600/rc044x/stk600_rc044x.h" +#elif BOARD == STK600_RC064X +# include "stk600/rc064x/stk600_rc064x.h" +#elif BOARD == STK600_RC100X +# include "stk600/rc100x/stk600_rc100x.h" +#elif BOARD == UC3_A3_XPLAINED +# include "uc3_a3_xplained/uc3_a3_xplained.h" +#elif BOARD == UC3_L0_XPLAINED +# include "uc3_l0_xplained/uc3_l0_xplained.h" +#elif BOARD == STK600_RCUC3B0 +# include "stk600/rcuc3b0/stk600_rcuc3b0.h" +#elif BOARD == STK600_RCUC3D +# include "stk600/rcuc3d/stk600_rcuc3d.h" +#elif BOARD == STK600_RCUC3C0 +# include "stk600/rcuc3c0/stk600_rcuc3c0.h" +#elif BOARD == SAMG53_XPLAINED_PRO +# include "samg53_xplained_pro/samg53_xplained_pro.h" +#elif BOARD == SAMG55_XPLAINED_PRO +# include "samg55_xplained_pro/samg55_xplained_pro.h" +#elif BOARD == XMEGA_B1_XPLAINED +# include "xmega_b1_xplained/xmega_b1_xplained.h" +#elif BOARD == STK600_RC064X_LCDX +# include "stk600/rc064x_lcdx/stk600_rc064x_lcdx.h" +#elif BOARD == STK600_RC100X_LCDX +# include "stk600/rc100x_lcdx/stk600_rc100x_lcdx.h" +#elif BOARD == XMEGA_A1_XPLAINED +# include "xmega_a1_xplained/xmega_a1_xplained.h" +#elif BOARD == XMEGA_A1U_XPLAINED_PRO +# include "xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h" +#elif BOARD == UC3_L0_XPLAINED_BC +# include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h" +#elif BOARD == SAM3S_EK +# include "sam3s_ek/sam3s_ek.h" +# include "system_sam3s.h" +#elif BOARD == SAM3S_EK2 +# include "sam3s_ek2/sam3s_ek2.h" +# include "system_sam3sd8.h" +#elif BOARD == SAM3U_EK +# include "sam3u_ek/sam3u_ek.h" +# include "system_sam3u.h" +#elif BOARD == SAM3X_EK +# include "sam3x_ek/sam3x_ek.h" +# include "system_sam3x.h" +#elif BOARD == SAM3N_EK +# include "sam3n_ek/sam3n_ek.h" +# include "system_sam3n.h" +#elif BOARD == SAM4S_EK +# include "sam4s_ek/sam4s_ek.h" +# include "system_sam4s.h" +#elif BOARD == SAM4S_WPIR_RD +# include "sam4s_wpir_rd/sam4s_wpir_rd.h" +# include "system_sam4s.h" +#elif BOARD == SAM4S_XPLAINED +# include "sam4s_xplained/sam4s_xplained.h" +# include "system_sam4s.h" +#elif BOARD == SAM4S_EK2 +# include "sam4s_ek2/sam4s_ek2.h" +# include "system_sam4s.h" +#elif BOARD == MEGA_1284P_XPLAINED + /*No header-file to include*/ +#elif BOARD == ARDUINO_DUE_X +# include "arduino_due_x/arduino_due_x.h" +# include "system_sam3x.h" +#elif BOARD == SAM4L_EK +# include "sam4l_ek/sam4l_ek.h" +#elif BOARD == SAM4E_EK +# include "sam4e_ek/sam4e_ek.h" +#elif BOARD == SAMD20_XPLAINED_PRO +# include "samd20_xplained_pro/samd20_xplained_pro.h" +#elif BOARD == SAMD21_XPLAINED_PRO +# include "samd21_xplained_pro/samd21_xplained_pro.h" +#elif BOARD == SAMR21_XPLAINED_PRO +# include "samr21_xplained_pro/samr21_xplained_pro.h" +#elif BOARD == SAMR30_XPLAINED_PRO +# include "samr30_xplained_pro/samr30_xplained_pro.h" +#elif BOARD == SAMR21ZLL_EK +# include "samr21zll_ek/samr21zll_ek.h" +#elif BOARD == SAMD11_XPLAINED_PRO +# include "samd11_xplained_pro/samd11_xplained_pro.h" +#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18A__) +# include "saml21_xplained_pro/saml21_xplained_pro.h" +#elif BOARD == SAML22_XPLAINED_PRO +# include "saml22_xplained_pro/saml22_xplained_pro.h" +#elif BOARD == SAML22_XPLAINED_PRO_B +# include "saml22_xplained_pro_b/saml22_xplained_pro_b.h" +#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18B__) +# include "saml21_xplained_pro_b/saml21_xplained_pro.h" +#elif BOARD == SAMD10_XPLAINED_MINI +# include "samd10_xplained_mini/samd10_xplained_mini.h" +#elif BOARD == SAMDA1_XPLAINED_PRO +# include "samda1_xplained_pro/samda1_xplained_pro.h" +#elif BOARD == SAMHA1G16A_XPLAINED_PRO +# include "samha1g16a_xplained_pro/samha1g16a_xplained_pro.h" +#elif BOARD == SAMC21_XPLAINED_PRO +# include "samc21_xplained_pro/samc21_xplained_pro.h" +#elif BOARD == SAM4N_XPLAINED_PRO +# include "sam4n_xplained_pro/sam4n_xplained_pro.h" +#elif BOARD == SAMW25_XPLAINED_PRO +# include "samw25_xplained_pro/samw25_xplained_pro.h" +#elif BOARD == SAMV71_XPLAINED_ULTRA +# include "samv71_xplained_ultra/samv71_xplained_ultra.h" +#elif BOARD == MEGA1284P_XPLAINED_BC +# include "mega1284p_xplained_bc/mega1284p_xplained_bc.h" +#elif BOARD == UC3_L0_QT600 +# include "uc3_l0_qt600/uc3_l0_qt600.h" +#elif BOARD == XMEGA_A3BU_XPLAINED +# include "xmega_a3bu_xplained/xmega_a3bu_xplained.h" +#elif BOARD == XMEGA_E5_XPLAINED +# include "xmega_e5_xplained/xmega_e5_xplained.h" +#elif BOARD == UC3B_BOARD_CONTROLLER +# include "uc3b_board_controller/uc3b_board_controller.h" +#elif BOARD == RZ600 +# include "rz600/rz600.h" +#elif BOARD == STK600_RCUC3A0 +# include "stk600/rcuc3a0/stk600_rcuc3a0.h" +#elif BOARD == ATXMEGA128A1_QT600 +# include "atxmega128a1_qt600/atxmega128a1_qt600.h" +#elif BOARD == STK600_RCUC3L3 +# include "stk600/rcuc3l3/stk600_rcuc3l3.h" +#elif BOARD == SAM4S_XPLAINED_PRO +# include "sam4s_xplained_pro/sam4s_xplained_pro.h" +#elif BOARD == SAM4L_XPLAINED_PRO +# include "sam4l_xplained_pro/sam4l_xplained_pro.h" +#elif BOARD == SAM4L8_XPLAINED_PRO +# include "sam4l8_xplained_pro/sam4l8_xplained_pro.h" +#elif BOARD == SAM4C_EK +# include "sam4c_ek/sam4c_ek.h" +#elif BOARD == SAM4CMP_DB +# include "sam4cmp_db/sam4cmp_db.h" +#elif BOARD == SAM4CMS_DB +# include "sam4cms_db/sam4cms_db.h" +#elif BOARD == SAM4CP16BMB +# include "sam4cp16bmb/sam4cp16bmb.h" +#elif BOARD == ATPL230AMB +# include "atpl230amb/atpl230amb.h" +#elif BOARD == XMEGA_C3_XPLAINED +# include "xmega_c3_xplained/xmega_c3_xplained.h" +#elif BOARD == XMEGA_RF233_ZIGBIT +# include "xmega_rf233_zigbit/xmega_rf233_zigbit.h" +#elif BOARD == XMEGA_A3_REB_CBB +# include "xmega_a3_reb_cbb/xmega_a3_reb_cbb.h" +#elif BOARD == ATMEGARFX_RCB +# include "atmegarfx_rcb/atmegarfx_rcb.h" +#elif BOARD == RCB256RFR2_XPRO +# include "atmega256rfr2_rcb_xpro/atmega256rfr2_rcb_xpro.h" +#elif BOARD == XMEGA_RF212B_ZIGBIT +# include "xmega_rf212b_zigbit/xmega_rf212b_zigbit.h" +#elif BOARD == SAM4E_XPLAINED_PRO +# include "sam4e_xplained_pro/sam4e_xplained_pro.h" +#elif BOARD == ATMEGA328P_XPLAINED_MINI +# include "atmega328p_xplained_mini/atmega328p_xplained_mini.h" +#elif BOARD == ATMEGA328PB_XPLAINED_MINI +# include "atmega328pb_xplained_mini/atmega328pb_xplained_mini.h" +#elif BOARD == SAMB11_XPLAINED_PRO +# include "samb11_xplained_pro/samb11_xplained_pro.h" +#elif BOARD == SAME70_XPLAINED +# include "same70_xplained/same70_xplained.h" +#elif BOARD == ATMEGA168PB_XPLAINED_MINI +# include "atmega168pb_xplained_mini/atmega168pb_xplained_mini.h" +#elif BOARD == ATMEGA324PB_XPLAINED_PRO +# include "atmega324pb_xplained_pro/atmega324pb_xplained_pro.h" +#elif BOARD == SAMB11CSP_XPLAINED_PRO +# include "samb11csp_xplained_pro/samb11csp_xplained_pro.h" +#elif BOARD == SAMB11ZR_XPLAINED_PRO +# include "samb11zr_xplained_pro/samb11zr_xplained_pro.h" +#elif BOARD == SIMULATOR_XMEGA_A1 +# include "simulator/xmega_a1/simulator_xmega_a1.h" +#elif BOARD == AVR_SIMULATOR_UC3 +# include "avr_simulator_uc3/avr_simulator_uc3.h" +#elif BOARD == USER_BOARD + // User-reserved area: #include the header file of your board here (if any). +# include "user_board.h" +#elif BOARD == DUMMY_BOARD +# include "dummy/dummy_board.h" +#else +# error No known Atmel board defined +#endif + +#if (defined EXT_BOARD) +# if EXT_BOARD == MC300 +# include "mc300/mc300.h" +# elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \ + (EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_BREADBOARD) +# include "sensors_xplained/sensors_xplained.h" +# elif EXT_BOARD == RZ600_AT86RF231 +# include "at86rf231/at86rf231.h" +# elif EXT_BOARD == RZ600_AT86RF230B +# include "at86rf230b/at86rf230b.h" +# elif EXT_BOARD == RZ600_AT86RF212 +# include "at86rf212/at86rf212.h" +# elif EXT_BOARD == SECURITY_XPLAINED +# include "security_xplained.h" +# elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). +# endif +#endif + + +#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); + +#endif // #ifdef __AVR32_ABI_COMPILER__ +#else +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); +#endif + + +#ifdef __cplusplus +} +#endif + +/** + * \} + */ + +#endif // _BOARD_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/genclk.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/genclk.h new file mode 100644 index 0000000..503a50a --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/genclk.h @@ -0,0 +1,199 @@ +/** + * \file + * + * \brief Generic clock management + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CLK_GENCLK_H_INCLUDED +#define CLK_GENCLK_H_INCLUDED + +#include "parts.h" + +#if SAM3S +# include "sam3s/genclk.h" +#elif SAM3U +# include "sam3u/genclk.h" +#elif SAM3N +# include "sam3n/genclk.h" +#elif SAM3XA +# include "sam3x/genclk.h" +#elif SAM4S +# include "sam4s/genclk.h" +#elif SAM4L +# include "sam4l/genclk.h" +#elif SAM4E +# include "sam4e/genclk.h" +#elif SAM4N +# include "sam4n/genclk.h" +#elif SAM4C +# include "sam4c/genclk.h" +#elif SAM4CM +# include "sam4cm/genclk.h" +#elif SAM4CP +# include "sam4cp/genclk.h" +#elif SAMG +# include "samg/genclk.h" +#elif SAMV71 +# include "samv71/genclk.h" +#elif SAMV70 +# include "samv70/genclk.h" +#elif SAME70 +# include "same70/genclk.h" +#elif SAMS70 +# include "sams70/genclk.h" +#elif (UC3A0 || UC3A1) +# include "uc3a0_a1/genclk.h" +#elif UC3A3 +# include "uc3a3_a4/genclk.h" +#elif UC3B +# include "uc3b0_b1/genclk.h" +#elif UC3C +# include "uc3c/genclk.h" +#elif UC3D +# include "uc3d/genclk.h" +#elif UC3L +# include "uc3l/genclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup genclk_group Generic Clock Management + * + * Generic clocks are configurable clocks which run outside the system + * clock domain. They are often connected to peripherals which have an + * asynchronous component running independently of the bus clock, e.g. + * USB controllers, low-power timers and RTCs, etc. + * + * Note that not all platforms have support for generic clocks; on such + * platforms, this API will not be available. + * + * @{ + */ + +/** + * \def GENCLK_DIV_MAX + * \brief Maximum divider supported by the generic clock implementation + */ +/** + * \enum genclk_source + * \brief Generic clock source ID + * + * Each generic clock may be generated from a different clock source. + * These are the available alternatives provided by the chip. + */ + +//! \name Generic clock configuration +//@{ +/** + * \struct genclk_config + * \brief Hardware representation of a set of generic clock parameters + */ +/** + * \fn void genclk_config_defaults(struct genclk_config *cfg, + * unsigned int id) + * \brief Initialize \a cfg to the default configuration for the clock + * identified by \a id. + */ +/** + * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id) + * \brief Read the currently active configuration of the clock + * identified by \a id into \a cfg. + */ +/** + * \fn void genclk_config_write(const struct genclk_config *cfg, + * unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id. + */ +/** + * \fn void genclk_config_set_source(struct genclk_config *cfg, + * enum genclk_source src) + * \brief Select a new source clock \a src in configuration \a cfg. + */ +/** + * \fn void genclk_config_set_divider(struct genclk_config *cfg, + * unsigned int divider) + * \brief Set a new \a divider in configuration \a cfg. + */ +/** + * \fn void genclk_enable_source(enum genclk_source src) + * \brief Enable the source clock \a src used by a generic clock. + */ + //@} + +//! \name Enabling and disabling Generic Clocks +//@{ +/** + * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id and enable it. + */ +/** + * \fn void genclk_disable(unsigned int id) + * \brief Disable the generic clock identified by \a id. + */ +//@} + +/** + * \brief Enable the configuration defined by \a src and \a divider + * for the generic clock identified by \a id. + * + * \param id The ID of the generic clock. + * \param src The source clock of the generic clock. + * \param divider The divider used to generate the generic clock. + */ +static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider) +{ + struct genclk_config gcfg; + + genclk_config_defaults(&gcfg, id); + genclk_enable_source(src); + genclk_config_set_source(&gcfg, src); + genclk_config_set_divider(&gcfg, divider); + genclk_enable(&gcfg, id); +} + +//! @} + +#endif /* CLK_GENCLK_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/osc.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/osc.h new file mode 100644 index 0000000..e67f01f --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/osc.h @@ -0,0 +1,185 @@ +/** + * \file + * + * \brief Oscillator management + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef OSC_H_INCLUDED +#define OSC_H_INCLUDED + +#include "parts.h" +#include "conf_clock.h" + +#if SAM3S +# include "sam3s/osc.h" +#elif SAM3XA +# include "sam3x/osc.h" +#elif SAM3U +# include "sam3u/osc.h" +#elif SAM3N +# include "sam3n/osc.h" +#elif SAM4S +# include "sam4s/osc.h" +#elif SAM4E +# include "sam4e/osc.h" +#elif SAM4C +# include "sam4c/osc.h" +#elif SAM4CM +# include "sam4cm/osc.h" +#elif SAM4CP +# include "sam4cp/osc.h" +#elif SAM4L +# include "sam4l/osc.h" +#elif SAM4N +# include "sam4n/osc.h" +#elif SAMG +# include "samg/osc.h" +#elif SAMV71 +# include "samv71/osc.h" +#elif SAMV70 +# include "samv70/osc.h" +#elif SAME70 +# include "same70/osc.h" +#elif SAMS70 +# include "sams70/osc.h" +#elif (UC3A0 || UC3A1) +# include "uc3a0_a1/osc.h" +#elif UC3A3 +# include "uc3a3_a4/osc.h" +#elif UC3B +# include "uc3b0_b1/osc.h" +#elif UC3C +# include "uc3c/osc.h" +#elif UC3D +# include "uc3d/osc.h" +#elif UC3L +# include "uc3l/osc.h" +#elif XMEGA +# include "xmega/osc.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup osc_group Oscillator Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip oscillators. Internal RC-oscillators, + * external crystal oscillators and external clock generators are + * supported by this module. What all of these have in common is that + * they swing at a fixed, nominal frequency which is normally not + * adjustable. + * + * \par Example: Enabling an oscillator + * + * The following example demonstrates how to enable the external + * oscillator on XMEGA A and wait for it to be ready to use. The + * oscillator identifiers are platform-specific, so while the same + * procedure is used on all platforms, the parameter to osc_enable() + * will be different from device to device. + * \code + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); \endcode + * + * \section osc_group_board Board-specific Definitions + * If external oscillators are used, the board code must provide the + * following definitions for each of those: + * - \b BOARD__HZ: The nominal frequency of the oscillator. + * - \b BOARD__STARTUP_US: The startup time of the + * oscillator in microseconds. + * - \b BOARD__TYPE: The type of oscillator connected, i.e. + * whether it's a crystal or external clock, and sometimes what kind + * of crystal it is. The meaning of this value is platform-specific. + * + * @{ + */ + +//! \name Oscillator Management +//@{ +/** + * \fn void osc_enable(uint8_t id) + * \brief Enable oscillator \a id + * + * The startup time and mode value is automatically determined based on + * definitions in the board code. + */ +/** + * \fn void osc_disable(uint8_t id) + * \brief Disable oscillator \a id + */ +/** + * \fn osc_is_ready(uint8_t id) + * \brief Determine whether oscillator \a id is ready. + * \retval true Oscillator \a id is running and ready to use as a clock + * source. + * \retval false Oscillator \a id is not running. + */ +/** + * \fn uint32_t osc_get_rate(uint8_t id) + * \brief Return the frequency of oscillator \a id in Hz + */ + +#ifndef __ASSEMBLY__ + +/** + * \brief Wait until the oscillator identified by \a id is ready + * + * This function will busy-wait for the oscillator identified by \a id + * to become stable and ready to use as a clock source. + * + * \param id A number identifying the oscillator to wait for. + */ +static inline void osc_wait_ready(uint8_t id) +{ + while (!osc_is_ready(id)) { + /* Do nothing */ + } +} + +#endif /* __ASSEMBLY__ */ + +//@} + +//! @} + +#endif /* OSC_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/pll.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/pll.h new file mode 100644 index 0000000..23e930c --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/pll.h @@ -0,0 +1,341 @@ +/** + * \file + * + * \brief PLL management + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CLK_PLL_H_INCLUDED +#define CLK_PLL_H_INCLUDED + +#include "parts.h" +#include "conf_clock.h" + +#if SAM3S +# include "sam3s/pll.h" +#elif SAM3XA +# include "sam3x/pll.h" +#elif SAM3U +# include "sam3u/pll.h" +#elif SAM3N +# include "sam3n/pll.h" +#elif SAM4S +# include "sam4s/pll.h" +#elif SAM4E +# include "sam4e/pll.h" +#elif SAM4C +# include "sam4c/pll.h" +#elif SAM4CM +# include "sam4cm/pll.h" +#elif SAM4CP +# include "sam4cp/pll.h" +#elif SAM4L +# include "sam4l/pll.h" +#elif SAM4N +# include "sam4n/pll.h" +#elif SAMG +# include "samg/pll.h" +#elif SAMV71 +# include "samv71/pll.h" +#elif SAMV70 +# include "samv70/pll.h" +#elif SAME70 +# include "same70/pll.h" +#elif SAMS70 +# include "sams70/pll.h" +#elif (UC3A0 || UC3A1) +# include "uc3a0_a1/pll.h" +#elif UC3A3 +# include "uc3a3_a4/pll.h" +#elif UC3B +# include "uc3b0_b1/pll.h" +#elif UC3C +# include "uc3c/pll.h" +#elif UC3D +# include "uc3d/pll.h" +#elif (UC3L0128 || UC3L0256 || UC3L3_L4) +# include "uc3l/pll.h" +#elif XMEGA +# include "xmega/pll.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup pll_group PLL Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip PLLs. A PLL will take an input signal + * (the \em source), optionally divide the frequency by a configurable + * \em divider, and then multiply the frequency by a configurable \em + * multiplier. + * + * Some devices don't support input dividers; specifying any other + * divisor than 1 on these devices will result in an assertion failure. + * Other devices may have various restrictions to the frequency range of + * the input and output signals. + * + * \par Example: Setting up PLL0 with default parameters + * + * The following example shows how to configure and enable PLL0 using + * the default parameters specified using the configuration symbols + * listed above. + * \code + pll_enable_config_defaults(0); \endcode + * + * To configure, enable PLL0 using the default parameters and to disable + * a specific feature like Wide Bandwidth Mode (a UC3A3-specific + * PLL option.), you can use this initialization process. + * \code + struct pll_config pllcfg; + if (pll_is_locked(pll_id)) { + return; // Pll already running + } + pll_enable_source(CONFIG_PLL0_SOURCE); + pll_config_defaults(&pllcfg, 0); + pll_config_set_option(&pllcfg, PLL_OPT_WBM_DISABLE); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); \endcode + * + * When the last function call returns, PLL0 is ready to be used as the + * main system clock source. + * + * \section pll_group_config Configuration Symbols + * + * Each PLL has a set of default parameters determined by the following + * configuration symbols in the application's configuration file: + * - \b CONFIG_PLLn_SOURCE: The default clock source connected to the + * input of PLL \a n. Must be one of the values defined by the + * #pll_source enum. + * - \b CONFIG_PLLn_MUL: The default multiplier (loop divider) of PLL + * \a n. + * - \b CONFIG_PLLn_DIV: The default input divider of PLL \a n. + * + * These configuration symbols determine the result of calling + * pll_config_defaults() and pll_get_default_rate(). + * + * @{ + */ + +//! \name Chip-specific PLL characteristics +//@{ +/** + * \def PLL_MAX_STARTUP_CYCLES + * \brief Maximum PLL startup time in number of slow clock cycles + */ +/** + * \def NR_PLLS + * \brief Number of on-chip PLLs + */ + +/** + * \def PLL_MIN_HZ + * \brief Minimum frequency that the PLL can generate + */ +/** + * \def PLL_MAX_HZ + * \brief Maximum frequency that the PLL can generate + */ +/** + * \def PLL_NR_OPTIONS + * \brief Number of PLL option bits + */ +//@} + +/** + * \enum pll_source + * \brief PLL clock source + */ + +//! \name PLL configuration +//@{ + +/** + * \struct pll_config + * \brief Hardware-specific representation of PLL configuration. + * + * This structure contains one or more device-specific values + * representing the current PLL configuration. The contents of this + * structure is typically different from platform to platform, and the + * user should not access any fields except through the PLL + * configuration API. + */ + +/** + * \fn void pll_config_init(struct pll_config *cfg, + * enum pll_source src, unsigned int div, unsigned int mul) + * \brief Initialize PLL configuration from standard parameters. + * + * \note This function may be defined inline because it is assumed to be + * called very few times, and usually with constant parameters. Inlining + * it will in such cases reduce the code size significantly. + * + * \param cfg The PLL configuration to be initialized. + * \param src The oscillator to be used as input to the PLL. + * \param div PLL input divider. + * \param mul PLL loop divider (i.e. multiplier). + * + * \return A configuration which will make the PLL run at + * (\a mul / \a div) times the frequency of \a src + */ +/** + * \def pll_config_defaults(cfg, pll_id) + * \brief Initialize PLL configuration using default parameters. + * + * After this function returns, \a cfg will contain a configuration + * which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV) + * times the frequency of CONFIG_PLLx_SOURCE. + * + * \param cfg The PLL configuration to be initialized. + * \param pll_id Use defaults for this PLL. + */ +/** + * \def pll_get_default_rate(pll_id) + * \brief Get the default rate in Hz of \a pll_id + */ +/** + * \fn void pll_config_set_option(struct pll_config *cfg, + * unsigned int option) + * \brief Set the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be set. + */ +/** + * \fn void pll_config_clear_option(struct pll_config *cfg, + * unsigned int option) + * \brief Clear the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be cleared. + */ +/** + * \fn void pll_config_read(struct pll_config *cfg, unsigned int pll_id) + * \brief Read the currently active configuration of \a pll_id. + * + * \param cfg The configuration object into which to store the currently + * active configuration. + * \param pll_id The ID of the PLL to be accessed. + */ +/** + * \fn void pll_config_write(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg on \a pll_id + * + * \param cfg The configuration object representing the PLL + * configuration to be activated. + * \param pll_id The ID of the PLL to be updated. + */ + +//@} + +//! \name Interaction with the PLL hardware +//@{ +/** + * \fn void pll_enable(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg and enable PLL \a pll_id. + * + * \param cfg The PLL configuration to be activated. + * \param pll_id The ID of the PLL to be enabled. + */ +/** + * \fn void pll_disable(unsigned int pll_id) + * \brief Disable the PLL identified by \a pll_id. + * + * After this function is called, the PLL identified by \a pll_id will + * be disabled. The PLL configuration stored in hardware may be affected + * by this, so if the caller needs to restore the same configuration + * later, it should either do a pll_config_read() before disabling the + * PLL, or remember the last configuration written to the PLL. + * + * \param pll_id The ID of the PLL to be disabled. + */ +/** + * \fn bool pll_is_locked(unsigned int pll_id) + * \brief Determine whether the PLL is locked or not. + * + * \param pll_id The ID of the PLL to check. + * + * \retval true The PLL is locked and ready to use as a clock source + * \retval false The PLL is not yet locked, or has not been enabled. + */ +/** + * \fn void pll_enable_source(enum pll_source src) + * \brief Enable the source of the pll. + * The source is enabled, if the source is not already running. + * + * \param src The ID of the PLL source to enable. + */ +/** + * \fn void pll_enable_config_defaults(unsigned int pll_id) + * \brief Enable the pll with the default configuration. + * PLL is enabled, if the PLL is not already locked. + * + * \param pll_id The ID of the PLL to enable. + */ + +/** + * \brief Wait for PLL \a pll_id to become locked + * + * \todo Use a timeout to avoid waiting forever and hanging the system + * + * \param pll_id The ID of the PLL to wait for. + * + * \retval STATUS_OK The PLL is now locked. + * \retval ERR_TIMEOUT Timed out waiting for PLL to become locked. + */ +static inline int pll_wait_for_lock(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + while (!pll_is_locked(pll_id)) { + /* Do nothing */ + } + + return 0; +} + +//@} +//! @} + +#endif /* CLK_PLL_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/sysclk.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/sysclk.h new file mode 100644 index 0000000..86e4bf7 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/sysclk.h @@ -0,0 +1,194 @@ +/** + * \file + * + * \brief System clock management + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef SYSCLK_H_INCLUDED +#define SYSCLK_H_INCLUDED + +#include "parts.h" +#include "conf_clock.h" + +#if SAM3S +# include "sam3s/sysclk.h" +#elif SAM3U +# include "sam3u/sysclk.h" +#elif SAM3N +# include "sam3n/sysclk.h" +#elif SAM3XA +# include "sam3x/sysclk.h" +#elif SAM4S +# include "sam4s/sysclk.h" +#elif SAM4E +# include "sam4e/sysclk.h" +#elif SAM4C +# include "sam4c/sysclk.h" +#elif SAM4CM +# include "sam4cm/sysclk.h" +#elif SAM4CP +# include "sam4cp/sysclk.h" +#elif SAM4L +# include "sam4l/sysclk.h" +#elif SAM4N +# include "sam4n/sysclk.h" +#elif SAMG +# include "samg/sysclk.h" +#elif SAMV71 +# include "samv71/sysclk.h" +#elif SAMV70 +# include "samv70/sysclk.h" +#elif SAME70 +# include "same70/sysclk.h" +#elif SAMS70 +# include "sams70/sysclk.h" +#elif (UC3A0 || UC3A1) +# include "uc3a0_a1/sysclk.h" +#elif UC3A3 +# include "uc3a3_a4/sysclk.h" +#elif UC3B +# include "uc3b0_b1/sysclk.h" +#elif UC3C +# include "uc3c/sysclk.h" +#elif UC3D +# include "uc3d/sysclk.h" +#elif UC3L +# include "uc3l/sysclk.h" +#elif XMEGA +# include "xmega/sysclk.h" +#elif MEGA +# include "mega/sysclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \defgroup clk_group Clock Management + */ + +/** + * \ingroup clk_group + * \defgroup sysclk_group System Clock Management + * + * See \ref sysclk_quickstart. + * + * The sysclk API covers the system clock and all + * clocks derived from it. The system clock is a chip-internal clock on + * which all synchronous clocks, i.e. CPU and bus/peripheral + * clocks, are based. The system clock is typically generated from one + * of a variety of sources, which may include crystal and RC oscillators + * as well as PLLs. The clocks derived from the system clock are + * sometimes also known as synchronous clocks, since they + * always run synchronously with respect to each other, as opposed to + * generic clocks which may run from different oscillators or + * PLLs. + * + * Most applications should simply call sysclk_init() to initialize + * everything related to the system clock and its source (oscillator, + * PLL or DFLL), and leave it at that. More advanced applications, and + * platform-specific drivers, may require additional services from the + * clock system, some of which may be platform-specific. + * + * \section sysclk_group_platform Platform Dependencies + * + * The sysclk API is partially chip- or platform-specific. While all + * platforms provide mostly the same functionality, there are some + * variations around how different bus types and clock tree structures + * are handled. + * + * The following functions are available on all platforms with the same + * parameters and functionality. These functions may be called freely by + * portable applications, drivers and services: + * - sysclk_init() + * - sysclk_set_source() + * - sysclk_get_main_hz() + * - sysclk_get_cpu_hz() + * - sysclk_get_peripheral_bus_hz() + * + * The following functions are available on all platforms, but there may + * be variations in the function signature (i.e. parameters) and + * behavior. These functions are typically called by platform-specific + * parts of drivers, and applications that aren't intended to be + * portable: + * - sysclk_enable_peripheral_clock() + * - sysclk_disable_peripheral_clock() + * - sysclk_enable_module() + * - sysclk_disable_module() + * - sysclk_module_is_enabled() + * - sysclk_set_prescalers() + * + * All other functions should be considered platform-specific. + * Enabling/disabling clocks to specific peripherals as well as + * determining the speed of these clocks should be done by calling + * functions provided by the driver for that peripheral. + * + * @{ + */ + +//! \name System Clock Initialization +//@{ +/** + * \fn void sysclk_init(void) + * \brief Initialize the synchronous clock system. + * + * This function will initialize the system clock and its source. This + * includes: + * - Mask all synchronous clocks except for any clocks which are + * essential for normal operation (for example internal memory + * clocks). + * - Set up the system clock prescalers as specified by the + * application's configuration file. + * - Enable the clock source specified by the application's + * configuration file (oscillator or PLL) and wait for it to become + * stable. + * - Set the main system clock source to the clock specified by the + * application's configuration file. + * + * Since all non-essential peripheral clocks are initially disabled, it + * is the responsibility of the peripheral driver to re-enable any + * clocks that are needed for normal operation. + */ +//@} + +//! @} + +#endif /* SYSCLK_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/osc.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/osc.h new file mode 100644 index 0000000..a37ad2c --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/osc.h @@ -0,0 +1,507 @@ +/** + * \file + * + * \brief Chip-specific oscillator management functions + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef XMEGA_OSC_H_INCLUDED +#define XMEGA_OSC_H_INCLUDED + +#include +#include + +/** + * \weakgroup osc_group + * + * \section osc_group_errata Errata + * - Auto-calibration does not work on XMEGA A1 revision H and + * earlier. + * @{ + */ + +//! \name Oscillator identifiers +//@{ +//! 2 MHz Internal RC Oscillator +#define OSC_ID_RC2MHZ OSC_RC2MEN_bm +//! 32 MHz Internal RC Oscillator +#define OSC_ID_RC32MHZ OSC_RC32MEN_bm +//! 32 KHz Internal RC Oscillator +#define OSC_ID_RC32KHZ OSC_RC32KEN_bm +//! External Oscillator +#define OSC_ID_XOSC OSC_XOSCEN_bm +#if XMEGA_E +//! 8 MHz Internal RC Oscillator +# define OSC_ID_RC8MHZ OSC_RC8MEN_bm +#endif + +/** + * \brief Reference from USB Start Of Frame + * \note This cannot be enabled or disabled, but can be used as a reference for + * the autocalibration (DFLL). + */ +#define OSC_ID_USBSOF 0xff +//@} + +//! \name External oscillator types +//@{ +#define XOSC_TYPE_EXTERNAL 0 //!< External clock signal +#define XOSC_TYPE_32KHZ 2 //!< 32.768 kHz resonator on TOSC +#define XOSC_TYPE_XTAL 3 //!< 0.4 to 16 MHz resonator on XTAL +//@} + +/** + * \def CONFIG_XOSC_32KHZ_LPM + * \brief Define for enabling Low Power Mode for 32 kHz external oscillator. + */ +#ifdef __DOXYGEN__ +# define CONFIG_XOSC_32KHZ_LPM +#endif /* __DOXYGEN__ */ + +/** + * \def CONFIG_XOSC_STARTUP + * \brief Board-dependent value that determines the number of start-up cycles + * for external resonators, based on BOARD_XOSC_STARTUP_US. This is written to + * the two MSB of the XOSCSEL field of OSC.XOSCCTRL. + * + * \note This is automatically computed from BOARD_XOSC_HZ and + * BOARD_XOSC_STARTUP_US if it is not manually set. + */ + +//! \name XTAL resonator start-up cycles +//@{ +#define XOSC_STARTUP_256 0 //!< 256 cycle start-up time +#define XOSC_STARTUP_1024 1 //!< 1 k cycle start-up time +#define XOSC_STARTUP_16384 2 //!< 16 k cycle start-up time +//@} + +/** + * \def CONFIG_XOSC_RANGE + * \brief Board-dependent value that sets the frequency range of the external + * oscillator. This is written to the FRQRANGE field of OSC.XOSCCTRL. + * + * \note This is automatically computed from BOARD_XOSC_HZ if it is not manually + * set. + */ + +//! \name XTAL resonator frequency range +//@{ +//! 0.4 to 2 MHz frequency range +#define XOSC_RANGE_04TO2 OSC_FRQRANGE_04TO2_gc +//! 2 to 9 MHz frequency range +#define XOSC_RANGE_2TO9 OSC_FRQRANGE_2TO9_gc +//! 9 to 12 MHz frequency range +#define XOSC_RANGE_9TO12 OSC_FRQRANGE_9TO12_gc +//! 12 to 16 MHz frequency range +#define XOSC_RANGE_12TO16 OSC_FRQRANGE_12TO16_gc +//@} + +/** + * \def XOSC_STARTUP_TIMEOUT + * \brief Number of us to wait for XOSC to start + * + * This is the number of slow clock cycles corresponding to + * OSC0_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ + +// If application intends to use XOSC. +#ifdef BOARD_XOSC_HZ +// Get start-up config for XOSC, if not manually set. +# ifndef CONFIG_XOSC_STARTUP +# ifndef BOARD_XOSC_STARTUP_US +# error BOARD_XOSC_STARTUP_US must be configured. +# else +//! \internal Number of start-up cycles for the board's XOSC. +# define BOARD_XOSC_STARTUP_CYCLES \ + (BOARD_XOSC_HZ / 1000000 * BOARD_XOSC_STARTUP_US) + +# if (BOARD_XOSC_TYPE == XOSC_TYPE_XTAL) +# if (BOARD_XOSC_STARTUP_CYCLES > 16384) +# error BOARD_XOSC_STARTUP_US is too high for current BOARD_XOSC_HZ. + +# elif (BOARD_XOSC_STARTUP_CYCLES > 1024) +# define CONFIG_XOSC_STARTUP XOSC_STARTUP_16384 +# define XOSC_STARTUP_TIMEOUT (16384*(1000000/BOARD_XOSC_HZ)) + +# elif (BOARD_XOSC_STARTUP_CYCLES > 256) +# define CONFIG_XOSC_STARTUP XOSC_STARTUP_1024 +# define XOSC_STARTUP_TIMEOUT (1024*(1000000/BOARD_XOSC_HZ)) + +# else +# define CONFIG_XOSC_STARTUP XOSC_STARTUP_256 +# define XOSC_STARTUP_TIMEOUT (256*(1000000/BOARD_XOSC_HZ)) +# endif +# else /* BOARD_XOSC_TYPE == XOSC_TYPE_XTAL */ +# define CONFIG_XOSC_STARTUP 0 +# endif +# endif /* BOARD_XOSC_STARTUP_US */ +# endif /* CONFIG_XOSC_STARTUP */ + +// Get frequency range setting for XOSC, if not manually set. +# ifndef CONFIG_XOSC_RANGE +# if (BOARD_XOSC_TYPE == XOSC_TYPE_XTAL) +# if (BOARD_XOSC_HZ < 400000) +# error BOARD_XOSC_HZ is below minimum frequency of 400 kHz. + +# elif (BOARD_XOSC_HZ < 2000000) +# define CONFIG_XOSC_RANGE XOSC_RANGE_04TO2 + +# elif (BOARD_XOSC_HZ < 9000000) +# define CONFIG_XOSC_RANGE XOSC_RANGE_2TO9 + +# elif (BOARD_XOSC_HZ < 12000000) +# define CONFIG_XOSC_RANGE XOSC_RANGE_9TO12 + +# elif (BOARD_XOSC_HZ <= 16000000) +# define CONFIG_XOSC_RANGE XOSC_RANGE_12TO16 + +# else +# error BOARD_XOSC_HZ is above maximum frequency of 16 MHz. +# endif +# else /* BOARD_XOSC_TYPE == XOSC_TYPE_XTAL */ +# define CONFIG_XOSC_RANGE 0 +# endif +# endif /* CONFIG_XOSC_RANGE */ +#endif /* BOARD_XOSC_HZ */ + +#ifndef __ASSEMBLY__ + +/** + * \internal + * \brief Enable internal oscillator \a id + * + * Do not call this function directly. Use osc_enable() instead. + */ +static inline void osc_enable_internal(uint8_t id) +{ + irqflags_t flags; + + Assert(id != OSC_ID_USBSOF); + + flags = cpu_irq_save(); + OSC.CTRL |= id; +#if (XMEGA_E && CONFIG_SYSCLK_RC8MHZ_LPM) + if(id == OSC_ID_RC8MHZ) { + OSC.CTRL |= OSC_RC8MLPM_bm; + } +#endif + cpu_irq_restore(flags); +} + +#if defined(BOARD_XOSC_HZ) || defined(__DOXYGEN__) + +/** + * \internal + * \brief Enable external oscillator \a id + * + * Do not call this function directly. Use osc_enable() instead. Also + * note that this function is only available if the board actually has + * an external oscillator crystal. + */ +static inline void osc_enable_external(uint8_t id) +{ + irqflags_t flags; + + Assert(id == OSC_ID_XOSC); + +#ifndef CONFIG_XOSC_32KHZ_LPM +# if (XMEGA_E && (BOARD_XOSC_TYPE == XOSC_TYPE_EXTERNAL) && defined(CONFIG_XOSC_EXTERNAL_PC4)) + OSC.XOSCCTRL = OSC_XOSCSEL4_bm; +# else + OSC.XOSCCTRL = BOARD_XOSC_TYPE | (CONFIG_XOSC_STARTUP << 2) | + CONFIG_XOSC_RANGE; +# endif +#else + OSC.XOSCCTRL = BOARD_XOSC_TYPE | (CONFIG_XOSC_STARTUP << 2) | + CONFIG_XOSC_RANGE | OSC_X32KLPM_bm; +#endif /* CONFIG_XOSC_32KHZ_LPM */ + + flags = cpu_irq_save(); + OSC.CTRL |= id; + cpu_irq_restore(flags); +} +#else + +static inline void osc_enable_external(uint8_t id) +{ + Assert(false); // No external oscillator on the selected board +} +#endif + +static inline void osc_disable(uint8_t id) +{ + irqflags_t flags; + + Assert(id != OSC_ID_USBSOF); + + flags = cpu_irq_save(); + OSC.CTRL &= ~id; + cpu_irq_restore(flags); +} + +static inline void osc_enable(uint8_t id) +{ + if (id != OSC_ID_XOSC) { + osc_enable_internal(id); + } else { + osc_enable_external(id); + } +} + +static inline bool osc_is_ready(uint8_t id) +{ + Assert(id != OSC_ID_USBSOF); + + return OSC.STATUS & id; +} + +//! \name XMEGA-Specific Oscillator Features +//@{ + +/** + * \brief Enable DFLL-based automatic calibration of an internal + * oscillator. + * + * The XMEGA features two Digital Frequency Locked Loops (DFLLs) which + * can be used to improve the accuracy of the 2 MHz and 32 MHz internal + * RC oscillators. The DFLL compares the oscillator frequency with a + * more accurate reference clock to do automatic run-time calibration of + * the oscillator. + * + * This function enables auto-calibration for either the 2 MHz or 32 MHz + * internal oscillator using either the 32.768 kHz calibrated internal + * oscillator or an external crystal oscillator as a reference. If the + * latter option is used, the crystal must be connected to the TOSC pins + * and run at 32.768 kHz. + * + * \param id The ID of the oscillator for which to enable + * auto-calibration: + * \arg \c OSC_ID_RC2MHZ or \c OSC_ID_RC32MHZ. + * \param ref_id The ID of the oscillator to use as a reference: + * \arg \c OSC_ID_RC32KHZ or \c OSC_ID_XOSC for internal or external 32 kHz + * reference, respectively. + * \arg \c OSC_ID_USBSOF for 32 MHz only when USB is available and running. + */ +static inline void osc_enable_autocalibration(uint8_t id, uint8_t ref_id) +{ + irqflags_t flags; + + flags = cpu_irq_save(); + switch (id) { + case OSC_ID_RC2MHZ: +#if !XMEGA_E + Assert((ref_id == OSC_ID_RC32KHZ) || (ref_id == OSC_ID_XOSC)); + if (ref_id == OSC_ID_XOSC) { + osc_enable(OSC_ID_RC32KHZ); + OSC.DFLLCTRL |= OSC_RC2MCREF_bm; + } else { + OSC.DFLLCTRL &= ~(OSC_RC2MCREF_bm); + } + DFLLRC2M.CTRL |= DFLL_ENABLE_bm; +#endif + break; + + case OSC_ID_RC32MHZ: +#if XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_E + Assert((ref_id == OSC_ID_RC32KHZ) + || (ref_id == OSC_ID_XOSC) +# if !XMEGA_E + || (ref_id == OSC_ID_USBSOF) +#endif + ); + + OSC.DFLLCTRL &= ~(OSC_RC32MCREF_gm); + + if (ref_id == OSC_ID_XOSC) { + osc_enable(OSC_ID_RC32KHZ); + OSC.DFLLCTRL |= OSC_RC32MCREF_XOSC32K_gc; + } + else if (ref_id == OSC_ID_RC32KHZ) { + OSC.DFLLCTRL |= OSC_RC32MCREF_RC32K_gc; + } +# if !XMEGA_E + else if (ref_id == OSC_ID_USBSOF) { + /* + * Calibrate 32MRC at 48MHz using USB SOF + * 48MHz / 1kHz = 0xBB80 + */ + DFLLRC32M.COMP1 = 0x80; + DFLLRC32M.COMP2 = 0xBB; + OSC.DFLLCTRL |= OSC_RC32MCREF_USBSOF_gc; + } +# endif +#else + Assert((ref_id == OSC_ID_RC32KHZ) || + (ref_id == OSC_ID_XOSC)); + +# if defined(OSC_RC32MCREF_gm) + OSC.DFLLCTRL &= ~(OSC_RC32MCREF_gm); +# endif + + if (ref_id == OSC_ID_XOSC) { + osc_enable(OSC_ID_RC32KHZ); +# if defined(OSC_RC32MCREF_gm) + OSC.DFLLCTRL |= OSC_RC32MCREF_XOSC32K_gc; +# else + OSC.DFLLCTRL |= OSC_RC32MCREF_bm; +# endif + } + else if (ref_id == OSC_ID_RC32KHZ) { +# if defined(OSC_RC32MCREF_gm) + OSC.DFLLCTRL |= OSC_RC32MCREF_RC32K_gc; +# else + OSC.DFLLCTRL &= ~(OSC_RC32MCREF_bm); +# endif + } +#endif + + DFLLRC32M.CTRL |= DFLL_ENABLE_bm; + break; + + default: + Assert(false); + break; + } + cpu_irq_restore(flags); +} + +/** + * \brief Disable DFLL-based automatic calibration of an internal + * oscillator. + * + * \see osc_enable_autocalibration + * + * \param id The ID of the oscillator for which to disable + * auto-calibration: + * \arg \c OSC_ID_RC2MHZ or \c OSC_ID_RC32MHZ. + */ +static inline void osc_disable_autocalibration(uint8_t id) +{ + switch (id) { + case OSC_ID_RC2MHZ: +#if !XMEGA_E + DFLLRC2M.CTRL = 0; +#endif + break; + + case OSC_ID_RC32MHZ: + DFLLRC32M.CTRL = 0; + break; + + default: + Assert(false); + break; + } +} + +/** + * \brief Load a specific calibration value for the specified oscillator. + * + * \param id The ID of the oscillator for which to disable + * auto-calibration: + * \arg \c OSC_ID_RC2MHZ or \c OSC_ID_RC32MHZ. + * \param calib The specific calibration value required: + * + */ +static inline void osc_user_calibration(uint8_t id, uint16_t calib) +{ + switch (id) { + case OSC_ID_RC2MHZ: +#if !XMEGA_E + DFLLRC2M.CALA=LSB(calib); + DFLLRC2M.CALB=MSB(calib); +#endif + break; + + case OSC_ID_RC32MHZ: + DFLLRC32M.CALA=LSB(calib); + DFLLRC32M.CALB=MSB(calib); + break; + +#if XMEGA_E + case OSC_ID_RC8MHZ: + OSC.RC8MCAL=LSB(calib); + break; +#endif + + default: + Assert(false); + break; + } +} +//@} + +static inline uint32_t osc_get_rate(uint8_t id) +{ + Assert(id != OSC_ID_USBSOF); + + switch (id) { + case OSC_ID_RC2MHZ: + return 2000000UL; + + case OSC_ID_RC32MHZ: +#ifdef CONFIG_OSC_RC32_CAL + return CONFIG_OSC_RC32_CAL; +#else + return 32000000UL; +#endif + + case OSC_ID_RC32KHZ: + return 32768UL; + +#ifdef BOARD_XOSC_HZ + case OSC_ID_XOSC: + return BOARD_XOSC_HZ; +#endif + + default: + Assert(false); + return 0; + } +} + +#endif /* __ASSEMBLY__ */ + +//! @} + +#endif /* XMEGA_OSC_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/pll.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/pll.h new file mode 100644 index 0000000..b3254c7 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/pll.h @@ -0,0 +1,274 @@ +/** + * \file + * + * \brief Chip-specific PLL management functions + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef XMEGA_PLL_H_INCLUDED +#define XMEGA_PLL_H_INCLUDED + +#include + +/** + * \weakgroup pll_group + * @{ + */ + +#define NR_PLLS 1 +#define PLL_MIN_HZ 10000000UL +#define PLL_MAX_HZ 200000000UL +#define PLL_NR_OPTIONS 0 + +enum pll_source { + //! 2 MHz Internal RC Oscillator + PLL_SRC_RC2MHZ = OSC_PLLSRC_RC2M_gc, + //! 32 MHz Internal RC Oscillator + PLL_SRC_RC32MHZ = OSC_PLLSRC_RC32M_gc, + //! External Clock Source + PLL_SRC_XOSC = OSC_PLLSRC_XOSC_gc, +}; + +#define pll_get_default_rate(pll_id) \ + pll_get_default_rate_priv(CONFIG_PLL##pll_id##_SOURCE, \ + CONFIG_PLL##pll_id##_MUL, \ + CONFIG_PLL##pll_id##_DIV) + +/** + * \internal + * \brief Return clock rate for specified PLL settings. + * + * \note Due to the hardware implementation of the PLL, \a div must be 4 if the + * 32 MHz RC oscillator is used as reference and 1 otherwise. The reference must + * be above 440 kHz, and the output between 10 and 200 MHz. + * + * \param src ID of the PLL's reference source oscillator. + * \param mul Multiplier for the PLL. + * \param div Divisor for the PLL. + * + * \retval Output clock rate from PLL. + */ +static inline uint32_t pll_get_default_rate_priv(enum pll_source src, + unsigned int mul, unsigned int div) +{ + uint32_t rate; + + switch (src) { + case PLL_SRC_RC2MHZ: + rate = 2000000UL; + Assert(div == 1); + break; + + case PLL_SRC_RC32MHZ: +#ifdef CONFIG_OSC_RC32_CAL //32MHz oscillator is calibrated to another frequency + rate = CONFIG_OSC_RC32_CAL / 4; +#else + rate = 8000000UL; + #endif + Assert(div == 4); + break; + + case PLL_SRC_XOSC: + rate = osc_get_rate(OSC_ID_XOSC); + Assert(div == 1); + break; + + default: + break; + } + + Assert(rate >= 440000UL); + + rate *= mul; + + Assert(rate >= PLL_MIN_HZ); + Assert(rate <= PLL_MAX_HZ); + + return rate; +} + +struct pll_config { + uint8_t ctrl; +}; + +/** + * \note The XMEGA PLL hardware uses hard-wired input dividers, so the + * user must ensure that \a div is set as follows: + * - If \a src is PLL_SRC_32MHZ, \a div must be set to 4. + * - Otherwise, \a div must be set to 1. + */ +static inline void pll_config_init(struct pll_config *cfg, enum pll_source src, + unsigned int div, unsigned int mul) +{ + Assert(mul >= 1 && mul <= 31); + + if (src == PLL_SRC_RC32MHZ) { + Assert(div == 4); + } else { + Assert(div == 1); + } + + /* Initialize the configuration */ + cfg->ctrl = src | (mul << OSC_PLLFAC_gp); +} + +#define pll_config_defaults(cfg, pll_id) \ + pll_config_init(cfg, \ + CONFIG_PLL##pll_id##_SOURCE, \ + CONFIG_PLL##pll_id##_DIV, \ + CONFIG_PLL##pll_id##_MUL) + +static inline void pll_config_read(struct pll_config *cfg, unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + cfg->ctrl = OSC.PLLCTRL; +} + +static inline void pll_config_write(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + OSC.PLLCTRL = cfg->ctrl; +} + +/** + * \note If a different PLL reference oscillator than those enabled by + * \ref sysclk_init() is used, the user must ensure that the desired reference + * is enabled prior to calling this function. + */ +static inline void pll_enable(const struct pll_config *cfg, + unsigned int pll_id) +{ + irqflags_t flags; + + Assert(pll_id < NR_PLLS); + + flags = cpu_irq_save(); + pll_config_write(cfg, pll_id); + OSC.CTRL |= OSC_PLLEN_bm; + cpu_irq_restore(flags); +} + +/*! \note This will not automatically disable the reference oscillator that is + * configured for the PLL. + */ +static inline void pll_disable(unsigned int pll_id) +{ + irqflags_t flags; + + Assert(pll_id < NR_PLLS); + + flags = cpu_irq_save(); + OSC.CTRL &= ~OSC_PLLEN_bm; + cpu_irq_restore(flags); +} + +static inline bool pll_is_locked(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + return OSC.STATUS & OSC_PLLRDY_bm; +} + +static inline void pll_enable_source(enum pll_source src) +{ + switch (src) { + case PLL_SRC_RC2MHZ: + break; + + case PLL_SRC_RC32MHZ: + if (!osc_is_ready(OSC_ID_RC32MHZ)) { + osc_enable(OSC_ID_RC32MHZ); + osc_wait_ready(OSC_ID_RC32MHZ); +#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC + if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC + != OSC_ID_USBSOF) { + osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); + osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); + } + osc_enable_autocalibration(OSC_ID_RC32MHZ, + CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); +#endif + } + break; + + case PLL_SRC_XOSC: + if (!osc_is_ready(OSC_ID_XOSC)) { + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); + } + break; + default: + Assert(false); + break; + } +} + +static inline void pll_enable_config_defaults(unsigned int pll_id) +{ + struct pll_config pllcfg; + + if (pll_is_locked(pll_id)) { + return; // Pll already running + } + switch (pll_id) { +#ifdef CONFIG_PLL0_SOURCE + case 0: + pll_enable_source(CONFIG_PLL0_SOURCE); + pll_config_init(&pllcfg, + CONFIG_PLL0_SOURCE, + CONFIG_PLL0_DIV, + CONFIG_PLL0_MUL); + break; +#endif + default: + Assert(false); + break; + } + pll_enable(&pllcfg, pll_id); + while (!pll_is_locked(pll_id)); +} + +//! @} + +#endif /* XMEGA_PLL_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/sysclk.c b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/sysclk.c new file mode 100644 index 0000000..103c131 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/sysclk.c @@ -0,0 +1,260 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include + +#include +#include +#include + +#if XMEGA_AU || XMEGA_B || XMEGA_C +# include +#endif + + +void sysclk_init(void) +{ + uint8_t *reg = (uint8_t *)&PR.PRGEN; + uint8_t i; +#ifdef CONFIG_OSC_RC32_CAL + uint16_t cal; + /* avoid Cppcheck Warning */ + UNUSED(cal); +#endif + bool need_rc2mhz = false; + + /* Turn off all peripheral clocks that can be turned off. */ + for (i = 0; i <= SYSCLK_PORT_F; i++) { + *(reg++) = 0xff; + } + + /* Set up system clock prescalers if different from defaults */ + if ((CONFIG_SYSCLK_PSADIV != SYSCLK_PSADIV_1) + || (CONFIG_SYSCLK_PSBCDIV != SYSCLK_PSBCDIV_1_1)) { + sysclk_set_prescalers(CONFIG_SYSCLK_PSADIV, + CONFIG_SYSCLK_PSBCDIV); + } +#if (CONFIG_OSC_RC32_CAL==48000000UL) + MSB(cal) = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(USBRCOSC)); + LSB(cal) = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(USBRCOSCA)); + /* + * If a device has an uncalibrated value in the + * production signature row (early sample part), load a + * sane default calibration value. + */ + if (cal == 0xFFFF) { + cal = 0x2340; + } + osc_user_calibration(OSC_ID_RC32MHZ,cal); +#endif + /* + * Switch to the selected initial system clock source, unless + * the default internal 2 MHz oscillator is selected. + */ + if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC2MHZ) { + need_rc2mhz = true; + } else { + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RC32MHZ: + osc_enable(OSC_ID_RC32MHZ); + osc_wait_ready(OSC_ID_RC32MHZ); +#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC + if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC + != OSC_ID_USBSOF) { + osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); + osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); + } + osc_enable_autocalibration(OSC_ID_RC32MHZ, + CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); +#endif + break; + + case SYSCLK_SRC_RC32KHZ: + osc_enable(OSC_ID_RC32KHZ); + osc_wait_ready(OSC_ID_RC32KHZ); + break; + + case SYSCLK_SRC_XOSC: + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); + break; + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL: + if (CONFIG_PLL0_SOURCE == PLL_SRC_RC2MHZ) { + need_rc2mhz = true; + } + pll_enable_config_defaults(0); + break; +#endif +#if XMEGA_E + case SYSCLK_SRC_RC8MHZ: + osc_enable(OSC_ID_RC8MHZ); + osc_wait_ready(OSC_ID_RC8MHZ); + break; +#endif + default: + //unhandled_case(CONFIG_SYSCLK_SOURCE); + return; + } + + ccp_write_io((uint8_t *)&CLK.CTRL, CONFIG_SYSCLK_SOURCE); + Assert(CLK.CTRL == CONFIG_SYSCLK_SOURCE); + } + + if (need_rc2mhz) { +#ifdef CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC + osc_enable(CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC); + osc_wait_ready(CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC); + osc_enable_autocalibration(OSC_ID_RC2MHZ, + CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC); +#endif + } else { + osc_disable(OSC_ID_RC2MHZ); + } + +#ifdef CONFIG_RTC_SOURCE + sysclk_rtcsrc_enable(CONFIG_RTC_SOURCE); +#endif +} + +void sysclk_enable_module(enum sysclk_port_id port, uint8_t id) +{ + irqflags_t flags = cpu_irq_save(); + + *((uint8_t *)&PR.PRGEN + port) &= ~id; + + cpu_irq_restore(flags); +} + +void sysclk_disable_module(enum sysclk_port_id port, uint8_t id) +{ + irqflags_t flags = cpu_irq_save(); + + *((uint8_t *)&PR.PRGEN + port) |= id; + + cpu_irq_restore(flags); +} + +#if XMEGA_AU || XMEGA_B || XMEGA_C || defined(__DOXYGEN__) + +/** + * \brief Enable clock for the USB module + * + * \pre CONFIG_USBCLK_SOURCE must be defined. + * + * \param frequency The required USB clock frequency in MHz: + * \arg \c 6 for 6 MHz + * \arg \c 48 for 48 MHz + */ +void sysclk_enable_usb(uint8_t frequency) +{ + uint8_t prescaler; + + Assert((frequency == 6) || (frequency == 48)); + + /* + * Enable or disable prescaler depending on if the USB frequency is 6 + * MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling. + */ + if (frequency == 6) { + prescaler = CLK_USBPSDIV_8_gc; + } + else { + prescaler = 0; + } + + /* + * Switch to the system clock selected by the user. + */ + switch (CONFIG_USBCLK_SOURCE) { + case USBCLK_SRC_RCOSC: + if (!osc_is_ready(OSC_ID_RC32MHZ)) { + osc_enable(OSC_ID_RC32MHZ); + osc_wait_ready(OSC_ID_RC32MHZ); +#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC + if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC + != OSC_ID_USBSOF) { + osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); + osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); + } + osc_enable_autocalibration(OSC_ID_RC32MHZ, + CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); +#endif + } + ccp_write_io((uint8_t *)&CLK.USBCTRL, (prescaler) + | CLK_USBSRC_RC32M_gc + | CLK_USBSEN_bm); + break; + +#ifdef CONFIG_PLL0_SOURCE + case USBCLK_SRC_PLL: + pll_enable_config_defaults(0); + ccp_write_io((uint8_t *)&CLK.USBCTRL, (prescaler) + | CLK_USBSRC_PLL_gc + | CLK_USBSEN_bm); + break; +#endif + + default: + Assert(false); + break; + } + + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_USB); +} + +/** + * \brief Disable clock for the USB module + */ +void sysclk_disable_usb(void) +{ + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_USB); + ccp_write_io((uint8_t *)&CLK.USBCTRL, 0); +} +#endif // XMEGA_AU || XMEGA_B || XMEGA_C diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/sysclk.h b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/sysclk.h new file mode 100644 index 0000000..062a446 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/clock/xmega/sysclk.h @@ -0,0 +1,1534 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef XMEGA_SYSCLK_H_INCLUDED +#define XMEGA_SYSCLK_H_INCLUDED + +#include +#include +#include +#include +#include +#include + +// Include clock configuration for the project. +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \page sysclk_quickstart Quick Start Guide for the System Clock Management service (XMEGA) + * + * This is the quick start guide for the \ref sysclk_group "System Clock Management" + * service, with step-by-step instructions on how to configure and use the service for + * specific use cases. + * + * \section sysclk_quickstart_usecases System Clock Management use cases + * - \ref sysclk_quickstart_basic + * - \ref sysclk_quickstart_use_case_2 + * - \ref sysclk_quickstart_use_case_3 + * + * \section sysclk_quickstart_basic Basic usage of the System Clock Management service + * This section will present a basic use case for the System Clock Management service. + * This use case will configure the main system clock to 32MHz, using an internal PLL + * module to multiply the frequency of a crystal attached to the microcontroller. The + * secondary peripheral bus clock and CPU clock are scaled down from the speed of the + * main system clock. + * + * \subsection sysclk_quickstart_use_case_1_prereq Prerequisites + * - None + * + * \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code + * Add to the application initialization code: + * \code + sysclk_init(); +\endcode + * + * \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow + * -# Configure the system clocks according to the settings in conf_clock.h: + * \code sysclk_init(); \endcode + * + * \subsection sysclk_quickstart_use_case_1_example_code Example code + * Add or uncomment the following in your conf_clock.h header file, commenting out all other + * definitions of the same symbol(s): + * \code + #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL + + // Fpll0 = (Fclk * PLL_mul) / PLL_div + #define CONFIG_PLL0_SOURCE PLL_SRC_XOSC + #define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ) + #define CONFIG_PLL0_DIV 1 + + // Fbus = Fsys / (2 ^ BUS_div) + #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 + #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_2 +\endcode + * + * \subsection sysclk_quickstart_use_case_1_example_workflow Workflow + * -# Configure the main system clock to use the output of the PLL module as its source: + * \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL \endcode + * -# Configure the PLL0 module to use external crystal oscillator XOSC as its source: + * \code #define CONFIG_PLL0_SOURCE PLL_SRC_XOSC \endcode + * -# Configure the PLL0 module to multiply the external oscillator XOSC frequency up to 32MHz: + * \code + #define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ) + #define CONFIG_PLL0_DIV 1 +\endcode + * \note For user boards, \c BOARD_XOSC_HZ should be defined in the board \c conf_board.h configuration + * file as the frequency of the crystal attached to XOSC. + * -# Configure the main CPU clock and slow peripheral bus to run at 16MHz, run the fast peripheral bus + * at the full 32MHz speed: + * \code + #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 + #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_2 +\endcode + * \note Some dividers are powers of two, while others are integer division factors. Refer to the + * formulas in the conf_clock.h template commented above each division define. + */ + +/** + * \page sysclk_quickstart_use_case_2 Advanced use case - Peripheral Bus Clock Management (XMEGA) + * + * \section sysclk_quickstart_use_case_2 Advanced use case - Peripheral Bus Clock Management + * This section will present a more advanced use case for the System Clock Management service. + * This use case will configure the main system clock to 32MHz, using an internal PLL + * module to multiply the frequency of a crystal attached to the microcontroller. The peripheral bus + * clocks will run at the same speed as the CPU clock, and the USB clock will be configured to use + * the internal 32MHz (nominal) RC oscillator calibrated to 48MHz with the USB Start-of-Frame as the + * calibration reference. + * + * \subsection sysclk_quickstart_use_case_2_prereq Prerequisites + * - None + * + * \subsection sysclk_quickstart_use_case_2_setup_steps Initialization code + * Add to the application initialization code: + * \code + sysclk_init(); +\endcode + * + * \subsection sysclk_quickstart_use_case_2_setup_steps_workflow Workflow + * -# Configure the system clocks according to the settings in conf_clock.h: + * \code sysclk_init(); \endcode + * + * \subsection sysclk_quickstart_use_case_2_example_code Example code + * Add or uncomment the following in your conf_clock.h header file, commenting out all other + * definitions of the same symbol(s): + * \code + #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL + + // Fpll0 = (Fclk * PLL_mul) / PLL_div + #define CONFIG_PLL0_SOURCE PLL_SRC_XOSC + #define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ) + #define CONFIG_PLL0_DIV 1 + + // Fbus = Fsys / (2 ^ BUS_div) + #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 + #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 + + #define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC + #define CONFIG_OSC_RC32_CAL 48000000UL + #define CONFIG_OSC_AUTOCAL OSC_ID_RC32MHZ + #define CONFIG_OSC_AUTOCAL_REF_OSC OSC_ID_USBSOF +\endcode + * + * \subsection sysclk_quickstart_use_case_2_example_workflow Workflow + * -# Configure the main system clock to use the output of the PLL module as its source: + * \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL \endcode + * -# Configure the PLL0 module to use external crystal oscillator XOSC as its source: + * \code #define CONFIG_PLL0_SOURCE PLL_SRC_XOSC \endcode + * -# Configure the PLL0 module to multiply the external oscillator XOSC frequency up to 32MHz: + * \code + #define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ) + #define CONFIG_PLL0_DIV 1 +\endcode + * \note For user boards, \c BOARD_XOSC_HZ should be defined in the board \c conf_board.h configuration + * file as the frequency of the crystal attached to XOSC. + * -# Configure the main CPU and peripheral bus clocks to run at 32MHz: + * \code + #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 + #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_2 +\endcode + * \note Some dividers are powers of two, while others are integer division factors. Refer to the + * formulas in the conf_clock.h template commented above each division define. + * -# Configure the USB module clock to use the internal fast (32MHz) RC oscillator: + * \code + #define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC +\endcode + * \note When the internal RC oscillator is used for the USB module, it must be recalibrated to 48MHz for + * the USB peripheral to function. If this oscillator is then used as the main system clock source, + * the clock must be divided down via the peripheral and CPU bus clock division constants to ensure + * that the maximum allowable CPU frequency is not exceeded. + * -# Configure the internal fast (32MHz) RC oscillator to calibrate to 48MHz using the USB Start of Frame (SOF) + * as the calibration reference: + * \code + #define CONFIG_OSC_RC32_CAL 48000000UL + #define CONFIG_OSC_AUTOCAL OSC_ID_RC32MHZ + #define CONFIG_OSC_AUTOCAL_REF_OSC OSC_ID_USBSOF +\endcode + */ + +/** + * \page sysclk_quickstart_use_case_3 Advanced use case - DFLL auto-calibration (XMEGA) + * + * \section sysclk_quickstart_use_case_3 Advanced use case - DFLL auto-calibration + * This section will present a more advanced use case for the System Clock + * Management service. This use case will configure the main system clock to + * 2MHz, using the internal 2MHz RC oscillator calibrated against the internal + * 32KHz oscillator. The peripheral bus clocks will run at the same speed as + * the CPU clock, and the USB clock will be configured to use the internal + * 32MHz (nominal) RC oscillator calibrated to 48MHz with the USB + * Start-of-Frame as the calibration reference. + * + * \subsection sysclk_quickstart_use_case_3_prereq Prerequisites + * - None + * + * \subsection sysclk_quickstart_use_case_3_setup_steps Initialization code + * Add to the application initialization code: + * \code + sysclk_init(); +\endcode + * + * \subsection sysclk_quickstart_use_case_3_setup_steps_workflow Workflow + * -# Configure the system clocks according to the settings in conf_clock.h: + * \code sysclk_init(); \endcode + * + * \subsection sysclk_quickstart_use_case_3_example_code Example code + * Add or uncomment the following in your conf_clock.h header file, + * commenting out all other definitions of the same symbol(s): + * \code + #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ + + #define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC OSC_ID_RC32KHZ + + #define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC + #define CONFIG_OSC_RC32_CAL 48000000UL + #define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF +\endcode + * + * \subsection sysclk_quickstart_use_case_3_example_workflow Workflow + * -# Configure the main system clock to use the internal 2MHz RC oscillator + * as its source: + * \code + #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ +\endcode + * -# Configure the 2MHz DFLL auto-calibration to use the internal 32KHz RC + * oscillator: + * \code + #define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC OSC_ID_RC32KHZ +\endcode + * \note For auto-calibration it's typically more relevant to use an external + * 32KHz crystal. So if that's the case use OSC_ID_XOSC instead. + * -# Configure the USB module clock to use the internal fast (32MHz) RC oscillator: + * \code + #define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC +\endcode + * -# Configure the internal fast (32MHz) RC oscillator to calibrate to 48MHz + * using the USB Start of Frame (SOF) as the calibration reference: + * \code + #define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC + #define CONFIG_OSC_RC32_CAL 48000000UL + #define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF +\endcode + */ + +/* Wrap old config into new one */ +#ifdef CONFIG_OSC_AUTOCAL +# if CONFIG_OSC_AUTOCAL == OSC_ID_RC2MHZ +# define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC CONFIG_OSC_AUTOCAL_REF_OSC +# elif CONFIG_OSC_AUTOCAL == OSC_ID_RC32MHZ +# define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC CONFIG_OSC_AUTOCAL_REF_OSC +# else +# error Bad configuration of CONFIG_OSC_AUTOCAL and/or CONFIG_OSC_AUTOCAL_REF_OSC +# endif +#endif + +// Use 2 MHz with no prescaling if config was empty. +#ifndef CONFIG_SYSCLK_SOURCE +# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ +#endif /* CONFIG_SYSCLK_SOURCE */ + +#ifndef CONFIG_SYSCLK_PSADIV +# define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 +#endif /* CONFIG_SYSCLK_PSADIV */ + +#ifndef CONFIG_SYSCLK_PSBCDIV +# define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 +#endif /* CONFIG_SYSCLK_PSBCDIV */ + +/** + * \weakgroup sysclk_group + * + * \section sysclk_group_config Configuration Symbols + * + * The following configuration symbols may be used to specify the + * initial system clock configuration. If any of the symbols are not + * set, reasonable defaults will be provided. + * - \b CONFIG_SYSCLK_SOURCE: The initial system clock source. + * - \b CONFIG_SYSCLK_PSADIV: The initial Prescaler A setting. + * - \b CONFIG_SYSCLK_PSBCDIV: The initial Prescaler B setting. + * - \b CONFIG_USBCLK_SOURCE: The initial USB clock source. + * + * @{ + */ + +//! \name System Clock Sources +//@{ +//! Internal 2 MHz RC oscillator +#define SYSCLK_SRC_RC2MHZ CLK_SCLKSEL_RC2M_gc +//! Internal 32 MHz RC oscillator +#define SYSCLK_SRC_RC32MHZ CLK_SCLKSEL_RC32M_gc +//! Internal 32 KHz RC oscillator +#define SYSCLK_SRC_RC32KHZ CLK_SCLKSEL_RC32K_gc +//! External oscillator +#define SYSCLK_SRC_XOSC CLK_SCLKSEL_XOSC_gc +//! Phase-Locked Loop +#define SYSCLK_SRC_PLL CLK_SCLKSEL_PLL_gc +#if XMEGA_E +//! Internal 8 MHz RC oscillator +# define SYSCLK_SRC_RC8MHZ CLK_SCLKSEL_RC8M_gc +#endif +//@} + +//! \name Prescaler A Setting (relative to CLKsys) +//@{ +#define SYSCLK_PSADIV_1 CLK_PSADIV_1_gc //!< Do not prescale +#define SYSCLK_PSADIV_2 CLK_PSADIV_2_gc //!< Prescale CLKper4 by 2 +#define SYSCLK_PSADIV_4 CLK_PSADIV_4_gc //!< Prescale CLKper4 by 4 +#define SYSCLK_PSADIV_8 CLK_PSADIV_8_gc //!< Prescale CLKper4 by 8 +#define SYSCLK_PSADIV_16 CLK_PSADIV_16_gc //!< Prescale CLKper4 by 16 +#define SYSCLK_PSADIV_32 CLK_PSADIV_32_gc //!< Prescale CLKper4 by 32 +#define SYSCLK_PSADIV_64 CLK_PSADIV_64_gc //!< Prescale CLKper4 by 64 +#define SYSCLK_PSADIV_128 CLK_PSADIV_128_gc //!< Prescale CLKper4 by 128 +#define SYSCLK_PSADIV_256 CLK_PSADIV_256_gc //!< Prescale CLKper4 by 256 +#define SYSCLK_PSADIV_512 CLK_PSADIV_512_gc //!< Prescale CLKper4 by 512 + +#if XMEGA_E +# define SYSCLK_PSADIV_6 CLK_PSADIV_6_gc //!< Prescale CLKper4 by 6 +# define SYSCLK_PSADIV_10 CLK_PSADIV_10_gc //!< Prescale CLKper4 by 10 +# define SYSCLK_PSADIV_12 CLK_PSADIV_12_gc //!< Prescale CLKper4 by 12 +# define SYSCLK_PSADIV_24 CLK_PSADIV_24_gc //!< Prescale CLKper4 by 24 +# define SYSCLK_PSADIV_48 CLK_PSADIV_48_gc //!< Prescale CLKper4 by 48 +#endif +//@} + +//! \name Prescaler B and C Setting (relative to CLKper4) +//@{ +//! Do not prescale +#define SYSCLK_PSBCDIV_1_1 CLK_PSBCDIV_1_1_gc +//! Prescale CLKper and CLKcpu by 2 +#define SYSCLK_PSBCDIV_1_2 CLK_PSBCDIV_1_2_gc +//! Prescale CLKper2, CLKper and CLKcpu by 4 +#define SYSCLK_PSBCDIV_4_1 CLK_PSBCDIV_4_1_gc +//! Prescale CLKper2 by 2, CLKper and CLKcpu by 4 +#define SYSCLK_PSBCDIV_2_2 CLK_PSBCDIV_2_2_gc +//@} + +//! \name System Clock Port Numbers +enum sysclk_port_id { + SYSCLK_PORT_GEN, //!< Devices not associated with a specific port. + SYSCLK_PORT_A, //!< Devices on PORTA + SYSCLK_PORT_B, //!< Devices on PORTB + SYSCLK_PORT_C, //!< Devices on PORTC + SYSCLK_PORT_D, //!< Devices on PORTD + SYSCLK_PORT_E, //!< Devices on PORTE + SYSCLK_PORT_F, //!< Devices on PORTF +}; + +/*! \name Clocks not associated with any port + * + * \note See the datasheet for available modules in the device. + */ +//@{ +#define SYSCLK_DMA PR_DMA_bm //!< DMA Controller +#define SYSCLK_EDMA PR_EDMA_bm //!< EDMA Controller +#define SYSCLK_EVSYS PR_EVSYS_bm //!< Event System +#define SYSCLK_RTC PR_RTC_bm //!< Real-Time Counter +#define SYSCLK_EBI PR_EBI_bm //!< Ext Bus Interface +#define SYSCLK_AES PR_AES_bm //!< AES Module +#define SYSCLK_USB PR_USB_bm //!< USB Module +#define SYSCLK_XCL PR_XCL_bm //!< USB Module +//@} + +/*! \name Clocks on PORTA and PORTB + * + * \note See the datasheet for available modules in the device. + */ +//@{ +#define SYSCLK_AC PR_AC_bm //!< Analog Comparator +#define SYSCLK_ADC PR_ADC_bm //!< A/D Converter +#define SYSCLK_DAC PR_DAC_bm //!< D/A Converter +//@} + +/*! \name Clocks on PORTC, PORTD, PORTE and PORTF + * + * \note See the datasheet for available modules in the device. + */ +//@{ +#define SYSCLK_TC0 PR_TC0_bm //!< Timer/Counter 0 +#define SYSCLK_TC1 PR_TC1_bm //!< Timer/Counter 1 +#define SYSCLK_TC4 PR_TC4_bm //!< Timer/Counter 0 +#define SYSCLK_TC5 PR_TC5_bm //!< Timer/Counter 1 +#define SYSCLK_HIRES PR_HIRES_bm //!< Hi-Res Extension +#define SYSCLK_SPI PR_SPI_bm //!< SPI controller +#define SYSCLK_USART0 PR_USART0_bm //!< USART 0 +#define SYSCLK_USART1 PR_USART1_bm //!< USART 1 +#define SYSCLK_TWI PR_TWI_bm //!< TWI controller +//@} + +/** + * \name RTC clock source identifiers + * + * @{ + */ + +/** 1kHz from internal ULP oscillator. Low precision */ +#define SYSCLK_RTCSRC_ULP CLK_RTCSRC_ULP_gc +/** 1.024kHz from 32.768kHz crystal oscillator TOSC */ +#define SYSCLK_RTCSRC_TOSC CLK_RTCSRC_TOSC_gc +/** 1.024kHz from 32.768kHz internal RC oscillator */ +#define SYSCLK_RTCSRC_RCOSC CLK_RTCSRC_RCOSC_gc +/** 32.768kHz from crystal oscillator TOSC */ +#define SYSCLK_RTCSRC_TOSC32 CLK_RTCSRC_TOSC32_gc +/** 32.768kHz from internal RC oscillator */ +#define SYSCLK_RTCSRC_RCOSC32 CLK_RTCSRC_RCOSC32_gc +/** External clock on TOSC1 */ +#define SYSCLK_RTCSRC_EXTCLK CLK_RTCSRC_EXTCLK_gc + +/** @} */ + +#if XMEGA_AU || XMEGA_B || XMEGA_C +//! \name USB Clock Sources +//@{ +//! Internal 32 MHz RC oscillator +#define USBCLK_SRC_RCOSC 0 +//! Phase-Locked Loop +#define USBCLK_SRC_PLL 1 +//@} + +/** + * \def CONFIG_USBCLK_SOURCE + * \brief Configuration symbol for the USB clock source + * + * If the device features an USB module, and this is intended to be used, this + * symbol must be defined with the clock source configuration. + * + * Define this as one of the \c USBCLK_SRC_xxx definitions. If the PLL is + * selected, it must be configured to run at 48 MHz. If the 32 MHz RC oscillator + * is selected, it must be tuned to 48 MHz by means of the DFLL. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_SOURCE +#endif + +#endif // XMEGA_AU || XMEGA_B || XMEGA_C + +#ifndef __ASSEMBLY__ + +/** + * \name Querying the system clock and its derived clocks + */ +//@{ + +/** + * \brief Return the current rate in Hz of the main system clock + * + * \todo This function assumes that the main clock source never changes + * once it's been set up, and that PLL0 always runs at the compile-time + * configured default rate. While this is probably the most common + * configuration, which we want to support as a special case for + * performance reasons, we will at some point need to support more + * dynamic setups as well. + * + * \return Frequency of the main system clock, in Hz. + */ +static inline uint32_t sysclk_get_main_hz(void) +{ + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RC2MHZ: + return 2000000UL; +#if XMEGA_E + case SYSCLK_SRC_RC8MHZ: + return 8000000UL; +#endif + case SYSCLK_SRC_RC32MHZ: +#ifdef CONFIG_OSC_RC32_CAL + return CONFIG_OSC_RC32_CAL; +#else + return 32000000UL; +#endif + + case SYSCLK_SRC_RC32KHZ: + return 32768UL; + +#ifdef BOARD_XOSC_HZ + case SYSCLK_SRC_XOSC: + return BOARD_XOSC_HZ; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL: + return pll_get_default_rate(0); +#endif + + default: + //unhandled_case(CONFIG_SYSCLK_SOURCE); + return 0; + } +} + +/** + * \brief Return the current rate in Hz of clk_PER4. + * + * This clock can run up to four times faster than the CPU clock. + * + * \return Frequency of the clk_PER4 clock, in Hz. + */ +static inline uint32_t sysclk_get_per4_hz(void) +{ + uint8_t shift = 0; + +#if XMEGA_E + if (CONFIG_SYSCLK_PSADIV > SYSCLK_PSADIV_512) { + switch (CONFIG_SYSCLK_PSADIV) { + case SYSCLK_PSADIV_6: + return sysclk_get_main_hz() / 6; + case SYSCLK_PSADIV_10: + return sysclk_get_main_hz() / 10; + case SYSCLK_PSADIV_12: + return sysclk_get_main_hz() / 12; + case SYSCLK_PSADIV_24: + return sysclk_get_main_hz() / 24; + case SYSCLK_PSADIV_48: + return sysclk_get_main_hz() / 48; + default: + //unhandled_case; + return 0; + } + } +#endif + if (CONFIG_SYSCLK_PSADIV & (1U << CLK_PSADIV_gp)) { + shift = (CONFIG_SYSCLK_PSADIV >> (1 + CLK_PSADIV_gp)) + 1; + } + + return sysclk_get_main_hz() >> shift; +} + +/** + * \brief Return the current rate in Hz of clk_PER2. + * + * This clock can run up to two times faster than the CPU clock. + * + * \return Frequency of the clk_PER2 clock, in Hz. + */ +static inline uint32_t sysclk_get_per2_hz(void) +{ + switch (CONFIG_SYSCLK_PSBCDIV) { + case SYSCLK_PSBCDIV_1_1: /* Fall through */ + case SYSCLK_PSBCDIV_1_2: + return sysclk_get_per4_hz(); + + case SYSCLK_PSBCDIV_4_1: + return sysclk_get_per4_hz() / 4; + + case SYSCLK_PSBCDIV_2_2: + return sysclk_get_per4_hz() / 2; + + default: + //unhandled_case(CONFIG_SYSCLK_PSBCDIV); + return 0; + } +} + +/** + * \brief Return the current rate in Hz of clk_PER. + * + * This clock always runs at the same rate as the CPU clock unless the divider + * is set. + * + * \return Frequency of the clk_PER clock, in Hz. + */ +static inline uint32_t sysclk_get_per_hz(void) +{ + if (CONFIG_SYSCLK_PSBCDIV & (1U << CLK_PSBCDIV_gp)) + return sysclk_get_per2_hz() / 2; + else + return sysclk_get_per2_hz(); +} + +/** + * \brief Return the current rate in Hz of the CPU clock. + * + * \return Frequency of the CPU clock, in Hz. + */ +static inline uint32_t sysclk_get_cpu_hz(void) +{ + return sysclk_get_per_hz(); +} + +/** + * \brief Retrieves the current rate in Hz of the Peripheral Bus clock attached + * to the specified peripheral. + * + * \param module Pointer to the module's base address. + * + * \return Frequency of the bus attached to the specified peripheral, in Hz. + */ +static inline uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module) +{ + if (module == NULL) { + Assert(false); + return 0; + } +#ifdef AES + else if (module == &AES) { + return sysclk_get_per_hz(); + } +#endif +#ifdef EBI + else if (module == &EBI) { + return sysclk_get_per2_hz(); + } +#endif +#ifdef RTC + else if (module == &RTC) { + return sysclk_get_per_hz(); + } +#endif +#ifdef EVSYS + else if (module == &EVSYS) { + return sysclk_get_per_hz(); + } +#endif +#ifdef DMA + else if (module == &DMA) { + return sysclk_get_per_hz(); + } +#endif +#ifdef EDMA + else if (module == &EDMA) { + return sysclk_get_per_hz(); + } +#endif +#ifdef ACA + else if (module == &ACA) { + return sysclk_get_per_hz(); + } +#endif +#ifdef ACB + else if (module == &ACB) { + return sysclk_get_per_hz(); + } +#endif +#ifdef ADCA + else if (module == &ADCA) { + return sysclk_get_per_hz(); + } +#endif +#ifdef ADCB + else if (module == &ADCB) { + return sysclk_get_per_hz(); + } +#endif +#ifdef DACA + else if (module == &DACA) { + return sysclk_get_per_hz(); + } +#endif +// Workaround for bad XMEGA D header file +#if !XMEGA_D +#ifdef DACB + else if (module == &DACB) { + return sysclk_get_per_hz(); + } +#endif +#endif // Workaround end +#ifdef FAULTC0 + else if (module == &FAULTC0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef FAULTC1 + else if (module == &FAULTC1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCC0 + else if (module == &TCC0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCD0 + else if (module == &TCD0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCE0 + else if (module == &TCE0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCF0 + else if (module == &TCF0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCC1 + else if (module == &TCC1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCD1 + else if (module == &TCD1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCE1 + else if (module == &TCE1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCF1 + else if (module == &TCF1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCC4 + else if (module == &TCC4) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCC5 + else if (module == &TCC5) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCD4 + else if (module == &TCD4) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TCD5 + else if (module == &TCD5) { + return sysclk_get_per_hz(); + } +#endif +#ifdef HIRESC + else if (module == &HIRESC) { + return sysclk_get_per4_hz(); + } +#endif +#ifdef HIRESD + else if (module == &HIRESD) { + return sysclk_get_per4_hz(); + } +#endif +#ifdef HIRESE + else if (module == &HIRESE) { + return sysclk_get_per4_hz(); + } +#endif +#ifdef HIRESF + else if (module == &HIRESF) { + return sysclk_get_per4_hz(); + } +#endif +#ifdef SPIC + else if (module == &SPIC) { + return sysclk_get_per_hz(); + } +#endif +#ifdef SPID + else if (module == &SPID) { + return sysclk_get_per_hz(); + } +#endif +#ifdef SPIE + else if (module == &SPIE) { + return sysclk_get_per_hz(); + } +#endif +#ifdef SPIF + else if (module == &SPIF) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTC0 + else if (module == &USARTC0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTD0 + else if (module == &USARTD0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTE0 + else if (module == &USARTE0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTF0 + else if (module == &USARTF0) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTC1 + else if (module == &USARTC1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTD1 + else if (module == &USARTD1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTE1 + else if (module == &USARTE1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef USARTF1 + else if (module == &USARTF1) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TWIC + else if (module == &TWIC) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TWID + else if (module == &TWID) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TWIE + else if (module == &TWIE) { + return sysclk_get_per_hz(); + } +#endif +#ifdef TWIF + else if (module == &TWIF) { + return sysclk_get_per_hz(); + } +#endif +#ifdef XCL + else if (module == &XCL) { + return sysclk_get_per_hz(); + } +#endif + else { + Assert(false); + return 0; + } +} + +//@} + +//! \name Enabling and disabling synchronous clocks +//@{ + +/** + * \brief Enable the clock to peripheral \a id on port \a port + * + * \param port ID of the port to which the module is connected (one of + * the \c SYSCLK_PORT_* definitions). + * \param id The ID (bitmask) of the peripheral module to be enabled. + */ +extern void sysclk_enable_module(enum sysclk_port_id port, uint8_t id); + +/** + * \brief Disable the clock to peripheral \a id on port \a port + * + * \param port ID of the port to which the module is connected (one of + * the \c SYSCLK_PORT_* definitions). + * \param id The ID (bitmask) of the peripheral module to be disabled. + */ +extern void sysclk_disable_module(enum sysclk_port_id port, uint8_t id); + +/** + * \brief Enable a peripheral's clock from its base address. + * + * Enables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be enabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_enable_peripheral_clock(const volatile void *module) +{ + if (module == NULL) { + Assert(false); + } +#ifdef AES + else if (module == &AES) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES); + } +#endif +#ifdef EBI + else if (module == &EBI) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EBI); + } +#endif +#ifdef RTC + else if (module == &RTC) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); + } +#endif +#ifdef EVSYS + else if (module == &EVSYS) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS); + } +#endif +#ifdef DMA + else if (module == &DMA) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_DMA); + } +#endif +#ifdef EDMA + else if (module == &EDMA) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA); + } +#endif +#ifdef ACA + else if (module == &ACA) { + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_AC); + } +#endif +#ifdef ACB + else if (module == &ACB) { + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC); + } +#endif +#ifdef ADCA + else if (module == &ADCA) { + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC); + } +#endif +#ifdef ADCB + else if (module == &ADCB) { + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC); + } +#endif +#ifdef DACA + else if (module == &DACA) { + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_DAC); + } +#endif +// Workaround for bad XMEGA D header file +#if !XMEGA_D +#ifdef DACB + else if (module == &DACB) { + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_DAC); + } +#endif +#endif // Workaround end +#ifdef TCC0 + else if (module == &TCC0) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0); + } +#endif +#ifdef TCD0 + else if (module == &TCD0) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC0); + } +#endif +#ifdef TCE0 + else if (module == &TCE0) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC0); + } +#endif +#ifdef TCF0 + else if (module == &TCF0) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC0); + } +#endif +#ifdef TCC1 + else if (module == &TCC1) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC1); + } +#endif +#ifdef TCD1 + else if (module == &TCD1) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC1); + } +#endif +#ifdef TCE1 + else if (module == &TCE1) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC1); + } +#endif +#ifdef TCF1 + else if (module == &TCF1) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC1); + } +#endif +#ifdef TCC4 + else if (module == &TCC4) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC4); + } +#endif +#ifdef TCC5 + else if (module == &TCC5) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC5); + } +#endif +#ifdef TCD4 + else if (module == &TCD4) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC4); + } +#endif +#ifdef TCD5 + else if (module == &TCD5) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC5); + } +#endif +#ifdef HIRESC + else if (module == &HIRESC) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + } +#endif +#ifdef HIRESD + else if (module == &HIRESD) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + } +#endif +#ifdef HIRESE + else if (module == &HIRESE) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + } +#endif +#ifdef HIRESF + else if (module == &HIRESF) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + } +#endif +#ifdef SPIC + else if (module == &SPIC) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_SPI); + } +#endif +#ifdef SPID + else if (module == &SPID) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_SPI); + } +#endif +#ifdef SPIE + else if (module == &SPIE) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_SPI); + } +#endif +#ifdef SPIF + else if (module == &SPIF) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_SPI); + } +#endif +#ifdef USARTC0 + else if (module == &USARTC0) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0); + } +#endif +#ifdef USARTD0 + else if (module == &USARTD0) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART0); + } +#endif +#ifdef USARTE0 + else if (module == &USARTE0) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0); + } +#endif +#ifdef USARTF0 + else if (module == &USARTF0) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0); + } +#endif +#ifdef USARTC1 + else if (module == &USARTC1) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1); + } +#endif +#ifdef USARTD1 + else if (module == &USARTD1) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART1); + } +#endif +#ifdef USARTE1 + else if (module == &USARTE1) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART1); + } +#endif +#ifdef USARTF1 + else if (module == &USARTF1) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART1); + } +#endif +#ifdef TWIC + else if (module == &TWIC) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TWI); + } +#endif +#ifdef TWID + else if (module == &TWID) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TWI); + } +#endif +#ifdef TWIE + else if (module == &TWIE) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TWI); + } +#endif +#ifdef TWIF + else if (module == &TWIF) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TWI); + } +#endif +#ifdef XCL + else if (module == &XCL) { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_XCL); + } +#endif + else { + Assert(false); + } +} + +/** + * \brief Disable a peripheral's clock from its base address. + * + * Disables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be disabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_disable_peripheral_clock(const volatile void *module) +{ + if (module == NULL) { + Assert(false); + } +#ifdef AES + else if (module == &AES) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_AES); + } +#endif +#ifdef EBI + else if (module == &EBI) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EBI); + } +#endif +#ifdef RTC + else if (module == &RTC) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); + } +#endif +#ifdef EVSYS + else if (module == &EVSYS) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS); + } +#endif +#ifdef DMA + else if (module == &DMA) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_DMA); + } +#endif +#ifdef EDMA + else if (module == &EDMA) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA); + } +#endif +#ifdef ACA + else if (module == &ACA) { + sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_AC); + } +#endif +#ifdef ACB + else if (module == &ACB) { + sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_AC); + } +#endif +#ifdef ADCA + else if (module == &ADCA) { + sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_ADC); + } +#endif +#ifdef ADCB + else if (module == &ADCB) { + sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_ADC); + } +#endif +#ifdef DACA + else if (module == &DACA) { + sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_DAC); + } +#endif +// Workaround for bad XMEGA D header file +#if !XMEGA_D +#ifdef DACB + else if (module == &DACB) { + sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_DAC); + } +#endif +#endif // Workaround end +#ifdef TCC0 + else if (module == &TCC0) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC0); + } +#endif +#ifdef TCD0 + else if (module == &TCD0) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC0); + } +#endif +#ifdef TCE0 + else if (module == &TCE0) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC0); + } +#endif +#ifdef TCF0 + else if (module == &TCF0) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC0); + } +#endif +#ifdef TCC1 + else if (module == &TCC1) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC1); + } +#endif +#ifdef TCD1 + else if (module == &TCD1) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC1); + } +#endif +#ifdef TCE1 + else if (module == &TCE1) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC1); + } +#endif +#ifdef TCF1 + else if (module == &TCF1) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC1); + } +#endif +#ifdef TCC4 + else if (module == &TCC4) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC4); + } +#endif +#ifdef TCC5 + else if (module == &TCC5) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC5); + } +#endif +#ifdef TCD4 + else if (module == &TCD4) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC4); + } +#endif +#ifdef TCD5 + else if (module == &TCD5) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC5); + } +#endif +#ifdef HIRESC + else if (module == &HIRESC) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + } +#endif +#ifdef HIRESD + else if (module == &HIRESD) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + } +#endif +#ifdef HIRESE + else if (module == &HIRESE) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + } +#endif +#ifdef HIRESF + else if (module == &HIRESF) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + } +#endif +#ifdef SPIC + else if (module == &SPIC) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_SPI); + } +#endif +#ifdef SPID + else if (module == &SPID) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_SPI); + } +#endif +#ifdef SPIE + else if (module == &SPIE) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_SPI); + } +#endif +#ifdef SPIF + else if (module == &SPIF) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_SPI); + } +#endif +#ifdef USARTC0 + else if (module == &USARTC0) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_USART0); + } +#endif +#ifdef USARTD0 + else if (module == &USARTD0) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_USART0); + } +#endif +#ifdef USARTE0 + else if (module == &USARTE0) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_USART0); + } +#endif +#ifdef USARTF0 + else if (module == &USARTF0) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_USART0); + } +#endif +#ifdef USARTC1 + else if (module == &USARTC1) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_USART1); + } +#endif +#ifdef USARTD1 + else if (module == &USARTD1) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_USART1); + } +#endif +#ifdef USARTE1 + else if (module == &USARTE1) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_USART1); + } +#endif +#ifdef USARTF1 + else if (module == &USARTF1) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_USART1); + } +#endif +#ifdef TWIC + else if (module == &TWIC) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TWI); + } +#endif +#ifdef TWID + else if (module == &TWID) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TWI); + } +#endif +#ifdef TWIE + else if (module == &TWIE) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TWI); + } +#endif +#ifdef TWIF + else if (module == &TWIF) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TWI); + } +#endif +#ifdef XCL + else if (module == &XCL) { + sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_XCL); + } +#endif + else { + Assert(false); + } +} + +/** + * \brief Check if the synchronous clock is enabled for a module + * + * \param port ID of the port to which the module is connected (one of + * the \c SYSCLK_PORT_* definitions). + * \param id The ID (bitmask) of the peripheral module to check (one of + * the \c SYSCLK_* module definitions). + * + * \retval true If the clock for module \a id on \a port is enabled. + * \retval false If the clock for module \a id on \a port is disabled. + */ +static inline bool sysclk_module_is_enabled(enum sysclk_port_id port, + uint8_t id) +{ + uint8_t mask = *((uint8_t *)&PR.PRGEN + port); + return (mask & id) == 0; +} + +#if XMEGA_AU || XMEGA_B || XMEGA_C || defined(__DOXYGEN__) +# if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) +# if (CONFIG_USBCLK_SOURCE == USBCLK_SRC_RCOSC) +# define USBCLK_STARTUP_TIMEOUT 1 +# elif (CONFIG_USBCLK_SOURCE == USBCLK_SRC_PLL) +# if (CONFIG_PLL0_SOURCE == PLL_SRC_XOSC) +# define USBCLK_STARTUP_TIMEOUT XOSC_STARTUP_TIMEOUT +# elif (CONFIG_PLL0_SOURCE == PLL_SRC_RC32MHZ) +# define USBCLK_STARTUP_TIMEOUT 1 +# elif (CONFIG_PLL0_SOURCE == PLL_SRC_RC2MHZ) +# define USBCLK_STARTUP_TIMEOUT 1 +# else +# error Unknow value for CONFIG_PLL0_SOURCE, see conf_clock.h. +# endif +# endif +# else /* CONFIG_USBCLK_SOURCE not defined */ +# define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC +# define USBCLK_STARTUP_TIMEOUT 1 +# endif /* CONFIG_USBCLK_SOURCE */ +void sysclk_enable_usb(uint8_t frequency); +void sysclk_disable_usb(void); +#endif /* XMEGA_AU || XMEGA_B || XMEGA_C */ +//@} + +//! \name System Clock Source and Prescaler configuration +//@{ + +/** + * \brief Set system clock prescaler configuration + * + * This function will change the system clock prescaler configuration to + * match the parameters. + * + * \note The parameters to this function are device-specific. + * + * \param psadiv The prescaler A setting (one of the \c SYSCLK_PSADIV_* + * definitions). This determines the clkPER4 frequency. + * \param psbcdiv The prescaler B and C settings (one of the \c SYSCLK_PSBCDIV_* + * definitions). These determine the clkPER2, clkPER and clkCPU frequencies. + */ +static inline void sysclk_set_prescalers(uint8_t psadiv, uint8_t psbcdiv) +{ + ccp_write_io((uint8_t *)&CLK.PSCTRL, psadiv | psbcdiv); +} + +/** + * \brief Change the source of the main system clock. + * + * \param src The new system clock source. Must be one of the constants + * from the System Clock Sources section. + */ +static inline void sysclk_set_source(uint8_t src) +{ + ccp_write_io((uint8_t *)&CLK.CTRL, src); +} + +/** + * \brief Lock the system clock configuration + * + * This function will lock the current system clock source and prescaler + * configuration, preventing any further changes. + */ +static inline void sysclk_lock(void) +{ + ccp_write_io((uint8_t *)&CLK.LOCK, CLK_LOCK_bm); +} + +//@} + +/** + * \name RTC clock source control + * @{ + */ + +/** + * \brief Enable RTC clock with specified clock source + * + * \param id RTC clock source ID. Select from SYSCLK_RTCSRC_ULP, + * SYSCLK_RTCSRC_RCOSC, SYSCLK_RTCSRC_TOSC, SYSCLK_RTCSRC_RCOSC32, + * SYSCLK_RTCSRC_TOSC32 or SYSCLK_RTCSRC_EXTCLK + */ +static inline void sysclk_rtcsrc_enable(uint8_t id) +{ + Assert((id & ~CLK_RTCSRC_gm) == 0); + + switch (id) { + case SYSCLK_RTCSRC_RCOSC: +#if !XMEGA_A && !XMEGA_D + case SYSCLK_RTCSRC_RCOSC32: +#endif + osc_enable(OSC_ID_RC32KHZ); + osc_wait_ready(OSC_ID_RC32KHZ); + break; + case SYSCLK_RTCSRC_TOSC: + case SYSCLK_RTCSRC_TOSC32: +#if !XMEGA_A && !XMEGA_D + case SYSCLK_RTCSRC_EXTCLK: +#endif + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); + break; + } + + CLK.RTCCTRL = id | CLK_RTCEN_bm; +} + +/** + * \brief Disable RTC clock + */ +static inline void sysclk_rtcsrc_disable(void) +{ + CLK.RTCCTRL = 0; +} + +/** @} */ + +//! \name System Clock Initialization +//@{ + +extern void sysclk_init(void); + +//@} + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* XMEGA_SYSCLK_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/delay/delay.h b/skywave_atxmega128a1_final/src/ASF/common/services/delay/delay.h new file mode 100644 index 0000000..cab97f5 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/delay/delay.h @@ -0,0 +1,139 @@ +/** + * \file + * + * \brief Common Delay Service + * + * Copyright (c) 2014-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _DELAY_H_ +#define _DELAY_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#if UC3 +# include +#elif XMEGA +# include "xmega/cycle_counter.h" +#elif MEGA +# include "mega/cycle_counter.h" +#elif SAM +# include "sam/cycle_counter.h" +#endif + +/** + * @defgroup group_common_services_delay Busy-Wait Delay Routines + * + * This module provides simple loop-based delay routines for those + * applications requiring a brief wait during execution. Common API + * for UC3, XMEGA, and AVR MEGA. + * + * @{ + */ + +/** + * @def F_CPU + * @brief MCU Clock Frequency (Hertz) + * + * @deprecated + * The \ref F_CPU configuration constant is used for compatibility with the + * \ref group_common_services_delay routines. The common loop-based delay + * routines are designed to use the \ref clk_group modules while anticipating + * support for legacy applications assuming a statically defined clock + * frequency. Applications using a statically configured MCU clock frequency + * can define \ref F_CPU (Hertz), in which case the common delay routines will + * use this value rather than calling sysclk_get_cpu_hz() to get the current + * MCU clock frequency. + */ +#ifndef F_CPU +# define F_CPU sysclk_get_cpu_hz() +#endif + +/** + * @def delay_init + * + * @brief Initialize the delay driver. + * @param fcpu_hz CPU frequency in Hz + * + * @deprecated + * This function is provided for compatibility with ASF applications that + * may not have been updated to configure the system clock via the common + * clock service; e.g. sysclk_init() and a configuration header file are + * used to configure clocks. + * + * The functions in this module call \ref sysclk_get_cpu_hz() function to + * obtain the system clock frequency. + */ +#define delay_init(fcpu_hz) + +/** + * @def delay_s + * @brief Delay in seconds. + * @param delay Delay in seconds + */ +#define delay_s(delay) ((delay) ? cpu_delay_ms(1000 * delay, F_CPU) : cpu_delay_us(1, F_CPU)) + +/** + * @def delay_ms + * @brief Delay in milliseconds. + * @param delay Delay in milliseconds + */ +#define delay_ms(delay) ((delay) ? cpu_delay_ms(delay, F_CPU) : cpu_delay_us(1, F_CPU)) + +/** + * @def delay_us + * @brief Delay in microseconds. + * @param delay Delay in microseconds + */ +#define delay_us(delay) ((delay) ? cpu_delay_us(delay, F_CPU) : cpu_delay_us(1, F_CPU)) + +#ifdef __cplusplus +} +#endif + +/** + * @} + */ + +#endif /* _DELAY_H_ */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/delay/xmega/cycle_counter.h b/skywave_atxmega128a1_final/src/ASF/common/services/delay/xmega/cycle_counter.h new file mode 100644 index 0000000..91dc0fc --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/delay/xmega/cycle_counter.h @@ -0,0 +1,119 @@ +/** + * \file + * + * \brief AVR functions for busy-wait delay loops + * + * Copyright (c) 2011-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _CYCLE_COUNTER_H_ +#define _CYCLE_COUNTER_H_ + +#ifdef __cplusplus +extern "C" { +#endif + + +#include + +/** + * @name Convenience functions for busy-wait delay loops + * + * @def delay_cycles + * @brief Delay program execution for a specified number of CPU cycles. + * @param n number of CPU cycles to wait + * + * @def cpu_delay_ms + * @brief Delay program execution for a specified number of milliseconds. + * @param delay number of milliseconds to wait + * @param f_cpu CPU frequency in Hertz + * + * @def cpu_delay_us + * @brief Delay program execution for a specified number of microseconds. + * @param delay number of microseconds to wait + * @param f_cpu CPU frequency in Hertz + * + * @def cpu_ms_2_cy + * @brief Convert milli-seconds into CPU cycles. + * @param ms number of milliseconds + * @param f_cpu CPU frequency in Hertz + * @return the converted number of CPU cycles + * + * @def cpu_us_2_cy + * @brief Convert micro-seconds into CPU cycles. + * @param ms number of microseconds + * @param f_cpu CPU frequency in Hertz + * @return the converted number of CPU cycles + * + * @{ + */ +__always_optimize +static inline void __portable_avr_delay_cycles(unsigned long n) +{ + while (n) { + barrier(); + n--; + } +} + +#if !defined(__DELAY_CYCLE_INTRINSICS__) +# define delay_cycles __portable_avr_delay_cycles +# define cpu_ms_2_cy(ms, f_cpu) (((uint64_t)(ms) * (f_cpu) / 6 + 999) / 1e3) +# define cpu_us_2_cy(us, f_cpu) (((uint64_t)(us) * (f_cpu) / 6 + 999999ul) / 1e6) +#else +# if defined(__GNUC__) +# define delay_cycles __builtin_avr_delay_cycles +# elif defined(__ICCAVR__) +# define delay_cycles __delay_cycles +# endif +# define cpu_ms_2_cy(ms, f_cpu) (((uint64_t)(ms) * (f_cpu) + 999) / 1e3) +# define cpu_us_2_cy(us, f_cpu) (((uint64_t)(us) * (f_cpu) + 999999ul) / 1e6) +#endif + +#define cpu_delay_ms(delay, f_cpu) delay_cycles((uint64_t)cpu_ms_2_cy(delay, f_cpu)) +#define cpu_delay_us(delay, f_cpu) delay_cycles((uint64_t)cpu_us_2_cy(delay, f_cpu)) +//! @} + + +#ifdef __cplusplus +} +#endif + +#endif /* _CYCLE_COUNTER_H_ */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/ioport/ioport.h b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/ioport.h new file mode 100644 index 0000000..ed8db27 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/ioport.h @@ -0,0 +1,548 @@ +/** + * \file + * + * \brief Common IOPORT service main header file for AVR, UC3 and ARM + * architectures. + * + * Copyright (c) 2012-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef IOPORT_H +#define IOPORT_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +/** + * \defgroup ioport_group Common IOPORT API + * + * See \ref ioport_quickstart. + * + * This is common IOPORT service for GPIO pin configuration and control in a + * standardized manner across the MEGA, MEGA_RF, XMEGA, UC3 and ARM devices. + * + * Port pin control code is optimized for each platform, and should produce + * both compact and fast execution times when used with constant values. + * + * \section dependencies Dependencies + * This driver depends on the following modules: + * - \ref sysclk_group for clock speed and functions. + * @{ + */ + +/** + * \def IOPORT_CREATE_PIN(port, pin) + * \brief Create IOPORT pin number + * + * Create a IOPORT pin number for use with the IOPORT functions. + * + * \param port IOPORT port (e.g. PORTA, PA or PIOA depending on chosen + * architecture) + * \param pin IOPORT zero-based index of the I/O pin + */ + +/** \brief IOPORT pin directions */ +enum ioport_direction { + IOPORT_DIR_INPUT, /*!< IOPORT input direction */ + IOPORT_DIR_OUTPUT, /*!< IOPORT output direction */ +}; + +/** \brief IOPORT levels */ +enum ioport_value { + IOPORT_PIN_LEVEL_LOW, /*!< IOPORT pin value low */ + IOPORT_PIN_LEVEL_HIGH, /*!< IOPORT pin value high */ +}; + +#if MEGA_RF +/** \brief IOPORT edge sense modes */ +enum ioport_sense { + IOPORT_SENSE_LEVEL, /*!< IOPORT sense low level */ + IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */ + IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */ + IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */ +}; +#elif SAM && !SAM4L +/** \brief IOPORT edge sense modes */ +enum ioport_sense { + IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */ + IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */ + IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */ + IOPORT_SENSE_LEVEL_LOW, /*!< IOPORT sense low level */ + IOPORT_SENSE_LEVEL_HIGH,/*!< IOPORT sense High level */ +}; +#elif XMEGA +enum ioport_sense { + IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */ + IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */ + IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */ + IOPORT_SENSE_LEVEL_LOW, /*!< IOPORT sense low level */ +}; +#else +enum ioport_sense { + IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */ + IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */ + IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */ +}; +#endif + + +#if XMEGA +# include "xmega/ioport.h" +# if defined(IOPORT_XMEGA_COMPAT) +# include "xmega/ioport_compat.h" +# endif +#elif MEGA +# include "mega/ioport.h" +#elif UC3 +# include "uc3/ioport.h" +#elif SAM +# if SAM4L +# include "sam/ioport_gpio.h" +# elif (SAMD20 | SAMD21 | SAML21) +# include "sam0/ioport.h" +# else +# include "sam/ioport_pio.h" +# endif +#endif + +/** + * \brief Initializes the IOPORT service, ready for use. + * + * This function must be called before using any other functions in the IOPORT + * service. + */ +static inline void ioport_init(void) +{ + arch_ioport_init(); +} + +/** + * \brief Enable an IOPORT pin, based on a pin created with \ref + * IOPORT_CREATE_PIN(). + * + * \param pin IOPORT pin to enable + */ +static inline void ioport_enable_pin(ioport_pin_t pin) +{ + arch_ioport_enable_pin(pin); +} + +/** + * \brief Enable multiple pins in a single IOPORT port. + * + * \param port IOPORT port to enable + * \param mask Mask of pins within the port to enable + */ +static inline void ioport_enable_port(ioport_port_t port, + ioport_port_mask_t mask) +{ + arch_ioport_enable_port(port, mask); +} + +/** + * \brief Disable IOPORT pin, based on a pin created with \ref + * IOPORT_CREATE_PIN(). + * + * \param pin IOPORT pin to disable + */ +static inline void ioport_disable_pin(ioport_pin_t pin) +{ + arch_ioport_disable_pin(pin); +} + +/** + * \brief Disable multiple pins in a single IOPORT port. + * + * \param port IOPORT port to disable + * \param mask Pin mask of pins to disable + */ +static inline void ioport_disable_port(ioport_port_t port, + ioport_port_mask_t mask) +{ + arch_ioport_disable_port(port, mask); +} + +/** + * \brief Set multiple pin modes in a single IOPORT port, such as pull-up, + * pull-down, etc. configuration. + * + * \param port IOPORT port to configure + * \param mask Pin mask of pins to configure + * \param mode Mode masks to configure for the specified pins (\ref + * ioport_modes) + */ +static inline void ioport_set_port_mode(ioport_port_t port, + ioport_port_mask_t mask, ioport_mode_t mode) +{ + arch_ioport_set_port_mode(port, mask, mode); +} + +/** + * \brief Set pin mode for one single IOPORT pin. + * + * \param pin IOPORT pin to configure + * \param mode Mode masks to configure for the specified pin (\ref ioport_modes) + */ +static inline void ioport_set_pin_mode(ioport_pin_t pin, ioport_mode_t mode) +{ + arch_ioport_set_pin_mode(pin, mode); +} + +/** + * \brief Reset multiple pin modes in a specified IOPORT port to defaults. + * + * \param port IOPORT port to configure + * \param mask Mask of pins whose mode configuration is to be reset + */ +static inline void ioport_reset_port_mode(ioport_port_t port, + ioport_port_mask_t mask) +{ + arch_ioport_set_port_mode(port, mask, 0); +} + +/** + * \brief Reset pin mode configuration for a single IOPORT pin + * + * \param pin IOPORT pin to configure + */ +static inline void ioport_reset_pin_mode(ioport_pin_t pin) +{ + arch_ioport_set_pin_mode(pin, 0); +} + +/** + * \brief Set I/O direction for a group of pins in a single IOPORT. + * + * \param port IOPORT port to configure + * \param mask Pin mask of pins to configure + * \param dir Direction to set for the specified pins (\ref ioport_direction) + */ +static inline void ioport_set_port_dir(ioport_port_t port, + ioport_port_mask_t mask, enum ioport_direction dir) +{ + arch_ioport_set_port_dir(port, mask, dir); +} + +/** + * \brief Set direction for a single IOPORT pin. + * + * \param pin IOPORT pin to configure + * \param dir Direction to set for the specified pin (\ref ioport_direction) + */ +static inline void ioport_set_pin_dir(ioport_pin_t pin, + enum ioport_direction dir) +{ + arch_ioport_set_pin_dir(pin, dir); +} + +/** + * \brief Set an IOPORT pin to a specified logical value. + * + * \param pin IOPORT pin to configure + * \param level Logical value of the pin + */ +static inline void ioport_set_pin_level(ioport_pin_t pin, bool level) +{ + arch_ioport_set_pin_level(pin, level); +} + +/** + * \brief Set a group of IOPORT pins in a single port to a specified logical + * value. + * + * \param port IOPORT port to write to + * \param mask Pin mask of pins to modify + * \param level Level of the pins to be modified + */ +static inline void ioport_set_port_level(ioport_port_t port, + ioport_port_mask_t mask, enum ioport_value level) +{ + arch_ioport_set_port_level(port, mask, level); +} + +/** + * \brief Get current value of an IOPORT pin, which has been configured as an + * input. + * + * \param pin IOPORT pin to read + * \return Current logical value of the specified pin + */ +static inline bool ioport_get_pin_level(ioport_pin_t pin) +{ + return arch_ioport_get_pin_level(pin); +} + +/** + * \brief Get current value of several IOPORT pins in a single port, which have + * been configured as an inputs. + * + * \param port IOPORT port to read + * \param mask Pin mask of pins to read + * \return Logical levels of the specified pins from the read port, returned as + * a mask. + */ +static inline ioport_port_mask_t ioport_get_port_level(ioport_pin_t port, + ioport_port_mask_t mask) +{ + return arch_ioport_get_port_level(port, mask); +} + +/** + * \brief Toggle the value of an IOPORT pin, which has previously configured as + * an output. + * + * \param pin IOPORT pin to toggle + */ +static inline void ioport_toggle_pin_level(ioport_pin_t pin) +{ + arch_ioport_toggle_pin_level(pin); +} + +/** + * \brief Toggle the values of several IOPORT pins located in a single port. + * + * \param port IOPORT port to modify + * \param mask Pin mask of pins to toggle + */ +static inline void ioport_toggle_port_level(ioport_port_t port, + ioport_port_mask_t mask) +{ + arch_ioport_toggle_port_level(port, mask); +} + +/** + * \brief Set the pin sense mode of a single IOPORT pin. + * + * \param pin IOPORT pin to configure + * \param pin_sense Edge to sense for the pin (\ref ioport_sense) + */ +static inline void ioport_set_pin_sense_mode(ioport_pin_t pin, + enum ioport_sense pin_sense) +{ + arch_ioport_set_pin_sense_mode(pin, pin_sense); +} + +/** + * \brief Set the pin sense mode of a multiple IOPORT pins on a single port. + * + * \param port IOPORT port to configure + * \param mask Bitmask if pins whose edge sense is to be configured + * \param pin_sense Edge to sense for the pins (\ref ioport_sense) + */ +static inline void ioport_set_port_sense_mode(ioport_port_t port, + ioport_port_mask_t mask, + enum ioport_sense pin_sense) +{ + arch_ioport_set_port_sense_mode(port, mask, pin_sense); +} + +/** + * \brief Convert a pin ID into a its port ID. + * + * \param pin IOPORT pin ID to convert + * \retval Port ID for the given pin ID + */ +static inline ioport_port_t ioport_pin_to_port_id(ioport_pin_t pin) +{ + return arch_ioport_pin_to_port_id(pin); +} + +/** + * \brief Convert a pin ID into a bitmask mask for the given pin on its port. + * + * \param pin IOPORT pin ID to convert + * \retval Bitmask with a bit set that corresponds to the given pin ID in its port + */ +static inline ioport_port_mask_t ioport_pin_to_mask(ioport_pin_t pin) +{ + return arch_ioport_pin_to_mask(pin); +} + +/** @} */ + +/** + * \page ioport_quickstart Quick start guide for the common IOPORT service + * + * This is the quick start guide for the \ref ioport_group, with + * step-by-step instructions on how to configure and use the service in a + * selection of use cases. + * + * The use cases contain several code fragments. The code fragments in the + * steps for setup can be copied into a custom initialization function, while + * the steps for usage can be copied into, e.g., the main application function. + * + * \section ioport_quickstart_basic Basic use case + * In this use case we will configure one IO pin for button input and one for + * LED control. Then it will read the button state and output it on the LED. + * + * \section ioport_quickstart_basic_setup Setup steps + * + * \subsection ioport_quickstart_basic_setup_code Example code + * \code + #define MY_LED IOPORT_CREATE_PIN(PORTA, 5) + #define MY_BUTTON IOPORT_CREATE_PIN(PORTA, 6) + + ioport_init(); + + ioport_set_pin_dir(MY_LED, IOPORT_DIR_OUTPUT); + ioport_set_pin_dir(MY_BUTTON, IOPORT_DIR_INPUT); + ioport_set_pin_mode(MY_BUTTON, IOPORT_MODE_PULLUP); +\endcode + * + * \subsection ioport_quickstart_basic_setup_flow Workflow + * -# It's useful to give the GPIOs symbolic names and this can be done with + * the \ref IOPORT_CREATE_PIN macro. We define one for a LED and one for a + * button. + * - \code + #define MY_LED IOPORT_CREATE_PIN(PORTA, 5) + #define MY_BUTTON IOPORT_CREATE_PIN(PORTA, 6) +\endcode + * - \note The usefulness of the \ref IOPORT_CREATE_PIN macro and port names + * differ between architectures: + * - MEGA, MEGA_RF and XMEGA: Use \ref IOPORT_CREATE_PIN macro with port definitions + * PORTA, PORTB ... + * - UC3: Most convenient to pick up the device header file pin definition + * and us it directly. E.g.: AVR32_PIN_PB06 + * - SAM: Most convenient to pick up the device header file pin definition + * and us it directly. E.g.: PIO_PA5_IDX
+ * \ref IOPORT_CREATE_PIN can also be used with port definitions + * PIOA, PIOB ... + * -# Initialize the ioport service. This typically enables the IO module if + * needed. + * - \code ioport_init(); \endcode + * -# Set the LED GPIO as output: + * - \code ioport_set_pin_dir(MY_LED, IOPORT_DIR_OUTPUT); \endcode + * -# Set the button GPIO as input: + * - \code ioport_set_pin_dir(MY_BUTTON, IOPORT_DIR_INPUT); \endcode + * -# Enable pull-up for the button GPIO: + * - \code ioport_set_pin_mode(MY_BUTTON, IOPORT_MODE_PULLUP); \endcode + * + * \section ioport_quickstart_basic_usage Usage steps + * + * \subsection ioport_quickstart_basic_usage_code Example code + * \code + bool value; + + value = ioport_get_pin_level(MY_BUTTON); + ioport_set_pin_level(MY_LED, value); +\endcode + * + * \subsection ioport_quickstart_basic_usage_flow Workflow + * -# Define a boolean variable for state storage: + * - \code bool value; \endcode + * -# Read out the button level into variable value: + * - \code value = ioport_get_pin_level(MY_BUTTON); \endcode + * -# Set the LED to read out value from the button: + * - \code ioport_set_pin_level(MY_LED, value); \endcode + * + * \section ioport_quickstart_advanced Advanced use cases + * - \subpage ioport_quickstart_use_case_1 : Port access + */ + +/** + * \page ioport_quickstart_use_case_1 Advanced use case doing port access + * + * In this case we will read out the pins from one whole port and write the + * read value to another port. + * + * \section ioport_quickstart_use_case_1_setup Setup steps + * + * \subsection ioport_quickstart_use_case_1_setup_code Example code + * \code + #define IN_PORT IOPORT_PORTA + #define OUT_PORT IOPORT_PORTB + #define MASK 0x00000060 + + ioport_init(); + + ioport_set_port_dir(IN_PORT, MASK, IOPORT_DIR_INPUT); + ioport_set_port_dir(OUT_PORT, MASK, IOPORT_DIR_OUTPUT); +\endcode + * + * \subsection ioport_quickstart_basic_setup_flow Workflow + * -# It's useful to give the ports symbolic names: + * - \code + #define IN_PORT IOPORT_PORTA + #define OUT_PORT IOPORT_PORTB +\endcode + * - \note The port names differ between architectures: + * - MEGA_RF, MEGA and XMEGA: There are predefined names for ports: IOPORT_PORTA, + * IOPORT_PORTB ... + * - UC3: Use the index value of the different IO blocks: 0, 1 ... + * - SAM: There are predefined names for ports: IOPORT_PIOA, IOPORT_PIOB + * ... + * -# Also useful to define a mask for the bits to work with: + * - \code #define MASK 0x00000060 \endcode + * -# Initialize the ioport service. This typically enables the IO module if + * needed. + * - \code ioport_init(); \endcode + * -# Set one of the ports as input: + * - \code ioport_set_pin_dir(IN_PORT, MASK, IOPORT_DIR_INPUT); \endcode + * -# Set the other port as output: + * - \code ioport_set_pin_dir(OUT_PORT, MASK, IOPORT_DIR_OUTPUT); \endcode + * + * \section ioport_quickstart_basic_usage Usage steps + * + * \subsection ioport_quickstart_basic_usage_code Example code + * \code + ioport_port_mask_t value; + + value = ioport_get_port_level(IN_PORT, MASK); + ioport_set_port_level(OUT_PORT, MASK, value); +\endcode + * + * \subsection ioport_quickstart_basic_usage_flow Workflow + * -# Define a variable for port date storage: + * - \code ioport_port_mask_t value; \endcode + * -# Read out from one port: + * - \code value = ioport_get_port_level(IN_PORT, MASK); \endcode + * -# Put the read data out on the other port: + * - \code ioport_set_port_level(OUT_PORT, MASK, value); \endcode + */ + +#ifdef __cplusplus +} +#endif + +#endif /* IOPORT_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport.h b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport.h new file mode 100644 index 0000000..0c41d5d --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport.h @@ -0,0 +1,364 @@ +/** + * \file + * + * \brief XMEGA architecture specific IOPORT service implementation header file. + * + * Copyright (c) 2012-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef IOPORT_XMEGA_H +#define IOPORT_XMEGA_H + +#define IOPORT_CREATE_PIN(port, pin) ((IOPORT_ ## port) * 8 + (pin)) +#define IOPORT_BASE_ADDRESS 0x600 +#define IOPORT_PORT_OFFSET 0x20 + +/** \name IOPORT port numbers */ +/** @{ */ +#if !XMEGA_B3 +# define IOPORT_PORTA 0 +#endif + +#define IOPORT_PORTB 1 +#define IOPORT_PORTC 2 +#define IOPORT_PORTD 3 + +#if !XMEGA_B3 +# define IOPORT_PORTE 4 +#endif + +#if XMEGA_A1 || XMEGA_A1U || XMEGA_A3 || XMEGA_A3U || XMEGA_A3B || XMEGA_A3BU || \ + XMEGA_C3 || XMEGA_D3 +# define IOPORT_PORTF 5 +#endif + +#if XMEGA_B1 || XMEGA_B3 +# define IOPORT_PORTG 6 +#endif + +#if XMEGA_A1 || XMEGA_A1U +# define IOPORT_PORTH 7 +# define IOPORT_PORTJ 8 +# define IOPORT_PORTK 9 +#endif + +#if XMEGA_B1 || XMEGA_B3 +# define IOPORT_PORTM 11 +#endif + +#if XMEGA_A1 || XMEGA_A1U +# define IOPORT_PORTQ 14 +#endif + +#define IOPORT_PORTR 15 +/** @} */ + +/** + * \weakgroup ioport_group + * \section ioport_modes IOPORT Modes + * + * For details on these please see the XMEGA Manual. + * + * @{ + */ + +/** \name IOPORT Mode bit definitions */ +/** @{ */ +#define IOPORT_MODE_TOTEM (0x00 << 3) /*!< Totem-pole */ +#define IOPORT_MODE_BUSKEEPER (0x01 << 3) /*!< Buskeeper */ +#define IOPORT_MODE_PULLDOWN (0x02 << 3) /*!< Pull-down */ +#define IOPORT_MODE_PULLUP (0x03 << 3) /*!< Pull-up */ +#define IOPORT_MODE_WIREDOR (0x04 << 3) /*!< Wired OR */ +#define IOPORT_MODE_WIREDAND (0x05 << 3) /*!< Wired AND */ +#define IOPORT_MODE_WIREDORPULL (0x06 << 3) /*!< Wired OR with pull-down */ +#define IOPORT_MODE_WIREDANDPULL (0x07 << 3) /*!< Wired AND with pull-up */ +#define IOPORT_MODE_INVERT_PIN (0x01 << 6) /*!< Invert output and input */ +#define IOPORT_MODE_SLEW_RATE_LIMIT (0x01 << 7) /*!< Slew rate limiting */ +/** @} */ + +/** @} */ + +typedef uint8_t ioport_mode_t; +typedef uint8_t ioport_pin_t; +typedef uint8_t ioport_port_t; +typedef uint8_t ioport_port_mask_t; + +__always_inline static ioport_port_t arch_ioport_pin_to_port_id(ioport_pin_t pin) +{ + return pin >> 3; +} + +__always_inline static PORT_t *arch_ioport_port_to_base(ioport_port_t port) +{ + return (PORT_t *)((uintptr_t)IOPORT_BASE_ADDRESS + + (port * IOPORT_PORT_OFFSET)); +} + +__always_inline static PORT_t *arch_ioport_pin_to_base(ioport_pin_t pin) +{ + return arch_ioport_port_to_base(arch_ioport_pin_to_port_id(pin)); +} + +__always_inline static ioport_port_mask_t arch_ioport_pin_to_mask( + ioport_pin_t pin) +{ + return 1U << (pin & 0x07); +} + +__always_inline static ioport_port_mask_t arch_ioport_pin_to_index( + ioport_pin_t pin) +{ + return (pin & 0x07); +} + +__always_inline static void arch_ioport_init(void) +{ +} + +__always_inline static void arch_ioport_enable_port(ioport_port_t port, + ioport_port_mask_t mask) +{ + PORT_t *base = arch_ioport_port_to_base(port); + volatile uint8_t *pin_ctrl = &base->PIN0CTRL; + + uint8_t flags = cpu_irq_save(); + + for (uint8_t i = 0; i < 8; i++) { + if (mask & arch_ioport_pin_to_mask(i)) { + pin_ctrl[i] &= ~PORT_ISC_gm; + } + } + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_enable_pin(ioport_pin_t pin) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + volatile uint8_t *pin_ctrl + = (&base->PIN0CTRL + arch_ioport_pin_to_index(pin)); + + uint8_t flags = cpu_irq_save(); + + *pin_ctrl &= ~PORT_ISC_gm; + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_disable_port(ioport_port_t port, + ioport_port_mask_t mask) +{ + PORT_t *base = arch_ioport_port_to_base(port); + volatile uint8_t *pin_ctrl = &base->PIN0CTRL; + + uint8_t flags = cpu_irq_save(); + + for (uint8_t i = 0; i < 8; i++) { + if (mask & arch_ioport_pin_to_mask(i)) { + pin_ctrl[i] |= PORT_ISC_INPUT_DISABLE_gc; + } + } + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_disable_pin(ioport_pin_t pin) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + volatile uint8_t *pin_ctrl + = (&base->PIN0CTRL + arch_ioport_pin_to_index(pin)); + + uint8_t flags = cpu_irq_save(); + + *pin_ctrl |= PORT_ISC_INPUT_DISABLE_gc; + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_set_port_mode(ioport_port_t port, + ioport_port_mask_t mask, ioport_mode_t mode) +{ + PORT_t *base = arch_ioport_port_to_base(port); + volatile uint8_t *pin_ctrl = &base->PIN0CTRL; + uint8_t new_mode_bits = (mode & ~PORT_ISC_gm); + + uint8_t flags = cpu_irq_save(); + + for (uint8_t i = 0; i < 8; i++) { + if (mask & arch_ioport_pin_to_mask(i)) { + pin_ctrl[i] + = (pin_ctrl[i] & + PORT_ISC_gm) | new_mode_bits; + } + } + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_set_pin_mode(ioport_pin_t pin, + ioport_mode_t mode) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + volatile uint8_t *pin_ctrl + = (&base->PIN0CTRL + arch_ioport_pin_to_index(pin)); + + uint8_t flags = cpu_irq_save(); + + *pin_ctrl &= PORT_ISC_gm; + *pin_ctrl |= mode; + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_set_port_dir(ioport_port_t port, + ioport_port_mask_t mask, enum ioport_direction dir) +{ + PORT_t *base = arch_ioport_port_to_base(port); + + if (dir == IOPORT_DIR_OUTPUT) { + base->DIRSET = mask; + } else if (dir == IOPORT_DIR_INPUT) { + base->DIRCLR = mask; + } +} + +__always_inline static void arch_ioport_set_pin_dir(ioport_pin_t pin, + enum ioport_direction dir) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + + if (dir == IOPORT_DIR_OUTPUT) { + base->DIRSET = arch_ioport_pin_to_mask(pin); + } else if (dir == IOPORT_DIR_INPUT) { + base->DIRCLR = arch_ioport_pin_to_mask(pin); + } +} + +__always_inline static void arch_ioport_set_pin_level(ioport_pin_t pin, + bool level) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + + if (level) { + base->OUTSET = arch_ioport_pin_to_mask(pin); + } else { + base->OUTCLR = arch_ioport_pin_to_mask(pin); + } +} + +__always_inline static void arch_ioport_set_port_level(ioport_port_t port, + ioport_port_mask_t mask, enum ioport_value level) +{ + PORT_t *base = arch_ioport_port_to_base(port); + if (level) { + base->OUTSET |= mask; + base->OUTCLR &= ~mask; + } else { + base->OUTSET &= ~mask; + base->OUTCLR |= mask; + } +} + +__always_inline static bool arch_ioport_get_pin_level(ioport_pin_t pin) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + + return base->IN & arch_ioport_pin_to_mask(pin); +} + +__always_inline static ioport_port_mask_t arch_ioport_get_port_level( + ioport_port_t port, ioport_port_mask_t mask) +{ + PORT_t *base = arch_ioport_port_to_base(port); + + return base->IN & mask; +} + +__always_inline static void arch_ioport_toggle_pin_level(ioport_pin_t pin) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + + base->OUTTGL = arch_ioport_pin_to_mask(pin); +} + +__always_inline static void arch_ioport_toggle_port_level(ioport_port_t port, + ioport_port_mask_t mask) +{ + PORT_t *base = arch_ioport_port_to_base(port); + + base->OUTTGL = mask; +} + +__always_inline static void arch_ioport_set_pin_sense_mode(ioport_pin_t pin, + enum ioport_sense pin_sense) +{ + PORT_t *base = arch_ioport_pin_to_base(pin); + volatile uint8_t *pin_ctrl + = (&base->PIN0CTRL + arch_ioport_pin_to_index(pin)); + + uint8_t flags = cpu_irq_save(); + + *pin_ctrl &= ~PORT_ISC_gm; + *pin_ctrl |= (pin_sense & PORT_ISC_gm); + + cpu_irq_restore(flags); +} + +__always_inline static void arch_ioport_set_port_sense_mode(ioport_port_t port, + ioport_port_mask_t mask, enum ioport_sense pin_sense) +{ + PORT_t *base = arch_ioport_port_to_base(port); + volatile uint8_t *pin_ctrl = &base->PIN0CTRL; + uint8_t new_sense_bits = (pin_sense & PORT_ISC_gm); + + uint8_t flags = cpu_irq_save(); + + for (uint8_t i = 0; i < 8; i++) { + if (mask & arch_ioport_pin_to_mask(i)) { + pin_ctrl[i] + = (pin_ctrl[i] & + ~PORT_ISC_gm) | new_sense_bits; + } + } + + cpu_irq_restore(flags); +} + +#endif /* IOPORT_XMEGA_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport_compat.c b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport_compat.c new file mode 100644 index 0000000..ce47189 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport_compat.c @@ -0,0 +1,73 @@ +/** + * \file + * + * \brief XMEGA legacy IOPORT software compatibility driver interface. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include "ioport_compat.h" + +#if defined(IOPORT_XMEGA_COMPAT) +void ioport_configure_port_pin(void *port, pin_mask_t pin_mask, + port_pin_flags_t flags) +{ + uint8_t pin; + + for (pin = 0; pin < 8; pin++) { + if (pin_mask & (1 << pin)) { + *((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8; + } + } + /* Select direction and initial pin state */ + if (flags & IOPORT_DIR_OUTPUT) { + if (flags & IOPORT_INIT_HIGH) { + *((uint8_t *)port + PORT_OUTSET) = pin_mask; + } else { + *((uint8_t *)port + PORT_OUTCLR) = pin_mask; + } + + *((uint8_t *)port + PORT_DIRSET) = pin_mask; + } else { + *((uint8_t *)port + PORT_DIRCLR) = pin_mask; + } +} + +#endif diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport_compat.h b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport_compat.h new file mode 100644 index 0000000..aaba63f --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/ioport/xmega/ioport_compat.h @@ -0,0 +1,321 @@ +/** + * \file + * + * \brief XMEGA legacy IOPORT software compatibility driver interface header + * file. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef IOPORT_XMEGA_COMPAT_H_ +#define IOPORT_XMEGA_COMPAT_H_ + +#include "../ioport.h" + +/** + * \brief A pin mask + * + * This type is used to describe the port pin mask on the part. + */ +typedef uint8_t pin_mask_t; + +/** + * \brief A PORT pin + * + * This type is used to describe the PORT pins on the part. + */ +typedef uint8_t port_pin_t; + +/** + * \brief Pin configuration flags + * + * This is a bitmask containing configuration flags for the pins that shall be + * configured. + */ +typedef uint16_t port_pin_flags_t; + +/** + * \brief A port id + * + * This type is used to describe the port id on the part (0 is PORTA). + */ +typedef uint8_t port_id_t; + +/** \name Initial Output State Flags */ +/** @{ */ +#define IOPORT_INIT_LOW (0 << 1) /*!< Initial Output State Low */ +#define IOPORT_INIT_HIGH (1 << 1) /*!< Initial Output State High */ +/** @} */ + +/** \name Input/Sense Configuration Flags */ +/** @{ */ +#define IOPORT_BOTHEDGES (0 << 8) /*!< Sense Both Edges */ +#define IOPORT_RISING (1 << 8) /*!< Sense Rising Edge */ +#define IOPORT_FALLING (2 << 8) /*!< Sense Falling Edge */ +#define IOPORT_LEVEL (3 << 8) /*!< Sense Low Level */ +#if XMEGA_E +# define IOPORT_FORCE_ENABLE (6 << 8) /*!< Sense Force Input Enable Low Level */ +#endif +#define IOPORT_INPUT_DISABLE (7 << 8) /*!< Input Buffer Disabled */ +/** @} */ + +/** \name Output and Pull Configuration Flags */ +/** @{ */ +#define IOPORT_TOTEM (0 << 11) /*!< Normal push/pull output */ +#define IOPORT_BUSKEEPER (1 << 11) /*!< Bus Keeper */ +#define IOPORT_PULL_DOWN (2 << 11) /*!< Pull-Down (when input) */ +#define IOPORT_PULL_UP (3 << 11) /*!< Pull-Up (when input) */ +#define IOPORT_WIRED_OR (4 << 11) /*!< Wired OR */ +#define IOPORT_WIRED_AND (5 << 11) /*!< Wired AND */ +#define IOPORT_WIRED_OR_PULL_DOWN (6 << 11) /*!< Wired OR and Pull-Down */ +#define IOPORT_WIRED_AND_PULL_UP (7 << 11) /*!< Wired AND and Pull-Up */ +/** @} */ + +/** \name Inverted I/O Configuration Flags */ +/** @{ */ +#define IOPORT_INV_ENABLED (1 << 14) /*!< I/O is Inverted */ +#define IOPORT_INV_DISABLE (0 << 14) /*!< I/O is Not Inverted */ +/** @} */ + +/** \name Slew Rate Limit Configuration Flags */ +/** @{ */ +#define IOPORT_SRL_ENABLED (1 << 15) /*!< Slew Rate Limit Enabled */ +#define IOPORT_SRL_DISABLED (0 << 15) /*!< Slew Rate Limit Disabled */ +/** @} */ + +/** + * \internal + * \name PORT fields structure offset + * + * These macros are used to compute the field offset number with the PORT_t + * structure. + */ +/** @{ */ +#define PORT_DIR 0x00 /*!< Data Direction */ +#define PORT_DIRSET 0x01 /*!< Data Direction Set */ +#define PORT_DIRCLR 0x02 /*!< Data Direction Clear */ +#define PORT_DIRTGL 0x03 /*!< Data Direction Toggle */ +#define PORT_OUT 0x04 /*!< Data Output Value */ +#define PORT_OUTSET 0x05 /*!< Data Output Value Set */ +#define PORT_OUTCLR 0x06 /*!< Data Output Value Clear */ +#define PORT_OUTTGL 0x07 /*!< Data Output Value Toggle */ +#define PORT_IN 0x08 /*!< Data Input Value */ +#define PORT_INTCTRL 0x09 /*!< Interrupt Control */ +#define PORT_INT0MASK 0x0A /*!< Interrupt 0 Mask */ +#define PORT_INT1MASK 0x0B /*!< Interrupt 1 Mask */ +#define PORT_INTFLAGS 0x0C /*!< Interrupt Flags */ +#define PORT_PIN0CTRL 0x10 /*!< Pin 0 Configuration */ +#define PORT_PIN1CTRL 0x11 /*!< Pin 1 Configuration */ +#define PORT_PIN2CTRL 0x12 /*!< Pin 2 Configuration */ +#define PORT_PIN3CTRL 0x13 /*!< Pin 3 Configuration */ +#define PORT_PIN4CTRL 0x14 /*!< Pin 4 Configuration */ +#define PORT_PIN5CTRL 0x15 /*!< Pin 5 Configuration */ +#define PORT_PIN6CTRL 0x16 /*!< Pin 6 Configuration */ +#define PORT_PIN7CTRL 0x17 /*!< Pin 7 Configuration */ +/** @} */ + +static inline PORT_t *ioport_pin_to_port(port_pin_t pin) +{ + return arch_ioport_pin_to_base(pin); +} + +static inline PORT_t *ioport_id_pin_to_port(port_id_t port) +{ + return arch_ioport_port_to_base(port); +} + +/** + * \brief Configure the IO PORT pin function for a set of pins on a port + * + * \param port Pointer to the port + * \param pin_mask Mask containing the pins that should be configured + * \param flags Bitmask of flags specifying additional configuration + * parameters. + */ +void ioport_configure_port_pin(void *port, pin_mask_t pin_mask, + port_pin_flags_t flags); + +/** + * \brief Select the port function for a single pin + * + * \param pin The pin to configure + * \param flags Bitmask of flags specifying additional configuration + * parameters. + */ +static inline void ioport_configure_pin(port_pin_t pin, port_pin_flags_t flags) +{ + ioport_configure_port_pin(arch_ioport_pin_to_base(pin), + arch_ioport_pin_to_mask(pin), flags); +} + +/** + * \brief Configure a group of I/O pins on a specified port number + * + * \param port The port number + * \param pin_mask The pin mask to configure + * \param flags Bitmask of flags specifying additional configuration + * parameters. + */ +static inline void ioport_configure_group(port_id_t port, pin_mask_t pin_mask, + port_pin_flags_t flags) +{ + ioport_configure_port_pin(arch_ioport_port_to_base(port), pin_mask, flags); +} + +/** + * \brief Drive a PORT pin to a given state + * + * This function will only have an effect if \a pin is configured as + * an output. + * + * \param pin A number identifying the pin to act on. + * \param value The desired state of the pin. \a true means drive the + * pin high (towards Vdd), while \a false means drive the pin low + * (towards Vss). + */ +static inline void ioport_set_value(port_pin_t pin, bool value) +{ + arch_ioport_set_pin_level(pin, value); +} + +/** + * \brief Drive a PORT pin to a low level + * + * This function will only have an effect if \a pin is configured as + * an output. + * + * \param pin A number identifying the pin to act on. + */ +static inline void ioport_set_pin_low(port_pin_t pin) +{ + arch_ioport_set_pin_level(pin, false); +} + +/** + * \brief Drive a PORT pin to a high level + * + * This function will only have an effect if \a pin is configured as + * an output. + * + * \param pin A number identifying the pin to act on. + */ +static inline void ioport_set_pin_high(port_pin_t pin) +{ + arch_ioport_set_pin_level(pin, true); +} + +/** + * \brief Read the current state of a PORT pin + * + * \param pin A number identifying the pin to read. + * \retval true The pin is currently high (close to Vdd) + * \retval false The pin is currently low (close to Vss) + */ +static inline bool ioport_get_value(port_pin_t pin) +{ + return arch_ioport_get_pin_level(pin); +} + +/** + * \brief Read the current state of a PORT pin and test high level + * + * \param pin A number identifying the pin to read. + * \retval true The pin is currently high (close to Vdd) + * \retval false The pin is currently low (close to Vss) + */ +static inline bool ioport_pin_is_high(port_pin_t pin) +{ + return (arch_ioport_get_pin_level(pin) == true); +} + +/** + * \brief Read the current state of a PORT pin and test high level + * + * \param pin A number identifying the pin to read. + * \retval true The pin is currently high (close to Vdd) + * \retval false The pin is currently low (close to Vss) + */ +static inline bool ioport_pin_is_low(port_pin_t pin) +{ + return (arch_ioport_get_pin_level(pin) == false); +} + +/** + * \brief Toggle the current state of a PORT pin + * + * \param pin A number identifying the pin to act on. + */ +static inline void ioport_toggle_pin(port_pin_t pin) +{ + arch_ioport_toggle_pin_level(pin); +} + +/*! \brief Drives a group of I/O pin of a port to high level. + * + * \param port_id The port number. + * \param port_mask The mask. + */ +static inline void ioport_set_group_high(port_id_t port_id, + pin_mask_t port_mask) +{ + arch_ioport_set_port_level(port_id, port_mask, port_mask); +} + +/*! \brief Drives a group of I/O pin of a port to low level. + * + * \param port_id The port number. + * \param port_mask The mask. + */ +static inline void ioport_set_group_low(port_id_t port_id, pin_mask_t port_mask) +{ + arch_ioport_set_port_level(port_id, port_mask, 0); +} + +/*! \brief Toggles a group of I/O pin of a port. + * + * \param port_id The port number. + * \param port_mask The mask. + */ +static inline void ioport_tgl_group(port_id_t port_id, pin_mask_t port_mask) +{ + arch_ioport_toggle_port_level(port_id, port_mask); +} + +#endif /* IOPORT_COMPAT_H_ */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/serial/serial.h b/skywave_atxmega128a1_final/src/ASF/common/services/serial/serial.h new file mode 100644 index 0000000..df0ae23 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/serial/serial.h @@ -0,0 +1,279 @@ +/** + * \file + * + * \brief Serial Mode management + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef SERIAL_H_INCLUDED +#define SERIAL_H_INCLUDED + +#include +#include "status_codes.h" + +/** + * \typedef usart_if + * + * This type can be used independently to refer to USART module for the + * architecture used. It refers to the correct type definition for the + * architecture, ie. USART_t* for XMEGA or avr32_usart_t* for UC3. + */ + +#if XMEGA +# include "xmega_usart/usart_serial.h" +#elif MEGA_RF +# include "megarf_usart/usart_serial.h" +#elif UC3 +# include "uc3_usart/usart_serial.h" +#elif (SAMB) +#include "samb_uart/uart_serial.h" +#elif (SAM0) +#include "sam0_usart/usart_serial.h" +#elif SAM +# include "sam_uart/uart_serial.h" +#else +# error Unsupported chip type +#endif + +/** + * + * \defgroup serial_group Serial Interface (Serial) + * + * See \ref serial_quickstart. + * + * This is the common API for serial interface. Additional features are available + * in the documentation of the specific modules. + * + * \section serial_group_platform Platform Dependencies + * + * The serial API is partially chip- or platform-specific. While all + * platforms provide mostly the same functionality, there are some + * variations around how different bus types and clock tree structures + * are handled. + * + * The following functions are available on all platforms, but there may + * be variations in the function signature (i.e. parameters) and + * behaviour. These functions are typically called by platform-specific + * parts of drivers, and applications that aren't intended to be + * portable: + * - usart_serial_init() + * - usart_serial_putchar() + * - usart_serial_getchar() + * - usart_serial_write_packet() + * - usart_serial_read_packet() + * + * + * @{ + */ + +//! @} + +/** + * \page serial_quickstart Quick start guide for Serial Interface service + * + * This is the quick start guide for the \ref serial_group "Serial Interface module", with + * step-by-step instructions on how to configure and use the serial in a + * selection of use cases. + * + * The use cases contain several code fragments. The code fragments in the + * steps for setup can be copied into a custom initialization function, while + * the steps for usage can be copied into, e.g., the main application function. + * + * \section serial_use_cases Serial use cases + * - \ref serial_basic_use_case + * - \subpage serial_use_case_1 + * + * \section serial_basic_use_case Basic use case - transmit a character + * In this use case, the serial module is configured for: + * - Using USARTD0 + * - Baudrate: 9600 + * - Character length: 8 bit + * - Parity mode: Disabled + * - Stop bit: None + * - RS232 mode + * + * The use case waits for a received character on the configured USART and + * echoes the character back to the same USART. + * + * \section serial_basic_use_case_setup Setup steps + * + * \subsection serial_basic_use_case_setup_prereq Prerequisites + * -# \ref sysclk_group "System Clock Management (sysclk)" + * + * \subsection serial_basic_use_case_setup_code Example code + * The following configuration must be added to the project (typically to a + * conf_uart_serial.h file, but it can also be added to your main application file.) + * + * \note The following takes SAM3X configuration for example, other devices have similar + * configuration, but their parameters may be different, refer to corresponding header files. + * + * \code + #define USART_SERIAL &USARTD0 + #define USART_SERIAL_BAUDRATE 9600 + #define USART_SERIAL_CHAR_LENGTH US_MR_CHRL_8_BIT + #define USART_SERIAL_PARITY US_MR_PAR_NO + #define USART_SERIAL_STOP_BIT false +\endcode + * + * A variable for the received byte must be added: + * \code uint8_t received_byte; \endcode + * + * Add to application initialization: + * \code + sysclk_init(); + + static usart_serial_options_t usart_options = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; + + usart_serial_init(USART_SERIAL, &usart_options); +\endcode + * + * \subsection serial_basic_use_case_setup_flow Workflow + * -# Initialize system clock: + * - \code sysclk_init(); \endcode + * -# Create serial USART options struct: + * - \code + static usart_serial_options_t usart_options = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; +\endcode + * -# Initialize the serial service: + * - \code usart_serial_init(USART_SERIAL, &usart_options);\endcode + * + * \section serial_basic_use_case_usage Usage steps + * + * \subsection serial_basic_use_case_usage_code Example code + * Add to application C-file: + * \code + usart_serial_getchar(USART_SERIAL, &received_byte); + usart_serial_putchar(USART_SERIAL, received_byte); +\endcode + * + * \subsection serial_basic_use_case_usage_flow Workflow + * -# Wait for reception of a character: + * - \code usart_serial_getchar(USART_SERIAL, &received_byte); \endcode + * -# Echo the character back: + * - \code usart_serial_putchar(USART_SERIAL, received_byte); \endcode + */ + +/** + * \page serial_use_case_1 Advanced use case - Send a packet of serial data + * + * In this use case, the USART module is configured for: + * - Using USARTD0 + * - Baudrate: 9600 + * - Character length: 8 bit + * - Parity mode: Disabled + * - Stop bit: None + * - RS232 mode + * + * The use case sends a string of text through the USART. + * + * \section serial_use_case_1_setup Setup steps + * + * \subsection serial_use_case_1_setup_prereq Prerequisites + * -# \ref sysclk_group "System Clock Management (sysclk)" + * + * \subsection serial_use_case_1_setup_code Example code + * The following configuration must be added to the project (typically to a + * conf_uart_serial.h file, but it can also be added to your main application file.): + * + * \note The following takes SAM3X configuration for example, other devices have similar + * configuration, but their parameters may be different, refer to corresponding header files. + * + * \code + #define USART_SERIAL &USARTD0 + #define USART_SERIAL_BAUDRATE 9600 + #define USART_SERIAL_CHAR_LENGTH US_MR_CHRL_8_BIT + #define USART_SERIAL_PARITY US_MR_PAR_NO + #define USART_SERIAL_STOP_BIT false +\endcode + * + * Add to application initialization: + * \code + sysclk_init(); + + static usart_serial_options_t usart_options = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; + + usart_serial_init(USART_SERIAL, &usart_options); +\endcode + * + * \subsection serial_use_case_1_setup_flow Workflow + * -# Initialize system clock: + * - \code sysclk_init(); \endcode + * -# Create USART options struct: + * - \code + static usart_serial_options_t usart_options = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; +\endcode + * -# Initialize in RS232 mode: + * - \code usart_serial_init(USART_SERIAL_EXAMPLE, &usart_options); \endcode + * + * \section serial_use_case_1_usage Usage steps + * + * \subsection serial_use_case_1_usage_code Example code + * Add to, e.g., main loop in application C-file: + * \code + usart_serial_write_packet(USART_SERIAL, "Test String", strlen("Test String")); +\endcode + * + * \subsection serial_use_case_1_usage_flow Workflow + * -# Write a string of text to the USART: + * - \code usart_serial_write_packet(USART_SERIAL, "Test String", strlen("Test String")); \endcode + */ + +#endif /* SERIAL_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/serial/usart_serial.c b/skywave_atxmega128a1_final/src/ASF/common/services/serial/usart_serial.c new file mode 100644 index 0000000..c67c256 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/serial/usart_serial.c @@ -0,0 +1,87 @@ +/** + * + * \file + * + * \brief USART Serial driver functions. + * + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include "serial.h" + +/** + * \brief Send a sequence of bytes to USART device + * + * \param usart Base address of the USART instance. + * \param data Data buffer to read + * \param len Length of data + * + */ +status_code_t usart_serial_write_packet(usart_if usart, const uint8_t *data, + size_t len) +{ + while (len) { + usart_serial_putchar(usart, *data); + len--; + data++; + } + return STATUS_OK; +} + + +/** + * \brief Receive a sequence of bytes from USART device + * + * \param usart Base address of the USART instance. + * \param data Data buffer to write + * \param len Length of data + * + */ +status_code_t usart_serial_read_packet(usart_if usart, uint8_t *data, + size_t len) +{ + while (len) { + usart_serial_getchar(usart, data); + len--; + data++; + } + return STATUS_OK; +} diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/serial/xmega_usart/usart_serial.h b/skywave_atxmega128a1_final/src/ASF/common/services/serial/xmega_usart/usart_serial.h new file mode 100644 index 0000000..e2560a6 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/serial/xmega_usart/usart_serial.h @@ -0,0 +1,173 @@ +/** + * \file + * + * This file defines a useful set of functions for the Serial interface on AVR + * XMEGA devices. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _USART_SERIAL_H_ +#define _USART_SERIAL_H_ + +#include "compiler.h" +#include "sysclk.h" +#include "status_codes.h" +#include "usart.h" + +/*! \name Serial Management Configuration + */ +//! @{ +#include "conf_usart_serial.h" +//! @} + +typedef usart_rs232_options_t usart_serial_options_t; + +typedef USART_t *usart_if; + +/*! \brief Initializes the Usart in master mode. + * + * \param usart Base address of the USART instance. + * \param options Options needed to set up RS232 communication (see \ref usart_serial_options_t). + * + * \retval true if the initialization was successful + * \retval false if initialization failed (error in baud rate calculation) + */ +static inline bool usart_serial_init(usart_if usart, const + usart_serial_options_t *options) +{ + // USART options. + usart_rs232_options_t usart_rs232_options; + usart_rs232_options.charlength = options->charlength; + usart_rs232_options.paritytype = options->paritytype; + usart_rs232_options.stopbits = options->stopbits; + usart_rs232_options.baudrate = options->baudrate; + +#ifdef USARTC0 + if((uint16_t)usart == (uint16_t)&USARTC0) { + sysclk_enable_module(SYSCLK_PORT_C,PR_USART0_bm); + } +#endif +#ifdef USARTC1 + if((uint16_t)usart == (uint16_t)&USARTC1) { + sysclk_enable_module(SYSCLK_PORT_C,PR_USART1_bm); + } +#endif +#ifdef USARTD0 + if((uint16_t)usart == (uint16_t)&USARTD0) { + sysclk_enable_module(SYSCLK_PORT_D,PR_USART0_bm); + } +#endif +#ifdef USARTD1 + if((uint16_t)usart == (uint16_t)&USARTD1) { + sysclk_enable_module(SYSCLK_PORT_D,PR_USART1_bm); + } +#endif +#ifdef USARTE0 + if((uint16_t)usart == (uint16_t)&USARTE0) { + sysclk_enable_module(SYSCLK_PORT_E,PR_USART0_bm); + } +#endif +#ifdef USARTE1 + if((uint16_t)usart == (uint16_t)&USARTE1) { + sysclk_enable_module(SYSCLK_PORT_E,PR_USART1_bm); + } +#endif +#ifdef USARTF0 + if((uint16_t)usart == (uint16_t)&USARTF0) { + sysclk_enable_module(SYSCLK_PORT_F,PR_USART0_bm); + } +#endif +#ifdef USARTF1 + if((uint16_t)usart == (uint16_t)&USARTF1) { + sysclk_enable_module(SYSCLK_PORT_F,PR_USART1_bm); + } +#endif + if (usart_init_rs232(usart, &usart_rs232_options)) { + return true; + } + else { + return false; + } +} + +/*! \brief Sends a character with the USART. + * + * \param usart Base address of the USART instance. + * \param c Character to write. + * + * \return Status code + */ +static inline enum status_code usart_serial_putchar(usart_if usart, uint8_t c) +{ + return usart_putchar(usart, c); +} +/*! \brief Waits until a character is received, and returns it. + * + * \param usart Base address of the USART instance. + * \param data Data to read + * + */ +static inline void usart_serial_getchar(usart_if usart, uint8_t *data) +{ + *data = usart_getchar(usart); +} + +/** + * \brief Send a sequence of bytes to USART device + * + * \param usart Base address of the USART instance. + * \param data Data buffer to read + * \param len Length of data + * + */ +extern status_code_t usart_serial_write_packet(usart_if usart, const uint8_t *data, size_t len); + +/** + * \brief Receive a sequence of bytes from USART device + * + * \param usart Base address of the USART instance. + * \param data Data buffer to write + * \param len Length of data + * + */ +extern status_code_t usart_serial_read_packet(usart_if usart, uint8_t *data, size_t len); + +#endif // _USART_SERIAL_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/sleepmgr.h b/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/sleepmgr.h new file mode 100644 index 0000000..ae38de1 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/sleepmgr.h @@ -0,0 +1,273 @@ +/** + * \file + * + * \brief Sleep manager + * + * Copyright (c) 2010-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef SLEEPMGR_H +#define SLEEPMGR_H + +#include +#include + +#if (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAMS70 || SAME70) +# include "sam/sleepmgr.h" +#elif XMEGA +# include "xmega/sleepmgr.h" +#elif UC3 +# include "uc3/sleepmgr.h" +#elif SAM4L +# include "sam4l/sleepmgr.h" +#elif MEGA +# include "mega/sleepmgr.h" +#elif (SAMD20 || SAMD21 || SAMR21 || SAMD11 || SAMDA1) +# include "samd/sleepmgr.h" +#elif (SAML21 || SAML22 || SAMR30) +# include "saml/sleepmgr.h" +#elif (SAMC21) +# include "samc/sleepmgr.h" +#else +# error Unsupported device. +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \defgroup sleepmgr_group Sleep manager + * + * The sleep manager is a service for ensuring that the device is not put to + * sleep in deeper sleep modes than the system (e.g., peripheral drivers, + * services or the application) allows at any given time. + * + * It is based on the use of lock counting for the individual sleep modes, and + * will put the device to sleep in the shallowest sleep mode that has a non-zero + * lock count. The drivers/services/application can change these counts by use + * of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode. + * Refer to \ref sleepmgr_mode for a list of the sleep modes available for + * locking, and the device datasheet for information on their effect. + * + * The application must supply the file \ref conf_sleepmgr.h. + * + * For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE + * must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not + * defined, the functions are replaced with dummy functions and no RAM is used. + * + * @{ + */ + +/** + * \def CONFIG_SLEEPMGR_ENABLE + * \brief Configuration symbol for enabling the sleep manager + * + * If this symbol is not defined, the functions of this service are replaced + * with dummy functions. This is useful for reducing code size and execution + * time if the sleep manager is not needed in the application. + * + * This symbol may be defined in \ref conf_sleepmgr.h. + */ +#if defined(__DOXYGEN__) && !defined(CONFIG_SLEEPMGR_ENABLE) +# define CONFIG_SLEEPMGR_ENABLE +#endif + +/** + * \enum sleepmgr_mode + * \brief Sleep mode locks + * + * Identifiers for the different sleep mode locks. + */ + +/** + * \brief Initialize the lock counts + * + * Sets all lock counts to 0, except the very last one, which is set to 1. This + * is done to simplify the algorithm for finding the deepest allowable sleep + * mode in \ref sleepmgr_enter_sleep. + */ +static inline void sleepmgr_init(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t i; + + for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) { + sleepmgr_locks[i] = 0; + } + sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Increase lock count for a sleep mode + * + * Increases the lock count for \a mode to ensure that the sleep manager does + * not put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to lock. + */ +static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + if(sleepmgr_locks[mode] >= 0xff) { + while (true) { + // Warning: maximum value of sleepmgr_locks buffer is no more than 255. + // Check APP or change the data type to uint16_t. + } + } + + // Enter a critical section + flags = cpu_irq_save(); + + ++sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#else + UNUSED(mode); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Decrease lock count for a sleep mode + * + * Decreases the lock count for \a mode. If the lock count reaches 0, the sleep + * manager can put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to unlock. + */ +static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + if(sleepmgr_locks[mode] == 0) { + while (true) { + // Warning: minimum value of sleepmgr_locks buffer is no less than 0. + // Check APP. + } + } + + // Enter a critical section + flags = cpu_irq_save(); + + --sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#else + UNUSED(mode); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + + /** + * \brief Retrieves the deepest allowable sleep mode + * + * Searches through the sleep mode lock counts, starting at the shallowest sleep + * mode, until the first non-zero lock count is found. The deepest allowable + * sleep mode is then returned. + */ +static inline enum sleepmgr_mode sleepmgr_get_sleep_mode(void) +{ + enum sleepmgr_mode sleep_mode = SLEEPMGR_ACTIVE; + +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t *lock_ptr = sleepmgr_locks; + + // Find first non-zero lock count, starting with the shallowest modes. + while (!(*lock_ptr)) { + lock_ptr++; + sleep_mode = (enum sleepmgr_mode)(sleep_mode + 1); + } + + // Catch the case where one too many sleepmgr_unlock_mode() call has been + // performed on the deepest sleep mode. + Assert((uintptr_t)(lock_ptr - sleepmgr_locks) < SLEEPMGR_NR_OF_MODES); + +#endif /* CONFIG_SLEEPMGR_ENABLE */ + + return sleep_mode; +} + +/** + * \fn sleepmgr_enter_sleep + * \brief Go to sleep in the deepest allowed mode + * + * Searches through the sleep mode lock counts, starting at the shallowest sleep + * mode, until the first non-zero lock count is found. The device is then put to + * sleep in the sleep mode that corresponds to the lock. + * + * \note This function enables interrupts before going to sleep, and will leave + * them enabled upon return. This also applies if sleep is skipped due to ACTIVE + * mode being locked. + */ + +static inline void sleepmgr_enter_sleep(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + enum sleepmgr_mode sleep_mode; + + cpu_irq_disable(); + + // Find the deepest allowable sleep mode + sleep_mode = sleepmgr_get_sleep_mode(); + // Return right away if first mode (ACTIVE) is locked. + if (sleep_mode==SLEEPMGR_ACTIVE) { + cpu_irq_enable(); + return; + } + // Enter the deepest allowable sleep mode with interrupts enabled + sleepmgr_sleep(sleep_mode); +#else + cpu_irq_enable(); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* SLEEPMGR_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/xmega/sleepmgr.c b/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/xmega/sleepmgr.c new file mode 100644 index 0000000..0877e28 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/xmega/sleepmgr.c @@ -0,0 +1,61 @@ +/** + * \file + * + * \brief Sleep manager + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include +#include + +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) + +uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES]; + +enum SLEEP_SMODE_enum sleepmgr_configs[SLEEPMGR_NR_OF_MODES] = { + SLEEP_SMODE_IDLE_gc, + SLEEP_SMODE_ESTDBY_gc, + SLEEP_SMODE_PSAVE_gc, + SLEEP_SMODE_STDBY_gc, + SLEEP_SMODE_PDOWN_gc, +}; + +#endif /* CONFIG_SLEEPMGR_ENABLE */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/xmega/sleepmgr.h b/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/xmega/sleepmgr.h new file mode 100644 index 0000000..7ca3227 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/services/sleepmgr/xmega/sleepmgr.h @@ -0,0 +1,117 @@ +/** + * \file + * + * \brief AVR XMEGA Sleep manager implementation + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef XMEGA_SLEEPMGR_H +#define XMEGA_SLEEPMGR_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/** + * \weakgroup sleepmgr_group + * @{ + */ + +enum sleepmgr_mode { + //! Active mode. + SLEEPMGR_ACTIVE = 0, + //! Idle mode. + SLEEPMGR_IDLE, + //! Extended Standby mode. + SLEEPMGR_ESTDBY, + //! Power Save mode. + SLEEPMGR_PSAVE, + //! Standby mode. + SLEEPMGR_STDBY, + //! Power Down mode. + SLEEPMGR_PDOWN, + SLEEPMGR_NR_OF_MODES, +}; + +/** + * \internal + * \name Internal arrays + * @{ + */ +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) +//! Sleep mode lock counters +extern uint8_t sleepmgr_locks[]; +/** + * \brief Look-up table with sleep mode configurations + * \note This is located in program memory (Flash) as it is constant. + */ +extern enum SLEEP_SMODE_enum sleepmgr_configs[]; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +//! @} + +static inline void sleepmgr_sleep(const enum sleepmgr_mode sleep_mode) +{ + Assert(sleep_mode != SLEEPMGR_ACTIVE); +#ifdef CONFIG_SLEEPMGR_ENABLE + sleep_set_mode(sleepmgr_configs[sleep_mode-1]); + sleep_enable(); + + cpu_irq_enable(); + sleep_enter(); + + sleep_disable(); +#else + cpu_irq_enable(); +#endif /* CONFIG_SLEEPMGR_ENABLE */ + +} + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* XMEGA_SLEEPMGR_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/interrupt.h b/skywave_atxmega128a1_final/src/ASF/common/utils/interrupt.h new file mode 100644 index 0000000..a88c6f0 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/interrupt.h @@ -0,0 +1,142 @@ +/** + * \file + * + * \brief Global interrupt management for 8- and 32-bit AVR + * + * Copyright (c) 2010-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef UTILS_INTERRUPT_H +#define UTILS_INTERRUPT_H + +#include + +#if XMEGA || MEGA +# include "interrupt/interrupt_avr8.h" +#elif UC3 +# include "interrupt/interrupt_avr32.h" +#elif SAM || SAMB +# include "interrupt/interrupt_sam_nvic.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup interrupt_group Global interrupt management + * + * This is a driver for global enabling and disabling of interrupts. + * + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * \def CONFIG_INTERRUPT_FORCE_INTC + * \brief Force usage of the ASF INTC driver + * + * Predefine this symbol when preprocessing to force the use of the ASF INTC driver. + * This is useful to ensure compatibility across compilers and shall be used only when required + * by the application needs. + */ +# define CONFIG_INTERRUPT_FORCE_INTC +#endif + +//! \name Global interrupt flags +//@{ +/** + * \typedef irqflags_t + * \brief Type used for holding state of interrupt flag + */ + +/** + * \def cpu_irq_enable + * \brief Enable interrupts globally + */ + +/** + * \def cpu_irq_disable + * \brief Disable interrupts globally + */ + +/** + * \fn irqflags_t cpu_irq_save(void) + * \brief Get and clear the global interrupt flags + * + * Use in conjunction with \ref cpu_irq_restore. + * + * \return Current state of interrupt flags. + * + * \note This function leaves interrupts disabled. + */ + +/** + * \fn void cpu_irq_restore(irqflags_t flags) + * \brief Restore global interrupt flags + * + * Use in conjunction with \ref cpu_irq_save. + * + * \param flags State to set interrupt flag to. + */ + +/** + * \fn bool cpu_irq_is_enabled_flags(irqflags_t flags) + * \brief Check if interrupts are globally enabled in supplied flags + * + * \param flags Currents state of interrupt flags. + * + * \return True if interrupts are enabled. + */ + +/** + * \def cpu_irq_is_enabled + * \brief Check if interrupts are globally enabled + * + * \return True if interrupts are enabled. + */ +//@} + +//! @} + +/** + * \ingroup interrupt_group + * \defgroup interrupt_deprecated_group Deprecated interrupt definitions + */ + +#endif /* UTILS_INTERRUPT_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/interrupt/interrupt_avr8.h b/skywave_atxmega128a1_final/src/ASF/common/utils/interrupt/interrupt_avr8.h new file mode 100644 index 0000000..1e6928c --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/interrupt/interrupt_avr8.h @@ -0,0 +1,148 @@ +/** + * \file + * + * \brief Global interrupt management for 8-bit AVR + * + * Copyright (C) 2010-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef UTILS_INTERRUPT_INTERRUPT_H +#define UTILS_INTERRUPT_INTERRUPT_H + +#include +#include + +/** + * \weakgroup interrupt_group + * + * @{ + */ + +#ifdef ISR_CUSTOM_H +# include ISR_CUSTOM_H +#else + +/** + * \def ISR + * \brief Define service routine for specified interrupt vector + * + * Usage: + * \code + ISR(FOO_vect) + { + ... + } +\endcode + * + * \param vect Interrupt vector name as found in the device header files. + */ +#if defined(__DOXYGEN__) +# define ISR(vect) +#elif defined(__GNUC__) +# include +#elif defined(__ICCAVR__) +# define __ISR(x) _Pragma(#x) +# define ISR(vect) __ISR(vector=vect) __interrupt void handler_##vect(void) +#endif +#endif // ISR_CUSTOM_H + +#if XMEGA +/** + * \brief Initialize interrupt vectors + * Enables all interrupt levels, with vectors located in the application section + * and fixed priority scheduling. + */ +#define irq_initialize_vectors() \ + PMIC.CTRL = PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm; +#elif MEGA_RF +#define irq_initialize_vectors() +#endif + +#ifdef __GNUC__ +# define cpu_irq_enable() sei() +# define cpu_irq_disable() cli() +#else +# define cpu_irq_enable() __enable_interrupt() +# define cpu_irq_disable() __disable_interrupt() +#endif + +typedef uint8_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + volatile irqflags_t flags = SREG; + cpu_irq_disable(); + return flags; +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); + SREG = flags; +} + +static inline bool cpu_irq_is_enabled_flags(irqflags_t flags) +{ +#if XMEGA +# ifdef __GNUC__ + return flags & CPU_I_bm; +# else + return flags & I_bm; +# endif +#elif MEGA || TINY + return flags & (1 << SREG_I); +#endif +} + +#define cpu_irq_is_enabled() cpu_irq_is_enabled_flags(SREG) + +//! @} + +/** + * \weakgroup interrupt_deprecated_group + * @{ + */ +// Deprecated definitions. +#define Enable_global_interrupt() cpu_irq_enable() +#define Disable_global_interrupt() cpu_irq_disable() +#define Is_global_interrupt_enabled() cpu_irq_is_enabled() +//! @} + +#endif /* UTILS_INTERRUPT_INTERRUPT_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/make/Makefile.avr.in b/skywave_atxmega128a1_final/src/ASF/common/utils/make/Makefile.avr.in new file mode 100644 index 0000000..5d9a837 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/make/Makefile.avr.in @@ -0,0 +1,483 @@ +# List of available make goals: +# +# all Default target, builds the project +# clean Clean up the project +# rebuild Rebuild the project +# +# doc Build the documentation +# cleandoc Clean up the documentation +# rebuilddoc Rebuild the documentation +# +# +# Copyright (c) 2009 - 2013 Atmel Corporation. All rights reserved. +# +# \asf_license_start +# +# \page License +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# 3. The name of Atmel may not be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# 4. This software may only be redistributed and used in connection with an +# Atmel microcontroller product. +# +# THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED +# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE +# EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# \asf_license_stop +# + +# Include the config.mk file from the current working path, e.g., where the +# user called make. +include config.mk + +# Tool to use to generate documentation from the source code +DOCGEN ?= doxygen + +# Look for source files relative to the top-level source directory +VPATH := $(PRJ_PATH) + +# Output target file +target := $(TARGET) + +# Output project name (target name minus suffix) +project := $(basename $(target)) + +# Output target file (typically ELF or static library) +ifeq ($(suffix $(target)),.a) +target_type := lib +else +ifeq ($(suffix $(target)),.elf) +target_type := elf +else +$(error "Target type $(target_type) is not supported") +endif +endif + +# Allow override of operating system detection. The user can add OS=Linux or +# OS=Windows on the command line to explicit set the host OS. +# +# This allows to work around broken uname utility on certain systems. +ifdef OS + ifeq ($(strip $(OS)), Linux) + os_type := Linux + endif + ifeq ($(strip $(OS)), Windows) + os_type := windows32_64 + endif +endif + +os_type ?= $(strip $(shell uname)) + +ifeq ($(os_type),windows32) +os := Windows +else +ifeq ($(os_type),windows64) +os := Windows +else +ifeq ($(os_type),windows32_64) +os ?= Windows +else +ifeq ($(os_type),) +os := Windows +else +# Default to Linux style operating system. Both Cygwin and mingw are fully +# compatible (for this Makefile) with Linux. +os := Linux +endif +endif +endif +endif + +# Output documentation directory and configuration file. +docdir := ../doxygen/html +doccfg := ../doxygen/doxyfile.doxygen + +CROSS ?= avr- +AR := $(CROSS)ar +AS := $(CROSS)as +CC := $(CROSS)gcc +CPP := $(CROSS)gcc -E +CXX := $(CROSS)g++ +LD := $(CROSS)gcc +NM := $(CROSS)nm +OBJCOPY := $(CROSS)objcopy +OBJDUMP := $(CROSS)objdump +SIZE := $(CROSS)size + +RM := rm +ifeq ($(os),Windows) +RMDIR := rmdir /S /Q +else +RMDIR := rmdir -p --ignore-fail-on-non-empty +endif + +# On Windows, we need to override the shell to force the use of cmd.exe +ifeq ($(os),Windows) +SHELL := cmd +endif + +# Strings for beautifying output +MSG_CLEAN_FILES = "RM *.o *.d" +MSG_CLEAN_DIRS = "RMDIR $(strip $(clean-dirs))" +MSG_CLEAN_DOC = "RMDIR $(docdir)" +MSG_MKDIR = "MKDIR $(dir $@)" + +MSG_INFO = "INFO " +MSG_PREBUILD = "PREBUILD $(PREBUILD_CMD)" +MSG_POSTBUILD = "POSTBUILD $(POSTBUILD_CMD)" + +MSG_ARCHIVING = "AR $@" +MSG_ASSEMBLING = "AS $@" +MSG_BINARY_IMAGE = "OBJCOPY $@" +MSG_COMPILING = "CC $@" +MSG_COMPILING_CXX = "CXX $@" +MSG_EEPROM_IMAGE = "OBJCOPY $@" +MSG_EXTENDED_LISTING = "OBJDUMP $@" +MSG_IHEX_IMAGE = "OBJCOPY $@" +MSG_LINKING = "LN $@" +MSG_PREPROCESSING = "CPP $@" +MSG_SIZE = "SIZE $@" +MSG_SYMBOL_TABLE = "NM $@" + +MSG_GENERATING_DOC = "DOXYGEN $(docdir)" + +# Don't use make's built-in rules and variables +MAKEFLAGS += -rR + +# Don't print 'Entering directory ...' +MAKEFLAGS += --no-print-directory + +# Function for reversing the order of a list +reverse = $(if $(1),$(call reverse,$(wordlist 2,$(words $(1)),$(1)))) $(firstword $(1)) + +# Hide command output by default, but allow the user to override this +# by adding V=1 on the command line. +# +# This is inspired by the Kbuild system used by the Linux kernel. +ifdef V + ifeq ("$(origin V)", "command line") + VERBOSE = $(V) + endif +endif +ifndef VERBOSE + VERBOSE = 0 +endif + +ifeq ($(VERBOSE), 1) + Q = +else + Q = @ +endif + +arflags-gnu-y := $(ARFLAGS) +asflags-gnu-y := $(ASFLAGS) +cflags-gnu-y := $(CFLAGS) +cxxflags-gnu-y := $(CXXFLAGS) +cppflags-gnu-y := $(CPPFLAGS) +cpuflags-gnu-y := +dbgflags-gnu-y := $(DBGFLAGS) +libflags-gnu-y := $(foreach LIB,$(LIBS),-l$(LIB)) +ldflags-gnu-y := $(LDFLAGS) +flashflags-gnu-y := $(FLASHFLAGS) +eepromflags-gnu-y := $(EEPROMFLAGS) +clean-files := +clean-dirs := + +clean-files += $(wildcard $(target) $(project).map) +clean-files += $(wildcard $(project).hex $(project).eep) +clean-files += $(wildcard $(project).lss $(project).sym) +clean-files += $(wildcard $(build)) + +# Use pipes instead of temporary files for communication between processes +cflags-gnu-y += -pipe +asflags-gnu-y += -pipe +ldflags-gnu-y += -pipe + +# Archiver flags. +arflags-gnu-y += rcs + +# Always enable warnings. And be very careful about implicit +# declarations. +cflags-gnu-y += -Wall -Wstrict-prototypes -Wmissing-prototypes +cflags-gnu-y += -Werror-implicit-function-declaration +cxxflags-gnu-y += -Wall +# IAR doesn't allow arithmetic on void pointers, so warn about that. +cflags-gnu-y += -Wpointer-arith +cxxflags-gnu-y += -Wpointer-arith + +# Preprocessor flags. +cppflags-gnu-y += $(foreach INC,$(addprefix $(PRJ_PATH)/,$(INC_PATH)),-I$(INC)) +asflags-gnu-y += $(foreach INC,$(addprefix $(PRJ_PATH)/,$(INC_PATH)),'-Wa,-I$(INC)') + +# CPU specific flags. +cpuflags-gnu-y += -mmcu=$(MCU) + +# Dependency file flags. +depflags = -MD -MP -MQ $@ + +# Debug specific flags. +ifdef BUILD_DEBUG_LEVEL +dbgflags-gnu-y += -g$(BUILD_DEBUG_LEVEL) +else +dbgflags-gnu-y += -gdwarf-2 +endif + +# Optimization specific flags. +ifdef BUILD_OPTIMIZATION +optflags-gnu-y = -O$(BUILD_OPTIMIZATION) +else +optflags-gnu-y = $(OPTIMIZATION) +endif + +# Relax compilation and linking. +cflags-gnu-y += -mrelax +cxxflags-gnu-y += -mrelax +asflags-gnu-y += -mrelax +ldflags-gnu-y += -Wl,--relax + +# Always preprocess assembler files. +asflags-gnu-y += -x assembler-with-cpp +# Compile C files using the GNU99 standard. +cflags-gnu-y += -std=gnu99 +# Compile C++ files using the GNU++98 standard. +cxxflags-gnu-y += -std=gnu++98 + +# Use unsigned character type when compiling. +cflags-gnu-y += -funsigned-char +cxxflags-gnu-y += -funsigned-char + +# Don't use strict aliasing (very common in embedded applications). +cflags-gnu-y += -fno-strict-aliasing +cxxflags-gnu-y += -fno-strict-aliasing + +# Separate each function and data into its own separate section to allow +# garbage collection of unused sections. +cflags-gnu-y += -ffunction-sections -fdata-sections +cxxflags-gnu-y += -ffunction-sections -fdata-sections + +# Garbage collect unreferred sections when linking. +ldflags-gnu-y += -Wl,--gc-sections + +# Output a link map file and a cross reference table +ldflags-gnu-y += -Wl,-Map=$(project).map,--cref + +# Add library search paths relative to the top level directory. +ldflags-gnu-y += $(foreach _LIB_PATH,$(addprefix $(PRJ_PATH)/,$(LIB_PATH)),-L$(_LIB_PATH)) + +a_flags = $(cpuflags-gnu-y) $(depflags) $(cppflags-gnu-y) $(asflags-gnu-y) -D__ASSEMBLY__ +c_flags = $(cpuflags-gnu-y) $(dbgflags-gnu-y) $(depflags) $(optflags-gnu-y) $(cppflags-gnu-y) $(cflags-gnu-y) +cxx_flags= $(cpuflags-gnu-y) $(dbgflags-gnu-y) $(depflags) $(optflags-gnu-y) $(cppflags-gnu-y) $(cxxflags-gnu-y) +l_flags = $(cpuflags-gnu-y) $(optflags-gnu-y) $(ldflags-gnu-y) +ar_flags = $(arflags-gnu-y) + +# Intel Hex file production flags +flashflags-gnu-y += -R .eeprom -R .usb_descriptor_table + +# Eeprom file production flags +eepromflags-gnu-y += -j .eeprom +eepromflags-gnu-y += --set-section-flags=.eeprom="alloc,load" +eepromflags-gnu-y += --change-section-lma .eeprom=0 + +# Source files list and part informations must already be included before +# running this makefile + +# If a custom build directory is specified, use it -- force trailing / in directory name. +ifdef BUILD_DIR + build-dir := $(dir $(BUILD_DIR))$(if $(notdir $(BUILD_DIR)),$(notdir $(BUILD_DIR))/) +else + build-dir = +endif + +# Create object files list from source files list. +obj-y := $(addprefix $(build-dir), $(addsuffix .o,$(basename $(CSRCS) $(ASSRCS)))) + +# Create dependency files list from source files list. +dep-files := $(wildcard $(foreach f,$(obj-y),$(basename $(f)).d)) + +clean-files += $(wildcard $(obj-y)) +clean-files += $(dep-files) + +clean-dirs += $(call reverse,$(sort $(wildcard $(dir $(obj-y))))) + +# Default target. +.PHONY: all +ifeq ($(target_type),lib) +all: $(target) $(project).lss $(project).sym +else +ifeq ($(target_type),elf) +all: prebuild $(target) $(project).lss $(project).sym $(project).hex $(project).bin postbuild +endif +endif + +prebuild: +ifneq ($(strip $(PREBUILD_CMD)),) + @echo $(MSG_PREBUILD) + $(Q)$(PREBUILD_CMD) +endif + +postbuild: +ifneq ($(strip $(POSTBUILD_CMD)),) + @echo $(MSG_POSTBUILD) + $(Q)$(POSTBUILD_CMD) +endif + +# Clean up the project. +.PHONY: clean +clean: + @$(if $(strip $(clean-files)),echo $(MSG_CLEAN_FILES)) + $(if $(strip $(clean-files)),$(Q)$(RM) $(clean-files),) + @$(if $(strip $(clean-dirs)),echo $(MSG_CLEAN_DIRS)) +# Remove created directories, and make sure we only remove existing +# directories, since recursive rmdir might help us a bit on the way. +ifeq ($(os),Windows) + $(Q)$(if $(strip $(clean-dirs)), \ + $(RMDIR) $(strip $(subst /,\,$(clean-dirs)))) +else + $(Q)$(if $(strip $(clean-dirs)), \ + for directory in $(strip $(clean-dirs)); do \ + if [ -d "$$directory" ]; then \ + $(RMDIR) $$directory; \ + fi \ + done \ + ) +endif + +# Rebuild the project. +.PHONY: rebuild +rebuild: clean all + +.PHONY: objfiles +objfiles: $(obj-y) + +# Create object files from C source files. +$(build-dir)%.o: %.c $(MAKEFILE_PATH) config.mk + $(Q)test -d $(dir $@) || echo $(MSG_MKDIR) +ifeq ($(os),Windows) + $(Q)test -d $(patsubst %/,%,$(dir $@)) || mkdir $(subst /,\,$(dir $@)) +else + $(Q)test -d $(dir $@) || mkdir -p $(dir $@) +endif + @echo $(MSG_COMPILING) + $(Q)$(CC) $(c_flags) -c $< -o $@ + +# Create object files from C++ source files. +$(build-dir)%.o: %.cpp $(MAKEFILE_PATH) config.mk + $(Q)test -d $(dir $@) || echo $(MSG_MKDIR) +ifeq ($(os),Windows) + $(Q)test -d $(patsubst %/,%,$(dir $@)) || mkdir $(subst /,\,$(dir $@)) +else + $(Q)test -d $(dir $@) || mkdir -p $(dir $@) +endif + @echo $(MSG_COMPILING_CXX) + $(Q)$(CXX) $(cxx_flags) -c $< -o $@ + +# Preprocess and assemble: create object files from assembler source files. +$(build-dir)%.o: %.s $(MAKEFILE_PATH) config.mk + $(Q)test -d $(dir $@) || echo $(MSG_MKDIR) +ifeq ($(os),Windows) + $(Q)test -d $(patsubst %/,%,$(dir $@)) || mkdir $(subst /,\,$(dir $@)) +else + $(Q)test -d $(dir $@) || mkdir -p $(dir $@) +endif + @echo $(MSG_ASSEMBLING) + $(Q)$(CC) $(a_flags) -c $< -o $@ + +# Preprocess and assemble: create object files from assembler source files. +$(build-dir)%.o: %.S $(MAKEFILE_PATH) config.mk + $(Q)test -d $(dir $@) || echo $(MSG_MKDIR) +ifeq ($(os),Windows) + $(Q)test -d $(patsubst %/,%,$(dir $@)) || mkdir $(subst /,\,$(dir $@)) +else + $(Q)test -d $(dir $@) || mkdir -p $(dir $@) +endif + @echo $(MSG_ASSEMBLING) + $(Q)$(CC) $(a_flags) -c $< -o $@ + +# Include all dependency files to add depedency to all header files in use. +include $(dep-files) + +ifeq ($(target_type),lib) +# Archive object files into an archive +$(target): $(MAKEFILE_PATH) config.mk $(obj-y) + @echo $(MSG_ARCHIVING) + $(Q)$(AR) $(ar_flags) $@ $(obj-y) + @echo $(MSG_SIZE) + $(Q)$(SIZE) -Bxt $@ +else +ifeq ($(target_type),elf) +# Link the object files into an ELF file. Also make sure the target is rebuilt +# if the common Makefile.avr.in or project config.mk is changed. +$(target): $(MAKEFILE_PATH) config.mk $(obj-y) + @echo $(MSG_LINKING) + $(Q)$(LD) $(l_flags) $(obj-y) $(libflags-gnu-y) -o $@ + @echo $(MSG_SIZE) + $(Q)$(SIZE) -Ax $@ + $(Q)$(SIZE) -Bx $@ +endif +endif + +# Create extended function listing from target output file. +%.lss: $(target) + @echo $(MSG_EXTENDED_LISTING) + $(Q)$(OBJDUMP) -h -S $< > $@ + +# Create symbol table from target output file. +%.sym: $(target) + @echo $(MSG_SYMBOL_TABLE) + $(Q)$(NM) -n $< > $@ + +# Create Intel HEX image from ELF output file. +%.hex: $(target) + @echo $(MSG_IHEX_IMAGE) + $(Q)$(OBJCOPY) -O ihex $(flashflags-gnu-y) $< $@ + +# Create EEPROM Intel HEX image from ELF output file. +%.eep: $(target) + @echo $(MSG_EEPROM_IMAGE) + $(Q)$(OBJCOPY) $(eepromflags-gnu-y) -O ihex $< $@ || exit 0 + +# Create binary image from ELF output file. +%.bin: $(target) + @echo $(MSG_BINARY_IMAGE) + $(Q)$(OBJCOPY) -O binary $< $@ + +# Provide information about the detected host operating system. +.SECONDARY: info-os +info-os: + @echo $(MSG_INFO)$(os) build host detected + +# Build Doxygen generated documentation. +.PHONY: doc +doc: + @echo $(MSG_GENERATING_DOC) + $(Q)cd $(dir $(doccfg)) && $(DOCGEN) $(notdir $(doccfg)) + +# Clean Doxygen generated documentation. +.PHONY: cleandoc +cleandoc: + @$(if $(wildcard $(docdir)),echo $(MSG_CLEAN_DOC)) + $(Q)$(if $(wildcard $(docdir)),$(RM) --recursive $(docdir)) + +# Rebuild the Doxygen generated documentation. +.PHONY: rebuilddoc +rebuilddoc: cleandoc doc diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/parts.h b/skywave_atxmega128a1_final/src/ASF/common/utils/parts.h new file mode 100644 index 0000000..27cbe5f --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/parts.h @@ -0,0 +1,1594 @@ +/** + * \file + * + * \brief Atmel part identification macros + * + * Copyright (C) 2012-2017 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef ATMEL_PARTS_H +#define ATMEL_PARTS_H + +/** + * \defgroup part_macros_group Atmel part identification macros + * + * This collection of macros identify which series and families that the various + * Atmel parts belong to. These can be used to select part-dependent sections of + * code at compile time. + * + * @{ + */ + +/** + * \name Convenience macros for part checking + * @{ + */ +/* ! Check GCC and IAR part definition for 8-bit AVR */ +#define AVR8_PART_IS_DEFINED(part) \ + (defined(__ ## part ## __) || defined(__AVR_ ## part ## __)) + +/* ! Check GCC and IAR part definition for 32-bit AVR */ +#define AVR32_PART_IS_DEFINED(part) \ + (defined(__AT32 ## part ## __) || defined(__AVR32_ ## part ## __)) + +/* ! Check GCC and IAR part definition for SAM */ +#define SAM_PART_IS_DEFINED(part) (defined(__ ## part ## __)) +/** @} */ + +/** + * \defgroup uc3_part_macros_group AVR UC3 parts + * @{ + */ + +/** + * \name AVR UC3 A series + * @{ + */ +#define UC3A0 ( \ + AVR32_PART_IS_DEFINED(UC3A0128) || \ + AVR32_PART_IS_DEFINED(UC3A0256) || \ + AVR32_PART_IS_DEFINED(UC3A0512) \ + ) + +#define UC3A1 ( \ + AVR32_PART_IS_DEFINED(UC3A1128) || \ + AVR32_PART_IS_DEFINED(UC3A1256) || \ + AVR32_PART_IS_DEFINED(UC3A1512) \ + ) + +#define UC3A3 ( \ + AVR32_PART_IS_DEFINED(UC3A364) || \ + AVR32_PART_IS_DEFINED(UC3A364S) || \ + AVR32_PART_IS_DEFINED(UC3A3128) || \ + AVR32_PART_IS_DEFINED(UC3A3128S) || \ + AVR32_PART_IS_DEFINED(UC3A3256) || \ + AVR32_PART_IS_DEFINED(UC3A3256S) \ + ) + +#define UC3A4 ( \ + AVR32_PART_IS_DEFINED(UC3A464) || \ + AVR32_PART_IS_DEFINED(UC3A464S) || \ + AVR32_PART_IS_DEFINED(UC3A4128) || \ + AVR32_PART_IS_DEFINED(UC3A4128S) || \ + AVR32_PART_IS_DEFINED(UC3A4256) || \ + AVR32_PART_IS_DEFINED(UC3A4256S) \ + ) +/** @} */ + +/** + * \name AVR UC3 B series + * @{ + */ +#define UC3B0 ( \ + AVR32_PART_IS_DEFINED(UC3B064) || \ + AVR32_PART_IS_DEFINED(UC3B0128) || \ + AVR32_PART_IS_DEFINED(UC3B0256) || \ + AVR32_PART_IS_DEFINED(UC3B0512) \ + ) + +#define UC3B1 ( \ + AVR32_PART_IS_DEFINED(UC3B164) || \ + AVR32_PART_IS_DEFINED(UC3B1128) || \ + AVR32_PART_IS_DEFINED(UC3B1256) || \ + AVR32_PART_IS_DEFINED(UC3B1512) \ + ) +/** @} */ + +/** + * \name AVR UC3 C series + * @{ + */ +#define UC3C0 ( \ + AVR32_PART_IS_DEFINED(UC3C064C) || \ + AVR32_PART_IS_DEFINED(UC3C0128C) || \ + AVR32_PART_IS_DEFINED(UC3C0256C) || \ + AVR32_PART_IS_DEFINED(UC3C0512C) \ + ) + +#define UC3C1 ( \ + AVR32_PART_IS_DEFINED(UC3C164C) || \ + AVR32_PART_IS_DEFINED(UC3C1128C) || \ + AVR32_PART_IS_DEFINED(UC3C1256C) || \ + AVR32_PART_IS_DEFINED(UC3C1512C) \ + ) + +#define UC3C2 ( \ + AVR32_PART_IS_DEFINED(UC3C264C) || \ + AVR32_PART_IS_DEFINED(UC3C2128C) || \ + AVR32_PART_IS_DEFINED(UC3C2256C) || \ + AVR32_PART_IS_DEFINED(UC3C2512C) \ + ) +/** @} */ + +/** + * \name AVR UC3 D series + * @{ + */ +#define UC3D3 ( \ + AVR32_PART_IS_DEFINED(UC64D3) || \ + AVR32_PART_IS_DEFINED(UC128D3) \ + ) + +#define UC3D4 ( \ + AVR32_PART_IS_DEFINED(UC64D4) || \ + AVR32_PART_IS_DEFINED(UC128D4) \ + ) +/** @} */ + +/** + * \name AVR UC3 L series + * @{ + */ +#define UC3L0 ( \ + AVR32_PART_IS_DEFINED(UC3L016) || \ + AVR32_PART_IS_DEFINED(UC3L032) || \ + AVR32_PART_IS_DEFINED(UC3L064) \ + ) + +#define UC3L0128 ( \ + AVR32_PART_IS_DEFINED(UC3L0128) \ + ) + +#define UC3L0256 ( \ + AVR32_PART_IS_DEFINED(UC3L0256) \ + ) + +#define UC3L3 ( \ + AVR32_PART_IS_DEFINED(UC64L3U) || \ + AVR32_PART_IS_DEFINED(UC128L3U) || \ + AVR32_PART_IS_DEFINED(UC256L3U) \ + ) + +#define UC3L4 ( \ + AVR32_PART_IS_DEFINED(UC64L4U) || \ + AVR32_PART_IS_DEFINED(UC128L4U) || \ + AVR32_PART_IS_DEFINED(UC256L4U) \ + ) + +#define UC3L3_L4 (UC3L3 || UC3L4) +/** @} */ + +/** + * \name AVR UC3 families + * @{ + */ +/** AVR UC3 A family */ +#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4) + +/** AVR UC3 B family */ +#define UC3B (UC3B0 || UC3B1) + +/** AVR UC3 C family */ +#define UC3C (UC3C0 || UC3C1 || UC3C2) + +/** AVR UC3 D family */ +#define UC3D (UC3D3 || UC3D4) + +/** AVR UC3 L family */ +#define UC3L (UC3L0 || UC3L0128 || UC3L0256 || UC3L3_L4) +/** @} */ + +/** AVR UC3 product line */ +#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L) + +/** @} */ + +/** + * \defgroup xmega_part_macros_group AVR XMEGA parts + * @{ + */ + +/** + * \name AVR XMEGA A series + * @{ + */ +#define XMEGA_A1 ( \ + AVR8_PART_IS_DEFINED(ATxmega64A1) || \ + AVR8_PART_IS_DEFINED(ATxmega128A1) \ + ) + +#define XMEGA_A3 ( \ + AVR8_PART_IS_DEFINED(ATxmega64A3) || \ + AVR8_PART_IS_DEFINED(ATxmega128A3) || \ + AVR8_PART_IS_DEFINED(ATxmega192A3) || \ + AVR8_PART_IS_DEFINED(ATxmega256A3) \ + ) + +#define XMEGA_A3B ( \ + AVR8_PART_IS_DEFINED(ATxmega256A3B) \ + ) + +#define XMEGA_A4 ( \ + AVR8_PART_IS_DEFINED(ATxmega16A4) || \ + AVR8_PART_IS_DEFINED(ATxmega32A4) \ + ) +/** @} */ + +/** + * \name AVR XMEGA AU series + * @{ + */ +#define XMEGA_A1U ( \ + AVR8_PART_IS_DEFINED(ATxmega64A1U) || \ + AVR8_PART_IS_DEFINED(ATxmega128A1U) \ + ) + +#define XMEGA_A3U ( \ + AVR8_PART_IS_DEFINED(ATxmega64A3U) || \ + AVR8_PART_IS_DEFINED(ATxmega128A3U) || \ + AVR8_PART_IS_DEFINED(ATxmega192A3U) || \ + AVR8_PART_IS_DEFINED(ATxmega256A3U) \ + ) + +#define XMEGA_A3BU ( \ + AVR8_PART_IS_DEFINED(ATxmega256A3BU) \ + ) + +#define XMEGA_A4U ( \ + AVR8_PART_IS_DEFINED(ATxmega16A4U) || \ + AVR8_PART_IS_DEFINED(ATxmega32A4U) || \ + AVR8_PART_IS_DEFINED(ATxmega64A4U) || \ + AVR8_PART_IS_DEFINED(ATxmega128A4U) \ + ) +/** @} */ + +/** + * \name AVR XMEGA B series + * @{ + */ +#define XMEGA_B1 ( \ + AVR8_PART_IS_DEFINED(ATxmega64B1) || \ + AVR8_PART_IS_DEFINED(ATxmega128B1) \ + ) + +#define XMEGA_B3 ( \ + AVR8_PART_IS_DEFINED(ATxmega64B3) || \ + AVR8_PART_IS_DEFINED(ATxmega128B3) \ + ) +/** @} */ + +/** + * \name AVR XMEGA C series + * @{ + */ +#define XMEGA_C3 ( \ + AVR8_PART_IS_DEFINED(ATxmega384C3) || \ + AVR8_PART_IS_DEFINED(ATxmega256C3) || \ + AVR8_PART_IS_DEFINED(ATxmega192C3) || \ + AVR8_PART_IS_DEFINED(ATxmega128C3) || \ + AVR8_PART_IS_DEFINED(ATxmega64C3) || \ + AVR8_PART_IS_DEFINED(ATxmega32C3) \ + ) + +#define XMEGA_C4 ( \ + AVR8_PART_IS_DEFINED(ATxmega32C4) || \ + AVR8_PART_IS_DEFINED(ATxmega16C4) \ + ) +/** @} */ + +/** + * \name AVR XMEGA D series + * @{ + */ +#define XMEGA_D3 ( \ + AVR8_PART_IS_DEFINED(ATxmega32D3) || \ + AVR8_PART_IS_DEFINED(ATxmega64D3) || \ + AVR8_PART_IS_DEFINED(ATxmega128D3) || \ + AVR8_PART_IS_DEFINED(ATxmega192D3) || \ + AVR8_PART_IS_DEFINED(ATxmega256D3) || \ + AVR8_PART_IS_DEFINED(ATxmega384D3) \ + ) + +#define XMEGA_D4 ( \ + AVR8_PART_IS_DEFINED(ATxmega16D4) || \ + AVR8_PART_IS_DEFINED(ATxmega32D4) || \ + AVR8_PART_IS_DEFINED(ATxmega64D4) || \ + AVR8_PART_IS_DEFINED(ATxmega128D4) \ + ) +/** @} */ + +/** + * \name AVR XMEGA E series + * @{ + */ +#define XMEGA_E5 ( \ + AVR8_PART_IS_DEFINED(ATxmega8E5) || \ + AVR8_PART_IS_DEFINED(ATxmega16E5) || \ + AVR8_PART_IS_DEFINED(ATxmega32E5) \ + ) +/** @} */ + + +/** + * \name AVR XMEGA families + * @{ + */ +/** AVR XMEGA A family */ +#define XMEGA_A (XMEGA_A1 || XMEGA_A3 || XMEGA_A3B || XMEGA_A4) + +/** AVR XMEGA AU family */ +#define XMEGA_AU (XMEGA_A1U || XMEGA_A3U || XMEGA_A3BU || XMEGA_A4U) + +/** AVR XMEGA B family */ +#define XMEGA_B (XMEGA_B1 || XMEGA_B3) + +/** AVR XMEGA C family */ +#define XMEGA_C (XMEGA_C3 || XMEGA_C4) + +/** AVR XMEGA D family */ +#define XMEGA_D (XMEGA_D3 || XMEGA_D4) + +/** AVR XMEGA E family */ +#define XMEGA_E (XMEGA_E5) +/** @} */ + + +/** AVR XMEGA product line */ +#define XMEGA (XMEGA_A || XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E) + +/** @} */ + +/** + * \defgroup mega_part_macros_group megaAVR parts + * + * \note These megaAVR groupings are based on the groups in AVR Libc for the + * part header files. They are not names of official megaAVR device series or + * families. + * + * @{ + */ + +/** + * \name ATmegaxx0/xx1 subgroups + * @{ + */ +#define MEGA_XX0 ( \ + AVR8_PART_IS_DEFINED(ATmega640) || \ + AVR8_PART_IS_DEFINED(ATmega1280) || \ + AVR8_PART_IS_DEFINED(ATmega2560) \ + ) + +#define MEGA_XX1 ( \ + AVR8_PART_IS_DEFINED(ATmega1281) || \ + AVR8_PART_IS_DEFINED(ATmega2561) \ + ) +/** @} */ + +/** + * \name megaAVR groups + * @{ + */ +/** ATmegaxx0/xx1 group */ +#define MEGA_XX0_1 (MEGA_XX0 || MEGA_XX1) + +/** ATmegaxx4 group */ +#define MEGA_XX4 ( \ + AVR8_PART_IS_DEFINED(ATmega164A) || \ + AVR8_PART_IS_DEFINED(ATmega164PA) || \ + AVR8_PART_IS_DEFINED(ATmega324A) || \ + AVR8_PART_IS_DEFINED(ATmega324PA) || \ + AVR8_PART_IS_DEFINED(ATmega324PB) || \ + AVR8_PART_IS_DEFINED(ATmega644) || \ + AVR8_PART_IS_DEFINED(ATmega644A) || \ + AVR8_PART_IS_DEFINED(ATmega644PA) || \ + AVR8_PART_IS_DEFINED(ATmega1284P) || \ + AVR8_PART_IS_DEFINED(ATmega128RFA1) \ + ) + +/** ATmegaxx4 group */ +#define MEGA_XX4_A ( \ + AVR8_PART_IS_DEFINED(ATmega164A) || \ + AVR8_PART_IS_DEFINED(ATmega164PA) || \ + AVR8_PART_IS_DEFINED(ATmega324A) || \ + AVR8_PART_IS_DEFINED(ATmega324PA) || \ + AVR8_PART_IS_DEFINED(ATmega644A) || \ + AVR8_PART_IS_DEFINED(ATmega644PA) || \ + AVR8_PART_IS_DEFINED(ATmega1284P) \ + ) + +/** ATmegaxx8 group */ +#define MEGA_XX8 ( \ + AVR8_PART_IS_DEFINED(ATmega48) || \ + AVR8_PART_IS_DEFINED(ATmega48A) || \ + AVR8_PART_IS_DEFINED(ATmega48PA) || \ + AVR8_PART_IS_DEFINED(ATmega48PB) || \ + AVR8_PART_IS_DEFINED(ATmega88) || \ + AVR8_PART_IS_DEFINED(ATmega88A) || \ + AVR8_PART_IS_DEFINED(ATmega88PA) || \ + AVR8_PART_IS_DEFINED(ATmega88PB) || \ + AVR8_PART_IS_DEFINED(ATmega168) || \ + AVR8_PART_IS_DEFINED(ATmega168A) || \ + AVR8_PART_IS_DEFINED(ATmega168PA) || \ + AVR8_PART_IS_DEFINED(ATmega168PB) || \ + AVR8_PART_IS_DEFINED(ATmega328) || \ + AVR8_PART_IS_DEFINED(ATmega328P) || \ + AVR8_PART_IS_DEFINED(ATmega328PB) \ + ) + +/** ATmegaxx8A/P/PA group */ +#define MEGA_XX8_A ( \ + AVR8_PART_IS_DEFINED(ATmega48A) || \ + AVR8_PART_IS_DEFINED(ATmega48PA) || \ + AVR8_PART_IS_DEFINED(ATmega88A) || \ + AVR8_PART_IS_DEFINED(ATmega88PA) || \ + AVR8_PART_IS_DEFINED(ATmega168A) || \ + AVR8_PART_IS_DEFINED(ATmega168PA) || \ + AVR8_PART_IS_DEFINED(ATmega328P) \ + ) + +/** ATmegaxx group */ +#define MEGA_XX ( \ + AVR8_PART_IS_DEFINED(ATmega16) || \ + AVR8_PART_IS_DEFINED(ATmega16A) || \ + AVR8_PART_IS_DEFINED(ATmega32) || \ + AVR8_PART_IS_DEFINED(ATmega32A) || \ + AVR8_PART_IS_DEFINED(ATmega64) || \ + AVR8_PART_IS_DEFINED(ATmega64A) || \ + AVR8_PART_IS_DEFINED(ATmega128) || \ + AVR8_PART_IS_DEFINED(ATmega128A) \ + ) + +/** ATmegaxxA/P/PA group */ +#define MEGA_XX_A ( \ + AVR8_PART_IS_DEFINED(ATmega16A) || \ + AVR8_PART_IS_DEFINED(ATmega32A) || \ + AVR8_PART_IS_DEFINED(ATmega64A) || \ + AVR8_PART_IS_DEFINED(ATmega128A) \ + ) +/** ATmegaxxRFA1 group */ +#define MEGA_RFA1 ( \ + AVR8_PART_IS_DEFINED(ATmega128RFA1) \ + ) + +/** ATmegaxxRFR2 group */ +#define MEGA_RFR2 ( \ + AVR8_PART_IS_DEFINED(ATmega64RFR2) || \ + AVR8_PART_IS_DEFINED(ATmega128RFR2) || \ + AVR8_PART_IS_DEFINED(ATmega256RFR2) || \ + AVR8_PART_IS_DEFINED(ATmega644RFR2) || \ + AVR8_PART_IS_DEFINED(ATmega1284RFR2) || \ + AVR8_PART_IS_DEFINED(ATmega2564RFR2) \ + ) + + +/** ATmegaxxRFxx group */ +#define MEGA_RF (MEGA_RFA1 || MEGA_RFR2) + +/** + * \name ATmegaxx_un0/un1/un2 subgroups + * @{ + */ +#define MEGA_XX_UN0 ( \ + AVR8_PART_IS_DEFINED(ATmega16) || \ + AVR8_PART_IS_DEFINED(ATmega16A) || \ + AVR8_PART_IS_DEFINED(ATmega32) || \ + AVR8_PART_IS_DEFINED(ATmega32A) \ + ) + +/** ATmegaxx group without power reduction and + * And interrupt sense register. + */ +#define MEGA_XX_UN1 ( \ + AVR8_PART_IS_DEFINED(ATmega64) || \ + AVR8_PART_IS_DEFINED(ATmega64A) || \ + AVR8_PART_IS_DEFINED(ATmega128) || \ + AVR8_PART_IS_DEFINED(ATmega128A) \ + ) + +/** ATmegaxx group without power reduction and + * And interrupt sense register. + */ +#define MEGA_XX_UN2 ( \ + AVR8_PART_IS_DEFINED(ATmega169P) || \ + AVR8_PART_IS_DEFINED(ATmega169PA) || \ + AVR8_PART_IS_DEFINED(ATmega329P) || \ + AVR8_PART_IS_DEFINED(ATmega329PA) \ + ) + +/** Devices added to complete megaAVR offering. + * Please do not use this group symbol as it is not intended + * to be permanent: the devices should be regrouped. + */ +#define MEGA_UNCATEGORIZED ( \ + AVR8_PART_IS_DEFINED(AT90CAN128) || \ + AVR8_PART_IS_DEFINED(AT90CAN32) || \ + AVR8_PART_IS_DEFINED(AT90CAN64) || \ + AVR8_PART_IS_DEFINED(AT90PWM1) || \ + AVR8_PART_IS_DEFINED(AT90PWM216) || \ + AVR8_PART_IS_DEFINED(AT90PWM2B) || \ + AVR8_PART_IS_DEFINED(AT90PWM316) || \ + AVR8_PART_IS_DEFINED(AT90PWM3B) || \ + AVR8_PART_IS_DEFINED(AT90PWM81) || \ + AVR8_PART_IS_DEFINED(AT90USB1286) || \ + AVR8_PART_IS_DEFINED(AT90USB1287) || \ + AVR8_PART_IS_DEFINED(AT90USB162) || \ + AVR8_PART_IS_DEFINED(AT90USB646) || \ + AVR8_PART_IS_DEFINED(AT90USB647) || \ + AVR8_PART_IS_DEFINED(AT90USB82) || \ + AVR8_PART_IS_DEFINED(ATmega1284) || \ + AVR8_PART_IS_DEFINED(ATmega162) || \ + AVR8_PART_IS_DEFINED(ATmega164P) || \ + AVR8_PART_IS_DEFINED(ATmega165A) || \ + AVR8_PART_IS_DEFINED(ATmega165P) || \ + AVR8_PART_IS_DEFINED(ATmega165PA) || \ + AVR8_PART_IS_DEFINED(ATmega168P) || \ + AVR8_PART_IS_DEFINED(ATmega169A) || \ + AVR8_PART_IS_DEFINED(ATmega16M1) || \ + AVR8_PART_IS_DEFINED(ATmega16U2) || \ + AVR8_PART_IS_DEFINED(ATmega16U4) || \ + AVR8_PART_IS_DEFINED(ATmega256RFA2) || \ + AVR8_PART_IS_DEFINED(ATmega324P) || \ + AVR8_PART_IS_DEFINED(ATmega325) || \ + AVR8_PART_IS_DEFINED(ATmega3250) || \ + AVR8_PART_IS_DEFINED(ATmega3250A) || \ + AVR8_PART_IS_DEFINED(ATmega3250P) || \ + AVR8_PART_IS_DEFINED(ATmega3250PA) || \ + AVR8_PART_IS_DEFINED(ATmega325A) || \ + AVR8_PART_IS_DEFINED(ATmega325P) || \ + AVR8_PART_IS_DEFINED(ATmega325PA) || \ + AVR8_PART_IS_DEFINED(ATmega329) || \ + AVR8_PART_IS_DEFINED(ATmega3290) || \ + AVR8_PART_IS_DEFINED(ATmega3290A) || \ + AVR8_PART_IS_DEFINED(ATmega3290P) || \ + AVR8_PART_IS_DEFINED(ATmega3290PA) || \ + AVR8_PART_IS_DEFINED(ATmega329A) || \ + AVR8_PART_IS_DEFINED(ATmega32M1) || \ + AVR8_PART_IS_DEFINED(ATmega32U2) || \ + AVR8_PART_IS_DEFINED(ATmega32U4) || \ + AVR8_PART_IS_DEFINED(ATmega48P) || \ + AVR8_PART_IS_DEFINED(ATmega644P) || \ + AVR8_PART_IS_DEFINED(ATmega645) || \ + AVR8_PART_IS_DEFINED(ATmega6450) || \ + AVR8_PART_IS_DEFINED(ATmega6450A) || \ + AVR8_PART_IS_DEFINED(ATmega6450P) || \ + AVR8_PART_IS_DEFINED(ATmega645A) || \ + AVR8_PART_IS_DEFINED(ATmega645P) || \ + AVR8_PART_IS_DEFINED(ATmega649) || \ + AVR8_PART_IS_DEFINED(ATmega6490) || \ + AVR8_PART_IS_DEFINED(ATmega6490A) || \ + AVR8_PART_IS_DEFINED(ATmega6490P) || \ + AVR8_PART_IS_DEFINED(ATmega649A) || \ + AVR8_PART_IS_DEFINED(ATmega649P) || \ + AVR8_PART_IS_DEFINED(ATmega64M1) || \ + AVR8_PART_IS_DEFINED(ATmega64RFA2) || \ + AVR8_PART_IS_DEFINED(ATmega8) || \ + AVR8_PART_IS_DEFINED(ATmega8515) || \ + AVR8_PART_IS_DEFINED(ATmega8535) || \ + AVR8_PART_IS_DEFINED(ATmega88P) || \ + AVR8_PART_IS_DEFINED(ATmega8A) || \ + AVR8_PART_IS_DEFINED(ATmega8U2) \ + ) + +/** Unspecified group */ +#define MEGA_UNSPECIFIED (MEGA_XX_UN0 || MEGA_XX_UN1 || MEGA_XX_UN2 || \ + MEGA_UNCATEGORIZED) + +/** @} */ + +/** megaAVR product line */ +#define MEGA (MEGA_XX0_1 || MEGA_XX4 || MEGA_XX8 || MEGA_XX || MEGA_RF || \ + MEGA_UNSPECIFIED) + +/** @} */ + +/** + * \defgroup sam_part_macros_group SAM parts + * @{ + */ + +/** + * \name SAM3S series + * @{ + */ +#define SAM3S1 ( \ + SAM_PART_IS_DEFINED(SAM3S1A) || \ + SAM_PART_IS_DEFINED(SAM3S1B) || \ + SAM_PART_IS_DEFINED(SAM3S1C) \ + ) + +#define SAM3S2 ( \ + SAM_PART_IS_DEFINED(SAM3S2A) || \ + SAM_PART_IS_DEFINED(SAM3S2B) || \ + SAM_PART_IS_DEFINED(SAM3S2C) \ + ) + +#define SAM3S4 ( \ + SAM_PART_IS_DEFINED(SAM3S4A) || \ + SAM_PART_IS_DEFINED(SAM3S4B) || \ + SAM_PART_IS_DEFINED(SAM3S4C) \ + ) + +#define SAM3S8 ( \ + SAM_PART_IS_DEFINED(SAM3S8B) || \ + SAM_PART_IS_DEFINED(SAM3S8C) \ + ) + +#define SAM3SD8 ( \ + SAM_PART_IS_DEFINED(SAM3SD8B) || \ + SAM_PART_IS_DEFINED(SAM3SD8C) \ + ) +/** @} */ + +/** + * \name SAM3U series + * @{ + */ +#define SAM3U1 ( \ + SAM_PART_IS_DEFINED(SAM3U1C) || \ + SAM_PART_IS_DEFINED(SAM3U1E) \ + ) + +#define SAM3U2 ( \ + SAM_PART_IS_DEFINED(SAM3U2C) || \ + SAM_PART_IS_DEFINED(SAM3U2E) \ + ) + +#define SAM3U4 ( \ + SAM_PART_IS_DEFINED(SAM3U4C) || \ + SAM_PART_IS_DEFINED(SAM3U4E) \ + ) +/** @} */ + +/** + * \name SAM3N series + * @{ + */ +#define SAM3N00 ( \ + SAM_PART_IS_DEFINED(SAM3N00A) || \ + SAM_PART_IS_DEFINED(SAM3N00B) \ + ) + +#define SAM3N0 ( \ + SAM_PART_IS_DEFINED(SAM3N0A) || \ + SAM_PART_IS_DEFINED(SAM3N0B) || \ + SAM_PART_IS_DEFINED(SAM3N0C) \ + ) + +#define SAM3N1 ( \ + SAM_PART_IS_DEFINED(SAM3N1A) || \ + SAM_PART_IS_DEFINED(SAM3N1B) || \ + SAM_PART_IS_DEFINED(SAM3N1C) \ + ) + +#define SAM3N2 ( \ + SAM_PART_IS_DEFINED(SAM3N2A) || \ + SAM_PART_IS_DEFINED(SAM3N2B) || \ + SAM_PART_IS_DEFINED(SAM3N2C) \ + ) + +#define SAM3N4 ( \ + SAM_PART_IS_DEFINED(SAM3N4A) || \ + SAM_PART_IS_DEFINED(SAM3N4B) || \ + SAM_PART_IS_DEFINED(SAM3N4C) \ + ) +/** @} */ + +/** + * \name SAM3X series + * @{ + */ +#define SAM3X4 ( \ + SAM_PART_IS_DEFINED(SAM3X4C) || \ + SAM_PART_IS_DEFINED(SAM3X4E) \ + ) + +#define SAM3X8 ( \ + SAM_PART_IS_DEFINED(SAM3X8C) || \ + SAM_PART_IS_DEFINED(SAM3X8E) || \ + SAM_PART_IS_DEFINED(SAM3X8H) \ + ) +/** @} */ + +/** + * \name SAM3A series + * @{ + */ +#define SAM3A4 ( \ + SAM_PART_IS_DEFINED(SAM3A4C) \ + ) + +#define SAM3A8 ( \ + SAM_PART_IS_DEFINED(SAM3A8C) \ + ) +/** @} */ + +/** + * \name SAM4S series + * @{ + */ +#define SAM4S2 ( \ + SAM_PART_IS_DEFINED(SAM4S2A) || \ + SAM_PART_IS_DEFINED(SAM4S2B) || \ + SAM_PART_IS_DEFINED(SAM4S2C) \ + ) + +#define SAM4S4 ( \ + SAM_PART_IS_DEFINED(SAM4S4A) || \ + SAM_PART_IS_DEFINED(SAM4S4B) || \ + SAM_PART_IS_DEFINED(SAM4S4C) \ + ) + +#define SAM4S8 ( \ + SAM_PART_IS_DEFINED(SAM4S8B) || \ + SAM_PART_IS_DEFINED(SAM4S8C) \ + ) + +#define SAM4S16 ( \ + SAM_PART_IS_DEFINED(SAM4S16B) || \ + SAM_PART_IS_DEFINED(SAM4S16C) \ + ) + +#define SAM4SA16 ( \ + SAM_PART_IS_DEFINED(SAM4SA16B) || \ + SAM_PART_IS_DEFINED(SAM4SA16C) \ + ) + +#define SAM4SD16 ( \ + SAM_PART_IS_DEFINED(SAM4SD16B) || \ + SAM_PART_IS_DEFINED(SAM4SD16C) \ + ) + +#define SAM4SD32 ( \ + SAM_PART_IS_DEFINED(SAM4SD32B) || \ + SAM_PART_IS_DEFINED(SAM4SD32C) \ + ) +/** @} */ + +/** + * \name SAM4L series + * @{ + */ +#define SAM4LS ( \ + SAM_PART_IS_DEFINED(SAM4LS2A) || \ + SAM_PART_IS_DEFINED(SAM4LS2B) || \ + SAM_PART_IS_DEFINED(SAM4LS2C) || \ + SAM_PART_IS_DEFINED(SAM4LS4A) || \ + SAM_PART_IS_DEFINED(SAM4LS4B) || \ + SAM_PART_IS_DEFINED(SAM4LS4C) || \ + SAM_PART_IS_DEFINED(SAM4LS8A) || \ + SAM_PART_IS_DEFINED(SAM4LS8B) || \ + SAM_PART_IS_DEFINED(SAM4LS8C) \ + ) + +#define SAM4LC ( \ + SAM_PART_IS_DEFINED(SAM4LC2A) || \ + SAM_PART_IS_DEFINED(SAM4LC2B) || \ + SAM_PART_IS_DEFINED(SAM4LC2C) || \ + SAM_PART_IS_DEFINED(SAM4LC4A) || \ + SAM_PART_IS_DEFINED(SAM4LC4B) || \ + SAM_PART_IS_DEFINED(SAM4LC4C) || \ + SAM_PART_IS_DEFINED(SAM4LC8A) || \ + SAM_PART_IS_DEFINED(SAM4LC8B) || \ + SAM_PART_IS_DEFINED(SAM4LC8C) \ + ) +/** @} */ + +/** + * \name SAMD20 series + * @{ + */ +#define SAMD20J ( \ + SAM_PART_IS_DEFINED(SAMD20J14) || \ + SAM_PART_IS_DEFINED(SAMD20J15) || \ + SAM_PART_IS_DEFINED(SAMD20J16) || \ + SAM_PART_IS_DEFINED(SAMD20J17) || \ + SAM_PART_IS_DEFINED(SAMD20J18) \ + ) + +#define SAMD20G ( \ + SAM_PART_IS_DEFINED(SAMD20G14) || \ + SAM_PART_IS_DEFINED(SAMD20G15) || \ + SAM_PART_IS_DEFINED(SAMD20G16) || \ + SAM_PART_IS_DEFINED(SAMD20G17) || \ + SAM_PART_IS_DEFINED(SAMD20G17U) || \ + SAM_PART_IS_DEFINED(SAMD20G18) || \ + SAM_PART_IS_DEFINED(SAMD20G18U) \ + ) + +#define SAMD20E ( \ + SAM_PART_IS_DEFINED(SAMD20E14) || \ + SAM_PART_IS_DEFINED(SAMD20E15) || \ + SAM_PART_IS_DEFINED(SAMD20E16) || \ + SAM_PART_IS_DEFINED(SAMD20E17) || \ + SAM_PART_IS_DEFINED(SAMD20E18) \ + ) +/** @} */ + +/** + * \name SAMD21 series + * @{ + */ +#define SAMD21J ( \ + SAM_PART_IS_DEFINED(SAMD21J15A) || \ + SAM_PART_IS_DEFINED(SAMD21J16A) || \ + SAM_PART_IS_DEFINED(SAMD21J17A) || \ + SAM_PART_IS_DEFINED(SAMD21J18A) || \ + SAM_PART_IS_DEFINED(SAMD21J15B) || \ + SAM_PART_IS_DEFINED(SAMD21J16B) \ + ) + +#define SAMD21G ( \ + SAM_PART_IS_DEFINED(SAMD21G15A) || \ + SAM_PART_IS_DEFINED(SAMD21G16A) || \ + SAM_PART_IS_DEFINED(SAMD21G17A) || \ + SAM_PART_IS_DEFINED(SAMD21G17AU) || \ + SAM_PART_IS_DEFINED(SAMD21G18A) || \ + SAM_PART_IS_DEFINED(SAMD21G18AU) || \ + SAM_PART_IS_DEFINED(SAMD21G15B) || \ + SAM_PART_IS_DEFINED(SAMD21G16B) || \ + SAM_PART_IS_DEFINED(SAMD21G15L) || \ + SAM_PART_IS_DEFINED(SAMD21G16L) \ + ) + +#define SAMD21GXXL ( \ + SAM_PART_IS_DEFINED(SAMD21G15L) || \ + SAM_PART_IS_DEFINED(SAMD21G16L) \ + ) + +#define SAMD21E ( \ + SAM_PART_IS_DEFINED(SAMD21E15A) || \ + SAM_PART_IS_DEFINED(SAMD21E16A) || \ + SAM_PART_IS_DEFINED(SAMD21E17A) || \ + SAM_PART_IS_DEFINED(SAMD21E18A) || \ + SAM_PART_IS_DEFINED(SAMD21E15B) || \ + SAM_PART_IS_DEFINED(SAMD21E15BU) || \ + SAM_PART_IS_DEFINED(SAMD21E16B) || \ + SAM_PART_IS_DEFINED(SAMD21E16BU) || \ + SAM_PART_IS_DEFINED(SAMD21E15L) || \ + SAM_PART_IS_DEFINED(SAMD21E16L) \ + ) + +#define SAMD21EXXL ( \ + SAM_PART_IS_DEFINED(SAMD21E15L) || \ + SAM_PART_IS_DEFINED(SAMD21E16L) \ + ) + +/** @} */ + +/** + * \name SAMR21 series + * @{ + */ +#define SAMR21G ( \ + SAM_PART_IS_DEFINED(SAMR21G16A) || \ + SAM_PART_IS_DEFINED(SAMR21G17A) || \ + SAM_PART_IS_DEFINED(SAMR21G18A) \ + ) + +#define SAMR21E ( \ + SAM_PART_IS_DEFINED(SAMR21E16A) || \ + SAM_PART_IS_DEFINED(SAMR21E17A) || \ + SAM_PART_IS_DEFINED(SAMR21E18A) || \ + SAM_PART_IS_DEFINED(SAMR21E19A) \ + ) +/** @} */ + +/** + * \name SAMR30 series + * @{ + */ +#define SAMR30G ( \ + SAM_PART_IS_DEFINED(SAMR30G18A) \ + ) + +#define SAMR30E ( \ + SAM_PART_IS_DEFINED(SAMR30E18A) \ + ) +/** @} */ + +/** + * \name SAMB11 series + * @{ + */ +#define SAMB11G ( \ + SAM_PART_IS_DEFINED(SAMB11G18A) || \ + SAM_PART_IS_DEFINED(SAMB11ZR) \ + ) +#define BTLC1000 ( \ + SAM_PART_IS_DEFINED(BTLC1000WLCSP) \ + ) + +/** @} */ + +/** + * \name SAMD09 series + * @{ + */ +#define SAMD09C ( \ + SAM_PART_IS_DEFINED(SAMD09C13A) \ + ) + +#define SAMD09D ( \ + SAM_PART_IS_DEFINED(SAMD09D14A) \ + ) +/** @} */ + +/** + * \name SAMD10 series + * @{ + */ +#define SAMD10C ( \ + SAM_PART_IS_DEFINED(SAMD10C12A) || \ + SAM_PART_IS_DEFINED(SAMD10C13A) || \ + SAM_PART_IS_DEFINED(SAMD10C14A) \ + ) + +#define SAMD10DS ( \ + SAM_PART_IS_DEFINED(SAMD10D12AS) || \ + SAM_PART_IS_DEFINED(SAMD10D13AS) || \ + SAM_PART_IS_DEFINED(SAMD10D14AS) \ + ) + +#define SAMD10DM ( \ + SAM_PART_IS_DEFINED(SAMD10D12AM) || \ + SAM_PART_IS_DEFINED(SAMD10D13AM) || \ + SAM_PART_IS_DEFINED(SAMD10D14AM) \ + ) + +#define SAMD10DU ( \ + SAM_PART_IS_DEFINED(SAMD10D14AU) \ + ) +/** @} */ + +/** + * \name SAMD11 series + * @{ + */ +#define SAMD11C ( \ + SAM_PART_IS_DEFINED(SAMD11C14A) \ + ) + +#define SAMD11DS ( \ + SAM_PART_IS_DEFINED(SAMD11D14AS) \ + ) + +#define SAMD11DM ( \ + SAM_PART_IS_DEFINED(SAMD11D14AM) \ + ) + +#define SAMD11DU ( \ + SAM_PART_IS_DEFINED(SAMD11D14AU) \ + ) +/** @} */ + +/** + * \name SAML21 series + * @{ + */ +#define SAML21E ( \ + SAM_PART_IS_DEFINED(SAML21E18A) || \ + SAM_PART_IS_DEFINED(SAML21E15B) || \ + SAM_PART_IS_DEFINED(SAML21E16B) || \ + SAM_PART_IS_DEFINED(SAML21E17B) || \ + SAM_PART_IS_DEFINED(SAML21E18B) \ + ) + +#define SAML21G ( \ + SAM_PART_IS_DEFINED(SAML21G18A) || \ + SAM_PART_IS_DEFINED(SAML21G16B) || \ + SAM_PART_IS_DEFINED(SAML21G17B) || \ + SAM_PART_IS_DEFINED(SAML21G18B) \ + ) + +#define SAML21J ( \ + SAM_PART_IS_DEFINED(SAML21J18A) || \ + SAM_PART_IS_DEFINED(SAML21J16B) || \ + SAM_PART_IS_DEFINED(SAML21J17B) || \ + SAM_PART_IS_DEFINED(SAML21J18B) \ + ) + +/* Group for SAML21 A variant: SAML21[E/G/J][18]A */ +#define SAML21XXXA ( \ + SAM_PART_IS_DEFINED(SAML21E18A) || \ + SAM_PART_IS_DEFINED(SAML21G18A) || \ + SAM_PART_IS_DEFINED(SAML21J18A) \ + ) + +/* Group for SAML21 B variant: SAML21[E/G/J][15/16/1718]B */ +#define SAML21XXXB ( \ + SAM_PART_IS_DEFINED(SAML21E15B) || \ + SAM_PART_IS_DEFINED(SAML21E16B) || \ + SAM_PART_IS_DEFINED(SAML21E17B) || \ + SAM_PART_IS_DEFINED(SAML21E18B) || \ + SAM_PART_IS_DEFINED(SAML21G16B) || \ + SAM_PART_IS_DEFINED(SAML21G17B) || \ + SAM_PART_IS_DEFINED(SAML21G18B) || \ + SAM_PART_IS_DEFINED(SAML21J16B) || \ + SAM_PART_IS_DEFINED(SAML21J17B) || \ + SAM_PART_IS_DEFINED(SAML21J18B) \ + ) + +/** @} */ + +/** + * \name SAML22 series + * @{ + */ +#define SAML22N ( \ + SAM_PART_IS_DEFINED(SAML22N16A) || \ + SAM_PART_IS_DEFINED(SAML22N17A) || \ + SAM_PART_IS_DEFINED(SAML22N18A) \ + ) + +#define SAML22G ( \ + SAM_PART_IS_DEFINED(SAML22G16A) || \ + SAM_PART_IS_DEFINED(SAML22G17A) || \ + SAM_PART_IS_DEFINED(SAML22G18A) \ + ) + +#define SAML22J ( \ + SAM_PART_IS_DEFINED(SAML22J16A) || \ + SAM_PART_IS_DEFINED(SAML22J17A) || \ + SAM_PART_IS_DEFINED(SAML22J18A) \ + ) +/** @} */ + +/** + * \name SAMDA1 series + * @{ + */ +#define SAMDA1J ( \ + SAM_PART_IS_DEFINED(SAMDA1J14A) || \ + SAM_PART_IS_DEFINED(SAMDA1J15B) || \ + SAM_PART_IS_DEFINED(SAMDA1J15A) || \ + SAM_PART_IS_DEFINED(SAMDA1J15B) || \ + SAM_PART_IS_DEFINED(SAMDA1J16A) || \ + SAM_PART_IS_DEFINED(SAMDA1J16B) \ + ) + +#define SAMDA1G ( \ + SAM_PART_IS_DEFINED(SAMDA1G14A) || \ + SAM_PART_IS_DEFINED(SAMDA1G14B) || \ + SAM_PART_IS_DEFINED(SAMDA1G15A) || \ + SAM_PART_IS_DEFINED(SAMDA1G15B) || \ + SAM_PART_IS_DEFINED(SAMDA1G16A) || \ + SAM_PART_IS_DEFINED(SAMDA1G16B) \ + ) + +#define SAMDA1E ( \ + SAM_PART_IS_DEFINED(SAMDA1E14A) || \ + SAM_PART_IS_DEFINED(SAMDA1E14B) || \ + SAM_PART_IS_DEFINED(SAMDA1E15A) || \ + SAM_PART_IS_DEFINED(SAMDA1E15B) || \ + SAM_PART_IS_DEFINED(SAMDA1E16A) || \ + SAM_PART_IS_DEFINED(SAMDA1E16B) \ + ) +/** @} */ + +/** + * \name SAMHA1 series + * @{ + */ +#define SAMHA1G ( \ + SAM_PART_IS_DEFINED(SAMHA1G14A) || \ + SAM_PART_IS_DEFINED(SAMHA1G15A) || \ + SAM_PART_IS_DEFINED(SAMHA1G16A) \ + ) + +/** @} */ + +/** + * \name SAMC20 series + * @{ + */ +#define SAMC20E ( \ + SAM_PART_IS_DEFINED(SAMC20E15A) || \ + SAM_PART_IS_DEFINED(SAMC20E16A) || \ + SAM_PART_IS_DEFINED(SAMC20E17A) || \ + SAM_PART_IS_DEFINED(SAMC20E18A) \ + ) + +#define SAMC20G ( \ + SAM_PART_IS_DEFINED(SAMC20G15A) || \ + SAM_PART_IS_DEFINED(SAMC20G16A) || \ + SAM_PART_IS_DEFINED(SAMC20G17A) || \ + SAM_PART_IS_DEFINED(SAMC20G18A) \ + ) + +#define SAMC20J ( \ + SAM_PART_IS_DEFINED(SAMC20J15A) || \ + SAM_PART_IS_DEFINED(SAMC20J16A) || \ + SAM_PART_IS_DEFINED(SAMC20J17A) || \ + SAM_PART_IS_DEFINED(SAMC20J18A) \ + ) +/** @} */ + +/** + * \name SAMC21 series + * @{ + */ +#define SAMC21E ( \ + SAM_PART_IS_DEFINED(SAMC21E15A) || \ + SAM_PART_IS_DEFINED(SAMC21E16A) || \ + SAM_PART_IS_DEFINED(SAMC21E17A) || \ + SAM_PART_IS_DEFINED(SAMC21E18A) \ + ) + +#define SAMC21G ( \ + SAM_PART_IS_DEFINED(SAMC21G15A) || \ + SAM_PART_IS_DEFINED(SAMC21G16A) || \ + SAM_PART_IS_DEFINED(SAMC21G17A) || \ + SAM_PART_IS_DEFINED(SAMC21G18A) \ + ) + +#define SAMC21J ( \ + SAM_PART_IS_DEFINED(SAMC21J15A) || \ + SAM_PART_IS_DEFINED(SAMC21J16A) || \ + SAM_PART_IS_DEFINED(SAMC21J17A) || \ + SAM_PART_IS_DEFINED(SAMC21J18A) \ + ) +/** @} */ + +/** + * \name SAM4E series + * @{ + */ +#define SAM4E8 ( \ + SAM_PART_IS_DEFINED(SAM4E8C) || \ + SAM_PART_IS_DEFINED(SAM4E8CB) || \ + SAM_PART_IS_DEFINED(SAM4E8E) \ + ) + +#define SAM4E16 ( \ + SAM_PART_IS_DEFINED(SAM4E16C) || \ + SAM_PART_IS_DEFINED(SAM4E16CB) || \ + SAM_PART_IS_DEFINED(SAM4E16E) \ + ) +/** @} */ + +/** + * \name SAM4N series + * @{ + */ +#define SAM4N8 ( \ + SAM_PART_IS_DEFINED(SAM4N8A) || \ + SAM_PART_IS_DEFINED(SAM4N8B) || \ + SAM_PART_IS_DEFINED(SAM4N8C) \ + ) + +#define SAM4N16 ( \ + SAM_PART_IS_DEFINED(SAM4N16B) || \ + SAM_PART_IS_DEFINED(SAM4N16C) \ + ) +/** @} */ + +/** + * \name SAM4C series + * @{ + */ +#define SAM4C4_0 ( \ + SAM_PART_IS_DEFINED(SAM4C4C_0) \ + ) + +#define SAM4C4_1 ( \ + SAM_PART_IS_DEFINED(SAM4C4C_1) \ + ) + +#define SAM4C4 (SAM4C4_0 || SAM4C4_1) + +#define SAM4C8_0 ( \ + SAM_PART_IS_DEFINED(SAM4C8C_0) \ + ) + +#define SAM4C8_1 ( \ + SAM_PART_IS_DEFINED(SAM4C8C_1) \ + ) + +#define SAM4C8 (SAM4C8_0 || SAM4C8_1) + +#define SAM4C16_0 ( \ + SAM_PART_IS_DEFINED(SAM4C16C_0) \ + ) + +#define SAM4C16_1 ( \ + SAM_PART_IS_DEFINED(SAM4C16C_1) \ + ) + +#define SAM4C16 (SAM4C16_0 || SAM4C16_1) + +#define SAM4C32_0 ( \ + SAM_PART_IS_DEFINED(SAM4C32C_0) ||\ + SAM_PART_IS_DEFINED(SAM4C32E_0) \ + ) + +#define SAM4C32_1 ( \ + SAM_PART_IS_DEFINED(SAM4C32C_1) ||\ + SAM_PART_IS_DEFINED(SAM4C32E_1) \ + ) + + +#define SAM4C32 (SAM4C32_0 || SAM4C32_1) + +/** @} */ + +/** + * \name SAM4CM series + * @{ + */ +#define SAM4CMP8_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMP8C_0) \ + ) + +#define SAM4CMP8_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMP8C_1) \ + ) + +#define SAM4CMP8 (SAM4CMP8_0 || SAM4CMP8_1) + +#define SAM4CMP16_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMP16C_0) \ + ) + +#define SAM4CMP16_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMP16C_1) \ + ) + +#define SAM4CMP16 (SAM4CMP16_0 || SAM4CMP16_1) + +#define SAM4CMP32_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMP32C_0) \ + ) + +#define SAM4CMP32_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMP32C_1) \ + ) + +#define SAM4CMP32 (SAM4CMP32_0 || SAM4CMP32_1) + +#define SAM4CMS4_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMS4C_0) \ + ) + +#define SAM4CMS4_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMS4C_1) \ + ) + +#define SAM4CMS4 (SAM4CMS4_0 || SAM4CMS4_1) + +#define SAM4CMS8_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMS8C_0) \ + ) + +#define SAM4CMS8_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMS8C_1) \ + ) + +#define SAM4CMS8 (SAM4CMS8_0 || SAM4CMS8_1) + +#define SAM4CMS16_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMS16C_0) \ + ) + +#define SAM4CMS16_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMS16C_1) \ + ) + +#define SAM4CMS16 (SAM4CMS16_0 || SAM4CMS16_1) + +#define SAM4CMS32_0 ( \ + SAM_PART_IS_DEFINED(SAM4CMS32C_0) \ + ) + +#define SAM4CMS32_1 ( \ + SAM_PART_IS_DEFINED(SAM4CMS32C_1) \ + ) + +#define SAM4CMS32 (SAM4CMS32_0 || SAM4CMS32_1) + +/** @} */ + +/** + * \name SAM4CP series + * @{ + */ +#define SAM4CP16_0 ( \ + SAM_PART_IS_DEFINED(SAM4CP16B_0) \ + ) + +#define SAM4CP16_1 ( \ + SAM_PART_IS_DEFINED(SAM4CP16B_1) \ + ) + +#define SAM4CP16 (SAM4CP16_0 || SAM4CP16_1) +/** @} */ + +/** + * \name SAMG series + * @{ + */ +#define SAMG51 ( \ + SAM_PART_IS_DEFINED(SAMG51G18) \ + ) + +#define SAMG53 ( \ + SAM_PART_IS_DEFINED(SAMG53G19) ||\ + SAM_PART_IS_DEFINED(SAMG53N19) \ + ) + +#define SAMG54 ( \ + SAM_PART_IS_DEFINED(SAMG54G19) ||\ + SAM_PART_IS_DEFINED(SAMG54J19) ||\ + SAM_PART_IS_DEFINED(SAMG54N19) \ + ) + +#define SAMG55 ( \ + SAM_PART_IS_DEFINED(SAMG55G18) ||\ + SAM_PART_IS_DEFINED(SAMG55G19) ||\ + SAM_PART_IS_DEFINED(SAMG55J18) ||\ + SAM_PART_IS_DEFINED(SAMG55J19) ||\ + SAM_PART_IS_DEFINED(SAMG55N19) \ + ) +/** @} */ + +/** + * \name SAMV71 series + * @{ + */ +#define SAMV71J ( \ + SAM_PART_IS_DEFINED(SAMV71J19) || \ + SAM_PART_IS_DEFINED(SAMV71J20) || \ + SAM_PART_IS_DEFINED(SAMV71J21) \ + ) + +#define SAMV71N ( \ + SAM_PART_IS_DEFINED(SAMV71N19) || \ + SAM_PART_IS_DEFINED(SAMV71N20) || \ + SAM_PART_IS_DEFINED(SAMV71N21) \ + ) + +#define SAMV71Q ( \ + SAM_PART_IS_DEFINED(SAMV71Q19) || \ + SAM_PART_IS_DEFINED(SAMV71Q20) || \ + SAM_PART_IS_DEFINED(SAMV71Q21) \ + ) +/** @} */ + +/** + * \name SAMV70 series + * @{ + */ +#define SAMV70J ( \ + SAM_PART_IS_DEFINED(SAMV70J19) || \ + SAM_PART_IS_DEFINED(SAMV70J20) \ + ) + +#define SAMV70N ( \ + SAM_PART_IS_DEFINED(SAMV70N19) || \ + SAM_PART_IS_DEFINED(SAMV70N20) \ + ) + +#define SAMV70Q ( \ + SAM_PART_IS_DEFINED(SAMV70Q19) || \ + SAM_PART_IS_DEFINED(SAMV70Q20) \ + ) +/** @} */ + +/** + * \name SAMS70 series + * @{ + */ +#define SAMS70J ( \ + SAM_PART_IS_DEFINED(SAMS70J19) || \ + SAM_PART_IS_DEFINED(SAMS70J20) || \ + SAM_PART_IS_DEFINED(SAMS70J21) \ + ) + +#define SAMS70N ( \ + SAM_PART_IS_DEFINED(SAMS70N19) || \ + SAM_PART_IS_DEFINED(SAMS70N20) || \ + SAM_PART_IS_DEFINED(SAMS70N21) \ + ) + +#define SAMS70Q ( \ + SAM_PART_IS_DEFINED(SAMS70Q19) || \ + SAM_PART_IS_DEFINED(SAMS70Q20) || \ + SAM_PART_IS_DEFINED(SAMS70Q21) \ + ) +/** @} */ + +/** + * \name SAME70 series + * @{ + */ +#define SAME70J ( \ + SAM_PART_IS_DEFINED(SAME70J19) || \ + SAM_PART_IS_DEFINED(SAME70J20) || \ + SAM_PART_IS_DEFINED(SAME70J21) \ + ) + +#define SAME70N ( \ + SAM_PART_IS_DEFINED(SAME70N19) || \ + SAM_PART_IS_DEFINED(SAME70N20) || \ + SAM_PART_IS_DEFINED(SAME70N21) \ + ) + +#define SAME70Q ( \ + SAM_PART_IS_DEFINED(SAME70Q19) || \ + SAM_PART_IS_DEFINED(SAME70Q20) || \ + SAM_PART_IS_DEFINED(SAME70Q21) \ + ) +/** @} */ + +/** + * \name SAM families + * @{ + */ +/** SAM3S Family */ +#define SAM3S (SAM3S1 || SAM3S2 || SAM3S4 || SAM3S8 || SAM3SD8) + +/** SAM3U Family */ +#define SAM3U (SAM3U1 || SAM3U2 || SAM3U4) + +/** SAM3N Family */ +#define SAM3N (SAM3N00 || SAM3N0 || SAM3N1 || SAM3N2 || SAM3N4) + +/** SAM3XA Family */ +#define SAM3XA (SAM3X4 || SAM3X8 || SAM3A4 || SAM3A8) + +/** SAM4S Family */ +#define SAM4S (SAM4S2 || SAM4S4 || SAM4S8 || SAM4S16 || SAM4SA16 || SAM4SD16 || SAM4SD32) + +/** SAM4L Family */ +#define SAM4L (SAM4LS || SAM4LC) + +/** SAMD20 Family */ +#define SAMD20 (SAMD20J || SAMD20G || SAMD20E) + +/** SAMD21 Family */ +#define SAMD21 (SAMD21J || SAMD21G || SAMD21E) + +/** SAMD09 Family */ +#define SAMD09 (SAMD09C || SAMD09D) + +/** SAMD10 Family */ +#define SAMD10 (SAMD10C || SAMD10DS || SAMD10DM || SAMD10DU) + +/** SAMD11 Family */ +#define SAMD11 (SAMD11C || SAMD11DS || SAMD11DM || SAMD11DU) + +/** SAMDA1 Family */ +#define SAMDA1 (SAMDA1J || SAMDA1G || SAMDA1E) + +/** SAMHA1 Family */ +#define SAMHA1 (SAMHA1G) + +/** SAMD Family */ +#define SAMD (SAMD20 || SAMD21 || SAMD09 || SAMD10 || SAMD11 || SAMDA1) + +/** SAMR21 Family */ +#define SAMR21 (SAMR21G || SAMR21E) + +/** SAMR30 Family */ +#define SAMR30 (SAMR30G || SAMR30E) + +/** SAMB11 Family */ +#define SAMB11 (SAMB11G || BTLC1000) + +/** SAML21 Family */ +#define SAML21 (SAML21J || SAML21G || SAML21E) + +/** SAML22 Family */ +#define SAML22 (SAML22J || SAML22G || SAML22N) +/** SAMC20 Family */ +#define SAMC20 (SAMC20J || SAMC20G || SAMC20E) + +/** SAMC21 Family */ +#define SAMC21 (SAMC21J || SAMC21G || SAMC21E) + +/** SAM4E Family */ +#define SAM4E (SAM4E8 || SAM4E16) + +/** SAM4N Family */ +#define SAM4N (SAM4N8 || SAM4N16) + +/** SAM4C Family */ +#define SAM4C_0 (SAM4C4_0 || SAM4C8_0 || SAM4C16_0 || SAM4C32_0) +#define SAM4C_1 (SAM4C4_1 || SAM4C8_1 || SAM4C16_1 || SAM4C32_1) +#define SAM4C (SAM4C4 || SAM4C8 || SAM4C16 || SAM4C32) + +/** SAM4CM Family */ +#define SAM4CM_0 (SAM4CMP8_0 || SAM4CMP16_0 || SAM4CMP32_0 || \ + SAM4CMS4_0 || SAM4CMS8_0 || SAM4CMS16_0 || SAM4CMS32_0) +#define SAM4CM_1 (SAM4CMP8_1 || SAM4CMP16_1 || SAM4CMP32_1 || \ + SAM4CMS4_1 || SAM4CMS8_1 || SAM4CMS16_1 || SAM4CMS32_1) +#define SAM4CM (SAM4CMP8 || SAM4CMP16 || SAM4CMP32 || \ + SAM4CMS4 || SAM4CMS8 || SAM4CMS16 || SAM4CMS32) + +/** SAM4CP Family */ +#define SAM4CP_0 (SAM4CP16_0) +#define SAM4CP_1 (SAM4CP16_1) +#define SAM4CP (SAM4CP16) + +/** SAMG Family */ +#define SAMG (SAMG51 || SAMG53 || SAMG54 || SAMG55) + +/** SAMB Family */ +#define SAMB (SAMB11) + +/** SAMV71 Family */ +#define SAMV71 (SAMV71J || SAMV71N || SAMV71Q) + +/** SAMV70 Family */ +#define SAMV70 (SAMV70J || SAMV70N || SAMV70Q) + +/** SAME70 Family */ +#define SAME70 (SAME70J || SAME70N || SAME70Q) + +/** SAMS70 Family */ +#define SAMS70 (SAMS70J || SAMS70N || SAMS70Q) + +/** SAM0 product line (cortex-m0+) */ +#define SAM0 (SAMD20 || SAMD21 || SAMR21 || SAMD10 || SAMD11 || SAML21 ||\ + SAMDA1 || SAMC20 || SAMC21 || SAML22 || SAMD09 || SAMR30 || SAMHA1) + +/** @} */ + +/** SAM product line */ +#define SAM (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4L || SAM4E || \ + SAM0 || SAM4N || SAM4C || SAM4CM || SAM4CP || SAMG || SAMV71 || SAMV70 || SAME70 || SAMS70) + +/** @} */ + +/** @} */ + +/** @} */ + +#endif /* ATMEL_PARTS_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/read.c b/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/read.c new file mode 100644 index 0000000..1326308 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/read.c @@ -0,0 +1,167 @@ +/** + * \file + * + * \brief System-specific implementation of the \ref _read function used by + * the standard library. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include "compiler.h" + +/** + * \defgroup group_common_utils_stdio Standard I/O (stdio) + * + * Common standard I/O driver that implements the stdio + * read and write functions on AVR and SAM devices. + * + * \{ + */ + +extern volatile void *volatile stdio_base; +void (*ptr_get)(void volatile*, char*); + + +// IAR common implementation +#if ( defined(__ICCAVR32__) || defined(__ICCAVR__) || defined(__ICCARM__) ) + +#include + +_STD_BEGIN + +#pragma module_name = "?__read" + +/*! \brief Reads a number of bytes, at most \a size, into the memory area + * pointed to by \a buffer. + * + * \param handle File handle to read from. + * \param buffer Pointer to buffer to write read bytes to. + * \param size Number of bytes to read. + * + * \return The number of bytes read, \c 0 at the end of the file, or + * \c _LLIO_ERROR on failure. + */ +size_t __read(int handle, unsigned char *buffer, size_t size) +{ + int nChars = 0; + // This implementation only reads from stdin. + // For all other file handles, it returns failure. + if (handle != _LLIO_STDIN) { + return _LLIO_ERROR; + } + for (; size > 0; --size) { + ptr_get(stdio_base, (char*)buffer); + buffer++; + nChars++; + } + return nChars; +} + +/*! \brief This routine is required by IAR DLIB library since EWAVR V6.10 + * the implementation is empty to be compatible with old IAR version. + */ +int __close(int handle) +{ + UNUSED(handle); + return 0; +} + +/*! \brief This routine is required by IAR DLIB library since EWAVR V6.10 + * the implementation is empty to be compatible with old IAR version. + */ +int remove(const char* val) +{ + UNUSED(val); + return 0; +} + +/*! \brief This routine is required by IAR DLIB library since EWAVR V6.10 + * the implementation is empty to be compatible with old IAR version. + */ +long __lseek(int handle, long val, int val2) +{ + UNUSED(handle); + UNUSED(val2); + return val; +} + +_STD_END + +// GCC AVR32 and SAM implementation +#elif (defined(__GNUC__) && !XMEGA && !MEGA) + +int __attribute__((weak)) +_read (int file, char * ptr, int len); // Remove GCC compiler warning + +int __attribute__((weak)) +_read (int file, char * ptr, int len) +{ + int nChars = 0; + + if (file != 0) { + return -1; + } + + for (; len > 0; --len) { + ptr_get(stdio_base, ptr); + ptr++; + nChars++; + } + return nChars; +} + +// GCC AVR implementation +#elif (defined(__GNUC__) && (XMEGA || MEGA) ) + +int _read (int *f); // Remove GCC compiler warning + +int _read (int *f) +{ + char c; + ptr_get(stdio_base,&c); + return c; +} +#endif + +/** + * \} + */ + diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h b/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h new file mode 100644 index 0000000..4315d3f --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/stdio_serial/stdio_serial.h @@ -0,0 +1,129 @@ +/** + * + * \file + * + * \brief Common Standard I/O Serial Management. + * + * This file defines a useful set of functions for the Stdio Serial interface on AVR + * and SAM devices. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ +/* + * Support and FAQ: visit Atmel Support + */ + + +#ifndef _STDIO_SERIAL_H_ +#define _STDIO_SERIAL_H_ + +/** + * \defgroup group_common_utils_stdio_stdio_serial Standard serial I/O (stdio) + * \ingroup group_common_utils_stdio + * + * Common standard serial I/O management driver that + * implements a stdio serial interface on AVR and SAM devices. + * + * \{ + */ + +#include +#include "compiler.h" +#ifndef SAMD20 +# include "sysclk.h" +#endif +#include "serial.h" + +#if (XMEGA || MEGA_RF) && defined(__GNUC__) + extern int _write (char c, int *f); + extern int _read (int *f); +#endif + + +//! Pointer to the base of the USART module instance to use for stdio. +extern volatile void *volatile stdio_base; +//! Pointer to the external low level write function. +extern int (*ptr_put)(void volatile*, char); + +//! Pointer to the external low level read function. +extern void (*ptr_get)(void volatile*, char*); + +/*! \brief Initializes the stdio in Serial Mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * + */ +static inline void stdio_serial_init(volatile void *usart, const usart_serial_options_t *opt) +{ + stdio_base = (void *)usart; + ptr_put = (int (*)(void volatile*,char))&usart_serial_putchar; + ptr_get = (void (*)(void volatile*,char*))&usart_serial_getchar; +# if (XMEGA || MEGA_RF) + usart_serial_init((USART_t *)usart,opt); +# elif UC3 + usart_serial_init(usart,(usart_serial_options_t *)opt); +# elif SAM + usart_serial_init((Usart *)usart,(usart_serial_options_t *)opt); +# else +# error Unsupported chip type +# endif + +# if defined(__GNUC__) +# if (XMEGA || MEGA_RF) + // For AVR GCC libc print redirection uses fdevopen. + fdevopen((int (*)(char, FILE*))(_write),(int (*)(FILE*))(_read)); +# endif +# if UC3 || SAM + // For AVR32 and SAM GCC + // Specify that stdout and stdin should not be buffered. + setbuf(stdout, NULL); + setbuf(stdin, NULL); + // Note: Already the case in IAR's Normal DLIB default configuration + // and AVR GCC library: + // - printf() emits one character at a time. + // - getchar() requests only 1 byte to exit. +# endif +# endif +} + +/** + * \} + */ + +#endif // _STDIO_SERIAL_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/write.c b/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/write.c new file mode 100644 index 0000000..1e8f459 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/common/utils/stdio/write.c @@ -0,0 +1,147 @@ +/** + * \file + * + * \brief System-specific implementation of the \ref _write function used by + * the standard library. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include "compiler.h" + +/** + * \addtogroup group_common_utils_stdio + * + * \{ + */ + +volatile void *volatile stdio_base; +int (*ptr_put)(void volatile*, char); + + +#if ( defined(__ICCAVR32__) || defined(__ICCAVR__) || defined(__ICCARM__)) + +#include + +_STD_BEGIN + +#pragma module_name = "?__write" + +/*! \brief Writes a number of bytes, at most \a size, from the memory area + * pointed to by \a buffer. + * + * If \a buffer is zero then \ref __write performs flushing of internal buffers, + * if any. In this case, \a handle can be \c -1 to indicate that all handles + * should be flushed. + * + * \param handle File handle to write to. + * \param buffer Pointer to buffer to read bytes to write from. + * \param size Number of bytes to write. + * + * \return The number of bytes written, or \c _LLIO_ERROR on failure. + */ +size_t __write(int handle, const unsigned char *buffer, size_t size) +{ + size_t nChars = 0; + + if (buffer == 0) { + // This means that we should flush internal buffers. + return 0; + } + + // This implementation only writes to stdout and stderr. + // For all other file handles, it returns failure. + if (handle != _LLIO_STDOUT && handle != _LLIO_STDERR) { + return _LLIO_ERROR; + } + + for (; size != 0; --size) { + if (ptr_put(stdio_base, *buffer++) < 0) { + return _LLIO_ERROR; + } + ++nChars; + } + return nChars; +} + +_STD_END + + +#elif (defined(__GNUC__) && !XMEGA && !MEGA) + +int __attribute__((weak)) +_write (int file, const char *ptr, int len); + +int __attribute__((weak)) +_write (int file, const char *ptr, int len) +{ + int nChars = 0; + + if ((file != 1) && (file != 2) && (file!=3)) { + return -1; + } + + for (; len != 0; --len) { + if (ptr_put(stdio_base, *ptr++) < 0) { + return -1; + } + ++nChars; + } + return nChars; +} + +#elif (defined(__GNUC__) && (XMEGA || MEGA)) + +int _write (char c, int *f); + +int _write (char c, int *f) +{ + if (ptr_put(stdio_base, c) < 0) { + return -1; + } + return 1; +} +#endif + +/** + * \} + */ + diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.c b/skywave_atxmega128a1_final/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.c new file mode 100644 index 0000000..01f4bc6 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/boards/xmega_a1u_xplained_pro/board_init.c @@ -0,0 +1,76 @@ +/** + * \file + * + * \brief XMEGA-A1U Xplained Pro board initialization + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include +#include +#include + +void board_init(void) +{ + //Configure LED0 + ioport_configure_pin(LED0_PIN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + + //Configure SW0 + ioport_configure_pin(BUTTON_0_PIN, IOPORT_DIR_INPUT | IOPORT_PULL_UP); + + //Configure pins for OLED display + #ifdef CONF_BOARD_OLED_UG_2832HSWEG04 + ioport_configure_pin(EXT3_PIN_5,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + ioport_configure_pin(EXT3_PIN_10,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + ioport_configure_pin(EXT3_PIN_15,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + ioport_configure_pin(EXT3_PIN_16,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + ioport_configure_pin(EXT3_PIN_18,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + //This pin needs to be an output in order for SPI Master mode to work + ioport_configure_pin(EXT1_PIN_15,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); + #endif + + //Configure Rx and Tx pin on PORT E + #ifdef CONF_BOARD_ENABLE_USARTE0 + ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 3), IOPORT_DIR_OUTPUT + | IOPORT_INIT_HIGH); + ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 2), IOPORT_DIR_INPUT); + #endif +} diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h b/skywave_atxmega128a1_final/src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h new file mode 100644 index 0000000..3ec9961 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/boards/xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h @@ -0,0 +1,461 @@ +/** + * \file + * + * \brief XMEGA-A1U Xplained Pro board definition + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef XMEGA_A1U_XPLAINED_PRO_H_INCLUDED +#define XMEGA_A1U_XPLAINED_PRO_H_INCLUDED + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup group_common_boards + * \defgroup xmega_a1u_xplained_pro_group XMEGA-A1U Xplained Pro board + * + * @{ + */ + +void board_init(void); + +/** + * \defgroup xmega_a1u_xplained_pro_group Features + * + * Symbols that describe features and capabilities of the board. + * + * @{ + */ + +/** Name string macro */ +#define BOARD_NAME "XMEGA_A1U_XPLAINED_PRO" + +/** \name LED0 definitions + * @{ */ +#define LED0_PIN IOPORT_CREATE_PIN(PORTQ, 3) +#define LED0_ACTIVE false +#define LED0_INACTIVE !LED0_ACTIVE +/** @} */ + +/** \name SW0 definitions + * @{ */ +#define SW0_PIN IOPORT_CREATE_PIN(PORTQ, 2) +#define SW0_ACTIVE false +#define SW0_INACTIVE !SW0_ACTIVE +/** @} */ + +/** \name external osc definitions + * @{ */ +#define BOARD_XOSC_HZ 32768 +#define BOARD_XOSC_TYPE XOSC_TYPE_32KHZ +#define BOARD_XOSC_STARTUP_US 1000000 +/** @} */ + +/** + * \name LED #0 definitions + * + * Wrapper macros for LED0, to ensure common naming across all Xplained Pro + * boards. + * + * @{ */ +#define LED_0_NAME "LED0 (yellow)" +#define LED_0_PIN LED0_PIN +#define LED_0_ACTIVE LED0_ACTIVE +#define LED_0_INACTIVE LED0_INACTIVE +#define LED0_GPIO LED0_PIN +/** @} */ + +/** Number of on-board LEDs */ +#define LED_COUNT 1 + +/** + * \name Button #0 definitions + * + * Wrapper macros for SW0, to ensure common naming across all Xplained Pro + * boards. + * + * @{ */ +#define BUTTON_0_NAME "SW0" +#define BUTTON_0_PIN SW0_PIN +#define BUTTON_0_ACTIVE SW0_ACTIVE +#define BUTTON_0_INACTIVE SW0_INACTIVE +/** @} */ + +/** Number of on-board buttons */ +#define BUTTON_COUNT 1 + +/** \name Extension header #1 pin definitions + * @{ + */ +#define EXT1_PIN_3 IOPORT_CREATE_PIN(PORTA,0) +#define EXT1_PIN_4 IOPORT_CREATE_PIN(PORTA,4) +#define EXT1_PIN_5 IOPORT_CREATE_PIN(PORTE,6) +#define EXT1_PIN_6 IOPORT_CREATE_PIN(PORTE,7) +#define EXT1_PIN_7 IOPORT_CREATE_PIN(PORTE,1) +#define EXT1_PIN_8 IOPORT_CREATE_PIN(PORTE,0) +#define EXT1_PIN_9 IOPORT_CREATE_PIN(PORTR,0) +#define EXT1_PIN_10 IOPORT_CREATE_PIN(PORTR,1) +#define EXT1_PIN_11 IOPORT_CREATE_PIN(PORTC,0) +#define EXT1_PIN_12 IOPORT_CREATE_PIN(PORTC,1) +#define EXT1_PIN_13 IOPORT_CREATE_PIN(PORTC,2) +#define EXT1_PIN_14 IOPORT_CREATE_PIN(PORTC,3) +#define EXT1_PIN_15 IOPORT_CREATE_PIN(PORTC,4) +#define EXT1_PIN_16 IOPORT_CREATE_PIN(PORTC,5) +#define EXT1_PIN_17 IOPORT_CREATE_PIN(PORTC,6) +#define EXT1_PIN_18 IOPORT_CREATE_PIN(PORTC,7) +/** @} */ + +/** \name Extension header #1 pin definitions by function + * @{ + */ +#define EXT1_PIN_ADC_0 EXT1_PIN_3 +#define EXT1_PIN_ADC_1 EXT1_PIN_4 +#define EXT1_PIN_GPIO_0 EXT1_PIN_5 +#define EXT1_PIN_GPIO_1 EXT1_PIN_6 +#define EXT1_PIN_PWM_0 EXT1_PIN_7 +#define EXT1_PIN_PWM_1 EXT1_PIN_8 +#define EXT1_PIN_IRQ EXT1_PIN_9 +#define EXT1_PIN_I2C_SDA EXT1_PIN_11 +#define EXT1_PIN_I2C_SCL EXT1_PIN_12 +#define EXT1_PIN_UART_RX EXT1_PIN_13 +#define EXT1_PIN_UART_TX EXT1_PIN_14 +#define EXT1_PIN_SPI_SS_1 EXT1_PIN_10 +#define EXT1_PIN_SPI_SS_0 EXT1_PIN_15 +#define EXT1_PIN_SPI_MOSI EXT1_PIN_16 +#define EXT1_PIN_SPI_MISO EXT1_PIN_17 +#define EXT1_PIN_SPI_SCK EXT1_PIN_18 +/** @} */ + +/** \name Extension header #1 ADC definitions + * @{ + */ +#define EXT1_ADC_MODULE ADCA +#define EXT1_ADC_0_CHANNEL 4 +#define EXT1_ADC_1_CHANNEL 0 +/** @} */ + +/** \name Extension header #1 PWM definitions + * @{ + */ +#define EXT1_PWM_MODULE TCE0 +/** @} */ + + /** \name Extension header #1 SPI definitions + * @{ + */ +#define EXT1_SPI_MODULE &SPIC + +/** @} */ + +/** \name Extension header #1 TWI definitions + * @{ + */ +#define EXT1_TWI_MODULE TWIC +/** @} */ + +/** \name Extension header #1 USART definitions +* @{ +*/ +#define EXT1_USART_MODULE &USARTC0 +/** @} */ + + +/** \name Extension header #2 pin definitions + * @{ + */ +#define EXT2_PIN_3 IOPORT_CREATE_PIN(PORTA,1) +#define EXT2_PIN_4 IOPORT_CREATE_PIN(PORTA,6) +#define EXT2_PIN_5 IOPORT_CREATE_PIN(PORTB,4) +#define EXT2_PIN_6 IOPORT_CREATE_PIN(PORTB,5) +#define EXT2_PIN_7 IOPORT_CREATE_PIN(PORTE,5) +#define EXT2_PIN_8 IOPORT_CREATE_PIN(PORTE,4) +#define EXT2_PIN_9 IOPORT_CREATE_PIN(PORTB,6) +#define EXT2_PIN_10 IOPORT_CREATE_PIN(PORTB,7) +#define EXT2_PIN_11 IOPORT_CREATE_PIN(PORTF,0) +#define EXT2_PIN_12 IOPORT_CREATE_PIN(PORTF,1) +#define EXT2_PIN_13 IOPORT_CREATE_PIN(PORTF,2) +#define EXT2_PIN_14 IOPORT_CREATE_PIN(PORTF,3) +#define EXT2_PIN_15 IOPORT_CREATE_PIN(PORTF,4) +#define EXT2_PIN_16 IOPORT_CREATE_PIN(PORTC,5) +#define EXT2_PIN_17 IOPORT_CREATE_PIN(PORTC,6) +#define EXT2_PIN_18 IOPORT_CREATE_PIN(PORTC,7) +/** @} */ + +/** \name Extension header #2 pin definitions by function + * @{ + */ +#define EXT2_PIN_ADC_0 EXT2_PIN_3 +#define EXT2_PIN_ADC_1 EXT2_PIN_4 +#define EXT2_PIN_GPIO_0 EXT2_PIN_5 +#define EXT2_PIN_GPIO_1 EXT2_PIN_6 +#define EXT2_PIN_PWM_0 EXT2_PIN_7 +#define EXT2_PIN_PWM_1 EXT2_PIN_8 +#define EXT2_PIN_IRQ EXT2_PIN_9 +#define EXT2_PIN_I2C_SDA EXT2_PIN_11 +#define EXT2_PIN_I2C_SCL EXT2_PIN_12 +#define EXT2_PIN_UART_RX EXT2_PIN_13 +#define EXT2_PIN_UART_TX EXT2_PIN_14 +#define EXT2_PIN_SPI_SS_1 EXT2_PIN_10 +#define EXT2_PIN_SPI_SS_0 EXT2_PIN_15 +#define EXT2_PIN_SPI_MOSI EXT2_PIN_16 +#define EXT2_PIN_SPI_MISO EXT2_PIN_17 +#define EXT2_PIN_SPI_SCK EXT2_PIN_18 +/** @} */ + +/** \name Extension header #2 ADC definitions + * @{ + */ +#define EXT2_ADC_MODULE ADCA +#define EXT2_ADC_0_CHANNEL 6 +#define EXT2_ADC_1_CHANNEL 1 +/** @} */ + +/** \name Extension header #2 PWM definitions + * @{ + */ +#define EXT2_PWM_MODULE TCE1 +/** @} */ + + +/** \name Extension header #2 SPI definitions + * @{ + */ +#define EXT2_SPI_MODULE &SPIC + +/** @} */ + +/** \name Extension header #2 TWI definitions + * @{ + */ +#define EXT2_TWI_MODULE TWIF +/** @} */ + + /** \name Extension header #2 USART definitions + * @{ + */ +#define EXT2_USART_MODULE &USARTF0 +/** @} */ + +/** \name Extension header #3 pin definitions + * @{ + */ +#define EXT3_PIN_3 IOPORT_CREATE_PIN(PORTA,3) +#define EXT3_PIN_4 IOPORT_CREATE_PIN(PORTA,7) +#define EXT3_PIN_5 IOPORT_CREATE_PIN(PORTK,0) +#define EXT3_PIN_6 IOPORT_CREATE_PIN(PORTK,1) +#define EXT3_PIN_7 IOPORT_CREATE_PIN(PORTD,5) +#define EXT3_PIN_8 IOPORT_CREATE_PIN(PORTD,4) +#define EXT3_PIN_9 IOPORT_CREATE_PIN(PORTK,2) +#define EXT3_PIN_10 IOPORT_CREATE_PIN(PORTK,3) +#define EXT3_PIN_11 IOPORT_CREATE_PIN(PORTF,0) +#define EXT3_PIN_12 IOPORT_CREATE_PIN(PORTF,1) +#define EXT3_PIN_13 IOPORT_CREATE_PIN(PORTF,6) +#define EXT3_PIN_14 IOPORT_CREATE_PIN(PORTF,7) +#define EXT3_PIN_15 IOPORT_CREATE_PIN(PORTD,0) +#define EXT3_PIN_16 IOPORT_CREATE_PIN(PORTC,5) +#define EXT3_PIN_17 IOPORT_CREATE_PIN(PORTC,6) +#define EXT3_PIN_18 IOPORT_CREATE_PIN(PORTC,7) +/** @} */ + +/** \name Extension header #3 pin definitions by function + * @{ + */ +#define EXT3_PIN_ADC_0 EXT3_PIN_3 +#define EXT3_PIN_ADC_1 EXT3_PIN_4 +#define EXT3_PIN_GPIO_0 EXT3_PIN_5 +#define EXT3_PIN_GPIO_1 EXT3_PIN_6 +#define EXT3_PIN_PWM_0 EXT3_PIN_7 +#define EXT3_PIN_PWM_1 EXT3_PIN_8 +#define EXT3_PIN_IRQ EXT3_PIN_9 +#define EXT3_PIN_I2C_SDA EXT3_PIN_11 +#define EXT3_PIN_I2C_SCL EXT3_PIN_12 +#define EXT3_PIN_UART_RX EXT3_PIN_13 +#define EXT3_PIN_UART_TX EXT3_PIN_14 +#define EXT3_PIN_SPI_SS_1 EXT3_PIN_10 +#define EXT3_PIN_SPI_SS_0 EXT3_PIN_15 +#define EXT3_PIN_SPI_MOSI EXT3_PIN_16 +#define EXT3_PIN_SPI_MISO EXT3_PIN_17 +#define EXT3_PIN_SPI_SCK EXT3_PIN_18 +/** @} */ + +/** \name Extension header #3 ADC definitions + * @{ + */ +#define EXT3_ADC_MODULE ADCA +#define EXT3_ADC_0_CHANNEL 7 +#define EXT3_ADC_1_CHANNEL 3 +/** @} */ + +/** \name Extension header #3 PWM definitions + * @{ + */ +#define EXT3_PWM_MODULE TCD1 +/** @} */ + + +/** \name Extension header #3 SPI definitions + * @{ + */ +#define EXT3_SPI_MODULE &SPIC + +/** @} */ + +/** \name Extension header #3 TWI definitions + * @{ + */ +#define EXT3_TWI_MODULE TWIF +/** @} */ + +/** \name Extension header #3 USART definitions + * @{ + */ +#define EXT3_USART_MODULE &USARTF1 +/** @} */ + +/** \name Embedded debugger GPIO interface definitions + * @{ + */ +#define EDBG_GPIO0_PIN IOPORT_CREATE_PIN(PORTK,4) +#define EDBG_GPIO1_PIN IOPORT_CREATE_PIN(PORTK,5) +#define EDBG_GPIO2_PIN IOPORT_CREATE_PIN(PORTK,6) +#define EDBG_GPIO3_PIN IOPORT_CREATE_PIN(PORTK,7) +/** @} */ + +/** \name Embedded debugger USART interface definitions + * @{ + */ +#define EDBG_UART_MODULE &USARTE0 +/** @} */ + +/** \name Embedded debugger TWI interface definitions + * @{ + */ +#define EDBG_TWI_MODULE TWIC +/** @} */ + +/** \name EBI_DATA_ADDR definitions + * @{ + */ +#define EBI_DATA_ADDR_D7_A7_A15 IOPORT_CREATE_PIN(PORTJ,7) +#define EBI_DATA_ADDR_D6_A6_A14 IOPORT_CREATE_PIN(PORTJ,6) +#define EBI_DATA_ADDR_D5_A5_A13 IOPORT_CREATE_PIN(PORTJ,5) +#define EBI_DATA_ADDR_D4_A4_A12 IOPORT_CREATE_PIN(PORTJ,4) +#define EBI_DATA_ADDR_D3_A3_A11 IOPORT_CREATE_PIN(PORTJ,3) +#define EBI_DATA_ADDR_D2_A2_A10 IOPORT_CREATE_PIN(PORTJ,2) +#define EBI_DATA_ADDR_D1_A1_A9 IOPORT_CREATE_PIN(PORTJ,1) +#define EBI_DATA_ADDR_D0_A0_A8 IOPORT_CREATE_PIN(PORTJ,0) +/** @} */ + +/** \name EBI_CTRL_ADDR definitions + * @{ + */ +#define EBI_CTRL_ADDR_ALE1 IOPORT_CREATE_PIN(PORTH,2) +#define EBI_CTRL_ADDR_ALE2 IOPORT_CREATE_PIN(PORTH,3) +#define EBI_CTRL_ADDR_WE IOPORT_CREATE_PIN(PORTH,0) +#define EBI_CTRL_ADDR_RE IOPORT_CREATE_PIN(PORTH,1) +#define EBI_CTRL_ADDR_CS IOPORT_CREATE_PIN(PORTH,6) +#define EBI_CTRL_ADDR_A18 IOPORT_CREATE_PIN(PORTK,7) +#define EBI_CTRL_ADDR_A17 IOPORT_CREATE_PIN(PORTH,5) +#define EBI_CTRL_ADDR_A16 IOPORT_CREATE_PIN(PORTH,4) +/** @} */ + +/** \name LCD_CTRL definitions + * @{ + */ +#define LCD_BACKLIGHT_PWM IOPORT_CREATE_PIN(PORTF,5) +#define LCD_DISPLAY_CS IOPORT_CREATE_PIN(PORTH,7) +#define LCD_DISPLAY_ENABLE IOPORT_CREATE_PIN(PORTK,5) +#define LCD_DISPLAY_RESET IOPORT_CREATE_PIN(PORTA,5) +#define LCD_DISPLAY_WE IOPORT_CREATE_PIN(PORTH,0) +#define LCD_DISPLAY_RE IOPORT_CREATE_PIN(PORTH,1) +#define LCD_TWI_SDA IOPORT_CREATE_PIN(PORTC,0) +#define LCD_TWI_SCL IOPORT_CREATE_PIN(PORTC,1) +#define LCD_IRQ1 IOPORT_CREATE_PIN(PORTK,4) +#define LCD_IRQ2 IOPORT_CREATE_PIN(PORTK,6) +#define LCD_SPI_MOSI IOPORT_CREATE_PIN(PORTC,5) +#define LCD_SPI_MISO IOPORT_CREATE_PIN(PORTC,6) +#define LCD_SPI_SCK IOPORT_CREATE_PIN(PORTC,7) +#define LCD_SPI_CS IOPORT_CREATE_PIN(PORTB,1) +/** @} */ + +/** \name AT86RFX definitions + * @{ + */ +#define AT86RFX_SPI EXT1_SPI_MODULE +#define AT86RFX_RST_PIN EXT1_PIN_7 +#define AT86RFX_MISC_PIN EXT1_PIN_12 +#define AT86RFX_IRQ_PIN EXT1_PIN_9 +#define AT86RFX_SLP_PIN EXT1_PIN_10 +#define AT86RFX_SPI_CS EXT1_PIN_15 +#define AT86RFX_SPI_MOSI EXT1_PIN_16 +#define AT86RFX_SPI_MISO EXT1_PIN_17 +#define AT86RFX_SPI_SCK EXT1_PIN_18 +#define AT86RFX_CSD EXT1_PIN_5 +#define AT86RFX_CPS EXT1_PIN_8 +/** @} */ + +/*! \name SPI Connections of external AT45DBX Data Flash Memory + * + * This is mainly used for proper board compilation + * + */ + +//! @{ +#define AT45DBX_SPI &SPIC +#define AT45DBX_CS EXT1_PIN_GPIO_0 +#define AT45DBX_MASTER_SCK EXT1_PIN_SPI_SCK // SCK as output +#define AT45DBX_MASTER_SS EXT1_PIN_SPI_SS_1 // SS as output +#define AT45DBX_MASTER_MOSI EXT1_PIN_SPI_MOSI // MOSI as output +#define AT45DBX_MASTER_MISO EXT1_PIN_SPI_MISO // MISO as input +#define AT45DBX_SPI_CLK_MASK SYSCLK_PORT_C +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* XMEGA_A1U_XPLAINED_PRO_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/adc.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/adc.c new file mode 100644 index 0000000..1396d27 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/adc.c @@ -0,0 +1,299 @@ +/** + * \file + * + * \brief AVR XMEGA Analog to Digital Converter driver + * + * Copyright (C) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include +#include + +/** + * \ingroup adc_module_group + * @{ + */ + +/** \name ADC interrupt callback function */ +/** @{ */ +#ifdef ADCA + +/** + * \internal + * \brief ADC A enable counter + * + * This is used to ensure that ADC A is not inadvertently disabled when its + * module or channel configurations are updated. + */ +static uint8_t adca_enable_count; + +# ifdef CONFIG_ADC_CALLBACK_ENABLE + +/** + * \internal + * \brief ADC A interrupt callback function pointer + */ +adc_callback_t adca_callback; + +# endif +#endif + +#ifdef ADCB + +/** + * \internal + * \brief ADC B enable counter + * + * This is used to ensure that ADC B is not inadvertently disabled when its + * module or channel configurations are updated. + */ +static uint8_t adcb_enable_count; + +# ifdef CONFIG_ADC_CALLBACK_ENABLE + +/** + * \internal + * \brief ADC B interrupt callback function pointer + */ +adc_callback_t adcb_callback; + +# endif +#endif + +#if defined(CONFIG_ADC_CALLBACK_ENABLE) || defined(__DOXYGEN__) + +/** + * \brief Set ADC interrupt callback function + * + * Sets a new callback function for interrupts on the specified ADC. + * + * \param adc Pointer to ADC module. + * \param callback Pointer to the callback function to set. + */ +void adc_set_callback(ADC_t *adc, adc_callback_t callback) +{ + irqflags_t flags; + + Assert(callback); + + flags = cpu_irq_save(); + +#ifdef ADCA + if ((uintptr_t)adc == (uintptr_t)&ADCA) { + adca_callback = callback; + } else +#endif + +#ifdef ADCB + if ((uintptr_t)adc == (uintptr_t)&ADCB) { + adcb_callback = callback; + } else +#endif + + { + Assert(0); + } + + cpu_irq_restore(flags); +} + +#endif /* CONFIG_ADC_CALLBACK_ENABLE */ + +/** @} */ + +/** \name Internal functions for driver */ +/** @{ */ + +/** + * \internal + * \brief Enable peripheral clock for ADC + * + * Checks if the enable count for the ADC is zero, then increments it. If the + * count was zero, the peripheral clock is enabled. Otherwise, it is already + * enabled. + * + * \param adc Pointer to ADC module. + */ +void adc_enable_clock(ADC_t *adc); + +void adc_enable_clock(ADC_t *adc) +{ +#ifdef ADCA + if ((uintptr_t)adc == (uintptr_t)(&ADCA)) { + Assert(adca_enable_count < 0xff); + if (!adca_enable_count++) { + sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC); + } + } else +#endif + +#ifdef ADCB + if ((uintptr_t)adc == (uintptr_t)(&ADCB)) { + Assert(adcb_enable_count < 0xff); + if (!adcb_enable_count++) { + sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC); + } + } else +#endif + + { + Assert(0); + } +} + +/** + * \internal + * \brief Disable peripheral clock for ADC + * + * Decrements the enable count for the ADC, then disables its peripheral clock + * if the count hit zero. If the count did not hit zero, it indicates the ADC is + * enabled. + * + * \param adc Pointer to ADC module + */ +void adc_disable_clock(ADC_t *adc); + +void adc_disable_clock(ADC_t *adc) +{ +#ifdef ADCA + if ((uintptr_t)adc == (uintptr_t)(&ADCA)) { + Assert(adca_enable_count); + if (!--adca_enable_count) { + sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_ADC); + } + } else +#endif + +#ifdef ADCB + if ((uintptr_t)adc == (uintptr_t)(&ADCB)) { + Assert(adcb_enable_count); + if (!--adcb_enable_count) { + sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_ADC); + } + } else +#endif + + { + Assert(0); + } +} + +/** @} */ + +/** \name ADC module management */ +/** @{ */ + +/** + * \brief Enable ADC + * + * Enables the ADC and locks IDLE mode for the sleep manager. + * + * \param adc Pointer to ADC module + * + * \note To ensure accurate conversions, please wait for at least + * the specified start-up time between enabling the ADC module, and starting + * a conversion. For most XMEGA devices the start-up time is specified + * to be a maximum of 24 ADC clock cycles. Please verify the start-up time for + * the device in use. + */ +void adc_enable(ADC_t *adc) +{ + irqflags_t flags = cpu_irq_save(); + adc_enable_clock(adc); + adc->CTRLA |= ADC_ENABLE_bm; + cpu_irq_restore(flags); + + sleepmgr_lock_mode(SLEEPMGR_IDLE); +} + +/** + * \brief Disable ADC + * + * Disables the ADC and unlocks IDLE mode for the sleep manager. + * + * \param adc Pointer to ADC module + */ +void adc_disable(ADC_t *adc) +{ + irqflags_t flags = cpu_irq_save(); + adc->CTRLA &= ~ADC_ENABLE_bm; + adc_disable_clock(adc); + cpu_irq_restore(flags); + + sleepmgr_unlock_mode(SLEEPMGR_IDLE); +} + +/** + * \brief Check if the ADC is enabled + * + * \param adc Pointer to ADC module. + * + * \retval true if ADC is enabled. + * \retval false if ADC is disabled. + */ +bool adc_is_enabled(ADC_t *adc) +{ + /* It is sufficient to return the state of the ADC enable counters + * since all driver functions that change the counts are protected + * against interrupts and only the enable/disable functions leave the + * counts incremented/decremented upon return. + */ +#ifdef ADCA + if ((uintptr_t)adc == (uintptr_t)&ADCA) { + return adca_enable_count; + } else +#endif + +#ifdef ADCB + if ((uintptr_t)adc == (uintptr_t)&ADCB) { + return adcb_enable_count; + } else +#endif + + { + Assert(0); + return false; + } +} + +/** @} */ + +/** @} */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/adc.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/adc.h new file mode 100644 index 0000000..60ff4ee --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/adc.h @@ -0,0 +1,2334 @@ +/** + * \file + * + * \brief AVR XMEGA Analog to Digital Converter driver + * + * Copyright (C) 2010-2017 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef ADC_H +#define ADC_H + +#include +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Fix header error in ADC_CH_t structure about missing SCAN register */ +#ifndef ADC_CH_OFFSET_gp +# define ADC_CH_OFFSET_gp 4 /* Positive MUX setting offset group position. */ +# if XMEGA_A || XMEGA_D +# ifdef __ICCAVR__ +# define SCAN reserved_0x06 +# else +# define SCAN reserved_0x6 +# endif +# endif +#endif + +/* Fix header error */ +#define ADC_EVACT_SYNCSWEEP_gc (0x06 << 0) +#define ADC_REFSEL_INTVCC_gc (0x01 << 4) +#define ADC_REFSEL_VCCDIV2_gc (0x04 << 4) +#define ADC_CH_GAIN_DIV2_gc (0x07 << 2) +#if (!XMEGA_A) +/* ADC.CTRLB bit masks and bit positions */ +# define ADC_CURRLIMIT_NO_gc (0x00 << 5) +# define ADC_CURRLIMIT_LOW_gc (0x01 << 5) +# define ADC_CURRLIMIT_MED_gc (0x02 << 5) +# define ADC_CURRLIMIT_HIGH_gc (0x03 << 5) +#endif +#if (!XMEGA_A) && (!defined ADC_CURRLIMIT_gm) +/* ADC.CTRLB bit masks and bit positions */ +# define ADC_CURRLIMIT_gm 0x60 /* Current limit group mask. */ +#endif +#if (!XMEGA_E) +/* Negative input multiplexer selection without gain */ +enum ADC_CH_MUXNEG_MODE10_enum +{ + ADC_CH_MUXNEG_MODE10_PIN0_gc = (0x00<<0), /* Input pin 0 */ + ADC_CH_MUXNEG_MODE10_PIN1_gc = (0x01<<0), /* Input pin 1 */ + ADC_CH_MUXNEG_MODE10_PIN2_gc = (0x02<<0), /* Input pin 2 */ + ADC_CH_MUXNEG_MODE10_PIN3_gc = (0x03<<0), /* Input pin 3 */ + ADC_CH_MUXNEG_MODE10_GND_gc = (0x05<<0), /* PAD ground */ + ADC_CH_MUXNEG_MODE10_INTGND_gc = (0x07<<0), /* Internal ground */ +} ; + +/* Negative input multiplexer selection with gain */ +enum ADC_CH_MUXNEG_MODE11_enum +{ + ADC_CH_MUXNEG_MODE11_PIN4_gc = (0x00<<0), /* Input pin 4 */ + ADC_CH_MUXNEG_MODE11_PIN5_gc = (0x01<<0), /* Input pin 5 */ + ADC_CH_MUXNEG_MODE11_PIN6_gc = (0x02<<0), /* Input pin 6 */ + ADC_CH_MUXNEG_MODE11_PIN7_gc = (0x03<<0), /* Input pin 7 */ + ADC_CH_MUXNEG_MODE11_INTGND_gc = (0x04<<0), /* Internal ground */ + ADC_CH_MUXNEG_MODE11_GND_gc = (0x07<<0), /* PAD ground */ +} ; +#endif + +/** + * \defgroup adc_group Analog to Digital Converter (ADC) + * + * See \ref adc_quickstart. + * + * This is a driver for the AVR XMEGA ADC. It provides functions for enabling, + * disabling and configuring the ADC modules and their individual channels. + * + * The driver API is split in two parts: + * - \ref adc_channel_group + * - \ref adc_module_group + * + * Both APIs use structures that contain the configuration. These structures + * must be set up before the configuration is written to either an ADC module or + * one of their channels. + * + * After the ADC has been configured it must be enabled before any conversions + * may be performed. To ensure accurate conversions, please wait for at least + * the specified start-up time between enabling the ADC module, and starting + * a conversion. For most XMEGA devices the start-up time is specified + * to be a maximum of 24 ADC clock cycles. Please verify the start-up time for + * the device in use. + * + * \note Not all of the documented functions are available on all devices. This + * is due to differences in the ADC feature set. Refer to the device manual and + * datasheet for details on which features are available for a specific device. + * + * \note The functions for creating/changing configurations are not protected + * against interrupts. The functions that read from or write to the ADC's + * registers are protected unless otherwise noted. + * + * \section dependencies Dependencies + * This driver depends on the following modules: + * - \ref sysclk_group for peripheral clock control. + * - \ref sleepmgr_group for setting allowed sleep mode. + * - \ref nvm_group for getting factory calibration data. + * - \ref interrupt_group for ISR definition and disabling interrupts during + * critical code sections. + * @{ + */ + +/** + * \defgroup adc_module_group ADC module + * + * Management and configuration functions for the ADC module. + * + * The API functions and definitions can be divided in three groups: + * - interrupt callback: configure and set interrupt callback function. + * - module management: direct access for enabling and disabling the ADC, + * starting conversions, getting interrupt flags, etc. + * - module configuration: create/change configurations and write/read them + * to/from an ADC. + * + * @{ + */ + +/** + * \def ADC_NR_OF_CHANNELS + * \brief Number of channels per ADC + */ +#if XMEGA_A || XMEGA_AU || defined(__DOXYGEN__) +# define ADC_NR_OF_CHANNELS 4 +#elif XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E +# define ADC_NR_OF_CHANNELS 1 +#endif + +/** ADC configuration */ +struct adc_config { +#if ADC_NR_OF_CHANNELS > 1 + /* DMA group request is stored in CTRLA */ + uint8_t ctrla; +#endif + uint8_t ctrlb; + uint8_t refctrl; + uint8_t evctrl; + uint8_t prescaler; + uint16_t cmp; +#if XMEGA_E + /* XMEGA E sample time value stored in SAMPCTRL */ + uint8_t sampctrl; +#endif +}; + +/** + * \name Calibration data addresses + * \note The temperature sensor calibration is sampled at 85 degrees Celsius + * with unsigned, 12-bit conversion. + */ +/** @{ */ + +/** ADC A, calibration byte 0. */ +#define ADCACAL0 offsetof(NVM_PROD_SIGNATURES_t, ADCACAL0) +/** ADC A, calibration byte 1. */ +#define ADCACAL1 offsetof(NVM_PROD_SIGNATURES_t, ADCACAL1) +/** ADC B, calibration byte 0. */ +#define ADCBCAL0 offsetof(NVM_PROD_SIGNATURES_t, ADCBCAL0) +/** ADC B, calibration byte 1. */ +#define ADCBCAL1 offsetof(NVM_PROD_SIGNATURES_t, ADCBCAL1) +/** Temperature sensor calibration byte 0. */ +#define TEMPSENSE0 offsetof(NVM_PROD_SIGNATURES_t, TEMPSENSE0) +/** Temperature sensor calibration byte 1. */ +#define TEMPSENSE1 offsetof(NVM_PROD_SIGNATURES_t, TEMPSENSE1) +/** Temperature at which TEMPSENSE1/TEMPSENSE0 is measured. */ +#define HOTTEMP offsetof(NVM_PROD_SIGNATURES_t, HOTTEMP) +/** Temperature at which TEMPSENSE3/TEMPSENSE2 is measured. */ +#define ROOMTEMP offsetof(NVM_PROD_SIGNATURES_t, ROOMTEMP) +/** Temperature sensor calibration byte 2. */ +#define TEMPSENSE2 offsetof(NVM_PROD_SIGNATURES_t, TEMPSENSE2) +/** Temperature sensor calibration byte 3. */ +#define TEMPSENSE3 offsetof(NVM_PROD_SIGNATURES_t, TEMPSENSE3) +/** @} */ + +/** \brief ADC calibration data */ +enum adc_calibration_data { + /** ADC A pipeline calibration data. */ + ADC_CAL_ADCA, + /** ADC B pipeline calibration data. */ + ADC_CAL_ADCB, + /** + * \brief Temperature sensor calibration data. + * \note 12-bit unsigned, measured at 85 degrees Celsius, equivalent to + * 358.15 kelvin. + * + * For AVR XMEGA E devices, the calibration reading is 12 Bit signed. + * AVR XMEGA E production signature row contains data for two + * calibration points. Each calibration point has one byte for + * storing the temperature at which the internal temperature sensor + * is measured and two bytes for the corresponding ADC reading. + */ + ADC_CAL_TEMPSENSE, + /** Normally one calibration point is taken at 85 Deg C, + * but the exact value in Deg C is given in the HOTTEMP signature row. + */ + ADC_CAL_HOTTEMP, + /** ADC reading at ROOMTEMP in stored in TEMPSENSE2. */ + ADC_CAL_TEMPSENSE2, + /** The room temperature (in Deg C) measured during device manufacturing. + */ + ADC_CAL_ROOMTEMP +}; + +/** \name ADC channel masks */ +/** @{ */ + +#define ADC_CH0 (1U << 0) /**< ADC channel 0. */ + +#if XMEGA_A || XMEGA_AU || defined(__DOXYGEN__) +# define ADC_CH1 (1U << 1) /**< ADC channel 1. */ +# define ADC_CH2 (1U << 2) /**< ADC channel 2. */ +# define ADC_CH3 (1U << 3) /**< ADC channel 3. */ +#endif + +/** @} */ + +/** \name Internal ADC input masks */ +/** @{ */ + +#define ADC_INT_TEMPSENSE ADC_TEMPREF_bm /**< Temperature sensor. */ +#define ADC_INT_BANDGAP ADC_BANDGAP_bm /**< Bandgap reference. */ + +/** @} */ + +/** + * \brief ADC conversion trigger settings + * + * \note The choice in conversion triggers varies between device families. + * Refer to the device manual for detailed information. + */ +enum adc_trigger { + /** Manually triggered conversions */ + ADC_TRIG_MANUAL, + + /** Freerun mode conversion */ + ADC_TRIG_FREERUN, + + /** + * \brief Event-triggered conversions on individual channels + * Pairs each event channel with an ADC channel. + * \note The maximum base event channel that can be used is determined + * by the number of channels to trigger conversions on. + */ + ADC_TRIG_EVENT_SINGLE, + +#if ADC_NR_OF_CHANNELS > 1 + /** + * \brief Freerunning conversion sweeps + * \note These will start as soon as the ADC is enabled. + */ + ADC_TRIG_FREERUN_SWEEP, + + /** + * \brief Event-triggered conversion sweeps + * \note Only the base event channel is used in this mode. + */ + ADC_TRIG_EVENT_SWEEP, +#endif + + /** + * \brief Event-triggered, synchronized conversion sweeps + * \note Only the base event channel is used in this mode. + */ + ADC_TRIG_EVENT_SYNCSWEEP, +}; + +/** \brief ADC signedness settings */ +enum adc_sign { + ADC_SIGN_OFF, /**< Unsigned conversions. */ + ADC_SIGN_ON = ADC_CONMODE_bm, /**< Signed conversions. */ +}; + +/** \brief ADC resolution settings */ +enum adc_resolution { + /** 8-bit resolution, right-adjusted. */ + ADC_RES_8 = ADC_RESOLUTION_8BIT_gc, + /** 12-bit resolution, right-adjusted. */ + ADC_RES_12 = ADC_RESOLUTION_12BIT_gc, + /** 12-bit resolution, left-adjusted. */ + ADC_RES_12_LEFT = ADC_RESOLUTION_LEFT12BIT_gc, +#if XMEGA_E + + /** More than 12-bit resolution. + * Must be used when adcch_enable_averaging() or + * adcch_enable_oversampling() is used. + */ + ADC_RES_MT12 = ADC_RESOLUTION_MT12BIT_gc, +#endif +}; + +/** + * \brief ADC reference settings + * + * \note The choice in voltage reference varies between device families. + * Refer to the device manual for detailed information. + */ +enum adc_reference { + /** Internal 1 V from bandgap reference. */ + ADC_REF_BANDGAP = ADC_REFSEL_INT1V_gc, + /** VCC divided by 1.6. */ + ADC_REF_VCC = ADC_REFSEL_INTVCC_gc, + /** External reference on AREFA pin. */ + ADC_REF_AREFA = ADC_REFSEL_AREFA_gc, +#if XMEGA_E + /** External reference on AREFD pin. */ + ADC_REF_AREFD = ADC_REFSEL_AREFD_gc, +#else + /** External reference on AREFB pin. */ + ADC_REF_AREFB = ADC_REFSEL_AREFB_gc, +#endif + /** VCC divided by 2. */ + ADC_REF_VCCDIV2 = ADC_REFSEL_VCCDIV2_gc, +}; + +/** \name Internal functions for driver */ +/** @{ */ + +/** + * \internal + * \brief Get ADC channel pointer from channel mask + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * + * \return Pointer to ADC channel + */ +__always_inline static ADC_CH_t *adc_get_channel( + ADC_t *adc, uint8_t ch_mask) +{ + uint8_t index = 0; + + Assert(ch_mask & ((1 << ADC_NR_OF_CHANNELS) - 1)); + + /* Use a conditional inline ctz for optimization. */ +#if ADC_NR_OF_CHANNELS > 4 + if (!(ch_mask & 0x0f)) { + index += 4; + ch_mask >>= 4; + } +#endif +#if ADC_NR_OF_CHANNELS > 2 + if (!(ch_mask & 0x03)) { + index += 2; + ch_mask >>= 2; + } +#endif +#if ADC_NR_OF_CHANNELS > 1 + if (!(ch_mask & 0x01)) { + index++; + } +#endif + + return (ADC_CH_t *)(&adc->CH0 + index); +} + +/** @} */ + +#if defined(CONFIG_ADC_CALLBACK_ENABLE) || defined(__DOXYGEN__) +/** \name ADC interrupt callback function */ +/** @{ */ + +/** + * \def CONFIG_ADC_CALLBACK_ENABLE + * \brief Configuration symbol to enable callback on ADC interrupts + * + * Define this symbol in \ref conf_adc.h to enable callbacks on ADC interrupts. + * A function of type \ref adc_callback_t must be defined by the user, and the + * driver be configured to use it with \ref adc_set_callback. + */ +#if !defined(CONFIG_ADC_CALLBACK_ENABLE) || defined(__DOXYGEN__) +# define CONFIG_ADC_CALLBACK_ENABLE +#endif + +/** + * \def CONFIG_ADC_CALLBACK_TYPE + * \brief Configuration symbol for datatype of result parameter for callback + * + * Define the datatype of the ADC conversion result parameter for callback + * functions. This should be defined according to the signedness and resolution + * of the conversions: + * - \c int16_t for signed, 12-bit + * - \c uint16_t for unsigned, 12-bit (the default type) + * - \c int8_t for signed, 8-bit + * - \c uint8_t for unsigned, 8-bit + * + * Define this in \ref conf_adc.h if the default datatype is not desired. + */ +#if !defined(CONFIG_ADC_CALLBACK_TYPE) || defined(__DOXYGEN__) +# define CONFIG_ADC_CALLBACK_TYPE uint16_t +#endif + +/** Datatype of ADC conversion result parameter for callback */ +typedef CONFIG_ADC_CALLBACK_TYPE adc_result_t; + +/** + * \brief ADC interrupt callback function pointer + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * \param res ADC conversion result. + */ +typedef void (*adc_callback_t)(ADC_t *adc, uint8_t ch_mask, adc_result_t res); + +void adc_set_callback(ADC_t *adc, adc_callback_t callback); + +/** @} */ +#endif + +/** \name ADC module management */ +/** @{ */ + +void adc_enable(ADC_t *adc); +void adc_disable(ADC_t *adc); +bool adc_is_enabled(ADC_t *adc); + +/** + * \brief Start one-shot conversion on ADC channel(s) + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (These can be OR'ed + * together.) + * + * \note The ADC must be enabled for this function to have any effect. + */ +static inline void adc_start_conversion(ADC_t *adc, uint8_t ch_mask) +{ + irqflags_t flags = cpu_irq_save(); +#if !XMEGA_E + adc->CTRLA |= ch_mask << ADC_CH0START_bp; +#else + adc->CTRLA |= ch_mask << ADC_START_bp; +#endif + cpu_irq_restore(flags); +} + +/** + * \brief Get result from ADC channel + * + * Gets the latest conversion result from the ADC channel. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * + * \return Latest conversion result of ADC channel. Signedness does not matter. + * + * \note This macro does not protect the 16-bit read from interrupts. If an + * interrupt may do a 16-bit read or write to the ADC while this macro is + * executing, interrupts \a must be temporarily disabled to avoid corruption of + * the read. + */ +#define adc_get_result(adc, ch_mask) (adc_get_channel(adc, ch_mask)->RES) + +/** + * \brief Get signed result from ADC channel + * + * Returns the latest conversion result from the ADC channel as a signed type, + * with interrupt protection of the 16-bit read. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * + * \return Latest conversion result of ADC channel, as signed 16-bit integer. + */ +static inline int16_t adc_get_signed_result(ADC_t *adc, uint8_t ch_mask) +{ + int16_t val; + irqflags_t flags; + ADC_CH_t *adc_ch; + + adc_ch = adc_get_channel(adc, ch_mask); + + flags = cpu_irq_save(); + val = adc_ch->RES; + cpu_irq_restore(flags); + + return val; +} + +/** + * \brief Get unsigned result from ADC channel + * + * Returns the latest conversion result from the ADC channel as an unsigned + * type, with interrupt protection of the 16-bit read. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * + * \return Latest conversion result of ADC channel, as unsigned 16-bit integer. + */ +static inline uint16_t adc_get_unsigned_result(ADC_t *adc, uint8_t ch_mask) +{ + uint16_t val; + irqflags_t flags; + ADC_CH_t *adc_ch; + + adc_ch = adc_get_channel(adc, ch_mask); + + flags = cpu_irq_save(); + val = adc_ch->RES; + cpu_irq_restore(flags); + + return val; +} + +/** + * \brief Get interrupt flag of ADC channel(s) + * + * Returns the interrupt flag of the masked channels. The meaning of the + * interrupt flag depends on what mode the individual channels are in. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (These can be OR'ed + * together.) + * + * \return Mask with interrupt flags. + */ +static inline uint8_t adc_get_interrupt_flag(ADC_t *adc, uint8_t ch_mask) +{ + return (adc->INTFLAGS >> ADC_CH0IF_bp) & ch_mask; +} + +/** + * \brief Clear interrupt flag of ADC channel(s) + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (These can be OR'ed + * together.) + * + * \note The ADC must be enabled for this function to have any effect. + */ +static inline void adc_clear_interrupt_flag(ADC_t *adc, uint8_t ch_mask) +{ + adc->INTFLAGS = ch_mask << ADC_CH0IF_bp; +} + +/** + * \brief Wait for interrupt flag of ADC channel(s) + * + * Waits for the interrupt flag of the specified channel(s) to be set, then + * clears it before returning. If several channels are masked, the function will + * wait for \a all interrupt flags to be set. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (These can be OR'ed + * together.) + */ +static inline void adc_wait_for_interrupt_flag(ADC_t *adc, uint8_t ch_mask) +{ + do { } while (adc_get_interrupt_flag(adc, ch_mask) != ch_mask); + adc_clear_interrupt_flag(adc, ch_mask); +} + +/** + * \brief Flush the ADC + * + * Forces the ADC to abort any ongoing conversions and restart its clock on the + * next peripheral clock cycle. Pending conversions are started after the + * clock reset. + * + * \param adc Pointer to ADC module. + * + * \note The ADC must be enabled for this function to have any effect. + */ +static inline void adc_flush(ADC_t *adc) +{ + irqflags_t flags = cpu_irq_save(); + adc->CTRLA |= ADC_FLUSH_bm; + cpu_irq_restore(flags); +} + +/** + * \brief Set compare value directly to ADC + * + * Sets the compare value directly to the ADC, for quick access while the ADC is + * enabled. + * + * \param adc Pointer to ADC module. + * \param val Compare value to set, either signed or unsigned. + * + * \note The ADC must be enabled for this function to have any effect. + */ +#define adc_set_compare_value(adc, val) \ + do { \ + irqflags_t ATPASTE2(adc_flags, __LINE__) = cpu_irq_save(); \ + (adc)->CMP = val; \ + cpu_irq_restore(ATPASTE2(adc_flags, __LINE__)); \ + } \ + while (0) + +/** + * \brief Get compare value directly from ADC + * + * Gets the compare value directly from the ADC, for quick access while the ADC + * is enabled. + * + * \param adc Pointer to ADC module. + * + * \return Current compare value of the ADC. Signedness does not matter. + * + * \note This macro does not protect the 16-bit read from interrupts. If an + * interrupt may do a 16-bit read or write to the ADC while this macro is + * executing, interrupts \a must be temporarily disabled to avoid corruption of + * the read. + */ +#define adc_get_compare_value(adc) ((adc)->CMP) + +/** + * \brief Get signed compare value directly from ADC + * + * Gets the signed compare value directly from the ADC, with interrupt + * protection of the 16-bit read, for quick access while the ADC is enabled. + * + * \param adc Pointer to ADC module. + */ +static inline int16_t adc_get_signed_compare_value(ADC_t *adc) +{ + int16_t val; + irqflags_t flags; + + flags = cpu_irq_save(); + val = adc->CMP; + cpu_irq_restore(flags); + + return val; +} + +/** + * \brief Get unsigned compare value directly from ADC + * + * Gets the unsigned compare value directly from the ADC, with interrupt + * protection of the 16-bit read, for quick access while the ADC is enabled. + * + * \param adc Pointer to ADC module. + */ +static inline uint16_t adc_get_unsigned_compare_value(ADC_t *adc) +{ + uint16_t val; + irqflags_t flags; + + flags = cpu_irq_save(); + val = adc->CMP; + cpu_irq_restore(flags); + + return val; +} + +#if XMEGA_E + +/** + * \brief Set sample time value directly to ADC + * + * Sets the sample time value directly to the ADC, for quick access while the + * ADC is enabled. + * + * \param adc Pointer to ADC module. + * \param val Sample time value to set. + * + * \note The ADC must be enabled for this function to have any effect. + */ +static inline void adc_set_sample_value(ADC_t *adc, uint8_t val) +{ + irqflags_t flags; + + flags = cpu_irq_save(); + adc->SAMPCTRL = (uint8_t)val; + cpu_irq_restore(flags); +} + +/** + * \brief Get sample time value directly from ADC + * + * Gets the sample time value directly from the ADC, for quick access while the + * ADC is enabled. + * + * \param adc Pointer to ADC module. + * + * \return Current sample time value of the ADC. + * + * \note This macro does not protect the 8-bit read from interrupts. If an + * interrupt may do a 8-bit read or write to the ADC while this macro is + * executing, interrupts \a must be temporarily disabled to avoid corruption of + * the read. + */ +static inline uint8_t adc_get_sample_value(ADC_t *adc) +{ + return adc->SAMPCTRL; +} + +#endif + +/** + * \brief Get calibration data + * + * \param cal Identifier for calibration data to get. + */ +static inline uint16_t adc_get_calibration_data(enum adc_calibration_data cal) +{ + uint16_t data; + + switch (cal) { +#ifdef ADCA + case ADC_CAL_ADCA: + data = nvm_read_production_signature_row(ADCACAL1); + data <<= 8; + data |= nvm_read_production_signature_row(ADCACAL0); + break; +#endif + +#ifdef ADCB + case ADC_CAL_ADCB: + data = nvm_read_production_signature_row(ADCBCAL1); + data <<= 8; + data |= nvm_read_production_signature_row(ADCBCAL0); + break; +#endif + +#if defined(ADCA) || defined(ADCB) + case ADC_CAL_TEMPSENSE: + data = nvm_read_production_signature_row(TEMPSENSE1); + data <<= 8; + data |= nvm_read_production_signature_row(TEMPSENSE0); + break; +#endif + +#if XMEGA_E + case ADC_CAL_HOTTEMP: + data = nvm_read_production_signature_row(HOTTEMP); + break; + + case ADC_CAL_ROOMTEMP: + data = nvm_read_production_signature_row(ROOMTEMP); + break; + + case ADC_CAL_TEMPSENSE2: + data = nvm_read_production_signature_row(TEMPSENSE3); + data <<= 8; + data |= nvm_read_production_signature_row(TEMPSENSE2); + break; +#endif + + default: + Assert(0); + data = 0; + } + + return data; +} + +/** @} */ + +/** \name ADC module configuration */ +/** @{ */ + +void adc_write_configuration(ADC_t *adc, const struct adc_config *conf); +void adc_read_configuration(ADC_t *adc, struct adc_config *conf); + +/** + * \brief Set ADC prescaler to get desired clock rate + * + * Sets the ADC prescaling so that its clock rate becomes _at most_ + * \a clk_adc_hz. This is done by computing the ratio of the peripheral clock + * rate to the desired ADC clock rate, and rounding it upward to the nearest + * prescaling factor. + * + * \param conf Pointer to ADC module configuration. + * \param clk_adc Desired ADC clock rate. + * + * \note The sample rate is not determined solely by the ADC clock rate for all + * devices. Setting the current limit mode on some devices will also affect the + * maximum ADC sampling rate. Refer to the device manual for detailed + * information on conversion timing and/or the current limitation mode. + */ +static inline void adc_set_clock_rate(struct adc_config *conf, uint32_t clk_adc) +{ + uint32_t clk_per; + uint16_t ratio; + uint8_t psc; + + Assert(clk_adc); +#if XMEGA_A || XMEGA_AU + Assert(clk_adc <= 2000000UL); +#elif XMEGA_D + Assert(clk_adc <= 1400000UL); +#elif XMEGA_B || XMEGA_C || XMEGA_E + Assert(clk_adc <= 1800000UL); +#endif + + clk_per = sysclk_get_per_hz(); + ratio = clk_per / clk_adc; + + /* Round ratio up to the nearest prescaling factor. */ + if (ratio <= 4) { + psc = ADC_PRESCALER_DIV4_gc; + } else if (ratio <= 8) { + psc = ADC_PRESCALER_DIV8_gc; + } else if (ratio <= 16) { + psc = ADC_PRESCALER_DIV16_gc; + } else if (ratio <= 32) { + psc = ADC_PRESCALER_DIV32_gc; + } else if (ratio <= 64) { + psc = ADC_PRESCALER_DIV64_gc; + } else if (ratio <= 128) { + psc = ADC_PRESCALER_DIV128_gc; + } else if (ratio <= 256) { + psc = ADC_PRESCALER_DIV256_gc; + } else { + psc = ADC_PRESCALER_DIV512_gc; + } + + conf->prescaler = psc; +} + +/** + * \brief Set ADC conversion parameters + * + * Sets the signedness, resolution and voltage reference for conversions in the + * ADC module configuration. + * + * \param conf Pointer to ADC module configuration. + * \param sign Conversion signedness. + * \param res Resolution of conversions. + * \param ref Voltage reference to use. + */ +static inline void adc_set_conversion_parameters(struct adc_config *conf, + enum adc_sign sign, enum adc_resolution res, + enum adc_reference ref) +{ + /* Preserve all but conversion and resolution config. */ + conf->ctrlb &= ~(ADC_CONMODE_bm | ADC_RESOLUTION_gm); + conf->ctrlb |= (uint8_t)res | (uint8_t)sign; + + conf->refctrl &= ~ADC_REFSEL_gm; + conf->refctrl |= ref; +} + +/** + * \brief Set ADC conversion trigger + * + * Configures the conversion triggering of the ADC. + * + * For automatic triggering modes, the number of channels to start conversions + * on must be specified with \a nr_of_ch. The channel selection for these + * modes is incrementally inclusive, always starting with channel 0. + * + * For event triggered modes, the base event channel must also be specified with + * \a base_ev_ch. The event channels are assigned to the ADC channels in an + * incremental fashion \a without \a wrap-around (in single-trigger event mode). + * This means that the maximum base event channel that can be used is determined + * by the number of ADC channels to start conversions on, i.e., \a nr_of_ch. + * + * \param conf Pointer to ADC module configuration. + * \param trig Conversion trigger to set. + * \param nr_of_ch Number of ADC channels to trigger conversions on: + * \arg \c 1 - \c ADC_NR_OF_CHANNELS (must be non-zero). + * \param base_ev_ch Base event channel, if used. + */ +static inline void adc_set_conversion_trigger(struct adc_config *conf, + enum adc_trigger trig, uint8_t nr_of_ch, uint8_t base_ev_ch) +{ + Assert(nr_of_ch); + Assert(nr_of_ch <= ADC_NR_OF_CHANNELS); +#if XMEGA_A || XMEGA_AU || XMEGA_E + Assert(base_ev_ch <= 7); +#elif XMEGA_B || XMEGA_C || XMEGA_D + Assert(base_ev_ch <= 3); +#endif + + switch (trig) { + case ADC_TRIG_MANUAL: + conf->ctrlb &= ~ADC_FREERUN_bm; + conf->evctrl = ADC_EVACT_NONE_gc; + break; + + case ADC_TRIG_EVENT_SINGLE: + conf->ctrlb &= ~ADC_FREERUN_bm; + conf->evctrl = (base_ev_ch << ADC_EVSEL_gp) | + (nr_of_ch << ADC_EVACT_gp); + break; + + case ADC_TRIG_FREERUN: + conf->ctrlb |= ADC_FREERUN_bm; + break; + +#if ADC_NR_OF_CHANNELS > 1 + case ADC_TRIG_FREERUN_SWEEP: + conf->ctrlb |= ADC_FREERUN_bm; + conf->evctrl = (nr_of_ch - 1) << ADC_SWEEP_gp; + break; + + case ADC_TRIG_EVENT_SWEEP: + conf->ctrlb &= ~ADC_FREERUN_bm; + conf->evctrl = (nr_of_ch - 1) << ADC_SWEEP_gp | + (base_ev_ch << ADC_EVSEL_gp) | + ADC_EVACT_SWEEP_gc; + break; +#endif + + case ADC_TRIG_EVENT_SYNCSWEEP: + conf->ctrlb &= ~ADC_FREERUN_bm; + conf->evctrl = +#if ADC_NR_OF_CHANNELS > 1 + ((nr_of_ch - 1) << ADC_SWEEP_gp) | +#endif + (base_ev_ch << ADC_EVSEL_gp) | + ADC_EVACT_SYNCSWEEP_gc; + break; + + default: + Assert(0); + } +} + +#if ADC_NR_OF_CHANNELS > 1 + +/** + * \brief Set DMA request group + * + * Configures the DMA group request for the specified number of ADC channels. + * The channel group selection is incrementally inclusive, always starting with + * channel 0. + * + * \param conf Pointer to ADC module configuration. + * \param nr_of_ch Number of channels for group request: + * \arg 0 to disable. + * \arg 2, 3 or 4 to enable. + * + * \note The number of channels in the DMA request group cannot be 1. + * \note Not all device families feature this setting. + */ +static inline void adc_set_dma_request_group(struct adc_config *conf, + uint8_t nr_of_ch) +{ + Assert(nr_of_ch <= ADC_NR_OF_CHANNELS); + Assert(nr_of_ch != 1); + + if (nr_of_ch) { + conf->ctrla = (nr_of_ch - 1) << ADC_DMASEL_gp; + } else { + conf->ctrla = ADC_DMASEL_OFF_gc; + } +} + +#endif + +/** + * \brief Enable internal ADC input + * + * \param conf Pointer to ADC module configuration. + * \param int_inp Internal input to enable: + * \arg \c ADC_INT_TEMPSENSE for temperature sensor. + * \arg \c ADC_INT_BANDGAP for bandgap reference. + */ +static inline void adc_enable_internal_input(struct adc_config *conf, + uint8_t int_inp) +{ + conf->refctrl |= int_inp; +} + +/** + * \brief Disable internal ADC input + * + * \param conf Pointer to ADC module configuration. + * \param int_inp Internal input to disable: + * \arg \c ADC_INT_TEMPSENSE for temperature sensor. + * \arg \c ADC_INT_BANDGAP for bandgap reference. + */ +static inline void adc_disable_internal_input(struct adc_config *conf, + uint8_t int_inp) +{ + conf->refctrl &= ~int_inp; +} + +#if XMEGA_AU || defined(__DOXYGEN__) +/** \brief ADC gain stage impedance settings */ +enum adc_gainstage_impmode { + /** High impedance sources */ + ADC_GAIN_HIGHIMPEDANCE, + /** Low impedance sources */ + ADC_GAIN_LOWIMPEDANCE, +}; + +/** + * \brief Set ADC gain stage impedance mode + * + * \param conf Pointer to ADC module configuration. + * \param impmode Gain stage impedance mode. + * + * \note Not all device families feature this setting. + */ +static inline void adc_set_gain_impedance_mode(struct adc_config *conf, + enum adc_gainstage_impmode impmode) +{ + switch (impmode) { + case ADC_GAIN_HIGHIMPEDANCE: + conf->ctrlb &= ~ADC_IMPMODE_bm; + break; + + case ADC_GAIN_LOWIMPEDANCE: + conf->ctrlb |= ADC_IMPMODE_bm; + break; + + default: + Assert(0); + } +} + +#endif + +#if !XMEGA_A +/** \brief ADC current limit settings */ +enum adc_current_limit { + /** No current limit */ + ADC_CURRENT_LIMIT_NO, + /** Low current limit, max sampling rate 1.5 MSPS */ + ADC_CURRENT_LIMIT_LOW, + /** Medium current limit, max sampling rate 1 MSPS */ + ADC_CURRENT_LIMIT_MED, + /** High current limit, max sampling rate 0.5 MSPS */ + ADC_CURRENT_LIMIT_HIGH +}; + +/** + * \brief Set ADC current limit + * + * Set the current limit mode for the ADC module. This setting affects the max + * sampling rate of the ADC. + * + * \note See the device datasheet and manual for detailed information about + * current consumption and sample rate limit. + * + * \param conf Pointer to ADC module configuration. + * \param currlimit Current limit setting. + * + * \note Not all device families feature this setting. + */ +static inline void adc_set_current_limit(struct adc_config *conf, + enum adc_current_limit currlimit) +{ + conf->ctrlb &= ~ADC_CURRLIMIT_gm; + + switch (currlimit) { + case ADC_CURRENT_LIMIT_NO: + conf->ctrlb |= ADC_CURRLIMIT_NO_gc; + break; + + case ADC_CURRENT_LIMIT_LOW: + conf->ctrlb |= ADC_CURRLIMIT_LOW_gc; + break; + + case ADC_CURRENT_LIMIT_MED: + conf->ctrlb |= ADC_CURRLIMIT_MED_gc; + break; + + case ADC_CURRENT_LIMIT_HIGH: + conf->ctrlb |= ADC_CURRLIMIT_HIGH_gc; + break; + + default: + Assert(0); + } +} + +#endif + +/** + * \brief Set ADC compare value in configuration + * + * \param conf Pointer to ADC module configuration. + * \param val Compare value to set. + */ +#define adc_set_config_compare_value(conf, val) \ + do { \ + conf->cmp = (uint16_t)val; \ + } \ + while (0) + +/** + * \brief Get ADC compare value from configuration + * + * \param conf Pointer to ADC module configuration. + */ +#define adc_get_config_compare_value(conf) (conf->cmp) + +#if XMEGA_E + +/** + * \brief Set ADC sample time value in configuration + * + * \param conf Pointer to ADC module configuration. + * \param val Sample time value to set. + */ +#define adc_set_config_sample_value(conf, val) \ + do { \ + conf->sampctrl = (uint8_t)val; \ + } \ + while (0) + +/** + * \brief Get ADC sample time value from configuration + * + * \param conf Pointer to ADC module configuration. + */ +#define adc_get_config_sample_value(conf) (conf->sampctrl) +#endif + +/** @} */ + +/** @} */ + +/** + * \defgroup adc_channel_group ADC channel + * + * Management and configuration functions for the individual ADC channels. + * + * The API functions and definitions can be divided in two groups: + * - channel management: direct access for getting conversion result. + * - channel configuration: create/change configurations and write/read them + * to/from ADC channels. + * + * @{ + */ + +/** + * \brief Default ADC channel interrupt level + * + * \note To override the channel interrupt level, define this symbol as the + * desired level in \ref conf_adc.h. + */ +#if !defined(CONFIG_ADC_INTLVL) || defined(__DOXYGEN__) +# define CONFIG_ADC_INTLVL ADC_CH_INTLVL_LO_gc +#endif + +/** ADC channel configuration */ +struct adc_channel_config { + uint8_t ctrl; + uint8_t muxctrl; + uint8_t intctrl; + uint8_t scan; +#if XMEGA_E + uint8_t corrctrl; + uint8_t offsetcorr0; + uint8_t offsetcorr1; + uint8_t gaincorr0; + uint8_t gaincorr1; + uint8_t avgctrl; +#endif +}; + +/** + * \brief ADC channel positive input + * + * Identifies the external and internal signals that can be used as positive + * input to the ADC channels. + */ +enum adcch_positive_input { + ADCCH_POS_PIN0, + ADCCH_POS_PIN1, + ADCCH_POS_PIN2, + ADCCH_POS_PIN3, + ADCCH_POS_PIN4, + ADCCH_POS_PIN5, + ADCCH_POS_PIN6, + ADCCH_POS_PIN7, + ADCCH_POS_PIN8, + ADCCH_POS_PIN9, + ADCCH_POS_PIN10, + ADCCH_POS_PIN11, + ADCCH_POS_PIN12, + ADCCH_POS_PIN13, + ADCCH_POS_PIN14, + ADCCH_POS_PIN15, + + /** \name Internal inputs. */ + /** @{ */ + ADCCH_POS_TEMPSENSE, /**< Temperature sensor. */ + ADCCH_POS_BANDGAP, /**< Bandgap reference. */ + ADCCH_POS_SCALED_VCC, /**< VCC scaled down by 10. */ +#if XMEGA_A || XMEGA_AU || XMEGA_E || defined(__DOXYGEN__) + ADCCH_POS_DAC, /**< DAC output. */ +#endif + /** @} */ +}; + +/** + * \brief ADC channel negative input + * + * Identifies the signals that can be used as negative input to the ADC channels + * in differential mode. Some of the input signals are only available with + * certain gain settings, e.g., 1x gain. + * + * \note The ADC must be set in signed mode to use differential measurements. + * For single-ended measurements, ADDCH_NEG_NONE should be specified as negative + * input. + * + * \note Pad and internal GND are not available on all devices. See the device + * manual for an overview of available input signals. + */ +enum adcch_negative_input { + /** \name Input pins for differential measurements with 1x gain. */ + /** @{ */ + /** ADC0 pin */ + ADCCH_NEG_PIN0, + /** ADC1 pin */ + ADCCH_NEG_PIN1, + /** ADC2 pin */ + ADCCH_NEG_PIN2, + /** ADC3 pin */ + ADCCH_NEG_PIN3, + /** @} */ + + /** \name Input pins for differential measurements with any gain. */ + /** @{ */ + /** ADC4 pin */ + ADCCH_NEG_PIN4, + /** ADC5 pin */ + ADCCH_NEG_PIN5, + /** ADC6 pin */ + ADCCH_NEG_PIN6, + /** ADC7 pin */ + ADCCH_NEG_PIN7, + /** @} */ + + /** \name GND signals for differential measurements. */ + /** @{ */ + /** PAD ground */ + ADCCH_NEG_PAD_GND, + /** Internal ground */ + ADCCH_NEG_INTERNAL_GND, + /** @} */ + + /** Single ended mode */ + ADCCH_NEG_NONE, +}; + +/** \brief ADC channel interrupt modes */ +enum adcch_mode { + /** Set interrupt flag when conversions complete. */ + ADCCH_MODE_COMPLETE = ADC_CH_INTMODE_COMPLETE_gc, + /** Set interrupt flag when conversion result is below compare value. */ + ADCCH_MODE_BELOW = ADC_CH_INTMODE_BELOW_gc, + /** Set interrupt flag when conversion result is above compare value. */ + ADCCH_MODE_ABOVE = ADC_CH_INTMODE_ABOVE_gc, +}; + +/** \name ADC channel configuration */ +/** @{ */ + +void adcch_write_configuration(ADC_t *adc, uint8_t ch_mask, + const struct adc_channel_config *ch_conf); +void adcch_read_configuration(ADC_t *adc, uint8_t ch_mask, + struct adc_channel_config *ch_conf); + +/** Force enabling of gainstage with unity gain. */ +#define ADCCH_FORCE_1X_GAINSTAGE 0xff + +/** + * \internal + * \brief Get ADC channel setting for specified gain + * + * Returns the setting that corresponds to specified gain. + * + * \param gain Valid gain factor for the measurement. + * + * \return Gain setting of type ADC_CH_GAIN_t. + */ +static inline uint8_t adcch_get_gain_setting(uint8_t gain) +{ + switch (gain) { + case 0: + return ADC_CH_GAIN_DIV2_gc; + + case 1: + return ADC_CH_GAIN_1X_gc; + + case 2: + return ADC_CH_GAIN_2X_gc; + + case 4: + return ADC_CH_GAIN_4X_gc; + + case 8: + return ADC_CH_GAIN_8X_gc; + + case 16: + return ADC_CH_GAIN_16X_gc; + + case 32: + return ADC_CH_GAIN_32X_gc; + + case 64: + return ADC_CH_GAIN_64X_gc; + + case ADCCH_FORCE_1X_GAINSTAGE: + return ADC_CH_GAIN_1X_gc; + + default: + Assert(0); + return 0; + } +} + +/** + * \brief Set ADC channel input mode, multiplexing and gain + * + * Sets up an ADC channel's input mode and multiplexing according to specified + * input signals, as well as the gain. + * + * \param ch_conf Pointer to ADC channel configuration. + * \param pos Positive input signal. + * \param neg Negative input signal: + * \arg \c ADCCH_NEG_NONE for single-ended measurements. + * \arg \c ADCCH_NEG_PINn , where \c n specifies a pin, for differential + * measurements. + * \arg \c ADDCH_x_GND , where \c x specified pad or internal GND, for + * differential measurements. + * \param gain Gain factor for measurements: + * \arg 1 for single-ended or differential with pin 0, 1, 2 or 3, pad or + * internal GND as negative + * input. + * \arg 0 (0.5x), 1, 2, 4, 8, 16, 32 or 64 for differential with pin 4, 5, 6 or + * 7, pad or internal GND as negative input. + * \arg ADCCH_FORCE_1X_GAINSTAGE to force the gain stage to be enabled with + * unity gain for differential measurement. + * + * \note The GND signals are not available on all devices. Refer to the device + * manual for information on available input signals. + * + * \note With unity (1x) gain, some input selections may be possible both with + * and without the gain stage enabled. The driver will default to the + * configuration without gainstage to keep the current consumption as low as + * possible unless the user specifies \ref ADCCH_FORCE_1X_GAINSTAGE as \a gain. + */ +static inline void adcch_set_input(struct adc_channel_config *ch_conf, + enum adcch_positive_input pos, enum adcch_negative_input neg, + uint8_t gain) +{ + if (pos >= ADCCH_POS_TEMPSENSE) { + /* Configure for internal input. */ + Assert(gain == 1); + Assert(neg == ADCCH_NEG_NONE); + + ch_conf->ctrl = ADC_CH_INPUTMODE_INTERNAL_gc; + ch_conf->muxctrl = (pos - ADCCH_POS_TEMPSENSE) << + ADC_CH_MUXPOS_gp; + } else if (neg == ADCCH_NEG_NONE) { + /* Configure for single-ended measurement. */ + Assert(gain == 1); + + ch_conf->ctrl = ADC_CH_INPUTMODE_SINGLEENDED_gc; + ch_conf->muxctrl = pos << ADC_CH_MUXPOS_gp; + } else if (neg <= ADCCH_NEG_PIN3) { + /* Configure for differential measurement. + * Pins 0-3 can only be used for negative input if the gain + * stage is not used, i.e., unity gain (except XMEGA E). + */ +#if XMEGA_E + ch_conf->ctrl = adcch_get_gain_setting(gain) | + ADC_CH_INPUTMODE_DIFFWGAINL_gc; +#else + Assert(gain == 1); + ch_conf->ctrl = ADC_CH_INPUTMODE_DIFF_gc; +#endif + ch_conf->muxctrl = (pos << ADC_CH_MUXPOS_gp) | + (neg << ADC_CH_MUXNEG_gp); + } else if (neg <= ADCCH_NEG_PIN7) { + /* Configure for differential measurement. + * Pins 4-7 can be used for all gain settings, + * including unity gain, which is available even if + * the gain stage is active. + */ +#if XMEGA_E + ch_conf->ctrl = adcch_get_gain_setting(gain) | + ADC_CH_INPUTMODE_DIFFWGAINH_gc; +#else + ch_conf->ctrl = adcch_get_gain_setting(gain) | + ADC_CH_INPUTMODE_DIFFWGAIN_gc; +#endif + ch_conf->muxctrl = (pos << ADC_CH_MUXPOS_gp) | + ((neg - ADCCH_NEG_PIN4) << + ADC_CH_MUXNEG_gp); + } else { + Assert((neg == ADCCH_NEG_PAD_GND) || + (neg == ADCCH_NEG_INTERNAL_GND)); +#if XMEGA_E + + /* Configure for differential measurement through PAD GND or + * internal GND. + * DIFFWGAINH (INPUTMODE) is not used because it support + * only PAD GND. + */ + ch_conf->ctrl = ADC_CH_INPUTMODE_DIFFWGAINL_gc | + adcch_get_gain_setting(gain); + ch_conf->muxctrl = (pos << ADC_CH_MUXPOS_gp) | + ((neg == ADCCH_NEG_INTERNAL_GND) ? + ADC_CH_MUXNEGL_INTGND_gc + : ADC_CH_MUXNEGL_GND_gc); +#else + + /* Configure for differential measurement through GND or + * internal GND. + * The bitmasks for the on-chip GND signals change when + * gain is enabled. To avoid unnecessary current consumption, + * do not enable gainstage for unity gain unless user explicitly + * specifies it with the ADCCH_FORCE_1X_GAINSTAGE macro. + */ + if (gain == 1) { + ch_conf->ctrl = ADC_CH_INPUTMODE_DIFF_gc; + ch_conf->muxctrl = (pos << ADC_CH_MUXPOS_gp) | + ((neg == ADCCH_NEG_PAD_GND) ? + ADC_CH_MUXNEG_MODE10_GND_gc + : ADC_CH_MUXNEG_MODE10_INTGND_gc); + } else { + ch_conf->ctrl = ADC_CH_INPUTMODE_DIFFWGAIN_gc | + adcch_get_gain_setting(gain); + ch_conf->muxctrl = (pos << ADC_CH_MUXPOS_gp) | + ((neg == ADCCH_NEG_INTERNAL_GND) ? + ADC_CH_MUXNEG_MODE11_INTGND_gc + : ADC_CH_MUXNEG_MODE11_GND_gc); + } + +#endif + } +} + +/** + * \brief Set ADC channel 0 pin scan + * + * Sets the parameters for pin scan, which enables measurements on multiple, + * successive input pins without any reconfiguration between conversions. + * + * Pin scan works by adding a offset to the positive MUX setting to get the + * current input pin. The offset is incremented for each conversion, and is + * reset to 0 once a conversion with the maximum offset is done. + * + * \param ch_conf Pointer to the ADC channel configuration structure + * \param start_offset Initial offset to start pin scan at + * \arg \c 0 - \c max_offset + * \param max_offset Maximum offset for the pin scan + * \arg \c 0 to disable + * \arg \c 1 - \c 15 to enable + * + * \note Only the AVR XMEGA AU family features this setting. + * \note Pin scan is only available on ADC channel 0. + */ +static inline void adcch_set_pin_scan(struct adc_channel_config *ch_conf, + uint8_t start_offset, uint8_t max_offset) +{ + Assert(start_offset < 16); + Assert(max_offset < 16); + Assert(start_offset <= max_offset); + + ch_conf->scan = max_offset | (start_offset << ADC_CH_OFFSET_gp); +} + +/** + * \brief Set ADC channel interrupt mode + * + * \param ch_conf Pointer to ADC channel configuration. + * \param mode Interrupt mode to set. + */ +static inline void adcch_set_interrupt_mode(struct adc_channel_config *ch_conf, + enum adcch_mode mode) +{ + ch_conf->intctrl &= ~ADC_CH_INTMODE_gm; + ch_conf->intctrl |= mode; +} + +/** + * \brief Enable interrupts on ADC channel + * + * \param ch_conf Pointer to ADC channel configuration. + */ +static inline void adcch_enable_interrupt(struct adc_channel_config *ch_conf) +{ + ch_conf->intctrl &= ~ADC_CH_INTLVL_gm; + ch_conf->intctrl |= CONFIG_ADC_INTLVL; +} + +/** + * \brief Disable interrupts on ADC channel + * + * \param ch_conf Pointer to ADC channel configuration. + */ +static inline void adcch_disable_interrupt(struct adc_channel_config *ch_conf) +{ + ch_conf->intctrl &= ~ADC_CH_INTLVL_gm; + ch_conf->intctrl |= ADC_CH_INTLVL_OFF_gc; +} + +#if XMEGA_E + +/** + * \brief Enable gain & offset corrections on ADC channel + * + * \param ch_conf Pointer to ADC channel configuration. + * \param offset_corr Offset correction value to set. + * \param expected_value Expected value for a specific input voltage + * \param captured_value Captured value for a specific input voltage + * + * \Note + * Gived "expected_value = captured_value = 1" to ignore the gain correction + * Gain correction is equal to "expected_value / captured_value" + */ +static inline void adcch_enable_correction(struct adc_channel_config *ch_conf, + uint16_t offset_corr, uint16_t expected_value, + uint16_t captured_value) +{ + uint32_t gain_corr; + + gain_corr = (2048L * expected_value) / captured_value; + ch_conf->offsetcorr0 = LSB(offset_corr); + ch_conf->offsetcorr1 = MSB(offset_corr); + ch_conf->gaincorr0 = LSB(gain_corr); + ch_conf->gaincorr1 = MSB(gain_corr); + ch_conf->corrctrl = ADC_CH_CORREN_bm; +} + +/** + * \brief Disable gain & offset correction on ADC channel + * + * \param ch_conf Pointer to ADC channel configuration. + */ +static inline void adcch_disable_correction(struct adc_channel_config *ch_conf) +{ + ch_conf->corrctrl = ADC_CH_CORREN_bp; +} + +/** \brief ADC channel sample number settings */ +enum adcch_sampnum { + /** 2 samples to accumulate. */ + ADC_SAMPNUM_2X = ADC_SAMPNUM_2X_gc, + /** 4 samples to accumulate. */ + ADC_SAMPNUM_4X = ADC_SAMPNUM_4X_gc, + /** 8 samples to accumulate. */ + ADC_SAMPNUM_8X = ADC_SAMPNUM_8X_gc, + /** 16 samples to accumulate. */ + ADC_SAMPNUM_16X = ADC_SAMPNUM_16X_gc, + /** 32 samples to accumulate. */ + ADC_SAMPNUM_32X = ADC_SAMPNUM_32X_gc, + /** 64 samples to accumulate. */ + ADC_SAMPNUM_64X = ADC_SAMPNUM_64X_gc, + /** 128 samples to accumulate. */ + ADC_SAMPNUM_128X = ADC_SAMPNUM_128X_gc, + /** 256 samples to accumulate. */ + ADC_SAMPNUM_256X = ADC_SAMPNUM_256X_gc, + /** 512 samples to accumulate. */ + ADC_SAMPNUM_512X = ADC_SAMPNUM_512X_gc, + /** 1024 samples to accumulate. */ + ADC_SAMPNUM_1024X = ADC_SAMPNUM_1024X_gc, +}; + +/** + * \brief Enables ADC channel averaging + * + * Sets the parameters number of samples used during averaging. + * + * \param ch_conf Pointer to the ADC channel configuration structure + * \param sample Number of samples to accumulate + * + * \note Only the AVR XMEGA E family features this setting. + * \note Check that "ADC_RES_MT12" param is used + * in adc_set_conversion_parameters() call. + */ +static inline void adcch_enable_averaging( + struct adc_channel_config *ch_conf, + enum adcch_sampnum sample) +{ + uint8_t rshift; + + Assert( sample >= ADC_SAMPNUM_2X ); + + if (sample >= ADC_SAMPNUM_16X) { + rshift = 4; + } else if (sample == ADC_SAMPNUM_8X) { + rshift = 3; + } else if (sample == ADC_SAMPNUM_4X) { + rshift = 2; + } else { + rshift = 1; + } + + ch_conf->avgctrl = sample | (rshift << ADC_CH_RIGHTSHIFT_gp); +} + +/** + * \brief Disables ADC channel averaging + * + * \param ch_conf Pointer to the ADC channel configuration structure + * + * \note Only the AVR XMEGA E family features this setting. + * \note Check that "ADC_RES_MT12" param is not used + * in adc_set_conversion_parameters() call. + */ +static inline void adcch_disable_averaging(struct adc_channel_config *ch_conf) +{ + ch_conf->avgctrl = 0; +} + +/** + * \brief Enables ADC channel over-sampling + * + * Sets the parameters number of samples and result resolution + * used during over-sampling. + * + * \param ch_conf Pointer to the ADC channel configuration structure + * \param sample Number of samples to accumulate + * \param resolution result resolution (12 bits to 16 bits) + * 15 bits maximum if sample = 8 + * 14 bits maximum if sample = 4 + * 13 bits maximum if sample = 2 + * + * \note Only the AVR XMEGA E family features this setting. + * \note Check that "ADC_RES_MT12" param is used + * in adc_set_conversion_parameters() call. + */ +static inline void adcch_enable_oversampling( + struct adc_channel_config *ch_conf, + enum adcch_sampnum sample, uint8_t resolution) +{ + uint8_t rshift; + + Assert((resolution >= 12) && (resolution <= 16)); + + if (sample >= ADC_SAMPNUM_16X) { + rshift = 4; + } else if (sample == ADC_SAMPNUM_8X) { + rshift = 3; + } else if (sample == ADC_SAMPNUM_4X) { + rshift = 2; + } else { + rshift = 1; + } + + Assert(rshift >= resolution - 12); + rshift -= resolution - 12; + ch_conf->avgctrl = sample | (rshift << ADC_CH_RIGHTSHIFT_gp); +} + +/** + * \brief Disables ADC channel over-sampling + * + * \param ch_conf Pointer to the ADC channel configuration structure + * + * \note Only the AVR XMEGA E family features this setting. + * \note Check that "ADC_RES_MT12" param is not used + * in adc_set_conversion_parameters() call. + */ +static inline void adcch_disable_oversampling(struct adc_channel_config *ch_conf) +{ + ch_conf->avgctrl = 0; +} + +#endif + +/** @} */ + +/** @} */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +/** + * \page adc_quickstart Quick start guide for XMEGA ADC + * + * This is the quick start guide for the \ref adc_group, with step-by-step + * instructions on how to configure and use the driver in a selection of use + * cases. + * + * The use cases are described with "setup" and "usage" sections, which each + * have "example code" and "workflow" subsections. This documentation first + * presents code fragments and function definitions along with instructions on + * where they can be placed, e.g., into the application C-file or the main() + * function, then follows up with explanations for all the lines of code. + * + * \section adc_use_cases Use cases + * + * In addition to the basic use case below, refer to the following use cases for + * demonstrations of the ADC's features: + * - \subpage adc_use_case_1 + * - \subpage adc_use_case_2 + * + * We recommend reading all the use cases for the sake of all the notes on + * considerations, limitations and other helpful details. + * + * \section adc_basic_use_case Basic use case + * + * In this basic use case, ADCA is configured for: + * - sampling on a single channel (0) + * - I/O pin as single-ended input (PA0) + * - unsigned conversions + * - 12-bit resolution + * - internal 1V reference + * - manual conversion triggering + * - polled operation (no interrupts) + * + * Completed conversions are detected by waiting for the relevant interrupt flag + * to get set. The ADC result is then stored in a local variable. + * + * \section adc_basic_use_case_setup Setup steps + * + * \subsection adc_basic_use_case_setup_code Example code + * + * Add to application C-file: + * \code + #define MY_ADC ADCA + #define MY_ADC_CH ADC_CH0 + + static void adc_init(void) + { + struct adc_config adc_conf; + struct adc_channel_config adcch_conf; + + adc_read_configuration(&MY_ADC, &adc_conf); + adcch_read_configuration(&MY_ADC, MY_ADC_CH, &adcch_conf); + + adc_set_conversion_parameters(&adc_conf, ADC_SIGN_OFF, ADC_RES_12, + ADC_REF_BANDGAP); + adc_set_conversion_trigger(&adc_conf, ADC_TRIG_MANUAL, 1, 0); + adc_set_clock_rate(&adc_conf, 200000UL); + + adcch_set_input(&adcch_conf, ADCCH_POS_PIN0, ADCCH_NEG_NONE, 1); + + adc_write_configuration(&MY_ADC, &adc_conf); + adcch_write_configuration(&MY_ADC, MY_ADC_CH, &adcch_conf); + } +\endcode + * + * Add to \c main(): + * \code + sysclk_init(); + adc_init(); +\endcode + * + * \subsection adc_basic_use_case_setup_flow Workflow + * + * -# Add macros for the ADC and its channel to use, so they are easy to change: + * - \code + #define MY_ADC ADCA + #define MY_ADC_CH ADC_CH0 +\endcode + * -# Create a function \c adc_init() to intialize the ADC: + * - \code + static void adc_init(void) + { + // ... + } +\endcode + * -# Allocate configuration structs for the ADC and its channel: + * - \code + struct adc_config adc_conf; + struct adc_channel_config adcch_conf; +\endcode + * -# Initialize the structs: + * - \code + adc_read_configuration(&MY_ADC, &adc_conf); + adcch_read_configuration(&MY_ADC, MY_ADC_CH, &adcch_conf); +\endcode + * \attention This step must not be skipped because uninitialized structs + * may contain invalid configurations, thus giving unpredictable behavior. + * -# Set conversion parameters to unsigned, 12-bit and internal 1V reference: + * - \code + adc_set_conversion_parameters(&adc_conf, ADC_SIGN_OFF, ADC_RES_12, + ADC_REF_BANDGAP); +\endcode + * \note Only single-ended input is possible with unsigned conversions. + * -# Set conversion trigger to manual triggering: + * - \code + adc_set_conversion_trigger(&adc_conf, ADC_TRIG_MANUAL, 1, 0); +\endcode + * \note The number of channels to trigger (1) and base event channel (0) + * don't affect operation in this trigger mode, but sane values should still be + * supplied. + * -# Set ADC clock rate to 200 KHz or less: + * - \code + adc_set_clock_rate(&adc_conf, 200000UL); +\endcode + * \note The driver attempts to set the ADC clock rate to the fastest + * possible without exceeding the specified limit. Refer to the applicable + * device datasheet and manual for details on maximum ADC clock rate. + * -# Set pin 0 on the associated port as the single-ended input: + * - \code + adcch_set_input(&adcch_conf, ADCCH_POS_PIN0, ADCCH_NEG_NONE, 1); +\endcode + * \note For single-ended input, the negative input must be none and the + * gain must be unity (1x). + * -# Write the configurations to ADC and channel: + * - \code + adc_write_configuration(&MY_ADC, &adc_conf); + adcch_write_configuration(&MY_ADC, MY_ADC_CH, &adcch_conf); +\endcode + * -# Initialize the clock system: + * - \code sysclk_init(); \endcode + * \note The ADC driver requires the system clock driver to be + * initialized in order to compute the correct ADC clock rate in step 6. + * -# Call our ADC init function: + * - \code adc_init(); \endcode + * + * \section adc_basic_use_case_usage Usage steps + * + * \subsection adc_basic_use_case_usage_code Example code + * + * Add to, e.g., main-loop in application C-file: + * \code + uint16_t result; + + adc_enable(&MY_ADC); + + adc_start_conversion(&MY_ADC, MY_ADC_CH); + adc_wait_for_interrupt_flag(&MY_ADC, MY_ADC_CH); + + result = adc_get_result(&MY_ADC, MY_ADC_CH); +\endcode + * + * \subsection adc_basic_use_case_usage_flow Workflow + * + * -# Allocate a variable to contain the ADC result: + * - \code uint16_t result; \endcode + * -# Enable the configured ADC: + * - \code adc_enable(&MY_ADC); \endcode + * -# Trigger a single conversion on the ADC channel: + * - \code adc_start_conversion(&MY_ADC, MY_ADC_CH); \endcode + * -# Wait for the channel's interrupt flag to get set, indicating a completed + * conversion: + * - \code adc_wait_for_interrupt_flag(&MY_ADC, MY_ADC_CH); \endcode + * \note The interrupt flags are set even if the interrupts are disabled. + * Further, this function will clear the interrupt flag after it has been set, + * so we do not need to clear it manually. + * -# Read out the result of the ADC channel: + * - \code result = adc_get_result(&MY_ADC, MY_ADC_CH); \endcode + * -# To do more conversions, go back to step 3. + */ + +/** + * \page adc_use_case_1 Free-running conversions with interrupt + * + * In this use case, ADCA is configured for: + * \li sampling on two channels (0 and 1) with respective inputs: + * - I/O pin as single-ended input (PA0) + * - two I/O pins as differential input w/ 2x gain (PA1 and PA5) + * \li signed conversions + * \li 12-bit resolution + * \li internal 1V reference + * \li free-running conversions + * \li interrupt-based conversion handling + * + * The ADC results are handled in an interrupt callback function which simply + * stores the result in one of two channel-specific, global variables. + * + * \note This use case assumes that the device has multiple ADC channels. Refer + * to the applicable device datasheet for information about the number of ADC + * channels. + * + * \section adc_use_case_1_setup Setup steps + * + * \subsection adc_use_case_1_setup_code Example code + * + * Ensure that \ref conf_adc.h contains: + * \code + #define CONFIG_ADC_CALLBACK_ENABLE + #define CONFIG_ADC_CALLBACK_TYPE int16_t +\endcode + * + * Add to application C-file: + * \code + #define MY_ADC ADCA + + int16_t ch0_result; + int16_t ch1_result; + + static void adc_handler(ADC_t *adc, uint8_t ch_mask, adc_result_t result) + { + switch (ch_mask) { + case ADC_CH0: + ch0_result = result; + break; + + case ADC_CH1: + ch1_result = result; + break; + + default: + break; + } + } + + static void adc_init(void) + { + struct adc_config adc_conf; + struct adc_channel_config adcch_conf; + + adc_read_configuration(&MY_ADC, &adc_conf); + adcch_read_configuration(&MY_ADC, ADC_CH0, &adcch_conf); + + adc_set_conversion_parameters(&adc_conf, ADC_SIGN_ON, ADC_RES_12, + ADC_REF_BANDGAP); + adc_set_conversion_trigger(&adc_conf, ADC_TRIG_FREERUN_SWEEP, 2, 0); + adc_set_clock_rate(&adc_conf, 5000UL); + adc_set_callback(&MY_ADC, &adc_handler); + adc_write_configuration(&MY_ADC, &adc_conf); + + adcch_enable_interrupt(&adcch_conf); + adcch_set_input(&adcch_conf, ADCCH_POS_PIN0, ADCCH_NEG_NONE, 1); + adcch_write_configuration(&MY_ADC, ADC_CH0, &adcch_conf); + + adcch_set_input(&adcch_conf, ADCCH_POS_PIN1, ADCCH_NEG_PIN5, 2); + adcch_write_configuration(&MY_ADC, ADC_CH1, &adcch_conf); + } +\endcode + * + * Add to \c main(): + * \code + sysclk_init(); + adc_init(); + pmic_init(); +\endcode + * + * \subsection adc_use_case_1_setup_flow Workflow + * + * -# Define a macro for the ADC to use, in case we want to change it later: + * - \code #define MY_ADC ADCA \endcode + * -# Define global variables to contain the ADC result of each channel: + * - \code + int16_t ch0_result; + int16_t ch1_result; +\endcode + * -# Create an ADC interrupt callback function that stores the results in the + * channels' respective global variables: + * - \code + static void adc_handler(ADC_t *adc, uint8_t ch_mask, adc_result_t result) + { + switch (ch_mask) { + case ADC_CH0: + ch0_result = result; + break; + + case ADC_CH1: + ch1_result = result; + break; + + default: + break; + } + } +\endcode + * \note Refer to \ref adc_callback_t for documentation on the interrupt + * callback function type. + * -# Create a function \c adc_init() to intialize the ADC: + * - \code + static void adc_init(void) + { + // ... + } +\endcode + * -# Allocate configuration structs for ADC and channel, then initialize them: + * - \code + struct adc_config adc_conf; + struct adc_channel_config adcch_conf; + + adc_read_configuration(&MY_ADC, &adc_conf); + adcch_read_configuration(&MY_ADC, ADC_CH0, &adcch_conf); +\endcode + * -# Set signed, 12-bit conversions with internal 1V voltage reference: + * - \code + adc_set_conversion_parameters(&adc_conf, ADC_SIGN_ON, ADC_RES_12, + ADC_REF_BANDGAP); +\endcode + * \note With signed, 12-bit conversion, 1 bit is used to indicate + * sign/polarity, so the resolution is halved in terms of Volt per LSB. + * -# Set free-running conversions on the first two ADC channels: + * - \code + adc_set_conversion_trigger(&adc_conf, ADC_TRIG_FREERUN_SWEEP, 2, 0); +\endcode + * \note The base event channel (0) does not affect operation in this + * mode. + * -# Set ADC clock rate to maximum 5 KHz: + * - \code adc_set_clock_rate(&adc_conf, 5000UL); \endcode + * \note In free-running mode, it is wise to reduce the ADC clock so that + * the device has time to handle the results, e.g., channel 0 does not complete + * a new conversion before channel 1's result has been handled. + * -# Set the interrupt callback function to use for the ADC: + * - \code adc_set_callback(&MY_ADC, &adc_handler); \endcode + * -# Write the configuration to the ADC: + * - \code adc_write_configuration(&MY_ADC, &adc_conf); \endcode + * -# Enable interrupts for the ADC channels: + * - \code adcch_enable_interrupt(&adcch_conf); \endcode + * -# Set up single-ended input from pin 0 on port A, then write the config to + * the first channel (0): + * - \code + adcch_set_input(&adcch_conf, ADCCH_POS_PIN0, ADCCH_NEG_NONE, 1); + adcch_write_configuration(&MY_ADC, ADC_CH0, &adcch_conf); +\endcode + * -# Set up differential input from pins 1 and 5 on port A, with 2x gain, then + * write the config to the second channel (1): + * - \code + adcch_set_input(&adcch_conf, ADCCH_POS_PIN1, ADCCH_NEG_PIN5, 2); + adcch_write_configuration(&MY_ADC, ADC_CH1, &adcch_conf); +\endcode + * \note Not all input and gain combinations are valid. Refer to + * \ref adcch_set_input() for documentation on the restrictions. + * -# Initialize the clock system, the ADC, and the PMIC since we will be using + * interrupts: + * - \code + sysclk_init(); + adc_init(); + pmic_init(); +\endcode + * \note The call to \ref pmic_init() does not enable interrupts globally, + * which must be done explicitly with \ref cpu_irq_enable(). + * + * \section adc_use_case_1_usage Usage steps + * + * \subsection adc_use_case_1_usage_code Example code + * + * Add to \c main.c(): + * \code + cpu_irq_enable(); + adc_enable(&MY_ADC); + + do { + } while (true); +\endcode + * + * \subsection adc_use_case_1_usage_flow Workflow + * -# Enable interrupts globally to allow the ADC interrupts to be handled: + * - \code cpu_irq_enable(); \endcode + * -# Enable the ADC to start conversions: + * - \code adc_enable(&MY_ADC); \endcode + * \note When configured for free-running conversions, the ADC will start + * doing conversions as soon as it is enabled, so we do not need to do it + * manually. + * -# Enter a busy-loop while interrupts handle the ADC results: + * - \code + do { + } while (true); +\endcode + */ + +/** + * \page adc_use_case_2 Event-triggered conversions + * + * In this use case, ADCA is configured for: + * \li sampling on two channels (0 and 1) with respective inputs: + * - internal temperature sensor + * - internal bandgap reference + * \li unsigned conversions + * \li 12-bit resolution + * \li VCC/1.6 as voltage reference + * \li event-triggered conversions + * \li polled conversion handling + * + * Completed conversions are detected via non-blocking polling of the interrupt + * flags. The ADC results are stored into local variables as soon as they are + * available. + * + * A Timer/Counter is used to generate events that trigger the conversions. + * + * \note This use case assumes that the device has multiple ADC channels. Refer + * to the applicable device datasheet for information about the number of ADC + * channels. + * + * \section adc_use_case_2_setup Setup steps + * + * \subsection adc_use_case_2_setup_prereq Prerequisites + * + * This use case requires that the Timer/Counter driver is added to the project. + * + * \subsection adc_use_case_2_setup_code Example code + * + * Add to application C-file: + * \code + #define MY_ADC ADCA + #define MY_TIMER TCC0 + + static void evsys_init(void) + { + sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS); + EVSYS.CH3MUX = EVSYS_CHMUX_TCC0_OVF_gc; + } + + static void tc_init(void) + { + tc_enable(&MY_TIMER); + tc_set_wgm(&MY_TIMER, TC_WG_NORMAL); + tc_write_period(&MY_TIMER, 200); + tc_set_resolution(&MY_TIMER, 2000); + } + + static void adc_init(void) + { + struct adc_config adc_conf; + struct adc_channel_config adcch_conf; + + adc_read_configuration(&MY_ADC, &adc_conf); + adcch_read_configuration(&MY_ADC, ADC_CH0, &adcch_conf); + + adc_set_conversion_parameters(&adc_conf, ADC_SIGN_OFF, ADC_RES_12, + ADC_REF_VCC); + adc_set_conversion_trigger(&adc_conf, ADC_TRIG_EVENT_SWEEP, 2, 3); + adc_enable_internal_input(&adc_conf, ADC_INT_BANDGAP + | ADC_INT_TEMPSENSE); + adc_set_clock_rate(&adc_conf, 200000UL); + adc_write_configuration(&MY_ADC, &adc_conf); + + adcch_set_input(&adcch_conf, ADCCH_POS_TEMPSENSE, ADCCH_NEG_NONE, 1); + adcch_write_configuration(&MY_ADC, ADC_CH0, &adcch_conf); + + adcch_set_input(&adcch_conf, ADCCH_POS_BANDGAP, ADCCH_NEG_NONE, 1); + adcch_write_configuration(&MY_ADC, ADC_CH1, &adcch_conf); + } +\endcode + * + * Add to \c main(): + * \code + sysclk_init(); + evsys_init(); + tc_init(); + adc_init(); +\endcode + * + * \subsection adc_use_case_2_setup_flow Workflow + * + * -# Add macros for the ADC and the conversion trigger timer to use, so they + * are easy to change: + * - \code + #define MY_ADC ADCA + #define MY_TIMER TCC0 +\endcode + * -# Create a function \c evsys_init() to intialize the event system clocks and + * to link the conversion timer to the correct event channel: + * - \code + static void evsys_init(void) + { + // ... + } +\endcode + * -# Use the sysclk service to enable the clock to the event system: + * - \code sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS); \endcode + * -# Connect the TCC0 overflow event to event channel 3: + * - \code EVSYS.CH3MUX = EVSYS_CHMUX_TCC0_OVF_gc; \endcode + * \note If the ADC trigger timer is changed from TCC0, the \c EVSYS_CHMUX_* + * mask here will also need to be altered. + * -# Create a function \c tc_init() to intialize the ADC trigger timer: + * - \code + static void tc_init(void) + { + // ... + } +\endcode + * -# Enable the clock to the ADC trigger timer: + * - \code tc_enable(&MY_TIMER); \endcode + * -# Configure the ADC trigger timer in normal Waveform Generation mode: + * - \code tc_set_wgm(&MY_TIMER, TC_WG_NORMAL); \endcode + * -# Configure the ADC trigger timer period to overflow at 200 counts: + * - \code tc_write_period(&MY_TIMER, 200); \endcode + * -# Configure the ADC trigger timer resolution (frequency) for 2KHz: + * - \code tc_set_resolution(&MY_TIMER, 2000); \endcode + * -# Create a function \c adc_init() to intialize the ADC ready for + * conversions on channels 0 and 1, triggered by the event system: + * - \code + static void adc_init(void) + { + // ... + } +\endcode + * -# Allocate configuration structs for ADC and channel, then initialize them: + * - \code + struct adc_config adc_conf; + struct adc_channel_config adcch_conf; + + adc_read_configuration(&MY_ADC, &adc_conf); + adcch_read_configuration(&MY_ADC, ADC_CH0, &adcch_conf); +\endcode + * -# Set unsigned, 12-bit conversions with internal VCC/1.6 voltage reference: + * - \code + adc_set_conversion_parameters(&adc_conf, ADC_SIGN_OFF, ADC_RES_12, + ADC_REF_VCC); +\endcode + * -# Set event system triggered conversions on the first two ADC channels, + * with conversions triggered by event system channel 3: + * - \code + adc_set_conversion_trigger(&adc_conf, ADC_TRIG_EVENT_SWEEP, 2, 3); +\endcode + * \note The event system channel used here must match the channel linked to the + * conversion trigger timer set up earlier in \c tc_init(). + * -# Turn on the internal bandgap and temperature sensor ADC inputs: + * - \code + adc_enable_internal_input(&adc_conf, ADC_INT_BANDGAP | ADC_INT_TEMPSENSE); +\endcode + * -# Set ADC clock rate to maximum 200 KHz: + * - \code adc_set_clock_rate(&adc_conf, 200000UL); \endcode + * -# Write the configuration to the ADC: + * - \code adc_write_configuration(&MY_ADC, &adc_conf); \endcode + * -# Set up single-ended input from the internal temperature sensor, then write + * the config to the first channel (0): + * - \code + adcch_set_input(&adcch_conf, ADCCH_POS_TEMPSENSE, ADCCH_NEG_NONE, 1); + adcch_write_configuration(&MY_ADC, ADC_CH0, &adcch_conf); +\endcode + * -# Set up single-ended input from the internal bandgap voltage, then write + * the config to the second channel (1): + * - \code + adcch_set_input(&adcch_conf, ADCCH_POS_BANDGAP, ADCCH_NEG_NONE, 1); + adcch_write_configuration(&MY_ADC, ADC_CH1, &adcch_conf); +\endcode + * -# Initialize the clock system, event system, ADC trigger timer, and the ADC: + * - \code + sysclk_init(); + evsys_init(); + tc_init(); + adc_init(); +\endcode + * + * \section adc_use_case_2_usage Usage steps + * + * \subsection adc_use_case_2_usage_code Example code + * + * Add to \c main(): + * \code + adc_enable(&MY_ADC); + + do { + uint16_t tmp_result; + uint16_t bg_result; + + if (adc_get_interrupt_flag(&MY_ADC, ADC_CH0 | ADC_CH1) + == (ADC_CH0 | ADC_CH1)) { + tmp_result = adc_get_result(&MY_ADC, ADC_CH0); + bg_result = adc_get_result(&MY_ADC, ADC_CH1); + + adc_clear_interrupt_flag(&MY_ADC, ADC_CH0 | ADC_CH1); + } + } while (true); +\endcode + * + * \subsection adc_use_case_2_usage_flow Workflow + * + * -# Enable the configured ADC module, so that it will begin conversions when + * triggered: + * - \code adc_enable(&MY_ADC); \endcode + * -# Create an infinite loop so that conversions will be processed forever: + * - \code + do { + // ... + } while (true); +\endcode + * -# Within the loop, create local variables to contain the ADC result of each + * channel (internal temperature sensor and internal bandgap voltage): + * - \code + int16_t temp_result; + int16_t bg_result; +\endcode + * -# Test if both ADC channel 0 and channel 1 have completed a conversion by + * testing the respective channel conversion complete interrupt flags: + * - \code + if (adc_get_interrupt_flag(&MY_ADC, ADC_CH0 | ADC_CH1) + == (ADC_CH0 | ADC_CH1)) { +\endcode + * -# Store the channel result values into the local variables created earlier: + * - \code + tmp_result = adc_get_result(&MY_ADC, ADC_CH0); + bg_result = adc_get_result(&MY_ADC, ADC_CH1); +\endcode + * -# Clear both ADC channel conversion complete interrupt flags, so that we can + * detect future conversions at a later stage: + * - \code adc_clear_interrupt_flag(&MY_ADC, ADC_CH0 | ADC_CH1); \endcode + */ + +#endif /* ADC_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.c new file mode 100644 index 0000000..1b19074 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/adc/xmega_aau/adc_aau.c @@ -0,0 +1,369 @@ +/** + * \file + * + * \brief AVR XMEGA A/AU specific ADC driver implementation + * + * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include "../adc.h" + +/** + * \ingroup adc_module_group + * @{ + */ + +/** \name Internal functions for driver */ +/** @{ */ +extern void adc_enable_clock(ADC_t *adc); +extern void adc_disable_clock(ADC_t *adc); + +/** @} */ + +/** \name ADC interrupt callback function */ +/** @{ */ + +#ifdef ADCA +# ifdef CONFIG_ADC_CALLBACK_ENABLE + +extern adc_callback_t adca_callback; + +/** + * \internal + * \brief ISR for channel 0 on ADC A + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH0_vect) +{ + adca_callback(&ADCA, ADC_CH0, adc_get_result(&ADCA, ADC_CH0)); +} + +/** + * \internal + * \brief ISR for channel 1 on ADC A + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH1_vect) +{ + adca_callback(&ADCA, ADC_CH1, adc_get_result(&ADCA, ADC_CH1)); +} + +/** + * \internal + * \brief ISR for channel 2 on ADC A + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH2_vect) +{ + adca_callback(&ADCA, ADC_CH2, adc_get_result(&ADCA, ADC_CH2)); +} + +/** + * \internal + * \brief ISR for channel 3 on ADC A + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCA_CH3_vect) +{ + adca_callback(&ADCA, ADC_CH3, adc_get_result(&ADCA, ADC_CH3)); +} + +# endif +#endif + +#ifdef ADCB +# ifdef CONFIG_ADC_CALLBACK_ENABLE + +extern adc_callback_t adcb_callback; + +/** + * \internal + * \brief ISR for channel 0 on ADC B + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH0_vect) +{ + adcb_callback(&ADCB, ADC_CH0, adc_get_result(&ADCB, ADC_CH0)); +} + +/** + * \internal + * \brief ISR for channel 1 on ADC B + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH1_vect) +{ + adcb_callback(&ADCB, ADC_CH1, adc_get_result(&ADCB, ADC_CH1)); +} + +/** + * \internal + * \brief ISR for channel 2 on ADC B + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH2_vect) +{ + adcb_callback(&ADCB, ADC_CH2, adc_get_result(&ADCB, ADC_CH2)); +} + +/** + * \internal + * \brief ISR for channel 3 on ADC B + * + * Calls the callback function that has been set for the ADC when the channel's + * interrupt flag is set, if its interrupt has been enabled. + */ +ISR(ADCB_CH3_vect) +{ + adcb_callback(&ADCB, ADC_CH3, adc_get_result(&ADCB, ADC_CH3)); +} + +# endif +#endif + +/** @} */ + +/** \name ADC module configuration */ +/** @{ */ + +/** + * \brief Write configuration to ADC module + * + * Disables the ADC and flushes its pipeline before writing the specified + * configuration and factory calibration value to it. If the ADC was enabled + * upon entry of the function, it is enabled upon function return. + * + * \param adc Pointer to ADC module. + * \param conf Pointer to ADC module configuration. + */ +void adc_write_configuration(ADC_t *adc, const struct adc_config *conf) +{ + uint16_t cal; + uint8_t enable; + irqflags_t flags; + +#ifdef ADCA + if ((uintptr_t)adc == (uintptr_t)&ADCA) { + cal = adc_get_calibration_data(ADC_CAL_ADCA); + } else +#endif + +#ifdef ADCB + if ((uintptr_t)adc == (uintptr_t)&ADCB) { + cal = adc_get_calibration_data(ADC_CAL_ADCB); + } else +#endif + + { + Assert(0); + return; + } + + flags = cpu_irq_save(); + adc_enable_clock(adc); + enable = adc->CTRLA & ADC_ENABLE_bm; + + adc->CTRLA = ADC_FLUSH_bm; + adc->CAL = cal; + adc->CMP = conf->cmp; + adc->REFCTRL = conf->refctrl; + adc->PRESCALER = conf->prescaler; + adc->EVCTRL = conf->evctrl; + adc->CTRLB = conf->ctrlb; + + adc->CTRLA = enable | conf->ctrla; + + adc_disable_clock(adc); + + cpu_irq_restore(flags); +} + +/** + * \brief Read configuration from ADC module + * + * Reads out the current configuration of the ADC module to the specified + * buffer. + * + * \param adc Pointer to ADC module. + * \param conf Pointer to ADC module configuration. + */ +void adc_read_configuration(ADC_t *adc, struct adc_config *conf) +{ + irqflags_t flags = cpu_irq_save(); + + adc_enable_clock(adc); + + conf->ctrla = adc->CTRLA & ADC_DMASEL_gm; + + conf->cmp = adc->CMP; + conf->refctrl = adc->REFCTRL; + conf->prescaler = adc->PRESCALER; + conf->evctrl = adc->EVCTRL; + conf->ctrlb = adc->CTRLB; + + adc_disable_clock(adc); + + cpu_irq_restore(flags); +} + +/** @} */ + +/** @} */ + +/** + * \ingroup adc_channel_group + * @{ + */ + +/** \name ADC channel configuration */ +/** @{ */ + +/** + * \brief Write configuration to ADC channel + * + * Writes the specified configuration to the ADC channel. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * \param ch_conf Pointer to ADC channel configuration. + * + * \note The specified ADC's callback function must be set before this function + * is called if callbacks are enabled and interrupts are enabled in the + * channel configuration. + */ +void adcch_write_configuration(ADC_t *adc, uint8_t ch_mask, + const struct adc_channel_config *ch_conf) +{ + ADC_CH_t *adc_ch; + irqflags_t flags; + + adc_ch = adc_get_channel(adc, ch_mask); + + flags = cpu_irq_save(); + +#if defined(CONFIG_ADC_CALLBACK_ENABLE) && defined(_ASSERT_ENABLE_) + if ((adc_ch->INTCTRL & ADC_CH_INTLVL_gm) != ADC_CH_INTLVL_OFF_gc) { +# ifdef ADCA + if ((uintptr_t)adc == (uintptr_t)&ADCA) { + Assert(adca_callback); + } else +# endif + +# ifdef ADCB + if ((uintptr_t)adc == (uintptr_t)&ADCB) { + Assert(adcb_callback); + } else +# endif + + { + Assert(0); + return; + } + } +#endif + + adc_enable_clock(adc); + adc_ch->CTRL = ch_conf->ctrl; + adc_ch->INTCTRL = ch_conf->intctrl; + adc_ch->MUXCTRL = ch_conf->muxctrl; + if (ch_mask & ADC_CH0) { + /* USB devices has channel scan available on ADC channel 0 */ + adc_ch->SCAN = ch_conf->scan; + } + adc_disable_clock(adc); + + cpu_irq_restore(flags); +} + +/** + * \brief Read configuration from ADC channel + * + * Reads out the current configuration from the ADC channel to the specified + * buffer. + * + * \param adc Pointer to ADC module. + * \param ch_mask Mask of ADC channel(s): + * \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel + * can be given in mask) + * \param ch_conf Pointer to ADC channel configuration. + */ +void adcch_read_configuration(ADC_t *adc, uint8_t ch_mask, + struct adc_channel_config *ch_conf) +{ + ADC_CH_t *adc_ch; + irqflags_t flags; + + adc_ch = adc_get_channel(adc, ch_mask); + + flags = cpu_irq_save(); + + adc_enable_clock(adc); + ch_conf->ctrl = adc_ch->CTRL; + ch_conf->intctrl = adc_ch->INTCTRL; + ch_conf->muxctrl = adc_ch->MUXCTRL; + if (ch_mask & ADC_CH0) { + /* USB devices has channel scan available on ADC channel 0 */ + ch_conf->scan = adc_ch->SCAN; + } + adc_disable_clock(adc); + + cpu_irq_restore(flags); +} + +/** @} */ + +/** @} */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/ccp.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/ccp.h new file mode 100644 index 0000000..1e929a4 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/ccp.h @@ -0,0 +1,123 @@ +/** + * \file + * + * \brief Configuration Change Protection write functions + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CPU_CCP_H +#define CPU_CCP_H +#include + +/** + * \defgroup ccp_group Configuration Change Protection + * + * See \ref xmega_ccp_quickstart. + * + * Function for writing to protected IO registers. + * @{ + */ + +#if defined(__DOXYGEN__) +//! \name IAR Memory Model defines. +//@{ + +/** + * \def CONFIG_MEMORY_MODEL_TINY + * \brief Configuration symbol to enable 8 bit pointers. + * + */ +# define CONFIG_MEMORY_MODEL_TINY + +/** + * \def CONFIG_MEMORY_MODEL_SMALL + * \brief Configuration symbol to enable 16 bit pointers. + * \note If no memory model is defined, SMALL is default. + * + */ +# define CONFIG_MEMORY_MODEL_SMALL + + +/** + * \def CONFIG_MEMORY_MODEL_LARGE + * \brief Configuration symbol to enable 24 bit pointers. + * + */ +# define CONFIG_MEMORY_MODEL_LARGE + +//@} +#endif + + +/** + * \brief Write to a CCP-protected 8-bit I/O register + * + * \param addr Address of the I/O register + * \param value Value to be written + * + * \note Using IAR Embedded workbench, the choice of memory model has an impact + * on calling convention. The memory model is not visible to the + * preprocessor, so it must be defined in the Assembler preprocessor directives. + */ +extern void ccp_write_io(void *addr, uint8_t value); + +/** @} */ + +/** + * \page xmega_ccp_quickstart Quick start guide for CCP driver + * + * This is the quick start guide for the \ref ccp_group + * "Configuration Change Protection (CCP) driver", with step-by-step + * instructions on how to use the driver. + * + * The use case contains a code fragment, and this can be copied into, e.g., + * the main application function. + * + * \section ccp_basic_use_case Basic use case + * In this use case, the CCP is used to write to the protected XMEGA Clock + * Control register. + * + * \subsection ccp_basic_use_case_setup_flow Workflow + * -# call CCP write io to change system clock selection: + * - \code ccp_write_io((uint8_t *)&CLK.CTRL, CLK_SCLKSEL_RC32M_gc); \endcode + */ + +#endif /* CPU_CCP_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/ccp.s b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/ccp.s new file mode 100644 index 0000000..91f8fb0 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/ccp.s @@ -0,0 +1,100 @@ +/** + * \file + * + * \brief Configuration Change Protection + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#include + +//! Value to write to CCP for access to protected IO registers. +#define CCP_IOREG 0xd8 + + /* + * GNU and IAR use different calling conventions. Since this is + * a very small and simple function to begin with, it's easier + * to implement it twice than to deal with the differences + * within a single implementation. + * + * Interrupts are disabled by hardware during the timed + * sequence, so there's no need to save/restore interrupt state. + */ + + PUBLIC_FUNCTION(ccp_write_io) + +#if defined(__GNUC__) + + out RAMPZ, r1 // Reset bits 23:16 of Z + movw r30, r24 // Load addr into Z + ldi r18, CCP_IOREG // Load magic CCP value + out CCP, r18 // Start CCP handshake + st Z, r22 // Write value to I/O register + ret // Return to caller + +#elif defined(__IAR_SYSTEMS_ASM__) + +# if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \ + && !defined(CONFIG_MEMORY_MODEL_LARGE) +# define CONFIG_MEMORY_MODEL_SMALL +# endif + ldi r20, 0 + out RAMPZ, r20 // Reset bits 23:16 of Z +# if defined(CONFIG_MEMORY_MODEL_TINY) + mov r31, r20 // Reset bits 8:15 of Z + mov r30, r16 // Load addr into Z +# else + movw r30, r16 // Load addr into Z +# endif + ldi r21, CCP_IOREG // Load magic CCP value + out CCP, r21 // Start CCP handshake +# if defined(CONFIG_MEMORY_MODEL_TINY) + st Z, r17 // Write value to I/O register +# elif defined(CONFIG_MEMORY_MODEL_SMALL) + st Z, r18 // Write value to I/O register +# elif defined(CONFIG_MEMORY_MODEL_LARGE) + st Z, r19 // Write value to I/O register +# else +# error Unknown memory model in use, no idea how registers should be accessed +# endif + ret +#else +# error Unknown assembler +#endif + + END_FUNC(ccp_write_io) + END_FILE() diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/xmega_reset_cause.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/xmega_reset_cause.h new file mode 100644 index 0000000..ff6840a --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/cpu/xmega_reset_cause.h @@ -0,0 +1,108 @@ +/** + * \file + * + * \brief Chip-specific reset cause functions + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef XMEGA_DRIVERS_CPU_RESET_CAUSE_H +#define XMEGA_DRIVERS_CPU_RESET_CAUSE_H + +#include "compiler.h" +#include "ccp.h" + +/** + * \ingroup reset_cause_group + * \defgroup xmega_reset_cause_group XMEGA reset cause + * + * See \ref reset_cause_quickstart + * + * @{ + */ + +/** + * \brief Chip-specific reset cause type capable of holding all chip reset + * causes. Typically reflects the size of the reset cause register. + */ +typedef uint8_t reset_cause_t; + +//! \internal \name Chip-specific reset causes +//@{ +//! \internal External reset cause +#define CHIP_RESET_CAUSE_EXTRST RST_EXTRF_bm +//! \internal brown-out detected reset cause, same as for CPU +#define CHIP_RESET_CAUSE_BOD_IO RST_BORF_bm +//! \internal Brown-out detected reset cause, same as for I/O +#define CHIP_RESET_CAUSE_BOD_CPU RST_BORF_bm +//! \internal On-chip debug system reset cause +#define CHIP_RESET_CAUSE_OCD RST_PDIRF_bm +//! \internal Power-on-reset reset cause +#define CHIP_RESET_CAUSE_POR RST_PORF_bm +//! \internal Software reset reset cause +#define CHIP_RESET_CAUSE_SOFT RST_SRF_bm +//! \internal Spike detected reset cause +#define CHIP_RESET_CAUSE_SPIKE RST_SDRF_bm +//! \internal Watchdog timeout reset cause +#define CHIP_RESET_CAUSE_WDT RST_WDRF_bm +//@} + +static inline reset_cause_t reset_cause_get_causes(void) +{ + return (reset_cause_t)RST.STATUS; +} + +static inline void reset_cause_clear_causes(reset_cause_t causes) +{ + RST.STATUS = causes; +} + +static inline void reset_do_soft_reset(void) +{ + ccp_write_io((void *)&RST.CTRL, RST_SWRST_bm); + + while (1) { + /* Intentionally empty. */ + } +} + +//! @} + +#endif /* XMEGA_DRIVERS_CPU_RESET_CAUSE_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/nvm/nvm.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/nvm/nvm.c new file mode 100644 index 0000000..6145520 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/nvm/nvm.c @@ -0,0 +1,710 @@ +/** + * \file + * + * \brief Non Volatile Memory controller driver + * + * Copyright (C) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include "compiler.h" +#include "ccp.h" +#include "nvm.h" +#include + +/** + * \weakgroup nvm_signature_group + * @{ + */ + +/** + * \brief Read the device serial + * + * This function returns the device serial stored in the device. + * + * \note This function is modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not + * the program space reads will be corrupted. + * + * \retval storage Pointer to the structure where to store the device serial + */ +void nvm_read_device_serial(struct nvm_device_serial *storage) +{ + storage->lotnum0 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(LOTNUM0)); + storage->lotnum1 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(LOTNUM1)); + storage->lotnum2 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(LOTNUM2)); + storage->lotnum3 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(LOTNUM3)); + storage->lotnum4 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(LOTNUM4)); + storage->lotnum5 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(LOTNUM5)); + + storage->wafnum = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(WAFNUM)); + + storage->coordx0 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(COORDX0)); + storage->coordx1 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(COORDX1)); + storage->coordy0 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(COORDY0)); + storage->coordy1 = nvm_read_production_signature_row( + nvm_get_production_signature_row_offset(COORDY1)); +} + +//! @} + +/** + * \weakgroup nvm_eeprom_group + * @{ + */ + +/** + * \brief Read one byte from EEPROM using mapped access. + * + * This function reads one byte from EEPROM using mapped access. + * + * \param addr EEPROM address, between 0 and EEPROM_SIZE + * + * \return Byte value read from EEPROM. + */ +uint8_t nvm_eeprom_read_byte(eeprom_addr_t addr) +{ + uint8_t data; + Assert(addr <= EEPROM_SIZE); + + /* Wait until NVM is ready */ + nvm_wait_until_ready(); + eeprom_enable_mapping(); + data = *(uint8_t*)(addr + MAPPED_EEPROM_START), + eeprom_disable_mapping(); + return data; +} + +/** + * \brief Read buffer within the eeprom + * + * \param address the address to where to read + * \param buf pointer to the data + * \param len the number of bytes to read + */ +void nvm_eeprom_read_buffer(eeprom_addr_t address, void *buf, uint16_t len) +{ + nvm_wait_until_ready(); + eeprom_enable_mapping(); + memcpy( buf,(void*)(address+MAPPED_EEPROM_START), len ); + eeprom_disable_mapping(); +} + + +/** + * \brief Write one byte to EEPROM using IO mapping. + * + * This function writes one byte to EEPROM using IO-mapped access. + * This function will cancel all ongoing EEPROM page buffer loading + * operations, if any. + * + * \param address EEPROM address (max EEPROM_SIZE) + * \param value Byte value to write to EEPROM. + */ +void nvm_eeprom_write_byte(eeprom_addr_t address, uint8_t value) +{ + uint8_t old_cmd; + + Assert(address <= EEPROM_SIZE); + /* Flush buffer to make sure no unintentional data is written and load + * the "Page Load" command into the command register. + */ + old_cmd = NVM.CMD; + nvm_eeprom_flush_buffer(); + // Wait until NVM is ready + nvm_wait_until_ready(); + nvm_eeprom_load_byte_to_buffer(address, value); + + // Set address to write to + NVM.ADDR2 = 0x00; + NVM.ADDR1 = (address >> 8) & 0xFF; + NVM.ADDR0 = address & 0xFF; + + /* Issue EEPROM Atomic Write (Erase&Write) command. Load command, write + * the protection signature and execute command. + */ + NVM.CMD = NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc; + nvm_exec(); + NVM.CMD = old_cmd; +} + +/** + * \brief Write buffer within the eeprom + * + * \param address the address to where to write + * \param buf pointer to the data + * \param len the number of bytes to write + */ +void nvm_eeprom_erase_and_write_buffer(eeprom_addr_t address, const void *buf, uint16_t len) +{ + while (len) { + if (((address%EEPROM_PAGE_SIZE)==0) && (len>=EEPROM_PAGE_SIZE)) { + // A full page can be written + nvm_eeprom_load_page_to_buffer((uint8_t*)buf); + nvm_eeprom_atomic_write_page(address/EEPROM_PAGE_SIZE); + address += EEPROM_PAGE_SIZE; + buf = (uint8_t*)buf + EEPROM_PAGE_SIZE; + len -= EEPROM_PAGE_SIZE; + } else { + nvm_eeprom_write_byte(address++, *(uint8_t*)buf); + buf = (uint8_t*)buf + 1; + len--; + } + } +} + + +/** + * \brief Flush temporary EEPROM page buffer. + * + * This function flushes the EEPROM page buffers. This function will cancel + * any ongoing EEPROM page buffer loading operations, if any. + * This function also works for memory mapped EEPROM access. + * + * \note An EEPROM write operations will automatically flush the buffer for you. + * \note The function does not preserve the value of the NVM.CMD register + */ +void nvm_eeprom_flush_buffer(void) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + // Flush EEPROM page buffer if necessary + if ((NVM.STATUS & NVM_EELOAD_bm) != 0) { + NVM.CMD = NVM_CMD_ERASE_EEPROM_BUFFER_gc; + nvm_exec(); + } +} + +/** + * \brief Load single byte into temporary page buffer. + * + * This function loads one byte into the temporary EEPROM page buffers. + * If memory mapped EEPROM is enabled, this function will not work. + * Make sure that the buffer is flushed before starting to load bytes. + * Also, if multiple bytes are loaded into the same location, they will + * be ANDed together, thus 0x55 and 0xAA will result in 0x00 in the buffer. + * + * \note Only one page buffer exist, thus only one page can be loaded with + * data and programmed into one page. If data needs to be written to + * different pages, the loading and writing needs to be repeated. + * + * \param byte_addr EEPROM Byte address, between 0 and EEPROM_PAGE_SIZE. + * \param value Byte value to write to buffer. + */ +void nvm_eeprom_load_byte_to_buffer(uint8_t byte_addr, uint8_t value) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + eeprom_enable_mapping(); + *(uint8_t*)(byte_addr + MAPPED_EEPROM_START) = value; + eeprom_disable_mapping(); +} + + +/** + * \brief Load entire page into temporary EEPROM page buffer. + * + * This function loads an entire EEPROM page from an SRAM buffer to + * the EEPROM page buffers. If memory mapped EEPROM is enabled, this + * function will not work. Make sure that the buffer is flushed before + * starting to load bytes. + * + * \note Only the lower part of the address is used to address the buffer. + * Therefore, no address parameter is needed. In the end, the data + * is written to the EEPROM page given by the address parameter to the + * EEPROM write page operation. + * + * \param values Pointer to SRAM buffer containing an entire page. + */ +void nvm_eeprom_load_page_to_buffer(const uint8_t *values) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + // Load multiple bytes into page buffer + uint8_t i; + for (i = 0; i < EEPROM_PAGE_SIZE; ++i) { + nvm_eeprom_load_byte_to_buffer(i, *values); + ++values; + } +} + +/** + * \brief Erase and write bytes from page buffer into EEPROM. + * + * This function writes the contents of an already loaded EEPROM page + * buffer into EEPROM memory. + * + * As this is an atomic write, the page in EEPROM will be erased + * automatically before writing. Note that only the page buffer locations + * that have been loaded will be used when writing to EEPROM. Page buffer + * locations that have not been loaded will be left untouched in EEPROM. + * + * \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE + */ +void nvm_eeprom_atomic_write_page(uint8_t page_addr) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + // Calculate page address + uint16_t address = (uint16_t)(page_addr * EEPROM_PAGE_SIZE); + + Assert(address <= EEPROM_SIZE); + + // Set address + NVM.ADDR2 = 0x00; + NVM.ADDR1 = (address >> 8) & 0xFF; + NVM.ADDR0 = address & 0xFF; + + // Issue EEPROM Atomic Write (Erase&Write) command + nvm_issue_command(NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc); +} + +/** + * \brief Write (without erasing) EEPROM page. + * + * This function writes the contents of an already loaded EEPROM page + * buffer into EEPROM memory. + * + * As this is a split write, the page in EEPROM will _not_ be erased + * before writing. + * + * \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE + */ +void nvm_eeprom_split_write_page(uint8_t page_addr) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + // Calculate page address + uint16_t address = (uint16_t)(page_addr * EEPROM_PAGE_SIZE); + + Assert(address <= EEPROM_SIZE); + + // Set address + NVM.ADDR2 = 0x00; + NVM.ADDR1 = (address >> 8) & 0xFF; + NVM.ADDR0 = address & 0xFF; + + // Issue EEPROM Split Write command + nvm_issue_command(NVM_CMD_WRITE_EEPROM_PAGE_gc); +} + +/** + * \brief Fill temporary EEPROM page buffer with value. + * + * This fills the the EEPROM page buffers with a given value. + * If memory mapped EEPROM is enabled, this function will not work. + * + * \note Only the lower part of the address is used to address the buffer. + * Therefore, no address parameter is needed. In the end, the data + * is written to the EEPROM page given by the address parameter to the + * EEPROM write page operation. + * + * \param value Value to copy to the page buffer. + */ +void nvm_eeprom_fill_buffer_with_value(uint8_t value) +{ + nvm_eeprom_flush_buffer(); + // Wait until NVM is ready + nvm_wait_until_ready(); + // Load multiple bytes into page buffer + uint8_t i; + for (i = 0; i < EEPROM_PAGE_SIZE; ++i) { + nvm_eeprom_load_byte_to_buffer(i, value); + } +} + +/** + * \brief Erase bytes from EEPROM page. + * + * This function erases bytes from one EEPROM page, so that every location + * written to in the page buffer reads 0xFF. + * + * \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE + */ +void nvm_eeprom_erase_bytes_in_page(uint8_t page_addr) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + // Calculate page address + uint16_t address = (uint16_t)(page_addr * EEPROM_PAGE_SIZE); + + Assert(address <= EEPROM_SIZE); + + // Set address + NVM.ADDR2 = 0x00; + NVM.ADDR1 = (address >> 8) & 0xFF; + NVM.ADDR0 = address & 0xFF; + + // Issue EEPROM Erase command + nvm_issue_command(NVM_CMD_ERASE_EEPROM_PAGE_gc); +} + +/** + * \brief Erase EEPROM page. + * + * This function erases one EEPROM page, so that every location reads 0xFF. + * + * \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE + */ +void nvm_eeprom_erase_page(uint8_t page_addr) +{ + // Mark all addresses to be deleted + nvm_eeprom_fill_buffer_with_value(0xff); + // Erase bytes + nvm_eeprom_erase_bytes_in_page(page_addr); +} + + +/** + * \brief Erase bytes from all EEPROM pages. + * + * This function erases bytes from all EEPROM pages, so that every location + * written to in the page buffer reads 0xFF. + */ +void nvm_eeprom_erase_bytes_in_all_pages(void) +{ + // Wait until NVM is ready + nvm_wait_until_ready(); + + // Issue EEPROM Erase All command + nvm_issue_command(NVM_CMD_ERASE_EEPROM_gc); +} + +/** + * \brief Erase entire EEPROM memory. + * + * This function erases the entire EEPROM memory block to 0xFF. + */ +void nvm_eeprom_erase_all(void) +{ + // Mark all addresses to be deleted + nvm_eeprom_fill_buffer_with_value(0xff); + // Erase all pages + nvm_eeprom_erase_bytes_in_all_pages(); +} + +//! @} + + +//! @} + + +/** + * \weakgroup nvm_flash_group + * @{ + */ + +/** + * \brief Issue flash range CRC command + * + * This function sets the FLASH range CRC command in the NVM.CMD register. + * It then loads the start and end byte address of the part of FLASH to + * generate a CRC-32 for into the ADDR and DATA registers and finally performs + * the execute command. + * + * \note Should only be called from the CRC module. The function saves and + * restores the NVM.CMD register, but if this + * function is called from an interrupt, interrupts must be disabled + * before this function is called. + * + * \param start_addr end byte address + * \param end_addr start byte address + */ +void nvm_issue_flash_range_crc(flash_addr_t start_addr, flash_addr_t end_addr) +{ + uint8_t old_cmd; + // Save current nvm command + old_cmd = NVM.CMD; + + // Load the NVM CMD register with the Flash Range CRC command + NVM.CMD = NVM_CMD_FLASH_RANGE_CRC_gc; + + // Load the start byte address in the NVM Address Register + NVM.ADDR0 = start_addr & 0xFF; + NVM.ADDR1 = (start_addr >> 8) & 0xFF; +#if (FLASH_SIZE >= 0x10000UL) + NVM.ADDR2 = (start_addr >> 16) & 0xFF; +#endif + + // Load the end byte address in NVM Data Register + NVM.DATA0 = end_addr & 0xFF; + NVM.DATA1 = (end_addr >> 8) & 0xFF; +#if (FLASH_SIZE >= 0x10000UL) + NVM.DATA2 = (end_addr >> 16) & 0xFF; +#endif + + // Execute command + ccp_write_io((uint8_t *)&NVM.CTRLA, NVM_CMDEX_bm); + + // Restore command register + NVM.CMD = old_cmd; +} + +/** + * \brief Read buffer within the application section + * + * \param address the address to where to read + * \param buf pointer to the data + * \param len the number of bytes to read + */ +void nvm_flash_read_buffer(flash_addr_t address, void *buf, uint16_t len) +{ +#if (FLASH_SIZE>0x10000) + uint32_t opt_address = address; +#else + uint16_t opt_address = (uint16_t)address; +#endif + nvm_wait_until_ready(); + while ( len ) { + *(uint8_t*)buf = nvm_flash_read_byte(opt_address); + buf=(uint8_t*)buf+1; + opt_address++; + len--; + } +} + +/** + * \brief Read buffer within the user section + * + * \param address the address to where to read + * \param buf pointer to the data + * \param len the number of bytes to read + */ +void nvm_user_sig_read_buffer(flash_addr_t address, void *buf, uint16_t len) +{ + uint16_t opt_address = (uint16_t)address&(FLASH_PAGE_SIZE-1); + while ( len ) { + *(uint8_t*)buf = nvm_read_user_signature_row(opt_address); + buf=(uint8_t*)buf+1; + opt_address++; + len--; + } +} + +/** + * \brief Write specific parts of user flash section + * + * \param address the address to where to write + * \param buf pointer to the data + * \param len the number of bytes to write + * \param b_blank_check if True then the page flash is checked before write + * to run or not the erase page command. + * + * Set b_blank_check to false if all application flash is erased before. + */ +void nvm_user_sig_write_buffer(flash_addr_t address, const void *buf, + uint16_t len, bool b_blank_check) +{ + uint16_t w_value; + uint16_t page_pos; + uint16_t opt_address = (uint16_t)address; + bool b_flag_erase = false; + + while ( len ) { + for (page_pos=0; page_pos0x10000) + uint32_t page_address; + uint32_t opt_address = address; +#else + uint16_t page_address; + uint16_t opt_address = (uint16_t)address; +#endif + + // Compute the start of the page to be modified + page_address = opt_address-(opt_address%FLASH_PAGE_SIZE); + + // For each page + while ( len ) { + b_flag_erase = false; + + nvm_wait_until_ready(); + for (page_pos=0; page_posAtmel Support + */ +#ifndef NVM_H +#define NVM_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \defgroup nvm_group NVM driver + * + * See \ref xmega_nvm_quickstart + * + * \brief Low-level driver implementation for the AVR XMEGA Non Volatile + * Memory Controller (NVM). + * + * The XMEGA NVM controller interfaces the internal non-volatile memories + * in the XMEGA devices. Program memory, EEPROM and signature row is can be + * interfaced by the module. See the documentation of each sub-module for + * more information. + * + * \note If using GCC and the flash sub-module, remember to configure + * the boot section in the make file. More information in the sub-module + * documentation. + * + * \section xmega_nvm_quickstart_section Quick Start Guide + * See \ref xmega_nvm_quickstart + */ + +/** + * \defgroup nvm_generic_group NVM driver generic module handling + * \ingroup nvm_group + * \brief Support functions for the NVM driver. + * + * These functions are helper functions for the functions of the + * \ref nvm_group "NVM driver". + * + * @{ + */ + +/** + * \brief Wait for any NVM access to finish. + * + * This function is blocking and waits for any NVM access to finish. + * Use this function before any NVM accesses, if you are not certain that + * any previous operations are finished yet. + */ +static inline void nvm_wait_until_ready( void ) +{ + do { + // Block execution while waiting for the NVM to be ready + } while ((NVM.STATUS & NVM_NVMBUSY_bm) == NVM_NVMBUSY_bm); +} + +/** + * \brief Non-Volatile Memory Execute Command + * + * This function sets the CCP register before setting the CMDEX bit in the + * NVM.CTRLA register. + * + * \note The correct NVM command must be set in the NVM.CMD register before + * calling this function. + */ +static inline void nvm_exec(void) +{ + ccp_write_io((uint8_t *)&NVM.CTRLA, NVM_CMDEX_bm); +} + +/** + * \brief Non-Volatile Memory Execute Specific Command + * + * This function sets a command in the NVM.CMD register, then performs an + * execute command by writing the CMDEX bit to the NVM.CTRLA register. + * + * \note The function saves and restores the NVM.CMD register, but if this + * function is called from an interrupt, interrupts must be disabled + * before this function is called. + * + * \param nvm_command NVM Command to execute. + */ +static inline void nvm_issue_command(NVM_CMD_t nvm_command) +{ + uint8_t old_cmd; + + old_cmd = NVM.CMD; + NVM.CMD = nvm_command; + ccp_write_io((uint8_t *)&NVM.CTRLA, NVM_CMDEX_bm); + NVM.CMD = old_cmd; +} + +/** + * \brief Read one byte using the LDI instruction + * \internal + * + * This function sets the specified NVM_CMD, reads one byte using at the + * specified byte address with the LPM instruction. NVM_CMD is restored after + * use. + * + * \note Interrupts should be disabled before running this function + * if program memory/NVM controller is accessed from ISRs. + * + * \param nvm_cmd NVM command to load before running LPM + * \param address Byte offset into the signature row + */ +uint8_t nvm_read_byte(uint8_t nvm_cmd, uint16_t address); + + +/** + * \brief Perform SPM write + * \internal + * + * This function sets the specified NVM_CMD, sets CCP and then runs the SPM + * instruction to write to flash. + * + * \note Interrupts should be disabled before running this function + * if program memory/NVM controller is accessed from ISRs. + * + * \param addr Address to perform the SPM on. + * \param nvm_cmd NVM command to use in the NVM_CMD register + */ +void nvm_common_spm(uint32_t addr, uint8_t nvm_cmd); + +//! @} + +/** + * \defgroup nvm_signature_group NVM driver signature handling + * \ingroup nvm_group + * \brief Handling of signature rows + * + * Functions for handling signature rows. The following is supported: + * - Reading values from production and user signature row + * - Reading device id + * - Reading device revision + * - Reading device serial + * + * \note Some of these functions are modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not, + * the program space reads will be corrupted. See documentation for + * each individual function. + * \note Do not use the functions of this module in an interrupt service + * routine (ISR), since the functions can take several milliseconds to + * complete and hence block the interrupt for several milliseconds. + * In addition the functions of this module are modifying the page buffer + * which will corrupt any ongoing EEPROM handing used outside an ISR. + * @{ + */ + +/** + * \brief Structure containing the device ID + * + * This structure can be used to store the device ID of a device. + */ +struct nvm_device_id { + union { + struct { + uint8_t devid0; + uint8_t devid1; + uint8_t devid2; + }; + uint8_t byte[3]; + }; +}; + +/** + * \brief Structure containing the device serial + * + * This structure can be used to store the serial number of a device. + */ +struct nvm_device_serial { + union { + struct { + uint8_t lotnum0; + uint8_t lotnum1; + uint8_t lotnum2; + uint8_t lotnum3; + uint8_t lotnum4; + uint8_t lotnum5; + uint8_t wafnum; + uint8_t coordx0; + uint8_t coordx1; + uint8_t coordy0; + uint8_t coordy1; + }; + uint8_t byte[11]; + }; +}; + +/** + * \brief Get offset of calibration bytes in the production signature row + * + * \param regname Name of register within the production signature row + * \retval Offset of register into the production signature row + */ +#if defined(__GNUC__) +# define nvm_get_production_signature_row_offset(regname) \ + offsetof(NVM_PROD_SIGNATURES_t, regname) +#elif defined(__ICCAVR__) +# define nvm_get_production_signature_row_offset(regname) (regname##_offset) +#else +# error Unknown compiler +#endif + + +/** + * \brief Read one byte from the production signature row + * + * This function reads one byte from the production signature row of the device + * at the given address. + * + * \note This function is modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not + * the program space reads will be corrupted. + * + * \param address Byte offset into the signature row + */ +static inline uint8_t nvm_read_production_signature_row(uint8_t address) +{ + return nvm_read_byte(NVM_CMD_READ_CALIB_ROW_gc, address); +} + +/** + * \brief Read one byte from the user signature row + * + * This function reads one byte from the user signature row of the device + * at the given address. + * + * \note This function is modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not + * the program space reads will be corrupted. + * + * \param address Byte offset into the signature row + */ +static inline uint8_t nvm_read_user_signature_row(uint16_t address) +{ + return nvm_read_byte(NVM_CMD_READ_USER_SIG_ROW_gc, address); +} + +/** + * \brief Read the device id + * + * This function returns the device ID stored in the device. + * + * \retval storage Pointer to the structure where to store the device id + */ +static inline void nvm_read_device_id(struct nvm_device_id *storage) +{ + storage->devid0 = MCU.DEVID0; + storage->devid1 = MCU.DEVID1; + storage->devid2 = MCU.DEVID2; +} + +/** + * \brief Read the device revision + * + * This function returns the device revision stored in the device. + * + * \retval unsigned 8 bit value with the current device revision. + */ +static inline uint8_t nvm_read_device_rev(void) +{ + return MCU.REVID; +} + +void nvm_read_device_serial(struct nvm_device_serial *storage); + +//! @} + + +/** + * \defgroup nvm_eeprom_group NVM driver EEPROM handling + * \ingroup nvm_group + * \brief Functions for handling internal EEPROM memory. + * + * The internal EEPROM can be used to store data that will persist after + * power is removed. This can typically be used to store calibration data, + * application state, encryption keys or other data that need to be preserved + * when power is removed. + * + * The functions in this module uses IO register access to manipulate the + * EEPROM. + * + * \note The functions in this module are modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not + * the program space reads will be corrupted. + * @{ + */ + +#ifndef EEPROM_PAGE_SIZE +# if XMEGA_A || XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E +# define EEPROM_PAGE_SIZE 32 +# else +# error Unknown EEPROM page size +# endif +#endif + +#ifndef CONFIG_NVM_IGNORE_XMEGA_A3_D3_REVB_ERRATA +# if XMEGA_A3 || XMEGA_D3 +# error This NVM driver does not support rev B of XMEGA A3/D3 devices. \ + Set CONFIG_NVM_IGNORE_XMEGA_A3_D3_REVB_ERRATA to disable this message +# endif +#endif + +/** + * Data type for holding eeprom memory addresses. + */ +typedef uint16_t eeprom_addr_t; + + +/*! \brief Enable EEPROM mapping into data space. + * + * This macro enables mapping of EEPROM into data space. + * EEPROM starts at EEPROM_START in data memory. Read access + * can be done similar to ordinary SRAM access. + * + * \note This disables IO-mapped access to EEPROM, although page erase and + * write operations still needs to be done through IO register. + */ +static inline void eeprom_enable_mapping(void) +{ +#if !XMEGA_E + NVM_CTRLB = NVM_CTRLB | NVM_EEMAPEN_bm; +#endif +} + + +/*! \brief Disable EEPROM mapping into data space. + * + * This macro disables mapping of EEPROM into data space. + * IO mapped access is now enabled. + */ +static inline void eeprom_disable_mapping(void) +{ +#if !XMEGA_E + NVM_CTRLB = NVM_CTRLB & ~NVM_EEMAPEN_bm; +#endif +} + + +uint8_t nvm_eeprom_read_byte(eeprom_addr_t addr); +void nvm_eeprom_write_byte(eeprom_addr_t address, uint8_t value); +void nvm_eeprom_read_buffer(eeprom_addr_t address, void *buf, uint16_t len); +void nvm_eeprom_erase_and_write_buffer(eeprom_addr_t address, const void *buf, uint16_t len); + +void nvm_eeprom_flush_buffer(void); +void nvm_eeprom_load_byte_to_buffer(uint8_t byte_addr, uint8_t value); +void nvm_eeprom_load_page_to_buffer(const uint8_t *values); +void nvm_eeprom_atomic_write_page(uint8_t page_addr); +void nvm_eeprom_split_write_page(uint8_t page_addr); +void nvm_eeprom_fill_buffer_with_value(uint8_t value); +void nvm_eeprom_erase_bytes_in_page(uint8_t page_addr); +void nvm_eeprom_erase_page(uint8_t page_addr); +void nvm_eeprom_erase_bytes_in_all_pages(void); +void nvm_eeprom_erase_all(void); + +//! @} + +/** + * \defgroup nvm_flash_group NVM driver flash handling + * \ingroup nvm_group + * \brief Functions for handling internal flash memory. + * + * The internal flash memory on the XMEGA devices consists of the application + * section, the application table section and the bootloader section. + * All these sections can store program code for the MCU, but if there is + * available space, they can be used for storing other persistent data. + * + * Writing the flash memory can only be done one page at a time. It consists + * of loading the data to the internal page buffer and then running one of + * the write commands. If the page has not been erased before writing, the + * data will not be written correctly. + * + * In order to be able to write to flash memory the programming commands need + * to be run from the boot section. + * - When using IAR this is handled automatically by the linker script. + * - When using GCC this needs to be specified manually in the make files. For + * example the ATxmega128A1 has the boot section at the word address 0x10000 + * the corresponding byte address of 0x20000 needs to be added to the + * config.mk makefile: + * LDFLAGS += -Wl,--section-start=.BOOT=0x20000 + * See the device datasheet for the correct address for other devices. + * + * \note If using GCC and the flash sub-module, remember to configure + * the boot section in the make file. + * + * \note The functions in this module are modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not + * the program space reads will be corrupted. + * @{ + */ + +/** + * \brief Size of a flash page in bytes + * + * The page size in bytes taken from the toolchain header files. + * + * \note Page size is currently missing from the IAR header files, so it needs + * to be defined in the driver until it is fixed. + */ +#ifdef __DOXYGEN__ +# define FLASH_SIZE +# define FLASH_PAGE_SIZE +#else + +// 8K devices +# if AVR8_PART_IS_DEFINED(ATxmega8E5) +# define FLASH_SIZE (8*1024L) +# define FLASH_PAGE_SIZE (128) + +// 16K devices +# elif AVR8_PART_IS_DEFINED(ATxmega16A4) | \ + AVR8_PART_IS_DEFINED(ATxmega16A4U) | \ + AVR8_PART_IS_DEFINED(ATxmega16D4) | \ + AVR8_PART_IS_DEFINED(ATxmega16C4) +# define FLASH_SIZE (16*1024L) +# define FLASH_PAGE_SIZE (256) + +# elif AVR8_PART_IS_DEFINED(ATxmega16E5) +# define FLASH_SIZE (16*1024L) +# define FLASH_PAGE_SIZE (128) + +// 32K devices +# elif AVR8_PART_IS_DEFINED(ATxmega32A4) | \ + AVR8_PART_IS_DEFINED(ATxmega32A4U) | \ + AVR8_PART_IS_DEFINED(ATxmega32D4) | \ + AVR8_PART_IS_DEFINED(ATxmega32C4) +# define FLASH_SIZE (32*1024L) +# define FLASH_PAGE_SIZE (256) + +# elif AVR8_PART_IS_DEFINED(ATxmega32E5) +# define FLASH_SIZE (32*1024L) +# define FLASH_PAGE_SIZE (128) + +// 64K devices +# elif AVR8_PART_IS_DEFINED(ATxmega64A1) | \ + AVR8_PART_IS_DEFINED(ATxmega64A1U) | \ + AVR8_PART_IS_DEFINED(ATxmega64A3) | \ + AVR8_PART_IS_DEFINED(ATxmega64A3U) | \ + AVR8_PART_IS_DEFINED(ATxmega64A4U) | \ + AVR8_PART_IS_DEFINED(ATxmega64B1) | \ + AVR8_PART_IS_DEFINED(ATxmega64B3) | \ + AVR8_PART_IS_DEFINED(ATxmega64C3) | \ + AVR8_PART_IS_DEFINED(ATxmega64D3) | \ + AVR8_PART_IS_DEFINED(ATxmega64D4) +# define FLASH_SIZE (64*1024L) +# define FLASH_PAGE_SIZE (256) + +// 128K devices +# elif AVR8_PART_IS_DEFINED(ATxmega128A1) | \ + AVR8_PART_IS_DEFINED(ATxmega128A1U) | \ + AVR8_PART_IS_DEFINED(ATxmega128A3) | \ + AVR8_PART_IS_DEFINED(ATxmega128A3U) | \ + AVR8_PART_IS_DEFINED(ATxmega128C3) | \ + AVR8_PART_IS_DEFINED(ATxmega128D3) | \ + AVR8_PART_IS_DEFINED(ATxmega128D4) +# define FLASH_SIZE (128*1024L) +# define FLASH_PAGE_SIZE (512) + +# elif AVR8_PART_IS_DEFINED(ATxmega128A4U) | \ + AVR8_PART_IS_DEFINED(ATxmega128B1) | \ + AVR8_PART_IS_DEFINED(ATxmega128B3) +# define FLASH_SIZE (128*1024L) +# define FLASH_PAGE_SIZE (256) + +// 192K devices +# elif AVR8_PART_IS_DEFINED(ATxmega192A3U) | \ + AVR8_PART_IS_DEFINED(ATxmega192C3) | \ + AVR8_PART_IS_DEFINED(ATxmega192D3) +# define FLASH_SIZE (192*1024L) +# define FLASH_PAGE_SIZE (512) + +// 256K devices +# elif AVR8_PART_IS_DEFINED(ATxmega256A3) | \ + AVR8_PART_IS_DEFINED(ATxmega256A3U) | \ + AVR8_PART_IS_DEFINED(ATxmega256A3B) | \ + AVR8_PART_IS_DEFINED(ATxmega256A3BU) | \ + AVR8_PART_IS_DEFINED(ATxmega256C3) | \ + AVR8_PART_IS_DEFINED(ATxmega256D3) +# define FLASH_SIZE (256*1024L) +# define FLASH_PAGE_SIZE (512) + +// 384K devices +# elif AVR8_PART_IS_DEFINED(ATxmega384C3) +# define FLASH_SIZE (384*1024L) +# define FLASH_PAGE_SIZE (512) +# elif AVR8_PART_IS_DEFINED(ATxmega384D3) +# define FLASH_SIZE (384*1024L) +# define FLASH_PAGE_SIZE (512) +# else +# error Flash page size needs to be defined. +# endif +#endif + +/** + * Data type for holding flash memory addresses. + * + */ +#if (FLASH_SIZE >= 0x10000UL) // Note: Xmega with 64KB of flash have 4KB boot flash +typedef uint32_t flash_addr_t; +#else +typedef uint16_t flash_addr_t; +#endif + +/** + * Flash pointer type to use for accessing flash memory with IAR + */ +#if (FLASH_SIZE >= 0x10000UL) // Note: Xmega with 64KB of flash have 4KB boot flash +# define IAR_FLASH_PTR __farflash +#else +# define IAR_FLASH_PTR __flash +#endif + +/** + * \brief Load byte from flash memory + * + * Load one word of flash using byte addressing. IAR has __flash pointers + * and GCC have pgm_read_byte_xx functions which load data from flash memory. + * This function used for compatibility between the compilers. + * + * \param addr Byte address to load + * \return Byte from program memory + */ +static inline uint8_t nvm_flash_read_byte(flash_addr_t addr) +{ +#if defined(__GNUC__) + return pgm_read_byte_far(addr); +#elif defined(__ICCAVR__) + uint8_t IAR_FLASH_PTR *flashptr = (uint8_t IAR_FLASH_PTR *)addr; + return *flashptr; +#else +# error Unknown compiler +#endif +} + +/** + * \brief Load word from flash memory + * + * Load one word of flash using byte addressing. IAR has __flash pointers + * and GCC have pgm_read_byte_xx functions which load data from flash memory. + * This function used for compatibility between the compilers. + * + * \param addr Byte address to load (last bit is ignored) + * \return Word from program memory + */ +static inline uint16_t nvm_flash_read_word(flash_addr_t addr) +{ +#if defined(__GNUC__) + return pgm_read_word_far(addr); +#elif defined(__ICCAVR__) + uint16_t IAR_FLASH_PTR *flashptr = (uint16_t IAR_FLASH_PTR *)addr; + return *flashptr; +#endif +} + + +/** + * \brief Flush flash page buffer + * + * Clear the NVM controller page buffer for flash. This needs to be called + * before using \ref nvm_flash_load_word_to_buffer if it has not already been + * cleared. + * + */ +static inline void nvm_flash_flush_buffer(void) +{ + nvm_wait_until_ready(); + nvm_common_spm(0, NVM_CMD_ERASE_FLASH_BUFFER_gc); +} + + +/** + * \brief Load word into flash page buffer + * + * Clear the NVM controller page buffer for flash. This needs to be called + * before using \ref nvm_flash_load_word_to_buffer if it has not already been + * cleared. + * + * \param word_addr Address to store data. The upper bits beyond the page size + * is ignored. \ref FLASH_PAGE_SIZE + * \param data Data word to load into the page buffer + */ +void nvm_flash_load_word_to_buffer(uint32_t word_addr, uint16_t data); + + +/** + * \brief Erase entire application section + * + * Erase all of the application section. + */ +static inline void nvm_flash_erase_app(void) +{ + nvm_wait_until_ready(); + nvm_common_spm(0, NVM_CMD_ERASE_APP_gc); +} + +/** + * \brief Erase a page within the application section + * + * Erase one page within the application section + * + * \param page_addr Byte address to the page to delete + */ +static inline void nvm_flash_erase_app_page(flash_addr_t page_addr) +{ + nvm_wait_until_ready(); + nvm_common_spm(page_addr, NVM_CMD_ERASE_APP_PAGE_gc); +} + +/** + * \brief Write a page within the application section + * + * Write a page within the application section with the data stored in the + * page buffer. The page needs to be erased before the write to avoid + * corruption of the data written. + * + * \param page_addr Byte address to the page to delete + */ +static inline void nvm_flash_split_write_app_page(flash_addr_t page_addr) +{ + nvm_wait_until_ready(); + nvm_common_spm(page_addr, NVM_CMD_WRITE_APP_PAGE_gc); +} + +/** + * \brief Erase and write a page within the application section + * + * Erase and the write a page within the application section with the data + * stored in the page buffer. Erase and write is done in an atomic operation. + * + * \param page_addr Byte address to the page to delete + */ +static inline void nvm_flash_atomic_write_app_page(flash_addr_t page_addr) +{ + nvm_wait_until_ready(); + nvm_common_spm(page_addr, NVM_CMD_ERASE_WRITE_APP_PAGE_gc); +} + +void nvm_issue_flash_range_crc(flash_addr_t start_addr, flash_addr_t end_addr); + +void nvm_flash_read_buffer(flash_addr_t address, void *buf, uint16_t len); + +void nvm_flash_erase_and_write_buffer(flash_addr_t address, const void *buf, + uint16_t len, bool b_blank_check); + +/** + * \brief Erase a page within the boot section + * + * Erase one page within the boot section + * + * \param page_addr Byte address to the page to delete + */ +static inline void nvm_flash_erase_boot_page(flash_addr_t page_addr) +{ + nvm_wait_until_ready(); + nvm_common_spm(page_addr, NVM_CMD_ERASE_BOOT_PAGE_gc); +} + +/** + * \brief Write a page within the boot section + * + * Write a page within the boot section with the data stored in the + * page buffer. The page needs to be erased before the write to avoid + * corruption of the data written. + * + * \param page_addr Byte address to the page to delete + */ +static inline void nvm_flash_split_write_boot_page(flash_addr_t page_addr) +{ + nvm_wait_until_ready(); + nvm_common_spm(page_addr, NVM_CMD_WRITE_BOOT_PAGE_gc); +} + +/** + * \brief Erase and write a page within the boot section + * + * Erase and the write a page within the boot section with the data + * stored in the page buffer. Erase and write is done in an atomic operation. + * + * \param page_addr Byte address to the page to delete + */ +static inline void nvm_flash_atomic_write_boot_page(flash_addr_t page_addr) +{ + nvm_wait_until_ready(); + nvm_common_spm(page_addr, NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc); +} + +void nvm_user_sig_read_buffer(flash_addr_t address, void *buf, uint16_t len); +void nvm_user_sig_write_buffer(flash_addr_t address, const void *buf, + uint16_t len, bool b_blank_check); + +/** + * \brief Erase the user calibration section page + * + * Erase the user calibration section page. There is only one page, so no + * parameters are needed. + */ +static inline void nvm_flash_erase_user_section(void) +{ + nvm_wait_until_ready(); + nvm_common_spm(0, NVM_CMD_ERASE_USER_SIG_ROW_gc); +} + +/** + * \brief Write the user calibration section page + * + * Write a the user calibration section page with the data stored in the + * page buffer. The page needs to be erased before the write to avoid + * corruption of the data written. There is only one page, so no + * parameters are needed. + */ +static inline void nvm_flash_write_user_page(void) +{ + nvm_wait_until_ready(); + nvm_common_spm(0, NVM_CMD_WRITE_USER_SIG_ROW_gc); +} + +//! @} + +/** + * \defgroup nvm_fuse_lock_group NVM driver fuse and lock bits handling + * \ingroup nvm_group + * \brief Functions for reading fuses and writing lock bits. + * + * The Fuses are used to set important system functions and can only be written + * from an external programming interface. The application software can read + * the fuses. The fuses are used to configure reset sources such as Brown-out + * Detector and Watchdog, Start-up configuration, JTAG enable and JTAG user ID. + * + * The Lock bits are used to set protection level on the different flash + * sections. They are used to block read and/or write on the different flash + * sections. Lock bits can be written from en external programmer and from the + * application software to set a more strict protection level, but not to set a + * less strict protection level. Chip erase is the only way to erase the lock + * bits. The lock bits are erased after the rest of the flash memory is erased. + * An unprogrammed fuse or lock bit will have the value one, while a programmed + * fuse or lock bit will have the value zero. + * Both fuses and lock bits are reprogrammable like the Flash Program memory. + * + * \note The functions in this module are modifying the NVM.CMD register. + * If the application are using program space access in interrupts + * (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts + * needs to be disabled when running EEPROM access functions. If not + * the program space reads will be corrupted. + * @{ + */ + +// The different fuse bytes +enum fuse_byte_t { + FUSEBYTE0 = 0, + FUSEBYTE1 = 1, + FUSEBYTE2 = 2, + FUSEBYTE3 = 3, // not used on current devices + FUSEBYTE4 = 4, + FUSEBYTE5 = 5, +}; + +uint8_t nvm_fuses_read(enum fuse_byte_t fuse); + +/** + * \brief Program the lock bits. + * + * Program the lock bits to the given values. Lock bits can only be programmed + * to a more secure setting than previously programmed. To clear lock bits, a + * flash erase has to be issued. + * + * \param blbb_lock Boot loader section lock bits to program + * \param blba_lock Application section lock bits to program + * \param blbat_lock Application table section lock bits to program + * \param lb_lock Flash/eeprom lock bits to program + */ +static inline void nvm_lock_bits_write(enum NVM_BLBB_enum blbb_lock, + enum NVM_BLBA_enum blba_lock, enum NVM_BLBAT_enum blbat_lock, + enum NVM_LB_enum lb_lock) +{ + nvm_wait_until_ready(); + NVM.DATA0 = (uint8_t)blbb_lock | (uint8_t)blba_lock | (uint8_t)blbat_lock | + (uint8_t)lb_lock; + nvm_issue_command(NVM_CMD_WRITE_LOCK_BITS_gc); +} + +/** + * \brief Program the BLBB lock bits. + * + * Program the lock bits for the boot loader section (BLBB). Other lock bits + * (BLBA, BLBAT and LB) are not altered (ie. programmed to NOLOCK). + * + * \param blbb_lock Boot loader section lock bits to program + */ +static inline void nvm_blbb_lock_bits_write(enum NVM_BLBB_enum blbb_lock) +{ + nvm_lock_bits_write(blbb_lock, NVM_BLBA_NOLOCK_gc, NVM_BLBAT_NOLOCK_gc, + NVM_LB_NOLOCK_gc); +} + +/** + * \brief Program the BLBA lock bits. + * + * Program the lock bits for the application section (BLBA). Other lock bits + * (BLBB, BLBAT and LB) are not altered (ie. programmed to NOLOCK). + * + * \param blba_lock Application section lock bits to program + */ +static inline void nvm_blba_lock_bits_write(enum NVM_BLBA_enum blba_lock) +{ + nvm_lock_bits_write(NVM_BLBB_NOLOCK_gc, blba_lock, NVM_BLBAT_NOLOCK_gc, + NVM_LB_NOLOCK_gc); +} + +/** + * \brief Program the BLBAT lock bits. + * + * Program the lock bits for the application table section (BLBAT). Other lock + * bits (BLBB, BLBA and LB) are not altered (ie. programmed to NOLOCK). + * + * \param blbat_lock Application table section lock bits to program + */ +static inline void nvm_blbat_lock_bits_write(enum NVM_BLBAT_enum blbat_lock) +{ + nvm_lock_bits_write(NVM_BLBB_NOLOCK_gc, NVM_BLBA_NOLOCK_gc, blbat_lock, + NVM_LB_NOLOCK_gc); +} + +/** + * \brief Program the LB lock bits. + * + * Program the lock bits for the flash and eeprom (LB). Other lock bits + * (BLBB, BLBA and BLBAT) are not altered (ie. programmed to NOLOCK). + * + * \param lb_lock Flash/eeprom lock bits to program + */ +static inline void nvm_lb_lock_bits_write(enum NVM_LB_enum lb_lock) +{ + nvm_lock_bits_write(NVM_BLBB_NOLOCK_gc, NVM_BLBA_NOLOCK_gc, + NVM_BLBAT_NOLOCK_gc, lb_lock); +} + +//! @} + +/** + * \page xmega_nvm_quickstart Quick Start Guide for the XMEGA NVM Driver + * + * This is the quick start guide for the \ref nvm_group "NVM Driver", with + * step-by-step instructions on how to configure and use the driver for + * specific use cases. + * + * The section described below can be compiled into e.g. the main application + * loop or any other function that will need to interface non-volatile memory. + * + * \section xmega_nvm_quickstart_basic Basic usage of the NVM driver + * This section will present three use cases of the NVM driver. The first will + * write a page to EEPROM and verify that it has been written, the second will + * access the BOD-level fuse to verify that the level is correctly set, and the + * third will read a chunk from the user signature row. + * + * \section xmega_nvm_quickstart_eeprom_case Use case 1: EEPROM + * + * The NVM driver has functions for interfacing many types of non-volatile + * memory, including flash, EEPROM, fuses and lock bits. The example code + * below will write a page to the internal EEPROM, and read it back to verify, + * using memory mapped I/O. + * + * \section xmega_nvm_quickstart_eeprom_case_setup_steps Setup steps + * There are no setup steps required for this use case. + * + * \subsection nvm_quickstart_eeprom_case_example_code Example code + * + * \code + #define EXAMPLE_PAGE 2 + #define EXAMPLE_ADDR EXAMPLE_PAGE * EEPROM_PAGE_SIZE + + uint8_t write_page[EEPROM_PAGE_SIZE]; + uint8_t read_page[EEPROM_PAGE_SIZE]; + + fill_page_with_known_data(write_page); + fill_page_with_zeroes(read_page); + + nvm_eeprom_load_page_to_buffer(write_page); + nvm_eeprom_atomic_write_page(EXAMPLE_PAGE); + + nvm_eeprom_read_buffer(EXAMPLE_ADDR, + read_page, EEPROM_PAGE_SIZE); + + check_if_pages_are_equal(write_page, read_page); +\endcode + * + * \subsection nvm_quickstart_eeprom_case_workflow Workflow + * + * -# We define where we would like to store our data, and we arbitrarily + * choose page 2 of EEPROM: + * - \code + #define EXAMPLE_PAGE 2 + #define EXAMPLE_ADDR EXAMPLE_PAGE * EEPROM_PAGE_SIZE +\endcode + * -# Define two tables, one which contains the data which we will write, + * and one which we will read the data into: + * - \code + uint8_t write_page[EEPROM_PAGE_SIZE]; + uint8_t read_page[EEPROM_PAGE_SIZE]; +\endcode + * -# Fill the tables with our data, and zero out the read table: + * - \code + fill_page_with_known_data(write_page); + fill_page_with_zeroes(read_page); +\endcode + * - \note These functions are undeclared, you should replace them with + * your own appropriate functions. + * -# We load our page into a temporary EEPROM page buffer: + * - \code + nvm_eeprom_load_page_to_buffer(write_page); +\endcode + * - \attention The function used above will not work if memory mapping + * is enabled. + * -# Do an atomic write of the page from buffer into the specified page: + * - \code + nvm_eeprom_atomic_write_page(EXAMPLE_PAGE); +\endcode + * - \note The function \ref nvm_eeprom_atomic_write_page() erases the + * page before writing the new one. For non-atomic (split) + * writing without deleting, see \ref nvm_eeprom_split_write_page() + * -# Read the page back into our read_page[] table: + * - \code + nvm_eeprom_read_buffer(EXAMPLE_ADDR, + read_page, EEPROM_PAGE_SIZE); +\endcode + * -# Verify that the page is equal to the one that was written earlier: + * - \code + check_if_pages_are_equal(write_page, read_page); +\endcode + * - \note This function is not declared, you should replace it with your + * own appropriate function. + * + * \section xmega_nvm_quickstart_fuse_case Use case 2: Fuses + * + * The NVM driver has functions for reading fuses. + * See \ref nvm_fuse_lock_group. + * + * We would like to check whether the Brown-out Detection level is set to + * 2.1V. This is set by programming the fuses when the chip is connected + * to a suitable programmer. The fuse is a part of FUSEBYTE5. If the BODLVL + * is correct, we turn on LED0. + * + * \section xmega_nvm_quickstart_fuse_case_setup_steps Setup steps + * There are no setup steps required for this use case. + * + * \subsection nvm_quickstart_fuse_case_example_code Example code + * \code + uint8_t fuse_value; + fuse_value = nvm_fuses_read(FUSEBYTE5); + + if ((fuse_value & NVM_FUSES_BODLVL_gm) == BODLVL_2V1_gc) { + gpio_set_pin_low(LED0_GPIO); + } +\endcode + * + * \subsection nvm_quickstart_fuse_case_workflow Workflow + * + * -# Create a variable to store the fuse contents: + * - \code + uint8_t fuse_value; +\endcode + * -# The fuse value we are interested in, BODLVL, is stored in FUSEBYTE5. + * We call the function \ref nvm_fuses_read() to read the fuse into our + * variable: + * - \code + fuse_value = nvm_fuses_read(FUSEBYTE5); +\endcode + * -# This ends the reading portion, but we would like to see whether the + * BOD-level is correct, and if it is, light up an LED: + * - \code + if ((fuse_value & NVM_FUSES_BODLVL_gm) == BODLVL_2V1_gc) { + gpio_set_pin_low(LED0_GPIO); + } +\endcode + * + * \section xmega_nvm_quickstart_signature_case Use case 3: Signature row + * + * The NVM driver has functions for reading the signature row of the device. + * Here we will simply read 16 bytes from the user signature row, assuming + * we need what is stored there. + * + * \section xmega_nvm_quickstart_signature_row_setup_steps Setup steps + * There are no setup steps required for this use case. + * + * \subsection xmega_nvm_quickstart_signature_row_example_code Example code + * + * \code + #define START_ADDR 0x10 + #define DATA_LENGTH 16 + + uint8_t values[LENGTH]; + uint8_t i; + + for (i = 0; i < DATA_LENGTH; i++) { + values[i] = nvm_read_user_signature_row(START_ADDR + i); + } +\endcode + * + * \subsection nvm_quickstart_signature_case_workflow Workflow + * + * -# Define starting address and length of data segment, and create + * variables needed to store and process the data: + * - \code + #define START_ADDR 0x10 + #define DATA_LENGTH 16 + + uint8_t values[LENGTH]; + uint8_t i; +\endcode + * -# Iterate through the user signature row, and store our desired data: + * - \code + for (i = 0; i < DATA_LENGTH; i++) { + values[i] = nvm_read_user_signature_row(START_ADDR + i); + } +\endcode + * + */ + +#ifdef __cplusplus +} +#endif + +#endif /* NVM_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/nvm/nvm_asm.s b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/nvm/nvm_asm.s new file mode 100644 index 0000000..6d74e08 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/nvm/nvm_asm.s @@ -0,0 +1,197 @@ +/** + * \file + * + * \brief Non Volatile Memory controller driver + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#include + +#if defined(__GNUC__) +//! Value to write to CCP for access to protected IO registers. +# define CCP_SPM_gc 0x9D + +//! NVM busy flag +# define NVM_NVMBUSY_bp 7 + +//! NVM command for loading flash buffer +# define NVM_CMD_LOAD_FLASH_BUFFER_gc 0x23 +#elif defined(__IAR_SYSTEMS_ASM__) +// All values are defined for IAR +#else +# error Unknown assembler +#endif + +#ifndef __DOXYGEN__ + PUBLIC_FUNCTION(nvm_read_byte) +#if defined(__GNUC__) + lds r20, NVM_CMD ; Store NVM command register + mov ZL, r22 ; Load byte index into low byte of Z. + mov ZH, r23 ; Load high byte into Z. + sts NVM_CMD, r24 ; Load prepared command into NVM Command register. + lpm r24, Z ; Perform an LPM to read out byte + sts NVM_CMD, r20 ; Restore NVM command register +#elif defined(__IAR_SYSTEMS_ASM__) + lds r20, NVM_CMD ; Store NVM command register + mov ZL, r18 ; Load byte index into low byte of Z. + mov ZH, r19 ; Load high byte into Z. + sts NVM_CMD, r16 ; Load prepared command into NVM Command register. + lpm r16, Z ; Perform an LPM to read out byte + sts NVM_CMD, r20 ; Restore NVM command register +#endif + + ret + + END_FUNC(nvm_read_byte) + +// IAR forgets about include files after each module, so need to include again +#if defined(__IAR_SYSTEMS_ASM__) +# include +#endif + + /** + * \brief Perform SPM command + */ + PUBLIC_FUNCTION_SEGMENT(nvm_common_spm, BOOT) + +#if defined(__GNUC__) + /** + * For GCC: + * \param address uint32_t r22:r25 + * \param nvm_cmd uint8_t r20 + */ + in r25, RAMPZ ; Store RAMPZ. Highest address byte is ignored, so using that + out RAMPZ, r24 ; Load R24 into RAMPZ + movw ZL, r22 ; Load R22:R23 into Z. + lds r24, NVM_CMD ; Store NVM command register (r24 is no longer needed) + sts NVM_CMD, r20 ; Load prepared command into NVM Command register. + ldi r23, CCP_SPM_gc ; Prepare Protect SPM signature (r23 is no longer needed) + sts CCP, r23 ; Enable SPM operation (this disables interrupts for 4 cycles). + spm ; Self-program. + sts NVM_CMD, r24 ; Restore NVM command register + out RAMPZ, r25 ; Restore RAMPZ register. +#elif defined(__IAR_SYSTEMS_ASM__) + /** + * For IAR: + * \param address uint32_t r16:r19 + * \param nvm_cmd uint8_t r20 + */ + in r19, RAMPZ ; Store RAMPZ. Highest address byte is ignored, so using that + out RAMPZ, r18 ; Load R18 into RAMPZ + movw ZL, r16 ; Load R16:R17 into Z. + lds r18, NVM_CMD ; Store NVM command register (r18 is no longer needed) + sts NVM_CMD, r20 ; Load prepared command into NVM Command register. + ldi r19, CCP_SPM_gc ; Prepare Protect SPM signature (r19 is no longer needed) + sts CCP, r19 ; Enable SPM operation (this disables interrupts for 4 cycles). + spm ; Self-program. + sts NVM_CMD, r18 ; Restore NVM command register + out RAMPZ, r19 ; Restore RAMPZ register. +#endif + + ret + + END_FUNC(nvm_common_spm) + +// IAR forgets about include files after each module, so need to include again +#if defined(__IAR_SYSTEMS_ASM__) +# include +#endif + + /** + * \brief Load byte to page buffer + * + */ + PUBLIC_FUNCTION_SEGMENT(nvm_flash_load_word_to_buffer, BOOT) + +#if defined(__GNUC__) + /** + * For GCC: + * \param word_addr uint32_t r22:r25 + * \param data uint16_t r20:r21 + */ +wait_nvm: + lds r18, NVM_STATUS + sbrc r18, NVM_NVMBUSY_bp + rjmp wait_nvm + + in r25, RAMPZ ; Store RAMPZ. Highest address byte is ignored, so using that + out RAMPZ, r24 ; Load R24 into RAMPZ + movw ZL, r22 ; Load R22:R23 into Z. + + lds r24, NVM_CMD ; Store NVM command register (r24 is no longer needed) + ldi r18, NVM_CMD_LOAD_FLASH_BUFFER_gc + sts NVM_CMD, r18 ; Load prepared command into NVM Command register. + + movw r0, r20 ; Load R20:R21 into R0:R1 + spm ; Self-program. + + clr r1 ; Clear R1 for GCC _zero_reg_ to function properly. + sts NVM_CMD, r24 ; Restore NVM command register + out RAMPZ, r25 ; Restore RAMPZ register. +#elif defined(__IAR_SYSTEMS_ASM__) + /** + * For IAR: + * \param word_addr uint32_t r16:r19 + * \param data uint16_t r20:r21 + */ +wait_nvm: + lds r19, NVM_STATUS + sbrc r19, NVM_NVMBUSY_bp + rjmp wait_nvm + + in r19, RAMPZ ; Store RAMPZ. Highest byte is ignored, so using that + out RAMPZ, r18 ; Load R18 into RAMPZ + movw ZL, r16 ; Load R16:R17 into Z. + + lds r18, NVM_CMD ; Store NVM command register (r18 is no longer needed) + ldi r17, NVM_CMD_LOAD_FLASH_BUFFER_gc + sts NVM_CMD, r17 ; Load prepared command into NVM Command register. + + movw r0, r20 ; Load R20:R21 into R0:R1 + spm ; Self-program. + + sts NVM_CMD, r18 ; Restore NVM command register + out RAMPZ, r19 ; Restore RAMPZ register. +#endif + + ret + + END_FUNC(nvm_flash_load_word_to_buffer) + + END_FILE() +#endif // __DOXYGEN__ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/pmic/pmic.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/pmic/pmic.h new file mode 100644 index 0000000..81f5615 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/pmic/pmic.h @@ -0,0 +1,352 @@ +/** + * \file + * + * \brief Programmable Multilevel Interrupt Controller driver + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef PMIC_H +#define PMIC_H + +#include +#include + +/** + * \defgroup pmic_group Programmable Multilevel Interrupt Controller + * + * See \ref xmega_pmic_quickstart. + * + * This is a low-level driver implementation for the AVR XMEGA Programmable + * Multilevel Interrupt Controller. + * + * \note If these functions are used in interrupt service routines (ISRs), any + * non-ISR code or ISR code for lower level interrupts must ensure that the + * operations are atomic, i.e., by disabling interrupts during the function + * calls. + * @{ + */ + +/** + * \brief Interrupt level bitmasks + * + * \note These may be OR'ed, e.g., if multiple levels are to be enabled or + * disabled. + */ +enum pmic_level { + PMIC_LVL_LOW = PMIC_LOLVLEN_bm, //!< Low-level interrupts + PMIC_LVL_MEDIUM = PMIC_MEDLVLEN_bm, //!< Medium-level interrupts + PMIC_LVL_HIGH = PMIC_HILVLEN_bm, //!< High-level interrupts + /** + * \brief Non-maskable interrupts + * \note These cannot be enabled nor disabled. + */ + PMIC_LVL_NMI = PMIC_NMIEX_bp, +}; + +//! Interrupt vector locations +enum pmic_vector { + PMIC_VEC_APPLICATION, //!< Application section + PMIC_VEC_BOOT, //!< Boot section + PMIC_NR_OF_VECTORS, //!< Number of interrupt vector locations +}; + +//! Interrupt scheduling schemes +enum pmic_schedule { + PMIC_SCH_FIXED_PRIORITY, //!< Default, fixed priority scheduling + PMIC_SCH_ROUND_ROBIN, //!< Round-robin scheduling + PMIC_NR_OF_SCHEDULES, //!< Number of interrupt scheduling schemes +}; + +/** + * \brief Initialize the PMIC + * + * Enables all interrupt levels, with vectors located in the application section + * and fixed priority scheduling. + */ +static inline void pmic_init(void) +{ + PMIC.CTRL = PMIC_LVL_LOW | PMIC_LVL_MEDIUM | + PMIC_LVL_HIGH; +} + +/** + * \brief Enable interrupts with specified \a level(s). + * + * \param level Interrupt level(s) to enable. + */ +static inline void pmic_enable_level(enum pmic_level level) +{ + Assert((level & PMIC_LVL_NMI)); + + PMIC.CTRL |= level; +} + +/** + * \brief Disable interrupts with specified \a level(s). + * + * \param level Interrupt level(s) to disable. + */ +static inline void pmic_disable_level(enum pmic_level level) +{ + Assert((level & PMIC_LVL_NMI)); + + PMIC.CTRL &= ~level; +} + +/** + * \brief Check if specified interrupt \a level(s) is enabled. + * + * \param level Interrupt level(s) to check. + * + * \return True if interrupt level(s) is enabled. + */ +static inline bool pmic_level_is_enabled(enum pmic_level level) +{ + Assert((level & PMIC_LVL_NMI)); + + return PMIC.CTRL & level; +} + +/** + * \brief Get currently enabled level(s) + * + * \return Bitmask with currently enabled levels. + */ +static inline enum pmic_level pmic_get_enabled_levels(void) +{ + return (enum pmic_level)(PMIC.CTRL & (PMIC_LVL_LOW | PMIC_LVL_MEDIUM + | PMIC_LVL_HIGH)); +} + +/** + * \brief Check if an interrupt level(s) is currently executing. + * + * \param level Interrupt level(s) to check. + * + * \return True if interrupt level(s) is currently executing. + */ +static inline bool pmic_level_is_executing(enum pmic_level level) +{ + return PMIC.STATUS & level; +} + +/** + * \brief Set interrupt scheduling for low-level interrupts. + * + * \param schedule Interrupt scheduling method to set. + * + * \note The low-priority vector, INTPRI, must be set to 0 when round-robin + * scheduling is disabled to return to default interrupt priority order. + */ +static inline void pmic_set_scheduling(enum pmic_schedule schedule) +{ + Assert(schedule < PMIC_NR_OF_SCHEDULES); + + switch (schedule) { + case PMIC_SCH_FIXED_PRIORITY: + PMIC.CTRL &= ~PMIC_RREN_bm; + PMIC.INTPRI = 0; + break; + + case PMIC_SCH_ROUND_ROBIN: + PMIC.CTRL |= PMIC_RREN_bm; + break; + + default: + break; + }; +} + +/** + * \brief Set location of interrupt vectors. + * + * \param vector Location to use for interrupt vectors. + */ +static inline void pmic_set_vector_location(enum pmic_vector vector) +{ + uint8_t ctrl = PMIC.CTRL; + + Assert(vector < PMIC_NR_OF_VECTORS); + + switch (vector) { + case PMIC_VEC_APPLICATION: + ctrl &= ~PMIC_IVSEL_bm; + break; + + case PMIC_VEC_BOOT: + ctrl |= PMIC_IVSEL_bm; + break; + + default: + break; + } + + ccp_write_io((uint8_t*)&PMIC.CTRL, ctrl); +} + +//! @} + +/** + * \page xmega_pmic_quickstart Quick start guide for PMIC driver + * + * This is the quick start guide for the \ref pmic_group "PMIC driver" and + * the closely related \ref interrupt_group "global interrupt driver", with + * step-by-step instructions on how to configure and use the drivers in a + * selection of use cases. + * + * The use cases contain several code fragments. The code fragments in the + * steps for setup can be copied into a custom initialization function, while + * the steps for usage can be copied into, e.g., the main application function. + * + * \section pmic_basic_use_case Basic use case + * In this basic use case, the PMIC is configured for: + * - all interrupt levels enabled + * - round-robin scheduling + * + * This will allow for interrupts from other modules being used. + * + * \section pmic_basic_use_case_setup Setup steps + * + * \subsection pmic_basic_use_case_setup_prereq Prerequisites + * For the setup code of this use case to work, the following must + * be added to the project: + * -# Interrupts for the module requiring the PMIC module have to be + * enabled. + * -# An Interrupt Service Routine (ISR) for a given interrupt vector has to be + * defined, where the interrupt vectors available are defined by toolchain and + * listed in the subsection 'Interrupt Vector Summary' in the data sheet. + * \code + ISR(interrupt_vector){ + //Interrupt Service Routine + } +\endcode + * + * \subsection pmic_basic_use_case_setup_code Example code + * Add to the initialization code: + * \code + pmic_init(); + pmic_set_scheduling(PMIC_SCH_ROUND_ROBIN); + cpu_irq_enable(); +\endcode + * + * \subsection pmic_basic_use_case_setup_flow Workflow + * -# call the PMIC driver's own init function to enable all interrupt levels: + * - \code pmic_init(); \endcode + * -# enable round-robin instead of fixed priority interrupt scheduling: + * - \code pmic_set_scheduling(PMIC_SCH_ROUND_ROBIN); \endcode + * -# enable interrupts globally: + * - \code cpu_irq_enable(); \endcode + * - \attention Interrupts will not trigger without this step. + * + * \section pmic_use_cases Advanced use cases + * For more advanced use of the PMIC driver, see the following use cases: + * - \subpage pmic_use_case_1 : atomic operations + */ + +/** + * \page pmic_use_case_1 Use case #1 + * + * In this use case, the PMIC is configured for: + * - all interrupt levels enabled + * + * This will allow for interrupts from other modules being used. + * + * This use case shows how to make an operation which consists of multiple + * instructions uninterruptible, i.e., into an atomic operation. This is often + * necessary if there is a risk that data can be accessed by interrupt handlers + * while other code is accessing it, and at least one of them modifies it. + * + * \section pmic_use_case_1_setup Setup steps + * + * \subsection pmic_basic_use_case_setup_prereq Prerequisites + * For the setup code of this use case to work, the following must + * be added to the project: + * -# Interrupts for the module requiring the PMIC module have to be + * enabled. + * -# An Interrupt Service Routine (ISR) for a given interrupt vector has to be + * defined, where the interrupt vectors available are defined by toolchain and + * listed in the subsection 'Interrupt Vector Summary' in the data sheet. + * \code + ISR(interrupt_vector){ + //Interrupt Service Routine + } +\endcode + * + * \subsection pmic_use_case_1_setup_code Example code + * Add to application initialization: + * \code + pmic_init(); + cpu_irq_enable(); +\endcode + * + * \subsection pmic_use_case_1_setup_flow Workflow + * -# call the PMIC driver's own init function to enable all interrupt levels: + * - \code pmic_init(); \endcode + * -# set global interrupt enable flag: + * - \code cpu_irq_enable(); \endcode + * + * \section pmic_use_case_1_usage Usage steps + * + * \subsection pmic_use_case_1_usage_code Example code + * \code + Add to application: + void atomic_operation(void) + { + irqflags_t flags; + + flags = cpu_irq_save(); + + // Uninterruptible block of code + + cpu_irq_restore(flags); + } +\endcode + * + * \subsection pmic_use_case_1_usage_flow Workflow + * -# allocate temporary storage for interrupt enable: + * - \code irqflags_t flags; \endcode + * -# clear global interrupt enable flag while saving its previous state: + * - \code flags = cpu_irq_save(); \endcode + * -# restore the previous state of global interrupt flag after operation: + * - \code cpu_irq_restore(flags); \endcode + */ + +#endif /* PMIC_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/sleep/sleep.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/sleep/sleep.h new file mode 100644 index 0000000..8a218c4 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/sleep/sleep.h @@ -0,0 +1,169 @@ +/** + * \file + * + * \brief Sleep controller driver + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef SLEEP_H +#define SLEEP_H + +#include + +/** + * \defgroup sleep_group Sleep controller driver + * + * This is a low-level driver implementation for the AVR XMEGA sleep controller. + * + * \note To minimize the code overhead, these functions do not feature + * interrupt-protected access since they are likely to be called inside + * interrupt handlers or in applications where such protection is not + * necessary. If such protection is needed, it must be ensured by the calling + * code. + * + * \section xmega_sleep_quickstart_section Quick Start Guide + * See \ref xmega_sleep_quickstart + * @{ + */ + +#if defined(__ICCAVR__) || defined(__DOXYGEN__) +# include +//! Macro for issuing the sleep instruction. +# define sleep_enter() __sleep() + +/** + * \brief Enable sleep + */ +static inline void sleep_enable(void) +{ + SLEEP.CTRL |= SLEEP_SEN_bm; +} + +/** + * \brief Disable sleep + */ +static inline void sleep_disable(void) +{ + SLEEP.CTRL &= ~SLEEP_SEN_bm; +} + +#elif defined(__GNUC__) +# include +# define sleep_enter() sleep_cpu() + +#else +# error Unsupported compiler. +#endif + +/** + * \brief Set new sleep mode + * + * \param mode Sleep mode, from the device IO header file. + */ +static inline void sleep_set_mode(enum SLEEP_SMODE_enum mode) +{ + SLEEP.CTRL = mode | (SLEEP.CTRL & ~SLEEP_SMODE_gm); +} + +//! @} + +/** + * \page xmega_sleep_quickstart Quick Start Guide for the XMEGA Sleep Driver + * + * This is the quick start guide for the \ref sleep_group "Sleep Driver", with + * step-by-step instructions on how to configure and use the driver for a + * specific use case. + * + * The section described below can be copied into, e.g. the main application + * loop or any other function that will need to control and execute different + * sleep modes on the device. + * + * \section xmega_sleep_quickstart_basic Basic usage of the sleep driver + * This use case will prepare the device to enter the Power Down sleep mode and + * then enter the sleep mode. After waking up it will disable sleep. + * + * \section xmega_sleep_basic_usage Usage steps + * \subsection xmega_sleep_basic_usage_code Example code + * Add to, e.g., the main loop in the application C-file: + * \code + sleep_set_mode(SLEEP_SMODE_PDOWN_gc); + sleep_enable(); + sleep_enter(); + sleep_disable(); +\endcode + * + * \subsection xmega_sleep_basic_usage Workflow + * -# Set what sleep mode to use, the different sleep modes can be found in the + * device header file under the enum definition SLEEP_SMODE_enum: + * - \code sleep_set_mode(SLEEP_SMODE_PDOWN_gc); \endcode + * -# Enable that the device are allowed to go to sleep: + * - \code sleep_enable(); \endcode + * - \note This function has to be called in order for the device to go to + * sleep. This is a safety feature to stop the device to go to sleep + * unintentionally, even though it is possible to have this enabled at all times + * it is recommended to enable sleep mode only when you intend to go to sleep + * within a few clock cycles. + * -# Enter sleep mode: + * - \code sleep_enter(); \endcode + * - \attention Make sure to enable global interrupt and the interrupt you + * plan to use as wake-up source for your device, do also pay special + * attention to what wake-up sources are available for the different sleep + * modes. Failing to enable interrupts may result in indefinite sleep until + * power is cycled! + * -# When the device is woken from sleep it will execute the interrupt handler + * related to the wakeup-source (interrupt source) and continue on the next line + * of code after the \ref sleep_enter() call. Make sure to disable sleep when + * waking up. + * - \code sleep_disable(); \endcode + * + * \subsection xmega_sleep_basic_sleep_modes Sleep Modes + * Possible sleep modes depend on the device that is used. Please refer to the + * device datasheet and header file to find these definitions. + * + * As an example the ATxmega32A4U device has the following sleep modes: + * - Idle sleep: SLEEP_SMODE_IDLE_gc + * - Power Down: SLEEP_SMODE_PDOWN_gc + * - Power Save: SLEEP_SMODE_PSAVE_gc + * - Standby: SLEEP_SMODE_STDBY_gc + * - Extended standby: SLEEP_SMODE_ESTDBY_gc + */ + +#endif /* SLEEP_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/tc/tc.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/tc/tc.c new file mode 100644 index 0000000..3052c94 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/tc/tc.c @@ -0,0 +1,1081 @@ +/** + * \file + * + * \brief AVR XMEGA TC Driver + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include + +#include "interrupt.h" +#include "compiler.h" +#include "parts.h" + +#include "tc.h" +#include "sysclk.h" +#include "sleepmgr.h" +#include "status_codes.h" + +#if defined(TCC0) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCC0 interrupt callback function +static tc_callback_t tc_tcc0_ovf_callback; +static tc_callback_t tc_tcc0_err_callback; +static tc_callback_t tc_tcc0_cca_callback; +static tc_callback_t tc_tcc0_ccb_callback; +static tc_callback_t tc_tcc0_ccc_callback; +static tc_callback_t tc_tcc0_ccd_callback; + + +/** + * \internal + * \brief Interrupt handler for Timer Counter C0 overflow + * + * This function will handle interrupt on Timer Counter CO overflow and + * call the callback function. + */ +ISR(TCC0_OVF_vect) +{ + if (tc_tcc0_ovf_callback) { + tc_tcc0_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C0 error + * + * This function will handle interrupt on Timer Counter CO error and + * call the callback function. + */ +ISR(TCC0_ERR_vect) +{ + if (tc_tcc0_err_callback) { + tc_tcc0_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C0 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter CO Compare/CaptureA and + * call the callback function. + */ +//ISR(TCC0_CCA_vect) +//{ + //if (tc_tcc0_cca_callback) { + //tc_tcc0_cca_callback(); + //} +//} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C0 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter CO Compare/CaptureB and + * call the callback function. + */ +ISR(TCC0_CCB_vect) +{ + if (tc_tcc0_ccb_callback) { + tc_tcc0_ccb_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C0 Compare/CaptureC + * + * This function will handle interrupt on Timer Counter CO Compare/CaptureC and + * call the callback function. + */ +ISR(TCC0_CCC_vect) +{ + if (tc_tcc0_ccc_callback) { + tc_tcc0_ccc_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C0 Compare/CaptureD + * + * This function will handle interrupt on Timer Counter CO Compare/CaptureD and + * call the callback function. + */ +ISR(TCC0_CCD_vect) +{ + if (tc_tcc0_ccd_callback) { + tc_tcc0_ccd_callback(); + } +} + +#endif + +#if defined(TCC1) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCC1 interrupt callback function +static tc_callback_t tc_tcc1_ovf_callback; +static tc_callback_t tc_tcc1_err_callback; +static tc_callback_t tc_tcc1_cca_callback; +static tc_callback_t tc_tcc1_ccb_callback; + +/** + * \internal + * \brief Interrupt handler for Timer Counter C1 overflow + * + * This function will handle interrupt on Timer Counter C1 overflow and + * call the callback function. + */ +ISR(TCC1_OVF_vect) +{ + if (tc_tcc1_ovf_callback) { + tc_tcc1_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C1 error + * + * This function will handle interrupt on Timer Counter C1 error and + * call the callback function. + */ +ISR(TCC1_ERR_vect) +{ + if (tc_tcc1_err_callback) { + tc_tcc1_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C1 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter C1 Compare/CaptureA and + * call the callback function. + */ +ISR(TCC1_CCA_vect) +{ + if (tc_tcc1_cca_callback) { + tc_tcc1_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter C1 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter C1 Compare/CaptureB and + * call the callback function. + */ +ISR(TCC1_CCB_vect) +{ + if (tc_tcc1_ccb_callback) { + tc_tcc1_ccb_callback(); + } +} + +#endif + +#if defined(TCD0) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCD0 interrupt callback function +static tc_callback_t tc_tcd0_ovf_callback; +static tc_callback_t tc_tcd0_err_callback; +static tc_callback_t tc_tcd0_cca_callback; +static tc_callback_t tc_tcd0_ccb_callback; +static tc_callback_t tc_tcd0_ccc_callback; +static tc_callback_t tc_tcd0_ccd_callback; + + +/** + * \internal + * \brief Interrupt handler for Timer Counter D0 overflow + * + * This function will handle interrupt on Timer Counter D0 overflow and + * call the callback function. + */ +ISR(TCD0_OVF_vect) +{ + if (tc_tcd0_ovf_callback) { + tc_tcd0_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D0 error + * + * This function will handle interrupt on Timer Counter D0 error and + * call the callback function. + */ +ISR(TCD0_ERR_vect) +{ + if (tc_tcd0_err_callback) { + tc_tcd0_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D0 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter D0 Compare/CaptureA and + * call the callback function. + */ +ISR(TCD0_CCA_vect) +{ + if (tc_tcd0_cca_callback) { + tc_tcd0_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D0 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter D0 Compare/CaptureB and + * call the callback function. + */ +ISR(TCD0_CCB_vect) +{ + if (tc_tcd0_ccb_callback) { + tc_tcd0_ccb_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D0 Compare/CaptureC + * + * This function will handle interrupt on Timer Counter D0 Compare/CaptureC and + * call the callback function. + */ +ISR(TCD0_CCC_vect) +{ + if (tc_tcd0_ccc_callback) { + tc_tcd0_ccc_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D0 Compare/CaptureD + * + * This function will handle interrupt on Timer Counter D0 Compare/CaptureD and + * call the callback function. + */ +ISR(TCD0_CCD_vect) +{ + if (tc_tcd0_ccd_callback) { + tc_tcd0_ccd_callback(); + } +} + +#endif + +#if defined(TCD1) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCD1 interrupt callback function +static tc_callback_t tc_tcd1_ovf_callback; +static tc_callback_t tc_tcd1_err_callback; +static tc_callback_t tc_tcd1_cca_callback; +static tc_callback_t tc_tcd1_ccb_callback; + +/** + * \internal + * \brief Interrupt handler for Timer Counter D1 overflow + * + * This function will handle interrupt on Timer Counter D1 overflow and + * call the callback function. + */ +ISR(TCD1_OVF_vect) +{ + if (tc_tcd1_ovf_callback) { + tc_tcd1_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D1 error + * + * This function will handle interrupt on Timer Counter D1 error and + * call the callback function. + */ +ISR(TCD1_ERR_vect) +{ + if (tc_tcd1_err_callback) { + tc_tcd1_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D1 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter D1 Compare/CaptureA and + * call the callback function. + */ +ISR(TCD1_CCA_vect) +{ + if (tc_tcd1_cca_callback) { + tc_tcd1_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter D1 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter D1 Compare/CaptureB and + * call the callback function. + */ +ISR(TCD1_CCB_vect) +{ + if (tc_tcd1_ccb_callback) { + tc_tcd1_ccb_callback(); + } +} + +#endif + + +#if defined(TCE0) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCE0 interrupt callback function +static tc_callback_t tc_tce0_ovf_callback; +static tc_callback_t tc_tce0_err_callback; +static tc_callback_t tc_tce0_cca_callback; +static tc_callback_t tc_tce0_ccb_callback; +static tc_callback_t tc_tce0_ccc_callback; +static tc_callback_t tc_tce0_ccd_callback; + + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 overflow + * + * This function will handle interrupt on Timer Counter E0 overflow and + * call the callback function. + */ +ISR(TCE0_OVF_vect) +{ + if (tc_tce0_ovf_callback) { + tc_tce0_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 error + * + * This function will handle interrupt on Timer Counter E0 error and + * call the callback function. + */ +ISR(TCE0_ERR_vect) +{ + if (tc_tce0_err_callback) { + tc_tce0_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter E0 Compare/CaptureA and + * call the callback function. + */ +ISR(TCE0_CCA_vect) +{ + if (tc_tce0_cca_callback) { + tc_tce0_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter E0 Compare/CaptureB and + * call the callback function. + */ +ISR(TCE0_CCB_vect) +{ + if (tc_tce0_ccb_callback) { + tc_tce0_ccb_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 Compare/CaptureC + * + * This function will handle interrupt on Timer Counter E0 Compare/CaptureC and + * call the callback function. + */ +ISR(TCE0_CCC_vect) +{ + if (tc_tce0_ccc_callback) { + tc_tce0_ccc_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 Compare/CaptureD + * + * This function will handle interrupt on Timer Counter E0 Compare/CaptureD and + * call the callback function. + */ +ISR(TCE0_CCD_vect) +{ + if (tc_tce0_ccd_callback) { + tc_tce0_ccd_callback(); + } +} + +#endif + +#if defined(TCE1) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCE1 interrupt callback function +static tc_callback_t tc_tce1_ovf_callback; +static tc_callback_t tc_tce1_err_callback; +static tc_callback_t tc_tce1_cca_callback; +static tc_callback_t tc_tce1_ccb_callback; + +/** + * \internal + * \brief Interrupt handler for Timer Counter E1 overflow + * + * This function will handle interrupt on Timer Counter E1 overflow and + * call the callback function. + */ +ISR(TCE1_OVF_vect) +{ + if (tc_tce1_ovf_callback) { + tc_tce1_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E1 error + * + * This function will handle interrupt on Timer Counter E1 error and + * call the callback function. + */ +ISR(TCE1_ERR_vect) +{ + if (tc_tce1_err_callback) { + tc_tce1_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E1 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter E1 Compare/CaptureA and + * call the callback function. + */ +ISR(TCE1_CCA_vect) +{ + if (tc_tce1_cca_callback) { + tc_tce1_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter E1 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter E1 Compare/CaptureB and + * call the callback function. + */ +ISR(TCE1_CCB_vect) +{ + if (tc_tce1_ccb_callback) { + tc_tce1_ccb_callback(); + } +} + +#endif + +#if defined(TCF0) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCF0 interrupt callback function +static tc_callback_t tc_tcf0_ovf_callback; +static tc_callback_t tc_tcf0_err_callback; +static tc_callback_t tc_tcf0_cca_callback; +static tc_callback_t tc_tcf0_ccb_callback; +static tc_callback_t tc_tcf0_ccc_callback; +static tc_callback_t tc_tcf0_ccd_callback; + + +/** + * \internal + * \brief Interrupt handler for Timer Counter E0 overflow + * + * This function will handle interrupt on Timer Counter F0 overflow and + * call the callback function. + */ +ISR(TCF0_OVF_vect) +{ + if (tc_tcf0_ovf_callback) { + tc_tcf0_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F0 error + * + * This function will handle interrupt on Timer Counter F0 error and + * call the callback function. + */ +ISR(TCF0_ERR_vect) +{ + if (tc_tcf0_err_callback) { + tc_tcf0_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F0 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter F0 Compare/CaptureA and + * call the callback function. + */ +ISR(TCF0_CCA_vect) +{ + if (tc_tcf0_cca_callback) { + tc_tcf0_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F0 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter F0 Compare/CaptureB and + * call the callback function. + */ +ISR(TCF0_CCB_vect) +{ + if (tc_tcf0_ccb_callback) { + tc_tcf0_ccb_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F0 Compare/CaptureC + * + * This function will handle interrupt on Timer Counter F0 Compare/CaptureC and + * call the callback function. + */ +ISR(TCF0_CCC_vect) +{ + if (tc_tcf0_ccc_callback) { + tc_tcf0_ccc_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F0 Compare/CaptureD + * + * This function will handle interrupt on Timer Counter F0 Compare/CaptureD and + * call the callback function. + */ +ISR(TCF0_CCD_vect) +{ + if (tc_tcf0_ccd_callback) { + tc_tcf0_ccd_callback(); + } +} + +#endif + +#if defined(TCF1) || defined(__DOXYGEN__) +//! \internal Local storage of Timer Counter TCF1 interrupt callback function +static tc_callback_t tc_tcf1_ovf_callback; +static tc_callback_t tc_tcf1_err_callback; +static tc_callback_t tc_tcf1_cca_callback; +static tc_callback_t tc_tcf1_ccb_callback; + +/** + * \internal + * \brief Interrupt handler for Timer Counter F1 overflow + * + * This function will handle interrupt on Timer Counter F1 overflow and + * call the callback function. + */ +ISR(TCF1_OVF_vect) +{ + if (tc_tcf1_ovf_callback) { + tc_tcf1_ovf_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F1 error + * + * This function will handle interrupt on Timer Counter F1 error and + * call the callback function. + */ +ISR(TCF1_ERR_vect) +{ + if (tc_tcf1_err_callback) { + tc_tcf1_err_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F1 Compare/CaptureA + * + * This function will handle interrupt on Timer Counter F1 Compare/CaptureA and + * call the callback function. + */ +ISR(TCF1_CCA_vect) +{ + if (tc_tcf1_cca_callback) { + tc_tcf1_cca_callback(); + } +} + +/** + * \internal + * \brief Interrupt handler for Timer Counter F1 Compare/CaptureB + * + * This function will handle interrupt on Timer Counter F1 Compare/CaptureB and + * call the callback function. + */ +ISR(TCF1_CCB_vect) +{ + if (tc_tcf1_ccb_callback) { + tc_tcf1_ccb_callback(); + } +} + +#endif + +/** + * \brief Enable TC + * + * Enables the TC. + * + * \param tc Pointer to TC module + * + * \note + * unmask TC clock (sysclk), but does not configure the TC clock source. + */ +void tc_enable(volatile void *tc) +{ + irqflags_t iflags = cpu_irq_save(); + +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0); + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC1); + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC0); + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC1); + sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC0); + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC1); + sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC0); + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC1); + sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + } else +#endif + { + cpu_irq_restore(iflags); + return; + } + sleepmgr_lock_mode(SLEEPMGR_IDLE); + cpu_irq_restore(iflags); +} + + +/** + * \brief Disable TC + * + * Disables the TC. + * + * \param tc Pointer to TC module + * + * \note + * mask TC clock (sysclk). + */ +void tc_disable(volatile void *tc) +{ + irqflags_t iflags = cpu_irq_save(); + + sleepmgr_unlock_mode(SLEEPMGR_IDLE); + +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC0); + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC1); + sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES); + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC0); + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC1); + sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES); + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC0); + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC1); + sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_HIRES); + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC0); + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC1); + sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_HIRES); + } else +#endif + { + cpu_irq_restore(iflags); + return; + } + cpu_irq_restore(iflags); +} + +void tc_set_overflow_interrupt_callback(volatile void *tc, + tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + tc_tcc0_ovf_callback = callback; + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + tc_tcc1_ovf_callback = callback; + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + tc_tcd0_ovf_callback = callback; + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + tc_tcd1_ovf_callback = callback; + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + tc_tce0_ovf_callback = callback; + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + tc_tce1_ovf_callback = callback; + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + tc_tcf0_ovf_callback = callback; + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + tc_tcf1_ovf_callback = callback; + } else +#endif + {} +} + +void tc_set_error_interrupt_callback(volatile void *tc, tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + tc_tcc0_err_callback = callback; + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + tc_tcc1_err_callback = callback; + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + tc_tcd0_err_callback = callback; + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + tc_tcd1_err_callback = callback; + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + tc_tce0_err_callback = callback; + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + tc_tce1_err_callback = callback; + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + tc_tcf0_err_callback = callback; + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + tc_tcf1_err_callback = callback; + } else +#endif + {} +} + +void tc_set_cca_interrupt_callback(volatile void *tc, tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + tc_tcc0_cca_callback = callback; + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + tc_tcc1_cca_callback = callback; + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + tc_tcd0_cca_callback = callback; + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + tc_tcd1_cca_callback = callback; + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + tc_tce0_cca_callback = callback; + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + tc_tce1_cca_callback = callback; + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + tc_tcf0_cca_callback = callback; + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + tc_tcf1_cca_callback = callback; + } else +#endif + {} +} + +void tc_set_ccb_interrupt_callback(volatile void *tc, tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + tc_tcc0_ccb_callback = callback; + } else +#endif +#ifdef TCC1 + if ((uintptr_t) tc == (uintptr_t) & TCC1) { + tc_tcc1_ccb_callback = callback; + } else +#endif +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + tc_tcd0_ccb_callback = callback; + } else +#endif +#ifdef TCD1 + if ((uintptr_t) tc == (uintptr_t) & TCD1) { + tc_tcd1_ccb_callback = callback; + } else +#endif +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + tc_tce0_ccb_callback = callback; + } else +#endif +#ifdef TCE1 + if ((uintptr_t) tc == (uintptr_t) & TCE1) { + tc_tce1_ccb_callback = callback; + } else +#endif +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + tc_tcf0_ccb_callback = callback; + } else +#endif +#ifdef TCF1 + if ((uintptr_t) tc == (uintptr_t) & TCF1) { + tc_tcf1_ccb_callback = callback; + } else +#endif + {} +} + +void tc_set_ccc_interrupt_callback(volatile void *tc, tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + tc_tcc0_ccc_callback = callback; + } else +#endif + +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + tc_tcd0_ccc_callback = callback; + } else +#endif + +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + tc_tce0_ccc_callback = callback; + } else +#endif + +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + tc_tcf0_ccc_callback = callback; + } else +#endif + {} + +} + + +void tc_set_ccd_interrupt_callback(volatile void *tc, tc_callback_t callback) +{ +#ifdef TCC0 + if ((uintptr_t) tc == (uintptr_t) & TCC0) { + tc_tcc0_ccd_callback = callback; + } else +#endif + +#ifdef TCD0 + if ((uintptr_t) tc == (uintptr_t) & TCD0) { + tc_tcd0_ccd_callback = callback; + } else +#endif + +#ifdef TCE0 + if ((uintptr_t) tc == (uintptr_t) & TCE0) { + tc_tce0_ccd_callback = callback; + } else +#endif + +#ifdef TCF0 + if ((uintptr_t) tc == (uintptr_t) & TCF0) { + tc_tcf0_ccd_callback = callback; + } else +#endif + {} +} diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/tc/tc.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/tc/tc.h new file mode 100644 index 0000000..69f4154 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/tc/tc.h @@ -0,0 +1,1640 @@ +/** + * \file + * + * \brief AVR XMEGA Timer Counter (TC) driver + * + * Copyright (c) 2010-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _TC_H_ +#define _TC_H_ + +#include +#include +#include "status_codes.h" +#include "pmic.h" +#include +#include + + +#ifdef __cplusplus +extern "C" { +#endif + + + +/** + * \defgroup tc_group Timer Counter (TC) + * + * See \ref xmega_tc_quickstart + * + * This is a driver for the AVR XMEGA Timer Counter (TC). It provides functions + * for enabling, disabling and configuring the TC modules. + * + * \section dependencies Dependencies + * This driver depends on the following modules: + * - \ref sysclk_group for peripheral clock control. + * - \ref sleepmgr_group for setting allowed sleep mode. + * - \ref interrupt_group for ISR definition and disabling interrupts during + * critical code sections. + * @{ + */ + + + +/** + * \brief Interrupt event callback function type + * + * The interrupt handler can be configured to do a function callback, + * the callback function must match the tc_callback_t type. + * + */ +typedef void (*tc_callback_t) (void); + +//! Timer Counter Capture Compare Channel index +enum tc_cc_channel_t { + //! Channel A + TC_CCA = 1, + //! Channel B + TC_CCB = 2, + //! Channel C + TC_CCC = 3, + //! Channel D + TC_CCD = 4, +}; + +//! Timer Counter Capture Compare Channel index +enum tc_cc_channel_mask_enable_t { + //! Channel A Enable mask + TC_CCAEN = TC0_CCAEN_bm, + //! Channel B Enable mask + TC_CCBEN = TC0_CCBEN_bm, + //! Channel C Enable mask + TC_CCCEN = TC0_CCCEN_bm, + //! Channel D Enable mask + TC_CCDEN = TC0_CCDEN_bm, +}; + +//! Timer Counter Direction +enum tc_dir_t { + //! Counting up + TC_UP = 0, + //! Down Counting B + TC_DOWN = 1 +}; +//! Timer Counter Waveform Generator mode +enum tc_wg_mode_t { + //! TC in normal Mode + TC_WG_NORMAL = TC_WGMODE_NORMAL_gc, + //! TC in Frequency Generator mode + TC_WG_FRQ = TC_WGMODE_FRQ_gc, + //! TC in single slope PWM mode + TC_WG_SS = TC_WGMODE_SS_gc, + //! TC in dual slope Top PWM mode + TC_WG_DS_T = TC_WGMODE_DS_T_gc, + //! TC in dual slope Top Bottom PWM mode + TC_WG_DS_TB = TC_WGMODE_DS_TB_gc, + //! TC in dual slope Bottom PWM mode + TC_WG_DS_B = TC_WGMODE_DS_B_gc +}; + +//! TC interrupt levels +enum TC_INT_LEVEL_t { + TC_INT_LVL_OFF = 0x00, + TC_INT_LVL_LO = 0x01, + TC_INT_LVL_MED = 0x02, + TC_INT_LVL_HI = 0x03, +}; + +//! Macro to check if type of passed TC is TC1_t +#define tc_is_tc1(void) ((uint16_t)tc&0x40 ? true : false) +//! Macro to check if type of passed TC is TC0_t +#define tc_is_tc0(void) ((uint16_t)tc&0x40 ? false : true) + +/** + * \brief Enable TC + * + * Enables the TC. + * + * \param tc Pointer to TC module + * + * \note + * unmask TC clock (sysclk), but does not configure the TC clock source. + */ +void tc_enable(volatile void *tc); + +/** + * \brief Disable TC + * + * Disables the TC. + * + * \param tc Pointer to TC module + * + * \note + * mask TC clock (sysclk). + */ +void tc_disable(volatile void *tc); + +/** + * \ingroup tc_group + * \defgroup tc_interrupt_group Timer Counter (TC) interrupt management + * This group provides functions to configure TC module interrupts + * + * + * @{ + */ +/** + * \brief Set TC overflow interrupt callback function + * + * This function allows the caller to set and change the interrupt callback + * function. Without setting a callback function the interrupt handler in the + * driver will only clear the interrupt flags. + * + * \note Once a callback function is set, the interrupt priority must be set + * via \ref tc_set_overflow_interrupt_level() for interrupts to be + * generated each time the timer overflows. + * + * \param tc Pointer to the Timer Counter (TC) base address + * \param callback Reference to a callback function + */ +void tc_set_overflow_interrupt_callback(volatile void *tc, + tc_callback_t callback); + +/** + * \brief Set TC error interrupt callback function + * + * This function allows the caller to set and change the interrupt callback + * function. Without setting a callback function the interrupt handler in the + * driver will only clear the interrupt flags. + * + * \note Once a callback function is set, the interrupt priority must be set + * via \ref tc_set_error_interrupt_level() for interrupts to be + * generated each time a timer error occurs. + * + * \param tc Pointer to the Timer Counter (TC) base address + * \param callback Reference to a callback function + */ +void tc_set_error_interrupt_callback(volatile void *tc, tc_callback_t callback); + +/** + * \brief Set TC Capture Compare Channel A interrupt callback function + * + * This function allows the caller to set and change the interrupt callback + * function. Without setting a callback function the interrupt handler in the + * driver will only clear the interrupt flags. + * + * \note Once a callback function is set, the interrupt priority must be set + * via \ref tc_set_cca_interrupt_level() for interrupts to be generated + * each time the timer channel A compare matches the current timer count. + * + * \param tc Pointer to the Timer Counter (TC) base address + * \param callback Reference to a callback function + */ +void tc_set_cca_interrupt_callback(volatile void *tc, tc_callback_t callback); + +/** + * \brief Set TC Capture Compare Channel B interrupt callback function + * + * This function allows the caller to set and change the interrupt callback + * function. Without setting a callback function the interrupt handler in the + * driver will only clear the interrupt flags. + * + * \note Once a callback function is set, the interrupt priority must be set + * via \ref tc_set_ccb_interrupt_level() for interrupts to be generated + * each time the timer channel B compare matches the current timer count. + * + * \param tc Pointer to the Timer Counter (TC) base address + * \param callback Reference to a callback function + */ +void tc_set_ccb_interrupt_callback(volatile void *tc, tc_callback_t callback); + +/** + * \brief Set TC Capture Compare Channel C interrupt callback function + * + * This function allows the caller to set and change the interrupt callback + * function. Without setting a callback function the interrupt handler in the + * driver will only clear the interrupt flags. + * + * \note Once a callback function is set, the interrupt priority must be set + * via \ref tc_set_ccc_interrupt_level() for interrupts to be generated + * each time the timer channel C compare matches the current timer count. + * + * \param tc Pointer to the Timer Counter (TC) base address + * \param callback Reference to a callback function + */ +void tc_set_ccc_interrupt_callback(volatile void *tc, tc_callback_t callback); + +/** + * \brief Set TC Capture Compare Channel D interrupt callback function + * + * This function allows the caller to set and change the interrupt callback + * function. Without setting a callback function the interrupt handler in the + * driver will only clear the interrupt flags. + * + * \note Once a callback function is set, the interrupt priority must be set + * via \ref tc_set_ccd_interrupt_level() for interrupts to be generated + * each time the timer channel D compare matches the current timer count. + * + * \param tc Pointer to the Timer Counter (TC) base address + * \param callback Reference to a callback function + */ +void tc_set_ccd_interrupt_callback(volatile void *tc, tc_callback_t callback); + +/** + * \brief Configures TC overflow Interrupt level + * + * \param tc Pointer to TC module. + * \param level Overflow interrupt level + * \note Configures OVFINTLVL in INTCTRLA + */ +static inline void tc_set_overflow_interrupt_level(volatile void *tc, + enum TC_INT_LEVEL_t level) +{ + ((TC0_t *)tc)->INTCTRLA = ((TC0_t *)tc)->INTCTRLA & ~TC0_OVFINTLVL_gm; + ((TC0_t *)tc)->INTCTRLA = + ((TC0_t *)tc)->INTCTRLA | (level << TC0_OVFINTLVL_gp); +} + +/** + * \brief Configures TC error Interrupt level + * + * \param tc Pointer to TC module. + * \param level Error interrupt level + * \note Configures ERRINTLVL in INTCTRLA + */ +static inline void tc_set_error_interrupt_level(volatile void *tc, + enum TC_INT_LEVEL_t level) +{ + ((TC0_t *)tc)->INTCTRLA = ((TC0_t *)tc)->INTCTRLA & ~TC0_ERRINTLVL_gm; + ((TC0_t *)tc)->INTCTRLA = + ((TC0_t *)tc)->INTCTRLA | (level << TC0_ERRINTLVL_gp); +} + +/** + * \brief Configures TC Capture Compare A Interrupt level + * + * \param tc Pointer to TC module. + * \param level CCA interrupt level + * \note Configures CCAINTLVL in INTCTRLB + */ +static inline void tc_set_cca_interrupt_level(volatile void *tc, + enum TC_INT_LEVEL_t level) +{ + ((TC0_t *)tc)->INTCTRLB = ((TC0_t *)tc)->INTCTRLB & ~TC0_CCAINTLVL_gm; + ((TC0_t *)tc)->INTCTRLB = + ((TC0_t *)tc)->INTCTRLB | (level << TC0_CCAINTLVL_gp); +} + +/** + * \brief Configures TC Capture Compare B Interrupt level + * + * \param tc Pointer to TC module. + * \param level CCB interrupt level + * \note Configures CCBINTLVL in INTCTRLB + */ +static inline void tc_set_ccb_interrupt_level(volatile void *tc, + enum TC_INT_LEVEL_t level) +{ + ((TC0_t *)tc)->INTCTRLB = ((TC0_t *)tc)->INTCTRLB & ~TC0_CCBINTLVL_gm; + ((TC0_t *)tc)->INTCTRLB = + ((TC0_t *)tc)->INTCTRLB | (level << TC0_CCBINTLVL_gp); +} + +/** + * \brief Configures TC Capture Compare C Interrupt level + * + * \param tc Pointer to TC module. + * \param level CCC interrupt level + * \note Configures CCCINTLVL in INTCTRLB + */ +static inline void tc_set_ccc_interrupt_level(volatile void *tc, + enum TC_INT_LEVEL_t level) +{ + ((TC0_t *)tc)->INTCTRLB = ((TC0_t *)tc)->INTCTRLB & ~TC0_CCCINTLVL_gm; + ((TC0_t *)tc)->INTCTRLB = + ((TC0_t *)tc)->INTCTRLB | (level << TC0_CCCINTLVL_gp); +} + + /** + * \brief Configures TC Capture Compare D Interrupt level + * + * \param tc Pointer to TC module. + * \param level CCD interrupt level + * \note Configures CCDINTLVL in INTCTRLB + */ +static inline void tc_set_ccd_interrupt_level(volatile void *tc, + enum TC_INT_LEVEL_t level) +{ + ((TC0_t *)tc)->INTCTRLB = ((TC0_t *)tc)->INTCTRLB & ~TC0_CCDINTLVL_gm; + ((TC0_t *)tc)->INTCTRLB = + ((TC0_t *)tc)->INTCTRLB | (level << TC0_CCDINTLVL_gp); +} + +//@} + +/** + * \brief Configure Timer Clock Source + * + * \param tc Pointer to TC module. + * \param TC_CLKSEL_enum Clock source selection + * \note Configuring the clock also starts the timer + */ +static inline void tc_write_clock_source(volatile void *tc, + TC_CLKSEL_t TC_CLKSEL_enum) +{ + ((TC0_t *)tc)->CTRLA = + (((TC0_t *)tc)->CTRLA & ~TC0_CLKSEL_gm) | + TC_CLKSEL_enum; +} + +/** + * \brief Read Timer Clock Source + * + * \param tc Pointer to TC module. + * \return TC_CLKSEL_enum Clock source selection + */ +static inline TC_CLKSEL_t tc_read_clock_source(volatile void *tc) +{ + return (TC_CLKSEL_t)(((TC0_t *)tc)->CTRLA & TC0_CLKSEL_gm); +} + +/** + * \brief Select clock for a specified TC and resolution. + * + * This function configures the clock selection, as prescaled CLKper, for a + * specified TC that gives a resolution at least as high as the one specified. + * The resolution of a TC is synonymous with its clock frequency. + * + * \note It is also possible to clock TCs with event channels. This is not + * handled by this implementation. + * + * \param tc ID of TC to get clock selection for. + * \param resolution Desired resolution for the TC in Hz. + */ +static inline void tc_set_resolution(volatile void *tc, uint32_t resolution) +{ + uint32_t tc_clk_rate = sysclk_get_per_hz(); + + if (resolution <= (tc_clk_rate / 1024)) { + tc_write_clock_source(tc, TC_CLKSEL_DIV1024_gc); + } else if (resolution <= (tc_clk_rate / 256)) { + tc_write_clock_source(tc, TC_CLKSEL_DIV256_gc); + } else if (resolution <= (tc_clk_rate / 64)) { + tc_write_clock_source(tc, TC_CLKSEL_DIV64_gc); + } else if (resolution <= (tc_clk_rate / 8)) { + tc_write_clock_source(tc, TC_CLKSEL_DIV8_gc); + } else if (resolution <= (tc_clk_rate / 4)) { + tc_write_clock_source(tc, TC_CLKSEL_DIV4_gc); + } else if (resolution <= (tc_clk_rate / 2)) { + tc_write_clock_source(tc, TC_CLKSEL_DIV2_gc); + } else { + tc_write_clock_source(tc, TC_CLKSEL_DIV1_gc); + } +} + +/** + * \brief Get real resolution for a specified TC. + * + * This function returns the resolution which the specified clock selection + * of TC will result in. The resolution of a TC is synonymous with its clock + * frequency. + * + * \note This function does not handle event channel clock selections. + * + * \param tc Pointer of TC module to get resolution for. + * + * \return The resolution of \a tc. + */ +static inline uint32_t tc_get_resolution(volatile void *tc) +{ + uint32_t tc_clk_rate = sysclk_get_per_hz(); + switch (tc_read_clock_source(tc)) { + case TC_CLKSEL_OFF_gc: + tc_clk_rate = 0; + break; + + case TC_CLKSEL_DIV1024_gc: + tc_clk_rate /= 1024; + break; + + case TC_CLKSEL_DIV256_gc: + tc_clk_rate /= 256; + break; + + case TC_CLKSEL_DIV64_gc: + tc_clk_rate /= 64; + break; + + case TC_CLKSEL_DIV8_gc: + tc_clk_rate /= 8; + break; + + case TC_CLKSEL_DIV4_gc: + tc_clk_rate /= 4; + break; + + case TC_CLKSEL_DIV2_gc: + tc_clk_rate /= 2; + break; + + case TC_CLKSEL_DIV1_gc: + break; + + default: + tc_clk_rate = 0; + break; + } + return (tc_clk_rate); +} + +/** + * \brief Configure Timer Direction + * + * \param tc Pointer to TC module. + * \param dir Timer direction : + */ +static inline void tc_set_direction(volatile void *tc, enum tc_dir_t dir) +{ + if (dir == TC_UP) { + ((TC0_t *)tc)->CTRLFCLR |= ~TC0_DIR_bm; + } else { + ((TC0_t *)tc)->CTRLFSET |= TC0_DIR_bm; + } +} + +/** + * \brief Write the Counter value of the Timer + * + * \param tc Pointer to TC module. + * \param cnt_value Counter value : + */ +static inline void tc_write_count(volatile void *tc, uint16_t cnt_value) +{ + ((TC0_t *)tc)->CNT = cnt_value; +} + +/** + * \brief Reads the Counter value of the Timer + * + * \param tc Pointer to TC module. + * \note Output the Counter value CNT + */ +static inline uint16_t tc_read_count(volatile void *tc) +{ + return (((TC0_t *)tc)->CNT); +} + +/** + * \brief Writes the Period value of the Timer + * + * \param tc Pointer to TC module. + * \param per_value Period value : PER + */ +static inline void tc_write_period(volatile void *tc, uint16_t per_value) +{ + ((TC0_t *)tc)->PER = per_value; +} + +/** + * \brief Reads the Period value of the Timer + * + * \param tc Pointer to TC module. + * \return Period value : PER + */ +static inline uint16_t tc_read_period(volatile void *tc) +{ + return (((TC0_t *)tc)->PER); +} + +/** + * \brief Writes the Period Buffer value of the Timer + * + * \param tc Pointer to TC module. + * \param per_buf Period Buffer value : PERH/PERL + */ +static inline void tc_write_period_buffer(volatile void *tc, uint16_t per_buf) +{ + ((TC0_t *)tc)->PERBUF = per_buf; +} + +/** + * \brief Reads the Period Buffer value of the Timer + * + * \param tc Pointer to TC module. + * \return Period Buffer value : PERH/PERL + */ +static inline uint16_t tc_read_period_buffer(volatile void *tc) +{ + return (((TC0_t *)tc)->PERBUF); +} + +/** + * \brief Tests if the Period Buffer is valid + * + * \param tc Pointer to TC module. + * \return period Buffer is valid or not:PERBV + */ +static inline bool tc_period_buffer_is_valid(volatile void *tc) +{ + return (((TC0_t *)tc)->CTRLGCLR & TC0_PERBV_bm); +} + +/** + * \brief Enables delay (used for 32bit timer mode) + * + * \param tc Pointer to TC module. + * \note enables Delay mode + */ +static inline void tc_enable_delay(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLD = (((TC0_t *)tc)->CTRLD & + ~TC0_EVDLY_bm) | (1 << TC0_EVDLY_bp); +} + +/** + * \brief Disables delay + * + * \param tc Pointer to TC module. + * \note disables Delay mode + */ +static inline void tc_disable_delay(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLD = ((TC0_t *)tc)->CTRLD & ~TC0_EVDLY_bm; +} + +/** + * \brief Tests if the Overflow flag is set + * + * \param tc Pointer to TC module. + * \return overflow has occurred or not : OVFIF + */ +static inline bool tc_is_overflow(volatile void *tc) +{ + return (((TC0_t *)tc)->INTFLAGS & TC0_OVFIF_bm); +} + +/** + * \brief Clears the Overflow flag + * + * \param tc Pointer to TC module. + * \note OVFIF is cleared + */ +static inline void tc_clear_overflow(volatile void *tc) +{ + ((TC0_t *)tc)->INTFLAGS |= TC0_OVFIF_bm; +} + +/** + * \brief Tests if the Error flag is set + * + * \param tc Pointer to TC module. + * \return Error has occurred or not : ERRIF + */ +static inline bool tc_read_error(volatile void *tc) +{ + return (((TC0_t *)tc)->INTFLAGS & TC0_ERRIF_bm); +} + +/** + * \brief Clears the Error flag + * + * \param tc Pointer to TC module. + * \note ERRIF is cleared + */ +static inline void tc_clear_error(volatile void *tc) +{ + ((TC0_t *)tc)->INTFLAGS |= TC0_ERRIF_bm; +} + +/** + * \brief Restart the Timer + * + * \param tc Pointer to TC module. + * \note CMD[3] in CTRLFSET is set to 1 and CMD[2] in CTRLFCLR is set + */ +static inline void tc_restart(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLFSET = TC_CMD_RESTART_gc; +} + +/** + * \brief Reset the Timer + * + * \param tc Pointer to TC module. + * \note CMD[3:2] in CTRLFSET are set to 1 + */ +static inline void tc_reset(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLFSET = TC_CMD_RESET_gc; +} + +/** + * \brief Update the Timer + * + * \param tc Pointer to TC module. + * \note CMD[2] in CTRLFSET is set to 1 and CMD[3] in CTRLFCLR is set + */ +static inline void tc_update(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLFSET = TC_CMD_UPDATE_gc; +} + +/** + * \brief Configures the Timer in Byte mode + * + * \param tc Pointer to TC module. + * \note Configures BYTEM in CTRLE + */ +static inline void tc_set_8bits_mode(volatile void *tc) +{ +#ifdef TC0_BYTEM0_bm + ((TC0_t *)tc)->CTRLE |= TC0_BYTEM0_bm; +#else + ((TC0_t *)tc)->CTRLE |= TC0_BYTEM_bm; +#endif +} + +/** + * \brief Locks the Update of the Buffered registers + * + * \param tc Pointer to TC module. + * + * */ +static inline void tc_lock_update_buffers(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLFSET |= TC0_LUPD_bm; +} + +/** + * \brief Unlocks the Update of the Buffered registers + * + * \param tc Pointer to TC module. + * \note Configures LUPD in CTRLFCLR + */ +static inline void tc_unlock_update_buffers(volatile void *tc) +{ + ((TC0_t *)tc)->CTRLFCLR |= TC0_LUPD_bm; +} + +/** + * \brief Enables Compare/Capture channel + * + * \param tc Pointer to TC module. + * \param enablemask CC channel + */ +static inline void tc_enable_cc_channels(volatile void *tc, + enum tc_cc_channel_mask_enable_t enablemask) +{ + if (tc_is_tc0(void *tc)) { + ((TC0_t *)tc)->CTRLB |= enablemask; + } else if (tc_is_tc1(void *tc)) { + ((TC1_t *)tc)->CTRLB |= + enablemask & (TC1_CCAEN_bm | TC1_CCBEN_bm); + } +} + +/** + * \brief Disables Compare/Capture channel + * + * \param tc Pointer to TC module. + * \param disablemask CC channel + */ +static inline void tc_disable_cc_channels(volatile void *tc, + enum tc_cc_channel_mask_enable_t disablemask) +{ + if (tc_is_tc0(void *tc)) { + ((TC0_t *)tc)->CTRLB &= ~disablemask; + } else if (tc_is_tc1(void *tc)) { + ((TC1_t *)tc)->CTRLB &= + ~(disablemask & TC0_CCAEN_bm & TC0_CCBEN_bm); + } +} + +/** + * \brief Enables Input capture mode + * + * \param tc Pointer to TC module. + * \param eventsource Source for the capture + * \param eventaction Event action capture type + */ +static inline void tc_set_input_capture(volatile void *tc, + TC_EVSEL_t eventsource, TC_EVACT_t eventaction) +{ + ((TC0_t *)tc)->CTRLD &= ~(TC0_EVSEL_gm | TC0_EVACT_gm); + ((TC0_t *)tc)->CTRLD |= ((uint8_t)eventsource | (uint8_t)eventaction); +} + +/** + * \brief Reads the Capture value + * + * \param tc Pointer to TC module. + * \param channel_index Channel x + * \return Read value of CCx + */ +static inline uint16_t tc_read_cc(volatile void *tc, + enum tc_cc_channel_t channel_index) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC0_t *)tc)->CCA); + case TC_CCB: + return (((TC0_t *)tc)->CCB); + case TC_CCC: + return (((TC0_t *)tc)->CCC); + case TC_CCD: + return (((TC0_t *)tc)->CCD); + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC1_t *)tc)->CCA); + case TC_CCB: + return (((TC1_t *)tc)->CCB); + default: + return (0); + } + } + return (0); +} + +/** + * \brief Writes the CC value + * + * \param tc Pointer to TC module. + * \param channel_index CC Channel + * \param value Counter value + */ +static inline void tc_write_cc(volatile void *tc, + enum tc_cc_channel_t channel_index, uint16_t value) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + ((TC0_t *)tc)->CCA = value; + break; + case TC_CCB: + ((TC0_t *)tc)->CCB = value; + break; + case TC_CCC: + ((TC0_t *)tc)->CCC = value; + break; + case TC_CCD: + ((TC0_t *)tc)->CCD = value; + break; + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + ((TC1_t *)tc)->CCA = value; + break; + case TC_CCB: + ((TC1_t *)tc)->CCB = value; + break; + default: + return ; + } + } +} + +/** + * \brief Writes the Capture/Compare Buffer value + * + * \param tc Pointer to TC module. + * \param channel_index CC Channel + * \param buffer_value Counter Buffer value + */ +static inline void tc_write_cc_buffer(volatile void *tc, + enum tc_cc_channel_t channel_index, uint16_t buffer_value) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + ((TC0_t *)tc)->CCABUF = buffer_value; + break; + case TC_CCB: + ((TC0_t *)tc)->CCBBUF = buffer_value; + break; + case TC_CCC: + ((TC0_t *)tc)->CCCBUF = buffer_value; + break; + case TC_CCD: + ((TC0_t *)tc)->CCDBUF = buffer_value; + break; + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + ((TC1_t *)tc)->CCABUF = buffer_value; + break; + case TC_CCB: + ((TC1_t *)tc)->CCBBUF = buffer_value; + break; + default: + return; + } + } +} + +/** + * \brief Reads the Capture/Compare Buffer value + * + * \param tc Pointer to TC module. + * \param channel_index CC Channel + * \return CCx Buffer value + */ +static inline uint16_t tc_read_cc_buffer(volatile void *tc, + enum tc_cc_channel_t channel_index) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC0_t *)tc)->CCABUF); + case TC_CCB: + return (((TC0_t *)tc)->CCBBUF); + case TC_CCC: + return (((TC0_t *)tc)->CCCBUF); + case TC_CCD: + return (((TC0_t *)tc)->CCDBUF); + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC1_t *)tc)->CCABUF); + case TC_CCB: + return (((TC1_t *)tc)->CCBBUF); + default: + return (0); + } + } + return (0); +} + +/** + * \brief Reports is Capture/Compare Buffer is valid + * + * \param tc Pointer to TC module. + * \param channel_index CC Channel + * \return CCx Buffer is valid or not + */ +static inline bool tc_cc_buffer_is_valid(volatile void *tc, + enum tc_cc_channel_t channel_index) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + return ((TC0_t *)tc)->CTRLGCLR & TC0_CCABV_bm; + case TC_CCB: + return ((TC0_t *)tc)->CTRLGCLR & TC0_CCBBV_bm; + case TC_CCC: + return ((TC0_t *)tc)->CTRLGCLR & TC0_CCCBV_bm; + case TC_CCD: + return ((TC0_t *)tc)->CTRLGCLR & TC0_CCDBV_bm; + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC1_t *)tc)->CTRLGCLR & + TC1_CCABV_bm); + case TC_CCB: + return (((TC1_t *)tc)->CTRLGCLR & + TC1_CCBBV_bm); + default: + return (0); + } + } + return (0); +} + +/** + * \brief Reports if Capture/Compare interrupt has occurred + * + * \param tc Pointer to TC module. + * \param channel_index CC Channel + * \return CCx Interrupt or not + */ +static inline bool tc_is_cc_interrupt(volatile void *tc, + enum tc_cc_channel_t channel_index) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC0_t *)tc)->INTFLAGS & TC0_CCAIF_bm); + case TC_CCB: + return (((TC0_t *)tc)->INTFLAGS & TC0_CCBIF_bm); + case TC_CCC: + return (((TC0_t *)tc)->INTFLAGS & TC0_CCCIF_bm); + case TC_CCD: + return (((TC0_t *)tc)->INTFLAGS & TC0_CCDIF_bm); + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + return (((TC1_t *)tc)->INTFLAGS & + TC1_CCAIF_bm); + case TC_CCB: + return (((TC1_t *)tc)->INTFLAGS & + TC1_CCBIF_bm); + default: + return (0); + } + } + return (0); +} + +/** + * \brief Clears Capture/Compare interrupt + * + * \param tc Pointer to TC module. + * \param channel_index CC Channel + */ +static inline void tc_clear_cc_interrupt(volatile void *tc, + enum tc_cc_channel_t channel_index) +{ + if (tc_is_tc0(void *tc)) { + switch (channel_index) { + case TC_CCA: + ((TC0_t *)tc)->INTFLAGS = TC0_CCAIF_bm; + break; + case TC_CCB: + ((TC0_t *)tc)->INTFLAGS = TC0_CCBIF_bm; + break; + case TC_CCC: + ((TC0_t *)tc)->INTFLAGS = TC0_CCCIF_bm; + break; + case TC_CCD: + ((TC0_t *)tc)->INTFLAGS = TC0_CCDIF_bm; + break; + } + } else if (tc_is_tc1(void *tc)) { + switch (channel_index) { + case TC_CCA: + ((TC1_t *)tc)->INTFLAGS = TC1_CCAIF_bm; + break; + case TC_CCB: + ((TC1_t *)tc)->INTFLAGS = TC1_CCBIF_bm; + break; + default: + return; + } + } +} + +/** + * \brief Configures TC in the specified Waveform generator mode + * + * \param tc Pointer to TC module. + * \param wgm : waveform generator + */ +static inline void tc_set_wgm(volatile void *tc, enum tc_wg_mode_t wgm) +{ + ((TC0_t *)tc)->CTRLB = (((TC0_t *)tc)->CTRLB & ~TC0_WGMODE_gm) | wgm; +} + +/** + * \ingroup tc_group + * \defgroup tc_awex_group AWeX extension driver + * This group provides low level drivers to configure AWeX extension + * @{ + */ + +/** + * \brief AWeX extension enable + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_cwcm(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL |= AWEX_CWCM_bm; +} + +/** + * \brief AWeX extension disable Common waveform mode + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_cwcm(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL &= ~AWEX_CWCM_bm; +} + +/** + * \brief AWeX extension enable pattern generator mode + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_pgm(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL |= AWEX_PGM_bm; +} + +/** + * \brief AWeX extension disable pattern generator mode + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_pgm(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL &= ~AWEX_PGM_bm; +} + +/** + * \brief AWeX extension : enable Deadtime insertion on ccA + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_cca_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL |= AWEX_DTICCAEN_bm; +} + +/** + * \brief AWeX extension : disable Deadtime insertion on ccA + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_cca_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL &= ~AWEX_DTICCAEN_bm; +} + +/** + * \brief AWeX extension : enable Deadtime insertion on ccB + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_ccb_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL |= AWEX_DTICCBEN_bm; +} + +/** + * \brief AWeX extension : disable Deadtime insertion on ccB + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_ccb_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL &= ~AWEX_DTICCBEN_bm; +} + +/** + * \brief AWeX extension : enable Deadtime insertion on ccC + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_ccc_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL |= AWEX_DTICCCEN_bm; +} + +/** + * \brief AWeX extension : disable Deadtime insertion on ccD + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_ccc_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL &= ~AWEX_DTICCCEN_bm; +} + +/** + * \brief AWeX extension : enable Deadtime insertion on ccD + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_ccd_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL |= AWEX_DTICCDEN_bm; +} + +/** + * \brief AWeX extension : disable Deadtime insertion on ccD + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_ccd_deadtime(AWEX_t *awex) +{ + ((AWEX_t *)awex)->CTRL &= ~AWEX_DTICCDEN_bm; +} +/** + * \brief AWeX extension : configures high side deadtime + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param value : deadtime value + */ +static inline void tc_awex_set_dti_high(AWEX_t *awex, int16_t value) +{ + ((AWEX_t *)awex)->DTHS = value; +} +/** + * \brief AWeX extension : configures low side deadtime + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param value : deadtime value + */ +static inline void tc_awex_set_dti_low(AWEX_t *awex, int16_t value) +{ + ((AWEX_t *)awex)->DTLS = value; +} +/** + * \brief AWeX extension : configures symmetrical deadtime + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param value : deadtime value + */ +static inline void tc_awex_set_dti_both(AWEX_t *awex, int16_t value) +{ + ((AWEX_t *)awex)->DTBOTH = value; +} + +/** + * \brief AWeX extension : configures symmetrical deadtime buffer + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param value : deadtime buffer value + */ +static inline void tc_awex_set_dti_both_buffer(AWEX_t *awex, + int16_t value) +{ + ((AWEX_t *)awex)->DTBOTHBUF = value; +} + +/** + * \brief AWeX extension : returns the deadtime buffer high nibble + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \return Dead Time High value + */ +static inline int8_t tc_awex_get_dti_high_buffer(AWEX_t *awex) +{ + return (((AWEX_t *)awex)->DTHSBUF); +} + +/** + * \brief AWeX extension : returns the deadtime buffer low nibble + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \return Dead Time High value + */ +static inline int8_t tc_awex_get_dti_low_buffer(AWEX_t *awex) +{ + return (((AWEX_t *)awex)->DTLSBUF); +} + +/** + * \brief AWeX extension : returns if DTI high buffer is valid + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \return Dead Time High Buffer valid or not + */ +static inline bool tc_awex_is_dti_high_buffer_valid(AWEX_t *awex) +{ + return (((AWEX_t *)awex)->STATUS & AWEX_DTHSBUFV_bm); +} + +/** + * \brief AWeX extension : returns if DTI low buffer is valid + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \return Dead Time Low Buffer is valid or not + */ +static inline bool tc_awex_is_dti_low_buffer_valid(AWEX_t *awex) +{ + return (((AWEX_t *)awex)->STATUS & AWEX_DTLSBUFV_bm); +} + +/** + * \brief AWeX extension : configures the Fault restart in latched mode + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_fdmode_restart_latched(AWEX_t *awex) +{ + ((AWEX_t *)awex)->FDCTRL &= ~AWEX_FDMODE_bm; +} + +/** + * \brief AWeX extension : configures the Fault restart in cycle to cycle mode + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_fdmode_restart_cycle(AWEX_t *awex) +{ + ((AWEX_t *)awex)->FDCTRL |= AWEX_FDMODE_bm; +} + +/** + * \brief AWeX extension : returns if fault is detected + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline bool tc_awex_fault_is_detected(AWEX_t *awex) +{ + return (((AWEX_t *)awex)->STATUS & AWEX_FDF_bm); +} + +/** + * \brief AWeX extension : clears the Fault detection + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_clear_fault(AWEX_t *awex) +{ + ((AWEX_t *)awex)->STATUS = AWEX_FDF_bm; +} + +/** + * \brief AWeX extension : configures fault action + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param fd_act Fault action + */ +static inline void tc_awex_set_fault_detection_action(AWEX_t * + awex, AWEX_FDACT_t fd_act) +{ + ((AWEX_t *)awex)->FDCTRL = (((AWEX_t *)awex)->FDCTRL & ~AWEX_FDACT_gm) | + (fd_act & AWEX_FDACT_gm); + +} + +/** + * \brief AWeX extension : configures fault detection event + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param eventmask Fault detection event + */ +static inline void tc_awex_set_fault_detection_event(AWEX_t *awex, + int8_t eventmask) +{ + ((AWEX_t *)awex)->FDEMASK = eventmask; +} + +/** + * \brief AWeX extension : configures the port overdrive + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + * \param value Output override configuration + */ +static inline void tc_awex_set_output_override(AWEX_t * awex, + int8_t value) +{ + ((AWEX_t *)awex)->OUTOVEN = value; +} + +/** + * \brief AWeX extension : enable fault detection on debug break detection + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_enable_fault_debug_break(AWEX_t *awex) +{ + ((AWEX_t *)awex)->FDCTRL &= ~AWEX_FDDBD_bm; +} + +/** + * \brief AWeX extension : disable fault detection on debug break detection + * + * \param awex Pointer to AWeX module (AWEXC or AWEXE) + */ +static inline void tc_awex_disable_fault_debug_break(AWEX_t *awex) +{ + ((AWEX_t *)awex)->FDCTRL |= AWEX_FDDBD_bm; +} +//@} +/** + * \ingroup tc_group + * \defgroup tc_hires_group Hi-Res extension driver + * This group provides low level drivers to configure Hi-Res extension + * @{ + */ + +/** + * \brief Hi-Res Extension : configures the Hi-Res + * + * \param hires Pointer to AWeX module (AWEXC or AWEXE) + * \param hi_res_mode HIRES configuration + */ +static inline void tc_hires_set_mode(HIRES_t * hires, HIRES_HREN_t hi_res_mode) +{ + ((HIRES_t *)hires)->CTRLA = hi_res_mode; +} +//@} + +/** @} */ + + +#ifdef __cplusplus +} +#endif + +/** + * \page xmega_tc_quickstart Quick Start Guide for the XMEGA TC Driver + * + * This is the quick start guide for the \ref tc_group , with step-by-step + * instructions on how to configure and use the driver for a specific use case. + * The code examples can be copied into e.g the main application loop or any + * other function that will need to control the timer/counters. + * + * + * \section xmega_tc_qs_use_cases Use cases + * - \ref xmega_tc_qs_ovf + * - \ref xmega_tc_qs_cc + * - \ref xmega_tc_qs_pwm + * + * + * \section xmega_tc_qs_ovf Timer/counter overflow (interrupt based) + * + * This use case will prepare a timer to trigger an interrupt when the timer + * overflows. The interrupt is handled by a cutomisable callback function. + * + * We will setup the timer in this mode: + * - Normal WGM mode (incrementing timer) + * - Use the system clock as clock source + * - No prescaling (clock divider set to 1) + * - Overflow interrupt after 1000 counts. This will be done by setting the top + * value to 1000. + * + * + * \section xmega_tc_qs_ovf_setup Setup steps + * + * \subsection xmega_tc_qs_ovf_usage_prereq Prequisites + * + * For the setup code of this use case to work, the following must + * be added to the project: + * - \ref interrupt_group "Global Interrupt Management" + * - \ref clk_group "Clock Management" + * + * \subsection xmega_tc_qs_ovf_setup_code Example code + * + * Add a callback function that will be executed when the overflow interrupt + * trigger. + * \code + static void my_callback(void) + { + // User code to execute when the overflow occurs here + //Important to clear Interrupt Flag + tc_clear_overflow(&TCC0); + } +\endcode + * Add to, e.g., the main loop in the application C-file: + * \code + pmic_init(); + sysclk_init(); + tc_enable(&TCC0); + tc_set_overflow_interrupt_callback(&TCC0, my_callback); + tc_set_wgm(&TCC0, TC_WG_NORMAL); + tc_write_period(&TCC0, 1000); + tc_set_overflow_interrupt_level(&TCC0, TC_INT_LVL_LO); + cpu_irq_enable(); + tc_write_clock_source(&TCC0, TC_CLKSEL_DIV1_gc); +\endcode + * + * \subsection xmega_tc_qs_ovf_setup_code_workflow Workflow + * + * -# Enable the interrupt controller: + * - \code pmic_init(); \endcode + * -# Enable the clock system: + * - \code sysclk_init(); \endcode + * -# Enable timer/counter TCC0 + * - \code tc_enable(&TCC0); \endcode + * \note This will enable the clock system for the module + * -# Set the callback function for overflow interrupt + * - \code tc_set_overflow_interrupt_callback(&TCC0, my_callback); \endcode + * \warning This function requires that the my_callback function is defined + * -# Set the desired waveform mode + * - \code tc_set_wgm(&TCC0, TC_WG_NORMAL); \endcode + * \note In this case, we use normal mode where the timer increments it + count value until the TOP value is reached. The timer then reset + its count value to 0. + * -# Set the period + * - \code tc_write_period(&TCC0, 1000); \endcode + * \note This will specify the TOP value of the counter. The timer will + * overflow and reset when this value is reached. + * -# Set the overflow interrupt level + * - \code tc_set_overflow_interrupt_level(&TCC0, TC_INT_LVL_LO); \endcode + * -# Enable interrupts: + * - \code cpu_irq_enable(); \endcode + * -# Set the clock source + * - \code tc_write_clock_source(&TCC0, TC_CLKSEL_DIV1_gc); \endcode + * \warning When the clock source is set, the timer will start counting + * + * \section xmega_tc_qs_ovf_usage Usage steps + * + * - None. The timer will run in the background, and the code written in the + * call back function will execute each time the timer overflows. + * + * + * \section xmega_tc_qs_cc Timer/counter compare match (interrupt based) + * + * This use case will prepare a timer to trigger two independent interrupts + * when it reaches two different compare values. The period of the timer + * is customizable and the two compare matches will be handled by two separate + * interrupts implemented in call back functions. + * + * We will setup the timer in this mode: + * - Normal WGM mode - incrementing timer + * - Use the system clock as clock source + * - No prescaling (divider set to 1) + * - Period of timer 10000 counts + * - Compare match A interrupt trigger after 100 counts + * - Compare match B interrupt trigger after 1000 counts + * - If compare A and compare B match occurs simultaneously, compare B + * should have higher priority + * + * + * \section xmega_tc_qs_cc_setup Setup steps + * + * \subsection xmega_tc_qs_cc_usage_prereq Prequisites + * For the setup code of this use case to work, the following must + * be added to the project: + * - \ref interrupt_group "Global Interrupt Management" + * - \ref clk_group "Clock Management" + * + * \subsection xmega_tc_qs_cc_setup_code Example code + * + * Add two callback functions that will be executed when compare match A and + * compare match B occurs + * \code + static void my_cca_callback(void) + { + // User code here to execute when a channel A compare match occurs + } + static void my_ccb_callback(void) + { + // User code here to execute when a channel B compare match occurs + } +\endcode + * Add to, e.g., the main loop in the application C-file: + * \code + pmic_init(); + sysclk_init(); + cpu_irq_enable(); + tc_enable(&TCC0); + tc_set_cca_interrupt_callback(&TCC0, my_cca_callback); + tc_set_ccb_interrupt_callback(&TCC0, my_ccb_callback); + tc_set_wgm(&TCC0, TC_WG_NORMAL); + tc_write_period(&TCC0, 10000); + tc_write_cc(&TCC0, TC_CCA, 100); + tc_write_cc(&TCC0, TC_CCB, 1000); + tc_enable_cc_channels(&TCC0,(TC_CCAEN | TC_CCBEN)); + tc_set_cca_interrupt_level(&TCC0, TC_INT_LVL_LO); + tc_set_ccb_interrupt_level(&TCC0, TC_INT_LVL_MED); + tc_write_clock_source(&TCC0, TC_CLKSEL_DIV1_gc); +\endcode + * + * \subsection xmega_tc_qs_cc_setup_code_workflow Workflow + * + * -# Enable the interrupt controller: + * - \code pmic_init(); \endcode + * -# Enable the clock system: + * - \code sysclk_init(); \endcode + * -# Enable interrupts: + * - \code cpu_irq_enable(); \endcode + * -# Enable timer/counter TCC0 + * - \code tc_enable(&TCC0); \endcode + * \note This will enable the clock system for the module + * -# Set call back function for CCA interrupt + * - \code tc_set_cca_interrupt_callback(&TCC0, my_cca_callback); \endcode + * \warning This function requires that the call back function is defined + * -# Set call back function for CCB interrupt + * - \code tc_set_ccb_interrupt_callback(&TCC0, my_ccb_callback); \endcode + * \warning This function requires that the call back function is defined + * -# Set the desired waveform mode + * - \code tc_set_wgm(&TCC0, TC_WG_NORMAL); \endcode + * \note In this case, we use normal mode where the timer increments it + count value until the TOP value is reached. The timer then reset + its count value to 0. + * -# Set the period + * - \code tc_write_period(&TCC0, 10000); \endcode + * \note This will specify the TOP value of the counter. The timer will + * overflow and reset when this value is reached. + * -# Set compare match value on CCA + * - \code tc_write_cc(&TCC0, TC_CCA, 100); \endcode + * -# Set compare match value on CCB + * - \code tc_write_cc(&TCC0, TC_CCB, 1000); \endcode + * -# Enable compare channel A and compare channel B + * -\code tc_enable_cc_channels(&TCC0, (TC_CCAEN | TC_CCBEN)); \endcode + * -# Set interrupt level on channel A (low priority, see \ref TC_INT_LEVEL_t) + * - \code tc_set_cca_interrupt_level(&TCC0, TC_INT_LVL_LO); \endcode + * -# Set interrupt level on channel B (medium priority \ref TC_INT_LEVEL_t) + * - \code tc_set_ccb_interrupt_level(&TCC0, TC_INT_LVL_MED); \endcode + * -# Set the clock source + * - \code tc_write_clock_source(&TCC0, TC_CLKSEL_DIV1_gc); \endcode + * \warning When the clock source is set, the timer will start counting + * + * \section xmega_tc_qs_cc_usage Usage steps + * + * - None. The timer will run in the background, and the code written in the + * call back functions will execute each time a compare match occur. + * + * + * \section xmega_tc_qs_pwm Timer/counter PWM + * + * This use case will setup a timer in PWM mode. For more details you can + * also look at the XMEGA PWM service. + * + * We will setup the timer in this mode: + * - Normal WGM mode - incrementing timer + * - Use the 2MHz oscillator as clock source (default) + * - 1Hz PWM frequency (2MHz clock, 1024x prescale, TOP value 1950) + * - 10% duty cycle (1:10 ratio between PER and CC register) + * - Output the PWM signal to a I/O port + * + * \section xmega_tc_qs_pwm_setup Setup steps + * + * \subsection xmega_tc_qs_pwm_usage_prereq Prequisites + * For the setup code of this use case to work, the following must + * be added to the project: + * - \ref clk_group "Clock Management" + * + * \subsection xmega_tc_qs_pwm_setup_code Example code + * + * Add to, e.g., the main loop in the application C-file: + * \code + board_init(); + sysclk_init(); + tc_enable(&TCE0); + tc_set_wgm(&TCE0, TC_WG_SS); + tc_write_period(&TCE0, 1950); + tc_write_cc(&TCE0, TC_CCA, 195); + tc_enable_cc_channels(&TCE0,TC_CCAEN); + tc_write_clock_source(&TCE0, TC_CLKSEL_DIV1024_gc); +\endcode + * + * \subsection xmega_tc_qs_pwm_setup_code_workflow Workflow + * + * -# Ensure that PWM I/O pin is configured as output + * - \code board_init(); \endcode + * \note The board_init(); function configures the I/O pins. If this function + * is not executed, the I/O pin must be configured as output manually + * -# Enable the clock system: + * - \code sysclk_init(); \endcode + * -# Enable timer/counter TCE0 + * - \code tc_enable(&TCE0); \endcode + * \note This will enable the clock system for the module + * -# Set the desired waveform mode + * - \code tc_set_wgm(&TCE0, TC_WG_NORMAL); \endcode + * \note In this case, we use normal mode where the timer increments it + * count value until the TOP value is reached. The timer then reset + * its count value to 0. + * -# Set the period + * - \code tc_write_period(&TCE0, 1950); \endcode + * \note This will specify the TOP value of the counter. The timer will + * overflow and reset when this value is reached. + * -# Set compare match value on CCA + * - \code tc_write_cc(&TCC0, TC_CCA, 195); \endcode + * \note The PWM duty cycle will be the ratio between PER and CCA, which + * is set by the tc_write_period() and tc_write_cc() functions. Use + * tc_write_cc() to change duty cycle run time (e.g to dim a LED). + * When CCA = 0, the duty cycle will be 0%. When CCA = PER (top value) + * the duty cycle will be 100%. + * -# Enable compare channel A + * -\code tc_enable_cc_channels(&TCE0,TC_CCAEN); \endcode + * -# Set the clock source + * - \code tc_write_clock_source(&TCE0, TC_CLKSEL_DIV1024_gc); \endcode + * \warning When the clock source is set, the timer will start counting + * + * \section xmega_tc_qs_pwm_usage Usage steps + * - Use tc_write_cc() to change the duty cycle of the PWM signal + * - Use tc_write_period() to change the PWM frequency + */ + +#endif /* _TC_H_ */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twi_common.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twi_common.h new file mode 100644 index 0000000..a17f093 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twi_common.h @@ -0,0 +1,667 @@ +/** + * \file + * + * \brief AVR XMEGA TWI driver common definitions + * + * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef TWI_COMMON_H +#define TWI_COMMON_H + +/* Fix header error in iox32e5.h */ +#ifndef TWI_BRIDGEEN_bm +#define TWI_BRIDGEEN_bm 0x80 /* Bridge Enable bit mask. */ +#endif + +#ifndef TWI_BRIDGEEN_bp +#define TWI_BRIDGEEN_bp 7 /* Bridge Enable bit position. */ +#endif + +#ifndef TWI_SFMPEN_bm +#define TWI_SFMPEN_bm 0x40 /* Slave Fast Mode Plus Enable bit mask. */ +#endif + +#ifndef TWI_SFMPEN_bp +#define TWI_SFMPEN_bp 6 /* Slave Fast Mode Plus Enable bit position. */ +#endif +/* End of: Fix header error in iox32e5.h */ + +/** + * \defgroup group_xmega_drivers_twi TWI - Two-Wire Interface + * + * See \ref xmega_twi_quickstart + * + * Driver for the Two-Wire Interface (TWI). + * Provides functions for configuring and using the TWI in both master and + * slave mode. + * + * \section xmega_twi_quickstart_guide Quick start guide + * See \ref xmega_twi_quickstart + * + * \{ + */ + +/*! + * \brief Input parameters when initializing the twi module mode + */ +typedef struct +{ + //! The baudrate of the TWI bus. + unsigned long speed; + //! The baudrate register value of the TWI bus. + unsigned long speed_reg; + //! The desired address. + char chip; +} twi_options_t; + +/*! + * \brief Information concerning the data transmission + */ +typedef struct +{ + //! TWI chip address to communicate with. + char chip; + //! TWI address/commands to issue to the other chip (node). + uint8_t addr[3]; + //! Length of the TWI data address segment (1-3 bytes). + int addr_length; + //! Where to find the data to be written. + void *buffer; + //! How many bytes do we want to write. + unsigned int length; + //! Whether to wait if bus is busy (false) or return immediately (true) + bool no_wait; +} twi_package_t; + +/** + * \} + */ + +/** + * \page xmega_twi_quickstart Quick start guide for XMEGA TWI driver + * + * This is the quick start guide for the + *\ref group_xmega_drivers_twi "TWI Driver", with step-by-step instructions on + * how to configure and use the driver for specific use cases. + * + * The section described below can be compiled into e.g. the main application + * loop or any other function that might use the TWI functionality. + * + * \section xmega_twi_quickstart_basic Basic use case of the TWI driver + * In our basic use case, the TWI driver is used to set up internal + * communication between two TWI modules on the XMEGA A1 Xplained board, since + * this is the most simple way to show functionality without external + * dependencies. TWIC is set up in master mode, and TWIF is set up in slave + * mode, and these are connected together on the board by placing a connection + * between SDA/SCL on J1 to SDA/SCL on J4. + * + * \section xmega_twi_qs_use_cases Specific use case for XMEGA E devices + * - \subpage xmega_twi_xmegae + * + * \section xmega_twi_quickstart_prereq Prerequisites + * The \ref sysclk_group module is required to enable the clock to the TWI + * modules. The \ref group_xmega_drivers_twi_twim "TWI Master" driver and + * \ref group_xmega_drivers_twi_twis "TWI Slave" driver must also be included. + * + * \section xmega_twi_quickstart_setup Setup + * When the \ref sysclk_group module has been included, it must be initialized: + * \code + sysclk_init(); +\endcode + * + * \section xmega_twi_quickstart_use_case Use case + * + * \subsection xmega_twi_quickstart_use_case_example_code Example code + * + * \code + #define TWI_MASTER TWIC + #define TWI_MASTER_PORT PORTC + #define TWI_SLAVE TWIF + #define TWI_SPEED 50000 + #define TWI_MASTER_ADDR 0x50 + #define TWI_SLAVE_ADDR 0x60 + + #define DATA_LENGTH 8 + + TWI_Slave_t slave; + + uint8_t data[DATA_LENGTH] = { + 0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f + }; + + uint8_t recv_data[DATA_LENGTH] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + + twi_options_t m_options = { + .speed = TWI_SPEED, + .chip = TWI_MASTER_ADDR, + .speed_reg = TWI_BAUD(sysclk_get_cpu_hz(), TWI_SPEED) + }; + + static void slave_process(void) { + int i; + + for(i = 0; i < DATA_LENGTH; i++) { + recv_data[i] = slave.receivedData[i]; + } + } + + ISR(TWIF_TWIS_vect) { + TWI_SlaveInterruptHandler(&slave); + } + + void send_and_recv_twi() + { + twi_package_t packet = { + .addr_length = 0, + .chip = TWI_SLAVE_ADDR, + .buffer = (void *)data, + .length = DATA_LENGTH, + .no_wait = false + }; + + uint8_t i; + + TWI_MASTER_PORT.PIN0CTRL = PORT_OPC_WIREDANDPULL_gc; + TWI_MASTER_PORT.PIN1CTRL = PORT_OPC_WIREDANDPULL_gc; + + irq_initialize_vectors(); + + sysclk_enable_peripheral_clock(&TWI_MASTER); + twi_master_init(&TWI_MASTER, &m_options); + twi_master_enable(&TWI_MASTER); + + sysclk_enable_peripheral_clock(&TWI_SLAVE); + TWI_SlaveInitializeDriver(&slave, &TWI_SLAVE, *slave_process); + TWI_SlaveInitializeModule(&slave, TWI_SLAVE_ADDR, + TWI_SLAVE_INTLVL_MED_gc); + + for (i = 0; i < TWIS_SEND_BUFFER_SIZE; i++) { + slave.receivedData[i] = 0; + } + + cpu_irq_enable(); + + twi_master_write(&TWI_MASTER, &packet); + + do { + // Nothing + } while(slave.result != TWIS_RESULT_OK); + } +\endcode + * + * \subsection xmega_twi_quickstart_use_case_workflow Workflow + * We first create some definitions. TWI master and slave, speed, and + * addresses: + * \code + #define TWI_MASTER TWIC + #define TWI_MASTER_PORT PORTC + #define TWI_SLAVE TWIF + #define TWI_SPEED 50000 + #define TWI_MASTER_ADDR 0x50 + #define TWI_SLAVE_ADDR 0x60 + + #define DATA_LENGTH 8 +\endcode + * + * We create a handle to contain information about the slave module: + * \code + TWI_Slave_t slave; +\endcode + * + * We create two variables, one which contains data that will be transmitted, + * and one which will contain the received data: + * \code + uint8_t data[DATA_LENGTH] = { + 0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f + }; + + uint8_t recv_data[DATA_LENGTH] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; +\endcode + * + * Options for the TWI module initialization procedure are given below: + * \code + twi_options_t m_options = { + .speed = TWI_SPEED, + .chip = TWI_MASTER_ADDR, + .speed_reg = TWI_BAUD(sysclk_get_cpu_hz(), TWI_SPEED) + }; +\endcode + * + * The TWI slave will fire an interrupt when it has received data, and the + * function below will be called, which will copy the data from the driver + * to our recv_data buffer: + * \code + static void slave_process(void) { + int i; + + for(i = 0; i < DATA_LENGTH; i++) { + recv_data[i] = slave.receivedData[i]; + } + } +\endcode + * + * Set up the interrupt handler: + * \code + ISR(TWIF_TWIS_vect) { + TWI_SlaveInterruptHandler(&slave); + } +\endcode + * + * We create a packet for the data that we will send to the slave TWI: + * \code + twi_package_t packet = { + .addr_length = 0, + .chip = TWI_SLAVE_ADDR, + .buffer = (void *)data, + .length = DATA_LENGTH, + .no_wait = false + }; +\endcode + * + * We need to set SDA/SCL pins for the master TWI to be wired and + * enable pull-up: + * \code + TWI_MASTER_PORT.PIN0CTRL = PORT_OPC_WIREDANDPULL_gc; + TWI_MASTER_PORT.PIN1CTRL = PORT_OPC_WIREDANDPULL_gc; +\endcode + * + * We enable all interrupt levels: + * \code + irq_initialize_vectors(); +\endcode + * + * We enable the clock to the master module, and initialize it with the + * options we described before: + * \code + sysclk_enable_peripheral_clock(&TWI_MASTER); + twi_master_init(&TWI_MASTER, &m_options); + twi_master_enable(&TWI_MASTER); +\endcode + * + * We do the same for the slave, using the slave portion of the driver, + * passing through the slave_process function, its address, and set medium + * interrupt level: + * \code + sysclk_enable_peripheral_clock(&TWI_SLAVE); + TWI_SlaveInitializeDriver(&slave, &TWI_SLAVE, *slave_process); + TWI_SlaveInitializeModule(&slave, TWI_SLAVE_ADDR, + TWI_SLAVE_INTLVL_MED_gc); +\endcode + * + * We zero out the receive buffer in the slave handle: + * \code + for (i = 0; i < TWIS_SEND_BUFFER_SIZE; i++) { + slave.receivedData[i] = 0; + } +\endcode + * + * And enable interrupts: + * \code + cpu_irq_enable(); +\endcode + * + * Finally, we write our packet through the master TWI module: + * \code + twi_master_write(&TWI_MASTER, &packet); +\endcode + * + * We wait for the slave to finish receiving: + * \code + do { + // Waiting + } while(slave.result != TWIS_RESULT_OK); +\endcode + * \note When the slave has finished receiving, the slave_process() + * function will copy the received data into our recv_data buffer, + * which now contains what was sent through the master. + * + */ + + + /** + * \page xmega_twi_xmegae XMEGA E TWI additions with Bridge and Fast Mode Plus + * + * XMEGA E TWI module provides two additionnnal features compare to regular + * XMEGA TWI module: + * - Fast Mode Plus communication speed + * - Bridge Mode + * + * The following use case will set up the TWI module to be used in in Fast Mode + * Plus together with bridge mode. + * This use case is similar to the regular XMEGA TWI initialization, it only + * differs by the activation of both Bridge and Fast Mode Plus mode. + * + * \subsection xmegae_twi_quickstart_use_case_example_code Example code + * + * \code + #define TWI_MASTER TWIC + #define TWI_MASTER_PORT PORTC + #define TWI_SLAVE TWIC + #define TWI_SPEED 1000000 + #define TWI_MASTER_ADDR 0x50 + #define TWI_SLAVE_ADDR 0x50 + + #define DATA_LENGTH 8 + + TWI_Slave_t slave; + + uint8_t data[DATA_LENGTH] = { + 0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f + }; + + uint8_t recv_data[DATA_LENGTH] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + + twi_options_t m_options = { + .speed = TWI_SPEED, + .chip = TWI_MASTER_ADDR, + .speed_reg = TWI_BAUD(sysclk_get_cpu_hz(), TWI_SPEED) + }; + + static void slave_process(void) { + int i; + + for(i = 0; i < DATA_LENGTH; i++) { + recv_data[i] = slave.receivedData[i]; + } + } + + ISR(TWIC_TWIS_vect) { + TWI_SlaveInterruptHandler(&slave); + } + + void send_and_recv_twi() + { + twi_package_t packet = { + .addr_length = 0, + .chip = TWI_SLAVE_ADDR, + .buffer = (void *)data, + .length = DATA_LENGTH, + .no_wait = false + }; + + uint8_t i; + + TWI_MASTER_PORT.PIN0CTRL = PORT_OPC_WIREDANDPULL_gc; + TWI_MASTER_PORT.PIN1CTRL = PORT_OPC_WIREDANDPULL_gc; + + irq_initialize_vectors(); + + sysclk_enable_peripheral_clock(&TWI_MASTER); + + twi_bridge_enable(&TWI_MASTER); + twi_fast_mode_enable(&TWI_MASTER); + twi_slave_fast_mode_enable(&TWI_SLAVE); + + twi_master_init(&TWI_MASTER, &m_options); + twi_master_enable(&TWI_MASTER); + + sysclk_enable_peripheral_clock(&TWI_SLAVE); + TWI_SlaveInitializeDriver(&slave, &TWI_SLAVE, *slave_process); + TWI_SlaveInitializeModule(&slave, TWI_SLAVE_ADDR, + TWI_SLAVE_INTLVL_MED_gc); + + for (i = 0; i < TWIS_SEND_BUFFER_SIZE; i++) { + slave.receivedData[i] = 0; + } + + cpu_irq_enable(); + + twi_master_write(&TWI_MASTER, &packet); + + do { + // Nothing + } while(slave.result != TWIS_RESULT_OK); + } +\endcode + * + * \subsection xmegae_twi_quickstart_use_case_workflow Workflow + * We first create some definitions. TWI master and slave, speed, and + * addresses: + * \code + #define TWI_MASTER TWIC + #define TWI_MASTER_PORT PORTC + #define TWI_SLAVE TWIC + #define TWI_SPEED 1000000 + #define TWI_MASTER_ADDR 0x50 + #define TWI_SLAVE_ADDR 0x50 + + #define DATA_LENGTH 8 +\endcode + * + * We create a handle to contain information about the slave module: + * \code + TWI_Slave_t slave; +\endcode + * + * We create two variables, one which contains data that will be transmitted, + * and one which will contain the received data: + * \code + uint8_t data[DATA_LENGTH] = { + 0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f + }; + + uint8_t recv_data[DATA_LENGTH] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; +\endcode + * + * Options for the TWI module initialization procedure are given below: + * \code + twi_options_t m_options = { + .speed = TWI_SPEED, + .chip = TWI_MASTER_ADDR, + .speed_reg = TWI_BAUD(sysclk_get_cpu_hz(), TWI_SPEED) + }; +\endcode + * + * The TWI slave will fire an interrupt when it has received data, and the + * function below will be called, which will copy the data from the driver + * to our recv_data buffer: + * \code + static void slave_process(void) { + int i; + + for(i = 0; i < DATA_LENGTH; i++) { + recv_data[i] = slave.receivedData[i]; + } + } +\endcode + * + * Set up the interrupt handler: + * \code + ISR(TWIC_TWIS_vect) { + TWI_SlaveInterruptHandler(&slave); + } +\endcode + * + * We create a packet for the data that we will send to the slave TWI: + * \code + twi_package_t packet = { + .addr_length = 0, + .chip = TWI_SLAVE_ADDR, + .buffer = (void *)data, + .length = DATA_LENGTH, + .no_wait = false + }; +\endcode + * + * We need to set SDA/SCL pins for the master TWI to be wired and + * enable pull-up: + * \code + TWI_MASTER_PORT.PIN0CTRL = PORT_OPC_WIREDANDPULL_gc; + TWI_MASTER_PORT.PIN1CTRL = PORT_OPC_WIREDANDPULL_gc; +\endcode + * + * We enable all interrupt levels: + * \code + irq_initialize_vectors(); +\endcode + * + * We enable the clock to the master module: + * \code + sysclk_enable_peripheral_clock(&TWI_MASTER); +\endcode + * + * We enable the global TWI bridge mode as well as the Fast Mode Plus + * communication speed for both master and slave: + * \code + twi_bridge_enable(&TWI_MASTER); + twi_fast_mode_enable(&TWI_MASTER); + twi_slave_fast_mode_enable(&TWI_SLAVE); +\endcode + * + * Initialize the master module with the options we described before: + * \code + twi_master_init(&TWI_MASTER, &m_options); + twi_master_enable(&TWI_MASTER); +\endcode + * + * We do the same for the slave, using the slave portion of the driver, + * passing through the slave_process function, its address, and set medium + * interrupt level: + * \code + sysclk_enable_peripheral_clock(&TWI_SLAVE); + TWI_SlaveInitializeDriver(&slave, &TWI_SLAVE, *slave_process); + TWI_SlaveInitializeModule(&slave, TWI_SLAVE_ADDR, + TWI_SLAVE_INTLVL_MED_gc); +\endcode + * + * We zero out the receive buffer in the slave handle: + * \code + for (i = 0; i < TWIS_SEND_BUFFER_SIZE; i++) { + slave.receivedData[i] = 0; + } +\endcode + * + * And enable interrupts: + * \code + cpu_irq_enable(); +\endcode + * + * Finally, we write our packet through the master TWI module: + * \code + twi_master_write(&TWI_MASTER, &packet); +\endcode + * + * We wait for the slave to finish receiving: + * \code + do { + // Waiting + } while(slave.result != TWIS_RESULT_OK); +\endcode + * \note When the slave has finished receiving, the slave_process() + * function will copy the received data into our recv_data buffer, + * which now contains what was sent through the master. + * + */ + + +#if XMEGA_E + +/*! \brief Enable bridge mode on TWIC. + * SDA and SCL are on PORTC for Master and on PORTD for slave + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_bridge_enable(TWI_t *twi) +{ + twi->CTRL |= TWI_BRIDGEEN_bm; +} + +/*! \brief Disable bridge mode on TWIC. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_bridge_disable(TWI_t *twi) +{ + twi->CTRL &= (~TWI_BRIDGEEN_bm); +} + + +/*! \brief Enable Fast mode plus on TWIC (1MHz). + * FMPEN bit enables 1MHz on master and slave. + * In bridge mode, it enables only 1MHz on master. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_fast_mode_enable(TWI_t *twi) +{ + twi->CTRL |= TWI_FMPEN_bm; +} + +/*! \brief Disable Fast mode plus on TWIC (1MHz). + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_fast_mode_disable(TWI_t *twi) +{ + twi->CTRL &= (~TWI_FMPEN_bm); +} + +/*! \brief Enable Fast mode plus for slave. + * If set in bridge mode, it enables 1MHz on slave. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_slave_fast_mode_enable(TWI_t *twi) +{ + twi->CTRL |= TWI_SFMPEN_bm; +} + +/*! \brief Disable Fast mode plus for slave. + * If reset in bridge mode, it disables 1MHz on slave. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_slave_fast_mode_disable(TWI_t *twi) +{ + twi->CTRL &= (~TWI_SFMPEN_bm); +} +#endif + +#endif // TWI_COMMON_H diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twim.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twim.c new file mode 100644 index 0000000..20bf4e2 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twim.c @@ -0,0 +1,374 @@ +/** + * \file + * + * \brief XMEGA TWI master source file. + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + + +#include "twim.h" + + +/* Master Transfer Descriptor */ + +static struct +{ + TWI_t * bus; // Bus register interface + twi_package_t * pkg; // Bus message descriptor + int addr_count; // Bus transfer address data counter + unsigned int data_count; // Bus transfer payload data counter + bool read; // Bus transfer direction + bool locked; // Bus busy or unavailable + volatile status_code_t status; // Transfer status + +} transfer; + + +/** + * \internal + * + * \brief TWI Master Interrupt Vectors + * + * The TWI master interrupt request entry points are conditionally compiled + * for the TWI interfaces supported by the XMEGA MCU variant. All of these + * entry points call a common service function, twim_interrupt_handler(), + * to handle bus events. This handler uses the bus interface and message + * parameters specified in the global \c transfer structure. + */ +static void twim_interrupt_handler(void); + +#ifdef TWIC +ISR(TWIC_TWIM_vect) { twim_interrupt_handler(); } +#endif +#ifdef TWID +ISR(TWID_TWIM_vect) { twim_interrupt_handler(); } +#endif +#ifdef TWIE +ISR(TWIE_TWIM_vect) { twim_interrupt_handler(); } +#endif +#ifdef TWIF +ISR(TWIF_TWIM_vect) { twim_interrupt_handler(); } +#endif + +/** + * \internal + * + * \brief Test for an idle bus state. + * + * Software can determine the TWI master bus state (unknown, idle, owner, or + * busy) by reading the bus master status register: + * + * TWI_MASTER_BUSSTATE_UNKNOWN_gc Bus state is unknown. + * TWI_MASTER_BUSSTATE_IDLE_gc Bus state is idle. + * TWI_MASTER_BUSSTATE_OWNER_gc Bus state is owned by the master. + * TWI_MASTER_BUSSTATE_BUSY_gc Bus state is busy. + * + * \param twi Base address of the TWI (i.e. &TWI_t). + * + * \retval true The bus is currently idle. + * \retval false The bus is currently busy. + */ +static inline bool twim_idle (const TWI_t * twi) +{ + + return ((twi->MASTER.STATUS & TWI_MASTER_BUSSTATE_gm) + == TWI_MASTER_BUSSTATE_IDLE_gc); +} + +/** + * \internal + * + * \brief Get exclusive access to global TWI resources. + * + * Wait to acquire bus hardware interface and ISR variables. + * + * \param no_wait Set \c true to return instead of doing busy-wait (spin-lock). + * + * \return STATUS_OK if the bus is acquired, else ERR_BUSY. + */ +static inline status_code_t twim_acquire(bool no_wait) +{ + while (transfer.locked) { + + if (no_wait) { return ERR_BUSY; } + } + + irqflags_t const flags = cpu_irq_save (); + + transfer.locked = true; + transfer.status = OPERATION_IN_PROGRESS; + + cpu_irq_restore (flags); + + return STATUS_OK; +} + +/** + * \internal + * + * \brief Release exclusive access to global TWI resources. + * + * Release bus hardware interface and ISR variables previously locked by + * a call to \ref twim_acquire(). This function will busy-wait for + * pending driver operations to complete. + * + * \return status_code_t + * - STATUS_OK if the transfer completes + * - ERR_BUSY to indicate an unavailable bus + * - ERR_IO_ERROR to indicate a bus transaction error + * - ERR_NO_MEMORY to indicate buffer errors + * - ERR_PROTOCOL to indicate an unexpected bus state + */ +static inline status_code_t twim_release(void) +{ + /* First wait for the driver event handler to indicate something + * other than a transfer in-progress, then test the bus interface + * for an Idle bus state. + */ + while (OPERATION_IN_PROGRESS == transfer.status); + + while (! twim_idle(transfer.bus)) { barrier(); } + + status_code_t const status = transfer.status; + + transfer.locked = false; + + return status; +} + +/** + * \internal + * + * \brief TWI master write interrupt handler. + * + * Handles TWI transactions (master write) and responses to (N)ACK. + */ +static inline void twim_write_handler(void) +{ + TWI_t * const bus = transfer.bus; + twi_package_t * const pkg = transfer.pkg; + + if (transfer.addr_count < pkg->addr_length) { + + const uint8_t * const data = pkg->addr; + bus->MASTER.DATA = data[transfer.addr_count++]; + + } else if (transfer.data_count < pkg->length) { + + if (transfer.read) { + + /* Send repeated START condition (Address|R/W=1). */ + + bus->MASTER.ADDR |= 0x01; + + } else { + const uint8_t * const data = pkg->buffer; + bus->MASTER.DATA = data[transfer.data_count++]; + } + + } else { + + /* Send STOP condition to complete the transaction. */ + + bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + transfer.status = STATUS_OK; + } +} + +/** + * \internal + * + * \brief TWI master read interrupt handler. + * + * This is the master read interrupt handler that takes care of + * reading bytes from the TWI slave. + */ +static inline void twim_read_handler(void) +{ + TWI_t * const bus = transfer.bus; + twi_package_t * const pkg = transfer.pkg; + + if (transfer.data_count < pkg->length) { + + uint8_t * const data = pkg->buffer; + data[transfer.data_count++] = bus->MASTER.DATA; + + /* If there is more to read, issue ACK and start a byte read. + * Otherwise, issue NACK and STOP to complete the transaction. + */ + if (transfer.data_count < pkg->length) { + + bus->MASTER.CTRLC = TWI_MASTER_CMD_RECVTRANS_gc; + + } else { + + bus->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc; + transfer.status = STATUS_OK; + } + + } else { + + /* Issue STOP and buffer overflow condition. */ + + bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + transfer.status = ERR_NO_MEMORY; + } +} + +/** + * \internal + * + * \brief Common TWI master interrupt service routine. + * + * Check current status and calls the appropriate handler. + */ +static void twim_interrupt_handler(void) +{ + uint8_t const master_status = transfer.bus->MASTER.STATUS; + + if (master_status & TWI_MASTER_ARBLOST_bm) { + + transfer.bus->MASTER.STATUS = master_status | TWI_MASTER_ARBLOST_bm; + transfer.bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + transfer.status = ERR_BUSY; + + } else if ((master_status & TWI_MASTER_BUSERR_bm) || + (master_status & TWI_MASTER_RXACK_bm)) { + + transfer.bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; + transfer.status = ERR_IO_ERROR; + + } else if (master_status & TWI_MASTER_WIF_bm) { + + twim_write_handler(); + + } else if (master_status & TWI_MASTER_RIF_bm) { + + twim_read_handler(); + + } else { + + transfer.status = ERR_PROTOCOL; + } +} + +/** + * \brief Initialize the twi master module + * + * \param twi Base address of the TWI (i.e. &TWIC). + * \param *opt Options for initializing the twi module + * (see \ref twi_options_t) + * \retval STATUS_OK Transaction is successful + * \retval ERR_INVALID_ARG Invalid arguments in \c opt. + */ +status_code_t twi_master_init(TWI_t *twi, const twi_options_t *opt) +{ + uint8_t const ctrla = CONF_TWIM_INTLVL | TWI_MASTER_RIEN_bm | + TWI_MASTER_WIEN_bm | TWI_MASTER_ENABLE_bm; + + twi->MASTER.BAUD = opt->speed_reg; + twi->MASTER.CTRLA = ctrla; + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc; + + transfer.locked = false; + transfer.status = STATUS_OK; + + /* Enable configured PMIC interrupt level. */ + + PMIC.CTRL |= CONF_PMIC_INTLVL; + + cpu_irq_enable(); + + return STATUS_OK; +} + +/** + * \brief Perform a TWI master write or read transfer. + * + * This function is a TWI Master write or read transaction. + * + * \param twi Base address of the TWI (i.e. &TWI_t). + * \param package Package information and data + * (see \ref twi_package_t) + * \param read Selects the transfer direction + * + * \return status_code_t + * - STATUS_OK if the transfer completes + * - ERR_BUSY to indicate an unavailable bus + * - ERR_IO_ERROR to indicate a bus transaction error + * - ERR_NO_MEMORY to indicate buffer errors + * - ERR_PROTOCOL to indicate an unexpected bus state + * - ERR_INVALID_ARG to indicate invalid arguments. + */ +status_code_t twi_master_transfer(TWI_t *twi, + const twi_package_t *package, bool read) +{ + /* Do a sanity check on the arguments. */ + + if ((twi == NULL) || (package == NULL)) { + return ERR_INVALID_ARG; + } + + /* Initiate a transaction when the bus is ready. */ + + status_code_t status = twim_acquire(package->no_wait); + + if (STATUS_OK == status) { + transfer.bus = (TWI_t *) twi; + transfer.pkg = (twi_package_t *) package; + transfer.addr_count = 0; + transfer.data_count = 0; + transfer.read = read; + + uint8_t const chip = (package->chip) << 1; + + if (package->addr_length || (false == read)) { + transfer.bus->MASTER.ADDR = chip; + } else if (read) { + transfer.bus->MASTER.ADDR = chip | 0x01; + } + + status = twim_release(); + } + + return status; +} diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twim.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twim.h new file mode 100644 index 0000000..770a36f --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twim.h @@ -0,0 +1,169 @@ +/** + * \file + * + * \brief TWI driver for AVR. + * + * This file defines a useful set of functions for the TWI interface on AVR + * devices. + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _TWIM_H_ +#define _TWIM_H_ + +/** + * \defgroup group_xmega_drivers_twi_twim TWI Master + * + * \ingroup group_xmega_drivers_twi + * + * \{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + + +#include +#include + +#include "conf_twim.h" +#include "twi_common.h" + + +/*! \brief Error Codes for the Module + * + * \deprecated + * This definition is provided for compatibility with existing ASF example + * applications. This module uses the \ref status_code_t values that will + * replace module-specific error codes in ASF drivers. + */ +#define TWI_SUCCESS (STATUS_OK) + + +/*! Baud register setting calculation. Formula described in datasheet. */ +#define TWI_BAUD(F_SYS, F_TWI) ((F_SYS / (2 * F_TWI)) - 5) + + +/*! \brief Initialize the twi master module + * + * \param twi Base address of the TWI (i.e. &TWIC). + * \param *opt Options for initializing the twi module + * (see \ref twi_options_t) + * \retval STATUS_OK Transaction is successful + * \retval ERR_INVALID_ARG Invalid arguments in \c opt. + */ +status_code_t twi_master_init(TWI_t *twi, const twi_options_t *opt); + +/*! \brief Perform a TWI master write or read transfer. + * + * This function is a TWI Master write or read transaction. + * + * \param twi Base address of the TWI (i.e. &TWI_t). + * \param package Package information and data + * (see \ref twi_package_t) + * \param read Selects the transfer direction + * + * \return status_code_t + * - STATUS_OK if the transfer completes + * - ERR_BUSY to indicate an unavailable bus + * - ERR_IO_ERROR to indicate a bus transaction error + * - ERR_NO_MEMORY to indicate buffer errors + * - ERR_PROTOCOL to indicate an unexpected bus state + * - ERR_INVALID_ARG to indicate invalid arguments. + */ +status_code_t twi_master_transfer(TWI_t *twi, const twi_package_t *package, + bool read); + +/*! \brief Read multiple bytes from a TWI compatible slave device + * + * \param twi Base address of the TWI (i.e. &TWI_t). + * \param package Package information and data + * (see \ref twi_package_t) + * \return STATUS_OK If all bytes were read, error code otherwise + */ +static inline status_code_t twi_master_read(TWI_t *twi, + const twi_package_t *package) +{ + return twi_master_transfer (twi, package, true); +} + +/*! \brief Write multiple bytes to a TWI compatible slave device + * + * \param twi Base address of the TWI (i.e. &TWI_t). + * \param package Package information and data + * (see \ref twi_package_t) + * \return STATUS_OK If all bytes were written, error code otherwise + */ +static inline status_code_t twi_master_write(TWI_t *twi, + const twi_package_t *package) +{ + return twi_master_transfer (twi, package, false); +} + +/*! \brief Enable Master Mode of the TWI. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_master_enable(TWI_t *twi) +{ + twi->MASTER.CTRLA |= TWI_MASTER_ENABLE_bm; +} + +/*! \brief Disable Master Mode of the TWI. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_master_disable(TWI_t *twi) +{ + twi->MASTER.CTRLA &= (~TWI_MASTER_ENABLE_bm); +} + + +#ifdef __cplusplus +} +#endif + +/** + * \} + */ + +#endif // _TWIM_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twis.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twis.c new file mode 100644 index 0000000..2e7c5b4 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twis.c @@ -0,0 +1,333 @@ +/** + * \file ********************************************************************* + * + * \brief + * XMEGA TWI slave driver source file. + * + * This file contains the function implementations the XMEGA TWI slave + * driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA TWI slave module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * Several functions use the following construct: + * "some_register = ... | (some_parameter ? SOME_BIT_bm : 0) | ..." + * Although the use of the ternary operator ( if ? then : else ) is + * discouraged, in some occasions the operator makes it possible to write + * pretty clean and neat code. In this driver, the construct is used to + * set or not set a configuration bit based on a boolean input parameter, + * such as the "some_parameter" in the example above. + * + * \par Application note: + * AVR1308: Using the XMEGA TWI + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * Atmel Corporation: http://www.atmel.com \n + * + * $Revision: 2660 $ + * $Date: 2009-08-11 12:28:58 +0200 (Tue, 11 Aug 2009) $ \n + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ +/* + * Support and FAQ: visit Atmel Support + */ + +#include "twis.h" + + +/*! \brief Initalizes TWI slave driver structure. + * + * Initialize the instance of the TWI Slave and set the appropriate values. + * + * \param twi The TWI_Slave_t struct instance. + * \param module Pointer to the TWI module. + * \param processDataFunction Pointer to the function that handles incoming data. + */ +void TWI_SlaveInitializeDriver(TWI_Slave_t *twi, + TWI_t *module, + void (*processDataFunction) (void)) +{ + twi->interface = module; + twi->Process_Data = processDataFunction; + twi->bytesReceived = 0; + twi->bytesSent = 0; + twi->status = TWIS_STATUS_READY; + twi->result = TWIS_RESULT_UNKNOWN; + twi->abort = false; +} + + +/*! \brief Initialize the TWI module. + * + * Enables interrupts on address recognition and data available. + * Remember to enable interrupts globally from the main application. + * + * \param twi The TWI_Slave_t struct instance. + * \param address Slave address for this module. + * \param intLevel Interrupt level for the TWI slave interrupt handler. + */ +void TWI_SlaveInitializeModule(TWI_Slave_t *twi, + uint8_t address, + TWI_SLAVE_INTLVL_t intLevel) +{ + twi->interface->SLAVE.CTRLA = intLevel | + TWI_SLAVE_DIEN_bm | + TWI_SLAVE_APIEN_bm | + TWI_SLAVE_ENABLE_bm; + twi->interface->SLAVE.ADDR = (address<<1); +} + + +/*! \brief Common TWI slave interrupt service routine. + * + * Handles all TWI transactions and responses to address match, data reception, + * data transmission, bus error and data collision. + * + * \param twi The TWI_Slave_t struct instance. + */ +void TWI_SlaveInterruptHandler(TWI_Slave_t *twi) +{ + uint8_t currentStatus = twi->interface->SLAVE.STATUS; + + /* If bus error. */ + if (currentStatus & TWI_SLAVE_BUSERR_bm) { + twi->bytesReceived = 0; + twi->bytesSent = 0; + twi->result = TWIS_RESULT_BUS_ERROR; + twi->status = TWIS_STATUS_READY; + } + + /* If transmit collision. */ + else if (currentStatus & TWI_SLAVE_COLL_bm) { + twi->bytesReceived = 0; + twi->bytesSent = 0; + twi->result = TWIS_RESULT_TRANSMIT_COLLISION; + twi->status = TWIS_STATUS_READY; + } + + /* If address match. */ + else if ((currentStatus & TWI_SLAVE_APIF_bm) && + (currentStatus & TWI_SLAVE_AP_bm)) { + + TWI_SlaveAddressMatchHandler(twi); + } + + /* If stop (only enabled through slave read transaction). */ + else if (currentStatus & TWI_SLAVE_APIF_bm) { + TWI_SlaveStopHandler(twi); + } + + /* If data interrupt. */ + else if (currentStatus & TWI_SLAVE_DIF_bm) { + TWI_SlaveDataHandler(twi); + } + + /* If unexpected state. */ + else { + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_FAIL); + } +} + +/*! \brief TWI address match interrupt handler. + * + * Prepares TWI module for transaction when an address match occurs. + * + * \param twi The TWI_Slave_t struct instance. + */ +void TWI_SlaveAddressMatchHandler(TWI_Slave_t *twi) +{ + /* If application signalling need to abort (error occured). */ + if (twi->abort) { + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_COMPTRANS_gc; + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_ABORTED); + twi->abort = false; + } else { + twi->status = TWIS_STATUS_BUSY; + twi->result = TWIS_RESULT_UNKNOWN; + + /* Disable stop interrupt. */ + uint8_t currentCtrlA = twi->interface->SLAVE.CTRLA; + twi->interface->SLAVE.CTRLA = currentCtrlA & ~TWI_SLAVE_PIEN_bm; + + twi->bytesReceived = 0; + twi->bytesSent = 0; + + /* Send ACK, wait for data interrupt. */ + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_RESPONSE_gc; + } +} + + +/*! \brief TWI stop condition interrupt handler. + * + * \param twi The TWI_Slave_t struct instance. + */ +void TWI_SlaveStopHandler(TWI_Slave_t *twi) +{ + /* Disable stop interrupt. */ + uint8_t currentCtrlA = twi->interface->SLAVE.CTRLA; + twi->interface->SLAVE.CTRLA = currentCtrlA & ~TWI_SLAVE_PIEN_bm; + + /* Clear APIF, according to flowchart don't ACK or NACK */ + uint8_t currentStatus = twi->interface->SLAVE.STATUS; + twi->interface->SLAVE.STATUS = currentStatus | TWI_SLAVE_APIF_bm; + + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_OK); + +} + + +/*! \brief TWI data interrupt handler. + * + * Calls the appropriate slave read or write handler. + * + * \param twi The TWI_Slave_t struct instance. + */ +void TWI_SlaveDataHandler(TWI_Slave_t *twi) +{ + if (twi->interface->SLAVE.STATUS & TWI_SLAVE_DIR_bm) { + TWI_SlaveWriteHandler(twi); + } else { + TWI_SlaveReadHandler(twi); + } +} + + +/*! \brief TWI slave read interrupt handler. + * + * Handles TWI slave read transactions and responses. + * + * \param twi The TWI_Slave_t struct instance. + */ +void TWI_SlaveReadHandler(TWI_Slave_t *twi) +{ + /* Enable stop interrupt. */ + uint8_t currentCtrlA = twi->interface->SLAVE.CTRLA; + twi->interface->SLAVE.CTRLA = currentCtrlA | TWI_SLAVE_PIEN_bm; + + /* If free space in buffer. */ + if (twi->bytesReceived < TWIS_RECEIVE_BUFFER_SIZE) { + /* Fetch data */ + uint8_t data = twi->interface->SLAVE.DATA; + twi->receivedData[twi->bytesReceived] = data; + + /* Process data. */ + twi->Process_Data(); + + twi->bytesReceived++; + + /* If application signalling need to abort (error occured), + * complete transaction and wait for next START. Otherwise + * send ACK and wait for data interrupt. + */ + if (twi->abort) { + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_COMPTRANS_gc; + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_ABORTED); + twi->abort = false; + } else { + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_RESPONSE_gc; + } + } + /* If buffer overflow, send NACK and wait for next START. Set + * result buffer overflow. + */ + else { + twi->interface->SLAVE.CTRLB = TWI_SLAVE_ACKACT_bm | + TWI_SLAVE_CMD_COMPTRANS_gc; + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_BUFFER_OVERFLOW); + } +} + + +/*! \brief TWI slave write interrupt handler. + * + * Handles TWI slave write transactions and responses. + * + * \param twi The TWI_Slave_t struct instance. + */ +void TWI_SlaveWriteHandler(TWI_Slave_t *twi) +{ + /* If NACK, slave write transaction finished. */ + if ((twi->bytesSent > 0) && (twi->interface->SLAVE.STATUS & + TWI_SLAVE_RXACK_bm)) { + + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_COMPTRANS_gc; + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_OK); + } + /* If ACK, master expects more data. */ + else { + if (twi->bytesSent < TWIS_SEND_BUFFER_SIZE) { + uint8_t data = twi->sendData[twi->bytesSent]; + twi->interface->SLAVE.DATA = data; + twi->bytesSent++; + + /* Send data, wait for data interrupt. */ + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_RESPONSE_gc; + } + /* If buffer overflow. */ + else { + twi->interface->SLAVE.CTRLB = TWI_SLAVE_CMD_COMPTRANS_gc; + TWI_SlaveTransactionFinished(twi, TWIS_RESULT_BUFFER_OVERFLOW); + } + } +} + + +/*! \brief TWI transaction finished function. + * + * Prepares module for new transaction. + * + * \param twi The TWI_Slave_t struct instance. + * \param result The result of the transaction. + */ +void TWI_SlaveTransactionFinished(TWI_Slave_t *twi, uint8_t result) +{ + twi->result = result; + twi->status = TWIS_STATUS_READY; +} diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twis.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twis.h new file mode 100644 index 0000000..6b8f742 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/twi/twis.h @@ -0,0 +1,177 @@ +/** + * \file ********************************************************************* + * + * \brief XMEGA TWI slave driver header file. + * + * This file contains the function prototypes and enumerator definitions + * for various configuration parameters for the XMEGA TWI slave driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA TWI slave module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * \par Application note: + * AVR1307: Using the XMEGA TWI + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * Atmel Corporation: http://www.atmel.com \n + * + * $Revision: 1569 $ + * $Date: 2008-04-22 13:03:43 +0200 (Tue, 22 Apr 2008) $ \n + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef TWIS_H +#define TWIS_H + +/** + * \defgroup group_xmega_drivers_twi_twis TWI Slave + * + * \ingroup group_xmega_drivers_twi + * + * \{ + */ + +#include "compiler.h" +#include "twi_common.h" + +/*! Baud register setting calculation. Formula described in datasheet. */ +#define TWI_BAUD(F_SYS, F_TWI) ((F_SYS / (2 * F_TWI)) - 5) + +/* Transaction status defines.*/ +#define TWIS_STATUS_READY 0 +#define TWIS_STATUS_BUSY 1 + +/* Transaction result enumeration */ +typedef enum TWIS_RESULT_enum { + TWIS_RESULT_UNKNOWN = (0x00<<0), + TWIS_RESULT_OK = (0x01<<0), + TWIS_RESULT_BUFFER_OVERFLOW = (0x02<<0), + TWIS_RESULT_TRANSMIT_COLLISION = (0x03<<0), + TWIS_RESULT_BUS_ERROR = (0x04<<0), + TWIS_RESULT_FAIL = (0x05<<0), + TWIS_RESULT_ABORTED = (0x06<<0), +} TWIS_RESULT_t; + +/* Buffer size defines. */ +#define TWIS_RECEIVE_BUFFER_SIZE 8 +#define TWIS_SEND_BUFFER_SIZE 8 + + + +/*! \brief TWI slave driver struct. + * + * TWI slave struct. Holds pointer to TWI module and data processing routine, + * buffers and necessary variables. + */ +typedef struct TWI_Slave { + TWI_t *interface; /*!< Pointer to what interface to use*/ + void (*Process_Data) (void); /*!< Pointer to process data function*/ + register8_t receivedData[TWIS_RECEIVE_BUFFER_SIZE]; /*!< Read data*/ + register8_t sendData[TWIS_SEND_BUFFER_SIZE]; /*!< Data to write*/ + register8_t bytesReceived; /*!< Number of bytes received*/ + register8_t bytesSent; /*!< Number of bytes sent*/ + register8_t status; /*!< Status of transaction*/ + register8_t result; /*!< Result of transaction*/ + bool abort; /*!< Strobe to abort*/ +} TWI_Slave_t; + + +void TWI_SlaveInitializeDriver(TWI_Slave_t *twi, + TWI_t *module, + void (*processDataFunction) (void)); + +void TWI_SlaveInitializeModule(TWI_Slave_t *twi, + uint8_t address, + TWI_SLAVE_INTLVL_t intLevel); + +void TWI_SlaveInterruptHandler(TWI_Slave_t *twi); +void TWI_SlaveAddressMatchHandler(TWI_Slave_t *twi); +void TWI_SlaveStopHandler(TWI_Slave_t *twi); +void TWI_SlaveDataHandler(TWI_Slave_t *twi); +void TWI_SlaveReadHandler(TWI_Slave_t *twi); +void TWI_SlaveWriteHandler(TWI_Slave_t *twi); +void TWI_SlaveTransactionFinished(TWI_Slave_t *twi, uint8_t result); + + +/*! TWI slave interrupt service routine. + * + * Interrupt service routine for the TWI slave. Copy the interrupt vector + * into your code if needed. + * + ISR(TWIC_TWIS_vect) + { + TWI_SlaveInterruptHandler(&twiSlaveC); + } + * + */ +/*! \brief Enable Slave Mode of the TWI. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_slave_enable(TWI_t *twi) +{ + twi->SLAVE.CTRLA |= TWI_SLAVE_ENABLE_bm; +} + +/*! \brief Disable Slave Mode of the TWI. + * + * \param twi Base address of the TWI instance. + */ +static inline void twi_slave_disable(TWI_t *twi) +{ + twi->SLAVE.CTRLA &= (~TWI_SLAVE_ENABLE_bm); +} + +/** + * \} + */ + +#endif /* TWIS_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/usart/usart.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/usart/usart.c new file mode 100644 index 0000000..a4bc142 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/usart/usart.c @@ -0,0 +1,467 @@ +/** + * \file + * + * \brief USART driver for AVR XMEGA. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include +#include "compiler.h" +#include "usart.h" +#include "sysclk.h" +#include "ioport.h" +#include "status_codes.h" + +/* + * Fix XMEGA header files + * USART.CTRLC bit masks and bit positions + */ +#ifndef USART_UCPHA_bm +# define USART_UCPHA_bm 0x02 +#endif +#ifndef USART_DORD_bm +# define USART_DORD_bm 0x04 +#endif + +/** + * \brief Initialize USART in RS232 mode. + * + * This function initializes the USART module in RS232 mode using the + * usart_rs232_options_t configuration structure and CPU frequency. + * + * \param usart The USART module. + * \param opt The RS232 configuration option. + * + * \retval true if the initialization was successfull + * \retval false if the initialization failed (error in baud rate calculation) + */ +bool usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt) +{ + bool result; + sysclk_enable_peripheral_clock(usart); + usart_set_mode(usart, USART_CMODE_ASYNCHRONOUS_gc); + usart_format_set(usart, opt->charlength, opt->paritytype, + opt->stopbits); + result = usart_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); + usart_tx_enable(usart); + usart_rx_enable(usart); + + return result; +} + +/** + * \brief Initialize USART in SPI master mode. + * + * This function initializes the USART module in SPI master mode using the + * usart_spi_options_t configuration structure and CPU frequency. + * + * \param usart The USART module. + * \param opt The RS232 configuration option. + */ +void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) +{ + ioport_pin_t sck_pin; + bool invert_sck; + + sysclk_enable_peripheral_clock(usart); + + usart_rx_disable(usart); + + /* configure Clock polarity using INVEN bit of the correct SCK I/O port **/ + invert_sck = (opt->spimode == 2) || (opt->spimode == 3); + UNUSED(invert_sck); + +#ifdef USARTC0 + if ((uint16_t)usart == (uint16_t)&USARTC0) { +# ifdef PORT_USART0_bm + if (PORTC.REMAP & PORT_USART0_bm) { + sck_pin = IOPORT_CREATE_PIN(PORTC, 5); + } else { + sck_pin = IOPORT_CREATE_PIN(PORTC, 1); + } +# else + sck_pin = IOPORT_CREATE_PIN(PORTC, 1); +# endif + } +#endif +#ifdef USARTC1 + if ((uint16_t)usart == (uint16_t)&USARTC1) { + sck_pin = IOPORT_CREATE_PIN(PORTC, 5); + } +#endif +#ifdef USARTD0 + if ((uint16_t)usart == (uint16_t)&USARTD0) { +# ifdef PORT_USART0_bm + if (PORTD.REMAP & PORT_USART0_bm) { + sck_pin = IOPORT_CREATE_PIN(PORTD, 5); + } else { + sck_pin = IOPORT_CREATE_PIN(PORTD, 1); + } +# else + sck_pin = IOPORT_CREATE_PIN(PORTD, 1); +# endif + } +#endif +#ifdef USARTD1 + if ((uint16_t)usart == (uint16_t)&USARTD1) { + sck_pin = IOPORT_CREATE_PIN(PORTD, 5); + } +#endif +#ifdef USARTE0 + if ((uint16_t)usart == (uint16_t)&USARTE0) { +# ifdef PORT_USART0_bm + if(PORTE.REMAP & PORT_USART0_bm) { + sck_pin = IOPORT_CREATE_PIN(PORTE, 5); + } else { + sck_pin = IOPORT_CREATE_PIN(PORTE, 1); + } +# else + sck_pin = IOPORT_CREATE_PIN(PORTE, 1); +# endif + } +#endif +#ifdef USARTE1 + if ((uint16_t)usart == (uint16_t)&USARTE1) { + sck_pin = IOPORT_CREATE_PIN(PORTE, 5); + } +#endif +#ifdef USARTF0 + if ((uint16_t)usart == (uint16_t)&USARTF0) { +# ifdef PORT_USART0_bm + if(PORTF.REMAP & PORT_USART0_bm) { + sck_pin = IOPORT_CREATE_PIN(PORTF, 5); + } else { + sck_pin = IOPORT_CREATE_PIN(PORTF, 1); + } +# else + sck_pin = IOPORT_CREATE_PIN(PORTF, 1); +# endif + } +#endif +#ifdef USARTF1 + if ((uint16_t)usart == (uint16_t)&USARTF1) { + sck_pin = IOPORT_CREATE_PIN(PORTF, 5); + } +#endif + + /* Configure the USART output pin */ + ioport_set_pin_dir(sck_pin, IOPORT_DIR_OUTPUT); + ioport_set_pin_mode(sck_pin, + IOPORT_MODE_TOTEM | (invert_sck? IOPORT_MODE_INVERT_PIN : 0)); + ioport_set_pin_level(sck_pin, IOPORT_PIN_LEVEL_HIGH); + + usart_set_mode(usart, USART_CMODE_MSPI_gc); + + if (opt->spimode == 1 || opt->spimode == 3) { + usart->CTRLC |= USART_UCPHA_bm; + } else { + usart->CTRLC &= ~USART_UCPHA_bm; + } + if (opt->data_order) { + (usart)->CTRLC |= USART_DORD_bm; + } else { + (usart)->CTRLC &= ~USART_DORD_bm; + } + + usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); + usart_tx_enable(usart); + usart_rx_enable(usart); +} + +/** + * \brief Send a data with the USART module + * + * This function outputs a data using the USART module. + * + * \param usart The USART module. + * \param c The data to send. + * + * \return STATUS_OK + */ +enum status_code usart_putchar(USART_t *usart, uint8_t c) +{ + while (usart_data_register_is_empty(usart) == false) { + } + + (usart)->DATA = c; + return STATUS_OK; +} + +/** + * \brief Receive a data with the USART module + * + * This function returns the received data from the USART module. + * + * \param usart The USART module. + * + * \return The received data. + */ +uint8_t usart_getchar(USART_t *usart) +{ + while (usart_rx_is_complete(usart) == false) { + } + + return ((uint8_t)(usart)->DATA); +} + +/** + * \brief Get the offset for lookup in the baudrate table + * + * \param baud The requested baudrate + * + * \return The baudrate offset in PROGMEM table + * \retval USART_BAUD_UNDEFINED for baudrates not in lookup table + */ +static uint8_t usart_get_baud_offset(uint32_t baud) +{ + switch (baud) { + case 1200: + return (uint8_t)USART_BAUD_1200; + + case 2400: + return (uint8_t)USART_BAUD_2400; + + case 4800: + return (uint8_t)USART_BAUD_4800; + + case 9600: + return (uint8_t)USART_BAUD_9600; + + case 19200: + return (uint8_t)USART_BAUD_19200; + + case 38400: + return (uint8_t)USART_BAUD_38400; + + case 57600: + return (uint8_t)USART_BAUD_57600; + + default: + return (uint8_t)USART_BAUD_UNDEFINED; + } +} + +/** + * \brief Set the baudrate by setting the BSEL and BSCALE values in the USART + * + * This function sets the selected BSEL and BSCALE value in the BAUDCTRL + * registers with BSCALE 0. For calculation options, see table 21-1 in XMEGA A + * manual. + * + * \param usart The USART module. + * \param bsel Calculated BSEL value. + * \param bscale Calculated BSEL value. + * + */ +void usart_set_bsel_bscale_value(USART_t *usart, uint16_t bsel, uint8_t bscale) +{ + (usart)->BAUDCTRLA = (uint8_t)(bsel); + (usart)->BAUDCTRLB = (uint8_t)(((bsel >> 8) & 0X0F) | (bscale << 4)); +} + +/** + * \brief Set the baudrate using precalculated BAUDCTRL values from PROGMEM + * + * \note This function only works for cpu_hz 2Mhz or 32Mhz and baudrate values + * 1200, 2400, 4800, 9600, 19200, 38400 and 57600. + * + * \param usart The USART module. + * \param baud The baudrate. + * \param cpu_hz The CPU frequency. + * + */ +void usart_set_baudrate_precalculated(USART_t *usart, uint32_t baud, + uint32_t cpu_hz) +{ + uint8_t baud_offset; + uint16_t baudctrl = 0; + + baud_offset = usart_get_baud_offset(baud); + + if (cpu_hz == 2000000UL) { + baudctrl = PROGMEM_READ_WORD(baudctrl_2mhz + baud_offset); + } else if (cpu_hz == 32000000UL) { + baudctrl = PROGMEM_READ_WORD(baudctrl_32mhz + baud_offset); + } else { + /* Error, system clock speed or USART baud rate is not supported + * by the look-up table */ + Assert(false); + } + + if (baud_offset != USART_BAUD_UNDEFINED) { + (usart)->BAUDCTRLB = (uint8_t)((uint16_t)baudctrl); + (usart)->BAUDCTRLA = (uint8_t)((uint16_t)baudctrl >> 8); + } +} + +/** + * \brief Set the baudrate value in the USART module + * + * This function sets the baudrate register with scaling regarding the CPU + * frequency and makes sure the baud rate is supported by the hardware. + * The function can be used if you don't want to calculate the settings + * yourself or changes to baudrate at runtime is required. + * + * \param usart The USART module. + * \param baud The baudrate. + * \param cpu_hz The CPU frequency. + * + * \retval true if the hardware supports the baud rate + * \retval false if the hardware does not support the baud rate (i.e. it's + * either too high or too low.) + */ +bool usart_set_baudrate(USART_t *usart, uint32_t baud, uint32_t cpu_hz) +{ + int8_t exp; + uint32_t div; + uint32_t limit; + uint32_t ratio; + uint32_t min_rate; + uint32_t max_rate; + + /* + * Check if the hardware supports the given baud rate + */ + /* 8 = (2^0) * 8 * (2^0) = (2^BSCALE_MIN) * 8 * (BSEL_MIN) */ + max_rate = cpu_hz / 8; + /* 4194304 = (2^7) * 8 * (2^12) = (2^BSCALE_MAX) * 8 * (BSEL_MAX+1) */ + min_rate = cpu_hz / 4194304; + + if (!((usart)->CTRLB & USART_CLK2X_bm)) { + max_rate /= 2; + min_rate /= 2; + } + + if ((baud > max_rate) || (baud < min_rate)) { + return false; + } + + /* Check if double speed is enabled. */ + if (!((usart)->CTRLB & USART_CLK2X_bm)) { + baud *= 2; + } + + /* Find the lowest possible exponent. */ + limit = 0xfffU >> 4; + ratio = cpu_hz / baud; + + for (exp = -7; exp < 7; exp++) { + if (ratio < limit) { + break; + } + + limit <<= 1; + + if (exp < -3) { + limit |= 1; + } + } + + /* + * Depending on the value of exp, scale either the input frequency or + * the target baud rate. By always scaling upwards, we never introduce + * any additional inaccuracy. + * + * We are including the final divide-by-8 (aka. right-shift-by-3) in + * this operation as it ensures that we never exceeed 2**32 at any + * point. + * + * The formula for calculating BSEL is slightly different when exp is + * negative than it is when exp is positive. + */ + if (exp < 0) { + /* We are supposed to subtract 1, then apply BSCALE. We want to + * apply BSCALE first, so we need to turn everything inside the + * parenthesis into a single fractional expression. + */ + cpu_hz -= 8 * baud; + + /* If we end up with a left-shift after taking the final + * divide-by-8 into account, do the shift before the divide. + * Otherwise, left-shift the denominator instead (effectively + * resulting in an overall right shift.) + */ + if (exp <= -3) { + div = ((cpu_hz << (-exp - 3)) + baud / 2) / baud; + } else { + baud <<= exp + 3; + div = (cpu_hz + baud / 2) / baud; + } + } else { + /* We will always do a right shift in this case, but we need to + * shift three extra positions because of the divide-by-8. + */ + baud <<= exp + 3; + div = (cpu_hz + baud / 2) / baud - 1; + } + + (usart)->BAUDCTRLB = (uint8_t)(((div >> 8) & 0X0F) | (exp << 4)); + (usart)->BAUDCTRLA = (uint8_t)div; + + return true; +} + +/** + * \brief Set the baudrate value in the USART_SPI module + * + * This function sets the baudrate register regarding the CPU frequency. + * + * \param usart The USART(SPI) module. + * \param baud The baudrate. + * \param cpu_hz The CPU frequency. + */ +void usart_spi_set_baudrate(USART_t *usart, uint32_t baud, uint32_t cpu_hz) +{ + uint16_t bsel_value; + + /* Check if baudrate is less than the maximim limit specified in + * datasheet */ + if (baud < (cpu_hz / 2)) { + bsel_value = (cpu_hz / (baud * 2)) - 1; + } else { + /* If baudrate is not within the specfication in datasheet, + * assign maximum baudrate possible for the current CPU frequency */ + bsel_value = 0; + } + + (usart)->BAUDCTRLB = (uint8_t)((~USART_BSCALE_gm) & (bsel_value >> 8)); + (usart)->BAUDCTRLA = (uint8_t)(bsel_value); +} diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/usart/usart.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/usart/usart.h new file mode 100644 index 0000000..8a3cb98 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/usart/usart.h @@ -0,0 +1,558 @@ +/** + * \file + * + * \brief USART driver for AVR XMEGA. + * + * This file contains basic functions for the AVR XMEGA USART, with support for all + * modes, settings and clock speeds. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _USART_H_ +#define _USART_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "compiler.h" +#include "pmic.h" + +/** + * \defgroup usart_group USART module (USART) + * + * See \ref xmega_usart_quickstart. + * + * This is a driver for configuring, enabling, disabling and use of the on-chip + * USART. + * + * \section dependencies Dependencies + * + * The USART module depends on the following modules: + * - \ref sysclk_group for peripheral clock control. + * - \ref port_driver_group for peripheral io port control. + * + * @{ + */ + +//! Offset in lookup table for baudrate 1200 +#define USART_BAUD_1200 0x00 +//! Offset in lookup table for baudrate 2400 +#define USART_BAUD_2400 0x01 +//! Offset in lookup table for baudrate 4800 +#define USART_BAUD_4800 0x02 +//! Offset in lookup table for baudrate 9600 +#define USART_BAUD_9600 0x03 +//! Offset in lookup table for baudrate 19200 +#define USART_BAUD_19200 0x04 +//! Offset in lookup table for baudrate 38400 +#define USART_BAUD_38400 0x05 +//! Offset in lookup table for baudrate 57600 +#define USART_BAUD_57600 0x06 +//! Baudrate not in lookup table +#define USART_BAUD_UNDEFINED 0xFF + +//! Lookup table containing baudctrl values for CPU frequency 2 Mhz +static PROGMEM_DECLARE(uint16_t, baudctrl_2mhz[]) = { + 0xE5BC, // Baud: 1200 + 0xC5AC, // Baud: 2400 + 0x859C, // Baud: 4800 + 0x0396, // Baud: 9600 + 0xC192, // Baud: 19200 + 0x2191, // Baud: 38400 + 0x9690, // Baud: 57600 +}; + +//! Lookup table containing baudctrl values for CPU frequency 32 Mhz +static PROGMEM_DECLARE(uint16_t, baudctrl_32mhz[]) = { + 0x031D, // Baud: 1200 + 0x01ED, // Baud: 2400 + 0xFDDC, // Baud: 4800 + 0xF5CC, // Baud: 9600 + 0xE5BC, // Baud: 19200 + 0xC5AC, // Baud: 38400 + 0x6EA8, // Baud: 57600 +}; + + +//! Input parameters when initializing RS232 and similar modes. +typedef struct usart_rs232_options { + //! Set baud rate of the USART (unused in slave modes). + uint32_t baudrate; + + //! Number of bits to transmit as a character (5 to 9). + USART_CHSIZE_t charlength; + + //! Parity type: USART_PMODE_DISABLED_gc, USART_PMODE_EVEN_gc, + //! USART_PMODE_ODD_gc. + USART_PMODE_t paritytype; + + //! Number of stop bits between two characters: + //! true: 2 stop bits + //! false: 1 stop bit + bool stopbits; + +} usart_rs232_options_t; + +//! Input parameters when initializing SPI master mode. +typedef struct usart_spi_options { + //! Set baud rate of the USART in SPI mode. + uint32_t baudrate; + + //! SPI transmission mode. + uint8_t spimode; + + uint8_t data_order; +} usart_spi_options_t; + +//! USART interrupt levels +enum usart_int_level_t { + USART_INT_LVL_OFF = 0x00, + USART_INT_LVL_LO = 0x01, + USART_INT_LVL_MED = 0x02, + USART_INT_LVL_HI = 0x03, +}; + +/** + * \brief Enable USART receiver. + * + * \param usart Pointer to the USART module + */ +static inline void usart_rx_enable(USART_t *usart) +{ + (usart)->CTRLB |= USART_RXEN_bm; +} + +/** + * \brief Disable USART receiver. + * + * \param usart Pointer to the USART module. + */ +static inline void usart_rx_disable(USART_t *usart) +{ + (usart)->CTRLB &= ~USART_RXEN_bm; +} + +/** + * \brief Configure the USART frame format. + * + * Sets the frame format, Frame Size, parity mode and number of stop bits. + * + * \param usart Pointer to the USART module + * \param charSize The character size. Use USART_CHSIZE_t type. + * \param parityMode The parity Mode. Use USART_PMODE_t type. + * \param twoStopBits Enable two stop bit mode. Use bool type. + */ +static inline void usart_format_set(USART_t *usart, USART_CHSIZE_t charSize, + USART_PMODE_t parityMode, bool twoStopBits) +{ + (usart)->CTRLC = (uint8_t)charSize | parityMode + | (twoStopBits ? USART_SBMODE_bm : 0); +} + +/** + * \brief Enable USART transmitter. + * + * \param usart Pointer to the USART module. + */ +static inline void usart_tx_enable(USART_t *usart) +{ + (usart)->CTRLB |= USART_TXEN_bm; +} + +/** + * \brief Disable USART transmitter. + * + * \param usart Pointer to the USART module. + */ +static inline void usart_tx_disable(USART_t *usart) +{ + (usart)->CTRLB &= ~USART_TXEN_bm; +} + +/** + * \brief Set USART RXD interrupt level. + * + * Sets the interrupt level on RX Complete interrupt. + * + * \param usart Pointer to the USART module. + * \param level Interrupt level of the RXD interrupt. + */ +static inline void usart_set_rx_interrupt_level(USART_t *usart, + enum usart_int_level_t level) +{ + (usart)->CTRLA = ((usart)->CTRLA & ~USART_RXCINTLVL_gm) | + (level << USART_RXCINTLVL_gp); +} + +/** + * \brief Set USART TXD interrupt level. + * + * Sets the interrupt level on TX Complete interrupt. + * + * \param usart Pointer to the USART module. + * \param level Interrupt level of the TXD interrupt. + */ +static inline void usart_set_tx_interrupt_level(USART_t *usart, + enum usart_int_level_t level) +{ + (usart)->CTRLA = ((usart)->CTRLA & ~USART_TXCINTLVL_gm) | + (level << USART_TXCINTLVL_gp); +} + +/** + * \brief Set USART DRE interrupt level. + * + * Sets the interrupt level on Data Register interrupt. + * + * \param usart Pointer to the USART module. + * \param level Interrupt level of the DRE interrupt. + * Use USART_DREINTLVL_t type. + */ +static inline void usart_set_dre_interrupt_level(USART_t *usart, + enum usart_int_level_t level) +{ + (usart)->CTRLA = ((usart)->CTRLA & ~USART_DREINTLVL_gm) | + (level << USART_DREINTLVL_gp); +} + +/** + * \brief Set the mode the USART run in. + * + * Set the mode the USART run in. The default mode is asynchronous mode. + * + * \param usart Pointer to the USART module register section. + * \param usartmode Selects the USART mode. Use USART_CMODE_t type. + * + * USART modes: + * - 0x0 : Asynchronous mode. + * - 0x1 : Synchronous mode. + * - 0x2 : IrDA mode. + * - 0x3 : Master SPI mode. + */ +static inline void usart_set_mode(USART_t *usart, USART_CMODE_t usartmode) +{ + (usart)->CTRLC = ((usart)->CTRLC & (~USART_CMODE_gm)) | usartmode; +} + +/** + * \brief Check if data register empty flag is set. + * + * \param usart The USART module. + */ +static inline bool usart_data_register_is_empty(USART_t * usart) +{ + return (usart)->STATUS & USART_DREIF_bm; +} + +/** + * \brief Checks if the RX complete interrupt flag is set. + * + * Checks if the RX complete interrupt flag is set. + * + * \param usart The USART module. + */ +static inline bool usart_rx_is_complete(USART_t * usart) +{ + return (usart)->STATUS & USART_RXCIF_bm; +} + +/** + * \brief Checks if the TX complete interrupt flag is set. + * + * Checks if the TX complete interrupt flag is set. + * + * \param usart The USART module. + */ +static inline bool usart_tx_is_complete(USART_t * usart) +{ + return (usart)->STATUS & USART_TXCIF_bm; +} + +/** + * \brief Clear TX complete interrupt flag. + * + * \param usart The USART module. + */ +static inline void usart_clear_tx_complete(USART_t * usart) +{ + (usart)->STATUS = USART_TXCIF_bm; +} + +/** + * \brief Clear RX complete interrupt flag. + * + * \param usart The USART module. + */ +static inline void usart_clear_rx_complete(USART_t *usart) +{ + (usart)->STATUS = USART_RXCIF_bm; +} + +/** + * \brief Write a data to the USART data register. + * + * \param usart The USART module. + * \param txdata The data to be transmitted. + */ +static inline void usart_put(USART_t * usart, uint8_t txdata) +{ + (usart)->DATA = txdata; +} + +/** + * \brief Read a data to the USART data register. + * + * \param usart The USART module. + * + * \return The received data + */ +static inline uint8_t usart_get(USART_t * usart) +{ + return (usart)->DATA; +} + +/** + * \brief Performs a data transfer on the USART in SPI mode. + * + * \param usart The USART module. + * \param txdata The data to be transmitted. + * + * \return The received data + */ +static inline uint8_t usart_spi_transmit(USART_t * usart, + uint8_t txdata) +{ + while (usart_data_register_is_empty(usart) == false); + usart_put(usart, txdata); + while (!usart_tx_is_complete(usart)); + usart_clear_tx_complete(usart); + return usart_get(usart); +} + +bool usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt); +void usart_init_spi(USART_t * usart, const usart_spi_options_t * opt); + +enum status_code usart_putchar(USART_t * usart, uint8_t c); +uint8_t usart_getchar(USART_t * usart); + +void usart_set_bsel_bscale_value(USART_t *usart, uint16_t bsel, uint8_t bscale); +void usart_set_baudrate_precalculated(USART_t *usart, uint32_t baud, + uint32_t cpu_hz); +bool usart_set_baudrate(USART_t *usart, uint32_t baud, uint32_t cpu_hz); +void usart_spi_set_baudrate(USART_t * usart, uint32_t baud, uint32_t cpu_hz); +//! @} + +#ifdef __cplusplus +} +#endif + +/** + * \page xmega_usart_quickstart Quick start guide for USART module + * + * This is the quick start guide for the \ref usart_group "USART module", with + * step-by-step instructions on how to configure and use the driver in a + * selection of use cases. + * + * The use cases contain several code fragments. The code fragments in the + * steps for setup can be copied into a custom initialization function, while + * the steps for usage can be copied into, e.g., the main application function. + * + * \section usart_basic_use_case Basic use case + * \section usart_use_cases USART use cases + * - \ref usart_basic_use_case + * - \subpage usart_use_case_1 + * + * \section usart_basic_use_case Basic use case - transmit a character + * In this use case, the USART module is configured for: + * - Using USARTD0 + * - Baudrate: 9600 + * - Character length: 8 bit + * - Parity mode: Disabled + * - Stop bit: None + * - RS232 mode + * + * \section usart_basic_use_case_setup Setup steps + * + * \subsection usart_basic_use_case_setup_prereq Prerequisites + * -# \ref sysclk_group + * \subsection usart_basic_use_case_setup_code Example code + * The following configuration must be added to the project (typically to a + * conf_usart.h file, but it can also be added to your main application file.) + * \code + #define USART_SERIAL &USARTD0 + #define USART_SERIAL_BAUDRATE 9600 + #define USART_SERIAL_CHAR_LENGTH USART_CHSIZE_8BIT_gc + #define USART_SERIAL_PARITY USART_PMODE_DISABLED_gc + #define USART_SERIAL_STOP_BIT false +\endcode + * + * Add to application initialization: + * \code + sysclk_init(); + static usart_rs232_options_t USART_SERIAL_OPTIONS = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; + sysclk_enable_module(SYSCLK_PORT_D, PR_USART0_bm); + usart_init_rs232(USART_SERIAL, &USART_SERIAL_OPTIONS); +\endcode + * + * \subsection usart_basic_use_case_setup_flow Workflow + * -# Initialize system clock: + * - \code sysclk_init(); \endcode + * - \note Not always required, but since the \ref usart_group driver is + * dependent on \ref sysclk_group it is good practise to initialize + * this module. + * -# Create USART options struct: + * - \code + static usart_rs232_options_t USART_SERIAL_OPTIONS = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; +\endcode + * -# Enable the clock for the USART module: + * - \code sysclk_enable_module(SYSCLK_PORT_D, PR_USART0_bm); \endcode + * -# Initialize in RS232 mode: + * - \code usart_init_rs232(USART_SERIAL, &USART_SERIAL_OPTIONS); +\endcode + * + * \section usart_basic_use_case_usage Usage steps + * + * \subsection usart_basic_use_case_usage_code Example code + * Add to application C-file: + * \code + usart_putchar(USART_SERIAL, 'a'); +\endcode + * + * \subsection usart_basic_use_case_usage_flow Workflow + * -# Send an 'a' character via USART + * - \code usart_putchar(USART_SERIAL, 'a'); \endcode + */ + +/** + * \page usart_use_case_1 USART receive character and echo back + * + * In this use case, the USART module is configured for: + * - Using USARTD0 + * - Baudrate: 9600 + * - Character length: 8 bit + * - Parity mode: Disabled + * - Stop bit: None + * - RS232 mode + * + * The use case waits for a received character on the configured USART and + * echoes the character back to the same USART. + * + * \section usart_use_case_1_setup Setup steps + * + * \subsection usart_use_case_1_setup_prereq Prerequisites + * -# \ref sysclk_group + * + * \subsection usart_use_case_1_setup_code Example code + * -# The following configuration must be added to the project (typically to a + * conf_usart.h file, but it can also be added to your main application file.): + * \code + #define USART_SERIAL &USARTD0 + #define USART_SERIAL_BAUDRATE 9600 + #define USART_SERIAL_CHAR_LENGTH USART_CHSIZE_8BIT_gc + #define USART_SERIAL_PARITY USART_PMODE_DISABLED_gc + #define USART_SERIAL_STOP_BIT false +\endcode + * + * A variable for the received byte must be added: + * \code uint8_t received_byte; \endcode + * + * Add to application initialization: + * \code + sysclk_init(); + static usart_rs232_options_t USART_SERIAL_OPTIONS = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; + sysclk_enable_module(SYSCLK_PORT_D, PR_USART0_bm); + usart_init_rs232(USART_SERIAL, &USART_SERIAL_OPTIONS); +\endcode + * + * \subsection usart_use_case_1_setup_flow Workflow + * -# Initialize system clock: + * - \code sysclk_init(); \endcode + * - \note Not always required, but since the \ref usart_group driver is + * dependent on \ref sysclk_group it is good practise to initialize + * this module. + * -# Create USART options struct: + * - \code + static usart_rs232_options_t USART_SERIAL_OPTIONS = { + .baudrate = USART_SERIAL_BAUDRATE, + .charlength = USART_SERIAL_CHAR_LENGTH, + .paritytype = USART_SERIAL_PARITY, + .stopbits = USART_SERIAL_STOP_BIT + }; +\endcode + * -# Enable the clock for the USART module: + * - \code sysclk_enable_module(SYSCLK_PORT_D, PR_USART0_bm); \endcode + * -# Initialize in RS232 mode: + * - \code usart_init_rs232(USART_SERIAL, &USART_SERIAL_OPTIONS); +\endcode + * + * \section usart_use_case_1_usage Usage steps + * + * \subsection usart_use_case_1_usage_code Example code + * Add to, e.g., main loop in application C-file: + * \code + received_byte = usart_getchar(USART_SERIAL); + usart_putchar(USART_SERIAL, received_byte); +\endcode + * + * \subsection usart_use_case_1_usage_flow Workflow + * -# Wait for reception of a character: + * - \code received_byte = usart_getchar(USART_SERIAL); \endcode + * -# Echo the character back: + * - \code usart_putchar(USART_SERIAL, received_byte); \endcode + */ + +#endif // _USART_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/wdt/wdt.c b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/wdt/wdt.c new file mode 100644 index 0000000..f62d9f2 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/wdt/wdt.c @@ -0,0 +1,219 @@ +/** + * \file + * + * \brief AVR XMEGA WatchDog Timer driver. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#include "compiler.h" +#include "ccp.h" +#include "wdt.h" + +/*! \brief Set Watchdog timeout period. + * + * This function sets the coded field of the WDT timeout period. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the CTRL register. Interrupts are + * automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + * + * \param to_period WDT timeout coded period + */ +void wdt_set_timeout_period(enum wdt_timeout_period_t to_period) +{ + uint8_t temp = (WDT_PER_gm & (to_period << WDT_PER_gp)) | + (WDT.CTRL & WDT_ENABLE_bm) | (1 << WDT_CEN_bp); + ccp_write_io((void *)&WDT.CTRL, temp); + wdt_wait_while_busy(); +} + + +/*! \brief Set Watchdog window period. + * + * This function sets the coded field of the WDT closed window period. + * Note that this setting is available only if the WDT is enabled (hardware + * behaviour relayed by software). + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the WINCTRL register. Interrupts + * are automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + * + * \param win_period Window coded period + * + * \retval true The WDT was enabled and the setting is done. + * false The WDT is disabled and the setting is discarded. + */ +bool wdt_set_window_period(enum wdt_window_period_t win_period) +{ + if (!(wdt_is_enabled())) { + return false; + } + uint8_t temp = (WDT_WPER_gm & (win_period << WDT_WPER_gp)) | + (WDT.WINCTRL & WDT_WEN_bm) | (1 << WDT_WCEN_bp); + ccp_write_io((void *)&WDT.WINCTRL, temp); + wdt_wait_while_busy(); + return true; +} + + +/*! \brief Disable Watchdog. + * + * This function disables the WDT without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the CTRL register. Interrupts are + * automatically ignored during the change enable period. Disable functions + * operate asynchronously with immediate effect. + */ +void wdt_disable(void) +{ + uint8_t temp = (WDT.CTRL & ~WDT_ENABLE_bm) | (1 << WDT_CEN_bp); + ccp_write_io((void *)&WDT.CTRL, temp); +} + + +/*! \brief Enable Watchdog. + * + * This function enables the WDT without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the CTRL register. Interrupts are + * automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + */ +void wdt_enable(void) +{ + uint8_t temp = (WDT.CTRL & WDT_PER_gm) | + (1 << WDT_ENABLE_bp) | (1 << WDT_CEN_bp); + ccp_write_io((void *)&WDT.CTRL, temp); + wdt_wait_while_busy(); +} + + +/*! \brief Disable Watchdog window mode without changing period settings. + * + * This function disables the WDT window mode without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the WINCTRL register. Interrupts + * are automatically ignored during the change enable period. Disable functions + * operate asynchronously with immediate effect. + * + * \retval true The WDT was enabled and the window mode is disabled. + * false The WDT (& the window mode) is already disabled. + */ +bool wdt_disable_window_mode(void) +{ + if (!(wdt_is_enabled())) { + return false; + } + uint8_t temp = (WDT.WINCTRL & ~WDT_WEN_bm) | (1 << WDT_WCEN_bp); + ccp_write_io((void *)&WDT.WINCTRL, temp); + + return true; +} + + +/*! \brief Enable Watchdog window mode. + * + * This function enables the WDT window mode without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the WINCTRL register. Interrupts + * are automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + * + * \retval true The WDT was enabled and the setting is done. + * false The WDT is disabled and the setting is discarded. + */ +bool wdt_enable_window_mode(void) +{ + if (!(wdt_is_enabled())) { + return false; + } + uint8_t temp = (WDT.WINCTRL & WDT_WPER_gm) | + (1 << WDT_WEN_bp) | (1 << WDT_WCEN_bp); + ccp_write_io((void *)&WDT.WINCTRL, temp); + wdt_wait_while_busy(); + return true; +} + + +/*! \brief Reset MCU via Watchdog. + * + * This function generates an hardware microcontroller reset using the WDT. + * + * The function loads enables the WDT in window mode. Executing a "wdr" asm + * instruction when the windows is closed, provides a quick mcu reset. + * + */ +void wdt_reset_mcu(void) +{ +uint8_t temp; + /* + * WDT enabled (minimum timeout period for max. security) + */ + temp = WDT_PER_8CLK_gc | (1 << WDT_ENABLE_bp) | (1 << WDT_CEN_bp); + ccp_write_io((void *)&WDT.CTRL, temp); + wdt_wait_while_busy(); + /* + * WDT enabled (maximum window period for max. security) + */ + temp = WDT_WPER_8KCLK_gc | (1 << WDT_WEN_bp) | (1 << WDT_WCEN_bp); + ccp_write_io((void *)&WDT.WINCTRL, temp); + wdt_wait_while_busy(); + /* + * WDT Reset during window => WDT generates an Hard Reset. + */ + wdt_reset(); + /* + * No exit to prevent the execution of the following instructions. + */ + while (true) { + /* Wait for Watchdog reset. */ + } +} diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/drivers/wdt/wdt.h b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/wdt/wdt.h new file mode 100644 index 0000000..648de24 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/drivers/wdt/wdt.h @@ -0,0 +1,423 @@ +/** + * \file + * + * \brief AVR XMEGA WatchDog Timer driver. + * + * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _WDT_H_ +#define _WDT_H_ + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/// @endcond + +#include "compiler.h" + +/** + * \defgroup wdt_group Watchdog Timer (WDT) + * + * See \ref wdt_quickstart. + * + * This is a driver for configuring, enabling, disabling and use of the on-chip + * WDT. + * + * \section dependencies Dependencies + * + * The WDT module depends on the following modules: + * - \ref ccp_group for writing in a CCP-protected 8-bit I/O register. + * + * @{ + */ + + +//! Watchdog timeout period setting +enum wdt_timeout_period_t { + //! Timeout period = 8 cycles or 8 ms @ 3.3V + WDT_TIMEOUT_PERIOD_8CLK = (0x00), + //! Timeout period = 16 cycles or 16 ms @ 3.3V + WDT_TIMEOUT_PERIOD_16CLK = (0x01), + //! Timeout period = 32 cycles or 32m s @ 3.3V + WDT_TIMEOUT_PERIOD_32CLK = (0x02), + //! Timeout period = 64 cycles or 64ms @ 3.3V + WDT_TIMEOUT_PERIOD_64CLK = (0x03), + //! Timeout period = 125 cycles or 125ms @ 3.3V + WDT_TIMEOUT_PERIOD_125CLK = (0x04), + //! 250 cycles or 250ms @ 3.3V) + WDT_TIMEOUT_PERIOD_250CLK = (0x05), + //! Timeout period = 500 cycles or 500ms @ 3.3V + WDT_TIMEOUT_PERIOD_500CLK = (0x06), + //! Timeout period =1K cycles or 1s @ 3.3V + WDT_TIMEOUT_PERIOD_1KCLK = (0x07), + //! Timeout period = 2K cycles or 2s @ 3.3V + WDT_TIMEOUT_PERIOD_2KCLK = (0x08), + //! Timeout period = 4K cycles or 4s @ 3.3V + WDT_TIMEOUT_PERIOD_4KCLK = (0x09), + //! Timeout period = 8K cycles or 8s @ 3.3V + WDT_TIMEOUT_PERIOD_8KCLK = (0x0A), +}; + +//! Watchdog window period setting +enum wdt_window_period_t { + //! Window period = 8 cycles or 8 ms @ 3.3V + WDT_WINDOW_PERIOD_8CLK = (0x00), + //! Window period = 16 cycles or 16 ms @ 3.3V + WDT_WINDOW_PERIOD_16CLK = (0x01), + //! Window period = 32 cycles or 32m s @ 3.3V + WDT_WINDOW_PERIOD_32CLK = (0x02), + //! Window period = 64 cycles or 64ms @ 3.3V + WDT_WINDOW_PERIOD_64CLK = (0x03), + //! Window period = 125 cycles or 125ms @ 3.3V + WDT_WINDOW_PERIOD_125CLK = (0x04), + //! 250 cycles or 250ms @ 3.3V) + WDT_WINDOW_PERIOD_250CLK = (0x05), + //! Window period = 500 cycles or 500ms @ 3.3V + WDT_WINDOW_PERIOD_500CLK = (0x06), + //! Window period =1K cycles or 1s @ 3.3V + WDT_WINDOW_PERIOD_1KCLK = (0x07), + //! Window period = 2K cycles or 2s @ 3.3V + WDT_WINDOW_PERIOD_2KCLK = (0x08), + //! Window period = 4K cycles or 4s @ 3.3V + WDT_WINDOW_PERIOD_4KCLK = (0x09), + //! Window period = 8K cycles or 8s @ 3.3V + WDT_WINDOW_PERIOD_8KCLK = (0x0A), +}; + + +/*! \brief This macro resets (clears/refreshes) the Watchdog Timer. + */ +#if defined(__GNUC__) +#define wdt_reset() __asm__ __volatile__("wdr"); +#elif defined(__ICCAVR__) +#define wdt_reset() __watchdog_reset(); +#else +#error Unsupported compiler. +#endif + + +/*! \brief Wait until WD settings are synchronized to the WD clock domain. + * + */ +static inline void wdt_wait_while_busy(void) +{ + while ((WDT.STATUS & WDT_SYNCBUSY_bm) == WDT_SYNCBUSY_bm) { + // Wait until synchronization + } +} + + +/*! \brief Check if the Watchdog Enable flag is set. + * + * \retval false WDT disabled + * true WDT enabled + */ +static inline bool wdt_is_enabled(void) +{ + return ((WDT.CTRL & WDT_ENABLE_bm) == WDT_ENABLE_bm); +} + + +/*! \brief Check if the Watchdog Window mode flag is set. + * + * \retval false WDT Window disabled + * true WDT Window enabled + */ +static inline bool wdt_window_mode_is_enabled(void) +{ + return ((WDT.WINCTRL & WDT_WEN_bm) == WDT_WEN_bm); +} + + +/*! \brief Gets the Watchdog timeout period. + * + * This function reads the value of the WDT timeout period. + * + * \retval The WDT timeout period. + */ +static inline enum wdt_timeout_period_t wdt_get_timeout_period(void) +{ + return ((enum wdt_timeout_period_t) + ((WDT.CTRL & WDT_PER_gm) >> WDT_PER_gp)); +} + + +/*! \brief Gets the Watchdog window period. + * + * This function reads the value of the WDT closed window coded period. + * + * \retval The WDT window period. + */ +static inline enum wdt_window_period_t wdt_get_window_period(void) +{ + return ((enum wdt_window_period_t) + ((WDT.WINCTRL & WDT_WPER_gm) >> WDT_WPER_gp)); +} + + +/*! \brief Set Watchdog timeout period. + * + * This function sets the coded field of the WDT timeout period. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the CTRL register. Interrupts are + * automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + * + * \param to_period WDT timeout coded period + */ +void wdt_set_timeout_period(enum wdt_timeout_period_t to_period); + + +/*! \brief Set Watchdog window period. + * + * This function sets the coded field of the WDT closed window period. + * Note that this setting is available only if the WDT is enabled (hardware + * behaviour relayed by software). + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the WINCTRL register. Interrupts + * are automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + * + * \param win_period Window coded period + * + * \retval true The WDT was enabled and the setting is done. + * false The WDT is disabled and the setting is discarded. + */ +bool wdt_set_window_period(enum wdt_window_period_t win_period); + + +/*! \brief Disable Watchdog. + * + * This function disables the WDT without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the CTRL register. Interrupts are + * automatically ignored during the change enable period. Disable functions + * operate asynchronously with immediate effect. + */ +void wdt_disable(void); + + +/*! \brief Enable Watchdog. + * + * This function enables the WDT without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the CTRL register. Interrupts are + * automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + */ +void wdt_enable(void); + + +/*! \brief Disable Watchdog window mode without changing period settings. + * + * This function disables the WDT window mode without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the WINCTRL register. Interrupts + * are automatically ignored during the change enable period. Disable functions + * operate asynchronously with immediate effect. + * + * \retval true The WDT was enabled and the window mode is disabled. + * false The WDT (& the window mode) is already disabled. + */ +bool wdt_disable_window_mode(void); + + +/*! \brief Enable Watchdog window mode. + * + * This function enables the WDT window mode without changing period settings. + * + * The function writes the correct signature to the Configuration + * Change Protection register before writing the WINCTRL register. Interrupts + * are automatically ignored during the change enable period. The function will + * wait for the WDT to be synchronized to the WDT clock domain before + * proceeding + * + * \retval true The WDT was enabled and the setting is done. + * false The WDT is disabled and the setting is discarded. + */ +bool wdt_enable_window_mode(void); + + +/*! \brief Reset MCU via Watchdog. + * + * This function generates an hardware microcontroller reset using the WDT. + * + * The function loads enables the WDT in window mode. Executing a "wdr" asm + * instruction when the windows is closed, provides a quick mcu reset. + * + */ +void wdt_reset_mcu(void); + + +//! @} + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/// @endcond + +/** + * \page wdt_quickstart Quick start guide for WDT driver + * + * This is the quick start guide for the \ref wdt_group, with + * step-by-step instructions on how to configure and use the driver in a + * selection of use cases. + * + * The use cases contain several code fragments. The code fragments in the + * steps for setup can be copied into a custom initialization function, while + * the steps for usage can be copied into, e.g., the main application function. + * + * \section wdt_basic_use_case Basic use case + * \section wdt_use_cases WDT use cases + * - \ref wdt_basic_use_case + * - \subpage wdt_use_case_1 + * + * \section wdt_basic_use_case Basic use case - Reset WDT in standard mode + * In this use case, the WDT is configured for: + * - Standard mode + * - Timeout period of 8 ms + * + * The use case enables the WDT, and resets it after 5 ms to prevent system + * reset after time out period of 8 ms. + * + * \section wdt_basic_use_case_setup Setup steps + * + * \subsection wdt_basic_use_case_setup_prereq Prerequisites + * For the setup code of this use case to work, the following must + * be added to the project: + * -# \ref group_common_services_delay "Busy-Wait Delay Routines" + * + * \subsection wdt_basic_use_case_setup_code Example code + * Add to application initialization: + * \code + wdt_set_timeout_period(WDT_TIMEOUT_PERIOD_8CLK); + wdt_enable(); +\endcode + * + * \subsection wdt_basic_use_case_setup_flow Workflow + * -# Set timeout period to 8 cycles or 8 ms: + * - \code wdt_set_timeout_period(WDT_TIMEOUT_PERIOD_8CLK); \endcode + * -# Enable WDT: + * - \code wdt_enable(); \endcode + * \section wdt_basic_use_case_usage Usage steps + * + * \subsection wdt_basic_use_case_usage_code Example code + * Add to, e.g., main loop in application C-file: + * \code + delay_ms(5); + wdt_reset(); +\endcode + * + * \subsection wdt_basic_use_case_usage_flow Workflow + * -# Wait for 5 ms: + * - \code delay_ms(5); \endcode + * -# Reset the WDT before the timeout period is over to prevent system reset: + * - \code wdt_reset(); \endcode + */ + +/** + * \page wdt_use_case_1 Reset WDT in window mode + * + * In this use case, the WDT is configured for: + * - Window mode + * - Timeout period of 16 ms + * + * The use case enables the WDT in window mode, and resets it after 10 ms to + * prevent system reset before window timeout after 8 ms and after time out + * period of 16 ms. + * + * \section wdt_use_case_1_setup Setup steps + * + * \subsection usart_use_case_1_setup_prereq Prerequisites + * For the setup code of this use case to work, the following must + * be added to the project: + * -# \ref group_common_services_delay "Busy-Wait Delay Routines" + * + * \subsection wdt_use_case_1_setup_code Example code + * Add to application initialization: + * \code + wdt_set_timeout_period(WDT_TIMEOUT_PERIOD_16CLK); + wdt_enable(); + wdt_set_window_period(WDT_TIMEOUT_PERIOD_8CLK); + wdt_enable_window_mode(); +\endcode + * + * \subsection wdt_use_case_1_setup_flow Workflow + * -# Set timeout period to 16 cycles or 16 ms: + * - \code wdt_set_timeout_period(WDT_TIMEOUT_PERIOD_16CLK); \endcode + * -# Enable WDT: + * - \code wdt_enable(); \endcode + * -# Set window period to 8 cycles or 8 ms: + * - \code wdt_set_window_period(WDT_TIMEOUT_PERIOD_8CLK); \endcode + * -# Enable window mode: + * - \code wdt_enable_window_mode(); \endcode + * + * \section wdt_use_case_1_usage Usage steps + * + * \subsection wdt_use_case_1_usage_code Example code + * Add to, e.g., main loop in application C-file: + * \code + delay_ms(10); + wdt_reset(); +\endcode + * + * \subsection wdt_use_case_1_usage_flow Workflow + * -# Wait for 10 ms to not reset the WDT before window timeout: + * - \code delay_ms(10); \endcode + * -# Reset the WDT before the timeout period is over to prevent system reset: + * - \code wdt_reset(); \endcode + */ + +#endif // _WDT_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/services/pwm/pwm.c b/skywave_atxmega128a1_final/src/ASF/xmega/services/pwm/pwm.c new file mode 100644 index 0000000..fc4b126 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/services/pwm/pwm.c @@ -0,0 +1,248 @@ +/** + * \file + * + * \brief PWM service for XMEGA. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + + #include + +/** + * \brief Calculate TC settings from PWM frequency + * + * This function will find the correct TC settings (clock prescaler and + * period) which will give the wanted PWM frequency. + * + * \note Since we want to be able to run the PWM at all duty-cycles ranging + * from 0-100%, we require a period of at least 100 to achieve this. Thus, the + * highest possible PWM frequency is CPU frequency / 100. + * + * \param config Pointer to PWM configuration. + * \param freq_hz Wanted PWM frequency in Hz. + */ +void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz) +{ + uint32_t cpu_hz = sysclk_get_cpu_hz(); + uint16_t smallest_div; + uint16_t dividor; + + /* Avoid division by zero. */ + Assert(freq_hz != 0); + + /* Calculate the smallest divider for the requested frequency + related to the CPU frequency */ + smallest_div = cpu_hz / freq_hz / 0xFFFF; + if (smallest_div < 1) { + dividor = 1; + config->clk_sel = PWM_CLK_DIV1; + } else if (smallest_div < 2) { + dividor = 2; + config->clk_sel = PWM_CLK_DIV2; + } else if (smallest_div < 4) { + dividor = 4; + config->clk_sel = PWM_CLK_DIV4; + } else if (smallest_div < 8) { + dividor = 8; + config->clk_sel = PWM_CLK_DIV8; + } else if (smallest_div < 64) { + dividor = 64; + config->clk_sel = PWM_CLK_DIV64; + } else if (smallest_div < 256) { + dividor = 256; + config->clk_sel = PWM_CLK_DIV256; + } else { + dividor = 1024; + config->clk_sel = PWM_CLK_DIV1024; + } + + /* Calculate the period from the just found divider */ + config->period = cpu_hz / dividor / freq_hz; + + /* Make sure our period is at least 100 ticks so we are able to provide + a full range (0-100% duty cycle */ + if (config->period < 100) { + /* The period is too short. */ + config->clk_sel = PWM_CLK_OFF; + config->period = 0; + Assert(false); + } +} + +/** + * \brief Initialize PWM configuration struct and set correct I/O pin to output + * + * \param config Pointer to PWM configuration struct. + * \param tc \ref pwm_tc_t "TC" to use for this PWM. + * \param channel \ref pwm_channel_t "CC channel" to use for this PWM. + * \param freq_hz Frequency to use for this PWM. + */ +void pwm_init(struct pwm_config *config, enum pwm_tc_t tc, + enum pwm_channel_t channel, uint16_t freq_hz) +{ + /* Number of channels for this TC */ + uint8_t num_chan = 0; + UNUSED(num_chan); + + /* Set TC and correct I/O pin to output */ +/* + * Support and FAQ: visit Atmel Support + */ + switch (tc) { +#if defined(TCC0) + case PWM_TCC0: + config->tc = &TCC0; + PORTC.DIR |= (1 << (channel-1)); + num_chan = 4; + break; +#endif +#if defined(TCC1) + case PWM_TCC1: + config->tc = &TCC1; + PORTC.DIR |= (1 << (channel+3)); + num_chan = 2; + break; +#endif +#if defined(TCD0) + case PWM_TCD0: + config->tc = &TCD0; + PORTD.DIR |= (1 << (channel-1)); + num_chan = 4; + break; +#endif +#if defined(TCD1) + case PWM_TCD1: + config->tc = &TCD1; + PORTD.DIR |= (1 << (channel+3)); + num_chan = 2; + break; +#endif + +#if defined(TCE0) + case PWM_TCE0: + config->tc = &TCE0; + PORTE.DIR |= (1 << (channel-1)); + num_chan = 4; + break; +#endif +#if defined(TCE1) + case PWM_TCE1: + config->tc = &TCE1; + PORTE.DIR |= (1 << (channel+3)); + num_chan = 2; + break; +#endif + +#if defined(TCF0) + case PWM_TCF0: + config->tc = &TCF0; + PORTF.DIR |= (1 << (channel-1)); + num_chan = 4; + break; +#endif +#if defined(TCF1) + case PWM_TCF1: + config->tc = &TCF1; + PORTF.DIR |= (1 << (channel+3)); + num_chan = 2; + break; +#endif + default: + Assert(false); + break; + } + + /* Make sure we are not given a channel number larger + than this TC can handle */ + Assert(channel <= num_chan); + config->channel = channel; + + /* Set the correct cc_mask */ + switch (channel) { + case PWM_CH_A: + config->cc_mask = TC_CCAEN; + break; + case PWM_CH_B: + config->cc_mask = TC_CCBEN; + break; + case PWM_CH_C: + config->cc_mask = TC_CCCEN; + break; + case PWM_CH_D: + config->cc_mask = TC_CCDEN; + break; + default: + Assert(false); + break; + } + + /* Enable peripheral clock for this TC */ + tc_enable(config->tc); + + /* Set this TC's waveform generator in single slope mode */ + tc_set_wgm(config->tc, TC_WG_SS); + + /* Default values (disable TC and set minimum period)*/ + config->period = 0; + config->clk_sel = PWM_CLK_OFF; + tc_write_clock_source(config->tc, PWM_CLK_OFF); + + /* Set the PWM frequency */ + pwm_set_frequency(config, freq_hz); +} + +/** + * \brief Start a PWM channel + * + * This function enables a channel with a given duty cycle. + * + * \param *config Pointer to the PWM configuration struct + * \param duty_cycle_scale Duty cycle as a value between 0 and 100. + */ +void pwm_start(struct pwm_config *config, uint8_t duty_cycle_scale) +{ + /* Set given duty cycle */ + pwm_set_duty_cycle_percent(config, duty_cycle_scale); + /* Set correct TC period */ + tc_write_period(config->tc, config->period); + /* Enable CC channel for this TC */ + tc_enable_cc_channels(config->tc, config->cc_mask); + /* Enable TC by setting correct clock prescaler */ + tc_write_clock_source(config->tc, config->clk_sel); +} + \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/services/pwm/pwm.h b/skywave_atxmega128a1_final/src/ASF/xmega/services/pwm/pwm.h new file mode 100644 index 0000000..af7817e --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/services/pwm/pwm.h @@ -0,0 +1,355 @@ +/** + * \file + * + * \brief PWM service for XMEGA. + * + * Copyright (c) 2012-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef PWM_H +#define PWM_H + +#include "tc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \defgroup pwm_group XMEGA Pulse Width Modulation (PWM) service + * + * See \ref pwm_quickstart. + * + * This is a service for single slope wave form generation on the XMEGA. + * It provides functions for enabling, disabling and configuring the TC modules + * in single slope PWM mode. + * + * The API uses a \ref pwm_config "structure" which contain the configuration. + * This structure must be set up before the PWM can be started. + * + * \section dependencies Dependencies + * This driver depends on the following modules: + * - \ref tc_group to set up TC in PWM mode. + * @{ + */ + + /** + * \brief PWM compare channel index + */ +enum pwm_channel_t { + /** Channel A. PWM output on pin 0 */ + PWM_CH_A = 1, + /** Channel B. PWM output on pin 1 */ + PWM_CH_B = 2, + /** Channel C. PWM output on pin 2 */ + PWM_CH_C = 3, + /** Channel D. PWM output on pin 3 */ + PWM_CH_D = 4, +}; + + /** + * \brief Valid timer/counters to use + * \note Not all timer/counters are available on all devices. + * Please refer to the datasheet for more information on what + * timer/counters are available for the device you are using. + */ +enum pwm_tc_t { + /** PWM on port C, pin 0, 1, 2 or 3 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCC0, + /** PWM on port C, pin 4 or 5 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCC1, + /** PWM on port D, pin 0, 1, 2 or 3 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCD0, + /** PWM on port D, pin 4 or 5 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCD1, + /** PWM on port E, pin 0, 1, 2 or 3 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCE0, + /** PWM on port E, pin 4 or 5 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCE1, + /** PWM on port F, pin 0, 1, 2 or 3 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCF0, + /** PWM on port F, pin 4 or 5 (depending on + \ref pwm_channel_t "channel") */ + PWM_TCF1, +}; + + /** + * \brief Valid clock source indexes + */ +enum pwm_clk_sel { + PWM_CLK_OFF = TC_CLKSEL_OFF_gc, + PWM_CLK_DIV1 = TC_CLKSEL_DIV1_gc, + PWM_CLK_DIV2 = TC_CLKSEL_DIV2_gc, + PWM_CLK_DIV4 = TC_CLKSEL_DIV4_gc, + PWM_CLK_DIV8 = TC_CLKSEL_DIV8_gc, + PWM_CLK_DIV64 = TC_CLKSEL_DIV64_gc, + PWM_CLK_DIV256 = TC_CLKSEL_DIV256_gc, + PWM_CLK_DIV1024 = TC_CLKSEL_DIV1024_gc, +}; + + /** + * \brief PWM configuration + */ +struct pwm_config { + void *tc; + enum pwm_channel_t channel; + enum tc_cc_channel_mask_enable_t cc_mask; + enum pwm_clk_sel clk_sel; + uint16_t period; +}; + +/** \brief Interrupt callback type */ +typedef void (*pwm_callback_t) (void); + +void pwm_init(struct pwm_config *config, enum pwm_tc_t tc, + enum pwm_channel_t channel, uint16_t freq_hz); +void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz); +void pwm_start(struct pwm_config *config, uint8_t duty_cycle_scale); + +/** + * \brief Function to set PWM duty cycle + * + * The duty cycle can be set on a scale between 0-100%. This value + * will be used to update the CCx register for the selected PWM channel. + * + * \param *config Pointer to the PWM configuration struct + * \param duty_cycle_scale Duty cycle as a value between 0 and 100. + */ +static inline void pwm_set_duty_cycle_percent(struct pwm_config *config, + uint8_t duty_cycle_scale) +{ + Assert( duty_cycle_scale <= 100 ); + tc_write_cc_buffer(config->tc, (enum tc_cc_channel_t)config->channel, + (uint16_t)(((uint32_t)config->period * + (uint32_t)duty_cycle_scale) / 100)); +} + +/** + * \brief Function that stops the PWM timer + * + * The PWM timer is stopped by writing the prescaler register to "clock off" + * + * \param *config Pointer to the PWM configuration struct + */ +static inline void pwm_stop(struct pwm_config *config) +{ + tc_write_clock_source(config->tc, TC_CLKSEL_OFF_gc); +} + +/** + * \brief Disable the PWM timer + * + * This function disables the peripheral clock for the timer and shut down + * module when unused in order to save power. + * + * \param *config Pointer to the PWM configuration struct + */ +static inline void pwm_disable(struct pwm_config *config) +{ + pwm_stop(config); + tc_disable(config->tc); +} + +/** + * \brief Function that resets the PWM timer + * + * This function reset the CNT register for the selected timer used for PWM + * + * \param *config Pointer to the PWM configuration struct + */ +static inline void pwm_timer_reset(struct pwm_config *config) +{ + tc_write_count(config->tc, 0); +} + +/** + * \brief Callback function for timer overflow interrupts + * + * This function enables T/C overflow interrupts (low level interrupts) + * and defines the callback function for the overflow ISR interrupt routine. + * + * \param *config Pointer to the PWM configuration struct + * \param callback Callback function + */ +static inline void pwm_overflow_int_callback(struct pwm_config *config, + pwm_callback_t callback) +{ + tc_set_overflow_interrupt_level(config->tc, TC_INT_LVL_LO); + tc_set_overflow_interrupt_callback(config->tc, callback); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +/** + * \page pwm_quickstart Quickstart guide for AVR XMEGA PWM service + * + * This is the quickstart guide for the \ref pwm_group, + * with step-by-step instructions on how to configure and use the service in a + * selection of use cases. + * + * The use cases contain several code fragments. The code fragments in the + * steps for setup can be copied into a custom initialization function, while + * the steps for usage can be copied into, e.g., the main application function. + * + * \section basic_use_case Basic use case + * In the most basic use case, we configure one PWM channel in non-interrupt + * mode. + * + * \section pwm_basic_use_case_setup Setup steps + * \subsection pwm_basic_use_case_setup_code Example code + * Add to application C-file: + * \code + struct pwm_config pwm_cfg; + + sysclk_init(); + pwm_init(&pwm_cfg, PWM_TCE0, PWM_CH_A, 500); +\endcode + * + * \subsection pwm_basic_use_case_setup_flow Workflow + * -# Ensure that \ref conf_clock.h is present for the driver. + * \note This file is only for the driver and should not be included by the + * user. + * -# Define config struct for PWM module: + * \code struct pwm_config pwm_cfg; \endcode + * -# Initialize sysclock module: + * \code sysclk_init();\endcode + * -# Initialize config struct and set up PWM with frequency of 500 Hz.\n + * \code pwm_init(&pwm_cfg, PWM_TCE0, PWM_CH_A, 500); \endcode + * \note Since the timer/counter \ref PWM_TCE0 and channel \ref PWM_CH_A + * is used, the PWM will be output on port E, pin 0. + * See \ref pwm_tc_t and \ref pwm_channel_t for more information + * on what port/pin is used for different timer/counters. + + * \attention This step must not be skipped or the initial content of the + * structs will be unpredictable, possibly causing misconfiguration. + * + * \section pwm_basic_use_case_usage Usage steps + * \subsection pwm_basic_use_case_usage_code Example code + * Add to, e.g., main loop in application C-file: + * \code pwm_start(&pwm_config, 50); \endcode + * + * \subsection pwm_basic_use_case_usage_flow Workflow + * -# Start PWM with 50% duty cycle: + * \code pwm_start(&pwm_config, 50); \endcode + * + * \section pwm_use_cases Advanced use cases + * For more advanced use of the PWM service, see the following use cases: + * - \subpage pwm_use_case_1 : PWM with interrupt + */ +/** + * \page pwm_use_case_1 Use case #1 + * In this use case the PWM module is configured with overflow interrupt. + * + * \section pwm_use_case_1_setup Setup steps + * \subsection pwm_use_case_1_setup_code Example code + * + * Add to application C-file: + * \code + * struct pwm_config pwm_cfg; + * + * void my_callback(void) + * { + * do_something(); + * } + + * void pwm_init(void) + * { + * pmic_init(); + * sysclk_init(); + * + * cpu_irq_enable(); + * + * pwm_init(&pwm_cfg, PWM_TCE0, PWM_CH_A, 75); + * pwm_overflow_int_callback(&pwm_cfg, my_callback); + * } +\endcode + * + * \subsection pwm_use_case_1_setup_flow Workflow + * -# Define config struct for PWM module: + * \code struct pwm_config pwm_cfg; \endcode + * -# Define a callback function in the application which does whatever task + * you want it to do: + * \code + void my_callback(void) + { + do_something(); + } +\endcode + * -# Initialize interrupt controller module: + * \code pmic_init();\endcode + * -# Initialize sysclock module: + * \code sysclk_init();\endcode + * -# Enable global interrupts: + * \code cpu_irq_enable();\endcode + * -# Initialize config struct and set up PWM with frequency of 75 Hz: + * \code pwm_init(&pwm_cfg, PWM_TCE0, PWM_CH_A, 75); \endcode + * \note Since the timer/counter \ref PWM_TCE0 and channel \ref PWM_CH_A + * is used, the PWM will be output on port E, pin 0. + * See \ref pwm_tc_t and \ref pwm_channel_t for more information + * on what port/pin is used for different timer/counters. + * \attention This step must not be skipped or the initial content of the + * structs will be unpredictable, possibly causing misconfiguration. + * -# Set callback function on PWM TC channel overflow: + * \code pwm_overflow_int_callback(&pwm_cfg, my_callback); \endcode + * + * \section pwm_use_case_1_usage Usage steps + * \subsection pwm_use_case_1_usage_code Example code + * Add to, e.g., main loop in application C-file: + * \code pwm_start(&pwm_cfg, 50); \endcode + * + * \subsection pwm_basic_use_case_usage_flow Workflow + * -# Start PWM with 50% duty cycle: + * \code pwm_start(&pwm_cfg, 50); \endcode + * + */ + +#endif /* PWM_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/assembler.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/assembler.h new file mode 100644 index 0000000..8a2dfca --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/assembler.h @@ -0,0 +1,159 @@ +/** + * \file + * + * \brief Assembler abstraction layer and utilities + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef ASSEMBLER_H_INCLUDED +#define ASSEMBLER_H_INCLUDED + +#if !defined(__ASSEMBLER__) && !defined(__IAR_SYSTEMS_ASM__) \ + && !defined(__DOXYGEN__) +# error This file may only be included from assembly files +#endif + +#if defined(__ASSEMBLER__) +# include "assembler/gas.h" +# include +#elif defined(__IAR_SYSTEMS_ASM__) +# include "assembler/iar.h" +# include +#endif + +/** + * \ingroup group_xmega_utils + * \defgroup assembler_group Assembler Support + * + * This group provides a good handful of macros intended to smooth out + * the differences between various assemblers, similar to what compiler.h does + * for compilers, except that assemblers tend to be much less standardized than + * compilers. + * + * @{ + */ + +//! \name Control Statements +//@{ +/** + * \def REPEAT(count) + * \brief Repeat the following statements \a count times + */ +/** + * \def END_REPEAT() + * \brief Mark the end of the statements to be repeated + */ +/** + * \def SET_LOC(offset) + * \brief Set the location counter to \a offset + */ +/** + * \def END_FILE() + * \brief Mark the end of the file + */ +//@} + +//! \name Data Objects +//@{ +/** + * \def FILL_BYTES(count) + * \brief Allocate space for \a count bytes + */ +//@} + +//! \name Symbol Definition +//@{ +/** + * \def L(name) + * \brief Turn \a name into a local symbol, if possible + */ +/** + * \def EXTERN_SYMBOL(name) + * \brief Declare \a name as an external symbol referenced by this file + */ +/** + * \def FUNCTION(name) + * \brief Define a file-local function called \a name + */ +/** + * \def PUBLIC_FUNCTION(name) + * \brief Define a globally visible function called \a name + */ +/** + * \def WEAK_FUNCTION(name) + * \brief Define a weak function called \a name + * + * Weak functions are only referenced if no strong definitions are found + */ +/** + * \def WEAK_FUNCTION_ALIAS(name, strong_name) + * \brief Define \a name as a weak alias for the function \a strong_name + * \sa WEAK_FUNCTION + */ +/** + * \def END_FUNC(name) + * \brief Mark the end of the function called \a name + */ +//@} + +//! \name Section Definition +//@{ +/** + * \def TEXT_SECTION(name) + * \brief Start a new section containing executable code + */ +/** + * \def RODATA_SECTION(name) + * \brief Start a new section containing read-only data + */ +/** + * \def DATA_SECTION(name) + * \brief Start a new section containing writeable initialized data + */ +/** + * \def BSS_SECTION(name) + * \brief Start a new section containing writeable zero-initialized data + */ +//@} + +//! @} + +#endif /* ASSEMBLER_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/assembler/gas.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/assembler/gas.h new file mode 100644 index 0000000..58a5409 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/assembler/gas.h @@ -0,0 +1,124 @@ +/** + * \file + * + * \brief Assembler abstraction layer: GNU Assembler specifics + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef ASSEMBLER_GAS_H_INCLUDED +#define ASSEMBLER_GAS_H_INCLUDED + +#ifndef __DOXYGEN__ + + /* IAR doesn't accept dots in macro names */ + .macro ld_addr, reg, sym + lda.w \reg, \sym + .endm + + /* Define a function \a name that is either globally visible or only + * file-local. + */ + .macro gas_begin_func name, is_public + .if \is_public + .global \name + .endif + .section .text.\name, "ax", @progbits + .type \name, @function + \name : + .endm + + /* Define a function \a name that is either globally visible or only + * file-local in a given segment. + */ + .macro gas_begin_func_segm name, is_public, segment + .if \is_public + .global \name + .endif + .section .\segment, "ax", @progbits + .type \name, @function + \name : + .endm + + /* Define \a name as a weak alias for the function \a strong_name */ + .macro gas_weak_function_alias name, strong_name + .global \name + .weak \name + .type \name, @function + .set \name, \strong_name + .endm + + /* Define a weak function called \a name */ + .macro gas_weak_function name + .weak \name + gas_begin_func \name 1 + .endm + +#define REPEAT(count) .rept count +#define END_REPEAT() .endr +#define FILL_BYTES(count) .fill count +#define SET_LOC(offset) .org offset +#define L(name) .L##name +#define EXTERN_SYMBOL(name) + +#define TEXT_SECTION(name) \ + .section name, "ax", @progbits +#define RODATA_SECTION(name) \ + .section name, "a", @progbits +#define DATA_SECTION(name) \ + .section name, "aw", @progbits +#define BSS_SECTION(name) \ + .section name, "aw", @nobits + +#define FUNCTION(name) gas_begin_func name 0 +#define PUBLIC_FUNCTION(name) gas_begin_func name 1 +#define PUBLIC_FUNCTION_SEGMENT(name, segment) \ + gas_begin_func_segm name 1 segment +#define WEAK_FUNCTION(name) gas_weak_function name +#define WEAK_FUNCTION_ALIAS(name, strong_name) \ + gas_weak_function_alias name strong_name +#define END_FUNC(name) \ + .size name, . - name + +#define END_FILE() + +#endif /* __DOXYGEN__ */ + +#endif /* ASSEMBLER_GAS_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/bit_handling/clz_ctz.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/bit_handling/clz_ctz.h new file mode 100644 index 0000000..a58f1f4 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/bit_handling/clz_ctz.h @@ -0,0 +1,215 @@ +/** + * \file + * + * \brief CLZ/CTZ C implementation. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CLZ_CTH_H +#define CLZ_CTH_H + +/** + * \brief Count leading zeros in unsigned integer + * + * This macro takes unsigned integers of any size, and evaluates to a call to + * the clz-function for its size. These functions count the number of zeros, + * starting with the MSB, before a one occurs in the integer. + * + * \param x Unsigned integer to count the leading zeros in. + * + * \return The number of leading zeros in \a x. + */ +#define clz(x) compiler_demux_size(sizeof(x), clz, (x)) + +/** + * \internal + * \brief Count leading zeros in unsigned, 8-bit integer + * + * \param x Unsigned byte to count the leading zeros in. + * + * \return The number of leading zeros in \a x. + */ +__always_inline static uint8_t clz8(uint8_t x) +{ + uint8_t bit = 0; + + if (x & 0xf0) { + x >>= 4; + } else { + bit += 4; + } + + if (x & 0x0c) { + x >>= 2; + } else { + bit += 2; + } + + if (!(x & 0x02)) { + bit++; + } + + return bit; + +} + +/** + * \internal + * \brief Count leading zeros in unsigned, 16-bit integer + * + * \param x Unsigned word to count the leading zeros in. + * + * \return The number of leading zeros in \a x. + */ +__always_inline static uint8_t clz16(uint16_t x) +{ + uint8_t bit = 0; + + if (x & 0xff00) { + x >>= 8; + } else { + bit += 8; + } + + return bit + clz8(x); +} + +/** + * \internal + * \brief Count leading zeros in unsigned, 32-bit integer + * + * \param x Unsigned double word to count the leading zeros in. + * + * \return The number of leading zeros in \a x. + */ +__always_inline static uint8_t clz32(uint32_t x) +{ + uint8_t bit = 0; + + if (x & 0xffff0000) { + x >>= 16; + } else { + bit += 16; + } + + return bit + clz16(x); +} + +/** + * \brief Count trailing zeros in unsigned integer + * + * This macro takes unsigned integers of any size, and evaluates to a call to + * the ctz-function for its size. These functions count the number of zeros, + * starting with the LSB, before a one occurs in the integer. + * + * \param x Unsigned integer to count the trailing zeros in. + * + * \return The number of trailing zeros in \a x. + */ +#define ctz(x) compiler_demux_size(sizeof(x), ctz, (x)) + +/** + * \internal + * \brief Count trailing zeros in unsigned, 8-bit integer + * + * \param x Unsigned byte to count the trailing zeros in. + * + * \return The number of leading zeros in \a x. + */ +__always_inline static uint8_t ctz8(uint8_t x) +{ + uint8_t bit = 0; + + if (!(x & 0x0f)) { + bit += 4; + x >>= 4; + } + if (!(x & 0x03)) { + bit += 2; + x >>= 2; + } + if (!(x & 0x01)) + bit++; + + return bit; +} + +/** + * \internal + * \brief Count trailing zeros in unsigned, 16-bit integer + * + * \param x Unsigned word to count the trailing zeros in. + * + * \return The number of trailing zeros in \a x. + */ +__always_inline static uint8_t ctz16(uint16_t x) +{ + uint8_t bit = 0; + + if (!(x & 0x00ff)) { + bit += 8; + x >>= 8; + } + + return bit + ctz8(x); +} + +/** + * \internal + * \brief Count trailing zeros in unsigned, 32-bit integer + * + * \param x Unsigned double word to count the trailing zeros in. + * + * \return The number of trailing zeros in \a x. + */ +__always_inline static uint8_t ctz32(uint32_t x) +{ + uint8_t bit = 0; + + if (!(x & 0x0000ffff)) { + bit += 16; + x >>= 16; + } + + return bit + ctz16(x); +} + +#endif /* CLZ_CTZ_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/compiler.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/compiler.h new file mode 100644 index 0000000..5e4f2c4 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/compiler.h @@ -0,0 +1,1189 @@ +/** + * \file + * + * \brief Commonly used includes, types and macros. + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef UTILS_COMPILER_H +#define UTILS_COMPILER_H + +/** + * \defgroup group_xmega_utils XMEGA compiler driver + * + * Compiler abstraction layer and code utilities for 8-bit AVR. + * This module provides various abstraction layers and utilities to make code compatible between different compilers. + * + * \{ + */ + +#if defined(__GNUC__) +# include +# include +#elif defined(__ICCAVR__) +# include +# include +#else +# error Unsupported compiler. +#endif + +#include +#include +#include +#include + +#include + +#ifdef __ICCAVR__ +/*! \name Compiler Keywords + * + * Port of some keywords from GCC to IAR Embedded Workbench. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} +#endif + +/** + * \def UNUSED + * \brief Marking \a v as a unused parameter or value. + */ +#define UNUSED(v) (void)(v) + +/** + * \def unused + * \brief Marking \a v as a unused parameter or value. + */ +#define unused(v) do { (void)(v); } while(0) + +/** + * \def barrier + * \brief Memory barrier + */ +#ifdef __GNUC__ +# define barrier() asm volatile("" ::: "memory") +#else +# define barrier() asm ("") +#endif + +/** + * \brief Emit the compiler pragma \a arg. + * + * \param arg The pragma directive as it would appear after \e \#pragma + * (i.e. not stringified). + */ +#define COMPILER_PRAGMA(arg) _Pragma(#arg) + +/* + * AVR arch does not care about alignment anyway. + */ +#define COMPILER_PACK_RESET(alignment) +#define COMPILER_PACK_SET(alignment) + +/** + * \brief Set aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a))) +#elif (defined __ICCAVR__) +#define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a) +#endif + +/** + * \brief Set word-aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_WORD_ALIGNED __attribute__((__aligned__(2))) +#elif (defined __ICCAVR__) +#define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 2) +#endif + +/** + * \name Tag functions as deprecated + * + * Tagging a function as deprecated will produce a warning when and only + * when the function is called. + * + * Usage is to add the __DEPRECATED__ symbol before the function definition. + * E.g.: + * __DEPRECATED__ uint8_t some_deprecated_function (void) + * { + * ... + * } + * + * \note Only supported by GCC 3.1 and above, no IAR support + * @{ + */ +#if ((defined __GNUC__) && (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >=1))) +#define __DEPRECATED__ __attribute__((__deprecated__)) +#else +#define __DEPRECATED__ +#endif +//! @} + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +typedef unsigned char bool; //!< Boolean. +#endif +#endif +typedef int8_t S8 ; //!< 8-bit signed integer. +typedef uint8_t U8 ; //!< 8-bit unsigned integer. +typedef int16_t S16; //!< 16-bit signed integer. +typedef uint16_t U16; //!< 16-bit unsigned integer. +typedef uint16_t le16_t; +typedef uint16_t be16_t; +typedef int32_t S32; //!< 32-bit signed integer. +typedef uint32_t U32; //!< 32-bit unsigned integer. +typedef uint32_t le32_t; +typedef uint32_t be32_t; +typedef int64_t S64; //!< 64-bit signed integer. +typedef uint64_t U64; //!< 64-bit unsigned integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +typedef uint16_t iram_size_t; +//! @} + + +/*! \name Status Types + */ +//! @{ +typedef Bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + S16 s16 ; + U16 u16 ; + S8 s8 [2]; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + S32 s32 ; + U32 u32 ; + S16 s16[2]; + U16 u16[2]; + S8 s8 [4]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + S64 s64 ; + U64 u64 ; + S32 s32[2]; + U32 u32[2]; + S16 s16[4]; + U16 u16[4]; + S8 s8 [8]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +#define false 0 +#define true 1 +#endif +#endif +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +//! @} + + +//! \name Compile time error handling +//@{ + +/** + * \internal + * \def ERROR_FUNC(name, msg) + * \brief Fail compilation if function call isn't eliminated + * + * If the compiler fails to optimize away all calls to the function \a + * name, terminate compilation and display \a msg to the user. + * + * \note Not all compilers support this, so this is best-effort only. + * Sometimes, there may be a linker error instead, and when optimization + * is disabled, this mechanism will be completely disabled. + */ +#ifndef ERROR_FUNC +# define ERROR_FUNC(name, msg) \ + extern int name(void) +#endif + +//@} + +//! \name Function call demultiplexing +//@{ + +//! Error function for failed demultiplexing. +ERROR_FUNC(compiler_demux_bad_size, "Invalid parameter size"); + +/** + * \internal + * \brief Demultiplex function call based on size of datatype + * + * Evaluates to a function call to a function name with suffix 8, 16 or 32 + * depending on the size of the datatype. Any number of parameters can be + * passed to the function. + * + * Usage: + * \code + void foo8(uint8_t a, void *b); + void foo16(uint16_t a, void *b); + void foo32(uint32_t a, void *b); + + #define foo(x, y) compiler_demux_size(sizeof(x), foo, x, y) +\endcode + * + * \param size Size of the datatype. + * \param func Base function name. + * \param ... List of parameters to pass to the function. + */ +#define compiler_demux_size(size, func, ...) \ + (((size) == 1) ? func##8(__VA_ARGS__) : \ + ((size) == 2) ? func##16(__VA_ARGS__) : \ + ((size) == 4) ? func##32(__VA_ARGS__) : \ + compiler_demux_bad_size()) + +//@} + +/** + * \def __always_inline + * \brief The function should always be inlined. + * + * This annotation instructs the compiler to ignore its inlining + * heuristics and inline the function no matter how big it thinks it + * becomes. + */ +#if (defined __GNUC__) + #define __always_inline inline __attribute__((__always_inline__)) +#elif (defined __ICCAVR__) + #define __always_inline _Pragma("inline=forced") +#endif + +//! \name Optimization Control +//@{ + +/** + * \def __always_optimize + * \brief The function should always be optimized. + * + * This annotation instructs the compiler to ignore global optimization + * settings and always compile the function with a high level of + * optimization. + */ +#if (defined __GNUC__) + #define __always_optimize __attribute__((optimize(3))) +#elif (defined __ICCAVR__) + #define __always_optimize _Pragma("optimize=high") +#endif + +/** + * \def likely(exp) + * \brief The expression \a exp is likely to be true + */ +#ifndef likely +# define likely(exp) (exp) +#endif + +/** + * \def unlikely(exp) + * \brief The expression \a exp is unlikely to be true + */ +#ifndef unlikely +# define unlikely(exp) (exp) +#endif + +/** + * \def is_constant(exp) + * \brief Determine if an expression evaluates to a constant value. + * + * \param exp Any expression + * + * \return true if \a exp is constant, false otherwise. + */ +#ifdef __GNUC__ +# define is_constant(exp) __builtin_constant_p(exp) +#else +# define is_constant(exp) (0) +#endif + +//! @} + +/*! \name Bit-Field Handling + */ +#include "bit_handling/clz_ctz.h" +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value)&(mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value,mask) (Rd_bits( value, (uint32_t)mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (uint32_t)(bitfield) << ctz(mask))) + +//! @} + + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is false. If it is, a fatal error is + * detected and the application hangs up. If TEST_SUITE_DEFINE_ASSERT_MACRO + * is defined, a unit test version of the macro is used, to allow execution + * of further tests after a false expression. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#if defined(_ASSERT_ENABLE_) +# if defined(TEST_SUITE_DEFINE_ASSERT_MACRO) + // Assert() is defined in unit_test/suite.h +# include "unit_test/suite.h" +# else +# define Assert(expr) \ + {\ + if (!(expr)) while (true);\ + } +# endif +#else +# define Assert(expr) ((void) 0) +#endif + +/*! \name Bit Reversing + */ +//! @{ + +/*! \brief Reverses the bits of \a u8. + * + * \param u8 U8 of which to reverse the bits. + * + * \return Value resulting from \a u8 with reversed bits. + */ +#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) >> 24)) + +/*! \brief Reverses the bits of \a u16. + * + * \param u16 U16 of which to reverse the bits. + * + * \return Value resulting from \a u16 with reversed bits. + */ +#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) >> 16)) + +/*! \brief Reverses the bits of \a u32. + * + * \param u32 U32 of which to reverse the bits. + * + * \return Value resulting from \a u32 with reversed bits. + */ +#if (defined __GNUC__) + #define bit_reverse32(u32) \ + (\ + {\ + unsigned int __value = (U32)(u32);\ + __asm__ ("brev\t%0" : "+r" (__value) : : "cc");\ + (U32)__value;\ + }\ + ) +#elif (defined __ICCAVR__) + #define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32))) +#endif + +/*! \brief Reverses the bits of \a u64. + * + * \param u64 U64 of which to reverse the bits. + * + * \return Value resulting from \a u64 with reversed bits. + */ +#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\ + ((U64)bit_reverse32((U64)(u64)) << 32))) + +//! @} + +//! \name Logarithmic functions +//! @{ + +/** + * \internal + * Undefined function. Will cause a link failure if ilog2() is called + * with an invalid constant value. + */ +int_fast8_t ilog2_undefined(void); + +/** + * \brief Calculate the base-2 logarithm of a number rounded down to + * the nearest integer. + * + * \param x A 32-bit value + * \return The base-2 logarithm of \a x, or -1 if \a x is 0. + */ +static inline int_fast8_t ilog2(uint32_t x) +{ + if (is_constant(x)) + return ((x) & (1ULL << 31) ? 31 : + (x) & (1ULL << 30) ? 30 : + (x) & (1ULL << 29) ? 29 : + (x) & (1ULL << 28) ? 28 : + (x) & (1ULL << 27) ? 27 : + (x) & (1ULL << 26) ? 26 : + (x) & (1ULL << 25) ? 25 : + (x) & (1ULL << 24) ? 24 : + (x) & (1ULL << 23) ? 23 : + (x) & (1ULL << 22) ? 22 : + (x) & (1ULL << 21) ? 21 : + (x) & (1ULL << 20) ? 20 : + (x) & (1ULL << 19) ? 19 : + (x) & (1ULL << 18) ? 18 : + (x) & (1ULL << 17) ? 17 : + (x) & (1ULL << 16) ? 16 : + (x) & (1ULL << 15) ? 15 : + (x) & (1ULL << 14) ? 14 : + (x) & (1ULL << 13) ? 13 : + (x) & (1ULL << 12) ? 12 : + (x) & (1ULL << 11) ? 11 : + (x) & (1ULL << 10) ? 10 : + (x) & (1ULL << 9) ? 9 : + (x) & (1ULL << 8) ? 8 : + (x) & (1ULL << 7) ? 7 : + (x) & (1ULL << 6) ? 6 : + (x) & (1ULL << 5) ? 5 : + (x) & (1ULL << 4) ? 4 : + (x) & (1ULL << 3) ? 3 : + (x) & (1ULL << 2) ? 2 : + (x) & (1ULL << 1) ? 1 : + (x) & (1ULL << 0) ? 0 : + ilog2_undefined()); + + return 31 - clz(x); +} + +//! @} + +/*! \name Alignment + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + + +/*! \name Mathematics + * + * Compiler optimization for non-constant expressions, only for abs under WinAVR + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) +#ifndef abs +#define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) +#define min(a, b) Min(a, b) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) +#define max(a, b) Max(a, b) + +//! @} + + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \name System Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a sysreg system register. + * + * \param sysreg Address of the system register of which to get the value. + * + * \return Value of the \a sysreg system register. + */ +#if (defined __GNUC__) + #define Get_system_register(sysreg) __builtin_mfsr(sysreg) +#elif (defined __ICCAVR__) + #define Get_system_register(sysreg) __get_system_register(sysreg) +#endif + +/*! \brief Sets the value of the \a sysreg system register to \a value. + * + * \param sysreg Address of the system register of which to set the value. + * \param value Value to set the \a sysreg system register to. + */ +#if (defined __GNUC__) + #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value) +#elif (defined __ICCAVR__) + #define Set_system_register(sysreg, value) __set_system_register(sysreg, value) +#endif + +//! @} + +/*! \name Debug Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a dbgreg debug register. + * + * \param dbgreg Address of the debug register of which to get the value. + * + * \return Value of the \a dbgreg debug register. + */ +#if (defined __GNUC__) + #define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg) +#elif (defined __ICCAVR__) + #define Get_debug_register(dbgreg) __get_debug_register(dbgreg) +#endif + +/*! \brief Sets the value of the \a dbgreg debug register to \a value. + * + * \param dbgreg Address of the debug register of which to set the value. + * \param value Value to set the \a dbgreg debug register to. + */ +#if (defined __GNUC__) + #define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value) +#elif (defined __ICCAVR__) + #define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value) +#endif + +//! @} + + +/*! \name MCU Endianism Handling + * xmega is a MCU little endianism. + */ +//! @{ +#define MSB(u16) (((uint8_t* )&u16)[1]) +#define LSB(u16) (((uint8_t* )&u16)[0]) + +#define MSW(u32) (((uint16_t*)&u32)[1]) +#define LSW(u32) (((uint16_t*)&u32)[0]) +#define MSB0W(u32) (((uint8_t*)&(u32))[3]) //!< Most significant byte of 1st rank of \a u32. +#define MSB1W(u32) (((uint8_t*)&(u32))[2]) //!< Most significant byte of 2nd rank of \a u32. +#define MSB2W(u32) (((uint8_t*)&(u32))[1]) //!< Most significant byte of 3rd rank of \a u32. +#define MSB3W(u32) (((uint8_t*)&(u32))[0]) //!< Most significant byte of 4th rank of \a u32. +#define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32. +#define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32. + +#define MSB0(u32) (((uint8_t*)&u32)[3]) +#define MSB1(u32) (((uint8_t*)&u32)[2]) +#define MSB2(u32) (((uint8_t*)&u32)[1]) +#define MSB3(u32) (((uint8_t*)&u32)[0]) +#define LSB0(u32) MSB3(u32) +#define LSB1(u32) MSB2(u32) +#define LSB2(u32) MSB1(u32) +#define LSB3(u32) MSB0(u32) + +#define LE16(x) (x) +#define le16_to_cpu(x) (x) +#define cpu_to_le16(x) (x) +#define LE16_TO_CPU(x) (x) +#define CPU_TO_LE16(x) (x) + +#define BE16(x) Swap16(x) +#define be16_to_cpu(x) swap16(x) +#define cpu_to_be16(x) swap16(x) +#define BE16_TO_CPU(x) Swap16(x) +#define CPU_TO_BE16(x) Swap16(x) + +#define LE32(x) (x) +#define le32_to_cpu(x) (x) +#define cpu_to_le32(x) (x) +#define LE32_TO_CPU(x) (x) +#define CPU_TO_LE32(x) (x) + +#define BE32(x) Swap32(x) +#define be32_to_cpu(x) swap32(x) +#define cpu_to_be32(x) swap32(x) +#define BE32_TO_CPU(x) Swap32(x) +#define CPU_TO_BE32(x) Swap32(x) + + + +//! @} + + +/*! \name Endianism Conversion + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap16(u16) Swap16(u16) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap32(u32) Swap32(u32) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Target Abstraction + */ +//! @{ + +#define _GLOBEXT_ extern //!< extern storage-class specifier. +#define _CONST_TYPE_ const //!< const type qualifier. +#define _MEM_TYPE_SLOW_ //!< Slow memory type. +#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type. +#define _MEM_TYPE_FAST_ //!< Fast memory type. + +typedef U8 Byte; //!< 8-bit unsigned integer. + +#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM. +#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM. +#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM. +#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM. + +//! @} + +/** + * \brief Calculate \f$ \left\lceil \frac{a}{b} \right\rceil \f$ using + * integer arithmetic. + * + * \param a An integer + * \param b Another integer + * + * \return (\a a / \a b) rounded up to the nearest integer. + */ +#define div_ceil(a, b) (((a) + (b) - 1) / (b)) + +#include "preprocessor.h" +#include "progmem.h" +#include "interrupt.h" + + +#if (defined __GNUC__) + #define SHORTENUM __attribute__ ((packed)) +#elif (defined __ICCAVR__) + #define SHORTENUM /**/ +#endif + +#if (defined __GNUC__) + #define FUNC_PTR void * +#elif (defined __ICCAVR__) +#if (FLASHEND > 0x1FFFF) // Required for program code larger than 128K + #define FUNC_PTR void __farflash * +#else + #define FUNC_PTR void * +#endif /* ENABLE_FAR_FLASH */ +#endif + + +#if (defined __GNUC__) + #define FLASH_DECLARE(x) const x __attribute__((__progmem__)) +#elif (defined __ICCAVR__) + #define FLASH_DECLARE(x) const __flash x +#endif + +#if (defined __GNUC__) + #define FLASH_EXTERN(x) extern const x +#elif (defined __ICCAVR__) + #define FLASH_EXTERN(x) extern const __flash x +#endif + + +/*Defines the Flash Storage for the request and response of MAC*/ +#define CMD_ID_OCTET (0) + +/* Converting of values from CPU endian to little endian. */ +#define CPU_ENDIAN_TO_LE16(x) (x) +#define CPU_ENDIAN_TO_LE32(x) (x) +#define CPU_ENDIAN_TO_LE64(x) (x) + +/* Converting of values from little endian to CPU endian. */ +#define LE16_TO_CPU_ENDIAN(x) (x) +#define LE32_TO_CPU_ENDIAN(x) (x) +#define LE64_TO_CPU_ENDIAN(x) (x) + +/* Converting of constants from little endian to CPU endian. */ +#define CLE16_TO_CPU_ENDIAN(x) (x) +#define CLE32_TO_CPU_ENDIAN(x) (x) +#define CLE64_TO_CPU_ENDIAN(x) (x) + +/* Converting of constants from CPU endian to little endian. */ +#define CCPU_ENDIAN_TO_LE16(x) (x) +#define CCPU_ENDIAN_TO_LE32(x) (x) +#define CCPU_ENDIAN_TO_LE64(x) (x) + +#if (defined __GNUC__) + #define ADDR_COPY_DST_SRC_16(dst, src) memcpy((&(dst)), (&(src)), sizeof(uint16_t)) + #define ADDR_COPY_DST_SRC_64(dst, src) memcpy((&(dst)), (&(src)), sizeof(uint64_t)) + +/* Converts a 2 Byte array into a 16-Bit value */ +#define convert_byte_array_to_16_bit(data) \ + (*(uint16_t *)(data)) + +/* Converts a 4 Byte array into a 32-Bit value */ +#define convert_byte_array_to_32_bit(data) \ + (*(uint32_t *)(data)) + +/* Converts a 8 Byte array into a 64-Bit value */ +#define convert_byte_array_to_64_bit(data) \ + (*(uint64_t *)(data)) + +/* Converts a 16-Bit value into a 2 Byte array */ +#define convert_16_bit_to_byte_array(value, data) \ + ((*(uint16_t *)(data)) = (uint16_t)(value)) + +/* Converts spec 16-Bit value into a 2 Byte array */ +#define convert_spec_16_bit_to_byte_array(value, data) \ + ((*(uint16_t *)(data)) = (uint16_t)(value)) + +/* Converts spec 16-Bit value into a 2 Byte array */ +#define convert_16_bit_to_byte_address(value, data) \ + ((*(uint16_t *)(data)) = (uint16_t)(value)) + +/* Converts a 32-Bit value into a 4 Byte array */ +#define convert_32_bit_to_byte_array(value, data) \ + ((*(uint32_t *)(data)) = (uint32_t)(value)) + +/* Converts a 64-Bit value into a 8 Byte array */ +/* Here memcpy requires much less footprint */ +#define convert_64_bit_to_byte_array(value, data) \ + memcpy((data), (&(value)), sizeof(uint64_t)) + +#elif (defined __ICCAVR__) + #define ADDR_COPY_DST_SRC_16(dst, src) ((dst) = (src)) + #define ADDR_COPY_DST_SRC_64(dst, src) ((dst) = (src)) + +/* Converts a 2 Byte array into a 16-Bit value */ +#define convert_byte_array_to_16_bit(data) \ + (*(uint16_t *)(data)) + +/* Converts a 4 Byte array into a 32-Bit value */ +#define convert_byte_array_to_32_bit(data) \ + (*(uint32_t *)(data)) + +/* Converts a 8 Byte array into a 64-Bit value */ +#define convert_byte_array_to_64_bit(data) \ + (*(uint64_t *)(data)) + +/* Converts a 16-Bit value into a 2 Byte array */ +#define convert_16_bit_to_byte_array(value, data) \ + ((*(uint16_t *)(data)) = (uint16_t)(value)) + +/* Converts spec 16-Bit value into a 2 Byte array */ +#define convert_spec_16_bit_to_byte_array(value, data) \ + ((*(uint16_t *)(data)) = (uint16_t)(value)) + +/* Converts spec 16-Bit value into a 2 Byte array */ +#define convert_16_bit_to_byte_address(value, data) \ + ((*(uint16_t *)(data)) = (uint16_t)(value)) + +/* Converts a 32-Bit value into a 4 Byte array */ +#define convert_32_bit_to_byte_array(value, data) \ + ((*(uint32_t *)(data)) = (uint32_t)(value)) + +/* Converts a 64-Bit value into a 8 Byte array */ +#define convert_64_bit_to_byte_array(value, data) \ + ((*(uint64_t *)(data)) = (uint64_t)(value)) +#endif + +#define MEMCPY_ENDIAN memcpy +#define PGM_READ_BLOCK(dst, src, len) memcpy_P((dst), (src), (len)) + +#if (defined __GNUC__) + #define PGM_READ_BYTE(x) pgm_read_byte(x) + #define PGM_READ_WORD(x) pgm_read_word(x) +#elif (defined __ICCAVR__) + #define PGM_READ_BYTE(x) *(x) + #define PGM_READ_WORD(x) *(x) +#endif + + +#if (defined __GNUC__) + #define nop() do { __asm__ __volatile__ ("nop"); } while (0) +#elif (defined __ICCAVR__) + #define nop() __no_operation() +#endif + + +/** + * \} + */ + +#endif // UTILS_COMPILER_H diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/mrepeat.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/mrepeat.h new file mode 100644 index 0000000..f4f9c94 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/mrepeat.h @@ -0,0 +1,338 @@ +/** + * \file + * + * \brief Preprocessor macro repeating utils. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +/** + * \defgroup group_xmega_utils_mrepeat Macro Repeat + * + * \ingroup group_xmega_utils + * + * \{ + */ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + +/** + * \} + */ + +#endif // _MREPEAT_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/preprocessor.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/preprocessor.h new file mode 100644 index 0000000..b597f58 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/preprocessor.h @@ -0,0 +1,54 @@ +/** + * \file + * + * \brief Preprocessor utils. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/stringz.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/stringz.h new file mode 100644 index 0000000..fcb3d93 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/stringz.h @@ -0,0 +1,84 @@ +/** + * \file + * + * \brief Preprocessor stringizing utils. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + +/** + * \defgroup group_xmega_utils_stringz Stringize + * + * \ingroup group_xmega_utils + * + * \{ + */ + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * May be used only within macros with the token passed as an argument if the token is \#defined. + * + * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * No restriction of use if the token is \#defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + +/** + * \} + */ + +#endif // _STRINGZ_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/tpaste.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/tpaste.h new file mode 100644 index 0000000..168a0cf --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/preprocessor/tpaste.h @@ -0,0 +1,104 @@ +/** + * \file + * + * \brief Preprocessor token pasting utils. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + +/** + * \defgroup group_xmega_utils_tpaste Token Paste + * + * \ingroup group_xmega_utils + * + * \{ + */ + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * No restriction of use if the tokens are \#defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + +/** + * \} + */ + +#endif // _TPASTE_H_ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/progmem.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/progmem.h new file mode 100644 index 0000000..fcab5db --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/progmem.h @@ -0,0 +1,102 @@ +/** + * \file + * + * \brief Program memory access + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef UTILS_PROGMEM_H +#define UTILS_PROGMEM_H + +/** + * \defgroup group_xmega_utils_progmem Program memory + * + * \ingroup group_xmega_utils + * + * \{ + */ + +/*! \name Program memory + * + * Macros for locating and accessing data in program memory. + * + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) +# include +# define PROGMEM_LOCATION(type, name, loc) \ + type name __attribute__((section (#loc))) +# define PROGMEM_DECLARE(type, name) const type name __attribute__((__progmem__)) +# define PROGMEM_STRING(x) PSTR(x) +# define PROGMEM_STRING_T PGM_P +# define PROGMEM_T const +# define PROGMEM_PTR_T const * +# define PROGMEM_BYTE_ARRAY_T uint8_t* +# define PROGMEM_WORD_ARRAY_T uint16_t* +# define PROGMEM_READ_BYTE(x) pgm_read_byte(x) +# define PROGMEM_READ_WORD(x) pgm_read_word(x) + +#elif defined(__ICCAVR__) +# include +# ifndef __HAS_ELPM__ +# define _MEMATTR_ASF __flash +# else /* __HAS_ELPM__ */ +# define _MEMATTR_ASF __hugeflash +# endif /* __HAS_ELPM__ */ +# define PROGMEM_LOCATION(type, name, loc) const _MEMATTR_ASF type name @ loc +# define PROGMEM_DECLARE(type, name) _MEMATTR_ASF type name +# define PROGMEM_STRING(x) ((_MEMATTR_ASF const char *)(x)) +# define PROGMEM_STRING_T char const _MEMATTR_ASF * +# define PROGMEM_T const _MEMATTR_ASF +# define PROGMEM_PTR_T const _MEMATTR_ASF * +# define PROGMEM_BYTE_ARRAY_T uint8_t const _MEMATTR_ASF * +# define PROGMEM_WORD_ARRAY_T uint16_t const _MEMATTR_ASF * +# define PROGMEM_READ_BYTE(x) *(x) +# define PROGMEM_READ_WORD(x) *(x) +#endif +//! @} + +/** + * \} + */ + +#endif /* UTILS_PROGMEM_H */ diff --git a/skywave_atxmega128a1_final/src/ASF/xmega/utils/status_codes.h b/skywave_atxmega128a1_final/src/ASF/xmega/utils/status_codes.h new file mode 100644 index 0000000..035e696 --- /dev/null +++ b/skywave_atxmega128a1_final/src/ASF/xmega/utils/status_codes.h @@ -0,0 +1,121 @@ +/** + * \file + * + * \brief Status code definitions. + * + * This file defines various status codes returned by functions, + * indicating success or failure as well as what kind of failure. + * + * Copyright (c) 2009-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef STATUS_CODES_H_INCLUDED +#define STATUS_CODES_H_INCLUDED + +/** + * \defgroup group_xmega_utils_status_codes Status Codes + * + * \ingroup group_xmega_utils + * + * \{ + */ + +/* Note: this is a local workaround to avoid a pre-processor clash due to the + * lwIP macro ERR_TIMEOUT. */ +#if defined(__LWIP_ERR_H__) && defined(ERR_TIMEOUT) +#if (ERR_TIMEOUT != -3) + +/* Internal check to make sure that the later restore of lwIP's ERR_TIMEOUT + * macro is set to the correct value. Note that it is highly improbable that + * this value ever changes in lwIP. */ +#error ASF developers: check lwip err.h new value for ERR_TIMEOUT +#endif +#undef ERR_TIMEOUT +#endif + +/** + * Status code that may be returned by shell commands and protocol + * implementations. + * + * \note Any change to these status codes and the corresponding + * message strings is strictly forbidden. New codes can be added, + * however, but make sure that any message string tables are updated + * at the same time. + */ +enum status_code { + STATUS_OK = 0, //!< Success + ERR_IO_ERROR = -1, //!< I/O error + ERR_FLUSHED = -2, //!< Request flushed from queue + ERR_TIMEOUT = -3, //!< Operation timed out + ERR_BAD_DATA = -4, //!< Data integrity check failed + ERR_PROTOCOL = -5, //!< Protocol error + ERR_UNSUPPORTED_DEV = -6, //!< Unsupported device + ERR_NO_MEMORY = -7, //!< Insufficient memory + ERR_INVALID_ARG = -8, //!< Invalid argument + ERR_BAD_ADDRESS = -9, //!< Bad address + ERR_BUSY = -10, //!< Resource is busy + ERR_BAD_FORMAT = -11, //!< Data format not recognized + ERR_NO_TIMER = -12, //!< No timer available + ERR_TIMER_ALREADY_RUNNING = -13, //!< Timer already running + ERR_TIMER_NOT_RUNNING = -14, //!< Timer not running + + /** + * \brief Operation in progress + * + * This status code is for driver-internal use when an operation + * is currently being performed. + * + * \note Drivers should never return this status code to any + * callers. It is strictly for internal use. + */ + OPERATION_IN_PROGRESS = -128, +}; + +typedef enum status_code status_code_t; + +#if defined(__LWIP_ERR_H__) +#define ERR_TIMEOUT -3 +#endif + +/** + * \} + */ + +#endif /* STATUS_CODES_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/asf.h b/skywave_atxmega128a1_final/src/asf.h new file mode 100644 index 0000000..f8b7abd --- /dev/null +++ b/skywave_atxmega128a1_final/src/asf.h @@ -0,0 +1,122 @@ +/** + * \file + * + * \brief Autogenerated API include file for the Atmel Software Framework (ASF) + * + * Copyright (c) 2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef ASF_H +#define ASF_H + +/* + * This file includes all API header files for the selected drivers from ASF. + * Note: There might be duplicate includes required by more than one driver. + * + * The file is automatically generated and will be re-written when + * running the ASF driver selector tool. Any changes will be discarded. + */ + +// From module: ADC - XMEGA A/AU Implementation +#include + +// From module: CPU specific features +#include +#include + +// From module: Delay routines +#include + +// From module: Generic board support +#include + +// From module: IOPORT - General purpose I/O service +#include + +// From module: Interrupt management - XMEGA implementation +#include + +// From module: NVM - Non Volatile Memory +#include + +// From module: PMIC - Programmable Multi-level Interrupt Controller +#include + +// From module: PWM service using timer/counter +#include + +// From module: Part identification macros +#include + +// From module: Sleep Controller driver +#include + +// From module: Sleep manager - XMEGA A/AU/B/D implementation +#include +#include + +// From module: Standard serial I/O (stdio) - XMEGA implementation +#include + +// From module: System Clock Control - XMEGA A1U/A3U/A3BU/A4U/B/C implementation +#include + +// From module: TC - Timer Counter +#include + +// From module: TWI - Two-wire Master and Slave Interface +#include +#include + +// From module: USART - Serial interface - XMEGA implementation +#include + +// From module: USART - Universal Synchronous/Asynchronous Receiver/Transmitter +#include + +// From module: WDT - Watchdog Timer +#include + +// From module: XMEGA compiler driver +#include +#include + +// From module: XMEGA-A1U Xplained Pro +#include + +#endif // ASF_H diff --git a/skywave_atxmega128a1_final/src/config/conf_adc.h b/skywave_atxmega128a1_final/src/config/conf_adc.h new file mode 100644 index 0000000..9a87ba9 --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_adc.h @@ -0,0 +1,56 @@ +/** + * \file + * + * \brief Chip-specific ADC configuration + * + * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CONF_ADC_H +#define CONF_ADC_H + +/* Refer to the ADC driver for detailed documentation. */ +#define CONFIG_ADC_CALLBACK_ENABLE + +// #define CONFIG_ADC_CALLBACK_TYPE uint16_t + +// #define CONFIG_ADC_INTLVL ADC_CH_INTLVL_LO_gc + +#endif /* CONF_ADC_H */ diff --git a/skywave_atxmega128a1_final/src/config/conf_at45dbx.h b/skywave_atxmega128a1_final/src/config/conf_at45dbx.h new file mode 100644 index 0000000..0ae5726 --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_at45dbx.h @@ -0,0 +1,88 @@ +/***************************************************************************** + * + * \file + * + * \brief AT45DBX configuration file. + * + * This file contains the possible external configuration of the AT45DBX. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ +/* + * Support and FAQ: visit Atmel Support + */ + + +#ifndef _CONF_AT45DBX_H_ +#define _CONF_AT45DBX_H_ + + + + +#include "at45dbx.h" +#include "board.h" + +//_____ D E F I N I T I O N S ______________________________________________ + +#warning "Using a default at45dbx configuration: edit and modify the file conf_at45dbx.h depending on the application." + +//! Connect AT45DBx driver to spi master service +#define AT45DBX_USES_SPI_MASTER_SERVICE + +//! Select the SPI module AT45DBX is connected to +#define AT45DBX_SPI_MODULE AT45DBX_SPI + +//! Size of AT45DBX data flash memories to manage. +#define AT45DBX_MEM_SIZE AT45DBX_8MB + +//! Number of AT45DBX components to manage. +#define AT45DBX_MEM_CNT 1 + +#if (UC3) +//! First chip select used by AT45DBX components on the SPI module instance. +#define AT45DBX_CS AT45DBX_SPI_NPCS +#endif + +//! SPI master speed in Hz. +#define AT45DBX_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define AT45DBX_SPI_BITS 8 + + +#endif // _CONF_AT45DBX_H_ diff --git a/skywave_atxmega128a1_final/src/config/conf_board.h b/skywave_atxmega128a1_final/src/config/conf_board.h new file mode 100644 index 0000000..3b5968e --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_board.h @@ -0,0 +1,50 @@ +/** + * \file + * + * \brief XMEGA-A1U Xplained Pro board configuration. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_BOARD_H_INCLUDED +#define CONF_BOARD_H_INCLUDED + +#endif /* CONF_BOARD_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/config/conf_clock.h b/skywave_atxmega128a1_final/src/config/conf_clock.h new file mode 100644 index 0000000..ce2be6a --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_clock.h @@ -0,0 +1,101 @@ +/** + * \file + * + * \brief Chip-specific system clock manager configuration + * + * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CONF_CLOCK_H_INCLUDED +#define CONF_CLOCK_H_INCLUDED + +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ +#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32KHZ +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_XOSC +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL + +/* Fbus = Fsys / (2 ^ BUS_div) */ +#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 +#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 + +//#define CONFIG_PLL0_SOURCE PLL_SRC_XOSC +//#define CONFIG_PLL0_SOURCE PLL_SRC_RC2MHZ +//#define CONFIG_PLL0_SOURCE PLL_SRC_RC32MHZ + +/* Fpll = (Fclk * PLL_mul) / PLL_div */ +//#define CONFIG_PLL0_MUL (24000000UL / BOARD_XOSC_HZ) +//#define CONFIG_PLL0_DIV 1 + +/* External oscillator frequency range */ +/** 0.4 to 2 MHz frequency range */ +//#define CONFIG_XOSC_RANGE XOSC_RANGE_04TO2 +/** 2 to 9 MHz frequency range */ +//#define CONFIG_XOSC_RANGE XOSC_RANGE_2TO9 +/** 9 to 12 MHz frequency range */ +//#define CONFIG_XOSC_RANGE XOSC_RANGE_9TO12 +/** 12 to 16 MHz frequency range */ +//#define CONFIG_XOSC_RANGE XOSC_RANGE_12TO16 + +/* DFLL autocalibration */ +//#define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC OSC_ID_RC32KHZ +//#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_XOSC + +/* The following example clock configuration definitions can be used in XMEGA + * devices that contain a USB controller. It configures the USB controller clock + * source to use the internal (nominally) 32MHz RC oscillator, up-calibrated to + * run at 48MHz via the periodic 1ms USB Start Of Frame packets sent by the + * host. The USB controller requires 48MHz for Full Speed operation, or 6MHz + * for USB Low Speed operation. + * + * Note that when the 32MHz RC oscillator is tuned to 48MHz, it cannot be used + * directly as the system clock source; it must either be prescaled down to a + * speed below the maximum operating frequency given in the datasheet, or an + * alternative clock source (e.g. the internal 2MHz RC Oscillator, multiplied + * to a higher frequency via the internal PLL module) must be used instead. + */ +#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC +//#define CONFIG_OSC_RC32_CAL 48000000UL +//#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF + +/* Use to enable and select RTC clock source */ +//#define CONFIG_RTC_SOURCE SYSCLK_RTCSRC_ULP + +#endif /* CONF_CLOCK_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/config/conf_sleepmgr.h b/skywave_atxmega128a1_final/src/config/conf_sleepmgr.h new file mode 100644 index 0000000..e68e013 --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_sleepmgr.h @@ -0,0 +1,52 @@ +/** + * \file + * + * \brief Chip-specific sleep manager configuration + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef CONF_SLEEPMGR_H +#define CONF_SLEEPMGR_H + +// Sleep manager options +#define CONFIG_SLEEPMGR_ENABLE + +#endif /* CONF_SLEEPMGR_H */ diff --git a/skywave_atxmega128a1_final/src/config/conf_twim.h b/skywave_atxmega128a1_final/src/config/conf_twim.h new file mode 100644 index 0000000..1a31cae --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_twim.h @@ -0,0 +1,52 @@ +/** + * \file + * + * \brief TWIM Configuration File for AVR XMEGA. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ +#ifndef _CONF_TWIM_H_ +#define _CONF_TWIM_H_ + +#define CONF_TWIM_INTLVL TWI_MASTER_INTLVL_MED_gc +#define CONF_PMIC_INTLVL PMIC_MEDLVLEN_bm + +#endif // _CONF_TWIM_H_ diff --git a/skywave_atxmega128a1_final/src/config/conf_usart_serial.h b/skywave_atxmega128a1_final/src/config/conf_usart_serial.h new file mode 100644 index 0000000..7ddb166 --- /dev/null +++ b/skywave_atxmega128a1_final/src/config/conf_usart_serial.h @@ -0,0 +1,50 @@ +/** + * \file ********************************************************************* + * + * \brief USART Serial configuration + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_USART_SERIAL_H_INCLUDED +#define CONF_USART_SERIAL_H_INCLUDED + +#endif /* CONF_USART_SERIAL_H_INCLUDED */ diff --git a/skywave_atxmega128a1_final/src/devices/ds3231.c b/skywave_atxmega128a1_final/src/devices/ds3231.c new file mode 100644 index 0000000..378b0f2 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/ds3231.c @@ -0,0 +1,93 @@ +/* + * ds3231.c + * + * Created: 5/9/2018 6:39:55 AM + * Author: Penguin + */ +#include "devices/ds3231.h" +#include "drivers/twi_comms.h" + +static uint8_t rtc_buffer[32]; +static _Bool ds3231_status; +static sw_time timeBank; +void ds3231_init(void) +{ + ds3231_status = false; + timeBank.hour = 0; + timeBank.minute = 0; + timeBank.second = 0; + timeBank.pm_or_am = 1; + //reset and go + twi_write(DS3231_ADDR, DS3231_CTRL, 0x0); + twi_write(DS3231_ADDR, DS3231_CTRL_STATUS, 0x0); + //configure and enable interrupt + PORTD.PIN0CTRL = PORT_ISC_FALLING_gc; + PORTD.INT1MASK = PIN0_bm; + //or equals OR ELSE + PORTD.INTCTRL |= PORT_INT1LVL_HI_gc; + + //swprintf(SWDEBUG, "%#x\n", rtc_buffer); + ds3231_set_time(3, 58, 00); +} + +void ds3231_set_ready(void) +{ + ds3231_status = true; +} + +void ds3231_clear_ready(void) +{ + ds3231_status = false; +} + +void ds3231_set_time(uint8_t hours, uint8_t minutes, uint8_t seconds) +{ + //high is pm + //low is am + uint8_t pm_or_am = 0; + if(hours >= 12) + { + if(hours == 24) + { + hours -= 12; + } + else if(hours == 12) + { + pm_or_am = 1; + } + else + { + hours -= 12; + pm_or_am = 1; + } + } + uint8_t formattedSeconds = ((seconds / 10) << 4) | (seconds % 10); + uint8_t formattedMinutes = ((minutes / 10) << 4) | (minutes % 10); + uint8_t formattedHours = (1 << 6) | (pm_or_am << 5) | ((hours / 10) << 4) | (hours % 10); + twi_write(DS3231_ADDR, DS3231_HOURS, formattedHours); + twi_write(DS3231_ADDR, DS3231_MINUTES, formattedMinutes); + twi_write(DS3231_ADDR, DS3231_SECONDS, formattedSeconds); +} + +void ds3231_get_time(sw_time* time) +{ + twi_read(DS3231_ADDR, DS3231_SECONDS, 3, rtc_buffer); + uint8_t hours = rtc_buffer[2]; + uint8_t minutes = rtc_buffer[1]; + uint8_t seconds = rtc_buffer[0]; + time->hour = (((hours & ~0b11101111) >> 4) * 10) + (hours & ~0b11110000); + time->minute = (((minutes & ~0b00001111) >> 4) * 10) + (minutes & ~0b11110000); + time->second = (((seconds & ~0b00001111) >> 4) * 10) + (seconds & ~0b11110000); + //pm is high, am is low + time->pm_or_am = (hours & (1 << 5)) ? 1 : 0; +} + +_Bool ds3231_is_ready(void) +{ + return ds3231_status; +} + +ISR(PORTD_INT1_vect) +{ + ds3231_set_ready(); +} \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/ds3231.h b/skywave_atxmega128a1_final/src/devices/ds3231.h new file mode 100644 index 0000000..2076c11 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/ds3231.h @@ -0,0 +1,31 @@ +/* + * ds3231.h + * + * Created: 5/9/2018 6:40:17 AM + * Author: Penguin + */ +#include "skywave.h" +#ifndef _DS3231_H_ +#define _DS3231_H_ + +typedef struct +{ + uint8_t hour; + uint8_t minute; + uint8_t second; + uint8_t pm_or_am; //high is pm, low is am +}sw_time; + + +void ds3231_init(void); + +void ds3231_set_ready(void); + +_Bool ds3231_is_ready(void); + +void ds3231_clear_ready(void); + +void ds3231_set_time(uint8_t hours, uint8_t minutes, uint8_t seconds); + +void ds3231_get_time(sw_time* time); +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/gps.c b/skywave_atxmega128a1_final/src/devices/gps.c new file mode 100644 index 0000000..618d5c2 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/gps.c @@ -0,0 +1,86 @@ +/* + * gps.c + * + * Created: 5/28/2018 5:08:24 AM + * Author: Penguin + */ +#include "drivers/usart_comms.h" +#include "devices/gps.h" +#include "drivers/skywave_util.h" + +#define GPS_SIZE_CHAR_BUFF 1024 +#define GPS_SIZE_GPS_BUFF 10 + +volatile char gps_response_temp; +char gps_buff[GPS_SIZE_CHAR_BUFF]; +static gpsData gps_data_buff[GPS_SIZE_GPS_BUFF] = {}; +gpsCircBuff gps_circ_buff; +charCircBuff char_circ_buff; +void gps_init(void) +{ + int16_t z = (int16_t)ascii_to_decimal_int((const char*)("-7826")); + swprintf(SWDEBUG, "%d\n", z); + for(uint8_t x = 0; x < 10; x++) + { + gps_data_init(&(gps_data_buff[x])); + } + gcb_init(&gps_circ_buff, gps_data_buff, GPS_SIZE_GPS_BUFF); + ccb_init(&char_circ_buff, gps_buff, GPS_SIZE_CHAR_BUFF); + + gps_uart_conf.baudrate = 9600; + gps_uart_conf.stopbits = true; + gps_uart_conf.paritytype = USART_PMODE_DISABLED_gc; + gps_uart_conf.charlength = USART_CHSIZE_8BIT_gc; + usart_init_rs232(USART_GPS, &gps_uart_conf); + //may seem redundant but, well yeah + swprintf(USART_GPS, PMTK_SET_BAUD_9600); + swprintf(USART_GPS, PGCMD_NOANTENNA); + swprintf(USART_GPS, PMTK_SET_NMEA_OUTPUT_RMCONLY); + swprintf(USART_GPS, PMTK_API_SET_FIX_CTL_10HZ); + swprintf(USART_GPS, PMTK_SET_NMEA_UPDATE_2HZ); + + usart_set_rx_interrupt_level(USART_GPS, USART_INT_LVL_MED); +} + +//lines must end in \r\n +void parseLineToChunkedPacket(const char* txt, char split, gpsData* data) +{ + +} + +void parseLine(const char* txt, char split) +{ + +} + +void ccb_init(charCircBuff* ccb, char* buff, uint16_t size) +{ + +} + +void ccb_append(charCircBuff* ccb, char val) +{ + +} + +void gcb_init(gpsCircBuff* gcb, gpsData* buff, uint8_t size) +{ + +} + +void gcb_append(gpsCircBuff* gcb, gpsData* data) +{ + +} + +void gps_data_init(gpsData* gps_data) +{ + gps_data->b_parsed = false; + gps_data->gps_str[0] = '\0'; + gps_data->pkt_type = GPS_VACANT; +} + +ISR(USARTC1_RXC_vect) +{ + gps_response_temp = usart_getchar(USART_GPS); +} \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/gps.h b/skywave_atxmega128a1_final/src/devices/gps.h new file mode 100644 index 0000000..6150746 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/gps.h @@ -0,0 +1,138 @@ +/* + * gps.h + * + * Created: 5/28/2018 5:08:06 AM + * Author: Penguin + */ +#include "skywave.h" +#include "register_map.h" + +//EXPAND FOR NMEA DOCUMENTATION +#ifndef GPS_DATA_INFO +#define GPS_DATA_INFO +//GPS Information Source: http://aprs.gids.nl/nmea/ + +//Global Positioning System Fix Data +//$GPGGA +//1. UTC of Position, aka Time +//2. Latitude +//3. North or South +//4. Longitude +//5. East or West +//6. GPS Quality Indicator: (0 = invalid, 1 = GPS Fix, 2 = Dif. GPS Fix) +//7. Number of GPS satellites in use +//8. Horizontal dilution of position (relative accuracy of horizontal position) +//9. Altitude above/below mean sea level +//10. Meters (This is simply the units of the measurement given in #9) +//11. Geoidal separation (Diff. between WGS-84 earth ellipsoid and mean sea level. -=geoid is below WGS-84 ellipsoid) --- Thinking this just means difference in mean sea level and current altitude? +//12. Meters (Units for #11) +//13. Age in seconds since last update from diff. reference station +//14. Diff. Reference station ID# +//15. Checksum +// +// < Time, Latitude, N/S, Longitude, E/W, GPS Quality, Num. Satellites, Rel. Accuracy, Alt., Units, Alt Diff., Units, DeltaT, Station ID, Checksum> +//Format: + + +//Recommended minimum specific GPS/Transit data +//$GPRMC +//1. UTC of position fix, aka time +//2. Data Status (V = navigation receiver warning) +//3. Latitude of fix +//4. N or S +//5. Longitude of fix +//6. E or W +//7. Speed over grount in knots +//8. Track made good in degrees true ?? +//9. UT date +//10. Magnetic variation degrees +//11. E or W +//12. Checksum + +//Format: <194530.000,A,3051.8007,N,10035.9989,W,1.49,111.67,310714,,,A*74 +#endif + + +#ifndef _GPS_H_ +#define _GPS_H_ + +#define GPS_PKT_ID 0 + +void gps_init(void); + +typedef enum +{ + GPS_GPGGA = 0, + GPS_GPRMC = 1, + GPS_VACANT = 2 +}GPS_PKT_TYPE; + +typedef enum +{ + GPS_GPGGA_TIME = 1, + GPS_GPGGA_LAT = 2, + GPS_GPGGA_LAT_DIR = 3, //N/S + GPS_GPGGA_LONG = 4, + GPS_GPGGA_LONG_DIR = 5, //E/W + GPS_GPGGA_QUALITY = 6, + GPS_GPGGA_NUM_SATS = 7, + GPS_GPGGA_REL_ACCURACY = 8, + GPS_GPGGA_ALT = 9, + GPS_GPGGA_ALT_UNITS = 10, + GPS_GPGGA_GEO_SEP = 11, + GPS_GPGGA_GEO_SEP_UNITS = 12, + GPS_GPGGA_DELTA_TIME = 13, + GPS_GPGGA_STATION_ID = 14, + GPS_GPGGA_CHECKSUM = 15 +}GPS_GPGGA_STRUCTURE; + +typedef enum +{ + GPS_GPRMC_TIME = 1, + GPS_GPRMC_DATA_STATUS = 2, + GPS_GPRMC_LAT = 3, + GPS_GPRMC_LAT_DIR = 4, + GPS_GPRMC_LONG = 5, + GPS_GPRMC_LONG_DIR = 6, + GPS_GPRMC_SPEED = 7, + GPS_GPRMC_TRACK_GOOD_DEG = 8, //I have no idea what this part of the NMEA sentence means + GPS_GPRMC_DATE = 9, + GPS_GPRMC_MAG_VARIATION = 10, + GPS_GPRMC_MAG_VAR_DIR = 11, + GPS_GPRMC_CHECKSUM = 12 +}GPS_GPRMC_STRUCTURE; + +typedef struct +{ + char* gps_str; + + _Bool b_parsed; + GPS_PKT_TYPE pkt_type; +}gpsData; + +typedef struct +{ + gpsData* dataBuff; + uint8_t current; + uint8_t bufsize; + uint8_t sizeActive; +}gpsCircBuff; + +typedef struct +{ + char* buff; + uint8_t current; + uint8_t bufsize; + uint8_t sizeActive; +}charCircBuff; + +void parseLine(const char* txt, char split); +void gps_init(void); +void ccb_init(charCircBuff* ccb, char* buff, uint16_t size); +void ccb_append(charCircBuff* ccb, char val); + +void gcb_init(gpsCircBuff* gcb, gpsData* buff, uint8_t size); +void gcb_append(gpsCircBuff* gcb, gpsData* data); + +void gps_data_init(gpsData* gps_data); +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/mpl3115a2.c b/skywave_atxmega128a1_final/src/devices/mpl3115a2.c new file mode 100644 index 0000000..84ba51f --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/mpl3115a2.c @@ -0,0 +1,203 @@ +/* + * mpl3115a2.c + * + * Created: 5/10/2018 8:38:27 AM + * Author: Penguin + */ +#include "devices/mpl3115a2.h" +#include "drivers/skywave_util.h" +#include + +#define MPL3_GROUNDALT_SMPLCT 128 +//i2c buffer +static uint8_t mpl3_buffer[128]; + +//data struct to hold ground altitude +static mpl3_Data groundAlt_Data; + +//two circular buffers for moving averages +static circ_buffer_float mpl3_cb_temp; +static circ_buffer_float mpl3_cb_alt; + +//buffers to put in the circular buffers +static float mpl3_cb_temp_buff[8]; +static float mpl3_cb_alt_buff[8]; + +//Functions for processing data +static float get_altitude(uint8_t p_msb, uint8_t p_csb, uint8_t p_lsb); +static float get_pressure(uint8_t p_msb, uint8_t p_csb, uint8_t p_lsb); +static float get_temperature(uint8_t t_msb, uint8_t t_lsb); +//misc +static _Bool b_mpl3fired; +static _Bool bInitialAltitudeSet_MPL3; + +void mpl3_init() +{ + init_circ_buffer_float(&mpl3_cb_alt, mpl3_cb_alt_buff, 8); + init_circ_buffer_float(&mpl3_cb_temp, mpl3_cb_temp_buff, 8); + b_mpl3fired = false; + bInitialAltitudeSet_MPL3 = false; + //reset sensor + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL1, 0x04); + + uint8_t read_val = 1; + //wait for sensor to boot back up + while (read_val) + { + twi_read(MPL3_SLAVE_ADDR, MPL3_CTRL1, 1, mpl3_buffer); + read_val = mpl3_buffer[0] & 0x04; + } + //config + twi_write(MPL3_SLAVE_ADDR, MPL3_PT_DATA_CFG, 0x07); //Enable Data Interrupt Flags for Temp and Pressure + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL3, 0b00100000); //active high push/pull int 1 + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL4, 0x80); //enable data ready interrupt + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL5, 0x80); //move to int 1 + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL1, 0b10011000); //set to standby mode + delay_ms(100); + //enable interrupts for normal operation + PORTD.PIN2CTRL = PORT_OPC_WIREDORPULL_gc | PORT_ISC_RISING_gc; + PORTD.INT0MASK = (1<<2); + PORTD.INTCTRL |= PORT_INT0LVL_HI_gc; +} + +float get_temperature(uint8_t t_msb, uint8_t t_lsb) +{ + float temp_lsb = (float)(t_lsb>>4)/16.0; + return ((float)t_msb)+temp_lsb; +} + +_Bool calc_mpl3_data(void) +{ + mpl3_clear_data_flag(); + twi_read(MPL3_SLAVE_ADDR, MPL3_STATUS, 6, mpl3_buffer); + uint8_t status = mpl3_buffer[0]; + if(status & 0x08) + { + uint8_t p_msb = mpl3_buffer[1]; + uint8_t p_csb = mpl3_buffer[2]; + uint8_t p_lsb = mpl3_buffer[3]; + uint8_t t_msb = mpl3_buffer[4]; + uint8_t t_lsb = mpl3_buffer[5]; + twi_read(MPL3_SLAVE_ADDR, MPL3_CTRL1, 1, mpl3_buffer); + uint8_t singleRead = mpl3_buffer[0]; + float tempValue = 0.0; + if(singleRead & 0x80) + { + tempValue = get_altitude(p_msb, p_csb, p_lsb); + } + else + { + tempValue = get_pressure(p_msb, p_csb, p_lsb); + } + + float newTemp = get_temperature(t_msb, t_lsb); + //make sure we didn't mess up somewhere + if((isnan(tempValue) || tempValue == 0) || (isnan(newTemp) || newTemp == 0) ) + { + return false; + } + + if(mpl3_checkbInitialAltitudeSet()) + { + cb_append_float(&mpl3_cb_temp, newTemp); + cb_append_float(&mpl3_cb_alt, tempValue); + } + else + { + groundAlt_Data.pressure += tempValue; + groundAlt_Data.temp += newTemp; + groundAlt_Data.samplect++; + if(groundAlt_Data.samplect >= MPL3_GROUNDALT_SMPLCT) + { + mpl3_setInitialAltitude(&groundAlt_Data); + } + } + + return true; + + } + return false; +} + +void get_mpl3_data(mpl3_Data* mpl3Data, _Bool bShouldResetData) +{ + if(mpl3_checkbInitialAltitudeSet()) + { + mpl3Data->temp = cb_getAvg_float(&mpl3_cb_temp); + mpl3Data->pressure = (cb_getAvg_float(&mpl3_cb_alt) - groundAlt_Data.pressure); + } + else + { + mpl3Data->pressure = 0.0f; + mpl3Data->temp = 0.0f; + } +} + +void mpl3_clear_data_flag(void) +{ + b_mpl3fired = false; +} + +void mpl3_set_data_flag(void) +{ + b_mpl3fired = true; +} + +_Bool mpl3_get_data_status(void) +{ + return b_mpl3fired; +} + +void mpl3_single_read(mpl3_read_mode read_mode) +{ + if(read_mode == MPL3_MODE_ALT) + { + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL1, MPL3_SINGLE_READ_ALTITUDE); + } + else + { + twi_write(MPL3_SLAVE_ADDR, MPL3_CTRL1, MPL3_SINGLE_READ_PRESSURE); + } +} + +float get_altitude(uint8_t p_msb, uint8_t p_csb, uint8_t p_lsb) +{ + float tempRead = ((float)((short)(p_msb << 8) | p_csb) + (float)(p_lsb >> 4) * 0.0625); + return tempRead; +} + +float get_pressure(uint8_t p_msb, uint8_t p_csb, uint8_t p_lsb) +{ + //temp here means temporary--not temperature + long tempPressure = (long)p_msb << 16 | (long)p_csb << 8 | (long)p_lsb; + tempPressure >>= 6; + uint8_t tempPresDecimal = p_lsb & 0b00110000; + tempPresDecimal >>= 4; + float pressureDecimal = (float)tempPresDecimal/4.0; + return (float)tempPressure + pressureDecimal; +} + +float get_altitude_now(void) +{ + return 0.0f; +} + +void mpl3_setInitialAltitude(mpl3_Data* groundAlt) +{ + groundAlt_Data.pressure /= groundAlt_Data.samplect; + groundAlt_Data.temp /= groundAlt_Data.samplect; + groundAlt_Data.samplect = 1; + bInitialAltitudeSet_MPL3 = true; + set_ntcle_off(groundAlt_Data.temp); + swprintf(SWDEBUG, "GROUND ALT: %-2.2f\n", groundAlt_Data.pressure); +} + +_Bool mpl3_checkbInitialAltitudeSet(void) +{ + return bInitialAltitudeSet_MPL3; +} + +ISR(PORTD_INT0_vect) +{ + mpl3_set_data_flag(); +} \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/mpl3115a2.h b/skywave_atxmega128a1_final/src/devices/mpl3115a2.h new file mode 100644 index 0000000..5af86d5 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/mpl3115a2.h @@ -0,0 +1,47 @@ +/* + * mpl3115a2.h + * + * Created: 5/10/2018 8:37:55 AM + * Author: Penguin + */ +#include "skywave.h" +#include "drivers/twi_comms.h" +#ifndef _MPL3115A2_H_ +#define _MPL3115A2_H_ + +typedef enum +{ + MPL3_MODE_ALT, + MPL3_MODE_PRES +}mpl3_read_mode; + + +typedef struct +{ + uint8_t status; + float pressure; + float temp; + int samplect; +}mpl3_Data; + +void mpl3_init(void); + +//main data return function +_Bool calc_mpl3_data(void); + +void get_mpl3_data(mpl3_Data* mpl3Data, _Bool bShouldResetData); + +//interrupt handling functions +void mpl3_clear_data_flag(void); +void mpl3_set_data_flag(void); +_Bool mpl3_get_data_status(void); + +//read data from sensor once +void mpl3_single_read(mpl3_read_mode read_mode); + +//Urgent Read for misc purposes +float get_altitude_now(void); +void mpl3_setInitialAltitude(mpl3_Data* groundAlt); + +_Bool mpl3_checkbInitialAltitudeSet(void); +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/mpu9250.c b/skywave_atxmega128a1_final/src/devices/mpu9250.c new file mode 100644 index 0000000..6f75b8b --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/mpu9250.c @@ -0,0 +1,294 @@ +/* + * mpu9250.c + * + * Created: 5/7/2018 4:35:56 AM + * Author: Penguin + */ + +//LATEST +#include "devices/mpu9250.h" +#include "drivers/twi_comms.h" +#include "drivers/MahonyAHRS.h" +#include + +#define MPU_GYRO_SCALE GYRO_2000DPS +#define MPU_ACCEL_SCALE ACCEL_16G +#define MPU_MAG_SCALE MAG_16BITS +#define MPU_ADDR MPU_ADDR_HIGH +#define MAG_CALIBRATION_SAMPLES 1500 +#define MPU_SAMPLE_RATE 100 + +static _Bool b_mpu_data_ready; +static _Bool b_mag_calibrate; + +volatile float accel_resolution; +volatile float gyro_resolution; +volatile float mag_resolution; + +static uint8_t mpu_buffer[64]; + +static vector3D_float mag_sens; +int16_t gyro_sens = 131; +int16_t accel_sens = 16384; + +volatile mpuData_int mpu_raw_data; +volatile mpuData_float mpu_processed_data; +volatile OrientationData rot; + +static circ_buffer_float cb_accel_x; +static float accel_buff_x[10]; + +static circ_buffer_float cb_accel_y; +static float accel_buff_y[10]; + +static circ_buffer_float cb_accel_z; +static float accel_buff_z[10]; + +static circ_buffer_double cb_yaw; +static double yaw_buff[10]; + +static circ_buffer_double cb_pitch; +static double pitch_buff[10]; + +static circ_buffer_double cb_roll; +static double roll_buff[10]; + + + +void mpu_init(void) +{ + b_mag_calibrate = false; + init_circ_buffer_double(&cb_yaw, yaw_buff, 10); + init_circ_buffer_double(&cb_pitch, pitch_buff, 10); + init_circ_buffer_double(&cb_roll, roll_buff, 10); + + init_circ_buffer_float(&cb_accel_x, accel_buff_x, 10); + init_circ_buffer_float(&cb_accel_y, accel_buff_y, 10); + init_circ_buffer_float(&cb_accel_z, accel_buff_z, 10); + + //reset imu + twi_write(MPU_ADDR, PWR_MGMT_1, 0x80); + delay_ms(100); + twi_write(MPU_ADDR, PWR_MGMT_1, 0x01); + twi_write(MPU_ADDR, PWR_MGMT_2, 0x00); + + delay_ms(100); + //clock source config + //enable gyro + accel + //gyro init + twi_write(MPU_ADDR, MPU_CONFIG, 0x02); //gyro low pass filter config + set_gyro_resolution(GYRO_2000DPS); + //accel config + set_accel_resolution(ACCEL_16G); + twi_write(MPU_ADDR, ACCEL_CONFIG2, 0x02); //accel low pass filter config + //sample rate config + mpu_set_sample_rate(MPU_SAMPLE_RATE); + //mpu int config + twi_write(MPU_ADDR, INT_PIN_CFG, 0x22); + twi_write(MPU_ADDR, INT_ENABLE, 0x01); + //not using mag + //mpu_mag_wai(); + //mag init + //mag_init(); + //int pin config on mcu + PORTA.PIN2CTRL = PORT_OPC_PULLDOWN_gc | PORT_ISC_RISING_gc; + PORTA.INT0MASK = PIN2_bm; + PORTA.INTCTRL = PORT_INT0LVL_HI_gc; +} + +void mag_init(void) +{ + set_mag_resolution(MPU_MAG_SCALE); + twi_write(AK8963_ADDRESS, AK8963_CNTL, 0x00); + delay_ms(10); + twi_write(AK8963_ADDRESS, AK8963_CNTL, 0x0F); + delay_ms(10); + twi_read(AK8963_ADDRESS, AK8963_ASAX, 3, mpu_buffer); + mag_sens.x = (float)((float)mpu_buffer[0] - 128)/256.f + 1.f; + mag_sens.y = (float)((float)mpu_buffer[1] - 128)/256.f + 1.f; + mag_sens.z = (float)((float)mpu_buffer[2] - 128)/256.f + 1.f; + twi_write(AK8963_ADDRESS, AK8963_CNTL, 0x00); + delay_ms(10); + twi_write(AK8963_ADDRESS, AK8963_CNTL, (MPU_MAG_SCALE << 4) | 0x06); + delay_ms(10); +} + +void set_mpu_data_status(_Bool status) +{ + b_mpu_data_ready = status; +} + +_Bool mpu_data_ready(void) +{ + return b_mpu_data_ready; +} + +void mpu_set_sample_rate(uint8_t smplrt) +{ + uint8_t temp = ((uint8_t)((1000/((uint16_t)smplrt)) - 1)); + twi_write(MPU_ADDR, SMPLRT_DIV, temp); +} + +void mpu_read(void) +{ + twi_read(MPU_ADDR, INT_STATUS, 15, mpu_buffer); + if(mpu_buffer[0] & 0x01) + { + mpu_raw_data.accel.x = (((int16_t)mpu_buffer[1] << 8) | mpu_buffer[2]); + mpu_raw_data.accel.y = (((int16_t)mpu_buffer[3] << 8) | mpu_buffer[4]); + mpu_raw_data.accel.z = (((int16_t)mpu_buffer[5] << 8) | mpu_buffer[6]); + + mpu_raw_data.gyro.x = (((int16_t)mpu_buffer[9] << 8) | mpu_buffer[10]); + mpu_raw_data.gyro.y = (((int16_t)mpu_buffer[11] << 8) | mpu_buffer[12]); + mpu_raw_data.gyro.z = (((int16_t)mpu_buffer[13] << 8) | mpu_buffer[14]); + + //not using mag because it only provides one value then stops updating + //twi_read(AK8963_ADDRESS, AK8963_XOUT_L, 6, mpu_buffer); + //mpu_raw_data.mag.x = ((int16_t)mpu_buffer[1] << 8 | mpu_buffer[0]); + //mpu_raw_data.mag.y = ((int16_t)mpu_buffer[3] << 8 | mpu_buffer[2]); + //mpu_raw_data.mag.z = ((int16_t)mpu_buffer[5] << 8 | mpu_buffer[4]); + + mpu_processed_data.accel.x = (float)(((float)mpu_raw_data.accel.x)*accel_resolution); + mpu_processed_data.accel.y = (float)(((float)mpu_raw_data.accel.y)*accel_resolution); + mpu_processed_data.accel.z = (float)(((float)mpu_raw_data.accel.z)*accel_resolution);; + + mpu_processed_data.gyro.x = (float)(((float)mpu_raw_data.gyro.x)*gyro_resolution); + mpu_processed_data.gyro.y = (float)(((float)mpu_raw_data.gyro.y)*gyro_resolution); + mpu_processed_data.gyro.z = (float)(((float)mpu_raw_data.gyro.z)*gyro_resolution); + + //not using mag because it only provides one value then stops updating + mpu_processed_data.mag.x = 0.0; //(float)(((float)mpu_raw_data.mag.x)*mag_sens.x); + mpu_processed_data.mag.y = 0.0; //(float)(((float)mpu_raw_data.mag.y)*mag_sens.y); + mpu_processed_data.mag.z = 0.0; //(float)(((float)mpu_raw_data.mag.z)*mag_sens.z); + swprintf(SWDEBUG, "%-2.2f\t%-2.2f\t%-2.2f\n", mpu_processed_data.accel.x, mpu_processed_data.accel.y, mpu_processed_data.accel.z); + cb_append_float(&cb_accel_x, mpu_processed_data.accel.x); + cb_append_float(&cb_accel_y, mpu_processed_data.accel.y); + cb_append_float(&cb_accel_z, mpu_processed_data.accel.z); + + mpu_filter_data((const mpuData_float*)(&mpu_processed_data)); + twi_read(MPU_ADDR, INT_STATUS, 1, mpu_buffer); + } +} + +void mpu_get_accel_data(vector3D_float* data) +{ + data->x = cb_getAvg_float(&cb_accel_x); + data->y = cb_getAvg_float(&cb_accel_y); + data->z = cb_getAvg_float(&cb_accel_z); +} + +void mpu_get_rot_data(OrientationData* data) +{ + data->yaw = cb_getAvg_double(&cb_yaw); + data->pitch = cb_getAvg_double(&cb_pitch); + data->roll = cb_getAvg_double(&cb_roll); +} + +void mpu_filter_data(const mpuData_float* data) +{ + //God bless Thomas AND God bless the United States of America + MahonyAHRSupdate((double)data->gyro.x, + (double)data->gyro.y, + (double)data->gyro.z, + (double)data->accel.x, + (double)data->accel.y, + (double)data->accel.z, + (double)data->mag.x, + (double)data->mag.y, + (double)-data->mag.z); + rot.yaw = atan2(2.0 * (q1 * q2 + q0 * q3), q0 * q0 + q1 * q1 - q2 * q2 - q3 * q3); + rot.pitch = -asin(2.0 * (q1 * q3 - q0 * q2)); + rot.roll = atan2(2.0 * (q0 * q1 + q2 * q3), q0 * q0 - q1 * q1 - q2 * q2 + q3 * q3); + rot.pitch *= 180.0 / PI; + rot.yaw *= 180.0 / PI; + rot.roll *= 180.0 / PI; + cb_append_double(&cb_yaw, rot.yaw); + cb_append_double(&cb_pitch, rot.pitch); + cb_append_double(&cb_roll, rot.roll); + +} + +void mpu_wai(void) +{ + twi_read(MPU_ADDR, WHO_AM_I_MPU9250, 1, mpu_buffer); + if(mpu_buffer[0] == 0x71) + { + swprintf(SWDEBUG, "MPU INITIALIZED\n"); + } +} + +void mpu_mag_wai(void) +{ + twi_read(AK8963_ADDRESS, AK8963_WHO_AM_I, 1, mpu_buffer); + if(mpu_buffer[0] == 0x48) + { + swprintf(SWDEBUG, "MAG FOUND\n"); + } +} + +void mpu_mag_hard_calibrate(const vector3D_int* magData) +{ + // +} + +void set_accel_resolution(accelScale scale) +{ + switch(scale) + { + case ACCEL_2G: + accel_resolution = (float)(2.0/32768.0); + break; + case ACCEL_4G: + accel_resolution = (float)(4.0/32768.0); + break; + case ACCEL_8G: + accel_resolution = (float)(8.0/32768.0); + break; + case ACCEL_16G: + accel_resolution = (float)(16.0/32768.0); + break; + default: + break; + }; + twi_write(MPU_ADDR, ACCEL_CONFIG, (MPU_ACCEL_SCALE << 3)); +} + +void set_mag_resolution(magScale scale) +{ + switch(scale) + { + case MAG_14BITS: + mag_resolution = (float)(10.f * 4912.f / 8190.f); + break; + case MAG_16BITS: + mag_resolution = (float)(10.f * 4912.f / 32760.f); + break; + } +} + +void set_gyro_resolution(gyroScale scale) +{ + switch(scale) + { + case GYRO_250DPS: + gyro_resolution = (float)(250.0/32760.0); + break; + case GYRO_500DPS: + gyro_resolution = (float)(500.0/32760.0); + break; + case GYRO_1000DPS: + gyro_resolution = (float)(1000.0/32760.0); + break; + case GYRO_2000DPS: + gyro_resolution = (float)(2000.0/32768.0); + break; + default: + break; + } + twi_write(MPU_ADDR, GYRO_CONFIG, (MPU_GYRO_SCALE << 3)); +} + +ISR(PORTA_INT0_vect) +{ + set_mpu_data_status(true); +} \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/mpu9250.h b/skywave_atxmega128a1_final/src/devices/mpu9250.h new file mode 100644 index 0000000..4f4b749 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/mpu9250.h @@ -0,0 +1,80 @@ +/* + * mpu9250.h + * + * Created: 5/7/2018 4:35:48 AM + * Author: Penguin + */ +#include "skywave.h" +#include "register_map.h" +#include "drivers/skywave_util.h" +#ifndef _MPU9250_H_ +#define _MPU9250_H_ + + +typedef enum +{ + GYRO_250DPS = 0, + GYRO_500DPS = 1, + GYRO_1000DPS = 2, + GYRO_2000DPS = 3 +}gyroScale; + +typedef enum +{ + ACCEL_2G = 0, + ACCEL_4G = 1, + ACCEL_8G = 2, + ACCEL_16G = 3 +}accelScale; + +typedef enum +{ + MAG_14BITS = 0, + MAG_16BITS = 1 +}magScale; + +typedef struct +{ + vector3D_int accel; + vector3D_int gyro; + vector3D_int mag; +}mpuData_int; + +typedef struct +{ + vector3D_float accel; + vector3D_float gyro; + vector3D_float mag; +}mpuData_float; + +typedef mpuData_float imuData; + +typedef struct +{ + double yaw; + double pitch; + double roll; +}OrientationData; + +_Bool mpu_data_ready(void); +void set_mpu_data_status(_Bool status); + +void mpu_set_sample_rate(uint8_t smplrt); +void mpu_read(void); +void mpu_get_accel_data(vector3D_float* data); +void mpu_get_rot_data(OrientationData* data); +void mpu_filter_data(const mpuData_float* data); + +void mpu_wai(void); +void mpu_init(void); + +void mag_init(void); +void mpu_mag_wai(void); +void mpu_mag_hard_calibrate(const vector3D_int* magData); +void mpu_mag_cal(void); + +void set_gyro_resolution(gyroScale scale); +void set_accel_resolution(accelScale scale); +void set_mag_resolution(magScale scale); + +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/ntcle100.c b/skywave_atxmega128a1_final/src/devices/ntcle100.c new file mode 100644 index 0000000..31d85bc --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/ntcle100.c @@ -0,0 +1,101 @@ +/* + * ntcle100.c + * + * Created: 5/10/2018 9:32:55 AM + * Author: Penguin + */ + +#include "devices/ntcle100.h" +#include "drivers/adc_util.h" +#include + +#define RESISTOR_ONE 13000 +#define NTCLE100_OVERSAMPLE_AMOUNT 4 + +static ntcle100_Data ntcle100_data; +//should be measured in every change in testing environment +static const float v_in = 3.3; + +void start_ntcle_read(void) +{ + ADCA.CH0.CTRL |= 0b10000000; +} + +void ntcle100_init(void) +{ + temp_off = 0; + //enable adc channel 0 + ADCA.CH0.CTRL = 0b00000001; + //pin 0 for ch0 + ADCA.CH0.MUXCTRL = 0b00000000; + swprintf(SWDEBUG, "Test temp: %-2.2f\n", get_ntcle_temp_now()); +} + +uint16_t get_adc_reading(void) +{ + start_ntcle_read(); + while(ADCA.CH0.INTFLAGS == 0); + uint16_t reading = ADCA.CH0.RES; + ADCA.INTFLAGS = 0; + return reading; +} + +float get_voltage(uint16_t adc_reading) +{ + float voltage = (adc_reading * (v_in / 1.6)) / 4096.0; + return voltage; +} + +uint32_t get_resistance(float voltage) +{ + float voltage_drop = v_in - voltage; + uint32_t resistance = (voltage * RESISTOR_ONE) / voltage_drop; + return resistance; +} + +float calc_temp(uint32_t resistance, _Bool bShouldReturnInCelsius) +{ + double var_a = 0.003354016; + double var_b = 0.0002569850 * log(resistance/10000.0); + double var_c = 0.000002620131 * (2 * (log(resistance/10000.0))); + double var_d = 0.00000006383091 * (3 * (log(resistance/10000.0))); + float temp_in_kelvin = (float)(1/(var_a + var_b + var_c + var_d)); + return bShouldReturnInCelsius ? (temp_in_kelvin - 273.15) : temp_in_kelvin; +} + +void get_ntcle_temp(void) +{ + ntcle100_data.temp += (get_oversampled_ntcle_temp(NTCLE100_OVERSAMPLE_AMOUNT) - temp_off); + ntcle100_data.samplect++; +} + +void get_ntcle_data(ntcle100_Data* ntcle100Data, _Bool bShouldResetData) +{ + ntcle100Data->temp = ntcle100_data.temp / ntcle100_data.samplect; + if(bShouldResetData) + { + reset_ntcle_data(); + } +} + +void reset_ntcle_data(void) +{ + ntcle100_data.temp = 0.0; + ntcle100_data.samplect = 0; +} + +float get_ntcle_temp_now(void) +{ + return (get_oversampled_ntcle_temp(NTCLE100_OVERSAMPLE_AMOUNT) - temp_off); +} + +float get_oversampled_ntcle_temp(int sample_amt) +{ + float sum = 0; + for(int x = 0; x < sample_amt; x++) + { + float temp = calc_temp(get_resistance(get_voltage(get_adc_reading())), true); + sum += temp; + } + return sum/(float)sample_amt; +} \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/devices/ntcle100.h b/skywave_atxmega128a1_final/src/devices/ntcle100.h new file mode 100644 index 0000000..aa51239 --- /dev/null +++ b/skywave_atxmega128a1_final/src/devices/ntcle100.h @@ -0,0 +1,41 @@ +/* + * ntcle100.h + * + * Created: 5/10/2018 9:32:40 AM + * Author: Penguin + */ + +#include "skywave.h" + +#ifndef _NTCLE100_H_ +#define _NTCLE100_H_ + +typedef struct +{ + float temp; + int samplect; +}ntcle100_Data; + +void ntcle100_init(void); + +uint16_t get_adc_reading(void); + +float get_voltage(uint16_t adc_reading); + +uint32_t get_resistance(float voltage); + +float calc_temp(uint32_t resistance, _Bool bShouldReturnInCelsius); +float temp_off; +void get_ntcle_temp(void); + +void get_ntcle_data(ntcle100_Data* ntcle100Data, _Bool bShouldResetData); + +void reset_ntcle_data(void); + +float get_oversampled_ntcle_temp(int sample_amt); + +float get_ntcle_temp_now(void); + +void start_ntcle_read(void); + +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/drivers/MahonyAHRS.c b/skywave_atxmega128a1_final/src/drivers/MahonyAHRS.c new file mode 100644 index 0000000..4aa2ee5 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/MahonyAHRS.c @@ -0,0 +1,233 @@ +//===================================================================================================== +// MahonyAHRS.c +//===================================================================================================== +// +// Madgwick's implementation of Mayhony's AHRS algorithm. +// See: http://www.x-io.co.uk/node/8#open_source_ahrs_and_imu_algorithms +// +// Date Author Notes +// 29/09/2011 SOH Madgwick Initial release +// 02/10/2011 SOH Madgwick Optimised for reduced CPU load +// +//===================================================================================================== + +//--------------------------------------------------------------------------------------------------- +// Header files + +#include "MahonyAHRS.h" +#include + +//--------------------------------------------------------------------------------------------------- +// Definitions + +#define sampleFreq 5800.0 // sample frequency in Hz +#define twoKpDef (2.0 * 200.0) // 2 * proportional gain +#define twoKiDef (2.0 * 0.0) // 2 * integral gain + +//--------------------------------------------------------------------------------------------------- +// Variable definitions + +volatile double twoKp = twoKpDef; // 2 * proportional gain (Kp) +volatile double twoKi = twoKiDef; // 2 * integral gain (Ki) +volatile double q0 = 1.0, q1 = 0.0, q2 = 0.0, q3 = 0.0; // quaternion of sensor frame relative to auxiliary frame +volatile double integralFBx = 0.0, integralFBy = 0.0, integralFBz = 0.0; // integral error terms scaled by Ki + +//--------------------------------------------------------------------------------------------------- +// Function declarations + +static double invSqrt(double x); + +//==================================================================================================== +// Functions + +//--------------------------------------------------------------------------------------------------- +// AHRS algorithm update + +void MahonyAHRSupdate(double gx, double gy, double gz, double ax, double ay, double az, double mx, double my, double mz) { + double recipNorm; + double q0q0, q0q1, q0q2, q0q3, q1q1, q1q2, q1q3, q2q2, q2q3, q3q3; + double hx, hy, bx, bz; + double halfvx, halfvy, halfvz, halfwx, halfwy, halfwz; + double halfex, halfey, halfez; + double qa, qb, qc; + //random comment + + // Use IMU algorithm if magnetometer measurement invalid (avoids NaN in magnetometer normalisation) + if((mx == 0.0) && (my == 0.0) && (mz == 0.0)) { + MahonyAHRSupdateIMU(gx, gy, gz, ax, ay, az); + return; + } + + // Compute feedback only if accelerometer measurement valid (avoids NaN in accelerometer normalisation) + if(!((ax == 0.0) && (ay == 0.0) && (az == 0.0))) { + + // Normalise accelerometer measurement + recipNorm = invSqrt(ax * ax + ay * ay + az * az); + ax *= recipNorm; + ay *= recipNorm; + az *= recipNorm; + + // Normalise magnetometer measurement + recipNorm = invSqrt(mx * mx + my * my + mz * mz); + mx *= recipNorm; + my *= recipNorm; + mz *= recipNorm; + + // Auxiliary variables to avoid repeated arithmetic + q0q0 = q0 * q0; + q0q1 = q0 * q1; + q0q2 = q0 * q2; + q0q3 = q0 * q3; + q1q1 = q1 * q1; + q1q2 = q1 * q2; + q1q3 = q1 * q3; + q2q2 = q2 * q2; + q2q3 = q2 * q3; + q3q3 = q3 * q3; + + // Reference direction of Earth's magnetic field + hx = 2.0 * (mx * (0.5 - q2q2 - q3q3) + my * (q1q2 - q0q3) + mz * (q1q3 + q0q2)); + hy = 2.0 * (mx * (q1q2 + q0q3) + my * (0.5 - q1q1 - q3q3) + mz * (q2q3 - q0q1)); + bx = sqrt(hx * hx + hy * hy); + bz = 2.0 * (mx * (q1q3 - q0q2) + my * (q2q3 + q0q1) + mz * (0.5 - q1q1 - q2q2)); + + // Estimated direction of gravity and magnetic field + halfvx = q1q3 - q0q2; + halfvy = q0q1 + q2q3; + halfvz = q0q0 - 0.5 + q3q3; + halfwx = bx * (0.5 - q2q2 - q3q3) + bz * (q1q3 - q0q2); + halfwy = bx * (q1q2 - q0q3) + bz * (q0q1 + q2q3); + halfwz = bx * (q0q2 + q1q3) + bz * (0.5 - q1q1 - q2q2); + + // Error is sum of cross product between estimated direction and measured direction of field vectors + halfex = (ay * halfvz - az * halfvy) + (my * halfwz - mz * halfwy); + halfey = (az * halfvx - ax * halfvz) + (mz * halfwx - mx * halfwz); + halfez = (ax * halfvy - ay * halfvx) + (mx * halfwy - my * halfwx); + + // Compute and apply integral feedback if enabled + if(twoKi > 0.0) { + integralFBx += twoKi * halfex * (1.0 / sampleFreq); // integral error scaled by Ki + integralFBy += twoKi * halfey * (1.0 / sampleFreq); + integralFBz += twoKi * halfez * (1.0 / sampleFreq); + gx += integralFBx; // apply integral feedback + gy += integralFBy; + gz += integralFBz; + } + else { + integralFBx = 0.0; // prevent integral windup + integralFBy = 0.0; + integralFBz = 0.0; + } + + // Apply proportional feedback + gx += twoKp * halfex; + gy += twoKp * halfey; + gz += twoKp * halfez; + } + + // Integrate rate of change of quaternion + gx *= (0.5 * (1.0 / sampleFreq)); // pre-multiply common factors + gy *= (0.5 * (1.0 / sampleFreq)); + gz *= (0.5 * (1.0 / sampleFreq)); + qa = q0; + qb = q1; + qc = q2; + q0 += (-qb * gx - qc * gy - q3 * gz); + q1 += (qa * gx + qc * gz - q3 * gy); + q2 += (qa * gy - qb * gz + q3 * gx); + q3 += (qa * gz + qb * gy - qc * gx); + + // Normalise quaternion + recipNorm = invSqrt(q0 * q0 + q1 * q1 + q2 * q2 + q3 * q3); + q0 *= recipNorm; + q1 *= recipNorm; + q2 *= recipNorm; + q3 *= recipNorm; +} + +//--------------------------------------------------------------------------------------------------- +// IMU algorithm update + +void MahonyAHRSupdateIMU(double gx, double gy, double gz, double ax, double ay, double az) { + double recipNorm; + double halfvx, halfvy, halfvz; + double halfex, halfey, halfez; + double qa, qb, qc; + + // Compute feedback only if accelerometer measurement valid (avoids NaN in accelerometer normalisation) + if(!((ax == 0.0) && (ay == 0.0) && (az == 0.0))) { + + // Normalise accelerometer measurement + recipNorm = invSqrt(ax * ax + ay * ay + az * az); + ax *= recipNorm; + ay *= recipNorm; + az *= recipNorm; + + // Estimated direction of gravity and vector perpendicular to magnetic flux + halfvx = q1 * q3 - q0 * q2; + halfvy = q0 * q1 + q2 * q3; + halfvz = q0 * q0 - 0.5 + q3 * q3; + + // Error is sum of cross product between estimated and measured direction of gravity + halfex = (ay * halfvz - az * halfvy); + halfey = (az * halfvx - ax * halfvz); + halfez = (ax * halfvy - ay * halfvx); + + // Compute and apply integral feedback if enabled + if(twoKi > 0.0) { + integralFBx += twoKi * halfex * (1.0 / sampleFreq); // integral error scaled by Ki + integralFBy += twoKi * halfey * (1.0 / sampleFreq); + integralFBz += twoKi * halfez * (1.0 / sampleFreq); + gx += integralFBx; // apply integral feedback + gy += integralFBy; + gz += integralFBz; + } + else { + integralFBx = 0.0; // prevent integral windup + integralFBy = 0.0; + integralFBz = 0.0; + } + + // Apply proportional feedback + gx += twoKp * halfex; + gy += twoKp * halfey; + gz += twoKp * halfez; + } + + // Integrate rate of change of quaternion + gx *= (0.5 * (1.0 / sampleFreq)); // pre-multiply common factors + gy *= (0.5 * (1.0 / sampleFreq)); + gz *= (0.5 * (1.0 / sampleFreq)); + qa = q0; + qb = q1; + qc = q2; + q0 += (-qb * gx - qc * gy - q3 * gz); + q1 += (qa * gx + qc * gz - q3 * gy); + q2 += (qa * gy - qb * gz + q3 * gx); + q3 += (qa * gz + qb * gy - qc * gx); + + // Normalise quaternion + recipNorm = invSqrt(q0 * q0 + q1 * q1 + q2 * q2 + q3 * q3); + q0 *= recipNorm; + q1 *= recipNorm; + q2 *= recipNorm; + q3 *= recipNorm; +} + +//--------------------------------------------------------------------------------------------------- +// Fast inverse square-root +// See: http://en.wikipedia.org/wiki/Fast_inverse_square_root + +double invSqrt(double x) { + double halfx = 0.5 * x; + double y = x; + long i = *(long*)&y; + i = 0x5f3759df - (i>>1); + y = *(double*)&i; + y = y * (1.5 - (halfx * y * y)); + return y; +} + +//==================================================================================================== +// END OF CODE +//==================================================================================================== diff --git a/skywave_atxmega128a1_final/src/drivers/MahonyAHRS.h b/skywave_atxmega128a1_final/src/drivers/MahonyAHRS.h new file mode 100644 index 0000000..ba9ccd0 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/MahonyAHRS.h @@ -0,0 +1,34 @@ +//===================================================================================================== +// MahonyAHRS.h +//===================================================================================================== +// +// Madgwick's implementation of Mayhony's AHRS algorithm. +// See: http://www.x-io.co.uk/node/8#open_source_ahrs_and_imu_algorithms +// +// Date Author Notes +// 29/09/2011 SOH Madgwick Initial release +// 02/10/2011 SOH Madgwick Optimised for reduced CPU load +// +//===================================================================================================== +#ifndef MahonyAHRS_h +#define MahonyAHRS_h + + +#define PI 3.14159 +//---------------------------------------------------------------------------------------------------- +// Variable declaration + +extern volatile double twoKp; // 2 * proportional gain (Kp) +extern volatile double twoKi; // 2 * integral gain (Ki) +extern volatile double q0, q1, q2, q3; // quaternion of sensor frame relative to auxiliary frame + +//--------------------------------------------------------------------------------------------------- +// Function declarations + +void MahonyAHRSupdate(double gx, double gy, double gz, double ax, double ay, double az, double mx, double my, double mz); +void MahonyAHRSupdateIMU(double gx, double gy, double gz, double ax, double ay, double az); + +#endif +//===================================================================================================== +// End of file +//===================================================================================================== diff --git a/skywave_atxmega128a1_final/src/drivers/adc_util.c b/skywave_atxmega128a1_final/src/drivers/adc_util.c new file mode 100644 index 0000000..4a27320 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/adc_util.c @@ -0,0 +1,28 @@ +/* + * adc_util.c + * + * Created: 5/10/2018 9:27:49 AM + * Author: Penguin + */ + +#include "drivers/adc_util.h" + +void adc_util_init(void) +{ + //enable adca + ADCA.CTRLA = 0b00000001; + //enable unsigned 12 bit res + ADCA.CTRLB = 0b00000000; + //[5:4] = 01 for Vcc/1.6 as ref voltage + ADCA.REFCTRL = 0b00010000; + + ADCA.PRESCALER = 0b00000101; + ADCA.CAL = adc_get_calibration_data(ADC_CAL_ADCA); + + ////enable adc 1 + //ADCA.CH1.CTRL = 0b00000001; +// + ////pin 1 for ch1 + //ADCA.CH1.MUXCTRL = 0b00001000; +} + diff --git a/skywave_atxmega128a1_final/src/drivers/adc_util.h b/skywave_atxmega128a1_final/src/drivers/adc_util.h new file mode 100644 index 0000000..b47b7ad --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/adc_util.h @@ -0,0 +1,14 @@ +/* + * adc_util.h + * + * Created: 5/10/2018 9:27:02 AM + * Author: Penguin + */ +#include "skywave.h" +#ifndef _ADC_UTIL_H_ +#define _ADC_UTIL_H_ + +void adc_util_init(void); + + +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/drivers/skywave_util.c b/skywave_atxmega128a1_final/src/drivers/skywave_util.c new file mode 100644 index 0000000..fb0133e --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/skywave_util.c @@ -0,0 +1,336 @@ +/* + * skywave_util.c + * + * Created: 5/11/2018 7:34:33 PM + * Author: Penguin + */ +#include "drivers/skywave_util.h" +#include "devices/ntcle100.h" +#include "devices/mpl3115a2.h" +#include +#include +#include +#include + +static struct pwm_config conf_32hz_timer; +static struct pwm_config conf_16hz_timer; +static _Bool timer_16hz_ready; +static _Bool timer_32hz_ready; +uint64_t milliseconds; + +void cb_append_int(circ_buffer_int* buf, int16_t data) +{ + //making the active slot 0 first should be completely unnecessary, but I've experienced overwriting data and it not erasing it all + buf->buffer[buf->active] = 0; + buf->buffer[buf->active] = data; + buf->active = (buf->active + 1) % buf->size_buffer; + buf->size_active++; +} + +void init_circ_buffer_int(circ_buffer_int* circ_buf, int16_t* databuffer, uint8_t size_buf) +{ + circ_buf->size_active = 0; + circ_buf->size_buffer = size_buf; + circ_buf->buffer = databuffer; +} + +int16_t cb_getAvg_int(circ_buffer_int* buf) +{ + int64_t bufTotal = 0; + uint8_t lowIndex = 0; + uint8_t highIndex = 0; + uint8_t temp_cnt = 0; + if(buf->size_active != 0) + { + if(buf->size_active == buf->size_buffer) + { + temp_cnt = 2; + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + if(buf->buffer[x] > buf->buffer[highIndex]) + { + highIndex = x; + } + else if(buf->buffer[x] < buf->buffer[lowIndex]) + { + lowIndex = x; + } + } + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + if((x != lowIndex) && (x != highIndex)) + { + bufTotal += (buf->buffer[x]); + } + } + } + else + { + temp_cnt = 0; + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + bufTotal += (buf->buffer[x]); + } + } + return (int16_t)(bufTotal / (buf->size_active - temp_cnt)); + } + return 0; +} + + +void cb_append_float(circ_buffer_float* buf, float data) +{ + buf->buffer[buf->active] = 0; + buf->buffer[buf->active] = data; + buf->active = (buf->active + 1) % buf->size_buffer; + if(buf->size_active < buf->size_buffer) + { + buf->size_active++; + } +} + +float cb_getAvg_float(circ_buffer_float* buf) +{ + double bufTotal = 0; + uint8_t lowIndex = 0; + uint8_t highIndex = 0; + uint8_t temp_cnt = 0; + if(buf->size_active != 0) + { + if(buf->size_active == buf->size_buffer) + { + temp_cnt = 2; + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + if(buf->buffer[x] > buf->buffer[highIndex]) + { + highIndex = x; + } + else if(buf->buffer[x] < buf->buffer[lowIndex]) + { + lowIndex = x; + } + } + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + if((x != lowIndex) && (x != highIndex)) + { + bufTotal += (double)(buf->buffer[x]); + } + } + } + else + { + temp_cnt = 0; + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + bufTotal += (double)(buf->buffer[x]); + } + } + return (float)(bufTotal / (buf->size_active - temp_cnt)); + } + return 0; +} + +void init_circ_buffer_float(circ_buffer_float* circ_buf, float* databuffer, uint8_t size_buf) +{ + circ_buf->size_active = 0; + circ_buf->size_buffer = size_buf; + circ_buf->buffer = databuffer; +} + +void cb_append_double(circ_buffer_double* buf, double data) +{ + buf->buffer[buf->active] = 0; + buf->buffer[buf->active] = data; + buf->active = (buf->active + 1) % buf->size_buffer; + if(buf->size_active < buf->size_buffer) + { + buf->size_active++; + } +} + +float cb_getAvg_double(circ_buffer_double* buf) +{ + double bufTotal = 0; + uint8_t lowIndex = 0; + uint8_t highIndex = 0; + uint8_t temp_cnt = 0; + if(buf->size_active != 0) + { + if(buf->size_active == buf->size_buffer) + { + temp_cnt = 2; + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + if(buf->buffer[x] > buf->buffer[highIndex]) + { + highIndex = x; + } + else if(buf->buffer[x] < buf->buffer[lowIndex]) + { + lowIndex = x; + } + } + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + if((x != lowIndex) && (x != highIndex)) + { + bufTotal += (buf->buffer[x]); + } + } + } + else + { + temp_cnt = 0; + for(uint8_t x = 0; x < buf->size_buffer; x++) + { + bufTotal += (double)(buf->buffer[x]); + } + } + return (bufTotal / (buf->size_active - temp_cnt)); + } + return 0; +} + +void init_circ_buffer_double(circ_buffer_double* circ_buf, double* databuffer, uint8_t size_buf) +{ + circ_buf->size_active = 0; + circ_buf->size_buffer = size_buf; + circ_buf->buffer = databuffer; +} + +void sw_32hz_timer_init() +{ + timer_32hz_ready = false; + pwm_init(&conf_32hz_timer, PWM_TCE0, PWM_CH_B, 32); + pwm_start(&conf_32hz_timer, 100); + + pwm_overflow_int_callback(&conf_32hz_timer, set_32hz_ready); +} + + +void set_32hz_read(void) +{ + mpl3_single_read(MPL3_MODE_ALT); + //get_ntcle_temp(); +} + +void set_32hz_ready(void) +{ + timer_32hz_ready = true; +} + +void clear_32hz_ready(void) +{ + timer_32hz_ready = false; +} + +_Bool checK_32hz_ready(void) +{ + return timer_32hz_ready; +} + +void sw_16hz_timer_init(void) +{ + timer_16hz_ready = false; + pwm_init(&conf_16hz_timer, PWM_TCE0, PWM_CH_C, 16); + pwm_start(&conf_16hz_timer, 100); + pwm_overflow_int_callback(&conf_16hz_timer, set_16hz_ready); +} + +void set_16hz_read(void) +{ + //do stuff here +} + +void set_16hz_ready(void) +{ + timer_16hz_ready = true; +} + +void clear_16hz_ready(void) +{ + timer_16hz_ready = false; +} + +_Bool checK_16hz_ready(void) +{ + return timer_16hz_ready; +} + +void vector3D_int_init(vector3D_int* data, int16_t value) +{ + data->x = value; + data->y = value; + data->z = value; +} + +void vector3D_float_init(vector3D_float* data, float value) +{ + data->x = value; + data->y = value; + data->z = value; +} + +void skywave_util_init(void) +{ + //TCC0.CTRLA = 0b00000001; + //TCC0.CTRLB = 0b00000000; + //TCC0.PER = 31999; //every 1 ms + //TCC0.CCA = 31999; + //milliseconds = 0; +} + +ISR(TCC0_CCA_vect) +{ + milliseconds += 1; +} + +uint64_t millis(void) +{ + return milliseconds; +} + +int ascii_to_decimal_int(const char* str) +{ + int numlen = strlen(str); + _Bool bNeg = false; + int y = numlen; + int retVal = 0; + for(uint8_t x = 0; x < numlen; x++) + { + if(!isdigit(str[x])) + { + if(str[x] == '-') + { + bNeg = true; + --y; + } + } + else + { + int temp = (int)str[x] - (int)'0'; + retVal += (temp * (int)(round(pow(10.0, --y)))); + } + + } + if(bNeg) + { + return retVal * -1; + } + return retVal; + +} + +float ascii_to_decimal_float(const char* str) +{ + int numlen = strlen(str); + int y = numlen; + for(int x = 0; x < numlen; x++) + { + + } + return 0.f; +} + diff --git a/skywave_atxmega128a1_final/src/drivers/skywave_util.h b/skywave_atxmega128a1_final/src/drivers/skywave_util.h new file mode 100644 index 0000000..ff21882 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/skywave_util.h @@ -0,0 +1,86 @@ +/* + * skywave_util.h + * + * Created: 5/11/2018 7:34:25 PM + * Author: Penguin + */ +#include "skywave.h" +#include "register_map.h" +#ifndef _SKYWAVE_UTIL_H_ +#define _SKYWAVE_UTIL_H_ + +#define WDT_1S WDT_TIMEOUT_PERIOD_1KCLK +#define WDT_2S WDT_TIMEOUT_PERIOD_2KCLK +#define WDT_4S WDT_TIMEOUT_PERIOD_4KCLK + +typedef struct +{ + uint8_t size_buffer; + int16_t* buffer; + uint8_t active; + uint8_t size_active; +}circ_buffer_int; + +typedef struct +{ + uint8_t size_buffer; + float* buffer; + uint8_t active; + uint8_t size_active; +}circ_buffer_float; + +typedef struct +{ + uint8_t size_buffer; + double* buffer; + uint8_t active; + uint8_t size_active; +}circ_buffer_double; + +typedef struct +{ + int16_t x; + int16_t y; + int16_t z; +}vector3D_int; + +typedef struct +{ + float x; + float y; + float z; +}vector3D_float; + +void cb_append_int(circ_buffer_int* buf, int16_t data); +int16_t cb_getAvg_int(circ_buffer_int* buf); +void init_circ_buffer_int(circ_buffer_int* circ_buf, int16_t* databuffer, uint8_t size_buf); + +void cb_append_float(circ_buffer_float* buf, float data); +float cb_getAvg_float(circ_buffer_float* buf); +void init_circ_buffer_float(circ_buffer_float* circ_buf, float* databuffer, uint8_t size_buf); + +void cb_append_double(circ_buffer_double* buf, double data); +float cb_getAvg_double(circ_buffer_double* buf); +void init_circ_buffer_double(circ_buffer_double* circ_buf, double* databuffer, uint8_t size_buf); + +void sw_32hz_timer_init(void); +void set_32hz_read(void); +void set_32hz_ready(void); +void clear_32hz_ready(void); +_Bool checK_32hz_ready(void); + +void sw_16hz_timer_init(void); +void set_16hz_read(void); +void set_16hz_ready(void); +void clear_16hz_ready(void); +_Bool checK_16hz_ready(void); + +void vector3D_int_init(vector3D_int* data, int16_t value); +void vector3D_float_init(vector3D_float* data, float value); +void skywave_util_init(void); +uint64_t millis(void); + +int ascii_to_decimal_int(const char* str); +float ascii_to_decimal_float(const char* str); + +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/drivers/twi_comms.c b/skywave_atxmega128a1_final/src/drivers/twi_comms.c new file mode 100644 index 0000000..dec2365 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/twi_comms.c @@ -0,0 +1,62 @@ +/* + * twi_comms.c + * + * Created: 5/6/2018 2:53:26 PM + * Author: Penguin + */ +#include "twi_comms.h" + +#define TWI_MAX_TIMEOUT 10000 +//universal packet we will be using for all twi/i2c interactions +static twi_package_t univ_pkt; +static uint8_t buffer[64]; + + + + + +void twi_comms_init(void) +{ + static twi_options_t twi_conf = + { + .speed = TWI_SPEED, + .speed_reg = TWI_BAUD(32000000, TWI_SPEED) + }; + twi_master_init(TWI_MASTER, &twi_conf); + twi_master_enable(TWI_MASTER); + univ_pkt.no_wait = true; + univ_pkt.addr_length = 1; + univ_pkt.length = 1; + univ_pkt.buffer = buffer; + + + + //swprintf(SWDEBUG, "TWI INIT SUCCESS\n"); +} + +void twi_write(uint8_t slave_address, uint8_t regi, uint8_t data) +{ + univ_pkt.chip = slave_address; + univ_pkt.addr[0] = regi; + buffer[0] = data; + univ_pkt.length = 1; + twi_master_write(TWI_MASTER, &univ_pkt); +} + +void twi_read(uint8_t slave_address, uint8_t regi, uint8_t data_length, uint8_t* dataBuffer) +{ + univ_pkt.chip = slave_address; + univ_pkt.addr[0] = regi; + univ_pkt.length = data_length; + twi_master_read(TWI_MASTER, &univ_pkt); + for(uint8_t x = 0; x < data_length; x++) + { + dataBuffer[x] = 0; + dataBuffer[x] = buffer[x]; + } +} + +uint8_t* get_i2c_buffer(void) +{ + return buffer; +} diff --git a/skywave_atxmega128a1_final/src/drivers/twi_comms.h b/skywave_atxmega128a1_final/src/drivers/twi_comms.h new file mode 100644 index 0000000..e0741e1 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/twi_comms.h @@ -0,0 +1,21 @@ +/* + * twi_comms.h + * + * Created: 5/6/2018 2:53:18 PM + * Author: Penguin + */ +#include "skywave.h" +#include "register_map.h" + +#ifndef _TWI_COMMS_H_ +#define _TWI_COMMS_H_ + +#define TWI_SPEED 400000 + + +void twi_comms_init(void); +void twi_write(uint8_t slave_address, uint8_t regi, uint8_t data); +void twi_read(uint8_t slave_address, uint8_t regi, uint8_t data_length, uint8_t* dataBuffer); +uint8_t* get_i2c_buffer(void); + +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/drivers/usart_comms.c b/skywave_atxmega128a1_final/src/drivers/usart_comms.c new file mode 100644 index 0000000..f1f0436 --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/usart_comms.c @@ -0,0 +1,79 @@ +/* + * usart_comms.c + * + * Created: 5/6/2018 3:54:52 PM + * Author: Penguin + */ +#include "usart_comms.h" + +volatile char xbee_response_temp; + + +static char gps_buff[256]; +//making a printf function for use with rs232 usart, must be attached to swprintf to be used globally +static void sw_rs232_printf(USART_t* usart_channel, const char* text, ...); +static uint16_t zee = 0; +void usart_comms_init() +{ + //set our global swprintf function to use our local and private sw_rs232_printf function + swprintf = &sw_rs232_printf; + static usart_rs232_options_t uconf = + { + .baudrate = 115200, + .stopbits = true, + .paritytype = USART_PMODE_DISABLED_gc, + .charlength = USART_CHSIZE_8BIT_gc + }; + + static usart_rs232_options_t openlogger_uart_conf = + { + .baudrate = 115200, + .stopbits = true, + .paritytype = USART_PMODE_DISABLED_gc, + .charlength = USART_CHSIZE_8BIT_gc, + }; + usart_init_rs232(USART_XBEE, &uconf); + //usart_init_rs232(USART_OPENLOGGER, &openlogger_uart_conf); + + //enable interrupts for incoming messages through usart + usart_set_rx_interrupt_level(USART_XBEE, USART_INT_LVL_HI); + //uncomment if file system is implemented with open logger + //usart_set_rx_interrupt_level(USART_OPENLOGGER, USART_INT_LVL_HI); + + //swprintf(SWDEBUG, "USART ONLINE\n"); + +} + +void sw_rs232_printf(USART_t* usart_channel, const char* text, ...) +{ + char write_buffer[256]; + va_list args; + va_start(args, text); + vsprintf(write_buffer, text, args); + va_end(args); + //must make const string because hacky syntax below only works with const string + const char* p_wb = write_buffer; + //this syntax is hacky and I don't like it, BUT it cuts down on code and saves me time. I'll clean it up if I have time + while(*p_wb) + { + usart_putchar(usart_channel, *p_wb++); + } +} + +ISR(USARTC0_RXC_vect) +{ + xbee_response_temp = usart_getchar(USART_XBEE); + //usart_putchar(USART_XBEE, '!'); + if(xbee_response_temp == '`') + { + wdt_reset_mcu(); + } + +} + +////uncomment if file system is implemented for open logger +//ISR(USARTF0_RXC_vect) +//{ + //gps_response_temp = usart_getchar(USART_OPENLOGGER); + //usart_putchar(SWDEBUG, gps_response_temp); +//} diff --git a/skywave_atxmega128a1_final/src/drivers/usart_comms.h b/skywave_atxmega128a1_final/src/drivers/usart_comms.h new file mode 100644 index 0000000..beaedba --- /dev/null +++ b/skywave_atxmega128a1_final/src/drivers/usart_comms.h @@ -0,0 +1,13 @@ +/* + * usart_comms.h + * + * Created: 5/6/2018 3:54:45 PM + * Author: Penguin + */ +#include "skywave.h" +#ifndef _USART_COMMS_H_ +#define _USART_COMMS_H_ + +void usart_comms_init(void); +usart_rs232_options_t gps_uart_conf; +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/register_map.c b/skywave_atxmega128a1_final/src/register_map.c new file mode 100644 index 0000000..7728e64 --- /dev/null +++ b/skywave_atxmega128a1_final/src/register_map.c @@ -0,0 +1,12 @@ +/* + * register_map.c + * + * Created: 5/6/2018 2:26:47 PM + * Author: Penguin + */ +#include "register_map.h" + +void register_map_init(void) +{ + +} diff --git a/skywave_atxmega128a1_final/src/register_map.h b/skywave_atxmega128a1_final/src/register_map.h new file mode 100644 index 0000000..3843e26 --- /dev/null +++ b/skywave_atxmega128a1_final/src/register_map.h @@ -0,0 +1,235 @@ +/* + * register_map.h + * + * Created: 5/6/2018 2:23:53 PM + * Author: Penguin + */ + +#include +#ifndef _REGISTER_MAP_H_ +#define _REGISTER_MAP_H_ + +//takes care of dynamic addresses +void register_map_init(void); + +//--MPU9250-- +#ifndef MPU_REGISTER_MAP +#define MPU_REGISTER_MAP + +#define MPU_ADDR_HIGH 0x69 +#define MPU_ADDR_LOW 0x68 + +//Mag slave address +#define AK8963_ADDRESS 0x0C +#define AK8963_WHO_AM_I 0x00 // should return 0x48 +#define AK8963_INFO 0x01 +#define AK8963_ST1 0x02 // data ready status bit 0 +#define AK8963_XOUT_L 0x03 // data +#define AK8963_XOUT_H 0x04 +#define AK8963_YOUT_L 0x05 +#define AK8963_YOUT_H 0x06 +#define AK8963_ZOUT_L 0x07 +#define AK8963_ZOUT_H 0x08 +#define AK8963_ST2 0x09 // Data overflow bit 3 and data read error status bit 2 +#define AK8963_CNTL 0x0A // Power down (0000), single-measurement (0001), self-test (1000) and Fuse ROM (1111) modes on bits 3:0 +#define AK8963_RSV 0x0B // +#define AK8963_ASTC 0x0C // Self test control +#define AK8963_I2CDIS 0x0F // I2C disable +#define AK8963_ASAX 0x10 // Fuse ROM x-axis sensitivity adjustment value +#define AK8963_ASAY 0x11 // Fuse ROM y-axis sensitivity adjustment value +#define AK8963_ASAZ 0x12 // Fuse ROM z-axis sensitivity adjustment value + +#define SELF_TEST_X_GYRO 0x00 +#define SELF_TEST_Y_GYRO 0x01 +#define SELF_TEST_Z_GYRO 0x02 + +#define SELF_TEST_X_ACCEL 0x0D +#define SELF_TEST_Y_ACCEL 0x0E +#define SELF_TEST_Z_ACCEL 0x0F + +#define SELF_TEST_A 0x10 + +#define XG_OFFSET_H 0x13 // User-defined trim values for gyroscope +#define XG_OFFSET_L 0x14 +#define YG_OFFSET_H 0x15 +#define YG_OFFSET_L 0x16 +#define ZG_OFFSET_H 0x17 +#define ZG_OFFSET_L 0x18 +#define SMPLRT_DIV 0x19 +#define MPU_CONFIG 0x1A +#define GYRO_CONFIG 0x1B +#define ACCEL_CONFIG 0x1C +#define ACCEL_CONFIG2 0x1D +#define LP_ACCEL_ODR 0x1E +#define WOM_THR 0x1F + +#define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms +#define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0] +#define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms + +#define FIFO_EN 0x23 +#define I2C_MST_CTRL 0x24 +#define I2C_SLV0_ADDR 0x25 +#define I2C_SLV0_REG 0x26 +#define I2C_SLV0_CTRL 0x27 +#define I2C_SLV1_ADDR 0x28 +#define I2C_SLV1_REG 0x29 +#define I2C_SLV1_CTRL 0x2A +#define I2C_SLV2_ADDR 0x2B +#define I2C_SLV2_REG 0x2C +#define I2C_SLV2_CTRL 0x2D +#define I2C_SLV3_ADDR 0x2E +#define I2C_SLV3_REG 0x2F +#define I2C_SLV3_CTRL 0x30 +#define I2C_SLV4_ADDR 0x31 +#define I2C_SLV4_REG 0x32 +#define I2C_SLV4_DO 0x33 +#define I2C_SLV4_CTRL 0x34 +#define I2C_SLV4_DI 0x35 +#define I2C_MST_STATUS 0x36 +#define INT_PIN_CFG 0x37 +#define INT_ENABLE 0x38 +#define DMP_INT_STATUS 0x39 // Check DMP interrupt +#define INT_STATUS 0x3A +#define ACCEL_XOUT_H 0x3B +#define ACCEL_XOUT_L 0x3C +#define ACCEL_YOUT_H 0x3D +#define ACCEL_YOUT_L 0x3E +#define ACCEL_ZOUT_H 0x3F +#define ACCEL_ZOUT_L 0x40 +#define TEMP_OUT_H 0x41 +#define TEMP_OUT_L 0x42 +#define GYRO_XOUT_H 0x43 +#define GYRO_XOUT_L 0x44 +#define GYRO_YOUT_H 0x45 +#define GYRO_YOUT_L 0x46 +#define GYRO_ZOUT_H 0x47 +#define GYRO_ZOUT_L 0x48 +#define EXT_SENS_DATA_00 0x49 +#define EXT_SENS_DATA_01 0x4A +#define EXT_SENS_DATA_02 0x4B +#define EXT_SENS_DATA_03 0x4C +#define EXT_SENS_DATA_04 0x4D +#define EXT_SENS_DATA_05 0x4E +#define EXT_SENS_DATA_06 0x4F +#define EXT_SENS_DATA_07 0x50 +#define EXT_SENS_DATA_08 0x51 +#define EXT_SENS_DATA_09 0x52 +#define EXT_SENS_DATA_10 0x53 +#define EXT_SENS_DATA_11 0x54 +#define EXT_SENS_DATA_12 0x55 +#define EXT_SENS_DATA_13 0x56 +#define EXT_SENS_DATA_14 0x57 +#define EXT_SENS_DATA_15 0x58 +#define EXT_SENS_DATA_16 0x59 +#define EXT_SENS_DATA_17 0x5A +#define EXT_SENS_DATA_18 0x5B +#define EXT_SENS_DATA_19 0x5C +#define EXT_SENS_DATA_20 0x5D +#define EXT_SENS_DATA_21 0x5E +#define EXT_SENS_DATA_22 0x5F +#define EXT_SENS_DATA_23 0x60 +#define MOT_DETECT_STATUS 0x61 +#define I2C_SLV0_DO 0x63 +#define I2C_SLV1_DO 0x64 +#define I2C_SLV2_DO 0x65 +#define I2C_SLV3_DO 0x66 +#define I2C_MST_DELAY_CTRL 0x67 +#define SIGNAL_PATH_RESET 0x68 +#define MOT_DETECT_CTRL 0x69 +#define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP +#define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode +#define PWR_MGMT_2 0x6C +#define DMP_BANK 0x6D // Activates a specific bank in the DMP +#define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank +#define DMP_REG 0x6F // Register in DMP from which to read or to which to write +#define DMP_REG_1 0x70 +#define DMP_REG_2 0x71 +#define FIFO_COUNTH 0x72 +#define FIFO_COUNTL 0x73 +#define FIFO_R_W 0x74 +#define WHO_AM_I_MPU9250 0x75 // Should return 0x71 +#define XA_OFFSET_H 0x77 +#define XA_OFFSET_L 0x78 +#define YA_OFFSET_H 0x7A +#define YA_OFFSET_L 0x7B +#define ZA_OFFSET_H 0x7D +#define ZA_OFFSET_L 0x7E +#endif + +//--MPL3115A2 +#define MPL3_SLAVE_ADDR 0x60 +//registers +#define MPL3_WHO_AM_I 0x0C +#define MPL3_PT_DATA_CFG 0x13 +#define MPL3_INT_SOURCE 0x12 +#define MPL3_SYS_MODE 0x11 +#define MPL3_PRESSURE_OUT_MSB 0x01 //MSB-LSB is actually altitude in altimeter mode +#define MPL3_PRESSURE_OUT_CSB 0x02 +#define MPL3_PRESSURE_OUT_LSB 0x03 +#define MPL3_TEMP_OUT_MSB 0x04 +#define MPL3_TEMP_OUT_LSB 0x05 +#define MPL3_DATA_READY_STATUS 0x06 +#define MPL3_STATUS 0x00 + +#define MPL3_CTRL1 0x26 //Sensor mode and power mode select +#define MPL3_CTRL2 0x27 //kinda useless for me +#define MPL3_CTRL3 0x28 //Int configuration register +#define MPL3_CTRL4 0x29 //Int enable register +#define MPL3_CTRL5 0x2A //Int configuration register 2 (Routing status registers to interrupt pins) + + +//MPL3 Commands +//Write to CTRL1 Register -- This writes to OST, which is a one shot read while in standby mode +#define MPL3_SINGLE_READ_PRESSURE 0x0A //pressure mode +#define MPL3_SINGLE_READ_ALTITUDE 0x8A //Altitude mode + +//DS3231 Addresses +#define DS3231_ADDR 0x68 +//see datasheet for formats, registers split bits +#define DS3231_SECONDS 0x00 +#define DS3231_MINUTES 0x01 +#define DS3231_HOURS 0x02 +#define DS3231_DAYW 0x03 //Day of week +#define DS3231_DAYM 0x04 //Day of month +#define DS3231_MONTH 0x05 //Month/Century +#define DS3231_YEAR 0x06 +#define DS3231_CTRL 0x0E +#define DS3231_CTRL_STATUS 0x0F +#define DS3231_AGING_OFFSET 0x10 +#define DS3231_TEMP_MSB 0x11 +#define DS3231_TEMP_LSB 0x12 +//Alarm 1 +#define DS3231_AL1_SEC 0x07 //Alarm 1 - Seconds +#define DS3231_AL1_MIN 0x08 //Alarm 1 - Minutes +#define DS3231_AL1_HRS 0x08 //Alarm 1 - Hours +#define DS3231_AL1_DAY 0x0A //Alarm 1 - Day of week + day of month +//Alarm 2 +#define DS3231_AL2_MIN 0x0B //Alarm 2 - Minutes +#define DS3231_AL2_HRS 0x0C //Alarm 2 - Hours +#define DS3231_AL2_DAYW 0x0D //Alarm 2 - Day of week + day of month + +//GPS +#ifndef GPS_COMMANDS +#define GPS_COMMANDS + +//request only the data we need +#define PMTK_SET_NMEA_OUTPUT_RMCGGA "$PMTK314,0,1,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0*28\r\n" +#define PMTK_SET_NMEA_OUTPUT_RMCONLY "$PMTK314,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0*29\r\n" + +#define PMTK_SET_NMEA_UPDATE_2HZ "$PMTK220,500*2F\r\n" +#define PMTK_SET_NMEA_UPDATE_5HZ "$PMTK220,200*2F\r\n" +#define PMTK_SET_NMEA_UPDATE_10HZ "$PMTK220,100*2F\r\n" + +#define PMTK_API_SET_FIX_CTL_1HZ "$PMTK300,1000,0,0,0,0*2F\r\n" +#define PMTK_API_SET_FIX_CTL_10HZ "$PMTK300,100,0,0,0,0*2F\r\n" +#define PMTK_API_SET_FIX_CTL_5HZ "$PMTK300,200,0,0,0,0*2F\r\n" + +#define PMTK_SET_BAUD_57600 "$PMTK251,57600*2C\r\n" +#define PMTK_SET_BAUD_115200 "$PMTK251,115200*2A\r\n" +#define PMTK_SET_BAUD_9600 "$PMTK251,9600*17\r\n" + +#define PGCMD_NOANTENNA "$PGCMD,33,0*6D\r\n" +#endif + +#endif \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/skywave.c b/skywave_atxmega128a1_final/src/skywave.c new file mode 100644 index 0000000..102ae69 --- /dev/null +++ b/skywave_atxmega128a1_final/src/skywave.c @@ -0,0 +1,247 @@ + +#include "skywave.h" + +#include "drivers/usart_comms.h" +#include "drivers/adc_util.h" + +#include "devices/mpu9250.h" +#include "devices/ds3231.h" +#include "devices/mpl3115a2.h" +#include "devices/ntcle100.h" +#include "devices/gps.h" + +#include "drivers/skywave_util.h" + +#include +typedef struct +{ + mpl3_Data mpl3_data; + ntcle100_Data ntcle_data; + vector3D_float accel_data; + OrientationData rot_data; + gpsData gps_data; + sw_time mission_time; +}swDataBank; + +static SW_FLIGHT_STAGE sw_state_manager; +static uint8_t redun_ctr = 0; +static swDataBank missionData; +static _Bool bSensorsReady(void); + +int main(void) +{ + skywave_init(); + //I dedicate this infinite for loop to Chandler, who was traumatized by an infinite while loop at a young age + for(;;) + { + wdt_reset(); + if(checK_32hz_ready()) + { + set_32hz_read(); + } + + if(mpl3_get_data_status()) + { + calc_mpl3_data(); + } + if(mpu_data_ready()) + { + mpu_read(); + set_mpu_data_status(false); + } + //1 second timer fires + if(ds3231_is_ready()) + { + swprintf(SWDEBUG, "\n"); + get_mpl3_data(&missionData.mpl3_data, true); + get_ntcle_data(&missionData.ntcle_data, true); + mpu_get_rot_data(&missionData.rot_data); + mpu_get_accel_data(&missionData.accel_data); + swprintf(SWDEBUG, "ACCEL X: %-2.2f\tACCEL Y: %-2.2f\tACCEL Z: %-2.2f\n", missionData.accel_data.x, + missionData.accel_data.y, missionData.accel_data.z); + swprintf(SWDEBUG, "YAW: %-2.2f\tPitch: %-2.2f\tRoll: %-2.2f\n", (float)missionData.rot_data.yaw, + (float)missionData.rot_data.pitch, (float)missionData.rot_data.roll); + swprintf(SWDEBUG, "Altitude: %-2.2f\nDigital Temp: %-2.2f\n", missionData.mpl3_data.pressure, missionData.mpl3_data.temp); + ds3231_get_time(&missionData.mission_time); + swprintf(SWDEBUG, "Time: HH:MM:SS PM/AM\n%-2.2d:%-2.2d:%-2.2d %s\n", + missionData.mission_time.hour, missionData.mission_time.minute, missionData.mission_time.second, + (missionData.mission_time.pm_or_am ? "PM" : "AM")); + swprintf(SWDEBUG, "TEMP: %-2.2f\n", get_ntcle_temp_now()); + ds3231_clear_ready(); + } + } + +} + +void recovery_handler(void) +{ + //get data from openlogger + //parse + //if cold start flag is marked then just start normally + //else we need to check some things + //if time is more than 5 minutes apart from current time or if flight state was standby and + ////ground altitude readings are similar then we cold start because it doesnt really matter + // + //else warm start + //use old ground altitude + //use old packet count + //find new flight state depending on what old one was + // +} + +void change_flight_state(void) +{ + switch(sw_state_manager) + { + case SW_STANDBY: + sw_fs_standby_init(); + break; + case SW_ASCENT: + sw_fs_ascent_init(); + break; + case SW_FIRST_DESCENT: + sw_fs_first_descent_init(); + break; + case SW_SEC_DESCENT: + sw_fs_sec_descent_init(); + break; + case SW_FINAL: + sw_fs_final_init(); + break; + default: + break; + }; +} +// +void set_ntcle_off(float t_off) +{ + temp_off = (get_ntcle_temp_now() - t_off); +} + +void skywave_init(void) +{ + sw_state_manager = SW_STANDBY; + sensor_ready_status = 0b11100000; + //initialize all function pointers to avoid oopsies + flight_handler = NULL; + swprintf = NULL; + //chip init + board_init(); + sysclk_init(); + wdt_set_timeout_period(WDT_2S); + + //pin config + //mpu addr pin + + //xbee + PORTC.DIR |= 0b00001000; + PORTC.OUT |= 0b00001000; + //openlog + PORTF.DIR |= 0b00001000; + PORTF.OUT |= 0b00001000; + + sysclk_enable_peripheral_clock(TWI_MASTER); + sysclk_enable_peripheral_clock(USART_XBEE); + sysclk_enable_peripheral_clock(USART_GPS); + sysclk_enable_peripheral_clock(USART_OPENLOGGER); + sysclk_enable_peripheral_clock(&ADCA); + //1 ms timer + sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0); + + + + + PORTF.PIN0CTRL = PORT_OPC_WIREDANDPULL_gc; + PORTF.PIN1CTRL = PORT_OPC_WIREDANDPULL_gc; + //initialize drivers + usart_comms_init(); + twi_comms_init(); + adc_util_init(); + + //enable interrupts at all levels + irq_initialize_vectors(); + cpu_irq_enable(); + + wdt_enable(); + //initialize device drivers + ds3231_init(); + mpl3_init(); + mpu_wai(); + mpu_init(); + ntcle100_init(); + gps_init(); + sw_32hz_timer_init(); +} + +_Bool bSensorsReady() +{ + if(sensor_ready_status == 0xFF) + { + return true; + } + return false; +} + + +void sw_fs_standby_handler(void) +{ + //check if accel z axis is going crazy && altitude is rising (+3 redun) +} + + +void sw_fs_ascent_handler(void) +{ + +} +void sw_fs_first_descent_handler(void) +{ + +} +void sw_fs_sec_descent_handler(void) +{ + +} +void sw_fs_final_handler(void) +{ + +} + +void sw_fs_standby_init(void) +{ + //check sd card for previous flight data + //find out if we're recovering or not + //enable mpu and mpl3 + //set redun counter to 0 + redun_ctr = 0; + flight_handler = &sw_fs_standby_handler; +} +void sw_fs_ascent_init(void) +{ + //enable therm + //start calculating pressure + //enable gps + redun_ctr = 0; + flight_handler = &sw_fs_ascent_handler; +} +void sw_fs_first_descent_init(void) +{ + + redun_ctr = 0; + flight_handler = &sw_fs_first_descent_handler; +} + +void sw_fs_sec_descent_init(void) +{ + //heat shield release + //wait 2 seconds + //deploy shoot + redun_ctr = 0; + flight_handler = &sw_fs_sec_descent_handler; +} + +void sw_fs_final_init(void) +{ + //enable buzzer + redun_ctr = 0; + flight_handler = &sw_fs_final_handler; +} \ No newline at end of file diff --git a/skywave_atxmega128a1_final/src/skywave.h b/skywave_atxmega128a1_final/src/skywave.h new file mode 100644 index 0000000..6f879b1 --- /dev/null +++ b/skywave_atxmega128a1_final/src/skywave.h @@ -0,0 +1,87 @@ +/* + * skywave.h + * + * Created: 5/6/2018 2:22:55 PM + * Author: Penguin + */ + +#include "asf.h" + +#ifndef _SKYWAVE_H_ +#define _SKYWAVE_H_ + +//usart +#define USART_OPENLOGGER (&USARTF0) +#define USART_XBEE (&USARTC0) +#define USART_GPS (&USARTC1) +#define SWDEBUG (&USARTC0) + +//twi/i2c +#define TWI_MASTER (&TWIF) + +//PORT D Pin Guide +//will change when the pcb gets here +#define PIN_DS3231_INT 0 +#define PIN_MPU9250_INT 1 +#define PIN_MPL_INT 2 +#define PIN_MPU_ADDR 3 +#define PIN_HW1 4 //Hardware interface 1 +#define PIN_HW2 5 //Hardware interface 2 + + +typedef enum +{ + SUCCESS = 0, + BAD_DATA = 1, + NO_RESPONSE = 2 +}SW_INIT_STATUS; + +typedef enum +{ + SW_STANDBY = 0, + SW_ASCENT = 1, + SW_FIRST_DESCENT = 2, + SW_SEC_DESCENT = 3, + SW_FINAL = 4 +}SW_FLIGHT_STAGE; + +typedef enum +{ + SWS_RTC = 0, + SWS_GPS = 1, + SWS_NTCLE100 = 2, + SWS_MPU9250 = 3, + SWS_MPL3 = 4, + SWS_AK8963 = 5 +}SW_SENSOR_STATUS; +uint8_t sensor_ready_status; +// 7 6 5 4 3 2 1 0 +// 6-7 = RESERVED +// 5 = AK8963 +// 4 = MPL3115A2 +// 3 = MPU9250 +// 2 = NTCLE100 +// 1 = GPS +// 0 = RTC + +void skywave_init(void); +void (*swprintf)(USART_t* usart_channel, const char* text, ...); +void change_flight_state(void); +void set_ntcle_off(float t_off); + +void (*flight_handler)(void); +void sw_fs_standby_handler(void); +void sw_fs_ascent_handler(void); +void sw_fs_first_descent_handler(void); +void sw_fs_sec_descent_handler(void); +void sw_fs_final_handler(void); + +void sw_fs_standby_init(void); +void sw_fs_ascent_init(void); +void sw_fs_first_descent_init(void); +void sw_fs_sec_descent_init(void); +void sw_fs_final_init(void); + +void recovery_handler(void); + +#endif \ No newline at end of file