diff --git a/.vs/D21_ADC_with_DMA/v14/.atsuo b/.vs/D21_ADC_with_DMA/v14/.atsuo
new file mode 100644
index 0000000..9d14bfa
Binary files /dev/null and b/.vs/D21_ADC_with_DMA/v14/.atsuo differ
diff --git a/D21_ADC_with_DMA.atsln b/D21_ADC_with_DMA.atsln
new file mode 100644
index 0000000..55c28c5
--- /dev/null
+++ b/D21_ADC_with_DMA.atsln
@@ -0,0 +1,22 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Atmel Studio Solution File, Format Version 11.00
+VisualStudioVersion = 14.0.23107.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "D21_ADC_with_DMA", "D21_ADC_with_DMA\D21_ADC_with_DMA.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}"
+EndProject
+Global
+ GlobalSection(SolutionConfigurationPlatforms) = preSolution
+ Debug|ARM = Debug|ARM
+ Release|ARM = Release|ARM
+ EndGlobalSection
+ GlobalSection(ProjectConfigurationPlatforms) = postSolution
+ {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.ActiveCfg = Debug|ARM
+ {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.Build.0 = Debug|ARM
+ {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.ActiveCfg = Release|ARM
+ {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.Build.0 = Release|ARM
+ EndGlobalSection
+ GlobalSection(SolutionProperties) = preSolution
+ HideSolutionNode = FALSE
+ EndGlobalSection
+EndGlobal
diff --git a/D21_ADC_with_DMA/D21_ADC_with_DMA.componentinfo.xml b/D21_ADC_with_DMA/D21_ADC_with_DMA.componentinfo.xml
new file mode 100644
index 0000000..e275755
--- /dev/null
+++ b/D21_ADC_with_DMA/D21_ADC_with_DMA.componentinfo.xml
@@ -0,0 +1,4 @@
+
+
+
+
\ No newline at end of file
diff --git a/D21_ADC_with_DMA/D21_ADC_with_DMA.cproj b/D21_ADC_with_DMA/D21_ADC_with_DMA.cproj
new file mode 100644
index 0000000..8d3986b
--- /dev/null
+++ b/D21_ADC_with_DMA/D21_ADC_with_DMA.cproj
@@ -0,0 +1,1337 @@
+
+
+
+ 2.0
+ 7.0
+ com.Atmel.ARMGCC.C
+ dce6c7e3-ee26-4d79-826b-08594b9ad897
+ ATSAMD21J18A
+ samd21
+ Executable
+ C
+ $(MSBuildProjectName)
+ .elf
+ $(MSBuildProjectDirectory)\$(Configuration)
+ D21_ADC_with_DMA
+ D21_ADC_with_DMA
+ D21_ADC_with_DMA
+ Native
+ true
+ false
+ true
+ true
+ 0x20000000
+
+ true
+ exception_table
+ 2
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ com.atmel.avrdbg.tool.edbg
+ ATML2130021800025113
+ 0x10010300
+ SWD
+
+
+
+ 2000000
+
+ SWD
+
+ com.atmel.avrdbg.tool.edbg
+ ATML2130021800025113
+ EDBG
+
+ 2000000
+
+
+
+
+ True
+ True
+ True
+ True
+ True
+
+
+ NDEBUG
+ BOARD=SAMD21_XPLAINED_PRO
+ __SAMD21J18A__
+ ARM_MATH_CM0PLUS=true
+ SYSTICK_MODE
+ ADC_CALLBACK_MODE=false
+ USART_CALLBACK_MODE=true
+
+
+
+
+ ../src/ASF/common/boards
+ ../src/ASF/sam0/utils
+ ../src/ASF/sam0/utils/header_files
+ ../src/ASF/sam0/utils/preprocessor
+ ../src/ASF/thirdparty/CMSIS/Include
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+ ../src/ASF/common/utils
+ ../src/ASF/sam0/utils/cmsis/samd21/include
+ ../src/ASF/sam0/utils/cmsis/samd21/source
+ ../src/ASF/sam0/drivers/port
+ ../src/ASF/sam0/drivers/system/pinmux
+ ../src/ASF/sam0/drivers/system
+ ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1
+ ../src/ASF/sam0/drivers/system/clock
+ ../src/ASF/sam0/drivers/system/interrupt
+ ../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21
+ ../src/ASF/sam0/drivers/system/power
+ ../src/ASF/sam0/drivers/system/power/power_sam_d_r_h
+ ../src/ASF/sam0/drivers/system/reset
+ ../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h
+ ../src/ASF/sam0/boards/samd21_xplained_pro
+ ../src/ASF/sam0/boards
+ ../src
+ ../src/config
+ ../src/ASF/sam0/utils/stdio/stdio_serial
+ ../src/ASF/common/services/serial
+ ../src/ASF/common2/services/delay
+ ../src/ASF/common2/services/delay/sam0
+ ../src/ASF/sam0/drivers/adc
+ ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h
+ ../src/ASF/sam0/drivers/dma
+ ../src/ASF/sam0/drivers/sercom
+ ../src/ASF/sam0/drivers/sercom/usart
+ ../src/drivers
+
+
+ Optimize for size (-Os)
+ -fdata-sections
+ True
+ True
+ True
+ -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500
+ True
+
+
+ libarm_cortexM0l_math
+ libm
+
+
+
+
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+
+
+ True
+
+ -Wl,--entry=Reset_Handler -Wl,--cref -mthumb -T../src/ASF/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld
+
+
+ ../src/ASF/common/boards
+ ../src/ASF/sam0/utils
+ ../src/ASF/sam0/utils/header_files
+ ../src/ASF/sam0/utils/preprocessor
+ ../src/ASF/thirdparty/CMSIS/Include
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+ ../src/ASF/common/utils
+ ../src/ASF/sam0/utils/cmsis/samd21/include
+ ../src/ASF/sam0/utils/cmsis/samd21/source
+ ../src/ASF/sam0/drivers/port
+ ../src/ASF/sam0/drivers/system/pinmux
+ ../src/ASF/sam0/drivers/system
+ ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1
+ ../src/ASF/sam0/drivers/system/clock
+ ../src/ASF/sam0/drivers/system/interrupt
+ ../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21
+ ../src/ASF/sam0/drivers/system/power
+ ../src/ASF/sam0/drivers/system/power/power_sam_d_r_h
+ ../src/ASF/sam0/drivers/system/reset
+ ../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h
+ ../src/ASF/sam0/boards/samd21_xplained_pro
+ ../src/ASF/sam0/boards
+ ../src
+ ../src/config
+ ../src/ASF/sam0/utils/stdio/stdio_serial
+ ../src/ASF/common/services/serial
+ ../src/ASF/common2/services/delay
+ ../src/ASF/common2/services/delay/sam0
+ ../src/ASF/sam0/drivers/adc
+ ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h
+ ../src/ASF/sam0/drivers/dma
+ ../src/ASF/sam0/drivers/sercom
+ ../src/ASF/sam0/drivers/sercom/usart
+
+
+ -DARM_MATH_CM0PLUS=true -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DSYSTICK_MODE -DADC_CALLBACK_MODE=false -DUSART_CALLBACK_MODE=true
+
+
+ ../src/ASF/common/boards
+ ../src/ASF/sam0/utils
+ ../src/ASF/sam0/utils/header_files
+ ../src/ASF/sam0/utils/preprocessor
+ ../src/ASF/thirdparty/CMSIS/Include
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+ ../src/ASF/common/utils
+ ../src/ASF/sam0/utils/cmsis/samd21/include
+ ../src/ASF/sam0/utils/cmsis/samd21/source
+ ../src/ASF/sam0/drivers/port
+ ../src/ASF/sam0/drivers/system/pinmux
+ ../src/ASF/sam0/drivers/system
+ ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1
+ ../src/ASF/sam0/drivers/system/clock
+ ../src/ASF/sam0/drivers/system/interrupt
+ ../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21
+ ../src/ASF/sam0/drivers/system/power
+ ../src/ASF/sam0/drivers/system/power/power_sam_d_r_h
+ ../src/ASF/sam0/drivers/system/reset
+ ../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h
+ ../src/ASF/sam0/boards/samd21_xplained_pro
+ ../src/ASF/sam0/boards
+ ../src
+ ../src/config
+ ../src/ASF/sam0/utils/stdio/stdio_serial
+ ../src/ASF/common/services/serial
+ ../src/ASF/common2/services/delay
+ ../src/ASF/common2/services/delay/sam0
+ ../src/ASF/sam0/drivers/adc
+ ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h
+ ../src/ASF/sam0/drivers/dma
+ ../src/ASF/sam0/drivers/sercom
+ ../src/ASF/sam0/drivers/sercom/usart
+
+
+
+
+
+
+
+
+ True
+ True
+ True
+ True
+ True
+
+
+ DEBUG
+ BOARD=SAMD21_XPLAINED_PRO
+ __SAMD21J18A__
+ ARM_MATH_CM0PLUS=true
+ SYSTICK_MODE
+ ADC_CALLBACK_MODE=false
+ USART_CALLBACK_MODE=true
+
+
+
+
+ ../src/ASF/common/boards
+ ../src/ASF/sam0/utils
+ ../src/ASF/sam0/utils/header_files
+ ../src/ASF/sam0/utils/preprocessor
+ ../src/ASF/thirdparty/CMSIS/Include
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+ ../src/ASF/common/utils
+ ../src/ASF/sam0/utils/cmsis/samd21/include
+ ../src/ASF/sam0/utils/cmsis/samd21/source
+ ../src/ASF/sam0/drivers/port
+ ../src/ASF/sam0/drivers/system/pinmux
+ ../src/ASF/sam0/drivers/system
+ ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1
+ ../src/ASF/sam0/drivers/system/clock
+ ../src/ASF/sam0/drivers/system/interrupt
+ ../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21
+ ../src/ASF/sam0/drivers/system/power
+ ../src/ASF/sam0/drivers/system/power/power_sam_d_r_h
+ ../src/ASF/sam0/drivers/system/reset
+ ../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h
+ ../src/ASF/sam0/boards/samd21_xplained_pro
+ ../src/ASF/sam0/boards
+ ../src
+ ../src/config
+ ../src/ASF/sam0/utils/stdio/stdio_serial
+ ../src/ASF/common/services/serial
+ ../src/ASF/common2/services/delay
+ ../src/ASF/common2/services/delay/sam0
+ ../src/ASF/sam0/drivers/adc
+ ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h
+ ../src/ASF/sam0/drivers/dma
+ ../src/ASF/sam0/drivers/sercom
+ ../src/ASF/sam0/drivers/sercom/usart
+ ../src/drivers
+
+
+ Optimize (-O1)
+ -fdata-sections
+ True
+ Maximum (-g3)
+ True
+ -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500
+ True
+
+
+ libarm_cortexM0l_math
+ libm
+
+
+
+
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+
+
+ True
+
+ -Wl,--entry=Reset_Handler -Wl,--cref -mthumb -T../src/ASF/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld
+
+
+ ../src/ASF/common/boards
+ ../src/ASF/sam0/utils
+ ../src/ASF/sam0/utils/header_files
+ ../src/ASF/sam0/utils/preprocessor
+ ../src/ASF/thirdparty/CMSIS/Include
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+ ../src/ASF/common/utils
+ ../src/ASF/sam0/utils/cmsis/samd21/include
+ ../src/ASF/sam0/utils/cmsis/samd21/source
+ ../src/ASF/sam0/drivers/port
+ ../src/ASF/sam0/drivers/system/pinmux
+ ../src/ASF/sam0/drivers/system
+ ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1
+ ../src/ASF/sam0/drivers/system/clock
+ ../src/ASF/sam0/drivers/system/interrupt
+ ../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21
+ ../src/ASF/sam0/drivers/system/power
+ ../src/ASF/sam0/drivers/system/power/power_sam_d_r_h
+ ../src/ASF/sam0/drivers/system/reset
+ ../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h
+ ../src/ASF/sam0/boards/samd21_xplained_pro
+ ../src/ASF/sam0/boards
+ ../src
+ ../src/config
+ ../src/ASF/sam0/utils/stdio/stdio_serial
+ ../src/ASF/common/services/serial
+ ../src/ASF/common2/services/delay
+ ../src/ASF/common2/services/delay/sam0
+ ../src/ASF/sam0/drivers/adc
+ ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h
+ ../src/ASF/sam0/drivers/dma
+ ../src/ASF/sam0/drivers/sercom
+ ../src/ASF/sam0/drivers/sercom/usart
+
+
+ Default (-g)
+ -DARM_MATH_CM0PLUS=true -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DSYSTICK_MODE -DADC_CALLBACK_MODE=false -DUSART_CALLBACK_MODE=true
+
+
+ ../src/ASF/common/boards
+ ../src/ASF/sam0/utils
+ ../src/ASF/sam0/utils/header_files
+ ../src/ASF/sam0/utils/preprocessor
+ ../src/ASF/thirdparty/CMSIS/Include
+ ../src/ASF/thirdparty/CMSIS/Lib/GCC
+ ../src/ASF/common/utils
+ ../src/ASF/sam0/utils/cmsis/samd21/include
+ ../src/ASF/sam0/utils/cmsis/samd21/source
+ ../src/ASF/sam0/drivers/port
+ ../src/ASF/sam0/drivers/system/pinmux
+ ../src/ASF/sam0/drivers/system
+ ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1
+ ../src/ASF/sam0/drivers/system/clock
+ ../src/ASF/sam0/drivers/system/interrupt
+ ../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21
+ ../src/ASF/sam0/drivers/system/power
+ ../src/ASF/sam0/drivers/system/power/power_sam_d_r_h
+ ../src/ASF/sam0/drivers/system/reset
+ ../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h
+ ../src/ASF/sam0/boards/samd21_xplained_pro
+ ../src/ASF/sam0/boards
+ ../src
+ ../src/config
+ ../src/ASF/sam0/utils/stdio/stdio_serial
+ ../src/ASF/common/services/serial
+ ../src/ASF/common2/services/delay
+ ../src/ASF/common2/services/delay/sam0
+ ../src/ASF/sam0/drivers/adc
+ ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h
+ ../src/ASF/sam0/drivers/dma
+ ../src/ASF/sam0/drivers/sercom
+ ../src/ASF/sam0/drivers/sercom/usart
+
+
+ Default (-Wa,-g)
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+ compile
+
+
+
+
\ No newline at end of file
diff --git a/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.bin b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.bin
new file mode 100644
index 0000000..d976872
Binary files /dev/null and b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.bin differ
diff --git a/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.eep b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.eep
new file mode 100644
index 0000000..e69de29
diff --git a/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.elf b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.elf
new file mode 100644
index 0000000..291b126
Binary files /dev/null and b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.elf differ
diff --git a/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.hex b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.hex
new file mode 100644
index 0000000..b5a5760
--- /dev/null
+++ b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.hex
@@ -0,0 +1,928 @@
+:10000000A0220020511C00004D1C00004D1C0000CF
+:1000100000000000000000000000000000000000E0
+:100020000000000000000000000000004D1C000067
+:1000300000000000000000004D1C00004D1C0000EE
+:100040004D1C00004D1C00004D1C00004D1C00000C
+:100050004D1C00004D1C00004D0500004D1C000013
+:100060004D1C000015150000251500003515000079
+:100070004515000055150000651500004D1C0000D9
+:100080004D1C00004D1C00004D1C00004D1C0000CC
+:100090004D1C00004D1C00004D1C00004D1C0000BC
+:1000A0004D1C00004D1C00004D1C00004D1C0000AC
+:1000B0000000000010B5064C2378002B07D1054B3B
+:1000C000002B02D0044800E000BF0123237010BDC4
+:1000D000800000200000000060390000084B10B5CF
+:1000E000002B03D00749084800E000BF0748036819
+:1000F000002B00D110BD064B002BFBD09847F9E731
+:100100000000000084000020603900006039000019
+:100110000000000010B50022002302704270002190
+:100120004280017103760262C26182600373C0245F
+:100130006401C481037443748374C37403752A24F3
+:10014000035543758375063C0355C2840285C1750A
+:100150002B23C1540133C15410BD0000F0B5D64665
+:100160004F464646C0B596B0070016000160CB4A20
+:10017000106A80235B02034313620B780520DB07C0
+:1001800005D516B01CBC90469946A246F0BD0B782A
+:1001900017309B07F5D473783B71002B04D1C04A0C
+:1001A000136C04210B4313643B68984633786A460A
+:1001B000137069461E20BB4B98471E20BA4B9847C8
+:1001C0002C23F25C002A54D0013BF55C337BEB1806
+:1001D000DBB2D118C9B28B4221D25219D3B299469F
+:1001E000B24B9A4603E00135EDB2A94517D00F2472
+:1001F0002C40337BE4185022AD4902A8D047132C81
+:10020000F1D8A40002ABE05801A900234B70CB70D9
+:100210008B7001330B70C0B2A64B9847E3E7F489AB
+:100220005022A34902A8A14B9847132C13D9737DE0
+:100230009B00DBB242461370B37DDB01727813433F
+:10024000DBB2424653703379342B00D978E19B00FE
+:10025000994AD3589F46A40002ABE05801A9002355
+:100260004B70CB708B7001330B70C0B2914B9847C1
+:10027000DDE7347B50228E4902A88C4B9847132C23
+:1002800015D9F48950228A4902A8884B9847132C23
+:10029000CDD8A40002ABE05801A900234B70CB706D
+:1002A0008B7001330B70C0B2824B9847BFE7A4003C
+:1002B00002ABE05801A900234B70CB708B70013367
+:1002C0000B70C0B27B4B9847DBE70423102402215C
+:1002D0001AE0717C337C102416E0062310240121DF
+:1002E00012E00823102400210EE000233024002116
+:1002F0000AE000232024002106E00023002400213E
+:1003000002E0022310240121090170220A40134354
+:1003100042469370F37D17203F2B00D931E7D3700D
+:100320003A68537E5BB2002BFBDBF37C728813438D
+:100330002422B25CD2001343327D92001343B27C7C
+:1003400052001343234342469380337E002B20D038
+:10035000102C00D1D6E000D880E0202C00D1B3E0F2
+:10036000302C16D1F27C002A0AD0F2698032172094
+:10037000FF2A00D905E7326A8032FF2A00D900E758
+:100380001720F269FF2A00DDFBE6326AFF2A00DD52
+:10039000F7E639684A7E52B2002AFBDB4246137206
+:1003A0003A68537E5BB2002BFBDBB38B42469383F0
+:1003B0003A68537E5BB2002BFBDB338C42461384DE
+:1003C0002C23F35C002B05D0013BDBB217200F2B55
+:1003D00000D9D6E62B22B15C17200F2900D9D0E630
+:1003E0003868427E52B2002AFBDBF289307B02433E
+:1003F000B068024309050A431B04134342461361D4
+:100400002A23F35C13750F2393751533F35C002BCC
+:1004100012D0F38C294A1720934200D9B1E6424604
+:100420009384328D80231B01D31824499BB28B42C5
+:1004300000D9A6E64346DA84214B1B685B01E02223
+:10044000D20013401F4A516849011268D20E0A4374
+:10045000D2B2134342461385002092E6002C98D175
+:10046000F27C002A0FD0F269802109018C46624497
+:10047000124917208A4200D983E6326A62440F4942
+:100480008A4200D97DE60D4A1720F169914200DDCC
+:1004900077E6316A914200DD73E67AE700040040B6
+:1004A00000080040F51A0000691A0000C926000083
+:1004B000A4370000ED1B0000D0360000FF0F000045
+:1004C0002460800020608000F27C002A0FD0F26956
+:1004D000802189008C4662441A4917208A4200D93B
+:1004E0004FE6326A624417498A4200D949E6154A02
+:1004F0001720F169914200DD43E6316A914200DD47
+:100500003FE646E7F27C002A0FD0F269802109021B
+:100510008C4662440C4917208A4200D931E6326A7F
+:10052000624409498A4200D92BE6074A1720F1693B
+:10053000914200DD25E6316A914200DD21E628E79F
+:1005400017201EE6FF030000FFFF000010B5264B3A
+:10055000984726490B8C0F2213409B0024481858BB
+:1005600003781A403F23CA540F33CA5CD2B20378CF
+:100570001B012049C91849881F4CE3185B88CB1A16
+:100580004361D3070FD501214E23184AD1543E3B76
+:100590004374037CDB0703D54368002B00D09847E6
+:1005A000164B984710BD93070DD502214E230F4AD5
+:1005B000D15400234374037C9B07F1D58368002B3F
+:1005C000EED09847ECE75307EAD504214E23074ABB
+:1005D000D154483B4374037C5B07E1D5C368002BCF
+:1005E000DED09847DCE7C046E11500000048004136
+:1005F0009C000020E0010020B00000202116000037
+:1006000000230370437003228270C370037170472C
+:10061000F8B5CE46474680B505000E00454B9847D5
+:10062000454B1B78002B18D1444B5A6920210A43B3
+:100630005A61DA6910390A43DA61414B1A880E3976
+:100640008A431A8001221A803E4A5A633E4A9A63BC
+:100650003E4A1A80384B01221A70364B9847364B67
+:100660005B68DA070FD55B08012401221A420BD020
+:100670005B080134E4B2052CF8D1354B9847344B74
+:100680009847142051E000242B4A51680123A340CD
+:100690000B435360137A013B13722D4B9847FF2C89
+:1006A000EDD02C700F2398461C40254F30339946CF
+:1006B000FC540133FA5C02218A43FA540124FC54AD
+:1006C0001C4B98472B78424613404A46BB543B6923
+:1006D0002A789440A3433B6132785201602313404F
+:1006E00072781202FC2189010A401343B278920504
+:1006F000C02109040A401343F178002904D00722DD
+:100700000A4008210A4313433279002A01D01022FB
+:1007100013430B4A53640E4CA0470023AB612B7864
+:100720009B000C4A9D50A04700200CBC9046994667
+:10073000F8BDC046E11500000000002000040040A4
+:1007400000480041E0010020B0000020020F00003E
+:10075000211600009C00002070B50400194B98473A
+:10076000637C052B08D0A3695B889BB2002B07D163
+:10077000154B9847172070BD134B98470520FAE793
+:100780004026124B1E6022780F231340104D3F224B
+:10079000AB5423780F4AD25C072313404D22AB544D
+:1007A00005236374207800010B4BC018A1693D3A02
+:1007B0000A4B9847AB5D02221343AB55024B984757
+:1007C0000020D8E7E11500002116000000E100E05C
+:1007D0000048004100010020E0010020C92600007F
+:1007E000F0B50A780388012632400124A34313435D
+:1007F00003804B78048803273B405B000622944328
+:100800001C4304808D7804883D40ED0018239C43F0
+:100810002C430480CA7803883A401202164C2340C5
+:10082000134303800B79048833409B02134A14401E
+:100830001C4304804D7904883540ED02104B1C4068
+:100840002C4304808A790388324012030D4C2340E4
+:1008500013430380CB7907221A4003885203DB0439
+:10086000DB0C134303800B894380CB6843600B6927
+:1008700083604B69C360F0BDFFFCFFFFFFFBFFFF20
+:10088000FFF7FFFFFFEFFFFF427C0523052A0BD098
+:100890008369002B0AD0DA68002A03D0DB68DA68A3
+:1008A000002AFBD1D9600023180070478161002322
+:1008B000FAE7F0B5DE4657464E464546E0B587B006
+:1008C0008046049116001F000022002300218B4661
+:1008D0003F2401202100009601975C460394444682
+:1008E000059413E02024641A0500E540A84614E0AE
+:1008F000009C019D121BAB415C464D462C43A34618
+:10090000039C45462C430394013925D3202464429B
+:100910000C19E7D40500A540A84604008C40A14668
+:1009200092185B4114001D00059E4F463E40B446A0
+:10093000049E47463E40B246664657463E4303D075
+:100940000600264332002B00009C019D9D42DBD80F
+:10095000CED19442D8D8CBE7039B5846190007B0B4
+:100960003CBC90469946A246AB46F0BD10B549083E
+:1009700040230024814202D2180010BD1C00091A35
+:10098000631C9BB28842F9D94023FF2CF4D8148011
+:100990000023F1E7F0B583B00F00160008AA117824
+:1009A00004004C434022BC4202D9100003B0F0BD09
+:1009B000002B14D1020008000021194CA0470100AF
+:1009C0003A0000230020174CA04700220123121AEE
+:1009D0008B41120C1B041A4332800022E5E70022EF
+:1009E000012BF9D10A00002300210D4CA047020081
+:1009F0000B0000920193380000210A4CA04705002B
+:100A000080239B0140229842CFD8790FF800009AAA
+:100A1000019BA047EA00821AD2B252032A43DBE7C5
+:100A20000D1F0000B308000010B582B004000E4B8B
+:100A30001B78002B07D0002905D10B4B5B78834234
+:100A400010D01D200CE001A90C701320074B984713
+:100A50001320074B9847044B5C7001221A7000204A
+:100A600002B010BD0020FBE708010020F51A0000CD
+:100A7000691A0000404B984231D00AD93F4B984246
+:100A80004DD03F4B98425AD03E4B984237D0002031
+:100A900070473D4B98420CD03C4B9842F7D101290E
+:100AA00017D000295DD0022915D0032915D00020C8
+:100AB000EEE7012907D0002951D0022905D00329EA
+:100AC00005D00020E4E73248E2E73248E0E7324868
+:100AD000DEE73248DCE73248DAE73248D8E7012976
+:100AE00007D000293FD0022905D0032905D00020D6
+:100AF000CEE72D48CCE72D48CAE72D48C8E70129A5
+:100B000007D0002931D0022905D0032905D00020C3
+:100B1000BEE72848BCE72848BAE72848B8E70129D3
+:100B200007D0002923D0022905D0032905D00020B1
+:100B3000AEE72348ACE72348AAE72348A8E7012902
+:100B400007D0002915D0022905D0032905D000209F
+:100B50009EE71E489CE71E489AE71E4898E71E48F5
+:100B600096E7032094E71D4892E71D4890E71D484B
+:100B70008EE71D488CE7C046001000420018004276
+:100B8000001C00420014004200080042000C004219
+:100B90000300050003000600030007000300010036
+:100BA00003001E0003001F000300090003000A00E9
+:100BB00003000B00030011000300120003001300E8
+:100BC00003000D0003000E0003000F0003001700D8
+:100BD00003001800030019000300040003000800CC
+:100BE0000300100003000C000300160030B587B0AE
+:100BF0000B4B6A4632CB32C232CB32C2009B8342AD
+:100C00000BD001239A0069465258824206D0013324
+:100C1000062BF7D1002007B030BD0023D8B2FAE789
+:100C2000F4370000F0B5C64600B50C009046002829
+:100C30000FD1002A11DD8F18094E0A4D30682100AE
+:100C40002B6898470134BC42F8D1404604BC90461A
+:100C5000F0BD01235B429846F7E78046F5E7C046C2
+:100C60003802002030020020F0B5C64600B50E0064
+:100C700015000138022810D8002A11D000240C4B8E
+:100C800098460C4F43461868315D3B6898470028EA
+:100C900008DB0134A542F5D106E00124644203E0FB
+:100CA000140001E001246442200004BC9046F0BD21
+:100CB000380200203402002030B595B008AC200086
+:100CC0002A4B98470023A360237180229200628000
+:100CD0000122627004212173C0214901E181227542
+:100CE000A374234D220023492800234B98472A68E8
+:100CF000537E5BB2002BFBDB0F23937513761378C7
+:100D000002210B4313701A4B1A68537E5BB2002BFF
+:100D1000FBDB06AC2000194B984727236370253B6B
+:100D2000A370174D21002800164B984701226B46EF
+:100D30001A70002369464B708B704A718B71CB71AE
+:100D4000CA700B7110330B81094B1B681A33039364
+:100D50000D4B203304930D4C059420000C4B984709
+:100D6000210028000B4B984715B030BD150100003D
+:100D70000C010020004000425D010000010600005F
+:100D80001401002011060000300100204002002064
+:100D9000E10700008908000010B5094B1A68537E6E
+:100DA0005BB2002BFBDB137B02210B431373537EDF
+:100DB0005BB2002BFBDB0348034B984710BDC046DA
+:100DC0000C0100201401002059070000054B1900F8
+:100DD000203100201A88801802338B42FAD1000992
+:100DE00080B270473001002010B5054B9847054B85
+:100DF0009847054CE6218905A0470449A04710BD46
+:100E0000CD0D0000B9250000611F000068B30E4041
+:100E100070B582B005000E0000226B46DA80064CE9
+:100E20006B46991D2800A0470028F9D16B46063370
+:100E30001B88337002B070BDA712000070B50500AA
+:100E40008CB2034E21002800B0470028FAD170BDB3
+:100E500081120000F8B52C4A8023DB0513600023C3
+:100E60005360FF21118100219372D3720124242049
+:100E7000145401301454013013540130135493624C
+:100E8000053013540130135453611382D376117615
+:100E9000117751761323937651771C4B13631C4BB8
+:100EA000536301235B429363D36380235B03D3606B
+:100EB000E1235B021362174D174B1D601749184B56
+:100EC00019601849184B196018492800184B9847A1
+:100ED000184F3B6898680021174EB0473B68586828
+:100EE0000021B0472E683000144B98471F2318404C
+:100EF0008440134B1C602A68D369002BFCD13368F3
+:100F0000022213433360F8BD500100200200160096
+:100F10000200170050020020380200203D0E0000A1
+:100F200034020020110E00003002002000140042A4
+:100F3000450F00001800002021270000E5140000E4
+:100F400000E100E0F0B5DE4657464E464546E0B5C6
+:100F500091B005000C00160029600800BA4B9847B4
+:100F6000020023680520DB0706D511B03CBC904683
+:100F70009946A246AB46F0BD236817309B07F4D4D0
+:100F8000B249086A971C0123BB4003430B620FA9B7
+:100F90002D27F35D0B701432D3B202931800AC4BC3
+:100FA00098470298AB4B9847F05D0021AA4B9847B1
+:100FB000F37A6B712423F35CAB712523F35CEB7143
+:100FC000F37E2B72337F6B722B68984618009E4B12
+:100FD0009847143000220E2306A98C4663441A80D9
+:100FE000328A02928023DB019A4200D19AE00FD923
+:100FF000C023DB01029A9A4200D18EE080231B02BB
+:101000009A4200D01BE1032306930023079308E0D4
+:1010100080239B019A4200D011E1102306930F3BDD
+:10102000079333680593F3689B4673690393337E94
+:1010300004932623F35C9A4673689946002B00D1EB
+:101040009CE080235B05994500D180E0737E002BF6
+:1010500002D0B37E424693730E2306AA944663449D
+:101060001B8842469381059B5A461343039A1343B8
+:101070004A461343029F1F43049B1B021F435346D0
+:101080005B071F432723F35C002B01D104331F436D
+:10109000737E9B02327F52021343727F120213430C
+:1010A0002422B25C520413432522B25C120413437F
+:1010B000B17AF27A114319433389FF2B00D181E0D1
+:1010C00080225204174319432C23F35C002B03D1D5
+:1010D000624B9B789B0701D580231F432A68D36905
+:1010E000002BFCD1434659602A68D369002BFCD100
+:1010F00043461F600EAB80221A7000225A70DA70CD
+:101100009A70336B0A93736B0B93B36B0C93F36B03
+:1011100002930D9300270AAE63E008230693073B72
+:1011200007937EE733680593F3689B4673690393DF
+:10113000337E04932623F35C9A4673689946002B0A
+:1011400018D080235B05994501D0002025E0272396
+:10115000F35C002B00D079E7336A1F00C0B2404B2C
+:10116000984701000E2206AB9C46624438003D4B76
+:10117000984712E008230693002307932723F35C84
+:10118000002B0ED0069B0093079B0E2206A98C46CF
+:101190006244B16A306A344FB847002800D0E4E6B0
+:1011A00054E7336A1F00C0B22D4B98470100069BDD
+:1011B0000093079B0E2206A88446624438002A4FFB
+:1011C000B847EAE7F37E002B00D17DE78023DB04FC
+:1011D0001F4379E72000254B984707E00137042F8C
+:1011E0000DD0F9B2BB0098590028F3D0431CF5D0BC
+:1011F0000EA90870000CC0B21D4B9847EEE7002303
+:10120000EB602B616B61AB61EB612B62AB626B627C
+:101210000022EB85AB853033EA540133EA540133C5
+:10122000EA540133EA542868074B984704001149EF
+:10123000114B9847A400114BE550002095E6102370
+:10124000069300230793ECE6ED0B0000000400403A
+:10125000F51A0000691A0000290A00000020004168
+:10126000111B00006D09000095090000750A0000BF
+:10127000ED1B000011130000A914000084020020DF
+:10128000C2791C23002A01D118007047C28D92B286
+:10129000173B002AF8D1026811850221137E0B4208
+:1012A000FCD00023F0E782791C23002A01D118002A
+:1012B0007047828D92B2173B002AF8D10268107EE7
+:1012C0004007F4D5538BDBB298061DD0980703D5A1
+:1012D000022353831833EAE7580703D504235383C3
+:1012E0001A33E4E7D80703D5012353831233DEE72B
+:1012F000D80603D5102353833233D8E79B0603D592
+:10130000202353832133D2E7138D0B800023CEE7B4
+:10131000F8B58000624BC5582C68E369002BFCD1FE
+:10132000237EA67D1E403023EB5C3122AF5C1F4044
+:10133000F30722D5EB8D9BB2002B1CD0AA6A137841
+:10134000DBB2511CA962697901290ED09BB2DB0581
+:10135000DB0D2385EB8D013B9BB2EB85002B0CD184
+:10136000013323750133A37507E0517809020B435C
+:101370000232AA62EBE701232375B30706D50223E5
+:10138000237500223133EA54FB071AD4730765D55D
+:10139000AB8D9BB2002B5FD0638BDBB21A0714D4EA
+:1013A0003F221340002B34D09A0711D51A22322342
+:1013B000EA54303B63837B0750D528006B6998471C
+:1013C0004CE02800EB689847E0E737221340E9E754
+:1013D0005A0705D51E223223EA542E3B6383EAE7DF
+:1013E000DA0705D513223223EA54313B6383E2E75F
+:1013F000DA0605D542223223EA54223B6383DAE738
+:1014000020221A42D7D021323223EA54123B63837E
+:10141000D1E7238DDB05DB0DDAB2696A0A706A6AEF
+:10142000511C69626979012910D0AB8D013B9BB2D7
+:10143000AB85002B12D10433237500222E33EA54DE
+:10144000BB070BD528002B69984707E01B0A537090
+:101450006B6A01336B62E8E704232375F30604D556
+:10146000102323752376FB060ED4B30604D5202360
+:10147000237523763B070BD4330704D50823237544
+:101480002376BB0608D4F8BD2800EB699847ECE743
+:101490002800AB699847EFE72B6A28009847F2E7E6
+:1014A0008402002070470000F0B50A4B1B78002B27
+:1014B0000CD1094F094E0A4D0024DE515A1914600F
+:1014C0000433182BF9D10122024B1A708000024B11
+:1014D000C150F0BD9001002094010020A51400002F
+:1014E0008402002000B583B009236A4613700133DB
+:1014F0005370013393700133D3700133137101338F
+:101500005371034B98476B46185603B000BDC04655
+:10151000ED0B000010B5024B1B680020984710BD72
+:101520009401002010B5024B5B680120984710BD64
+:101530009401002010B5024B9B680220984710BD13
+:101540009401002010B5024BDB680320984710BDC2
+:101550009401002010B5024B1B690420984710BD70
+:101560009401002010B5024B5B690520984710BD1F
+:101570009401002070B50020084B98470500084CE6
+:10158000FA218900A047074B186007492800A047A7
+:10159000064B18600522064B1A6070BDDD1900006D
+:1015A000F51D00000C00002040420F00100000203C
+:1015B00010E000E030B5084B1C68084A0025802187
+:1015C0004902013807D3002CFBD0546095601368A2
+:1015D0000B42FCD0F5E730BD0C00002010E000E02D
+:1015E0000C4B1B68002B06D1EFF31083002B07D0A8
+:1015F0000022094B1A70074A1368013313607047C1
+:1016000072B6BFF35F8F0022044B1A700132024B97
+:101610001A70F0E7AC010020B00100201400002097
+:10162000084B1A68013A1A601B68002B09D1064B57
+:101630001B78002B05D00122044B1A70BFF35F8F7B
+:1016400062B67047AC010020B001002014000020F9
+:10165000F0B583B001AC012565700027A770257037
+:1016600021003E20064EB0478022D205054B9A61EC
+:101670002770657021000F20B04703B0F0BDC04651
+:10168000891600008044004100B583B001AB802280
+:101690001A700A785A704A789A708A78DA70190043
+:1016A000014B984703B000BDED1B000010B50828A2
+:1016B00003D880001C4B1B589F46002032E01B4B78
+:1016C00018692FE01A4B1B6A9B059B0F1948D840DD
+:1016D00028E0164B586925E0144B1B6800209B0737
+:1016E00020D513491022CB681A42FCD00F4B1A6840
+:1016F00024231340042B01D00F4813E000200F4B8C
+:1017000098470A4B9B681B041B0C58430AE0502364
+:10171000074AD35C00205B0704D5044BD86801E07E
+:101720008020000210BDC0460C380000B40100202B
+:101730000008004000127A00006CDC02111B00005F
+:1017400070B50C490B6A0478857840780122104006
+:1017500080014026B34303432A40D20180208343C3
+:1017600013430322224012020348034013430B6237
+:1017700070BDC04600080040FFFCFFFF082803D8EA
+:101780008000254B1B589F46172044E0234A136ACC
+:1017900002210B43136200203DE0204A936902219D
+:1017A0000B439361002036E01C4A138A02210B434D
+:1017B000138200202FE0194A938A02210B4393825F
+:1017C000002028E016490B68022213430B60134BDC
+:1017D0009A8419000E32CB681A42FCD0104A9168E4
+:1017E0000E4BD96252689A6200229A841900103214
+:1017F000CB681A42FCD00A4B1B689BB2074A938401
+:10180000002008E0054944228B5C022003438B54EE
+:10181000002000E000207047303800000008004041
+:10182000B401002030B585B0C222D2001A4B9A60B4
+:101830001A4A53681E218B43536001236A46137072
+:101840000024174DE0B26946A8470134252CF9D190
+:1018500003A800244470012585700470114B98473B
+:101860000620114B9847114B9847114B1C725C7224
+:101870009C72DC7201956B465C7006236A4613709D
+:1018800014725472694600200A4B984700200A4B94
+:10189000984705B030BDC0460008004000400041F8
+:1018A000F51A0000411700007D170000BD18000068
+:1018B00000040040E118000099190000064A9369ED
+:1018C00008210B4393610122044B1A7019000B7815
+:1018D0001342FCD17047C04600040040000C004099
+:1018E00070B5060004000D782D0205434B78002BDF
+:1018F00002D08023DB021D434B7A002B02D08023D1
+:101900001B031D434868012810D9431E184234D1D7
+:10191000022830D90223002201325B009842FBD812
+:1019200012023243140080235B031D430B7A002B09
+:1019300002D080239B031D43134A53785BB2002BD4
+:10194000FBDB124B9847124B1E700F4A53785BB269
+:10195000002BFBDB0C4B9C601A0053785BB2002B16
+:10196000FBDB094A5368802149020B401D43556047
+:10197000084B984770BD0022D2E70402344380230D
+:101980009B021D43D2E7C046000C0040E115000059
+:10199000080C00402116000010B504000B4A5378D3
+:1019A0005BB2002BFBDB0A4B98470A4B1C70074AC3
+:1019B00053785BB2002BFBDB044A516880235B0247
+:1019C0000B435360044B984710BDC046000C0040C9
+:1019D000E1150000040C00402116000070B5040061
+:1019E0001A4A53785BB2002BFBDB194B9847194B13
+:1019F0001C70164A53785BB2002BFBDB134E7068E9
+:101A0000C004C00E144B98470500124B1C7076683A
+:101A1000F602F60F114B1C700C4A53785BB2002B88
+:101A2000FBDB0A4B9C682402240C0D4B9847002ECC
+:101A300007D1012C07D9210028000A4B984705003F
+:101A400001E00134E540280070BDC046000C0040B4
+:101A5000E1150000040C0040AD160000080C004029
+:101A600021160000F51D000010B50400064B984734
+:101A7000064B1C70064A53888021C9010B435380D2
+:101A8000044B984710BDC046E1150000020C004011
+:101A9000000C00402116000010B504000F4B9847C1
+:101AA0000F4B1C700F4A53881B05180F53880E49A3
+:101AB0000B40538053880D490B4053801100802206
+:101AC000D2014B881342FCD106494A8803020648DA
+:101AD000024013434B80064B984710BDE1150000B0
+:101AE000020C0040000C0040FFF0FFFFFFBFFFFFB3
+:101AF0002116000010B50C7824020443024B9847CD
+:101B0000A4B2024B5C8010BD991A0000000C00408A
+:101B100010B50400064B9847064B1C70064B5C88BA
+:101B20002405240F054B98472000054B984710BD0E
+:101B3000E1150000020C0040000C004021160000DE
+:101B4000DD19000030B5D378002B35D11378802B08
+:101B500029D01B0680246402234354780225AC4319
+:101B600006D19478002C20D18024A4022343416024
+:101B70005478013C012C1CD90D042D0CA024E40543
+:101B80002C431C4384620D0CD02424062C431C439C
+:101B90008462D478002C22D15B031CD59378012B6E
+:101BA0001ED0416117E00023D7E7C024E40223439D
+:101BB000DDE70D4C2340DFE741600C04240CA0233B
+:101BC000DB05234383620C0CD0231B062343836273
+:101BD000D378002B03D15378013B012B02D930BDC0
+:101BE0008161F8E78160FAE7FFFFFBFF10B50A00AB
+:101BF000C1090023002904D14309DB0105498C46B2
+:101C000063441F242040012181401800024B984763
+:101C100010BDC04600440041451B00007047000055
+:101C200010B5054B9847054B9847054B9847054B12
+:101C30009847054B984710BD251800005116000025
+:101C40001D1C00001D1C00001D1C0000FEE7000004
+:101C5000F8B52A4A2A4B9A4211D01A00294B9A42C7
+:101C60000DD2294A03339B1A9B0801339B000022A3
+:101C7000234822498C58845004329A42FAD1234A8C
+:101C8000234B9A420AD2D34321495B1803218B4349
+:101C900004339B18002102C29342FCD11D4AFF214C
+:101CA0001D4B8B439360FD3990235B001B4AD15041
+:101CB0001B4AD3780325AB4302242343D370D37844
+:101CC0000C27BB4308263343D370164B987B302236
+:101CD0009043202210439873997BB9433143997301
+:101CE0009A7BAA4322439A730F4A536880210B437D
+:101CF00053600E4B98470E4B9847FEE76039000043
+:101D0000000000207C000020040000208000002053
+:101D1000A002002000ED00E0000000000070004183
+:101D20000050004100480041004000418126000071
+:101D3000711D00000300064A1268002A04D0044AFC
+:101D40001068C318136070470249014A1160F6E732
+:101D5000CC010020A02200200120404270478023B7
+:101D60009B014B60002070470120704700207047A6
+:101D7000F8B5124B9847124B9847124B9847124BA5
+:101D80009847124B9847124F124EB847051CB04760
+:101D90000400114B9847011C281C104B9847104910
+:101DA000104B9847B047020021000F480F4B98474F
+:101DB000FA2040000E4B9847E7E7C046211C000080
+:101DC00075150000550E0000B90C0000990D0000BB
+:101DD000E90D0000D924000019250000A121000010
+:101DE00000007A44611F000054380000ED26000016
+:101DF000B5150000002243088B4274D303098B42BF
+:101E00005FD3030A8B4244D3030B8B4228D3030CCA
+:101E10008B420DD3FF22090212BA030C8B4202D36C
+:101E20001212090265D0030B8B4219D300E0090A94
+:101E3000C30B8B4201D3CB03C01A5241830B8B429D
+:101E400001D38B03C01A5241430B8B4201D34B0386
+:101E5000C01A5241030B8B4201D30B03C01A5241EB
+:101E6000C30A8B4201D3CB02C01A5241830A8B4270
+:101E700001D38B02C01A5241430A8B4201D34B0259
+:101E8000C01A5241030A8B4201D30B02C01A5241BD
+:101E9000CDD2C3098B4201D3CB01C01A5241830971
+:101EA0008B4201D38B01C01A524143098B4201D3AB
+:101EB0004B01C01A524103098B4201D30B01C01AD6
+:101EC0005241C3088B4201D3CB00C01A5241830850
+:101ED0008B4201D38B00C01A524143088B4201D37D
+:101EE0004B00C01A5241411A00D2014652411046DD
+:101EF0007047FFE701B5002000F006F802BDC046BC
+:101F00000029F7D076E770477047C046F0B5CE4657
+:101F1000474615042D0C2E0080B50704140C3F0C09
+:101F20009946030C7E435D43674363437F19340C3A
+:101F3000E4199C46A54203D980235B029846C44419
+:101F40004B46514343433604360C250C2404654468
+:101F5000A4195918491920000CBC90469946F0BDA7
+:101F6000F8B557464E464546DE46E0B547024600C0
+:101F700088467F0A360EC40F002E47D0FF2E24D08D
+:101F8000FB008027FF041F43002399469A467F3EAB
+:101F900043465D025800DB0F6D0A000E984643D0A1
+:101FA000FF283BD0EB0080250022ED041D437F3845
+:101FB0003618731C41469B464B46614013430F2B1A
+:101FC00064D875489B00C3589F46002F42D1082310
+:101FD0009946063BFF269A46DAE74146022A28D070
+:101FE000032A00D1CEE0012A00D0ACE0114000204D
+:101FF0000022CCB24002D205400AE407104320433D
+:102000003CBC90469946A246AB46F8BD002F15D180
+:1020100004239946033B00269A46B9E7FF20022293
+:10202000002DC5D00322C3E7002D19D100200122C5
+:10203000BEE70124FF220C400020DBE7380000F05F
+:1020400001FB7626431F9F4000237642361A9946AD
+:102050009A469DE70C239946093BFF269A4697E747
+:10206000280000F0EFFA431F9D4076235B42181AC8
+:1020700000229DE780200024C003FF22BAE73D0034
+:102080005246ABE73D0021005246A7E73B0C9C4679
+:102090002A04120C2B0C1400604665463F043F0CCA
+:1020A0007C4342435D437B43270C9B18FF18BA4295
+:1020B00003D980235B029C46654424043A04240C23
+:1020C000121993015C1EA3413F0C920E7D191A4315
+:1020D000AD0115432B0104D501235E466A081D405E
+:1020E000154332007F32002A25DD6B0704D00F2311
+:1020F0002B40042B00D004352B0103D53200274B95
+:1021000080321D40FE2A94DC0124A801400AD2B28C
+:102110000C406FE78020C003074207D0054205D17D
+:1021200028434002400A4446FF2263E73843400206
+:10213000400AFF225EE70124A31A1B2B05DD0C4099
+:102140000022002056E75E46CBE72A002020DA4036
+:10215000C31A9D402B005D1EAB4113435A0704D0A8
+:102160000F221A40042A00D004335A0104D5012456
+:1021700001220C4000203DE701249B01580A0C403D
+:10218000002237E780200124C00328434002400A90
+:102190000C40FF222EE7C04668380000FFFFFFF723
+:1021A000F0B54F46D64646464400C0B5C20F47027A
+:1021B0004802400A844666467B0A4800C90F9A4690
+:1021C000240E1500DB00000E8946F600FF2800D122
+:1021D0008FE001214F464F403900914266D0221ACC
+:1021E000002A00DC9DE000283DD1002E00D18BE0CC
+:1021F000511E002900D0B5E001249B1B5A0144D593
+:102200009B019F09380000F01DFA05388740844281
+:1022100000DD96E0041B3A0020200134E240041B5C
+:10222000A7403B005F1EBB41002413435A0704D064
+:102230000F221A40042A00D004335A0127D5013452
+:10224000FF2C00D179E001229B015B0AE4B22A4015
+:102250005B02E405580AD207204310431CBC904699
+:102260009946A246F0BDFF2CE0D08021C9040E4360
+:102270001B2A7BDC31002020D140821A9640721E3E
+:1022800096410E439B1B5A01BAD45A07D0D1012262
+:10229000DF082A40FF2C33D1002F00D1A8E0802393
+:1022A000DB033B435B025B0AFF24D1E7211A0029D1
+:1022B0004CDD00282AD0FF2CB8D08020C004064373
+:1022C0001B2900DDAFE030002027C840791A8E407E
+:1022D000711E8E4106439B195901D6D50134FF2C3E
+:1022E00000D185E001227A491A405B080B40134374
+:1022F0009CE7002E00D070E76BE73B1EC5D10022A3
+:102300007B025B0AE4B2A3E714008FE7002E4DD0F6
+:10231000481E002857D19B1901245A01B5D5022423
+:10232000E0E7002A25D1621CD2B2012A72DD9F1B90
+:102330007A0135D5F71A0D0064E7012200232A40FF
+:1023400086E73B00634A241A13406FE700296CD1EB
+:10235000611CC8B201284EDDFF2949D09B195B08DA
+:102360000C0063E7FF2A41D00A0081E701269B1B8E
+:1023700089E7002C1CD0FF2821D08024E40452429D
+:1023800023431B2A00DD96E01C002025D440AA1A16
+:1023900093405A1E93412343F31A04000D002DE786
+:1023A000002F00D02EE700220024A9E70C003DE713
+:1023B000002B58D0D243002AEED0FF28E1D13300C1
+:1023C000FF240D0032E7FF2910D0010078E7002B31
+:1023D0006ED0FF24002E00D128E780225146D20380
+:1023E000114203D06146114200D13300FF241DE7A2
+:1023F000FF2400232CE7002CE9D1002B63D0002E12
+:1024000000D113E79B195A0100D43EE7314A0C0072
+:1024100013400BE7002C1ED1002B2FD1002E4FD0E4
+:1024200033000D0002E7012655E7002C1FD1002BD9
+:1024300043D0C94300290BD0FF2839D01B2944DCE5
+:102440001C002027CC40791A8B40591E8B41234316
+:102450009B19040040E7002B1AD1002E24D18027BD
+:102460000022FF031BE7330004000D00DEE6FF2817
+:102470001ED08024E40449422343DFE7002E00D12C
+:10248000D4E69F1B7A0100D437E7F31A0D00CDE69E
+:10249000FF24002E00D1C9E680225046D20310420C
+:1024A000A4D060461042A1D133000D00FF24BDE648
+:1024B0003300FF24BAE601236EE733000400B5E6DB
+:1024C000002700221CE73300B0E60123C0E7C04626
+:1024D000FFFFFF7DFFFFFFFB41024300C20F490AE0
+:1024E0001B0E00207E2B0DDD9D2B0CDC80200004BC
+:1024F0000143952B0ADC9620C31AD9404842002A92
+:1025000000D108007047034BD018FBE7963B994079
+:10251000F4E7C046FFFFFF7F70B5002830D0C31737
+:10252000C4185C40C50F200000F08CF89E231B1AD5
+:10253000962B0DDC9622D21A94402A006402640A7B
+:10254000DBB26402DB05600AD2071843104370BD9A
+:10255000992B19DC9922D21A002A29DD94402200F5
+:10256000144C1440510704D00F210A40042A00D013
+:102570000434620113D4A401640ADBB22A00E0E748
+:10258000002200230024DCE705222100121AD1409A
+:10259000B922D21A9440621E94410C43DAE7054BEB
+:1025A0002A001C409F23A4011B1A640ADBB2C8E75F
+:1025B0002200D5E7FFFFFFFB10B5041E27D000F077
+:1025C00041F89E231B1A962B0ADC9622D21A9440BD
+:1025D0006402640ADBB26402DB05600A184310BDC2
+:1025E000992B17DC9922D21A002A27DD9440220069
+:1025F000134C1440510704D00F210A40042A00D084
+:102600000434620112D4A401640ADBB2E3E70023BC
+:102610000024E0E7B9222100D21A91400A00511E9D
+:102620008A410521091ACC401443DBE7044B1C40C6
+:102630009F23A4011B1A640ADBB2CCE72200D7E770
+:10264000FFFFFFFB1C2101231B04984201D3000C58
+:1026500010391B0A984201D3000A08391B09984215
+:1026600001D30009043902A2105C40187047C0462B
+:10267000040302020101010100000000000000004B
+:1026800070B500260C4D0D4C641BA410A64209D158
+:10269000002601F055F90A4D0A4C641BA410A6420D
+:1026A00005D170BDB300EB5898470136EEE7B30093
+:1026B000EB5898470136F2E74C3900004C390000DE
+:1026C0004C39000050390000002310B59A4200D167
+:1026D00010BDCC5CC4540133F8E703008218934268
+:1026E00000D1704719700133F9E700000FB40B4BAC
+:1026F00013B51C68002C05D0A369002B02D1200063
+:1027000000F0BCF905AB049AA1682000019300F029
+:1027100091FB16BC08BC04B01847C0461800002046
+:102720004A424A41802310B55200DB0000F002F813
+:1027300010BD0000F0B51D004F4B85B01E680400B1
+:102740000F000092002E05D0B369002B02D130009B
+:1027500000F094F9494B9C4250D17468009B022BC5
+:1027600005D0012B00D984E0002D00DA81E02100A2
+:10277000300000F015F9616B002908D023004433C4
+:10278000994202D0300000F085FA002363630023F1
+:10279000A3616360A3891B0603D52169300000F0A3
+:1027A00079FAA389364A1340A381009B022B5AD0A1
+:1027B00003AB02AA2100300000F0F6F9A389184308
+:1027C000A081002D24D1029D280000F059FA019526
+:1027D000071E42D1029B0193AB4239D101204042F6
+:1027E0000223A2891343A3810023A360230047335C
+:1027F000236023610123636105B0F0BD214B9C423E
+:1028000001D1B468AAE7204B9C42A7D1F468A5E7A0
+:10281000002FD9D0B369002B02D1300000F02EF97F
+:10282000009B012B03D1A389009A1A43A28108209F
+:10283000A389276027616561184018D001201840DE
+:102840000023984211D06D42A360A5611800D3E720
+:10285000019800F015FA071EC0D08023A289019DBF
+:102860001343A381D6E70020BAE7A560C4E7A060C0
+:10287000C2E701204042BFE718000020CC3800002A
+:102880005CF3FFFFEC380000AC380000F7B58A8934
+:1028900005000C00130760D44B68002B04DC0B6CA4
+:1028A000002B01DC0020FEBDE76A002FFAD00023D8
+:1028B0002E682B6080235B011A4034D0606DA389A1
+:1028C0005B0706D56368C01A636B002B01D0236CCD
+:1028D000C01A0200216A00232800E76AB847A189CC
+:1028E000431C06D12B681D2B31D82C4ADA40D30764
+:1028F0002DD50023636023692360CB0405D5431CD9
+:1029000002D12B68002B00D16065616B2E6000291D
+:10291000C8D023004433994202D0280000F0BAF90D
+:1029200000206063BFE70123216A2800B847431CE9
+:10293000C5D12B68002BC2D01D2B01D0162B01D185
+:102940002E60AFE74023A2891343A381ABE7402366
+:102950000B430120A3814042A5E70F69002FA1D0BE
+:102960000B680F60DB1B01930023920700D14B69BA
+:10297000A360019B002B00DC94E7019B3A00216AD5
+:102980002800A66AB047002803DC4023A28913432D
+:10299000DFE7019B3F181B1A0193EAE70100402083
+:1029A0000B6970B505000C00002B01D1002070BD33
+:1029B000002804D08369002B01D100F05FF80B4B95
+:1029C0009C4209D16C680C22A35E002BEED0210042
+:1029D0002800FFF75BFFEAE7054B9C4201D1AC689A
+:1029E000F1E7044B9C42EED1EC68ECE7CC380000F8
+:1029F000EC380000AC38000010B5024900F0B2F825
+:102A000010BDC046A1290000002310B504000360DA
+:102A10004360836081814366C28103614361836156
+:102A2000190008225C30FFF758FE054B24626362F0
+:102A3000044BA362044BE362044B236310BDC04606
+:102A4000A1330000C9330000013400002D34000020
+:102A500070B568254A1E55430E002900743100F0F8
+:102A600063F9041E08D000212A00016046600C3082
+:102A7000A0606832FFF731FE200070BD836913B596
+:102A80000400002B28D18364C3640365134B144AEC
+:102A90001B6882620193984201D101238361200067
+:102AA00000F020F86060200000F01CF8A06020001A
+:102AB00000F018F80022E06004216068FFF7A4FF2E
+:102AC00001220921A068FFF79FFF02221221E0687E
+:102AD000FFF79AFF0123A36113BDC046A838000089
+:102AE000F9290000F8B51E4B07001E68B369002BDA
+:102AF00002D13000FFF7C2FF4836B4687368013B6B
+:102B000004D53368002B07D03668F6E70C22A55EA3
+:102B1000002D0DD06834F2E704213800FFF798FF4C
+:102B200030600028F0D10C2304003B602000F8BD89
+:102B3000012320005B42E3810233A38165662560A7
+:102B4000A560656025616561A561082229005C308A
+:102B5000FFF7C3FD6563A563A564E564E6E7C046CA
+:102B6000A8380000F7B5040007000026019148349A
+:102B7000002C01D13000FEBD6368A5680093009B66
+:102B8000013B009301D52468F2E7AB89012B08D9FA
+:102B90000E22AB5E013304D029003800019B984718
+:102BA00006436835EBE7000070B50E001D000E23EC
+:102BB000C95E90B01400002907DA00232B60B389A6
+:102BC0001B0611D48023DB000FE001AA00F026FDD4
+:102BD0000028F2DBF022029B12021340054A9B18E8
+:102BE0005A4253412B60EDE740230020236010B090
+:102BF00070BDC04600E0FFFFF7B502268B890500D7
+:102C00000C00334206D023004733236023610123A5
+:102C10006361F7BD01AB6A46FFF7C6FF0099070085
+:102C2000280000F081F8002808D10C22A35E9A0544
+:102C3000EFD4032293431E43A681E4E70F4BAB621C
+:102C40008023A28920601343A381009B20616361DC
+:102C5000019B002B0DD00E23E15E280000F0F0FC5C
+:102C6000002806D00322A38993431A0001231343AB
+:102C7000A381A0893843A081CBE7C046F929000091
+:102C800010B5034B0100186800F04EF810BDC046A7
+:102C90001800002070B50500002910D00C1F236813
+:102CA000002B00DAE418280000F0FBFC1D4A136832
+:102CB000002B05D163601460280000F0F3FC70BDA8
+:102CC000A34209D9216860188342F3D118685B6870
+:102CD00041182160EEE713005A68002A01D0A24291
+:102CE000F9D919685818A0420BD12068091858184A
+:102CF00019608242E0D110685268411819605A6028
+:102D0000DAE7A04202D90C232B60D5E721686018CE
+:102D1000824203D1106852684118216062605C6091
+:102D2000CAE7C046D0010020032370B5CD1C9D43E7
+:102D3000083506000C2D1ED20C25A9421DD83000E6
+:102D400000F0AFFC254A14682100002919D1244C59
+:102D50002368002B03D1300000F010FB2060290015
+:102D6000300000F00BFB431C2CD10C2330003360EF
+:102D700000F098FC03E0002DDFDA0C233360002024
+:102D800070BD0B685B1B1AD40B2B03D90B60CC18DE
+:102D9000256003E08C420ED163681360300000F0C0
+:102DA00081FC200007220B30231D9043C31AE7D07B
+:102DB0005A42E250E4E74B6863600C00EEE70C0017
+:102DC0004968C2E70323C41C9C43A042E0D0211AF7
+:102DD000300000F0D3FA431CDAD1C6E7D00100205E
+:102DE000D4010020936810B5013B9360002B05DAF5
+:102DF0009469A34208DBCBB20A2B05D01368581C98
+:102E000010601970C8B210BD00F016FBFBE7F8B5F2
+:102E100006000F001400D518AC4201D1002007E0D5
+:102E200021783A003000FFF7DDFF0134431CF3D175
+:102E3000F8BD0000F0B59FB006000F001400059328
+:102E4000002804D08369002B01D1FFF717FE7F4BC8
+:102E50009F425CD17768BB891B0762D53B69002B19
+:102E60005FD0002306AD6B6120336B761033AB76F9
+:102E70000294029C2378002B5DD1029BE31A0493F9
+:102E80000DD0049B029A39003000FFF7C0FF431CAD
+:102E900000D1CCE06A69049B944663446B6123785B
+:102EA000002B00D1C3E00122002352426A6002A934
+:102EB0005432521801342B60EB60AB601370AB6579
+:102EC00021780522624800F0E1FB631C9C46002843
+:102ED00035D12968CB0604D5532302AA20309B188C
+:102EE00018700B0704D553232B2002AA9B181870C7
+:102EF00023782A2B2CD000200A21099B2278303AF3
+:102F0000092A00D86BE000282AD0099328E0514B09
+:102F10009F4201D1B7689EE74F4B9F429BD1F76814
+:102F200099E73900300000F0F1FA002899D001202B
+:102F300040421FB0F0BD252B9FD001349AE7444B8F
+:102F40002968C01A012383400B432B606446B7E70E
+:102F5000059B181D1B680590002B3ADB09936446FE
+:102F600023782E2B0BD16378621C2A2B3FD1059B33
+:102F700002341A1D1B680592002B35DB079321785C
+:102F80000322364800F082FB002807D0334B2A6822
+:102F9000C01A4023834013432B6001342178631C03
+:102FA00006222F480293297600F070FB002844D0B7
+:102FB0002C4B002B2FD12968059B0722C90528D54A
+:102FC0009B189343083305936B69039A9B186B61B5
+:102FD0004FE75B42EB6002230B432B60BFE74B43A1
+:102FE00001349B18012089E701235B42C6E70023D7
+:102FF00014000A201A006B6021783039092903D99E
+:10300000002BBCD00792BAE7424301345218012387
+:10301000F2E70733D5E705AB00933A00124B2900DE
+:10302000300000E000BF0390039B0133CCD1BB898B
+:103030005B0600D57BE70B987BE705AB00933A0076
+:10304000094B2900300000F07FF8ECE7CC38000095
+:103050000C390000EC380000AC38000012390000D8
+:1030600016390000000000000F2E0000F7B5150013
+:1030700001938A680B6900900C00934200DA1300F8
+:1030800022002B6043321278002A01D001332B60DA
+:1030900023689B0602D52B6802332B600627236822
+:1030A0001F4027D0230043331B785A1E93412268C8
+:1030B000920630D42200019943320098089EB0470E
+:1030C000431C25D0062320682A68E16803400025B8
+:1030D000042B03D18D1AEB43DB171D40A368226933
+:1030E000934201DD9B1AED180027BD4220D100203C
+:1030F00010E00137E3682A689B1A9F42D2DA220067
+:103100000123193201990098089EB047431CF0D161
+:1031100001204042FEBD3020E118433108702100FB
+:103120005A1C45310978A218433202331170C1E7A5
+:10313000220001231A3201990098089EB047431CCF
+:10314000E6D00137D1E70000F0B58BB006920A0057
+:1031500043320793059004920A7E0C00109B6E2A5E
+:1031600000D18FE017D8632A2CD008D8002A00D1CC
+:1031700099E0582A54D026004236327029E0642A59
+:1031800001D0692AF7D121681A68080623D5111DD4
+:103190001960156825E0732A00D188E008D86F2AE5
+:1031A00029D0702AE7D1202209680A43226003E06F
+:1031B000752A20D0782ADED122007821453211707C
+:1031C0006C4A30E00E001A684236111D196013680F
+:1031D0003370012379E04906D9D5111D1960002308
+:1031E000D55E002D03DA2D23049A6D421370624BD5
+:1031F0000A2703932FE020681968050603D5081DE8
+:1032000018600D6805E04006F9D50D68081D1860C6
+:10321000ADB2594B082703936F2A18D00A2716E03E
+:1032200045310A70544A03921A682168101D1860CB
+:103230001568080622D5CB0702D520231943216043
+:103240001027002D03D1202322689A4322602300F7
+:10325000002243331A706368A360002B5CDB0422F6
+:10326000216891432160002D58D1049E002B64D029
+:103270002600039B42361B7833705EE04806DAD5A1
+:10328000ADB2D8E709681A68080605D5111D19609E
+:10329000136862691A6006E04906F7D5111D1960C6
+:1032A0001368A28A1A800023049E236154E01A68DE
+:1032B000111D1960166800216268300000F0E6F9FF
+:1032C000002801D0801B6060636823610023049A9A
+:1032D000137041E02369320006990598079DA847BD
+:1032E000431C43D0236800259B070FD4099BE0684B
+:1032F00098423DDA18003BE022000123193206997A
+:103300000598079EB047431C30D00135E368099A01
+:103310009B1A9D42F0DBE9E7002DA9D0049E28000E
+:103320003900FEF7EDFD039B013E5B5C2800337026
+:103330003900FEF75FFD051EF1D1082F09D1236882
+:10334000DB0706D563682269934202DC3023013E25
+:103350003370049B9B1B2361079B09AA00932100E8
+:10336000069B0598FFF782FE431CB3D10120404223
+:103370000BB0F0BD2E3900001D390000002370B5E0
+:10338000064C050008002360FEF7D4FC431C03D163
+:103390002368002B00D02B6070BDC0469C0200202B
+:1033A00070B50C000E25495F00F07EF9002803DBA4
+:1033B000636D1B18636570BDA389024A1340A38126
+:1033C000F9E7C046FFEFFFFFF8B51F008B89050046
+:1033D0000C001600DB0505D50E23C95E0022022372
+:1033E00000F040F9A389054A28001340A381320068
+:1033F0000E23E15E3B0000F075F8F8BDFFEFFFFF24
+:1034000070B50C000E25495F00F02CF9A389421C11
+:1034100003D1054A1340A38170BD8022520113439A
+:10342000A3816065F8E7C046FFEFFFFF10B50E23EC
+:10343000C95E00F0E1F810BDF8B505000E001400FB
+:10344000002804D08369002B01D1FFF717FB224B22
+:103450009C422DD16C68A369A360A3891B0731D559
+:103460002369002B2ED023682269F7B2981A63696A
+:10347000F6B2984205DB21002800FFF791FA0028F8
+:1034800026D1A3680130013BA36023685A1C226047
+:103490001F706369984204D0A389DB071AD50A2EEE
+:1034A00018D121002800FFF77BFA002812D00FE086
+:1034B0000A4B9C4201D1AC68CDE7094B9C42CAD172
+:1034C000EC68C8E72100280000F020F80028CAD0E6
+:1034D000012676423000F8BDCC380000EC38000000
+:1034E000AC38000070B50500080011000022064C41
+:1034F00022601A00FDF7B8FB431C03D12368002BA0
+:1035000000D02B6070BDC0469C020020364B70B5C9
+:103510001D6806000C00002D05D0AB69002B02D100
+:103520002800FFF7ABFA314B9C420FD16C680C239B
+:10353000E25E93B219072DD4D90611D409230120D4
+:10354000336037331343A381404270BD284B9C4204
+:1035500001D1AC68EBE7274B9C42E8D1EC68E6E789
+:103560005B0713D5616B002908D0230044339942CF
+:1035700002D03000FFF78EFB002363632422A3896F
+:103580009343A38100236360236923600823A289F6
+:103590001343A3812369002B0BD1A0218022A3898F
+:1035A000890092000B40934203D021003000FFF7C6
+:1035B00023FB0123A289134011D00023A360636978
+:1035C0005B42A361002023698342BED10C23E25EEB
+:1035D0001306BAD540231343A3810138B5E79207F8
+:1035E00000D46369A360EDE718000020CC38000028
+:1035F000EC380000AC380000002370B5064C050024
+:1036000008002360FEF7A8FB431C03D12368002BAE
+:1036100000D02B6070BDC0469C020020002370B516
+:10362000064C0500080011002360FEF798FB431CC0
+:1036300003D12368002B00D02B6070BD9C020020BA
+:10364000002370B5064C050008002360FEF78CFBD4
+:10365000431C03D12368002B00D02B6070BDC046F3
+:103660009C02002070B50500080011000022064CE5
+:1036700022601A00FEF77AFB431C03D12368002B5B
+:1036800000D02B6070BDC0469C020020C9B28218D9
+:10369000904201D10020704703788B42FBD001306B
+:1036A000F6E770477047000070B50500080011008C
+:1036B0000022064C22601A00FDF7B4FA431C03D125
+:1036C0002368002B00D02B6070BDC0469C020020F8
+:1036D000FA0200004005000040050000400500001F
+:1036E00040050000400500004005000040050000C6
+:1036F00040050000400500004005000040050000B6
+:1037000040050000400500004005000040050000A5
+:10371000E2020000400500004005000040050000F6
+:103720004005000040050000400500004005000085
+:103730004005000040050000400500004005000075
+:103740004005000040050000400500004005000065
+:10375000F2020000400500004005000040050000A6
+:103760004005000040050000400500004005000045
+:103770004005000040050000400500004005000035
+:103780004005000040050000400500004005000025
+:10379000EA02000002030000CA020000DA02000090
+:1037A000D202000002000000030000002800000018
+:1037B00029000000040000000500000006000000D1
+:1037C000070000002000000021000000220000008F
+:1037D0002300000024000000250000002600000057
+:1037E0002700000008000000090000000A00000097
+:1037F0000B00000000080042000C004200100042D4
+:103800000014004200180042001C0042BE160000D6
+:10381000BA160000BA16000020170000201700009A
+:10382000D2160000C4160000D81600000E170000C3
+:10383000A81700008817000088170000141800005F
+:103840009A170000B61700008C170000C41700007C
+:1038500004180000566F6C746167653A2025642E69
+:10386000253033640D0A00008C200000DC1F0000AE
+:10387000DC1F0000DA1F00007E2000007E20000018
+:1038800074200000DA1F00007E2000007420000079
+:103890007E200000DA1F0000842000008420000049
+:1038A00084200000142100001C0000200000000003
+:1038B0000000000000000000000000000000000008
+:1038C00000000000000000000000000000000000F8
+:1038D00000000000000000000000000000000000E8
+:1038E00000000000000000000000000000000000D8
+:1038F00000000000000000000000000000000000C8
+:10390000000000000000000000000000232D302B0C
+:103910002000686C4C0065666745464700303132D0
+:103920003334353637383941424344454600303127
+:103930003233343536373839616263646566000086
+:10394000F8B5C046F8BC08BC9E467047DD000000D4
+:10395000F8B5C046F8BC08BC9E467047B5000000EC
+:10396000000000000000000005000000401F0000F3
+:1039700008000000010000001C0000200000000002
+:10398000CC380000EC380000AC380000000000002B
+:103990000000000000000000000000000000000027
+:1039A0000000000000000000000000000000000017
+:1039B0000000000000000000000000000000000007
+:1039C00000000000000000000000000000000000F7
+:0C39D000000000000000000000000000EB
+:0400000300001C518C
+:00000001FF
diff --git a/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.lss b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.lss
new file mode 100644
index 0000000..8f4674e
--- /dev/null
+++ b/D21_ADC_with_DMA/Debug/D21_ADC_with_DMA.lss
@@ -0,0 +1,9180 @@
+
+D21_ADC_with_DMA.elf: file format elf32-littlearm
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .text 00003960 00000000 00000000 00010000 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 1 .relocate 0000007c 20000000 00003960 00020000 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 2 .bss 00000220 20000080 000039e0 0002007c 2**4
+ ALLOC
+ 3 .stack 00002000 200002a0 00003c00 0002007c 2**0
+ ALLOC
+ 4 .ARM.attributes 00000028 00000000 00000000 0002007c 2**0
+ CONTENTS, READONLY
+ 5 .comment 00000059 00000000 00000000 000200a4 2**0
+ CONTENTS, READONLY
+ 6 .debug_info 0002e296 00000000 00000000 000200fd 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 7 .debug_abbrev 00004281 00000000 00000000 0004e393 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 8 .debug_loc 00004e91 00000000 00000000 00052614 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 9 .debug_aranges 00000548 00000000 00000000 000574a5 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000610 00000000 00000000 000579ed 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 11 .debug_macro 0001ca44 00000000 00000000 00057ffd 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 12 .debug_line 0000e317 00000000 00000000 00074a41 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 13 .debug_str 00090169 00000000 00000000 00082d58 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 14 .debug_frame 000014c8 00000000 00000000 00112ec4 2**2
+ CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 :
+ 0: a0 22 00 20 51 1c 00 00 4d 1c 00 00 4d 1c 00 00 .". Q...M...M...
+ ...
+ 2c: 4d 1c 00 00 00 00 00 00 00 00 00 00 4d 1c 00 00 M...........M...
+ 3c: 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 M...M...M...M...
+ 4c: 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 4d 05 00 00 M...M...M...M...
+ 5c: 4d 1c 00 00 4d 1c 00 00 15 15 00 00 25 15 00 00 M...M.......%...
+ 6c: 35 15 00 00 45 15 00 00 55 15 00 00 65 15 00 00 5...E...U...e...
+ 7c: 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 M...M...M...M...
+ 8c: 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 M...M...M...M...
+ 9c: 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 4d 1c 00 00 M...M...M...M...
+ ac: 4d 1c 00 00 00 00 00 00 M.......
+
+000000b4 <__do_global_dtors_aux>:
+ b4: b510 push {r4, lr}
+ b6: 4c06 ldr r4, [pc, #24] ; (d0 <__do_global_dtors_aux+0x1c>)
+ b8: 7823 ldrb r3, [r4, #0]
+ ba: 2b00 cmp r3, #0
+ bc: d107 bne.n ce <__do_global_dtors_aux+0x1a>
+ be: 4b05 ldr r3, [pc, #20] ; (d4 <__do_global_dtors_aux+0x20>)
+ c0: 2b00 cmp r3, #0
+ c2: d002 beq.n ca <__do_global_dtors_aux+0x16>
+ c4: 4804 ldr r0, [pc, #16] ; (d8 <__do_global_dtors_aux+0x24>)
+ c6: e000 b.n ca <__do_global_dtors_aux+0x16>
+ c8: bf00 nop
+ ca: 2301 movs r3, #1
+ cc: 7023 strb r3, [r4, #0]
+ ce: bd10 pop {r4, pc}
+ d0: 20000080 .word 0x20000080
+ d4: 00000000 .word 0x00000000
+ d8: 00003960 .word 0x00003960
+
+000000dc :
+ dc: 4b08 ldr r3, [pc, #32] ; (100 )
+ de: b510 push {r4, lr}
+ e0: 2b00 cmp r3, #0
+ e2: d003 beq.n ec
+ e4: 4907 ldr r1, [pc, #28] ; (104 )
+ e6: 4808 ldr r0, [pc, #32] ; (108 )
+ e8: e000 b.n ec
+ ea: bf00 nop
+ ec: 4807 ldr r0, [pc, #28] ; (10c )
+ ee: 6803 ldr r3, [r0, #0]
+ f0: 2b00 cmp r3, #0
+ f2: d100 bne.n f6
+ f4: bd10 pop {r4, pc}
+ f6: 4b06 ldr r3, [pc, #24] ; (110 )
+ f8: 2b00 cmp r3, #0
+ fa: d0fb beq.n f4
+ fc: 4798 blx r3
+ fe: e7f9 b.n f4
+ 100: 00000000 .word 0x00000000
+ 104: 20000084 .word 0x20000084
+ 108: 00003960 .word 0x00003960
+ 10c: 00003960 .word 0x00003960
+ 110: 00000000 .word 0x00000000
+
+00000114 :
+ *
+ * \param[out] config Pointer to configuration struct to initialize to
+ * default values
+ */
+void adc_get_config_defaults(struct adc_config *const config)
+{
+ 114: b510 push {r4, lr}
+ Assert(config);
+ config->clock_source = GCLK_GENERATOR_0;
+ 116: 2200 movs r2, #0
+ 118: 2300 movs r3, #0
+ 11a: 7002 strb r2, [r0, #0]
+ config->reference = ADC_REFERENCE_INT1V;
+ 11c: 7042 strb r2, [r0, #1]
+ config->clock_prescaler = ADC_CLOCK_PRESCALER_DIV4;
+ 11e: 2100 movs r1, #0
+ 120: 8042 strh r2, [r0, #2]
+ config->resolution = ADC_RESOLUTION_12BIT;
+ 122: 7101 strb r1, [r0, #4]
+ config->window.window_mode = ADC_WINDOW_MODE_DISABLE;
+ 124: 7603 strb r3, [r0, #24]
+ config->window.window_upper_value = 0;
+ 126: 6202 str r2, [r0, #32]
+ config->window.window_lower_value = 0;
+ 128: 61c2 str r2, [r0, #28]
+ config->gain_factor = ADC_GAIN_FACTOR_1X;
+ 12a: 6082 str r2, [r0, #8]
+#if SAMR21
+ config->positive_input = ADC_POSITIVE_INPUT_PIN6 ;
+#else
+ config->positive_input = ADC_POSITIVE_INPUT_PIN0 ;
+ 12c: 7303 strb r3, [r0, #12]
+#endif
+ config->negative_input = ADC_NEGATIVE_INPUT_GND ;
+ 12e: 24c0 movs r4, #192 ; 0xc0
+ 130: 0164 lsls r4, r4, #5
+ 132: 81c4 strh r4, [r0, #14]
+ config->accumulate_samples = ADC_ACCUMULATE_DISABLE;
+ 134: 7403 strb r3, [r0, #16]
+ config->divide_result = ADC_DIVIDE_RESULT_DISABLE;
+ 136: 7443 strb r3, [r0, #17]
+ config->left_adjust = false;
+ 138: 7483 strb r3, [r0, #18]
+ config->differential_mode = false;
+ 13a: 74c3 strb r3, [r0, #19]
+ config->freerunning = false;
+ 13c: 7503 strb r3, [r0, #20]
+ config->event_action = ADC_EVENT_ACTION_DISABLED;
+ 13e: 242a movs r4, #42 ; 0x2a
+ 140: 5503 strb r3, [r0, r4]
+ config->run_in_standby = false;
+ 142: 7543 strb r3, [r0, #21]
+ config->reference_compensation_enable = false;
+ 144: 7583 strb r3, [r0, #22]
+ config->correction.correction_enable = false;
+ 146: 3c06 subs r4, #6
+ 148: 5503 strb r3, [r0, r4]
+ config->correction.gain_correction = ADC_GAINCORR_RESETVALUE;
+ 14a: 84c2 strh r2, [r0, #38] ; 0x26
+ config->correction.offset_correction = ADC_OFFSETCORR_RESETVALUE;
+ 14c: 8502 strh r2, [r0, #40] ; 0x28
+ config->sample_length = 0;
+ 14e: 75c1 strb r1, [r0, #23]
+ config->pin_scan.offset_start_scan = 0;
+ 150: 232b movs r3, #43 ; 0x2b
+ 152: 54c1 strb r1, [r0, r3]
+ config->pin_scan.inputs_to_scan = 0;
+ 154: 3301 adds r3, #1
+ 156: 54c1 strb r1, [r0, r3]
+}
+ 158: bd10 pop {r4, pc}
+ ...
+
+0000015c :
+ */
+enum status_code adc_init(
+ struct adc_module *const module_inst,
+ Adc *hw,
+ struct adc_config *config)
+{
+ 15c: b5f0 push {r4, r5, r6, r7, lr}
+ 15e: 46d6 mov lr, sl
+ 160: 464f mov r7, r9
+ 162: 4646 mov r6, r8
+ 164: b5c0 push {r6, r7, lr}
+ 166: b096 sub sp, #88 ; 0x58
+ 168: 0007 movs r7, r0
+ 16a: 0016 movs r6, r2
+ Assert(module_inst);
+ Assert(hw);
+ Assert(config);
+
+ /* Associate the software module instance with the hardware module */
+ module_inst->hw = hw;
+ 16c: 6001 str r1, [r0, #0]
+ case SYSTEM_CLOCK_APB_APBB:
+ PM->APBBMASK.reg |= mask;
+ break;
+
+ case SYSTEM_CLOCK_APB_APBC:
+ PM->APBCMASK.reg |= mask;
+ 16e: 4acb ldr r2, [pc, #812] ; (49c )
+ 170: 6a10 ldr r0, [r2, #32]
+ 172: 2380 movs r3, #128 ; 0x80
+ 174: 025b lsls r3, r3, #9
+ 176: 4303 orrs r3, r0
+ 178: 6213 str r3, [r2, #32]
+
+ /* Turn on the digital interface clock */
+ system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, PM_APBCMASK_ADC);
+
+ if (hw->CTRLA.reg & ADC_CTRLA_SWRST) {
+ 17a: 780b ldrb r3, [r1, #0]
+ /* We are in the middle of a reset. Abort. */
+ return STATUS_BUSY;
+ 17c: 2005 movs r0, #5
+ if (hw->CTRLA.reg & ADC_CTRLA_SWRST) {
+ 17e: 07db lsls r3, r3, #31
+ 180: d505 bpl.n 18e
+ }
+#endif
+
+ /* Write configuration to module */
+ return _adc_set_config(module_inst, config);
+}
+ 182: b016 add sp, #88 ; 0x58
+ 184: bc1c pop {r2, r3, r4}
+ 186: 4690 mov r8, r2
+ 188: 4699 mov r9, r3
+ 18a: 46a2 mov sl, r4
+ 18c: bdf0 pop {r4, r5, r6, r7, pc}
+ if (hw->CTRLA.reg & ADC_CTRLA_ENABLE) {
+ 18e: 780b ldrb r3, [r1, #0]
+ return STATUS_ERR_DENIED;
+ 190: 3017 adds r0, #23
+ if (hw->CTRLA.reg & ADC_CTRLA_ENABLE) {
+ 192: 079b lsls r3, r3, #30
+ 194: d4f5 bmi.n 182
+ module_inst->reference = config->reference;
+ 196: 7873 ldrb r3, [r6, #1]
+ 198: 713b strb r3, [r7, #4]
+ if (module_inst->reference == ADC_REFERENCE_INT1V) {
+ 19a: 2b00 cmp r3, #0
+ 19c: d104 bne.n 1a8
+ case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
+ SYSCTRL->VREF.reg |= SYSCTRL_VREF_TSEN;
+ break;
+
+ case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
+ SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN;
+ 19e: 4ac0 ldr r2, [pc, #768] ; (4a0 )
+ 1a0: 6c13 ldr r3, [r2, #64] ; 0x40
+ 1a2: 2104 movs r1, #4
+ 1a4: 430b orrs r3, r1
+ 1a6: 6413 str r3, [r2, #64] ; 0x40
+ Adc *const adc_module = module_inst->hw;
+ 1a8: 683b ldr r3, [r7, #0]
+ 1aa: 4698 mov r8, r3
+ gclk_chan_conf.source_generator = config->clock_source;
+ 1ac: 7833 ldrb r3, [r6, #0]
+ 1ae: 466a mov r2, sp
+ 1b0: 7013 strb r3, [r2, #0]
+ system_gclk_chan_set_config(ADC_GCLK_ID, &gclk_chan_conf);
+ 1b2: 4669 mov r1, sp
+ 1b4: 201e movs r0, #30
+ 1b6: 4bbb ldr r3, [pc, #748] ; (4a4 )
+ 1b8: 4798 blx r3
+ system_gclk_chan_enable(ADC_GCLK_ID);
+ 1ba: 201e movs r0, #30
+ 1bc: 4bba ldr r3, [pc, #744] ; (4a8 )
+ 1be: 4798 blx r3
+ if (config->pin_scan.inputs_to_scan != 0) {
+ 1c0: 232c movs r3, #44 ; 0x2c
+ 1c2: 5cf2 ldrb r2, [r6, r3]
+ 1c4: 2a00 cmp r2, #0
+ 1c6: d054 beq.n 272
+ uint8_t offset = config->pin_scan.offset_start_scan;
+ 1c8: 3b01 subs r3, #1
+ 1ca: 5cf5 ldrb r5, [r6, r3]
+ uint8_t start_pin =
+ 1cc: 7b33 ldrb r3, [r6, #12]
+ 1ce: 18eb adds r3, r5, r3
+ 1d0: b2db uxtb r3, r3
+ uint8_t end_pin =
+ 1d2: 18d1 adds r1, r2, r3
+ while (start_pin < end_pin) {
+ 1d4: b2c9 uxtb r1, r1
+ 1d6: 428b cmp r3, r1
+ 1d8: d221 bcs.n 21e
+ 1da: 1952 adds r2, r2, r5
+ 1dc: b2d3 uxtb r3, r2
+ 1de: 4699 mov r9, r3
+ const uint32_t pinmapping[] = {
+ 1e0: 4bb2 ldr r3, [pc, #712] ; (4ac )
+ 1e2: 469a mov sl, r3
+ 1e4: e003 b.n 1ee
+ offset++;
+ 1e6: 3501 adds r5, #1
+ 1e8: b2ed uxtb r5, r5
+ while (start_pin < end_pin) {
+ 1ea: 45a9 cmp r9, r5
+ 1ec: d017 beq.n 21e
+ _adc_configure_ain_pin((offset % 16)+(uint8_t)config->positive_input);
+ 1ee: 240f movs r4, #15
+ 1f0: 402c ands r4, r5
+ 1f2: 7b33 ldrb r3, [r6, #12]
+ 1f4: 18e4 adds r4, r4, r3
+ const uint32_t pinmapping[] = {
+ 1f6: 2250 movs r2, #80 ; 0x50
+ 1f8: 49ad ldr r1, [pc, #692] ; (4b0 )
+ 1fa: a802 add r0, sp, #8
+ 1fc: 47d0 blx sl
+ if (pin <= ADC_EXTCHANNEL_MSB) {
+ 1fe: 2c13 cmp r4, #19
+ 200: d8f1 bhi.n 1e6
+ pin_map_result = pinmapping[pin >> ADC_INPUTCTRL_MUXPOS_Pos];
+ 202: 00a4 lsls r4, r4, #2
+ 204: ab02 add r3, sp, #8
+ 206: 58e0 ldr r0, [r4, r3]
+ /* Sanity check arguments */
+ Assert(config);
+
+ /* Default configuration values */
+ config->mux_position = SYSTEM_PINMUX_GPIO;
+ config->direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
+ 208: a901 add r1, sp, #4
+ 20a: 2300 movs r3, #0
+ 20c: 704b strb r3, [r1, #1]
+ config->input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
+ config->powersave = false;
+ 20e: 70cb strb r3, [r1, #3]
+ config.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
+ 210: 708b strb r3, [r1, #2]
+ config.mux_position = 1;
+ 212: 3301 adds r3, #1
+ 214: 700b strb r3, [r1, #0]
+ system_pinmux_pin_set_config(pin_map_result, &config);
+ 216: b2c0 uxtb r0, r0
+ 218: 4ba6 ldr r3, [pc, #664] ; (4b4 )
+ 21a: 4798 blx r3
+ 21c: e7e3 b.n 1e6
+ _adc_configure_ain_pin(config->negative_input);
+ 21e: 89f4 ldrh r4, [r6, #14]
+ const uint32_t pinmapping[] = {
+ 220: 2250 movs r2, #80 ; 0x50
+ 222: 49a3 ldr r1, [pc, #652] ; (4b0 )
+ 224: a802 add r0, sp, #8
+ 226: 4ba1 ldr r3, [pc, #644] ; (4ac )
+ 228: 4798 blx r3
+ if (pin <= ADC_EXTCHANNEL_MSB) {
+ 22a: 2c13 cmp r4, #19
+ 22c: d913 bls.n 256
+ adc_module->CTRLA.reg = (config->run_in_standby << ADC_CTRLA_RUNSTDBY_Pos);
+ 22e: 7d73 ldrb r3, [r6, #21]
+ 230: 009b lsls r3, r3, #2
+ 232: b2db uxtb r3, r3
+ 234: 4642 mov r2, r8
+ 236: 7013 strb r3, [r2, #0]
+ (config->reference_compensation_enable << ADC_REFCTRL_REFCOMP_Pos) |
+ 238: 7db3 ldrb r3, [r6, #22]
+ 23a: 01db lsls r3, r3, #7
+ 23c: 7872 ldrb r2, [r6, #1]
+ 23e: 4313 orrs r3, r2
+ 240: b2db uxtb r3, r3
+ adc_module->REFCTRL.reg =
+ 242: 4642 mov r2, r8
+ 244: 7053 strb r3, [r2, #1]
+ switch (config->resolution) {
+ 246: 7933 ldrb r3, [r6, #4]
+ 248: 2b34 cmp r3, #52 ; 0x34
+ 24a: d900 bls.n 24e
+ 24c: e178 b.n 540
+ 24e: 009b lsls r3, r3, #2
+ 250: 4a99 ldr r2, [pc, #612] ; (4b8 )
+ 252: 58d3 ldr r3, [r2, r3]
+ 254: 469f mov pc, r3
+ pin_map_result = pinmapping[pin >> ADC_INPUTCTRL_MUXPOS_Pos];
+ 256: 00a4 lsls r4, r4, #2
+ 258: ab02 add r3, sp, #8
+ 25a: 58e0 ldr r0, [r4, r3]
+ config->direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
+ 25c: a901 add r1, sp, #4
+ 25e: 2300 movs r3, #0
+ 260: 704b strb r3, [r1, #1]
+ config->powersave = false;
+ 262: 70cb strb r3, [r1, #3]
+ config.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
+ 264: 708b strb r3, [r1, #2]
+ config.mux_position = 1;
+ 266: 3301 adds r3, #1
+ 268: 700b strb r3, [r1, #0]
+ system_pinmux_pin_set_config(pin_map_result, &config);
+ 26a: b2c0 uxtb r0, r0
+ 26c: 4b91 ldr r3, [pc, #580] ; (4b4 )
+ 26e: 4798 blx r3
+ 270: e7dd b.n 22e
+ _adc_configure_ain_pin(config->positive_input);
+ 272: 7b34 ldrb r4, [r6, #12]
+ const uint32_t pinmapping[] = {
+ 274: 2250 movs r2, #80 ; 0x50
+ 276: 498e ldr r1, [pc, #568] ; (4b0 )
+ 278: a802 add r0, sp, #8
+ 27a: 4b8c ldr r3, [pc, #560] ; (4ac )
+ 27c: 4798 blx r3
+ if (pin <= ADC_EXTCHANNEL_MSB) {
+ 27e: 2c13 cmp r4, #19
+ 280: d915 bls.n 2ae
+ _adc_configure_ain_pin(config->negative_input);
+ 282: 89f4 ldrh r4, [r6, #14]
+ const uint32_t pinmapping[] = {
+ 284: 2250 movs r2, #80 ; 0x50
+ 286: 498a ldr r1, [pc, #552] ; (4b0 )
+ 288: a802 add r0, sp, #8
+ 28a: 4b88 ldr r3, [pc, #544] ; (4ac )
+ 28c: 4798 blx r3
+ if (pin <= ADC_EXTCHANNEL_MSB) {
+ 28e: 2c13 cmp r4, #19
+ 290: d8cd bhi.n 22e
+ pin_map_result = pinmapping[pin >> ADC_INPUTCTRL_MUXPOS_Pos];
+ 292: 00a4 lsls r4, r4, #2
+ 294: ab02 add r3, sp, #8
+ 296: 58e0 ldr r0, [r4, r3]
+ config->direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
+ 298: a901 add r1, sp, #4
+ 29a: 2300 movs r3, #0
+ 29c: 704b strb r3, [r1, #1]
+ config->powersave = false;
+ 29e: 70cb strb r3, [r1, #3]
+ config.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
+ 2a0: 708b strb r3, [r1, #2]
+ config.mux_position = 1;
+ 2a2: 3301 adds r3, #1
+ 2a4: 700b strb r3, [r1, #0]
+ system_pinmux_pin_set_config(pin_map_result, &config);
+ 2a6: b2c0 uxtb r0, r0
+ 2a8: 4b82 ldr r3, [pc, #520] ; (4b4 )
+ 2aa: 4798 blx r3
+ 2ac: e7bf b.n 22e
+ pin_map_result = pinmapping[pin >> ADC_INPUTCTRL_MUXPOS_Pos];
+ 2ae: 00a4 lsls r4, r4, #2
+ 2b0: ab02 add r3, sp, #8
+ 2b2: 58e0 ldr r0, [r4, r3]
+ config->direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
+ 2b4: a901 add r1, sp, #4
+ 2b6: 2300 movs r3, #0
+ 2b8: 704b strb r3, [r1, #1]
+ config->powersave = false;
+ 2ba: 70cb strb r3, [r1, #3]
+ config.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
+ 2bc: 708b strb r3, [r1, #2]
+ config.mux_position = 1;
+ 2be: 3301 adds r3, #1
+ 2c0: 700b strb r3, [r1, #0]
+ system_pinmux_pin_set_config(pin_map_result, &config);
+ 2c2: b2c0 uxtb r0, r0
+ 2c4: 4b7b ldr r3, [pc, #492] ; (4b4 )
+ 2c6: 4798 blx r3
+ 2c8: e7db b.n 282
+ accumulate = ADC_ACCUMULATE_SAMPLES_16;
+ 2ca: 2304 movs r3, #4
+ resolution = ADC_RESOLUTION_16BIT;
+ 2cc: 2410 movs r4, #16
+ adjres = ADC_DIVIDE_RESULT_4;
+ 2ce: 2102 movs r1, #2
+ 2d0: e01a b.n 308
+ adjres = config->divide_result;
+ 2d2: 7c71 ldrb r1, [r6, #17]
+ accumulate = config->accumulate_samples;
+ 2d4: 7c33 ldrb r3, [r6, #16]
+ resolution = ADC_RESOLUTION_16BIT;
+ 2d6: 2410 movs r4, #16
+ 2d8: e016 b.n 308
+ accumulate = ADC_ACCUMULATE_SAMPLES_64;
+ 2da: 2306 movs r3, #6
+ resolution = ADC_RESOLUTION_16BIT;
+ 2dc: 2410 movs r4, #16
+ adjres = ADC_DIVIDE_RESULT_2;
+ 2de: 2101 movs r1, #1
+ 2e0: e012 b.n 308
+ accumulate = ADC_ACCUMULATE_SAMPLES_256;
+ 2e2: 2308 movs r3, #8
+ resolution = ADC_RESOLUTION_16BIT;
+ 2e4: 2410 movs r4, #16
+ adjres = ADC_DIVIDE_RESULT_DISABLE;
+ 2e6: 2100 movs r1, #0
+ 2e8: e00e b.n 308
+ enum adc_accumulate_samples accumulate = ADC_ACCUMULATE_DISABLE;
+ 2ea: 2300 movs r3, #0
+ resolution = ADC_RESOLUTION_8BIT;
+ 2ec: 2430 movs r4, #48 ; 0x30
+ uint8_t adjres = 0;
+ 2ee: 2100 movs r1, #0
+ 2f0: e00a b.n 308
+ enum adc_accumulate_samples accumulate = ADC_ACCUMULATE_DISABLE;
+ 2f2: 2300 movs r3, #0
+ resolution = ADC_RESOLUTION_10BIT;
+ 2f4: 2420 movs r4, #32
+ uint8_t adjres = 0;
+ 2f6: 2100 movs r1, #0
+ 2f8: e006 b.n 308
+ enum adc_accumulate_samples accumulate = ADC_ACCUMULATE_DISABLE;
+ 2fa: 2300 movs r3, #0
+ resolution = ADC_RESOLUTION_12BIT;
+ 2fc: 2400 movs r4, #0
+ uint8_t adjres = 0;
+ 2fe: 2100 movs r1, #0
+ 300: e002 b.n 308
+ accumulate = ADC_ACCUMULATE_SAMPLES_4;
+ 302: 2302 movs r3, #2
+ resolution = ADC_RESOLUTION_16BIT;
+ 304: 2410 movs r4, #16
+ adjres = ADC_DIVIDE_RESULT_2;
+ 306: 2101 movs r1, #1
+ adc_module->AVGCTRL.reg = ADC_AVGCTRL_ADJRES(adjres) | accumulate;
+ 308: 0109 lsls r1, r1, #4
+ 30a: 2270 movs r2, #112 ; 0x70
+ 30c: 400a ands r2, r1
+ 30e: 4313 orrs r3, r2
+ 310: 4642 mov r2, r8
+ 312: 7093 strb r3, [r2, #2]
+ if (config->sample_length > 63) {
+ 314: 7df3 ldrb r3, [r6, #23]
+ return STATUS_ERR_INVALID_ARG;
+ 316: 2017 movs r0, #23
+ if (config->sample_length > 63) {
+ 318: 2b3f cmp r3, #63 ; 0x3f
+ 31a: d900 bls.n 31e
+ 31c: e731 b.n 182
+ adc_module->SAMPCTRL.reg =
+ 31e: 70d3 strb r3, [r2, #3]
+ struct adc_module *const module_inst)
+{
+ /* Sanity check arguments */
+ Assert(module_inst);
+
+ Adc *const adc_module = module_inst->hw;
+ 320: 683a ldr r2, [r7, #0]
+
+ if (adc_module->STATUS.reg & ADC_STATUS_SYNCBUSY) {
+ 322: 7e53 ldrb r3, [r2, #25]
+ while (adc_is_syncing(module_inst)) {
+ 324: b25b sxtb r3, r3
+ 326: 2b00 cmp r3, #0
+ 328: dbfb blt.n 322
+ (config->differential_mode << ADC_CTRLB_DIFFMODE_Pos);
+ 32a: 7cf3 ldrb r3, [r6, #19]
+ (config->left_adjust << ADC_CTRLB_LEFTADJ_Pos) |
+ 32c: 8872 ldrh r2, [r6, #2]
+ 32e: 4313 orrs r3, r2
+ (config->correction.correction_enable << ADC_CTRLB_CORREN_Pos) |
+ 330: 2224 movs r2, #36 ; 0x24
+ 332: 5cb2 ldrb r2, [r6, r2]
+ 334: 00d2 lsls r2, r2, #3
+ (config->left_adjust << ADC_CTRLB_LEFTADJ_Pos) |
+ 336: 4313 orrs r3, r2
+ (config->freerunning << ADC_CTRLB_FREERUN_Pos) |
+ 338: 7d32 ldrb r2, [r6, #20]
+ 33a: 0092 lsls r2, r2, #2
+ (config->left_adjust << ADC_CTRLB_LEFTADJ_Pos) |
+ 33c: 4313 orrs r3, r2
+ 33e: 7cb2 ldrb r2, [r6, #18]
+ 340: 0052 lsls r2, r2, #1
+ 342: 4313 orrs r3, r2
+ 344: 4323 orrs r3, r4
+ adc_module->CTRLB.reg =
+ 346: 4642 mov r2, r8
+ 348: 8093 strh r3, [r2, #4]
+ if (config->window.window_mode != ADC_WINDOW_MODE_DISABLE) {
+ 34a: 7e33 ldrb r3, [r6, #24]
+ 34c: 2b00 cmp r3, #0
+ 34e: d020 beq.n 392
+ switch (resolution) {
+ 350: 2c10 cmp r4, #16
+ 352: d100 bne.n 356
+ 354: e0d6 b.n 504
+ 356: d800 bhi.n 35a
+ 358: e080 b.n 45c
+ 35a: 2c20 cmp r4, #32
+ 35c: d100 bne.n 360
+ 35e: e0b3 b.n 4c8
+ 360: 2c30 cmp r4, #48 ; 0x30
+ 362: d116 bne.n 392
+ if (config->differential_mode &&
+ 364: 7cf2 ldrb r2, [r6, #19]
+ 366: 2a00 cmp r2, #0
+ 368: d00a beq.n 380
+ (config->window.window_lower_value > 127 ||
+ 36a: 69f2 ldr r2, [r6, #28]
+ 36c: 3280 adds r2, #128 ; 0x80
+ return STATUS_ERR_INVALID_ARG;
+ 36e: 2017 movs r0, #23
+ if (config->differential_mode &&
+ 370: 2aff cmp r2, #255 ; 0xff
+ 372: d900 bls.n 376
+ 374: e705 b.n 182
+ config->window.window_lower_value < -128 ||
+ 376: 6a32 ldr r2, [r6, #32]
+ 378: 3280 adds r2, #128 ; 0x80
+ 37a: 2aff cmp r2, #255 ; 0xff
+ 37c: d900 bls.n 380
+ 37e: e700 b.n 182
+ return STATUS_ERR_INVALID_ARG;
+ 380: 2017 movs r0, #23
+ } else if (config->window.window_lower_value > 255 ||
+ 382: 69f2 ldr r2, [r6, #28]
+ 384: 2aff cmp r2, #255 ; 0xff
+ 386: dd00 ble.n 38a
+ 388: e6fb b.n 182
+ 38a: 6a32 ldr r2, [r6, #32]
+ 38c: 2aff cmp r2, #255 ; 0xff
+ 38e: dd00 ble.n 392
+ 390: e6f7 b.n 182
+ Adc *const adc_module = module_inst->hw;
+ 392: 6839 ldr r1, [r7, #0]
+ if (adc_module->STATUS.reg & ADC_STATUS_SYNCBUSY) {
+ 394: 7e4a ldrb r2, [r1, #25]
+ while (adc_is_syncing(module_inst)) {
+ 396: b252 sxtb r2, r2
+ 398: 2a00 cmp r2, #0
+ 39a: dbfb blt.n 394
+ adc_module->WINCTRL.reg = config->window.window_mode;
+ 39c: 4642 mov r2, r8
+ 39e: 7213 strb r3, [r2, #8]
+ Adc *const adc_module = module_inst->hw;
+ 3a0: 683a ldr r2, [r7, #0]
+ if (adc_module->STATUS.reg & ADC_STATUS_SYNCBUSY) {
+ 3a2: 7e53 ldrb r3, [r2, #25]
+ while (adc_is_syncing(module_inst)) {
+ 3a4: b25b sxtb r3, r3
+ 3a6: 2b00 cmp r3, #0
+ 3a8: dbfb blt.n 3a2
+ adc_module->WINLT.reg =
+ 3aa: 8bb3 ldrh r3, [r6, #28]
+ 3ac: 4642 mov r2, r8
+ 3ae: 8393 strh r3, [r2, #28]
+ Adc *const adc_module = module_inst->hw;
+ 3b0: 683a ldr r2, [r7, #0]
+ if (adc_module->STATUS.reg & ADC_STATUS_SYNCBUSY) {
+ 3b2: 7e53 ldrb r3, [r2, #25]
+ while (adc_is_syncing(module_inst)) {
+ 3b4: b25b sxtb r3, r3
+ 3b6: 2b00 cmp r3, #0
+ 3b8: dbfb blt.n 3b2
+ adc_module->WINUT.reg = config->window.window_upper_value <<
+ 3ba: 8c33 ldrh r3, [r6, #32]
+ 3bc: 4642 mov r2, r8
+ 3be: 8413 strh r3, [r2, #32]
+ uint8_t inputs_to_scan = config->pin_scan.inputs_to_scan;
+ 3c0: 232c movs r3, #44 ; 0x2c
+ 3c2: 5cf3 ldrb r3, [r6, r3]
+ if (inputs_to_scan > 0) {
+ 3c4: 2b00 cmp r3, #0
+ 3c6: d005 beq.n 3d4
+ inputs_to_scan--;
+ 3c8: 3b01 subs r3, #1
+ 3ca: b2db uxtb r3, r3
+ return STATUS_ERR_INVALID_ARG;
+ 3cc: 2017 movs r0, #23
+ if (inputs_to_scan > (ADC_INPUTCTRL_INPUTSCAN_Msk >> ADC_INPUTCTRL_INPUTSCAN_Pos) ||
+ 3ce: 2b0f cmp r3, #15
+ 3d0: d900 bls.n 3d4
+ 3d2: e6d6 b.n 182
+ config->pin_scan.offset_start_scan > (ADC_INPUTCTRL_INPUTOFFSET_Msk >> ADC_INPUTCTRL_INPUTOFFSET_Pos)) {
+ 3d4: 222b movs r2, #43 ; 0x2b
+ 3d6: 5cb1 ldrb r1, [r6, r2]
+ return STATUS_ERR_INVALID_ARG;
+ 3d8: 2017 movs r0, #23
+ if (inputs_to_scan > (ADC_INPUTCTRL_INPUTSCAN_Msk >> ADC_INPUTCTRL_INPUTSCAN_Pos) ||
+ 3da: 290f cmp r1, #15
+ 3dc: d900 bls.n 3e0
+ 3de: e6d0 b.n 182
+ Adc *const adc_module = module_inst->hw;
+ 3e0: 6838 ldr r0, [r7, #0]
+ if (adc_module->STATUS.reg & ADC_STATUS_SYNCBUSY) {
+ 3e2: 7e42 ldrb r2, [r0, #25]
+ while (adc_is_syncing(module_inst)) {
+ 3e4: b252 sxtb r2, r2
+ 3e6: 2a00 cmp r2, #0
+ 3e8: dbfb blt.n 3e2
+ config->negative_input |
+ 3ea: 89f2 ldrh r2, [r6, #14]
+ config->positive_input;
+ 3ec: 7b30 ldrb r0, [r6, #12]
+ config->negative_input |
+ 3ee: 4302 orrs r2, r0
+ 3f0: 68b0 ldr r0, [r6, #8]
+ 3f2: 4302 orrs r2, r0
+ (config->pin_scan.offset_start_scan <<
+ 3f4: 0509 lsls r1, r1, #20
+ config->negative_input |
+ 3f6: 430a orrs r2, r1
+ (inputs_to_scan << ADC_INPUTCTRL_INPUTSCAN_Pos) |
+ 3f8: 041b lsls r3, r3, #16
+ config->negative_input |
+ 3fa: 4313 orrs r3, r2
+ adc_module->INPUTCTRL.reg =
+ 3fc: 4642 mov r2, r8
+ 3fe: 6113 str r3, [r2, #16]
+ adc_module->EVCTRL.reg = config->event_action;
+ 400: 232a movs r3, #42 ; 0x2a
+ 402: 5cf3 ldrb r3, [r6, r3]
+ 404: 7513 strb r3, [r2, #20]
+ adc_module->INTENCLR.reg =
+ 406: 230f movs r3, #15
+ 408: 7593 strb r3, [r2, #22]
+ if (config->correction.correction_enable){
+ 40a: 3315 adds r3, #21
+ 40c: 5cf3 ldrb r3, [r6, r3]
+ 40e: 2b00 cmp r3, #0
+ 410: d012 beq.n 438
+ if (config->correction.gain_correction > ADC_GAINCORR_GAINCORR_Msk) {
+ 412: 8cf3 ldrh r3, [r6, #38] ; 0x26
+ 414: 4a29 ldr r2, [pc, #164] ; (4bc )
+ return STATUS_ERR_INVALID_ARG;
+ 416: 2017 movs r0, #23
+ if (config->correction.gain_correction > ADC_GAINCORR_GAINCORR_Msk) {
+ 418: 4293 cmp r3, r2
+ 41a: d900 bls.n 41e
+ 41c: e6b1 b.n 182
+ adc_module->GAINCORR.reg = config->correction.gain_correction <<
+ 41e: 4642 mov r2, r8
+ 420: 8493 strh r3, [r2, #36] ; 0x24
+ if (config->correction.offset_correction > 2047 ||
+ 422: 8d32 ldrh r2, [r6, #40] ; 0x28
+ 424: 2380 movs r3, #128 ; 0x80
+ 426: 011b lsls r3, r3, #4
+ 428: 18d3 adds r3, r2, r3
+ 42a: 4924 ldr r1, [pc, #144] ; (4bc )
+ 42c: b29b uxth r3, r3
+ 42e: 428b cmp r3, r1
+ 430: d900 bls.n 434
+ 432: e6a6 b.n 182
+ adc_module->OFFSETCORR.reg = config->correction.offset_correction <<
+ 434: 4643 mov r3, r8
+ 436: 84da strh r2, [r3, #38] ; 0x26
+ ADC_CALIB_BIAS_CAL(
+ 438: 4b21 ldr r3, [pc, #132] ; (4c0 )
+ 43a: 681b ldr r3, [r3, #0]
+ 43c: 015b lsls r3, r3, #5
+ 43e: 22e0 movs r2, #224 ; 0xe0
+ 440: 00d2 lsls r2, r2, #3
+ 442: 4013 ands r3, r2
+ ADC_CALIB_LINEARITY_CAL(
+ 444: 4a1f ldr r2, [pc, #124] ; (4c4 )
+ 446: 6851 ldr r1, [r2, #4]
+ 448: 0149 lsls r1, r1, #5
+ 44a: 6812 ldr r2, [r2, #0]
+ 44c: 0ed2 lsrs r2, r2, #27
+ 44e: 430a orrs r2, r1
+ 450: b2d2 uxtb r2, r2
+ ) |
+ 452: 4313 orrs r3, r2
+ adc_module->CALIB.reg =
+ 454: 4642 mov r2, r8
+ 456: 8513 strh r3, [r2, #40] ; 0x28
+ return STATUS_OK;
+ 458: 2000 movs r0, #0
+ 45a: e692 b.n 182
+ switch (resolution) {
+ 45c: 2c00 cmp r4, #0
+ 45e: d198 bne.n 392
+ if (config->differential_mode &&
+ 460: 7cf2 ldrb r2, [r6, #19]
+ 462: 2a00 cmp r2, #0
+ 464: d00f beq.n 486
+ (config->window.window_lower_value > 2047 ||
+ 466: 69f2 ldr r2, [r6, #28]
+ 468: 2180 movs r1, #128 ; 0x80
+ 46a: 0109 lsls r1, r1, #4
+ 46c: 468c mov ip, r1
+ 46e: 4462 add r2, ip
+ if (config->differential_mode &&
+ 470: 4912 ldr r1, [pc, #72] ; (4bc )
+ return STATUS_ERR_INVALID_ARG;
+ 472: 2017 movs r0, #23
+ if (config->differential_mode &&
+ 474: 428a cmp r2, r1
+ 476: d900 bls.n 47a
+ 478: e683 b.n 182
+ config->window.window_lower_value < -2048 ||
+ 47a: 6a32 ldr r2, [r6, #32]
+ 47c: 4462 add r2, ip
+ 47e: 490f ldr r1, [pc, #60] ; (4bc )
+ 480: 428a cmp r2, r1
+ 482: d900 bls.n 486
+ 484: e67d b.n 182
+ } else if (config->window.window_lower_value > 4095 ||
+ 486: 4a0d ldr r2, [pc, #52] ; (4bc )
+ return STATUS_ERR_INVALID_ARG;
+ 488: 2017 movs r0, #23
+ } else if (config->window.window_lower_value > 4095 ||
+ 48a: 69f1 ldr r1, [r6, #28]
+ 48c: 4291 cmp r1, r2
+ 48e: dd00 ble.n 492
+ 490: e677 b.n 182
+ 492: 6a31 ldr r1, [r6, #32]
+ 494: 4291 cmp r1, r2
+ 496: dd00 ble.n 49a
+ 498: e673 b.n 182
+ 49a: e77a b.n 392
+ 49c: 40000400 .word 0x40000400
+ 4a0: 40000800 .word 0x40000800
+ 4a4: 00001af5 .word 0x00001af5
+ 4a8: 00001a69 .word 0x00001a69
+ 4ac: 000026c9 .word 0x000026c9
+ 4b0: 000037a4 .word 0x000037a4
+ 4b4: 00001bed .word 0x00001bed
+ 4b8: 000036d0 .word 0x000036d0
+ 4bc: 00000fff .word 0x00000fff
+ 4c0: 00806024 .word 0x00806024
+ 4c4: 00806020 .word 0x00806020
+ if (config->differential_mode &&
+ 4c8: 7cf2 ldrb r2, [r6, #19]
+ 4ca: 2a00 cmp r2, #0
+ 4cc: d00f beq.n 4ee
+ (config->window.window_lower_value > 511 ||
+ 4ce: 69f2 ldr r2, [r6, #28]
+ 4d0: 2180 movs r1, #128 ; 0x80
+ 4d2: 0089 lsls r1, r1, #2
+ 4d4: 468c mov ip, r1
+ 4d6: 4462 add r2, ip
+ if (config->differential_mode &&
+ 4d8: 491a ldr r1, [pc, #104] ; (544 )
+ return STATUS_ERR_INVALID_ARG;
+ 4da: 2017 movs r0, #23
+ if (config->differential_mode &&
+ 4dc: 428a cmp r2, r1
+ 4de: d900 bls.n 4e2
+ 4e0: e64f b.n 182
+ config->window.window_lower_value < -512 ||
+ 4e2: 6a32 ldr r2, [r6, #32]
+ 4e4: 4462 add r2, ip
+ 4e6: 4917 ldr r1, [pc, #92] ; (544 )
+ 4e8: 428a cmp r2, r1
+ 4ea: d900 bls.n 4ee
+ 4ec: e649 b.n 182
+ } else if (config->window.window_lower_value > 1023 ||
+ 4ee: 4a15 ldr r2, [pc, #84] ; (544 )
+ return STATUS_ERR_INVALID_ARG;
+ 4f0: 2017 movs r0, #23
+ } else if (config->window.window_lower_value > 1023 ||
+ 4f2: 69f1 ldr r1, [r6, #28]
+ 4f4: 4291 cmp r1, r2
+ 4f6: dd00 ble.n 4fa
+ 4f8: e643 b.n 182
+ 4fa: 6a31 ldr r1, [r6, #32]
+ 4fc: 4291 cmp r1, r2
+ 4fe: dd00 ble.n 502
+ 500: e63f b.n 182
+ 502: e746 b.n 392
+ if (config->differential_mode &&
+ 504: 7cf2 ldrb r2, [r6, #19]
+ 506: 2a00 cmp r2, #0
+ 508: d00f beq.n 52a
+ (config->window.window_lower_value > 32767 ||
+ 50a: 69f2 ldr r2, [r6, #28]
+ 50c: 2180 movs r1, #128 ; 0x80
+ 50e: 0209 lsls r1, r1, #8
+ 510: 468c mov ip, r1
+ 512: 4462 add r2, ip
+ if (config->differential_mode &&
+ 514: 490c ldr r1, [pc, #48] ; (548 )
+ return STATUS_ERR_INVALID_ARG;
+ 516: 2017 movs r0, #23
+ if (config->differential_mode &&
+ 518: 428a cmp r2, r1
+ 51a: d900 bls.n 51e
+ 51c: e631 b.n 182
+ config->window.window_lower_value < -32768 ||
+ 51e: 6a32 ldr r2, [r6, #32]
+ 520: 4462 add r2, ip
+ 522: 4909 ldr r1, [pc, #36] ; (548 )
+ 524: 428a cmp r2, r1
+ 526: d900 bls.n 52a
+ 528: e62b b.n 182
+ } else if (config->window.window_lower_value > 65535 ||
+ 52a: 4a07 ldr r2, [pc, #28] ; (548 )
+ return STATUS_ERR_INVALID_ARG;
+ 52c: 2017 movs r0, #23
+ } else if (config->window.window_lower_value > 65535 ||
+ 52e: 69f1 ldr r1, [r6, #28]
+ 530: 4291 cmp r1, r2
+ 532: dd00 ble.n 536
+ 534: e625 b.n 182
+ 536: 6a31 ldr r1, [r6, #32]
+ 538: 4291 cmp r1, r2
+ 53a: dd00 ble.n 53e
+ 53c: e621 b.n 182
+ 53e: e728 b.n 392
+ return STATUS_ERR_INVALID_ARG;
+ 540: 2017 movs r0, #23
+ 542: e61e b.n 182
+ 544: 000003ff .word 0x000003ff
+ 548: 0000ffff .word 0x0000ffff
+
+0000054c :
+/**
+ * \brief DMA interrupt service routine.
+ *
+ */
+void DMAC_Handler( void )
+{
+ 54c: b510 push {r4, lr}
+ * are only re-enabled upon leaving the outermost nested critical section.
+ *
+ */
+static inline void system_interrupt_enter_critical_section(void)
+{
+ cpu_irq_enter_critical();
+ 54e: 4b26 ldr r3, [pc, #152] ; (5e8 )
+ 550: 4798 blx r3
+ uint32_t total_size;
+
+ system_interrupt_enter_critical_section();
+
+ /* Get Pending channel */
+ active_channel = DMAC->INTPEND.reg & DMAC_INTPEND_ID_Msk;
+ 552: 4926 ldr r1, [pc, #152] ; (5ec )
+ 554: 8c0b ldrh r3, [r1, #32]
+ 556: 220f movs r2, #15
+
+ Assert(_dma_active_resource[active_channel]);
+
+ /* Get active DMA resource based on channel */
+ resource = _dma_active_resource[active_channel];
+ 558: 4013 ands r3, r2
+ 55a: 009b lsls r3, r3, #2
+ 55c: 4824 ldr r0, [pc, #144] ; (5f0 )
+ 55e: 5818 ldr r0, [r3, r0]
+
+ /* Select the active channel */
+ DMAC->CHID.reg = DMAC_CHID_ID(resource->channel_id);
+ 560: 7803 ldrb r3, [r0, #0]
+ 562: 401a ands r2, r3
+ 564: 233f movs r3, #63 ; 0x3f
+ 566: 54ca strb r2, [r1, r3]
+ isr = DMAC->CHINTFLAG.reg;
+ 568: 330f adds r3, #15
+ 56a: 5cca ldrb r2, [r1, r3]
+ 56c: b2d2 uxtb r2, r2
+
+ /* Calculate block transfer size of the DMA transfer */
+ total_size = descriptor_section[resource->channel_id].BTCNT.reg;
+ 56e: 7803 ldrb r3, [r0, #0]
+ 570: 011b lsls r3, r3, #4
+ 572: 4920 ldr r1, [pc, #128] ; (5f4 )
+ 574: 18c9 adds r1, r1, r3
+ 576: 8849 ldrh r1, [r1, #2]
+ write_size = _write_back_section[resource->channel_id].BTCNT.reg;
+ 578: 4c1f ldr r4, [pc, #124] ; (5f8 )
+ 57a: 18e3 adds r3, r4, r3
+ 57c: 885b ldrh r3, [r3, #2]
+ resource->transfered_size = total_size - write_size;
+ 57e: 1acb subs r3, r1, r3
+ 580: 6143 str r3, [r0, #20]
+
+ /* DMA channel interrupt handler */
+ if (isr & DMAC_CHINTENCLR_TERR) {
+ 582: 07d3 lsls r3, r2, #31
+ 584: d50f bpl.n 5a6
+ /* Clear transfer error flag */
+ DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_TERR;
+ 586: 2101 movs r1, #1
+ 588: 234e movs r3, #78 ; 0x4e
+ 58a: 4a18 ldr r2, [pc, #96] ; (5ec )
+ 58c: 54d1 strb r1, [r2, r3]
+
+ /* Set I/O ERROR status */
+ resource->job_status = STATUS_ERR_IO;
+ 58e: 3b3e subs r3, #62 ; 0x3e
+ 590: 7443 strb r3, [r0, #17]
+
+ /* Execute the callback function */
+ if ((resource->callback_enable & (1<
+ (resource->callback[DMA_CALLBACK_TRANSFER_ERROR])) {
+ 598: 6843 ldr r3, [r0, #4]
+ if ((resource->callback_enable & (1<
+ resource->callback[DMA_CALLBACK_TRANSFER_ERROR](resource);
+ 59e: 4798 blx r3
+ * are only re-enabled upon leaving the outermost nested critical section.
+ *
+ */
+static inline void system_interrupt_leave_critical_section(void)
+{
+ cpu_irq_leave_critical();
+ 5a0: 4b16 ldr r3, [pc, #88] ; (5fc )
+ 5a2: 4798 blx r3
+ resource->callback[DMA_CALLBACK_CHANNEL_SUSPEND](resource);
+ }
+ }
+
+ system_interrupt_leave_critical_section();
+}
+ 5a4: bd10 pop {r4, pc}
+ } else if (isr & DMAC_CHINTENCLR_TCMPL) {
+ 5a6: 0793 lsls r3, r2, #30
+ 5a8: d50d bpl.n 5c6
+ DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_TCMPL;
+ 5aa: 2102 movs r1, #2
+ 5ac: 234e movs r3, #78 ; 0x4e
+ 5ae: 4a0f ldr r2, [pc, #60] ; (5ec )
+ 5b0: 54d1 strb r1, [r2, r3]
+ resource->job_status = STATUS_OK;
+ 5b2: 2300 movs r3, #0
+ 5b4: 7443 strb r3, [r0, #17]
+ if ((resource->callback_enable & (1 << DMA_CALLBACK_TRANSFER_DONE)) &&
+ 5b6: 7c03 ldrb r3, [r0, #16]
+ 5b8: 079b lsls r3, r3, #30
+ 5ba: d5f1 bpl.n 5a0
+ (resource->callback[DMA_CALLBACK_TRANSFER_DONE])) {
+ 5bc: 6883 ldr r3, [r0, #8]
+ if ((resource->callback_enable & (1 << DMA_CALLBACK_TRANSFER_DONE)) &&
+ 5be: 2b00 cmp r3, #0
+ 5c0: d0ee beq.n 5a0
+ resource->callback[DMA_CALLBACK_TRANSFER_DONE](resource);
+ 5c2: 4798 blx r3
+ 5c4: e7ec b.n 5a0
+ } else if (isr & DMAC_CHINTENCLR_SUSP) {
+ 5c6: 0753 lsls r3, r2, #29
+ 5c8: d5ea bpl.n 5a0
+ DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_SUSP;
+ 5ca: 2104 movs r1, #4
+ 5cc: 234e movs r3, #78 ; 0x4e
+ 5ce: 4a07 ldr r2, [pc, #28] ; (5ec )
+ 5d0: 54d1 strb r1, [r2, r3]
+ resource->job_status = STATUS_SUSPEND;
+ 5d2: 3b48 subs r3, #72 ; 0x48
+ 5d4: 7443 strb r3, [r0, #17]
+ if ((resource->callback_enable & (1 << DMA_CALLBACK_CHANNEL_SUSPEND)) &&
+ 5d6: 7c03 ldrb r3, [r0, #16]
+ 5d8: 075b lsls r3, r3, #29
+ 5da: d5e1 bpl.n 5a0
+ (resource->callback[DMA_CALLBACK_CHANNEL_SUSPEND])){
+ 5dc: 68c3 ldr r3, [r0, #12]
+ if ((resource->callback_enable & (1 << DMA_CALLBACK_CHANNEL_SUSPEND)) &&
+ 5de: 2b00 cmp r3, #0
+ 5e0: d0de beq.n 5a0
+ resource->callback[DMA_CALLBACK_CHANNEL_SUSPEND](resource);
+ 5e2: 4798 blx r3
+ 5e4: e7dc b.n 5a0
+ 5e6: 46c0 nop ; (mov r8, r8)
+ 5e8: 000015e1 .word 0x000015e1
+ 5ec: 41004800 .word 0x41004800
+ 5f0: 2000009c .word 0x2000009c
+ 5f4: 200001e0 .word 0x200001e0
+ 5f8: 200000b0 .word 0x200000b0
+ 5fc: 00001621 .word 0x00001621
+
+00000600 :
+ */
+void dma_get_config_defaults(struct dma_resource_config *config)
+{
+ Assert(config);
+ /* Set as priority 0 */
+ config->priority = DMA_PRIORITY_LEVEL_0;
+ 600: 2300 movs r3, #0
+ 602: 7003 strb r3, [r0, #0]
+ /* Only software/event trigger */
+ config->peripheral_trigger = 0;
+ 604: 7043 strb r3, [r0, #1]
+ /* Transaction trigger */
+ config->trigger_action = DMA_TRIGGER_ACTION_TRANSACTION;
+ 606: 2203 movs r2, #3
+ 608: 7082 strb r2, [r0, #2]
+
+ /* Event configurations, no event input/output */
+ config->event_config.input_action = DMA_EVENT_INPUT_NOACT;
+ 60a: 70c3 strb r3, [r0, #3]
+ config->event_config.event_output_enable = false;
+ 60c: 7103 strb r3, [r0, #4]
+#ifdef FEATURE_DMA_CHANNEL_STANDBY
+ config->run_in_standby = false;
+#endif
+}
+ 60e: 4770 bx lr
+
+00000610 :
+ * \retval STATUS_OK The DMA resource was allocated successfully
+ * \retval STATUS_ERR_NOT_FOUND DMA resource allocation failed
+ */
+enum status_code dma_allocate(struct dma_resource *resource,
+ struct dma_resource_config *config)
+{
+ 610: b5f8 push {r3, r4, r5, r6, r7, lr}
+ 612: 46ce mov lr, r9
+ 614: 4647 mov r7, r8
+ 616: b580 push {r7, lr}
+ 618: 0005 movs r5, r0
+ 61a: 000e movs r6, r1
+ cpu_irq_enter_critical();
+ 61c: 4b45 ldr r3, [pc, #276] ; (734 )
+ 61e: 4798 blx r3
+
+ Assert(resource);
+
+ system_interrupt_enter_critical_section();
+
+ if (!_dma_inst._dma_init) {
+ 620: 4b45 ldr r3, [pc, #276] ; (738 )
+ 622: 781b ldrb r3, [r3, #0]
+ 624: 2b00 cmp r3, #0
+ 626: d118 bne.n 65a
+ PM->AHBMASK.reg |= ahb_mask;
+ 628: 4b44 ldr r3, [pc, #272] ; (73c )
+ 62a: 695a ldr r2, [r3, #20]
+ 62c: 2120 movs r1, #32
+ 62e: 430a orrs r2, r1
+ 630: 615a str r2, [r3, #20]
+ PM->APBBMASK.reg |= mask;
+ 632: 69da ldr r2, [r3, #28]
+ 634: 3910 subs r1, #16
+ 636: 430a orrs r2, r1
+ 638: 61da str r2, [r3, #28]
+ system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBB,
+ PM_APBBMASK_DMAC);
+#endif
+
+ /* Perform a software reset before enable DMA controller */
+ DMAC->CTRL.reg &= ~DMAC_CTRL_DMAENABLE;
+ 63a: 4b41 ldr r3, [pc, #260] ; (740 )
+ 63c: 881a ldrh r2, [r3, #0]
+ 63e: 390e subs r1, #14
+ 640: 438a bics r2, r1
+ 642: 801a strh r2, [r3, #0]
+ DMAC->CTRL.reg = DMAC_CTRL_SWRST;
+ 644: 2201 movs r2, #1
+ 646: 801a strh r2, [r3, #0]
+
+ /* Setup descriptor base address and write back section base
+ * address */
+ DMAC->BASEADDR.reg = (uint32_t)descriptor_section;
+ 648: 4a3e ldr r2, [pc, #248] ; (744 )
+ 64a: 635a str r2, [r3, #52] ; 0x34
+ DMAC->WRBADDR.reg = (uint32_t)_write_back_section;
+ 64c: 4a3e ldr r2, [pc, #248] ; (748 )
+ 64e: 639a str r2, [r3, #56] ; 0x38
+
+ /* Enable all priority level at the same time */
+ DMAC->CTRL.reg = DMAC_CTRL_DMAENABLE | DMAC_CTRL_LVLEN(0xf);
+ 650: 4a3e ldr r2, [pc, #248] ; (74c )
+ 652: 801a strh r2, [r3, #0]
+
+ _dma_inst._dma_init = true;
+ 654: 4b38 ldr r3, [pc, #224] ; (738 )
+ 656: 2201 movs r2, #1
+ 658: 701a strb r2, [r3, #0]
+ 65a: 4b36 ldr r3, [pc, #216] ; (734 )
+ 65c: 4798 blx r3
+ tmp = _dma_inst.allocated_channels;
+ 65e: 4b36 ldr r3, [pc, #216] ; (738 )
+ 660: 685b ldr r3, [r3, #4]
+ if (!(tmp & 0x00000001)) {
+ 662: 07da lsls r2, r3, #31
+ 664: d50f bpl.n 686
+ tmp = tmp >> 1;
+ 666: 085b lsrs r3, r3, #1
+ for (count = 0; count < CONF_MAX_USED_CHANNEL_NUM; ++count) {
+ 668: 2401 movs r4, #1
+ if (!(tmp & 0x00000001)) {
+ 66a: 2201 movs r2, #1
+ 66c: 421a tst r2, r3
+ 66e: d00b beq.n 688
+ tmp = tmp >> 1;
+ 670: 085b lsrs r3, r3, #1
+ for (count = 0; count < CONF_MAX_USED_CHANNEL_NUM; ++count) {
+ 672: 3401 adds r4, #1
+ 674: b2e4 uxtb r4, r4
+ 676: 2c05 cmp r4, #5
+ 678: d1f8 bne.n 66c
+ cpu_irq_leave_critical();
+ 67a: 4b35 ldr r3, [pc, #212] ; (750 )
+ 67c: 4798 blx r3
+ 67e: 4b34 ldr r3, [pc, #208] ; (750 )
+ 680: 4798 blx r3
+
+ /* If no channel available, return not found */
+ if (new_channel == DMA_INVALID_CHANNEL) {
+ system_interrupt_leave_critical_section();
+
+ return STATUS_ERR_NOT_FOUND;
+ 682: 2014 movs r0, #20
+ 684: e051 b.n 72a
+ for (count = 0; count < CONF_MAX_USED_CHANNEL_NUM; ++count) {
+ 686: 2400 movs r4, #0
+ _dma_inst.allocated_channels |= 1 << count;
+ 688: 4a2b ldr r2, [pc, #172] ; (738 )
+ 68a: 6851 ldr r1, [r2, #4]
+ 68c: 2301 movs r3, #1
+ 68e: 40a3 lsls r3, r4
+ 690: 430b orrs r3, r1
+ 692: 6053 str r3, [r2, #4]
+ _dma_inst.free_channels--;
+ 694: 7a13 ldrb r3, [r2, #8]
+ 696: 3b01 subs r3, #1
+ 698: 7213 strb r3, [r2, #8]
+ 69a: 4b2d ldr r3, [pc, #180] ; (750 )
+ 69c: 4798 blx r3
+ if (new_channel == DMA_INVALID_CHANNEL) {
+ 69e: 2cff cmp r4, #255 ; 0xff
+ 6a0: d0ed beq.n 67e
+ }
+
+ /* Set the channel */
+ resource->channel_id = new_channel;
+ 6a2: 702c strb r4, [r5, #0]
+
+ /** Perform a reset for the allocated channel */
+ DMAC->CHID.reg = DMAC_CHID_ID(resource->channel_id);
+ 6a4: 230f movs r3, #15
+ 6a6: 4698 mov r8, r3
+ 6a8: 401c ands r4, r3
+ 6aa: 4f25 ldr r7, [pc, #148] ; (740 )
+ 6ac: 3330 adds r3, #48 ; 0x30
+ 6ae: 4699 mov r9, r3
+ 6b0: 54fc strb r4, [r7, r3]
+ DMAC->CHCTRLA.reg &= ~DMAC_CHCTRLA_ENABLE;
+ 6b2: 3301 adds r3, #1
+ 6b4: 5cfa ldrb r2, [r7, r3]
+ 6b6: 2102 movs r1, #2
+ 6b8: 438a bics r2, r1
+ 6ba: 54fa strb r2, [r7, r3]
+ DMAC->CHCTRLA.reg = DMAC_CHCTRLA_SWRST;
+ 6bc: 2401 movs r4, #1
+ 6be: 54fc strb r4, [r7, r3]
+ cpu_irq_enter_critical();
+ 6c0: 4b1c ldr r3, [pc, #112] ; (734 )
+ 6c2: 4798 blx r3
+ DMAC->CHID.reg = DMAC_CHID_ID(resource->channel_id);
+ 6c4: 782b ldrb r3, [r5, #0]
+ 6c6: 4642 mov r2, r8
+ 6c8: 4013 ands r3, r2
+ 6ca: 464a mov r2, r9
+ 6cc: 54bb strb r3, [r7, r2]
+ DMAC->SWTRIGCTRL.reg &= (uint32_t)(~(1 << resource->channel_id));
+ 6ce: 693b ldr r3, [r7, #16]
+ 6d0: 782a ldrb r2, [r5, #0]
+ 6d2: 4094 lsls r4, r2
+ 6d4: 43a3 bics r3, r4
+ 6d6: 613b str r3, [r7, #16]
+ temp_CHCTRLB_reg = DMAC_CHCTRLB_LVL(resource_config->priority) | \
+ 6d8: 7832 ldrb r2, [r6, #0]
+ 6da: 0152 lsls r2, r2, #5
+ 6dc: 2360 movs r3, #96 ; 0x60
+ 6de: 4013 ands r3, r2
+ DMAC_CHCTRLB_TRIGSRC(resource_config->peripheral_trigger) | \
+ 6e0: 7872 ldrb r2, [r6, #1]
+ 6e2: 0212 lsls r2, r2, #8
+ 6e4: 21fc movs r1, #252 ; 0xfc
+ 6e6: 0189 lsls r1, r1, #6
+ 6e8: 400a ands r2, r1
+ temp_CHCTRLB_reg = DMAC_CHCTRLB_LVL(resource_config->priority) | \
+ 6ea: 4313 orrs r3, r2
+ DMAC_CHCTRLB_TRIGACT(resource_config->trigger_action);
+ 6ec: 78b2 ldrb r2, [r6, #2]
+ 6ee: 0592 lsls r2, r2, #22
+ 6f0: 21c0 movs r1, #192 ; 0xc0
+ 6f2: 0409 lsls r1, r1, #16
+ 6f4: 400a ands r2, r1
+ temp_CHCTRLB_reg = DMAC_CHCTRLB_LVL(resource_config->priority) | \
+ 6f6: 4313 orrs r3, r2
+ if(resource_config->event_config.input_action){
+ 6f8: 78f1 ldrb r1, [r6, #3]
+ 6fa: 2900 cmp r1, #0
+ 6fc: d004 beq.n 708
+ temp_CHCTRLB_reg |= DMAC_CHCTRLB_EVIE | DMAC_CHCTRLB_EVACT(
+ 6fe: 2207 movs r2, #7
+ 700: 400a ands r2, r1
+ 702: 2108 movs r1, #8
+ 704: 430a orrs r2, r1
+ 706: 4313 orrs r3, r2
+ if (resource_config->event_config.event_output_enable) {
+ 708: 7932 ldrb r2, [r6, #4]
+ 70a: 2a00 cmp r2, #0
+ 70c: d001 beq.n 712
+ temp_CHCTRLB_reg |= DMAC_CHCTRLB_EVOE;
+ 70e: 2210 movs r2, #16
+ 710: 4313 orrs r3, r2
+ DMAC->CHCTRLB.reg = temp_CHCTRLB_reg;
+ 712: 4a0b ldr r2, [pc, #44] ; (740 )
+ 714: 6453 str r3, [r2, #68] ; 0x44
+ cpu_irq_leave_critical();
+ 716: 4c0e ldr r4, [pc, #56] ; (750 )
+ 718: 47a0 blx r4
+#endif
+
+ /** Configure the DMA control,channel registers and descriptors here */
+ _dma_set_config(resource, config);
+
+ resource->descriptor = NULL;
+ 71a: 2300 movs r3, #0
+ 71c: 61ab str r3, [r5, #24]
+
+ /* Log the DMA resource into the internal DMA resource pool */
+ _dma_active_resource[resource->channel_id] = resource;
+ 71e: 782b ldrb r3, [r5, #0]
+ 720: 009b lsls r3, r3, #2
+ 722: 4a0c ldr r2, [pc, #48] ; (754 )
+ 724: 509d str r5, [r3, r2]
+ 726: 47a0 blx r4
+
+ system_interrupt_leave_critical_section();
+
+ return STATUS_OK;
+ 728: 2000 movs r0, #0
+}
+ 72a: bc0c pop {r2, r3}
+ 72c: 4690 mov r8, r2
+ 72e: 4699 mov r9, r3
+ 730: bdf8 pop {r3, r4, r5, r6, r7, pc}
+ 732: 46c0 nop ; (mov r8, r8)
+ 734: 000015e1 .word 0x000015e1
+ 738: 20000000 .word 0x20000000
+ 73c: 40000400 .word 0x40000400
+ 740: 41004800 .word 0x41004800
+ 744: 200001e0 .word 0x200001e0
+ 748: 200000b0 .word 0x200000b0
+ 74c: 00000f02 .word 0x00000f02
+ 750: 00001621 .word 0x00001621
+ 754: 2000009c .word 0x2000009c
+
+00000758 :
+ * \retval STATUS_OK The transfer was started successfully
+ * \retval STATUS_BUSY The DMA resource was busy and the transfer was not started
+ * \retval STATUS_ERR_INVALID_ARG Transfer size is 0 and transfer was not started
+ */
+enum status_code dma_start_transfer_job(struct dma_resource *resource)
+{
+ 758: b570 push {r4, r5, r6, lr}
+ 75a: 0004 movs r4, r0
+ cpu_irq_enter_critical();
+ 75c: 4b19 ldr r3, [pc, #100] ; (7c4 )
+ 75e: 4798 blx r3
+ Assert(resource->channel_id != DMA_INVALID_CHANNEL);
+
+ system_interrupt_enter_critical_section();
+
+ /* Check if resource was busy */
+ if (resource->job_status == STATUS_BUSY) {
+ 760: 7c63 ldrb r3, [r4, #17]
+ 762: 2b05 cmp r3, #5
+ 764: d008 beq.n 778
+ system_interrupt_leave_critical_section();
+ return STATUS_BUSY;
+ }
+
+ /* Check if transfer size is valid */
+ if (resource->descriptor->BTCNT.reg == 0) {
+ 766: 69a3 ldr r3, [r4, #24]
+ 768: 885b ldrh r3, [r3, #2]
+ 76a: b29b uxth r3, r3
+ 76c: 2b00 cmp r3, #0
+ 76e: d107 bne.n 780
+ cpu_irq_leave_critical();
+ 770: 4b15 ldr r3, [pc, #84] ; (7c8 )
+ 772: 4798 blx r3
+ system_interrupt_leave_critical_section();
+ return STATUS_ERR_INVALID_ARG;
+ 774: 2017 movs r0, #23
+ DMAC->CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
+
+ system_interrupt_leave_critical_section();
+
+ return STATUS_OK;
+}
+ 776: bd70 pop {r4, r5, r6, pc}
+ 778: 4b13 ldr r3, [pc, #76] ; (7c8 )
+ 77a: 4798 blx r3
+ return STATUS_BUSY;
+ 77c: 2005 movs r0, #5
+ 77e: e7fa b.n 776
+ * \param[in] vector Interrupt vector to enable
+ */
+static inline void system_interrupt_enable(
+ const enum system_interrupt_vector vector)
+{
+ NVIC->ISER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
+ 780: 2640 movs r6, #64 ; 0x40
+ 782: 4b12 ldr r3, [pc, #72] ; (7cc )
+ 784: 601e str r6, [r3, #0]
+ DMAC->CHID.reg = DMAC_CHID_ID(resource->channel_id);
+ 786: 7822 ldrb r2, [r4, #0]
+ 788: 230f movs r3, #15
+ 78a: 4013 ands r3, r2
+ 78c: 4d10 ldr r5, [pc, #64] ; (7d0 )
+ 78e: 223f movs r2, #63 ; 0x3f
+ 790: 54ab strb r3, [r5, r2]
+ DMAC->CHINTENSET.reg = (DMAC_CHINTENSET_MASK & g_chan_interrupt_flag[resource->channel_id]);
+ 792: 7823 ldrb r3, [r4, #0]
+ 794: 4a0f ldr r2, [pc, #60] ; (7d4 )
+ 796: 5cd2 ldrb r2, [r2, r3]
+ 798: 2307 movs r3, #7
+ 79a: 4013 ands r3, r2
+ 79c: 224d movs r2, #77 ; 0x4d
+ 79e: 54ab strb r3, [r5, r2]
+ resource->job_status = STATUS_BUSY;
+ 7a0: 2305 movs r3, #5
+ 7a2: 7463 strb r3, [r4, #17]
+ memcpy(&descriptor_section[resource->channel_id], resource->descriptor,
+ 7a4: 7820 ldrb r0, [r4, #0]
+ 7a6: 0100 lsls r0, r0, #4
+ 7a8: 4b0b ldr r3, [pc, #44] ; (7d8 )
+ 7aa: 18c0 adds r0, r0, r3
+ 7ac: 69a1 ldr r1, [r4, #24]
+ 7ae: 3a3d subs r2, #61 ; 0x3d
+ 7b0: 4b0a ldr r3, [pc, #40] ; (7dc )
+ 7b2: 4798 blx r3
+ DMAC->CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
+ 7b4: 5dab ldrb r3, [r5, r6]
+ 7b6: 2202 movs r2, #2
+ 7b8: 4313 orrs r3, r2
+ 7ba: 55ab strb r3, [r5, r6]
+ cpu_irq_leave_critical();
+ 7bc: 4b02 ldr r3, [pc, #8] ; (7c8 )
+ 7be: 4798 blx r3
+ return STATUS_OK;
+ 7c0: 2000 movs r0, #0
+ 7c2: e7d8 b.n 776
+ 7c4: 000015e1 .word 0x000015e1
+ 7c8: 00001621 .word 0x00001621
+ 7cc: e000e100 .word 0xe000e100
+ 7d0: 41004800 .word 0x41004800
+ 7d4: 20000100 .word 0x20000100
+ 7d8: 200001e0 .word 0x200001e0
+ 7dc: 000026c9 .word 0x000026c9
+
+000007e0 :
+ * \param[in] config Pointer to the descriptor configuration structure
+ *
+ */
+void dma_descriptor_create(DmacDescriptor* descriptor,
+ struct dma_descriptor_config *config)
+{
+ 7e0: b5f0 push {r4, r5, r6, r7, lr}
+ /* Set block transfer control */
+ descriptor->BTCTRL.bit.VALID = config->descriptor_valid;
+ 7e2: 780a ldrb r2, [r1, #0]
+ 7e4: 8803 ldrh r3, [r0, #0]
+ 7e6: 2601 movs r6, #1
+ 7e8: 4032 ands r2, r6
+ 7ea: 2401 movs r4, #1
+ 7ec: 43a3 bics r3, r4
+ 7ee: 4313 orrs r3, r2
+ 7f0: 8003 strh r3, [r0, #0]
+ descriptor->BTCTRL.bit.EVOSEL = config->event_output_selection;
+ 7f2: 784b ldrb r3, [r1, #1]
+ 7f4: 8804 ldrh r4, [r0, #0]
+ 7f6: 2703 movs r7, #3
+ 7f8: 403b ands r3, r7
+ 7fa: 005b lsls r3, r3, #1
+ 7fc: 2206 movs r2, #6
+ 7fe: 4394 bics r4, r2
+ 800: 431c orrs r4, r3
+ 802: 8004 strh r4, [r0, #0]
+ descriptor->BTCTRL.bit.BLOCKACT = config->block_action;
+ 804: 788d ldrb r5, [r1, #2]
+ 806: 8804 ldrh r4, [r0, #0]
+ 808: 403d ands r5, r7
+ 80a: 00ed lsls r5, r5, #3
+ 80c: 2318 movs r3, #24
+ 80e: 439c bics r4, r3
+ 810: 432c orrs r4, r5
+ 812: 8004 strh r4, [r0, #0]
+ descriptor->BTCTRL.bit.BEATSIZE = config->beat_size;
+ 814: 78ca ldrb r2, [r1, #3]
+ 816: 8803 ldrh r3, [r0, #0]
+ 818: 403a ands r2, r7
+ 81a: 0212 lsls r2, r2, #8
+ 81c: 4c16 ldr r4, [pc, #88] ; (878 )
+ 81e: 4023 ands r3, r4
+ 820: 4313 orrs r3, r2
+ 822: 8003 strh r3, [r0, #0]
+ descriptor->BTCTRL.bit.SRCINC = config->src_increment_enable;
+ 824: 790b ldrb r3, [r1, #4]
+ 826: 8804 ldrh r4, [r0, #0]
+ 828: 4033 ands r3, r6
+ 82a: 029b lsls r3, r3, #10
+ 82c: 4a13 ldr r2, [pc, #76] ; (87c )
+ 82e: 4014 ands r4, r2
+ 830: 431c orrs r4, r3
+ 832: 8004 strh r4, [r0, #0]
+ descriptor->BTCTRL.bit.DSTINC = config->dst_increment_enable;
+ 834: 794d ldrb r5, [r1, #5]
+ 836: 8804 ldrh r4, [r0, #0]
+ 838: 4035 ands r5, r6
+ 83a: 02ed lsls r5, r5, #11
+ 83c: 4b10 ldr r3, [pc, #64] ; (880 )
+ 83e: 401c ands r4, r3
+ 840: 432c orrs r4, r5
+ 842: 8004 strh r4, [r0, #0]
+ descriptor->BTCTRL.bit.STEPSEL = config->step_selection;
+ 844: 798a ldrb r2, [r1, #6]
+ 846: 8803 ldrh r3, [r0, #0]
+ 848: 4032 ands r2, r6
+ 84a: 0312 lsls r2, r2, #12
+ 84c: 4c0d ldr r4, [pc, #52] ; (884 )
+ 84e: 4023 ands r3, r4
+ 850: 4313 orrs r3, r2
+ 852: 8003 strh r3, [r0, #0]
+ descriptor->BTCTRL.bit.STEPSIZE = config->step_size;
+ 854: 79cb ldrb r3, [r1, #7]
+ 856: 2207 movs r2, #7
+ 858: 401a ands r2, r3
+ 85a: 8803 ldrh r3, [r0, #0]
+ 85c: 0352 lsls r2, r2, #13
+ 85e: 04db lsls r3, r3, #19
+ 860: 0cdb lsrs r3, r3, #19
+ 862: 4313 orrs r3, r2
+ 864: 8003 strh r3, [r0, #0]
+
+ /* Set transfer size, source address and destination address */
+ descriptor->BTCNT.reg = config->block_transfer_count;
+ 866: 890b ldrh r3, [r1, #8]
+ 868: 8043 strh r3, [r0, #2]
+ descriptor->SRCADDR.reg = config->source_address;
+ 86a: 68cb ldr r3, [r1, #12]
+ 86c: 6043 str r3, [r0, #4]
+ descriptor->DSTADDR.reg = config->destination_address;
+ 86e: 690b ldr r3, [r1, #16]
+ 870: 6083 str r3, [r0, #8]
+
+ /* Set next transfer descriptor address */
+ descriptor->DESCADDR.reg = config->next_descriptor_address;
+ 872: 694b ldr r3, [r1, #20]
+ 874: 60c3 str r3, [r0, #12]
+}
+ 876: bdf0 pop {r4, r5, r6, r7, pc}
+ 878: fffffcff .word 0xfffffcff
+ 87c: fffffbff .word 0xfffffbff
+ 880: fffff7ff .word 0xfffff7ff
+ 884: ffffefff .word 0xffffefff
+
+00000888 :
+enum status_code dma_add_descriptor(struct dma_resource *resource,
+ DmacDescriptor* descriptor)
+{
+ DmacDescriptor* desc = resource->descriptor;
+
+ if (resource->job_status == STATUS_BUSY) {
+ 888: 7c42 ldrb r2, [r0, #17]
+ return STATUS_BUSY;
+ 88a: 2305 movs r3, #5
+ if (resource->job_status == STATUS_BUSY) {
+ 88c: 2a05 cmp r2, #5
+ 88e: d00b beq.n 8a8
+ DmacDescriptor* desc = resource->descriptor;
+ 890: 6983 ldr r3, [r0, #24]
+ }
+
+ /* Look up for an empty space for the descriptor */
+ if (desc == NULL) {
+ 892: 2b00 cmp r3, #0
+ 894: d00a beq.n 8ac
+ resource->descriptor = descriptor;
+ } else {
+ /* Looking for end of descriptor link */
+ while(desc->DESCADDR.reg != 0) {
+ 896: 68da ldr r2, [r3, #12]
+ 898: 2a00 cmp r2, #0
+ 89a: d003 beq.n 8a4
+ desc = (DmacDescriptor*)(desc->DESCADDR.reg);
+ 89c: 68db ldr r3, [r3, #12]
+ while(desc->DESCADDR.reg != 0) {
+ 89e: 68da ldr r2, [r3, #12]
+ 8a0: 2a00 cmp r2, #0
+ 8a2: d1fb bne.n 89c
+ }
+
+ /* Set to the end of descriptor list */
+ desc->DESCADDR.reg = (uint32_t)descriptor;
+ 8a4: 60d9 str r1, [r3, #12]
+ }
+
+ return STATUS_OK;
+ 8a6: 2300 movs r3, #0
+}
+ 8a8: 0018 movs r0, r3
+ 8aa: 4770 bx lr
+ resource->descriptor = descriptor;
+ 8ac: 6181 str r1, [r0, #24]
+ return STATUS_OK;
+ 8ae: 2300 movs r3, #0
+ 8b0: e7fa b.n 8a8
+
+000008b2 :
+/**
+ * \internal Calculate 64 bit division, ref can be found in
+ * http://en.wikipedia.org/wiki/Division_algorithm#Long_division
+ */
+static uint64_t long_division(uint64_t n, uint64_t d)
+{
+ 8b2: b5f0 push {r4, r5, r6, r7, lr}
+ 8b4: 46de mov lr, fp
+ 8b6: 4657 mov r7, sl
+ 8b8: 464e mov r6, r9
+ 8ba: 4645 mov r5, r8
+ 8bc: b5e0 push {r5, r6, r7, lr}
+ 8be: b087 sub sp, #28
+ 8c0: 4680 mov r8, r0
+ 8c2: 9104 str r1, [sp, #16]
+ 8c4: 0016 movs r6, r2
+ 8c6: 001f movs r7, r3
+ int32_t i;
+ uint64_t q = 0, r = 0, bit_shift;
+ 8c8: 2200 movs r2, #0
+ 8ca: 2300 movs r3, #0
+ 8cc: 2100 movs r1, #0
+ 8ce: 468b mov fp, r1
+ for (i = 63; i >= 0; i--) {
+ 8d0: 243f movs r4, #63 ; 0x3f
+ bit_shift = (uint64_t)1 << i;
+ 8d2: 2001 movs r0, #1
+ 8d4: 0021 movs r1, r4
+ 8d6: 9600 str r6, [sp, #0]
+ 8d8: 9701 str r7, [sp, #4]
+ 8da: 465c mov r4, fp
+ 8dc: 9403 str r4, [sp, #12]
+ 8de: 4644 mov r4, r8
+ 8e0: 9405 str r4, [sp, #20]
+ 8e2: e013 b.n 90c
+ 8e4: 2420 movs r4, #32
+ 8e6: 1a64 subs r4, r4, r1
+ 8e8: 0005 movs r5, r0
+ 8ea: 40e5 lsrs r5, r4
+ 8ec: 46a8 mov r8, r5
+ 8ee: e014 b.n 91a
+ if (n & bit_shift) {
+ r |= 0x01;
+ }
+
+ if (r >= d) {
+ r = r - d;
+ 8f0: 9c00 ldr r4, [sp, #0]
+ 8f2: 9d01 ldr r5, [sp, #4]
+ 8f4: 1b12 subs r2, r2, r4
+ 8f6: 41ab sbcs r3, r5
+ q |= bit_shift;
+ 8f8: 465c mov r4, fp
+ 8fa: 464d mov r5, r9
+ 8fc: 432c orrs r4, r5
+ 8fe: 46a3 mov fp, r4
+ 900: 9c03 ldr r4, [sp, #12]
+ 902: 4645 mov r5, r8
+ 904: 432c orrs r4, r5
+ 906: 9403 str r4, [sp, #12]
+ for (i = 63; i >= 0; i--) {
+ 908: 3901 subs r1, #1
+ 90a: d325 bcc.n 958
+ bit_shift = (uint64_t)1 << i;
+ 90c: 2420 movs r4, #32
+ 90e: 4264 negs r4, r4
+ 910: 190c adds r4, r1, r4
+ 912: d4e7 bmi.n 8e4
+ 914: 0005 movs r5, r0
+ 916: 40a5 lsls r5, r4
+ 918: 46a8 mov r8, r5
+ 91a: 0004 movs r4, r0
+ 91c: 408c lsls r4, r1
+ 91e: 46a1 mov r9, r4
+ r = r << 1;
+ 920: 1892 adds r2, r2, r2
+ 922: 415b adcs r3, r3
+ 924: 0014 movs r4, r2
+ 926: 001d movs r5, r3
+ if (n & bit_shift) {
+ 928: 9e05 ldr r6, [sp, #20]
+ 92a: 464f mov r7, r9
+ 92c: 403e ands r6, r7
+ 92e: 46b4 mov ip, r6
+ 930: 9e04 ldr r6, [sp, #16]
+ 932: 4647 mov r7, r8
+ 934: 403e ands r6, r7
+ 936: 46b2 mov sl, r6
+ 938: 4666 mov r6, ip
+ 93a: 4657 mov r7, sl
+ 93c: 433e orrs r6, r7
+ 93e: d003 beq.n 948
+ r |= 0x01;
+ 940: 0006 movs r6, r0
+ 942: 4326 orrs r6, r4
+ 944: 0032 movs r2, r6
+ 946: 002b movs r3, r5
+ if (r >= d) {
+ 948: 9c00 ldr r4, [sp, #0]
+ 94a: 9d01 ldr r5, [sp, #4]
+ 94c: 429d cmp r5, r3
+ 94e: d8db bhi.n 908
+ 950: d1ce bne.n 8f0
+ 952: 4294 cmp r4, r2
+ 954: d8d8 bhi.n 908
+ 956: e7cb b.n 8f0
+ 958: 9b03 ldr r3, [sp, #12]
+ }
+ }
+
+ return q;
+}
+ 95a: 4658 mov r0, fp
+ 95c: 0019 movs r1, r3
+ 95e: b007 add sp, #28
+ 960: bc3c pop {r2, r3, r4, r5}
+ 962: 4690 mov r8, r2
+ 964: 4699 mov r9, r3
+ 966: 46a2 mov sl, r4
+ 968: 46ab mov fp, r5
+ 96a: bdf0 pop {r4, r5, r6, r7, pc}
+
+0000096c <_sercom_get_sync_baud_val>:
+ */
+enum status_code _sercom_get_sync_baud_val(
+ const uint32_t baudrate,
+ const uint32_t external_clock,
+ uint16_t *const baudvalue)
+{
+ 96c: b510 push {r4, lr}
+ uint16_t baud_calculated = 0;
+ uint32_t clock_value = external_clock;
+
+
+ /* Check if baudrate is outside of valid range */
+ if (baudrate > (external_clock / 2)) {
+ 96e: 0849 lsrs r1, r1, #1
+ /* Return with error code */
+ return STATUS_ERR_BAUDRATE_UNAVAILABLE;
+ 970: 2340 movs r3, #64 ; 0x40
+ 972: 2400 movs r4, #0
+ if (baudrate > (external_clock / 2)) {
+ 974: 4281 cmp r1, r0
+ 976: d202 bcs.n 97e <_sercom_get_sync_baud_val+0x12>
+ return STATUS_ERR_BAUDRATE_UNAVAILABLE;
+ } else {
+ *baudvalue = baud_calculated;
+ return STATUS_OK;
+ }
+}
+ 978: 0018 movs r0, r3
+ 97a: bd10 pop {r4, pc}
+ baud_calculated++;
+ 97c: 001c movs r4, r3
+ clock_value = clock_value - baudrate;
+ 97e: 1a09 subs r1, r1, r0
+ baud_calculated++;
+ 980: 1c63 adds r3, r4, #1
+ 982: b29b uxth r3, r3
+ while (clock_value >= baudrate) {
+ 984: 4288 cmp r0, r1
+ 986: d9f9 bls.n 97c <_sercom_get_sync_baud_val+0x10>
+ return STATUS_ERR_BAUDRATE_UNAVAILABLE;
+ 988: 2340 movs r3, #64 ; 0x40
+ if (baud_calculated > 0xFF) {
+ 98a: 2cff cmp r4, #255 ; 0xff
+ 98c: d8f4 bhi.n 978 <_sercom_get_sync_baud_val+0xc>
+ *baudvalue = baud_calculated;
+ 98e: 8014 strh r4, [r2, #0]
+ return STATUS_OK;
+ 990: 2300 movs r3, #0
+ 992: e7f1 b.n 978 <_sercom_get_sync_baud_val+0xc>
+
+00000994 <_sercom_get_async_baud_val>:
+ const uint32_t baudrate,
+ const uint32_t peripheral_clock,
+ uint16_t *const baudval,
+ enum sercom_asynchronous_operation_mode mode,
+ enum sercom_asynchronous_sample_num sample_num)
+{
+ 994: b5f0 push {r4, r5, r6, r7, lr}
+ 996: b083 sub sp, #12
+ 998: 000f movs r7, r1
+ 99a: 0016 movs r6, r2
+ 99c: aa08 add r2, sp, #32
+ 99e: 7811 ldrb r1, [r2, #0]
+ uint8_t baud_fp;
+ uint32_t baud_int = 0;
+ uint64_t temp1;
+
+ /* Check if the baudrate is outside of valid range */
+ if ((baudrate * sample_num) > peripheral_clock) {
+ 9a0: 0004 movs r4, r0
+ 9a2: 434c muls r4, r1
+ /* Return with error code */
+ return STATUS_ERR_BAUDRATE_UNAVAILABLE;
+ 9a4: 2240 movs r2, #64 ; 0x40
+ if ((baudrate * sample_num) > peripheral_clock) {
+ 9a6: 42bc cmp r4, r7
+ 9a8: d902 bls.n 9b0 <_sercom_get_async_baud_val+0x1c>
+ baud_calculated = baud_int | (baud_fp << 13);
+ }
+
+ *baudval = baud_calculated;
+ return STATUS_OK;
+}
+ 9aa: 0010 movs r0, r2
+ 9ac: b003 add sp, #12
+ 9ae: bdf0 pop {r4, r5, r6, r7, pc}
+ if(mode == SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC) {
+ 9b0: 2b00 cmp r3, #0
+ 9b2: d114 bne.n 9de <_sercom_get_async_baud_val+0x4a>
+ temp1 = ((sample_num * (uint64_t)baudrate) << SHIFT);
+ 9b4: 0002 movs r2, r0
+ 9b6: 0008 movs r0, r1
+ 9b8: 2100 movs r1, #0
+ 9ba: 4c19 ldr r4, [pc, #100] ; (a20 <_sercom_get_async_baud_val+0x8c>)
+ 9bc: 47a0 blx r4
+ 9be: 0001 movs r1, r0
+ ratio = long_division(temp1, peripheral_clock);
+ 9c0: 003a movs r2, r7
+ 9c2: 2300 movs r3, #0
+ 9c4: 2000 movs r0, #0
+ 9c6: 4c17 ldr r4, [pc, #92] ; (a24 <_sercom_get_async_baud_val+0x90>)
+ 9c8: 47a0 blx r4
+ scale = ((uint64_t)1 << SHIFT) - ratio;
+ 9ca: 2200 movs r2, #0
+ 9cc: 2301 movs r3, #1
+ 9ce: 1a12 subs r2, r2, r0
+ 9d0: 418b sbcs r3, r1
+ baud_calculated = (65536 * scale) >> SHIFT;
+ 9d2: 0c12 lsrs r2, r2, #16
+ 9d4: 041b lsls r3, r3, #16
+ 9d6: 431a orrs r2, r3
+ *baudval = baud_calculated;
+ 9d8: 8032 strh r2, [r6, #0]
+ return STATUS_OK;
+ 9da: 2200 movs r2, #0
+ 9dc: e7e5 b.n 9aa <_sercom_get_async_baud_val+0x16>
+ uint64_t baud_calculated = 0;
+ 9de: 2200 movs r2, #0
+ } else if(mode == SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL) {
+ 9e0: 2b01 cmp r3, #1
+ 9e2: d1f9 bne.n 9d8 <_sercom_get_async_baud_val+0x44>
+ temp1 = ((uint64_t)baudrate * sample_num);
+ 9e4: 000a movs r2, r1
+ 9e6: 2300 movs r3, #0
+ 9e8: 2100 movs r1, #0
+ 9ea: 4c0d ldr r4, [pc, #52] ; (a20 <_sercom_get_async_baud_val+0x8c>)
+ 9ec: 47a0 blx r4
+ 9ee: 0002 movs r2, r0
+ 9f0: 000b movs r3, r1
+ 9f2: 9200 str r2, [sp, #0]
+ 9f4: 9301 str r3, [sp, #4]
+ baud_int = long_division( peripheral_clock, temp1);
+ 9f6: 0038 movs r0, r7
+ 9f8: 2100 movs r1, #0
+ 9fa: 4c0a ldr r4, [pc, #40] ; (a24 <_sercom_get_async_baud_val+0x90>)
+ 9fc: 47a0 blx r4
+ 9fe: 0005 movs r5, r0
+ if(baud_int > BAUD_INT_MAX) {
+ a00: 2380 movs r3, #128 ; 0x80
+ a02: 019b lsls r3, r3, #6
+ return STATUS_ERR_BAUDRATE_UNAVAILABLE;
+ a04: 2240 movs r2, #64 ; 0x40
+ if(baud_int > BAUD_INT_MAX) {
+ a06: 4298 cmp r0, r3
+ a08: d8cf bhi.n 9aa <_sercom_get_async_baud_val+0x16>
+ temp1 = long_division( 8 * (uint64_t)peripheral_clock, temp1);
+ a0a: 0f79 lsrs r1, r7, #29
+ a0c: 00f8 lsls r0, r7, #3
+ a0e: 9a00 ldr r2, [sp, #0]
+ a10: 9b01 ldr r3, [sp, #4]
+ a12: 47a0 blx r4
+ baud_fp = temp1 - 8 * baud_int;
+ a14: 00ea lsls r2, r5, #3
+ a16: 1a82 subs r2, r0, r2
+ baud_calculated = baud_int | (baud_fp << 13);
+ a18: b2d2 uxtb r2, r2
+ a1a: 0352 lsls r2, r2, #13
+ a1c: 432a orrs r2, r5
+ a1e: e7db b.n 9d8 <_sercom_get_async_baud_val+0x44>
+ a20: 00001f0d .word 0x00001f0d
+ a24: 000008b3 .word 0x000008b3
+
+00000a28 :
+ * forced.
+ */
+enum status_code sercom_set_gclk_generator(
+ const enum gclk_generator generator_source,
+ const bool force_change)
+{
+ a28: b510 push {r4, lr}
+ a2a: b082 sub sp, #8
+ a2c: 0004 movs r4, r0
+ /* Check if valid option */
+ if (!_sercom_config.generator_is_set || force_change) {
+ a2e: 4b0e ldr r3, [pc, #56] ; (a68 )
+ a30: 781b ldrb r3, [r3, #0]
+ a32: 2b00 cmp r3, #0
+ a34: d007 beq.n a46
+ a36: 2900 cmp r1, #0
+ a38: d105 bne.n a46
+ /* Save config */
+ _sercom_config.generator_source = generator_source;
+ _sercom_config.generator_is_set = true;
+
+ return STATUS_OK;
+ } else if (generator_source == _sercom_config.generator_source) {
+ a3a: 4b0b ldr r3, [pc, #44] ; (a68 )
+ a3c: 785b ldrb r3, [r3, #1]
+ a3e: 4283 cmp r3, r0
+ a40: d010 beq.n a64
+ /* Return status OK if same config */
+ return STATUS_OK;
+ }
+
+ /* Return invalid config to already initialized GCLK */
+ return STATUS_ERR_ALREADY_INITIALIZED;
+ a42: 201d movs r0, #29
+ a44: e00c b.n a60
+ gclk_chan_conf.source_generator = generator_source;
+ a46: a901 add r1, sp, #4
+ a48: 700c strb r4, [r1, #0]
+ system_gclk_chan_set_config(SERCOM_GCLK_ID, &gclk_chan_conf);
+ a4a: 2013 movs r0, #19
+ a4c: 4b07 ldr r3, [pc, #28] ; (a6c )
+ a4e: 4798 blx r3
+ system_gclk_chan_enable(SERCOM_GCLK_ID);
+ a50: 2013 movs r0, #19
+ a52: 4b07 ldr r3, [pc, #28] ; (a70 )
+ a54: 4798 blx r3
+ _sercom_config.generator_source = generator_source;
+ a56: 4b04 ldr r3, [pc, #16] ; (a68 )
+ a58: 705c strb r4, [r3, #1]
+ _sercom_config.generator_is_set = true;
+ a5a: 2201 movs r2, #1
+ a5c: 701a strb r2, [r3, #0]
+ return STATUS_OK;
+ a5e: 2000 movs r0, #0
+}
+ a60: b002 add sp, #8
+ a62: bd10 pop {r4, pc}
+ return STATUS_OK;
+ a64: 2000 movs r0, #0
+ a66: e7fb b.n a60
+ a68: 20000108 .word 0x20000108
+ a6c: 00001af5 .word 0x00001af5
+ a70: 00001a69 .word 0x00001a69
+
+00000a74 <_sercom_get_default_pad>:
+ */
+uint32_t _sercom_get_default_pad(
+ Sercom *const sercom_module,
+ const uint8_t pad)
+{
+ switch ((uintptr_t)sercom_module) {
+ a74: 4b40 ldr r3, [pc, #256] ; (b78 <_sercom_get_default_pad+0x104>)
+ a76: 4298 cmp r0, r3
+ a78: d031 beq.n ade <_sercom_get_default_pad+0x6a>
+ a7a: d90a bls.n a92 <_sercom_get_default_pad+0x1e>
+ a7c: 4b3f ldr r3, [pc, #252] ; (b7c <_sercom_get_default_pad+0x108>)
+ a7e: 4298 cmp r0, r3
+ a80: d04d beq.n b1e <_sercom_get_default_pad+0xaa>
+ a82: 4b3f ldr r3, [pc, #252] ; (b80 <_sercom_get_default_pad+0x10c>)
+ a84: 4298 cmp r0, r3
+ a86: d05a beq.n b3e <_sercom_get_default_pad+0xca>
+ a88: 4b3e ldr r3, [pc, #248] ; (b84 <_sercom_get_default_pad+0x110>)
+ a8a: 4298 cmp r0, r3
+ a8c: d037 beq.n afe <_sercom_get_default_pad+0x8a>
+ /* Auto-generate a lookup table for the default SERCOM pad defaults */
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ }
+
+ Assert(false);
+ return 0;
+ a8e: 2000 movs r0, #0
+}
+ a90: 4770 bx lr
+ switch ((uintptr_t)sercom_module) {
+ a92: 4b3d ldr r3, [pc, #244] ; (b88 <_sercom_get_default_pad+0x114>)
+ a94: 4298 cmp r0, r3
+ a96: d00c beq.n ab2 <_sercom_get_default_pad+0x3e>
+ a98: 4b3c ldr r3, [pc, #240] ; (b8c <_sercom_get_default_pad+0x118>)
+ a9a: 4298 cmp r0, r3
+ a9c: d1f7 bne.n a8e <_sercom_get_default_pad+0x1a>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ a9e: 2901 cmp r1, #1
+ aa0: d017 beq.n ad2 <_sercom_get_default_pad+0x5e>
+ aa2: 2900 cmp r1, #0
+ aa4: d05d beq.n b62 <_sercom_get_default_pad+0xee>
+ aa6: 2902 cmp r1, #2
+ aa8: d015 beq.n ad6 <_sercom_get_default_pad+0x62>
+ aaa: 2903 cmp r1, #3
+ aac: d015 beq.n ada <_sercom_get_default_pad+0x66>
+ return 0;
+ aae: 2000 movs r0, #0
+ ab0: e7ee b.n a90 <_sercom_get_default_pad+0x1c>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ ab2: 2901 cmp r1, #1
+ ab4: d007 beq.n ac6 <_sercom_get_default_pad+0x52>
+ ab6: 2900 cmp r1, #0
+ ab8: d051 beq.n b5e <_sercom_get_default_pad+0xea>
+ aba: 2902 cmp r1, #2
+ abc: d005 beq.n aca <_sercom_get_default_pad+0x56>
+ abe: 2903 cmp r1, #3
+ ac0: d005 beq.n ace <_sercom_get_default_pad+0x5a>
+ return 0;
+ ac2: 2000 movs r0, #0
+ ac4: e7e4 b.n a90 <_sercom_get_default_pad+0x1c>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ ac6: 4832 ldr r0, [pc, #200] ; (b90 <_sercom_get_default_pad+0x11c>)
+ ac8: e7e2 b.n a90 <_sercom_get_default_pad+0x1c>
+ aca: 4832 ldr r0, [pc, #200] ; (b94 <_sercom_get_default_pad+0x120>)
+ acc: e7e0 b.n a90 <_sercom_get_default_pad+0x1c>
+ ace: 4832 ldr r0, [pc, #200] ; (b98 <_sercom_get_default_pad+0x124>)
+ ad0: e7de b.n a90 <_sercom_get_default_pad+0x1c>
+ ad2: 4832 ldr r0, [pc, #200] ; (b9c <_sercom_get_default_pad+0x128>)
+ ad4: e7dc b.n a90 <_sercom_get_default_pad+0x1c>
+ ad6: 4832 ldr r0, [pc, #200] ; (ba0 <_sercom_get_default_pad+0x12c>)
+ ad8: e7da b.n a90 <_sercom_get_default_pad+0x1c>
+ ada: 4832 ldr r0, [pc, #200] ; (ba4 <_sercom_get_default_pad+0x130>)
+ adc: e7d8 b.n a90 <_sercom_get_default_pad+0x1c>
+ ade: 2901 cmp r1, #1
+ ae0: d007 beq.n af2 <_sercom_get_default_pad+0x7e>
+ ae2: 2900 cmp r1, #0
+ ae4: d03f beq.n b66 <_sercom_get_default_pad+0xf2>
+ ae6: 2902 cmp r1, #2
+ ae8: d005 beq.n af6 <_sercom_get_default_pad+0x82>
+ aea: 2903 cmp r1, #3
+ aec: d005 beq.n afa <_sercom_get_default_pad+0x86>
+ return 0;
+ aee: 2000 movs r0, #0
+ af0: e7ce b.n a90 <_sercom_get_default_pad+0x1c>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ af2: 482d ldr r0, [pc, #180] ; (ba8 <_sercom_get_default_pad+0x134>)
+ af4: e7cc b.n a90 <_sercom_get_default_pad+0x1c>
+ af6: 482d ldr r0, [pc, #180] ; (bac <_sercom_get_default_pad+0x138>)
+ af8: e7ca b.n a90 <_sercom_get_default_pad+0x1c>
+ afa: 482d ldr r0, [pc, #180] ; (bb0 <_sercom_get_default_pad+0x13c>)
+ afc: e7c8 b.n a90 <_sercom_get_default_pad+0x1c>
+ afe: 2901 cmp r1, #1
+ b00: d007 beq.n b12 <_sercom_get_default_pad+0x9e>
+ b02: 2900 cmp r1, #0
+ b04: d031 beq.n b6a <_sercom_get_default_pad+0xf6>
+ b06: 2902 cmp r1, #2
+ b08: d005 beq.n b16 <_sercom_get_default_pad+0xa2>
+ b0a: 2903 cmp r1, #3
+ b0c: d005 beq.n b1a <_sercom_get_default_pad+0xa6>
+ return 0;
+ b0e: 2000 movs r0, #0
+ b10: e7be b.n a90 <_sercom_get_default_pad+0x1c>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ b12: 4828 ldr r0, [pc, #160] ; (bb4 <_sercom_get_default_pad+0x140>)
+ b14: e7bc b.n a90 <_sercom_get_default_pad+0x1c>
+ b16: 4828 ldr r0, [pc, #160] ; (bb8 <_sercom_get_default_pad+0x144>)
+ b18: e7ba b.n a90 <_sercom_get_default_pad+0x1c>
+ b1a: 4828 ldr r0, [pc, #160] ; (bbc <_sercom_get_default_pad+0x148>)
+ b1c: e7b8 b.n a90 <_sercom_get_default_pad+0x1c>
+ b1e: 2901 cmp r1, #1
+ b20: d007 beq.n b32 <_sercom_get_default_pad+0xbe>
+ b22: 2900 cmp r1, #0
+ b24: d023 beq.n b6e <_sercom_get_default_pad+0xfa>
+ b26: 2902 cmp r1, #2
+ b28: d005 beq.n b36 <_sercom_get_default_pad+0xc2>
+ b2a: 2903 cmp r1, #3
+ b2c: d005 beq.n b3a <_sercom_get_default_pad+0xc6>
+ return 0;
+ b2e: 2000 movs r0, #0
+ b30: e7ae b.n a90 <_sercom_get_default_pad+0x1c>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ b32: 4823 ldr r0, [pc, #140] ; (bc0 <_sercom_get_default_pad+0x14c>)
+ b34: e7ac b.n a90 <_sercom_get_default_pad+0x1c>
+ b36: 4823 ldr r0, [pc, #140] ; (bc4 <_sercom_get_default_pad+0x150>)
+ b38: e7aa b.n a90 <_sercom_get_default_pad+0x1c>
+ b3a: 4823 ldr r0, [pc, #140] ; (bc8 <_sercom_get_default_pad+0x154>)
+ b3c: e7a8 b.n a90 <_sercom_get_default_pad+0x1c>
+ b3e: 2901 cmp r1, #1
+ b40: d007 beq.n b52 <_sercom_get_default_pad+0xde>
+ b42: 2900 cmp r1, #0
+ b44: d015 beq.n b72 <_sercom_get_default_pad+0xfe>
+ b46: 2902 cmp r1, #2
+ b48: d005 beq.n b56 <_sercom_get_default_pad+0xe2>
+ b4a: 2903 cmp r1, #3
+ b4c: d005 beq.n b5a <_sercom_get_default_pad+0xe6>
+ return 0;
+ b4e: 2000 movs r0, #0
+ b50: e79e b.n a90 <_sercom_get_default_pad+0x1c>
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
+ b52: 481e ldr r0, [pc, #120] ; (bcc <_sercom_get_default_pad+0x158>)
+ b54: e79c b.n a90 <_sercom_get_default_pad+0x1c>
+ b56: 481e ldr r0, [pc, #120] ; (bd0 <_sercom_get_default_pad+0x15c>)
+ b58: e79a b.n a90 <_sercom_get_default_pad+0x1c>
+ b5a: 481e ldr r0, [pc, #120] ; (bd4 <_sercom_get_default_pad+0x160>)
+ b5c: e798 b.n a90 <_sercom_get_default_pad+0x1c>
+ b5e: 481e ldr r0, [pc, #120] ; (bd8 <_sercom_get_default_pad+0x164>)
+ b60: e796 b.n a90 <_sercom_get_default_pad+0x1c>
+ b62: 2003 movs r0, #3
+ b64: e794 b.n a90 <_sercom_get_default_pad+0x1c>
+ b66: 481d ldr r0, [pc, #116] ; (bdc <_sercom_get_default_pad+0x168>)
+ b68: e792 b.n a90 <_sercom_get_default_pad+0x1c>
+ b6a: 481d ldr r0, [pc, #116] ; (be0 <_sercom_get_default_pad+0x16c>)
+ b6c: e790 b.n a90 <_sercom_get_default_pad+0x1c>
+ b6e: 481d ldr r0, [pc, #116] ; (be4 <_sercom_get_default_pad+0x170>)
+ b70: e78e b.n a90 <_sercom_get_default_pad+0x1c>
+ b72: 481d ldr r0, [pc, #116] ; (be8 <_sercom_get_default_pad+0x174>)
+ b74: e78c b.n a90 <_sercom_get_default_pad+0x1c>
+ b76: 46c0 nop ; (mov r8, r8)
+ b78: 42001000 .word 0x42001000
+ b7c: 42001800 .word 0x42001800
+ b80: 42001c00 .word 0x42001c00
+ b84: 42001400 .word 0x42001400
+ b88: 42000800 .word 0x42000800
+ b8c: 42000c00 .word 0x42000c00
+ b90: 00050003 .word 0x00050003
+ b94: 00060003 .word 0x00060003
+ b98: 00070003 .word 0x00070003
+ b9c: 00010003 .word 0x00010003
+ ba0: 001e0003 .word 0x001e0003
+ ba4: 001f0003 .word 0x001f0003
+ ba8: 00090003 .word 0x00090003
+ bac: 000a0003 .word 0x000a0003
+ bb0: 000b0003 .word 0x000b0003
+ bb4: 00110003 .word 0x00110003
+ bb8: 00120003 .word 0x00120003
+ bbc: 00130003 .word 0x00130003
+ bc0: 000d0003 .word 0x000d0003
+ bc4: 000e0003 .word 0x000e0003
+ bc8: 000f0003 .word 0x000f0003
+ bcc: 00170003 .word 0x00170003
+ bd0: 00180003 .word 0x00180003
+ bd4: 00190003 .word 0x00190003
+ bd8: 00040003 .word 0x00040003
+ bdc: 00080003 .word 0x00080003
+ be0: 00100003 .word 0x00100003
+ be4: 000c0003 .word 0x000c0003
+ be8: 00160003 .word 0x00160003
+
+00000bec <_sercom_get_sercom_inst_index>:
+ *
+ * \return Index of given instance.
+ */
+uint8_t _sercom_get_sercom_inst_index(
+ Sercom *const sercom_instance)
+{
+ bec: b530 push {r4, r5, lr}
+ bee: b087 sub sp, #28
+ /* Save all available SERCOM instances for compare */
+ Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
+ bf0: 4b0b ldr r3, [pc, #44] ; (c20 <_sercom_get_sercom_inst_index+0x34>)
+ bf2: 466a mov r2, sp
+ bf4: cb32 ldmia r3!, {r1, r4, r5}
+ bf6: c232 stmia r2!, {r1, r4, r5}
+ bf8: cb32 ldmia r3!, {r1, r4, r5}
+ bfa: c232 stmia r2!, {r1, r4, r5}
+
+ /* Find index for sercom instance */
+ for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
+ if ((uintptr_t)sercom_instance == (uintptr_t)sercom_instances[i]) {
+ bfc: 9b00 ldr r3, [sp, #0]
+ bfe: 4283 cmp r3, r0
+ c00: d00b beq.n c1a <_sercom_get_sercom_inst_index+0x2e>
+ c02: 2301 movs r3, #1
+ c04: 009a lsls r2, r3, #2
+ c06: 4669 mov r1, sp
+ c08: 5852 ldr r2, [r2, r1]
+ c0a: 4282 cmp r2, r0
+ c0c: d006 beq.n c1c <_sercom_get_sercom_inst_index+0x30>
+ for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
+ c0e: 3301 adds r3, #1
+ c10: 2b06 cmp r3, #6
+ c12: d1f7 bne.n c04 <_sercom_get_sercom_inst_index+0x18>
+ }
+ }
+
+ /* Invalid data given */
+ Assert(false);
+ return 0;
+ c14: 2000 movs r0, #0
+}
+ c16: b007 add sp, #28
+ c18: bd30 pop {r4, r5, pc}
+ for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
+ c1a: 2300 movs r3, #0
+ return i;
+ c1c: b2d8 uxtb r0, r3
+ c1e: e7fa b.n c16 <_sercom_get_sercom_inst_index+0x2a>
+ c20: 000037f4 .word 0x000037f4
+
+00000c24 <_read>:
+int __attribute__((weak))
+_read (int file, char * ptr, int len); // Remove GCC compiler warning
+
+int __attribute__((weak))
+_read (int file, char * ptr, int len)
+{
+ c24: b5f0 push {r4, r5, r6, r7, lr}
+ c26: 46c6 mov lr, r8
+ c28: b500 push {lr}
+ c2a: 000c movs r4, r1
+ c2c: 4690 mov r8, r2
+ int nChars = 0;
+
+ if (file != 0) {
+ c2e: 2800 cmp r0, #0
+ c30: d10f bne.n c52 <_read+0x2e>
+ return -1;
+ }
+
+ for (; len > 0; --len) {
+ c32: 2a00 cmp r2, #0
+ c34: dd11 ble.n c5a <_read+0x36>
+ c36: 188f adds r7, r1, r2
+ ptr_get(stdio_base, ptr);
+ c38: 4e09 ldr r6, [pc, #36] ; (c60 <_read+0x3c>)
+ c3a: 4d0a ldr r5, [pc, #40] ; (c64 <_read+0x40>)
+ c3c: 6830 ldr r0, [r6, #0]
+ c3e: 0021 movs r1, r4
+ c40: 682b ldr r3, [r5, #0]
+ c42: 4798 blx r3
+ ptr++;
+ c44: 3401 adds r4, #1
+ for (; len > 0; --len) {
+ c46: 42bc cmp r4, r7
+ c48: d1f8 bne.n c3c <_read+0x18>
+ nChars++;
+ }
+ return nChars;
+}
+ c4a: 4640 mov r0, r8
+ c4c: bc04 pop {r2}
+ c4e: 4690 mov r8, r2
+ c50: bdf0 pop {r4, r5, r6, r7, pc}
+ return -1;
+ c52: 2301 movs r3, #1
+ c54: 425b negs r3, r3
+ c56: 4698 mov r8, r3
+ c58: e7f7 b.n c4a <_read+0x26>
+ for (; len > 0; --len) {
+ c5a: 4680 mov r8, r0
+ c5c: e7f5 b.n c4a <_read+0x26>
+ c5e: 46c0 nop ; (mov r8, r8)
+ c60: 20000238 .word 0x20000238
+ c64: 20000230 .word 0x20000230
+
+00000c68 <_write>:
+int __attribute__((weak))
+_write (int file, char * ptr, int len);
+
+int __attribute__((weak))
+_write (int file, char * ptr, int len)
+{
+ c68: b5f0 push {r4, r5, r6, r7, lr}
+ c6a: 46c6 mov lr, r8
+ c6c: b500 push {lr}
+ c6e: 000e movs r6, r1
+ c70: 0015 movs r5, r2
+ int nChars = 0;
+
+ if ((file != 1) && (file != 2) && (file!=3)) {
+ c72: 3801 subs r0, #1
+ c74: 2802 cmp r0, #2
+ c76: d810 bhi.n c9a <_write+0x32>
+ return -1;
+ }
+
+ for (; len != 0; --len) {
+ c78: 2a00 cmp r2, #0
+ c7a: d011 beq.n ca0 <_write+0x38>
+ c7c: 2400 movs r4, #0
+ if (ptr_put(stdio_base, *ptr++) < 0) {
+ c7e: 4b0c ldr r3, [pc, #48] ; (cb0 <_write+0x48>)
+ c80: 4698 mov r8, r3
+ c82: 4f0c ldr r7, [pc, #48] ; (cb4 <_write+0x4c>)
+ c84: 4643 mov r3, r8
+ c86: 6818 ldr r0, [r3, #0]
+ c88: 5d31 ldrb r1, [r6, r4]
+ c8a: 683b ldr r3, [r7, #0]
+ c8c: 4798 blx r3
+ c8e: 2800 cmp r0, #0
+ c90: db08 blt.n ca4 <_write+0x3c>
+ return -1;
+ }
+ ++nChars;
+ c92: 3401 adds r4, #1
+ for (; len != 0; --len) {
+ c94: 42a5 cmp r5, r4
+ c96: d1f5 bne.n c84 <_write+0x1c>
+ c98: e006 b.n ca8 <_write+0x40>
+ return -1;
+ c9a: 2401 movs r4, #1
+ c9c: 4264 negs r4, r4
+ c9e: e003 b.n ca8 <_write+0x40>
+ for (; len != 0; --len) {
+ ca0: 0014 movs r4, r2
+ ca2: e001 b.n ca8 <_write+0x40>
+ return -1;
+ ca4: 2401 movs r4, #1
+ ca6: 4264 negs r4, r4
+ }
+ return nChars;
+}
+ ca8: 0020 movs r0, r4
+ caa: bc04 pop {r2}
+ cac: 4690 mov r8, r2
+ cae: bdf0 pop {r4, r5, r6, r7, pc}
+ cb0: 20000238 .word 0x20000238
+ cb4: 20000234 .word 0x20000234
+
+00000cb8 :
+
+COMPILER_ALIGNED(16)
+DmacDescriptor adc_descriptor SECTION_DMAC_DESCRIPTOR;
+
+void padc_init(void)
+{
+ cb8: b530 push {r4, r5, lr}
+ cba: b095 sub sp, #84 ; 0x54
+ // configure adc
+ struct adc_config adc_conf;
+ adc_get_config_defaults(&adc_conf);
+ cbc: ac08 add r4, sp, #32
+ cbe: 0020 movs r0, r4
+ cc0: 4b2a ldr r3, [pc, #168] ; (d6c )
+ cc2: 4798 blx r3
+ adc_conf.gain_factor = P_ADC_GAIN_FACTOR;
+ cc4: 2300 movs r3, #0
+ cc6: 60a3 str r3, [r4, #8]
+ adc_conf.resolution = P_ADC_RESOLUTION;
+ cc8: 7123 strb r3, [r4, #4]
+ adc_conf.clock_prescaler = P_ADC_CLOCK_PRESCALAR;
+ cca: 2280 movs r2, #128 ; 0x80
+ ccc: 0092 lsls r2, r2, #2
+ cce: 8062 strh r2, [r4, #2]
+ adc_conf.reference = P_ADC_VREF;
+ cd0: 2201 movs r2, #1
+ cd2: 7062 strb r2, [r4, #1]
+ adc_conf.positive_input = P_ADC_POSITIVE_INPUT_PIN;
+ cd4: 2104 movs r1, #4
+ cd6: 7321 strb r1, [r4, #12]
+ adc_conf.negative_input = P_ADC_NEGATIVE_INPUT_PIN;
+ cd8: 21c0 movs r1, #192 ; 0xc0
+ cda: 0149 lsls r1, r1, #5
+ cdc: 81e1 strh r1, [r4, #14]
+ adc_conf.freerunning = true;
+ cde: 7522 strb r2, [r4, #20]
+ adc_conf.left_adjust = false;
+ ce0: 74a3 strb r3, [r4, #18]
+
+ adc_init(&adc_mod, ADC, &adc_conf);
+ ce2: 4d23 ldr r5, [pc, #140] ; (d70 )
+ ce4: 0022 movs r2, r4
+ ce6: 4923 ldr r1, [pc, #140] ; (d74 )
+ ce8: 0028 movs r0, r5
+ cea: 4b23 ldr r3, [pc, #140] ; (d78 )
+ cec: 4798 blx r3
+ struct adc_module *const module_inst)
+{
+ Assert(module_inst);
+ Assert(module_inst->hw);
+
+ Adc *const adc_module = module_inst->hw;
+ cee: 682a ldr r2, [r5, #0]
+ cf0: 7e53 ldrb r3, [r2, #25]
+
+ while (adc_is_syncing(module_inst)) {
+ cf2: b25b sxtb r3, r3
+ cf4: 2b00 cmp r3, #0
+ cf6: dbfb blt.n cf0
+ system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_ADC);
+# endif
+#endif
+
+ /* Disbale interrupt */
+ adc_module->INTENCLR.reg = ADC_INTENCLR_MASK;
+ cf8: 230f movs r3, #15
+ cfa: 7593 strb r3, [r2, #22]
+ /* Clear interrupt flag */
+ adc_module->INTFLAG.reg = ADC_INTFLAG_MASK;
+ cfc: 7613 strb r3, [r2, #24]
+
+ adc_module->CTRLA.reg |= ADC_CTRLA_ENABLE;
+ cfe: 7813 ldrb r3, [r2, #0]
+ d00: 2102 movs r1, #2
+ d02: 430b orrs r3, r1
+ d04: 7013 strb r3, [r2, #0]
+ Adc *const adc_module = module_inst->hw;
+ d06: 4b1a ldr r3, [pc, #104] ; (d70 )
+ d08: 681a ldr r2, [r3, #0]
+ if (adc_module->STATUS.reg & ADC_STATUS_SYNCBUSY) {
+ d0a: 7e53 ldrb r3, [r2, #25]
+
+ while (adc_is_syncing(module_inst)) {
+ d0c: b25b sxtb r3, r3
+ d0e: 2b00 cmp r3, #0
+ d10: dbfb blt.n d0a
+ adc_enable(&adc_mod);
+
+ // configure dma resource
+ struct dma_resource_config dma_resource_conf;
+ dma_get_config_defaults(&dma_resource_conf);
+ d12: ac06 add r4, sp, #24
+ d14: 0020 movs r0, r4
+ d16: 4b19 ldr r3, [pc, #100] ; (d7c )
+ d18: 4798 blx r3
+ dma_resource_conf.peripheral_trigger = ADC_DMAC_ID_RESRDY;
+ d1a: 2327 movs r3, #39 ; 0x27
+ d1c: 7063 strb r3, [r4, #1]
+ dma_resource_conf.trigger_action = DMA_TRIGGER_ACTION_BEAT;
+ d1e: 3b25 subs r3, #37 ; 0x25
+ d20: 70a3 strb r3, [r4, #2]
+ // allocate dma resource
+ dma_allocate(&adc_resource, &dma_resource_conf);
+ d22: 4d17 ldr r5, [pc, #92] ; (d80 )
+ d24: 0021 movs r1, r4
+ d26: 0028 movs r0, r5
+ d28: 4b16 ldr r3, [pc, #88] ; (d84 )
+ d2a: 4798 blx r3
+static inline void dma_descriptor_get_config_defaults(struct dma_descriptor_config *config)
+{
+ Assert(config);
+
+ /* Set descriptor as valid */
+ config->descriptor_valid = true;
+ d2c: 2201 movs r2, #1
+ d2e: 466b mov r3, sp
+ d30: 701a strb r2, [r3, #0]
+ /* Disable event output */
+ config->event_output_selection = DMA_EVENT_OUTPUT_DISABLE;
+ d32: 2300 movs r3, #0
+ d34: 4669 mov r1, sp
+ d36: 704b strb r3, [r1, #1]
+ /* No block action */
+ config->block_action = DMA_BLOCK_ACTION_NOACT;
+ d38: 708b strb r3, [r1, #2]
+ /* Set beat size to one byte */
+ config->beat_size = DMA_BEAT_SIZE_BYTE;
+ /* Enable source increment */
+ config->src_increment_enable = true;
+ /* Enable destination increment */
+ config->dst_increment_enable = true;
+ d3a: 714a strb r2, [r1, #5]
+ /* Step size is applied to the destination address */
+ config->step_selection = DMA_STEPSEL_DST;
+ d3c: 718b strb r3, [r1, #6]
+ /* Address increment is beat size multiplied by 1*/
+ config->step_size = DMA_ADDRESS_INCREMENT_STEP_SIZE_1;
+ d3e: 71cb strb r3, [r1, #7]
+ // setup transfer descriptor
+ struct dma_descriptor_config dma_desc_conf;
+ dma_descriptor_get_config_defaults(&dma_desc_conf);
+ dma_desc_conf.beat_size = DMA_BEAT_SIZE_HWORD; // 16 bit
+ d40: 70ca strb r2, [r1, #3]
+ dma_desc_conf.dst_increment_enable = true;
+ dma_desc_conf.src_increment_enable = false;
+ d42: 710b strb r3, [r1, #4]
+ dma_desc_conf.block_transfer_count = sizeof(raw_adc_values) / 2;
+ d44: 3310 adds r3, #16
+ d46: 810b strh r3, [r1, #8]
+ dma_desc_conf.source_address = (uint32_t)(&adc_mod.hw->RESULT.reg);
+ d48: 4b09 ldr r3, [pc, #36] ; (d70 )
+ d4a: 681b ldr r3, [r3, #0]
+ d4c: 331a adds r3, #26
+ d4e: 9303 str r3, [sp, #12]
+ dma_desc_conf.destination_address = (uint32_t)(raw_adc_values + (sizeof(raw_adc_values) / 2));
+ d50: 4b0d ldr r3, [pc, #52] ; (d88 )
+ d52: 3320 adds r3, #32
+ d54: 9304 str r3, [sp, #16]
+ dma_desc_conf.next_descriptor_address = (uint32_t)&adc_descriptor;
+ d56: 4c0d ldr r4, [pc, #52] ; (d8c )
+ d58: 9405 str r4, [sp, #20]
+ dma_descriptor_create(&adc_descriptor, &dma_desc_conf);
+ d5a: 0020 movs r0, r4
+ d5c: 4b0c ldr r3, [pc, #48] ; (d90 )
+ d5e: 4798 blx r3
+ dma_add_descriptor(&adc_resource, &adc_descriptor);
+ d60: 0021 movs r1, r4
+ d62: 0028 movs r0, r5
+ d64: 4b0b ldr r3, [pc, #44] ; (d94 )
+ d66: 4798 blx r3
+}
+ d68: b015 add sp, #84 ; 0x54
+ d6a: bd30 pop {r4, r5, pc}
+ d6c: 00000115 .word 0x00000115
+ d70: 2000010c .word 0x2000010c
+ d74: 42004000 .word 0x42004000
+ d78: 0000015d .word 0x0000015d
+ d7c: 00000601 .word 0x00000601
+ d80: 20000114 .word 0x20000114
+ d84: 00000611 .word 0x00000611
+ d88: 20000130 .word 0x20000130
+ d8c: 20000240 .word 0x20000240
+ d90: 000007e1 .word 0x000007e1
+ d94: 00000889 .word 0x00000889
+
+00000d98 :
+
+void padc_start(void)
+{
+ d98: b510 push {r4, lr}
+ struct adc_module *const module_inst)
+{
+ Assert(module_inst);
+ Assert(module_inst->hw);
+
+ Adc *const adc_module = module_inst->hw;
+ d9a: 4b09 ldr r3, [pc, #36] ; (dc0 )
+ d9c: 681a ldr r2, [r3, #0]
+ d9e: 7e53 ldrb r3, [r2, #25]
+
+ while (adc_is_syncing(module_inst)) {
+ da0: b25b sxtb r3, r3
+ da2: 2b00 cmp r3, #0
+ da4: dbfb blt.n d9e
+ /* Wait for synchronization */
+ }
+
+ adc_module->SWTRIG.reg |= ADC_SWTRIG_START;
+ da6: 7b13 ldrb r3, [r2, #12]
+ da8: 2102 movs r1, #2
+ daa: 430b orrs r3, r1
+ dac: 7313 strb r3, [r2, #12]
+ dae: 7e53 ldrb r3, [r2, #25]
+
+ while (adc_is_syncing(module_inst)) {
+ db0: b25b sxtb r3, r3
+ db2: 2b00 cmp r3, #0
+ db4: dbfb blt.n dae
+ adc_start_conversion(&adc_mod);
+ dma_start_transfer_job(&adc_resource);
+ db6: 4803 ldr r0, [pc, #12] ; (dc4 )
+ db8: 4b03 ldr r3, [pc, #12] ; (dc8 )
+ dba: 4798 blx r3
+}
+ dbc: bd10 pop {r4, pc}
+ dbe: 46c0 nop ; (mov r8, r8)
+ dc0: 2000010c .word 0x2000010c
+ dc4: 20000114 .word 0x20000114
+ dc8: 00000759 .word 0x00000759
+
+00000dcc :
+ uint16_t raw = padc_get_raw();
+ return (float)((float)raw / 4096.0f * P_ADC_VREF_VAL);
+}
+
+uint16_t padc_get_raw(void)
+{
+ dcc: 4b05 ldr r3, [pc, #20] ; (de4