From 05e015b1f65f7d8b7cac0c71f950d8eeab5499e7 Mon Sep 17 00:00:00 2001 From: Penguin Date: Fri, 22 May 2020 01:00:23 -0500 Subject: [PATCH] added hw pin mappings for ssd1963 --- .../.vs/project_oracle_test_prj/v14/.atsuo | Bin 31232 -> 29184 bytes .../project_oracle_test_prj/Config/pc_board.h | 51 ++ .../Config/pc_master.h | 23 + .../devices/display/p_ssd1963.c | 292 ++++++- .../devices/display/p_ssd1963.h | 141 +++- .../project_oracle_test_prj/drivers/p_gpio.c | 16 +- .../project_oracle_test_prj/drivers/p_gpio.h | 3 + .../project_oracle_test_prj/main.c | 2 + .../project_oracle_test_prj.cproj | 787 ++++++++++++++++++ 9 files changed, 1306 insertions(+), 9 deletions(-) diff --git a/software/firmware/project_oracle_test_prj/.vs/project_oracle_test_prj/v14/.atsuo b/software/firmware/project_oracle_test_prj/.vs/project_oracle_test_prj/v14/.atsuo index 99c8c901fab51e67366be9072013563d8a23bde2..2643f7004fcee77510ca6cc8645499730f5f77ab 100644 GIT binary patch delta 726 zcmZqp!r1VHae@t_^hR5KCO(FbSImFuUt<(t00OhgRZLZk*EfGS9 z<0PgWz6HfS4DE`G6QC#}1??JFuwmfSdtR1Ok%_ zSPXd3T_I@!RRMA=NEHW=1{t9VaSaFKA}%(8MxbC55H|zyRUqCh5aPi&IUsb!Brbu? z0wS9kCm&`qlnDXKxG@3=Ai%97Phqoym;*PpoKAHa;2ab zh{sk5ly+m>{7XKK5v+7FQ0XEoiA83Nj0+|+8hKCdNmw;GD}`%vL&7%i5{3+hOok$c z6ovwZL?B(lP{|O(ki$^MkPajvtazYo5l|$aA(BGCSLpeqn&v8~Z|S(*JWl}F@=*v$u*8Ye46h)hi2nA{g^G`ZQ| z0c&XRKtcm#Ed#@*EC*ziaJ8PY(k3KA&bFyMiy0MV1zuqY^617$#*e?V*jWSaspClFf!u{IF@+ZZU! zIEg8T@4@72s5W~}KFn+gvYkztak7Mh0xQS}&B?Y3`i!cRb6NCxHGtZ+Kt=$?wI{D+ zQD!xP7^u&LBK*o$#W^CA8;nm)J{4rfIAyb=F(;!;Izs_NCPO}h9z!xifAbdxom&=5 zz2C{2tq|F1I@uv#X|qSz4#vq1N-UdMtp12k%5vBgqroVY!7yRxQlk~0S#tVjdNn`l z$YKPlb(n0x#5T#uL7)+6YZDMR12NcQ0Ra!ji6JW{I~W}iN@j5X?ya;Wd2{xr>H}Q= zg+fArTD2JafX-oLoO~;dZ?izeN5RP+nMRw9^LQBrd=sV0Uw!rIJUVg1{i4&4S4~dz z+JMuBNn#3<70ecMG6KE(UkGUZGroup[1]) + +#define SSD1963_TFT_nRST_PIN PIN_PA04 +#define SSD1963_TFT_nRST_PORT_PIN 4 +#define SSD1963_TFT_nRST_PORT GPIO_PORTA +#define SSD1963_TFT_nRST_FUNCTION GPIO_PIN_FUNCTION_OFF +#define SSD1963_TFT_nRST_DIRECTION GPIO_DIRECTION_OUT +#define SSD1963_TFT_nRST_PULL_MODE GPIO_PULL_UP +#define SSD1963_TFT_nRST GPIO(SSD1963_TFT_nRST_PORT, SSD1963_TFT_nRST_PORT_PIN) + +#define SSD1963_TFT_RSDC_PIN PIN_PA05 +#define SSD1963_TFT_RSDC_PORT_PIN 5 +#define SSD1963_TFT_RSDC_PORT GPIO_PORTA +#define SSD1963_TFT_RSDC_FUNCTION GPIO_PIN_FUNCTION_OFF +#define SSD1963_TFT_RSDC_DIRECTION GPIO_DIRECTION_OUT +#define SSD1963_TFT_RSDC_PULL_MODE GPIO_PULL_UP +#define SSD1963_TFT_RSDC GPIO(SSD1963_TFT_RSDC_PORT, SSD1963_TFT_CS_PORT_PIN) + +#define SSD1963_TFT_CS_PIN PIN_PA06 +#define SSD1963_TFT_CS_PORT_PIN 6 +#define SSD1963_TFT_CS_PORT GPIO_PORTA +#define SSD1963_TFT_CS_FUNCTION GPIO_PIN_FUNCTION_OFF +#define SSD1963_TFT_CS_DIRECTION GPIO_DIRECTION_OUT +#define SSD1963_TFT_CS_PULL_MODE GPIO_PULL_UP +#define SSD1963_TFT_CS GPIO(SSD1963_TFT_CS_PORT, SSD1963_TFT_CS_PORT_PIN) + +#define SSD1963_TFT_WR_PIN PIN_PA07 +#define SSD1963_TFT_WR_PORT_PIN 7 +#define SSD1963_TFT_WR_PORT GPIO_PORTA +#define SSD1963_TFT_WR_FUNCTION GPIO_PIN_FUNCTION_OFF +#define SSD1963_TFT_WR_DIRECTION GPIO_DIRECTION_OUT +#define SSD1963_TFT_WR_PULL_MODE GPIO_PULL_UP +#define SSD1963_TFT_WR GPIO(SSD1963_TFT_WR_PORT, SSD1963_TFT_WR_PORT_PIN) + +#define SSD1963_TFT_RD_PIN PIN_PA03 +#define SSD1963_TFT_RD_PORT_PIN 3 +#define SSD1963_TFT_RD_PORT GPIO_PORTA +#define SSD1963_TFT_RD_FUNCTION GPIO_PIN_FUNCTION_OFF +#define SSD1963_TFT_RD_DIRECTION GPIO_DIRECTION_OUT +#define SSD1963_TFT_RD_PULL_MODE GPIO_PULL_UP +#define SSD1963_TFT_RD GPIO(SSD1963_TFT_RD_PORT, SSD1963_TFT_RD_PORT_PIN) + +#define SSD1963_TFT_TE_PIN PIN_PD08 +#define SSD1963_TFT_TE_PORT_PIN 8 +#define SSD1963_TFT_TE_PORT GPIO_PORTD +#define SSD1963_TFT_TE_FUNCTION GPIO_PIN_FUNCTION_OFF +#define SSD1963_TFT_TE_DIRECTION GPIO_DIRECTION_IN +#define SSD1963_TFT_TE_PULL_MODE GPIO_PULL_DOWN +#define SSD1963_TFT_TE GPIO(SSD1963_TFT_TE_PORT, SSD1963_TFT_TE_PORT_PIN) #endif \ No newline at end of file diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/Config/pc_master.h b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/Config/pc_master.h index 9ccc9610..93411ae3 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/Config/pc_master.h +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/Config/pc_master.h @@ -11,4 +11,27 @@ #define DEBUG_MAX_BUFFER_SIZE (128) +/*---------------- + * SSD1963 + *--------------*/ +#ifndef USE_SSD1963 +# define USE_SSD1963 1 +#endif + +#if USE_SSD1963 +# define SSD1963_HOR_RES LV_HOR_RES +# define SSD1963_VER_RES LV_VER_RES +# define SSD1963_HT 531 +# define SSD1963_HPS 43 +# define SSD1963_LPS 8 +# define SSD1963_HPW 10 +# define SSD1963_VT 288 +# define SSD1963_VPS 12 +# define SSD1963_FPS 4 +# define SSD1963_VPW 10 +# define SSD1963_HS_NEG 0 /*Negative hsync*/ +# define SSD1963_VS_NEG 0 /*Negative vsync*/ +# define SSD1963_ORI 0 /*0, 90, 180, 270*/ +# define SSD1963_COLOR_DEPTH 16 +#endif #endif \ No newline at end of file diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.c b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.c index 30ab3b33..6032746b 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.c +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.c @@ -1,3 +1,293 @@ #include "p_ssd1963.h" -void p_ssd1963_init(void); \ No newline at end of file +#define LV_DRV_DELAY_MS(x) delay_ms(x) +#define LV_DRV_DISP_CMD_DATA(x) +/** + * @file SSD1963.c + * + */ + +/********************* + * INCLUDES + *********************/ +#include "SSD1963.h" +#if USE_SSD1963 + +#include +/********************* + * DEFINES + *********************/ +#define SSD1963_CMD_MODE 0 +#define SSD1963_DATA_MODE 1 + +/********************** + * TYPEDEFS + **********************/ + +/********************** + * STATIC PROTOTYPES + **********************/ +static inline void ssd1963_cmd_mode(void); +static inline void ssd1963_data_mode(void); +static inline void ssd1963_cmd(uint8_t cmd); +static inline void ssd1963_data(uint8_t data); +static void ssd1963_io_init(void); +static void ssd1963_reset(void); +static void ssd1963_set_clk(void); +static void ssd1963_set_tft_spec(void); +static void ssd1963_init_bl(void); + +/********************** + * STATIC VARIABLES + **********************/ +static bool cmd_mode = true; + +/********************** + * MACROS + **********************/ + +/********************** + * GLOBAL FUNCTIONS + **********************/ + +void ssd1963_init(void) +{ + + LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE); + cmd_mode = true; + + LV_DRV_DELAY_MS(250); + + + ssd1963_cmd(0x00E2); //PLL multiplier, set PLL clock to 120M + ssd1963_data(0x0023); //N=0x36 for 6.5M, 0x23 for 10M crystal + ssd1963_data(0x0002); + ssd1963_data(0x0004); + ssd1963_cmd(0x00E0); // PLL enable + ssd1963_data(0x0001); + LV_DRV_DELAY_MS(1); + ssd1963_cmd(0x00E0); + ssd1963_data(0x0003); // now, use PLL output as system clock + LV_DRV_DELAY_MS(1); + ssd1963_cmd(0x0001); // software reset + LV_DRV_DELAY_MS(1); + ssd1963_cmd(0x00E6); //PLL setting for PCLK, depends on resolution + + ssd1963_data(0x0001); //HX8257C + ssd1963_data(0x0033); //HX8257C + ssd1963_data(0x0033); //HX8257C + + + ssd1963_cmd(0x00B0); //LCD SPECIFICATION + ssd1963_data(0x0020); + ssd1963_data(0x0000); + ssd1963_data(((SSD1963_HOR_RES - 1) >> 8) & 0X00FF); //Set HDP + ssd1963_data((SSD1963_HOR_RES - 1) & 0X00FF); + ssd1963_data(((SSD1963_VER_RES - 1) >> 8) & 0X00FF); //Set VDP + ssd1963_data((SSD1963_VER_RES - 1) & 0X00FF); + ssd1963_data(0x0000); + LV_DRV_DELAY_MS(1);//Delay10us(5); + ssd1963_cmd(0x00B4); //HSYNC + ssd1963_data((SSD1963_HT >> 8) & 0X00FF); //Set HT + ssd1963_data(SSD1963_HT & 0X00FF); + ssd1963_data((SSD1963_HPS >> 8) & 0X00FF); //Set HPS + ssd1963_data(SSD1963_HPS & 0X00FF); + ssd1963_data(SSD1963_HPW); //Set HPW + ssd1963_data((SSD1963_LPS >> 8) & 0X00FF); //SetLPS + ssd1963_data(SSD1963_LPS & 0X00FF); + ssd1963_data(0x0000); + + ssd1963_cmd(0x00B6); //VSYNC + ssd1963_data((SSD1963_VT >> 8) & 0X00FF); //Set VT + ssd1963_data(SSD1963_VT & 0X00FF); + ssd1963_data((SSD1963_VPS >> 8) & 0X00FF); //Set VPS + ssd1963_data(SSD1963_VPS & 0X00FF); + ssd1963_data(SSD1963_VPW); //Set VPW + ssd1963_data((SSD1963_FPS >> 8) & 0X00FF); //Set FPS + ssd1963_data(SSD1963_FPS & 0X00FF); + + ssd1963_cmd(0x00B8); + ssd1963_data(0x000f); //GPIO is controlled by host GPIO[3:0]=output GPIO[0]=1 LCD ON GPIO[0]=1 LCD OFF + ssd1963_data(0x0001); //GPIO0 normal + + ssd1963_cmd(0x00BA); + ssd1963_data(0x0001); //GPIO[0] out 1 --- LCD display on/off control PIN + + ssd1963_cmd(0x0036); //rotation + ssd1963_data(0x0008); //RGB=BGR + + ssd1963_cmd(0x003A); //Set the current pixel format for RGB image data + ssd1963_data(0x0050); //16-bit/pixel + + ssd1963_cmd(0x00F0); //Pixel Data Interface Format + ssd1963_data(0x0003); //16-bit(565 format) data + + ssd1963_cmd(0x00BC); + ssd1963_data(0x0040); //contrast value + ssd1963_data(0x0080); //brightness value + ssd1963_data(0x0040); //saturation value + ssd1963_data(0x0001); //Post Processor Enable + + LV_DRV_DELAY_MS(1); + + ssd1963_cmd(0x0029); //display on + + ssd1963_cmd(0x00BE); //set PWM for B/L + ssd1963_data(0x0006); + ssd1963_data(0x0080); + ssd1963_data(0x0001); + ssd1963_data(0x00f0); + ssd1963_data(0x0000); + ssd1963_data(0x0000); + + ssd1963_cmd(0x00d0); + ssd1963_data(0x000d); + + //DisplayBacklightOn(); + + LV_DRV_DELAY_MS(30); +} + +void ssd1963_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p) +{ + + /*Return if the area is out the screen*/ + if(area->x2 < 0) return; + if(area->y2 < 0) return; + if(area->x1 > SSD1963_HOR_RES - 1) return; + if(area->y1 > SSD1963_VER_RES - 1) return; + + /*Truncate the area to the screen*/ + int32_t act_x1 = area->x1 < 0 ? 0 : area->x1; + int32_t act_y1 = area->y1 < 0 ? 0 : area->y1; + int32_t act_x2 = area->x2 > SSD1963_HOR_RES - 1 ? SSD1963_HOR_RES - 1 : area->x2; + int32_t act_y2 = area->y2 > SSD1963_VER_RES - 1 ? SSD1963_VER_RES - 1 : area->y2; + + //Set the rectangular area + ssd1963_cmd(0x002A); + ssd1963_data(act_x1 >> 8); + ssd1963_data(0x00FF & act_x1); + ssd1963_data(act_x2 >> 8); + ssd1963_data(0x00FF & act_x2); + + ssd1963_cmd(0x002B); + ssd1963_data(act_y1 >> 8); + ssd1963_data(0x00FF & act_y1); + ssd1963_data(act_y2 >> 8); + ssd1963_data(0x00FF & act_y2); + + ssd1963_cmd(0x2c); + int16_t i; + uint16_t full_w = area->x2 - area->x1 + 1; + + ssd1963_data_mode(); + LV_DRV_DISP_PAR_CS(0); +#if LV_COLOR_DEPTH == 16 + uint16_t act_w = act_x2 - act_x1 + 1; + for(i = act_y1; i <= act_y2; i++) { + LV_DRV_DISP_PAR_WR_ARRAY((uint16_t *)color_p, act_w); + color_p += full_w; + } + LV_DRV_DISP_PAR_CS(1); +#else + int16_t j; + for(i = act_y1; i <= act_y2; i++) { + for(j = 0; j <= act_x2 - act_x1 + 1; j++) { + LV_DRV_DISP_PAR_WR_WORD(color_p[j]); + color_p += full_w; + } + } +#endif + + lv_disp_flush_ready(disp_drv); +} + +/********************** + * STATIC FUNCTIONS + **********************/ + +static void ssd1963_io_init(void) +{ + LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE); + cmd_mode = true; +} + +static void ssd1963_reset(void) +{ + /*Hardware reset*/ + LV_DRV_DISP_RST(1); + LV_DRV_DELAY_MS(50); + LV_DRV_DISP_RST(0); + LV_DRV_DELAY_MS(50); + LV_DRV_DISP_RST(1); + LV_DRV_DELAY_MS(50); + + /*Chip enable*/ + LV_DRV_DISP_PAR_CS(0); + LV_DRV_DELAY_MS(10); + LV_DRV_DISP_PAR_CS(1); + LV_DRV_DELAY_MS(5); + + /*Software reset*/ + ssd1963_cmd(0x01); + LV_DRV_DELAY_MS(20); + + ssd1963_cmd(0x01); + LV_DRV_DELAY_MS(20); + + ssd1963_cmd(0x01); + LV_DRV_DELAY_MS(20); + +} + +/** + * Command mode + */ +static inline void ssd1963_cmd_mode(void) +{ + if(cmd_mode == false) { + LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE); + cmd_mode = true; + } +} + +/** + * Data mode + */ +static inline void ssd1963_data_mode(void) +{ + if(cmd_mode != false) { + LV_DRV_DISP_CMD_DATA(SSD1963_DATA_MODE); + cmd_mode = false; + } +} + +/** + * Write command + * @param cmd the command + */ +static inline void ssd1963_cmd(uint8_t cmd) +{ + + LV_DRV_DISP_PAR_CS(0); + ssd1963_cmd_mode(); + LV_DRV_DISP_PAR_WR_WORD(cmd); + LV_DRV_DISP_PAR_CS(1); + +} + +/** + * Write data + * @param data the data + */ +static inline void ssd1963_data(uint8_t data) +{ + + LV_DRV_DISP_PAR_CS(0); + ssd1963_data_mode(); + LV_DRV_DISP_PAR_WR_WORD(data); + LV_DRV_DISP_PAR_CS(1); + +} + +#endif \ No newline at end of file diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.h b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.h index 20319df1..8d0b61a8 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.h +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/devices/display/p_ssd1963.h @@ -1,7 +1,140 @@ -#ifndef _P_SSD1963_H_ -#define _P_SSD1963_H_ +/** + * @file SSD1963.h + * + * Source: https://github.com/lvgl/lv_drivers/tree/master/display + */ +#ifndef SSD1963_H +#define SSD1963_H -void p_ssd1963_init(void); +#ifdef __cplusplus +extern "C" { +#endif -#endif \ No newline at end of file +#if USE_SSD1963 + +#ifdef LV_LVGL_H_INCLUDE_SIMPLE +#include "lvgl.h" +#else +#include "lvgl/lvgl.h" +#endif + +/********************* + * DEFINES + *********************/ +// SSD1963 command table +#define CMD_NOP 0x00 //No operation +#define CMD_SOFT_RESET 0x01 //Software reset +#define CMD_GET_PWR_MODE 0x0A //Get the current power mode +#define CMD_GET_ADDR_MODE 0x0B //Get the frame memory to the display panel read order +#define CMD_GET_PIXEL_FORMAT 0x0C //Get the current pixel format +#define CMD_GET_DISPLAY_MODE 0x0D //Returns the display mode +#define CMD_GET_SIGNAL_MODE 0x0E // +#define CMD_GET_DIAGNOSTIC 0x0F +#define CMD_ENT_SLEEP 0x10 +#define CMD_EXIT_SLEEP 0x11 +#define CMD_ENT_PARTIAL_MODE 0x12 +#define CMD_ENT_NORMAL_MODE 0x13 +#define CMD_EXIT_INVERT_MODE 0x20 +#define CMD_ENT_INVERT_MODE 0x21 +#define CMD_SET_GAMMA 0x26 +#define CMD_BLANK_DISPLAY 0x28 +#define CMD_ON_DISPLAY 0x29 +#define CMD_SET_COLUMN 0x2A +#define CMD_SET_PAGE 0x2B +#define CMD_WR_MEMSTART 0x2C +#define CMD_RD_MEMSTART 0x2E +#define CMD_SET_PARTIAL_AREA 0x30 +#define CMD_SET_SCROLL_AREA 0x33 +#define CMD_SET_TEAR_OFF 0x34 //synchronization information is not sent from the display +#define CMD_SET_TEAR_ON 0x35 //sync. information is sent from the display +#define CMD_SET_ADDR_MODE 0x36 //set fram buffer read order to the display panel +#define CMD_SET_SCROLL_START 0x37 +#define CMD_EXIT_IDLE_MODE 0x38 +#define CMD_ENT_IDLE_MODE 0x39 +#define CMD_SET_PIXEL_FORMAT 0x3A //defines how many bits per pixel is used +#define CMD_WR_MEM_AUTO 0x3C +#define CMD_RD_MEM_AUTO 0x3E +#define CMD_SET_TEAR_SCANLINE 0x44 +#define CMD_GET_SCANLINE 0x45 +#define CMD_RD_DDB_START 0xA1 +#define CMD_RD_DDB_AUTO 0xA8 +#define CMD_SET_PANEL_MODE 0xB0 +#define CMD_GET_PANEL_MODE 0xB1 +#define CMD_SET_HOR_PERIOD 0xB4 +#define CMD_GET_HOR_PERIOD 0xB5 +#define CMD_SET_VER_PERIOD 0xB6 +#define CMD_GET_VER_PERIOD 0xB7 +#define CMD_SET_GPIO_CONF 0xB8 +#define CMD_GET_GPIO_CONF 0xB9 +#define CMD_SET_GPIO_VAL 0xBA +#define CMD_GET_GPIO_STATUS 0xBB +#define CMD_SET_POST_PROC 0xBC +#define CMD_GET_POST_PROC 0xBD +#define CMD_SET_PWM_CONF 0xBE +#define CMD_GET_PWM_CONF 0xBF +#define CMD_SET_LCD_GEN0 0xC0 +#define CMD_GET_LCD_GEN0 0xC1 +#define CMD_SET_LCD_GEN1 0xC2 +#define CMD_GET_LCD_GEN1 0xC3 +#define CMD_SET_LCD_GEN2 0xC4 +#define CMD_GET_LCD_GEN2 0xC5 +#define CMD_SET_LCD_GEN3 0xC6 +#define CMD_GET_LCD_GEN3 0xC7 +#define CMD_SET_GPIO0_ROP 0xC8 +#define CMD_GET_GPIO0_ROP 0xC9 +#define CMD_SET_GPIO1_ROP 0xCA +#define CMD_GET_GPIO1_ROP 0xCB +#define CMD_SET_GPIO2_ROP 0xCC +#define CMD_GET_GPIO2_ROP 0xCD +#define CMD_SET_GPIO3_ROP 0xCE +#define CMD_GET_GPIO3_ROP 0xCF +#define CMD_SET_ABC_DBC_CONF 0xD0 +#define CMD_GET_ABC_DBC_CONF 0xD1 +#define CMD_SET_DBC_HISTO_PTR 0xD2 +#define CMD_GET_DBC_HISTO_PTR 0xD3 +#define CMD_SET_DBC_THRES 0xD4 +#define CMD_GET_DBC_THRES 0xD5 +#define CMD_SET_ABM_TMR 0xD6 +#define CMD_GET_ABM_TMR 0xD7 +#define CMD_SET_AMB_LVL0 0xD8 +#define CMD_GET_AMB_LVL0 0xD9 +#define CMD_SET_AMB_LVL1 0xDA +#define CMD_GET_AMB_LVL1 0xDB +#define CMD_SET_AMB_LVL2 0xDC +#define CMD_GET_AMB_LVL2 0xDD +#define CMD_SET_AMB_LVL3 0xDE +#define CMD_GET_AMB_LVL3 0xDF +#define CMD_PLL_START 0xE0 //start the PLL +#define CMD_PLL_STOP 0xE1 //disable the PLL +#define CMD_SET_PLL_MN 0xE2 +#define CMD_GET_PLL_MN 0xE3 +#define CMD_GET_PLL_STATUS 0xE4 //get the current PLL status +#define CMD_ENT_DEEP_SLEEP 0xE5 +#define CMD_SET_PCLK 0xE6 //set pixel clock (LSHIFT signal) frequency +#define CMD_GET_PCLK 0xE7 //get pixel clock (LSHIFT signal) freq. settings +#define CMD_SET_DATA_INTERFACE 0xF0 +#define CMD_GET_DATA_INTERFACE 0xF1 + + +/********************** + * TYPEDEFS + **********************/ + +/********************** + * GLOBAL PROTOTYPES + **********************/ +void ssd1963_init(void); +void ssd1963_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p); + +/********************** + * MACROS + **********************/ + +#endif /* USE_SSD1963 */ + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /* SSD1963_H */ \ No newline at end of file diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.c b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.c index 5ebb1204..5476b0b8 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.c +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.c @@ -1,8 +1,16 @@ +#include "p_gpio.h" +void p_gpio_init(void) +{ + +} -/** - * Example of using EXTERNAL_IRQ_0 - */ -void EXTERNAL_IRQ_0_example(void) +void p_gpio_parallel_write(PortGroup* group, uint32_t mask, uint32_t data) { + } + +void p_gpio_parallel_write_arr(PortGroup* group, uint32_t mask, uint32_t* data, uint32_t len) +{ + +} \ No newline at end of file diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.h b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.h index 79978271..eb1c5db6 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.h +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/drivers/p_gpio.h @@ -3,4 +3,7 @@ void p_gpio_init(void); +void p_gpio_parallel_write(PortGroup* group, uint32_t mask, uint32_t data); + +void p_gpio_parallel_write_arr(PortGroup* group, uint32_t mask, uint32_t* data, uint32_t len); #endif \ No newline at end of file diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/main.c b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/main.c index 56600bce..edf21712 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/main.c +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/main.c @@ -4,4 +4,6 @@ int main(void) { oracle_init(); + + } diff --git a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/project_oracle_test_prj.cproj b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/project_oracle_test_prj.cproj index dd2516d2..bf83c5a2 100644 --- a/software/firmware/project_oracle_test_prj/project_oracle_test_prj/project_oracle_test_prj.cproj +++ b/software/firmware/project_oracle_test_prj/project_oracle_test_prj/project_oracle_test_prj.cproj @@ -317,6 +317,7 @@ DEBUG + LV_LVGL_H_INCLUDE_SIMPLE @@ -344,6 +345,8 @@ ../drivers ../devices ../devices/display + ../thirdparty + ../thirdparty/lvgl Optimize (-O1) @@ -880,6 +883,639 @@ compile + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + @@ -909,6 +1545,28 @@ + + + + + + + + + + + + + + + + + + + + + + @@ -929,6 +1587,135 @@ compile + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + \ No newline at end of file