#ifndef _CLOCKS_H_ #define _CLOCKS_H_ #include "sam.h" #include "conf_clocks.h" // XOSC32K Definitions #define CORE_CONF_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1) #define CORE_CONF_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_62592us (0x0) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_125092us (0x1) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_500092us (0x2) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_1000009200ns (0x3) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_2000009200ns (0x4) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_4000009200ns (0x5) #define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_8000009200ns (0x6) // XOSCx Definitions #define CORE_CONF_CLK_XOSCCTRL_STARTUP_31us 0x0 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_61us 0x1 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_122us 0x2 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_244us 0x3 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_488us 0x4 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_977us 0x5 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_1953us 0x6 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_3906us 0x7 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_7813us 0x8 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_15625us 0x9 #define CORE_CONF_CLK_XOSCCTRL_STARTUP_31250us 0xA #define CORE_CONF_CLK_XOSCCTRL_STARTUP_62500us 0xB #define CORE_CONF_CLK_XOSCCTRL_STARTUP_125000us 0xC #define CORE_CONF_CLK_XOSCCTRL_STARTUP_250000us 0xD #define CORE_CONF_CLK_XOSCCTRL_STARTUP_500000us 0xE #define CORE_CONF_CLK_XOSCCTRL_STARTUP_1000000us 0xF // Oscillator Current Multiplier #define CORE_CONF_CLK_XOSCCTRL_IMULT_24MHZ_TO_48MHZ (6) #define CORE_CONF_CLK_XOSCCTRL_IMULT_16MHZ_TO_24MHZ (5) #define CORE_CONF_CLK_XOSCCTRL_IMULT_8MHZ_TO_16MHZ (4) #define CORE_CONF_CLK_XOSCCTRL_IMULT_8MHZ (3) // Oscillator Current Reference #define CORE_CONF_CLK_XOSCCTRL_IPTAT_24MHZ_TO_48MHZ (3) #define CORE_CONF_CLK_XOSCCTRL_IPTAT_16MHZ_TO_24MHZ (3) #define CORE_CONF_CLK_XOSCCTRL_IPTAT_8MHZ_TO_16MHZ (3) #define CORE_CONF_CLK_XOSCCTRL_IPTAT_8MHZ (2) static inline void clock_osc32k_init(void) { } static inline void clock_osc_init(void) { #if CORE_CONF_CLK_XOSC0_ENABLE == 1 OSCCTRL->XOSCCTRL[0].bit.XTALEN = CORE_CONF_CLK_XOSC0_XTALEN; OSCCTRL->XOSCCTRL[0].bit.RUNSTDBY = CORE_CONF_CLK_XOSC0_RUNSTDBY; OSCCTRL->XOSCCTRL[0].bit.ONDEMAND = CORE_CONF_CLK_XOSC0_ONDEMAND; OSCCTRL->XOSCCTRL[0].bit.LOWBUFGAIN = CORE_CONF_CLK_XOSC0_LOWBUFGAIN; OSCCTRL->XOSCCTRL[0].bit.IPTAT = CORE_CONF_CLK_XOSC0_IPTAT; OSCCTRL->XOSCCTRL[0].bit.IMULT = CORE_CONF_CLK_XOSC0_IMULT; OSCCTRL->XOSCCTRL[0].bit.ENALC = CORE_CONF_CLK_XOSC0_ENALC; OSCCTRL->XOSCCTRL[0].bit.CFDEN = CORE_CONF_CLK_XOSC0_CFDEN; OSCCTRL->XOSCCTRL[0].bit.CFDPRESC = CORE_CONF_CLK_XOSC0_CFDPRESC; OSCCTRL->XOSCCTRL[0].bit.SWBEN = CORE_CONF_CLK_XOSC0_SWBEN; OSCCTRL->XOSCCTRL[0].bit.STARTUP = CORE_CONF_CLK_XOSC0_STARTUP_TIME; #endif #if CORE_CONF_CLK_XOSC1_ENABLE == 1 OSCCTRL->XOSCCTRL[1].bit.XTALEN = CORE_CONF_CLK_XOSC1_XTALEN; OSCCTRL->XOSCCTRL[1].bit.RUNSTDBY = CORE_CONF_CLK_XOSC1_RUNSTDBY; OSCCTRL->XOSCCTRL[1].bit.ONDEMAND = CORE_CONF_CLK_XOSC1_ONDEMAND; OSCCTRL->XOSCCTRL[1].bit.LOWBUFGAIN = CORE_CONF_CLK_XOSC1_LOWBUFGAIN; OSCCTRL->XOSCCTRL[1].bit.IPTAT = CORE_CONF_CLK_XOSC1_IPTAT; OSCCTRL->XOSCCTRL[1].bit.IMULT = CORE_CONF_CLK_XOSC1_IMULT; OSCCTRL->XOSCCTRL[1].bit.ENALC = CORE_CONF_CLK_XOSC1_ENALC; OSCCTRL->XOSCCTRL[1].bit.CFDEN = CORE_CONF_CLK_XOSC1_CFDEN; OSCCTRL->XOSCCTRL[1].bit.CFDPRESC = CORE_CONF_CLK_XOSC1_CFDPRESC; OSCCTRL->XOSCCTRL[1].bit.SWBEN = CORE_CONF_CLK_XOSC1_SWBEN; OSCCTRL->XOSCCTRL[1].bit.STARTUP = CORE_CONF_CLK_XOSC1_STARTUP_TIME; #endif } static inline void clock_mclk_init(void) { } static inline void clock_gclk_init_generators_by_freq(void) { } #endif