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<li class="navelem"><a class="el" href="dir_e498f07834f57e09d3c418a37b65ec3b.html">ESF</a></li><li class="navelem"><a class="el" href="dir_2c010a15ee55606c39d249a8f09d70a6.html">modules</a></li><li class="navelem"><a class="el" href="dir_1e3b112bfad1074f4c8038c4c4396c2b.html">core</a></li> </ul>
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<div class="title">clocks.h</div> </div>
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<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span> <span class="preprocessor">#ifndef _CLOCKS_H_</span></div>
<div class="line"><a name="l00002"></a><span class="lineno"> 2</span> <span class="preprocessor">#define _CLOCKS_H_</span></div>
<div class="line"><a name="l00003"></a><span class="lineno"> 3</span>  </div>
<div class="line"><a name="l00004"></a><span class="lineno"> 4</span> <span class="preprocessor">#include "core.h"</span></div>
<div class="line"><a name="l00005"></a><span class="lineno"> 5</span>  </div>
<div class="line"><a name="l00006"></a><span class="lineno"> 6</span> <span class="comment">// XOSC32K Definitions</span></div>
<div class="line"><a name="l00007"></a><span class="lineno"> 7</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_CGM_LP_MODE (0x0)</span></div>
<div class="line"><a name="l00008"></a><span class="lineno"> 8</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1)</span></div>
<div class="line"><a name="l00009"></a><span class="lineno"> 9</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2)</span></div>
<div class="line"><a name="l00010"></a><span class="lineno"> 10</span>  </div>
<div class="line"><a name="l00011"></a><span class="lineno"> 11</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us (0x0)</span></div>
<div class="line"><a name="l00012"></a><span class="lineno"> 12</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_125092us (0x1)</span></div>
<div class="line"><a name="l00013"></a><span class="lineno"> 13</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_500092us (0x2)</span></div>
<div class="line"><a name="l00014"></a><span class="lineno"> 14</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_1000009200ns (0x3)</span></div>
<div class="line"><a name="l00015"></a><span class="lineno"> 15</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_2000009200ns (0x4)</span></div>
<div class="line"><a name="l00016"></a><span class="lineno"> 16</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_4000009200ns (0x5)</span></div>
<div class="line"><a name="l00017"></a><span class="lineno"> 17</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_8000009200ns (0x6)</span></div>
<div class="line"><a name="l00018"></a><span class="lineno"> 18</span>  </div>
<div class="line"><a name="l00019"></a><span class="lineno"> 19</span> <span class="comment">// Oscillator Current Multiplier</span></div>
<div class="line"><a name="l00020"></a><span class="lineno"> 20</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_24MHZ_TO_48MHZ (6)</span></div>
<div class="line"><a name="l00021"></a><span class="lineno"> 21</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_16MHZ_TO_24MHZ (5)</span></div>
<div class="line"><a name="l00022"></a><span class="lineno"> 22</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ_TO_16MHZ (4)</span></div>
<div class="line"><a name="l00023"></a><span class="lineno"> 23</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ (3)</span></div>
<div class="line"><a name="l00024"></a><span class="lineno"> 24</span>  </div>
<div class="line"><a name="l00025"></a><span class="lineno"> 25</span> <span class="comment">// Oscillator Current Reference</span></div>
<div class="line"><a name="l00026"></a><span class="lineno"> 26</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_24MHZ_TO_48MHZ (3)</span></div>
<div class="line"><a name="l00027"></a><span class="lineno"> 27</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_16MHZ_TO_24MHZ (3)</span></div>
<div class="line"><a name="l00028"></a><span class="lineno"> 28</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ_TO_16MHZ (3)</span></div>
<div class="line"><a name="l00029"></a><span class="lineno"> 29</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ (2)</span></div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>  </div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="comment">// DFLL Definitions</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED (0)</span></div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_FIXED (1)</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>  </div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="comment">// DPLL Definitions</span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ (0x0)</span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1600KHZ (0x1)</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1100KHZ (0x2)</span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_800KHZ (0x3)</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_640KHZ (0x4)</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_550KHZ (0x5)</span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_450KHZ (0x6)</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_400KHZ (0x7)</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>  </div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_NONE (0x0)</span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_800us (0x4)</span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_900us (0x5)</span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1000us (0x6)</span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1100us (0x7)</span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>  </div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_GCLK (0x0)</span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC32 (0x1)</span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0 (0x2)</span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC1 (0x3)</span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>  </div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="keywordtype">void</span> clock_osc32k_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="keywordtype">void</span> clock_osc_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="keywordtype">void</span> clock_mclk_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="keywordtype">void</span> clock_gclk_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="keywordtype">void</span> clock_dpll_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="keywordtype">void</span> clock_dfll_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#endif</span></div>
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