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<h4 class="subsection">9.27.2 High-level assembly macros</h4>
<p>MIPS assemblers have traditionally provided a wider range of
instructions than the MIPS architecture itself. These extra
instructions are usually referred to as “macro” instructions
<a rel="footnote" href="#fn-1" name="fnd-1"><sup>1</sup></a>.
<p>Some MIPS macro instructions extend an underlying architectural instruction
while others are entirely new. An example of the former type is <code>and</code>,
which allows the third operand to be either a register or an arbitrary
immediate value. Examples of the latter type include <code>bgt</code>, which
branches to the third operand when the first operand is greater than
the second operand, and <code>ulh</code>, which implements an unaligned
2-byte load.
<p>One of the most common extensions provided by macros is to expand
memory offsets to the full address range (32 or 64 bits) and to allow
symbolic offsets such as ‘<samp><span class="samp">my_data + 4</span></samp>’ to be used in place of
integer constants. For example, the architectural instruction
<code>lbu</code> allows only a signed 16-bit offset, whereas the macro
<code>lbu</code> allows code such as ‘<samp><span class="samp">lbu $4,array+32769($5)</span></samp>’.
The implementation of these symbolic offsets depends on several factors,
such as whether the assembler is generating SVR4-style PIC (selected by
<samp><span class="option">-KPIC</span></samp>, see <a href="MIPS-Options.html#MIPS-Options">Assembler options</a>), the size of symbols
(see <a href="MIPS-Symbol-Sizes.html#MIPS-Symbol-Sizes">Directives to override the size of symbols</a>),
and the small data limit (see <a href="MIPS-Small-Data.html#MIPS-Small-Data">Controlling the use of small data accesses</a>).
<p><a name="index-g_t_0040code_007b_002eset-macro_007d-1486"></a><a name="index-g_t_0040code_007b_002eset-nomacro_007d-1487"></a>Sometimes it is undesirable to have one assembly instruction expand
to several machine instructions. The directive <code>.set nomacro</code>
tells the assembler to warn when this happens. <code>.set macro</code>
restores the default behavior.
<p><a name="index-g_t_0040code_007bat_007d-register_002c-MIPS-1488"></a><a name="index-g_t_0040code_007b_002eset-at_003d_0040var_007breg_007d_007d-1489"></a>Some macro instructions need a temporary register to store intermediate
results. This register is usually <code>$1</code>, also known as <code>$at</code>,
but it can be changed to any core register <var>reg</var> using
<code>.set at=</code><var>reg</var>. Note that <code>$at</code> always refers
to <code>$1</code> regardless of which register is being used as the
temporary register.
<p><a name="index-g_t_0040code_007b_002eset-at_007d-1490"></a><a name="index-g_t_0040code_007b_002eset-noat_007d-1491"></a>Implicit uses of the temporary register in macros could interfere with
explicit uses in the assembly code. The assembler therefore warns
whenever it sees an explicit use of the temporary register. The directive
<code>.set noat</code> silences this warning while <code>.set at</code> restores
the default behavior. It is safe to use <code>.set noat</code> while
<code>.set nomacro</code> is in effect since single-instruction macros
never need a temporary register.
<p>Note that while the <span class="sc">gnu</span> assembler provides these macros for compatibility,
it does not make any attempt to optimize them with the surrounding code.
<div class="footnote">
<hr>
<h4>Footnotes</h4><p class="footnote"><small>[<a name="fn-1" href="#fnd-1">1</a>]</small> The term “macro” is somewhat overloaded here, since
these macros have no relation to those defined by <code>.macro</code>,
see <a href="Macro.html#Macro"><code>.macro</code></a>.</p>
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