doc/html/tcc2_8h_source.html

#ifndef _SAME54_TCC2_INSTANCE_

#define _SAME54_TCC2_INSTANCE_


/* ========== Register definition for TCC2 peripheral ========== */

#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

#define REG_TCC2_CTRLA             (0x42000C00)

#define REG_TCC2_CTRLBCLR          (0x42000C04)

#define REG_TCC2_CTRLBSET          (0x42000C05)

#define REG_TCC2_SYNCBUSY          (0x42000C08)

#define REG_TCC2_FCTRLA            (0x42000C0C)

#define REG_TCC2_FCTRLB            (0x42000C10)

#define REG_TCC2_WEXCTRL           (0x42000C14)

#define REG_TCC2_DRVCTRL           (0x42000C18)

#define REG_TCC2_DBGCTRL           (0x42000C1E)

#define REG_TCC2_EVCTRL            (0x42000C20)

#define REG_TCC2_INTENCLR          (0x42000C24)

#define REG_TCC2_INTENSET          (0x42000C28)

#define REG_TCC2_INTFLAG           (0x42000C2C)

#define REG_TCC2_STATUS            (0x42000C30)

#define REG_TCC2_COUNT             (0x42000C34)

#define REG_TCC2_WAVE              (0x42000C3C)

#define REG_TCC2_PER               (0x42000C40)

#define REG_TCC2_CC0               (0x42000C44)

#define REG_TCC2_CC1               (0x42000C48)

#define REG_TCC2_CC2               (0x42000C4C)

#define REG_TCC2_PERBUF            (0x42000C6C)

#define REG_TCC2_CCBUF0            (0x42000C70)

#define REG_TCC2_CCBUF1            (0x42000C74)

#define REG_TCC2_CCBUF2            (0x42000C78)

#else

#define REG_TCC2_CTRLA             (*(RwReg  *)0x42000C00UL)

#define REG_TCC2_CTRLBCLR          (*(RwReg8 *)0x42000C04UL)

#define REG_TCC2_CTRLBSET          (*(RwReg8 *)0x42000C05UL)

#define REG_TCC2_SYNCBUSY          (*(RoReg  *)0x42000C08UL)

#define REG_TCC2_FCTRLA            (*(RwReg  *)0x42000C0CUL)

#define REG_TCC2_FCTRLB            (*(RwReg  *)0x42000C10UL)

#define REG_TCC2_WEXCTRL           (*(RwReg  *)0x42000C14UL)

#define REG_TCC2_DRVCTRL           (*(RwReg  *)0x42000C18UL)

#define REG_TCC2_DBGCTRL           (*(RwReg8 *)0x42000C1EUL)

#define REG_TCC2_EVCTRL            (*(RwReg  *)0x42000C20UL)

#define REG_TCC2_INTENCLR          (*(RwReg  *)0x42000C24UL)

#define REG_TCC2_INTENSET          (*(RwReg  *)0x42000C28UL)

#define REG_TCC2_INTFLAG           (*(RwReg  *)0x42000C2CUL)

#define REG_TCC2_STATUS            (*(RwReg  *)0x42000C30UL)

#define REG_TCC2_COUNT             (*(RwReg  *)0x42000C34UL)

#define REG_TCC2_WAVE              (*(RwReg  *)0x42000C3CUL)

#define REG_TCC2_PER               (*(RwReg  *)0x42000C40UL)

#define REG_TCC2_CC0               (*(RwReg  *)0x42000C44UL)

#define REG_TCC2_CC1               (*(RwReg  *)0x42000C48UL)

#define REG_TCC2_CC2               (*(RwReg  *)0x42000C4CUL)

#define REG_TCC2_PERBUF            (*(RwReg  *)0x42000C6CUL)

#define REG_TCC2_CCBUF0            (*(RwReg  *)0x42000C70UL)

#define REG_TCC2_CCBUF1            (*(RwReg  *)0x42000C74UL)

#define REG_TCC2_CCBUF2            (*(RwReg  *)0x42000C78UL)

#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


/* ========== Instance parameters for TCC2 peripheral ========== */

#define TCC2_CC_NUM                 3        // Number of Compare/Capture units

#define TCC2_DITHERING              0        // Dithering feature implemented

#define TCC2_DMAC_ID_MC_0           35

#define TCC2_DMAC_ID_MC_1           36

#define TCC2_DMAC_ID_MC_2           37

#define TCC2_DMAC_ID_MC_LSB         35

#define TCC2_DMAC_ID_MC_MSB         37

#define TCC2_DMAC_ID_MC_SIZE        3

#define TCC2_DMAC_ID_OVF            34       // DMA overflow/underflow/retrigger trigger

#define TCC2_DTI                    0        // Dead-Time-Insertion feature implemented

#define TCC2_EXT                    1        // Coding of implemented extended features

#define TCC2_GCLK_ID                29       // Index of Generic Clock

#define TCC2_MASTER_SLAVE_MODE      0        // TCC type 0 : NA, 1 : Master, 2 : Slave

#define TCC2_OTMX                   1        // Output Matrix feature implemented

#define TCC2_OW_NUM                 3        // Number of Output Waveforms

#define TCC2_PG                     0        // Pattern Generation feature implemented

#define TCC2_SIZE                   16

#define TCC2_SWAP                   0        // DTI outputs swap feature implemented


#endif /* _SAME54_TCC2_INSTANCE_ */