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<h3 class="section">16.3 Example of <code>define_insn</code></h3>
<p><a name="index-g_t_0040code_007bdefine_005finsn_007d-example-3249"></a>
Here is an example of an instruction pattern, taken from the machine
description for the 68000/68020.
<pre class="smallexample"> (define_insn "tstsi"
[(set (cc0)
(match_operand:SI 0 "general_operand" "rm"))]
""
"*
{
if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
return \"tstl %0\";
return \"cmpl #0,%0\";
}")
</pre>
<p class="noindent">This can also be written using braced strings:
<pre class="smallexample"> (define_insn "tstsi"
[(set (cc0)
(match_operand:SI 0 "general_operand" "rm"))]
""
{
if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
return "tstl %0";
return "cmpl #0,%0";
})
</pre>
<p>This describes an instruction which sets the condition codes based on the
value of a general operand. It has no condition, so any insn with an RTL
description of the form shown may be matched to this pattern. The name
‘<samp><span class="samp">tstsi</span></samp>’ means “test a <code>SImode</code> value” and tells the RTL
generation pass that, when it is necessary to test such a value, an insn
to do so can be constructed using this pattern.
<p>The output control string is a piece of C code which chooses which
output template to return based on the kind of operand and the specific
type of CPU for which code is being generated.
<p>‘<samp><span class="samp">"rm"</span></samp>’ is an operand constraint. Its meaning is explained below.
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