.TH "<util/twi.h>: TWI bit mask definitions" 3 "24 Jun 2019" "Version 2.0.0" "avr-libc" \" -*- nroff -*-
.ad l
.nh
.SH NAME
<util/twi.h>: TWI bit mask definitions \- 
.SS "TWSR values"
 Mnemonics: 
.br
TW_MT_xxx - master transmitter 
.br
TW_MR_xxx - master receiver 
.br
TW_ST_xxx - slave transmitter 
.br
TW_SR_xxx - slave receiver 
.in +1c
.ti -1c
.RI "#define \fBTW_START\fP   0x08"
.br
.ti -1c
.RI "#define \fBTW_REP_START\fP   0x10"
.br
.ti -1c
.RI "#define \fBTW_MT_SLA_ACK\fP   0x18"
.br
.ti -1c
.RI "#define \fBTW_MT_SLA_NACK\fP   0x20"
.br
.ti -1c
.RI "#define \fBTW_MT_DATA_ACK\fP   0x28"
.br
.ti -1c
.RI "#define \fBTW_MT_DATA_NACK\fP   0x30"
.br
.ti -1c
.RI "#define \fBTW_MT_ARB_LOST\fP   0x38"
.br
.ti -1c
.RI "#define \fBTW_MR_ARB_LOST\fP   0x38"
.br
.ti -1c
.RI "#define \fBTW_MR_SLA_ACK\fP   0x40"
.br
.ti -1c
.RI "#define \fBTW_MR_SLA_NACK\fP   0x48"
.br
.ti -1c
.RI "#define \fBTW_MR_DATA_ACK\fP   0x50"
.br
.ti -1c
.RI "#define \fBTW_MR_DATA_NACK\fP   0x58"
.br
.ti -1c
.RI "#define \fBTW_ST_SLA_ACK\fP   0xA8"
.br
.ti -1c
.RI "#define \fBTW_ST_ARB_LOST_SLA_ACK\fP   0xB0"
.br
.ti -1c
.RI "#define \fBTW_ST_DATA_ACK\fP   0xB8"
.br
.ti -1c
.RI "#define \fBTW_ST_DATA_NACK\fP   0xC0"
.br
.ti -1c
.RI "#define \fBTW_ST_LAST_DATA\fP   0xC8"
.br
.ti -1c
.RI "#define \fBTW_SR_SLA_ACK\fP   0x60"
.br
.ti -1c
.RI "#define \fBTW_SR_ARB_LOST_SLA_ACK\fP   0x68"
.br
.ti -1c
.RI "#define \fBTW_SR_GCALL_ACK\fP   0x70"
.br
.ti -1c
.RI "#define \fBTW_SR_ARB_LOST_GCALL_ACK\fP   0x78"
.br
.ti -1c
.RI "#define \fBTW_SR_DATA_ACK\fP   0x80"
.br
.ti -1c
.RI "#define \fBTW_SR_DATA_NACK\fP   0x88"
.br
.ti -1c
.RI "#define \fBTW_SR_GCALL_DATA_ACK\fP   0x90"
.br
.ti -1c
.RI "#define \fBTW_SR_GCALL_DATA_NACK\fP   0x98"
.br
.ti -1c
.RI "#define \fBTW_SR_STOP\fP   0xA0"
.br
.ti -1c
.RI "#define \fBTW_NO_INFO\fP   0xF8"
.br
.ti -1c
.RI "#define \fBTW_BUS_ERROR\fP   0x00"
.br
.ti -1c
.RI "#define \fBTW_STATUS_MASK\fP"
.br
.ti -1c
.RI "#define \fBTW_STATUS\fP   (TWSR & TW_STATUS_MASK)"
.br
.in -1c
.SS "R/~W bit in SLA+R/W address field."
 
.in +1c
.ti -1c
.RI "#define \fBTW_READ\fP   1"
.br
.ti -1c
.RI "#define \fBTW_WRITE\fP   0"
.br
.in -1c
.SH "Detailed Description"
.PP 
.PP
.nf
 #include <util/twi.h> 
.fi
.PP
.PP
This header file contains bit mask definitions for use with the AVR TWI interface. 
.SH "Define Documentation"
.PP 
.SS "#define TW_BUS_ERROR   0x00"illegal start or stop condition 
.SS "#define TW_MR_ARB_LOST   0x38"arbitration lost in SLA+R or NACK 
.SS "#define TW_MR_DATA_ACK   0x50"data received, ACK returned 
.SS "#define TW_MR_DATA_NACK   0x58"data received, NACK returned 
.SS "#define TW_MR_SLA_ACK   0x40"SLA+R transmitted, ACK received 
.SS "#define TW_MR_SLA_NACK   0x48"SLA+R transmitted, NACK received 
.SS "#define TW_MT_ARB_LOST   0x38"arbitration lost in SLA+W or data 
.SS "#define TW_MT_DATA_ACK   0x28"data transmitted, ACK received 
.SS "#define TW_MT_DATA_NACK   0x30"data transmitted, NACK received 
.SS "#define TW_MT_SLA_ACK   0x18"SLA+W transmitted, ACK received 
.SS "#define TW_MT_SLA_NACK   0x20"SLA+W transmitted, NACK received 
.SS "#define TW_NO_INFO   0xF8"no state information available 
.SS "#define TW_READ   1"SLA+R address 
.SS "#define TW_REP_START   0x10"repeated start condition transmitted 
.SS "#define TW_SR_ARB_LOST_GCALL_ACK   0x78"arbitration lost in SLA+RW, general call received, ACK returned 
.SS "#define TW_SR_ARB_LOST_SLA_ACK   0x68"arbitration lost in SLA+RW, SLA+W received, ACK returned 
.SS "#define TW_SR_DATA_ACK   0x80"data received, ACK returned 
.SS "#define TW_SR_DATA_NACK   0x88"data received, NACK returned 
.SS "#define TW_SR_GCALL_ACK   0x70"general call received, ACK returned 
.SS "#define TW_SR_GCALL_DATA_ACK   0x90"general call data received, ACK returned 
.SS "#define TW_SR_GCALL_DATA_NACK   0x98"general call data received, NACK returned 
.SS "#define TW_SR_SLA_ACK   0x60"SLA+W received, ACK returned 
.SS "#define TW_SR_STOP   0xA0"stop or repeated start condition received while selected 
.SS "#define TW_ST_ARB_LOST_SLA_ACK   0xB0"arbitration lost in SLA+RW, SLA+R received, ACK returned 
.SS "#define TW_ST_DATA_ACK   0xB8"data transmitted, ACK received 
.SS "#define TW_ST_DATA_NACK   0xC0"data transmitted, NACK received 
.SS "#define TW_ST_LAST_DATA   0xC8"last data byte transmitted, ACK received 
.SS "#define TW_ST_SLA_ACK   0xA8"SLA+R received, ACK returned 
.SS "#define TW_START   0x08"start condition transmitted 
.SS "#define TW_STATUS   (TWSR & TW_STATUS_MASK)"TWSR, masked by TW_STATUS_MASK 
.SS "#define TW_STATUS_MASK"\fBValue:\fP
.PP
.nf
(_BV(TWS7)|_BV(TWS6)|_BV(TWS5)|_BV(TWS4)|\
                _BV(TWS3))
.fi
The lower 3 bits of TWSR are reserved on the ATmega163. The 2 LSB carry the prescaler bits on the newer ATmegas. 
.SS "#define TW_WRITE   0"SLA+W address 
.SH "Author"
.PP 
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