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<h4 class="subsection">16.8.4 Constraint Modifier Characters</h4>
<p><a name="index-modifiers-in-constraints-3353"></a><a name="index-constraint-modifier-characters-3354"></a>
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Here are constraint modifier characters.
<a name="index-g_t_0040samp_007b_003d_007d-in-constraint-3355"></a>
<dl><dt>‘<samp><span class="samp">=</span></samp>’<dd>Means that this operand is written to by this instruction:
the previous value is discarded and replaced by new data.
<p><a name="index-g_t_0040samp_007b_002b_007d-in-constraint-3356"></a><br><dt>‘<samp><span class="samp">+</span></samp>’<dd>Means that this operand is both read and written by the instruction.
<p>When the compiler fixes up the operands to satisfy the constraints,
it needs to know which operands are read by the instruction and
which are written by it. ‘<samp><span class="samp">=</span></samp>’ identifies an operand which is only
written; ‘<samp><span class="samp">+</span></samp>’ identifies an operand that is both read and written; all
other operands are assumed to only be read.
<p>If you specify ‘<samp><span class="samp">=</span></samp>’ or ‘<samp><span class="samp">+</span></samp>’ in a constraint, you put it in the
first character of the constraint string.
<p><a name="index-g_t_0040samp_007b_0026_007d-in-constraint-3357"></a><a name="index-earlyclobber-operand-3358"></a><br><dt>‘<samp><span class="samp">&</span></samp>’<dd>Means (in a particular alternative) that this operand is an
<dfn>earlyclobber</dfn> operand, which is written before the instruction is
finished using the input operands. Therefore, this operand may not lie
in a register that is read by the instruction or as part of any memory
address.
<p>‘<samp><span class="samp">&</span></samp>’ applies only to the alternative in which it is written. In
constraints with multiple alternatives, sometimes one alternative
requires ‘<samp><span class="samp">&</span></samp>’ while others do not. See, for example, the
‘<samp><span class="samp">movdf</span></samp>’ insn of the 68000.
<p>A operand which is read by the instruction can be tied to an earlyclobber
operand if its only use as an input occurs before the early result is
written. Adding alternatives of this form often allows GCC to produce
better code when only some of the read operands can be affected by the
earlyclobber. See, for example, the ‘<samp><span class="samp">mulsi3</span></samp>’ insn of the ARM.
<p>Furthermore, if the <dfn>earlyclobber</dfn> operand is also a read/write
operand, then that operand is written only after it's used.
<p>‘<samp><span class="samp">&</span></samp>’ does not obviate the need to write ‘<samp><span class="samp">=</span></samp>’ or ‘<samp><span class="samp">+</span></samp>’. As
<dfn>earlyclobber</dfn> operands are always written, a read-only
<dfn>earlyclobber</dfn> operand is ill-formed and will be rejected by the
compiler.
<p><a name="index-g_t_0040samp_007b_0025_007d-in-constraint-3359"></a><br><dt>‘<samp><span class="samp">%</span></samp>’<dd>Declares the instruction to be commutative for this operand and the
following operand. This means that the compiler may interchange the
two operands if that is the cheapest way to make all operands fit the
constraints. ‘<samp><span class="samp">%</span></samp>’ applies to all alternatives and must appear as
the first character in the constraint. Only read-only operands can use
‘<samp><span class="samp">%</span></samp>’.
<p>This is often used in patterns for addition instructions
that really have only two operands: the result must go in one of the
arguments. Here for example, is how the 68000 halfword-add
instruction is defined:
<pre class="smallexample"> (define_insn "addhi3"
[(set (match_operand:HI 0 "general_operand" "=m,r")
(plus:HI (match_operand:HI 1 "general_operand" "%0,0")
(match_operand:HI 2 "general_operand" "di,g")))]
...)
</pre>
<p>GCC can only handle one commutative pair in an asm; if you use more,
the compiler may fail. Note that you need not use the modifier if
the two alternatives are strictly identical; this would only waste
time in the reload pass. The modifier is not operational after
register allocation, so the result of <code>define_peephole2</code>
and <code>define_split</code>s performed after reload cannot rely on
‘<samp><span class="samp">%</span></samp>’ to make the intended insn match.
<p><a name="index-g_t_0040samp_007b_0023_007d-in-constraint-3360"></a><br><dt>‘<samp><span class="samp">#</span></samp>’<dd>Says that all following characters, up to the next comma, are to be
ignored as a constraint. They are significant only for choosing
register preferences.
<p><a name="index-g_t_0040samp_007b_002a_007d-in-constraint-3361"></a><br><dt>‘<samp><span class="samp">*</span></samp>’<dd>Says that the following character should be ignored when choosing
register preferences. ‘<samp><span class="samp">*</span></samp>’ has no effect on the meaning of the
constraint as a constraint, and no effect on reloading. For LRA
‘<samp><span class="samp">*</span></samp>’ additionally disparages slightly the alternative if the
following character matches the operand.
<p>Here is an example: the 68000 has an instruction to sign-extend a
halfword in a data register, and can also sign-extend a value by
copying it into an address register. While either kind of register is
acceptable, the constraints on an address-register destination are
less strict, so it is best if register allocation makes an address
register its goal. Therefore, ‘<samp><span class="samp">*</span></samp>’ is used so that the ‘<samp><span class="samp">d</span></samp>’
constraint letter (for data register) is ignored when computing
register preferences.
<pre class="smallexample"> (define_insn "extendhisi2"
[(set (match_operand:SI 0 "general_operand" "=*d,a")
(sign_extend:SI
(match_operand:HI 1 "general_operand" "0,g")))]
...)
</pre>
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