<html lang="en">
<head>
<title>Z8000-Addressing - Using as</title>
<meta http-equiv="Content-Type" content="text/html">
<meta name="description" content="Using as">
<meta name="generator" content="makeinfo 4.13">
<link title="Top" rel="start" href="index.html#Top">
<link rel="up" href="Z8000-Syntax.html#Z8000-Syntax" title="Z8000 Syntax">
<link rel="prev" href="Z8000_002dRegs.html#Z8000_002dRegs" title="Z8000-Regs">
<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
<!--
This file documents the GNU Assembler "as".
Copyright (C) 1991-2015 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
or any later version published by the Free Software Foundation;
with no Invariant Sections, with no Front-Cover Texts, and with no
Back-Cover Texts. A copy of the license is included in the
section entitled ``GNU Free Documentation License''.
-->
<meta http-equiv="Content-Style-Type" content="text/css">
<style type="text/css"><!--
pre.display { font-family:inherit }
pre.format { font-family:inherit }
pre.smalldisplay { font-family:inherit; font-size:smaller }
pre.smallformat { font-family:inherit; font-size:smaller }
pre.smallexample { font-size:smaller }
pre.smalllisp { font-size:smaller }
span.sc { font-variant:small-caps }
span.roman { font-family:serif; font-weight:normal; }
span.sansserif { font-family:sans-serif; font-weight:normal; }
--></style>
</head>
<body>
<div class="node">
<a name="Z8000-Addressing"></a>
<a name="Z8000_002dAddressing"></a>
<p>
Previous: <a rel="previous" accesskey="p" href="Z8000_002dRegs.html#Z8000_002dRegs">Z8000-Regs</a>,
Up: <a rel="up" accesskey="u" href="Z8000-Syntax.html#Z8000-Syntax">Z8000 Syntax</a>
<hr>
</div>
<h5 class="subsubsection">9.54.2.3 Addressing Modes</h5>
<p><a name="index-addressing-modes_002c-Z8000-2537"></a><a name="index-Z800-addressing-modes-2538"></a>as understands the following addressing modes for the Z8000:
<dl>
<dt><code>rl</code><var>n</var><dt><code>rh</code><var>n</var><dt><code>r</code><var>n</var><dt><code>rr</code><var>n</var><dt><code>rq</code><var>n</var><dd>Register direct: 8bit, 16bit, 32bit, and 64bit registers.
<br><dt><code>@r</code><var>n</var><dt><code>@rr</code><var>n</var><dd>Indirect register: @rr<var>n</var> in segmented mode, @r<var>n</var> in unsegmented
mode.
<br><dt><var>addr</var><dd>Direct: the 16 bit or 24 bit address (depending on whether the assembler
is in segmented or unsegmented mode) of the operand is in the instruction.
<br><dt><code>address(r</code><var>n</var><code>)</code><dd>Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
the final address in memory of the operand.
<br><dt><code>r</code><var>n</var><code>(#</code><var>imm</var><code>)</code><dt><code>rr</code><var>n</var><code>(#</code><var>imm</var><code>)</code><dd>Base Address: the 16 or 24 bit register is added to the 16 bit sign
extended immediate displacement to produce the final address in memory
of the operand.
<br><dt><code>r</code><var>n</var><code>(r</code><var>m</var><code>)</code><dt><code>rr</code><var>n</var><code>(r</code><var>m</var><code>)</code><dd>Base Index: the 16 or 24 bit register r<var>n</var> or rr<var>n</var> is added to
the sign extended 16 bit index register r<var>m</var> to produce the final
address in memory of the operand.
<br><dt><code>#</code><var>xx</var><dd>Immediate data <var>xx</var>.
</dl>
</body></html>