SAME54P20A Test Project
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Instance description for DSU. More...
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Macros | |
#define | REG_DSU_CTRL (*(WoReg8 *)0x41002000UL) |
(DSU) Control | |
#define | REG_DSU_STATUSA (*(RwReg8 *)0x41002001UL) |
(DSU) Status A | |
#define | REG_DSU_STATUSB (*(RoReg8 *)0x41002002UL) |
(DSU) Status B | |
#define | REG_DSU_ADDR (*(RwReg *)0x41002004UL) |
(DSU) Address | |
#define | REG_DSU_LENGTH (*(RwReg *)0x41002008UL) |
(DSU) Length | |
#define | REG_DSU_DATA (*(RwReg *)0x4100200CUL) |
(DSU) Data | |
#define | REG_DSU_DCC0 (*(RwReg *)0x41002010UL) |
(DSU) Debug Communication Channel 0 | |
#define | REG_DSU_DCC1 (*(RwReg *)0x41002014UL) |
(DSU) Debug Communication Channel 1 | |
#define | REG_DSU_DID (*(RoReg *)0x41002018UL) |
(DSU) Device Identification | |
#define | REG_DSU_CFG (*(RwReg *)0x4100201CUL) |
(DSU) Configuration | |
#define | REG_DSU_ENTRY0 (*(RoReg *)0x41003000UL) |
(DSU) CoreSight ROM Table Entry 0 | |
#define | REG_DSU_ENTRY1 (*(RoReg *)0x41003004UL) |
(DSU) CoreSight ROM Table Entry 1 | |
#define | REG_DSU_END (*(RoReg *)0x41003008UL) |
(DSU) CoreSight ROM Table End | |
#define | REG_DSU_MEMTYPE (*(RoReg *)0x41003FCCUL) |
(DSU) CoreSight ROM Table Memory Type | |
#define | REG_DSU_PID4 (*(RoReg *)0x41003FD0UL) |
(DSU) Peripheral Identification 4 | |
#define | REG_DSU_PID5 (*(RoReg *)0x41003FD4UL) |
(DSU) Peripheral Identification 5 | |
#define | REG_DSU_PID6 (*(RoReg *)0x41003FD8UL) |
(DSU) Peripheral Identification 6 | |
#define | REG_DSU_PID7 (*(RoReg *)0x41003FDCUL) |
(DSU) Peripheral Identification 7 | |
#define | REG_DSU_PID0 (*(RoReg *)0x41003FE0UL) |
(DSU) Peripheral Identification 0 | |
#define | REG_DSU_PID1 (*(RoReg *)0x41003FE4UL) |
(DSU) Peripheral Identification 1 | |
#define | REG_DSU_PID2 (*(RoReg *)0x41003FE8UL) |
(DSU) Peripheral Identification 2 | |
#define | REG_DSU_PID3 (*(RoReg *)0x41003FECUL) |
(DSU) Peripheral Identification 3 | |
#define | REG_DSU_CID0 (*(RoReg *)0x41003FF0UL) |
(DSU) Component Identification 0 | |
#define | REG_DSU_CID1 (*(RoReg *)0x41003FF4UL) |
(DSU) Component Identification 1 | |
#define | REG_DSU_CID2 (*(RoReg *)0x41003FF8UL) |
(DSU) Component Identification 2 | |
#define | REG_DSU_CID3 (*(RoReg *)0x41003FFCUL) |
(DSU) Component Identification 3 | |
#define | DSU_CLK_AHB_ID 4 |
#define | DSU_DMAC_ID_DCC0 2 |
#define | DSU_DMAC_ID_DCC1 3 |
Instance description for DSU.
Copyright (c) 2019 Microchip Technology Inc.
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Definition in file dsu.h.