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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">can0.h</div> </div>
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<a href="can0_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_CAN0_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_CAN0_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for CAN0 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_CAN0_CREL (0x42000000) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_CAN0_ENDN (0x42000004) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_CAN0_MRCFG (0x42000008) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_CAN0_DBTP (0x4200000C) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_CAN0_TEST (0x42000010) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_CAN0_RWD (0x42000014) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_CAN0_CCCR (0x42000018) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_CAN0_NBTP (0x4200001C) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_CAN0_TSCC (0x42000020) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_CAN0_TSCV (0x42000024) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_CAN0_TOCC (0x42000028) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_CAN0_TOCV (0x4200002C) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_CAN0_ECR (0x42000040) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_CAN0_PSR (0x42000044) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_CAN0_TDCR (0x42000048) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_CAN0_IR (0x42000050) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_CAN0_IE (0x42000054) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_CAN0_ILS (0x42000058) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_CAN0_ILE (0x4200005C) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_CAN0_GFC (0x42000080) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_CAN0_SIDFC (0x42000084) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_CAN0_XIDFC (0x42000088) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_CAN0_XIDAM (0x42000090) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_CAN0_HPMS (0x42000094) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#define REG_CAN0_NDAT1 (0x42000098) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="preprocessor">#define REG_CAN0_NDAT2 (0x4200009C) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="preprocessor">#define REG_CAN0_RXF0C (0x420000A0) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define REG_CAN0_RXF0S (0x420000A4) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define REG_CAN0_RXF0A (0x420000A8) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#define REG_CAN0_RXBC (0x420000AC) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define REG_CAN0_RXF1C (0x420000B0) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span> <span class="preprocessor">#define REG_CAN0_RXF1S (0x420000B4) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define REG_CAN0_RXF1A (0x420000B8) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span> <span class="preprocessor">#define REG_CAN0_RXESC (0x420000BC) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define REG_CAN0_TXBC (0x420000C0) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="preprocessor">#define REG_CAN0_TXFQS (0x420000C4) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="preprocessor">#define REG_CAN0_TXESC (0x420000C8) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span> <span class="preprocessor">#define REG_CAN0_TXBRP (0x420000CC) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span> <span class="preprocessor">#define REG_CAN0_TXBAR (0x420000D0) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span> <span class="preprocessor">#define REG_CAN0_TXBCR (0x420000D4) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span> <span class="preprocessor">#define REG_CAN0_TXBTO (0x420000D8) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="preprocessor">#define REG_CAN0_TXBCF (0x420000DC) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="preprocessor">#define REG_CAN0_TXBTIE (0x420000E0) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span> <span class="preprocessor">#define REG_CAN0_TXBCIE (0x420000E4) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span> <span class="preprocessor">#define REG_CAN0_TXEFC (0x420000F0) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="preprocessor">#define REG_CAN0_TXEFS (0x420000F4) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="preprocessor">#define REG_CAN0_TXEFA (0x420000F8) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span> <span class="preprocessor">#else</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="can0_8h.html#a449efb29c6abed35e2aa0e93d14e84ad"> 83</a></span> <span class="preprocessor">#define REG_CAN0_CREL (*(RoReg *)0x42000000UL) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="can0_8h.html#af85411a25615dd0b3831fe74a5173e17"> 84</a></span> <span class="preprocessor">#define REG_CAN0_ENDN (*(RoReg *)0x42000004UL) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="can0_8h.html#ac595795560be949de07d82f41764a319"> 85</a></span> <span class="preprocessor">#define REG_CAN0_MRCFG (*(RwReg *)0x42000008UL) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="can0_8h.html#abb0e5f859a165cc9a373511623420f8c"> 86</a></span> <span class="preprocessor">#define REG_CAN0_DBTP (*(RwReg *)0x4200000CUL) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="can0_8h.html#ae029a3656c7e567002eb4fbc936f209d"> 87</a></span> <span class="preprocessor">#define REG_CAN0_TEST (*(RwReg *)0x42000010UL) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="can0_8h.html#a78b1dd73d667635e4e713782f354b17f"> 88</a></span> <span class="preprocessor">#define REG_CAN0_RWD (*(RwReg *)0x42000014UL) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="can0_8h.html#a904004cddcc5fe5143a2126fbd0d7b1d"> 89</a></span> <span class="preprocessor">#define REG_CAN0_CCCR (*(RwReg *)0x42000018UL) </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="can0_8h.html#a6269e25f48b8c7d2d2ce1f88d32de23b"> 90</a></span> <span class="preprocessor">#define REG_CAN0_NBTP (*(RwReg *)0x4200001CUL) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="can0_8h.html#a98dbec03d5a5522f5c4db9b173daa5ea"> 91</a></span> <span class="preprocessor">#define REG_CAN0_TSCC (*(RwReg *)0x42000020UL) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="can0_8h.html#ae69d1aae93a642d34d916ab18a2ab9ea"> 92</a></span> <span class="preprocessor">#define REG_CAN0_TSCV (*(RoReg *)0x42000024UL) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="can0_8h.html#a503df71a059bf085515d292ea3cfe78b"> 93</a></span> <span class="preprocessor">#define REG_CAN0_TOCC (*(RwReg *)0x42000028UL) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="can0_8h.html#a3b620bcd156becd408e1fe7dec46c716"> 94</a></span> <span class="preprocessor">#define REG_CAN0_TOCV (*(RwReg *)0x4200002CUL) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="can0_8h.html#ad9b7daaf9b7b03d5be1b979194742784"> 95</a></span> <span class="preprocessor">#define REG_CAN0_ECR (*(RoReg *)0x42000040UL) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="can0_8h.html#a0a5ec38192586ce82891ff8658ba1871"> 96</a></span> <span class="preprocessor">#define REG_CAN0_PSR (*(RoReg *)0x42000044UL) </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="can0_8h.html#a7a5c155bd6ada1b4273ee9722058e583"> 97</a></span> <span class="preprocessor">#define REG_CAN0_TDCR (*(RwReg *)0x42000048UL) </span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="can0_8h.html#a0a65795d772174c6878246c57ae2b4cc"> 98</a></span> <span class="preprocessor">#define REG_CAN0_IR (*(RwReg *)0x42000050UL) </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="can0_8h.html#a212d9ba27b17d94fa6c1b0606ca0dd50"> 99</a></span> <span class="preprocessor">#define REG_CAN0_IE (*(RwReg *)0x42000054UL) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="can0_8h.html#a69fe9af8871de113d98c88869f09f699"> 100</a></span> <span class="preprocessor">#define REG_CAN0_ILS (*(RwReg *)0x42000058UL) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="can0_8h.html#a35ccc25e65d5ba96731d837c80aaa69e"> 101</a></span> <span class="preprocessor">#define REG_CAN0_ILE (*(RwReg *)0x4200005CUL) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="can0_8h.html#a8154a5854c66d8ce3072f9b3daee8794"> 102</a></span> <span class="preprocessor">#define REG_CAN0_GFC (*(RwReg *)0x42000080UL) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="can0_8h.html#a8433ec4eb43a86bdeefec641448bc426"> 103</a></span> <span class="preprocessor">#define REG_CAN0_SIDFC (*(RwReg *)0x42000084UL) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="can0_8h.html#a7b77bac0b6d81dcd4f2a476c8a97e115"> 104</a></span> <span class="preprocessor">#define REG_CAN0_XIDFC (*(RwReg *)0x42000088UL) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="can0_8h.html#a6ff316ef5816c3ad50e083816547bf9a"> 105</a></span> <span class="preprocessor">#define REG_CAN0_XIDAM (*(RwReg *)0x42000090UL) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="can0_8h.html#acef49af23336ffb2049f9c1cd4565a9e"> 106</a></span> <span class="preprocessor">#define REG_CAN0_HPMS (*(RoReg *)0x42000094UL) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="can0_8h.html#a6d9c9cc51367f5c178dfb4595722968d"> 107</a></span> <span class="preprocessor">#define REG_CAN0_NDAT1 (*(RwReg *)0x42000098UL) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="can0_8h.html#a20dd31879065f711f986da74408c237d"> 108</a></span> <span class="preprocessor">#define REG_CAN0_NDAT2 (*(RwReg *)0x4200009CUL) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="can0_8h.html#a18bed93e3bb4d03c9336985fdf39e727"> 109</a></span> <span class="preprocessor">#define REG_CAN0_RXF0C (*(RwReg *)0x420000A0UL) </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="can0_8h.html#acbb93b36e76f7bb9b3a47c05c4755d68"> 110</a></span> <span class="preprocessor">#define REG_CAN0_RXF0S (*(RoReg *)0x420000A4UL) </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="can0_8h.html#adb84d9f3bcc150d0d528b487ffdaddfa"> 111</a></span> <span class="preprocessor">#define REG_CAN0_RXF0A (*(RwReg *)0x420000A8UL) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="can0_8h.html#a8b8324a6470af3586cac6213f066a56d"> 112</a></span> <span class="preprocessor">#define REG_CAN0_RXBC (*(RwReg *)0x420000ACUL) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="can0_8h.html#a4c9a625a26cd01e57dad56a40ba2afd9"> 113</a></span> <span class="preprocessor">#define REG_CAN0_RXF1C (*(RwReg *)0x420000B0UL) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="can0_8h.html#a50d2a9c26237c4bbe57eeddbe8cf1b9f"> 114</a></span> <span class="preprocessor">#define REG_CAN0_RXF1S (*(RoReg *)0x420000B4UL) </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="can0_8h.html#a6c2e21ab20809fffc82ee036bff485a0"> 115</a></span> <span class="preprocessor">#define REG_CAN0_RXF1A (*(RwReg *)0x420000B8UL) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="can0_8h.html#a64522c510e7e11fd348cce55971abd59"> 116</a></span> <span class="preprocessor">#define REG_CAN0_RXESC (*(RwReg *)0x420000BCUL) </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="can0_8h.html#acd43dc2ce51efdb97e96eb92e84f7193"> 117</a></span> <span class="preprocessor">#define REG_CAN0_TXBC (*(RwReg *)0x420000C0UL) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="can0_8h.html#a8560ea3aebd28604c8368ba4ea421786"> 118</a></span> <span class="preprocessor">#define REG_CAN0_TXFQS (*(RoReg *)0x420000C4UL) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="can0_8h.html#a2ebbcdab4c92bf3efcc7f59e6f0eb739"> 119</a></span> <span class="preprocessor">#define REG_CAN0_TXESC (*(RwReg *)0x420000C8UL) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="can0_8h.html#a7d010450c605245bb095641e1d5a08c7"> 120</a></span> <span class="preprocessor">#define REG_CAN0_TXBRP (*(RoReg *)0x420000CCUL) </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="can0_8h.html#a703ec9b292dd6425448e9dfd8ad0240d"> 121</a></span> <span class="preprocessor">#define REG_CAN0_TXBAR (*(RwReg *)0x420000D0UL) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="can0_8h.html#a95e0fa7fc64efb36df006d3cd9ca20fd"> 122</a></span> <span class="preprocessor">#define REG_CAN0_TXBCR (*(RwReg *)0x420000D4UL) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="can0_8h.html#a54148a226eb3925a4a994c4e218afa90"> 123</a></span> <span class="preprocessor">#define REG_CAN0_TXBTO (*(RoReg *)0x420000D8UL) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="can0_8h.html#a4b91469a069e06269301dc348b7f01d5"> 124</a></span> <span class="preprocessor">#define REG_CAN0_TXBCF (*(RoReg *)0x420000DCUL) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="can0_8h.html#a2bec8f6811eda9d184039a7a87452e85"> 125</a></span> <span class="preprocessor">#define REG_CAN0_TXBTIE (*(RwReg *)0x420000E0UL) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="can0_8h.html#ae88f1a1bc2e2dcb1668132ed13df03a0"> 126</a></span> <span class="preprocessor">#define REG_CAN0_TXBCIE (*(RwReg *)0x420000E4UL) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="can0_8h.html#a38d320a7baf11fc13de21e41494b9432"> 127</a></span> <span class="preprocessor">#define REG_CAN0_TXEFC (*(RwReg *)0x420000F0UL) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="can0_8h.html#a649645ed86a43cb92a0407a128cddb94"> 128</a></span> <span class="preprocessor">#define REG_CAN0_TXEFS (*(RoReg *)0x420000F4UL) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="can0_8h.html#a3a197a7618d54c5d81484ceab851f2ee"> 129</a></span> <span class="preprocessor">#define REG_CAN0_TXEFA (*(RwReg *)0x420000F8UL) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>  </div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span> <span class="comment">/* ========== Instance parameters for CAN0 peripheral ========== */</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span> <span class="preprocessor">#define CAN0_CLK_AHB_ID 17 // Index of AHB clock</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span> <span class="preprocessor">#define CAN0_DMAC_ID_DEBUG 20 // DMA CAN Debug Req</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span> <span class="preprocessor">#define CAN0_GCLK_ID 27 // Index of Generic Clock</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span> <span class="preprocessor">#define CAN0_MSG_RAM_ADDR 0x20000000</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span> <span class="preprocessor">#define CAN0_QOS_RESET_VAL 1 // QOS reset value</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>  </div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_CAN0_INSTANCE_ */</span><span class="preprocessor"></span></div>
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