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<a name="Int-Iterators"></a>
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<p>
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<a name="Int-Iterators-1"></a>
<h4 class="subsection">17.23.3 Int Iterators</h4>
<a name="index-int-iterators-in-_002emd-files"></a>
<a name="index-define_005fint_005fiterator"></a>
<a name="index-define_005fint_005fattr"></a>
<p>Int iterators operate in a similar way to code iterators. See <a href="Code-Iterators.html#Code-Iterators">Code Iterators</a>.
</p>
<p>The construct:
</p>
<div class="smallexample">
<pre class="smallexample">(define_int_iterator <var>name</var> [(<var>int1</var> "<var>cond1</var>") … (<var>intn</var> "<var>condn</var>")])
</pre></div>
<p>defines a pseudo integer constant <var>name</var> that can be instantiated as
<var>inti</var> if condition <var>condi</var> is true. Each <var>int</var>
must have the same rtx format. See <a href="RTL-Classes.html#RTL-Classes">RTL Classes</a>. Int iterators can appear
in only those rtx fields that have ’i’ as the specifier. This means that
each <var>int</var> has to be a constant defined using define_constant or
define_c_enum.
</p>
<p>As with mode and code iterators, each pattern that uses <var>name</var> will be
expanded <var>n</var> times, once with all uses of <var>name</var> replaced by
<var>int1</var>, once with all uses replaced by <var>int2</var>, and so on.
See <a href="Defining-Mode-Iterators.html#Defining-Mode-Iterators">Defining Mode Iterators</a>.
</p>
<p>It is possible to define attributes for ints as well as for codes and modes.
Attributes are defined using:
</p>
<div class="smallexample">
<pre class="smallexample">(define_int_attr <var>name</var> [(<var>int1</var> "<var>value1</var>") … (<var>intn</var> "<var>valuen</var>")])
</pre></div>
<p>Here’s an example of int iterators in action, taken from the ARM port:
</p>
<div class="smallexample">
<pre class="smallexample">(define_int_iterator QABSNEG [UNSPEC_VQABS UNSPEC_VQNEG])
(define_int_attr absneg [(UNSPEC_VQABS "abs") (UNSPEC_VQNEG "neg")])
(define_insn "neon_vq<absneg><mode>"
[(set (match_operand:VDQIW 0 "s_register_operand" "=w")
(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
(match_operand:SI 2 "immediate_operand" "i")]
QABSNEG))]
"TARGET_NEON"
"vq<absneg>.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
[(set_attr "type" "neon_vqneg_vqabs")]
)
</pre></div>
<p>This is equivalent to:
</p>
<div class="smallexample">
<pre class="smallexample">(define_insn "neon_vqabs<mode>"
[(set (match_operand:VDQIW 0 "s_register_operand" "=w")
(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
(match_operand:SI 2 "immediate_operand" "i")]
UNSPEC_VQABS))]
"TARGET_NEON"
"vqabs.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
[(set_attr "type" "neon_vqneg_vqabs")]
)
(define_insn "neon_vqneg<mode>"
[(set (match_operand:VDQIW 0 "s_register_operand" "=w")
(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
(match_operand:SI 2 "immediate_operand" "i")]
UNSPEC_VQNEG))]
"TARGET_NEON"
"vqneg.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
[(set_attr "type" "neon_vqneg_vqabs")]
)
</pre></div>
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