<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> <html> <!-- This file documents the GNU Assembler "as". Copyright (C) 1991-2019 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. A copy of the license is included in the section entitled "GNU Free Documentation License". --> <!-- Created by GNU Texinfo 6.4, http://www.gnu.org/software/texinfo/ --> <head> <title>i386-Arch (Using as)</title> <meta name="description" content="i386-Arch (Using as)"> <meta name="keywords" content="i386-Arch (Using as)"> <meta name="resource-type" content="document"> <meta name="distribution" content="global"> <meta name="Generator" content="makeinfo"> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> <link href="index.html#Top" rel="start" title="Top"> <link href="AS-Index.html#AS-Index" rel="index" title="AS Index"> <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> <link href="i386_002dDependent.html#i386_002dDependent" rel="up" title="i386-Dependent"> <link href="i386_002dBugs.html#i386_002dBugs" rel="next" title="i386-Bugs"> <link href="i386_002d16bit.html#i386_002d16bit" rel="prev" title="i386-16bit"> <style type="text/css"> <!-- a.summary-letter {text-decoration: none} blockquote.indentedblock {margin-right: 0em} blockquote.smallindentedblock {margin-right: 0em; font-size: smaller} blockquote.smallquotation {font-size: smaller} div.display {margin-left: 3.2em} div.example {margin-left: 3.2em} div.lisp {margin-left: 3.2em} div.smalldisplay {margin-left: 3.2em} div.smallexample {margin-left: 3.2em} div.smalllisp {margin-left: 3.2em} kbd {font-style: oblique} pre.display {font-family: inherit} pre.format {font-family: inherit} pre.menu-comment {font-family: serif} pre.menu-preformatted {font-family: serif} pre.smalldisplay {font-family: inherit; font-size: smaller} pre.smallexample {font-size: smaller} pre.smallformat {font-family: inherit; font-size: smaller} pre.smalllisp {font-size: smaller} span.nolinebreak {white-space: nowrap} span.roman {font-family: initial; font-weight: normal} span.sansserif {font-family: sans-serif; font-weight: normal} ul.no-bullet {list-style: none} --> </style> </head> <body lang="en"> <a name="i386_002dArch"></a> <div class="header"> <p> Next: <a href="i386_002dBugs.html#i386_002dBugs" accesskey="n" rel="next">i386-Bugs</a>, Previous: <a href="i386_002d16bit.html#i386_002d16bit" accesskey="p" rel="prev">i386-16bit</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> </div> <hr> <a name="Specifying-CPU-Architecture"></a> <h4 class="subsection">9.15.15 Specifying CPU Architecture</h4> <a name="index-arch-directive_002c-i386"></a> <a name="index-i386-arch-directive"></a> <a name="index-arch-directive_002c-x86_002d64"></a> <a name="index-x86_002d64-arch-directive"></a> <p><code>as</code> may be told to assemble for a particular CPU (sub-)architecture with the <code>.arch <var>cpu_type</var></code> directive. This directive enables a warning when gas detects an instruction that is not supported on the CPU specified. The choices for <var>cpu_type</var> are: </p> <table> <tr><td width="20%">‘<samp>i8086</samp>’</td><td width="20%">‘<samp>i186</samp>’</td><td width="20%">‘<samp>i286</samp>’</td><td width="20%">‘<samp>i386</samp>’</td></tr> <tr><td width="20%">‘<samp>i486</samp>’</td><td width="20%">‘<samp>i586</samp>’</td><td width="20%">‘<samp>i686</samp>’</td><td width="20%">‘<samp>pentium</samp>’</td></tr> <tr><td width="20%">‘<samp>pentiumpro</samp>’</td><td width="20%">‘<samp>pentiumii</samp>’</td><td width="20%">‘<samp>pentiumiii</samp>’</td><td width="20%">‘<samp>pentium4</samp>’</td></tr> <tr><td width="20%">‘<samp>prescott</samp>’</td><td width="20%">‘<samp>nocona</samp>’</td><td width="20%">‘<samp>core</samp>’</td><td width="20%">‘<samp>core2</samp>’</td></tr> <tr><td width="20%">‘<samp>corei7</samp>’</td><td width="20%">‘<samp>l1om</samp>’</td><td width="20%">‘<samp>k1om</samp>’</td><td width="20%">‘<samp>iamcu</samp>’</td></tr> <tr><td width="20%">‘<samp>k6</samp>’</td><td width="20%">‘<samp>k6_2</samp>’</td><td width="20%">‘<samp>athlon</samp>’</td><td width="20%">‘<samp>k8</samp>’</td></tr> <tr><td width="20%">‘<samp>amdfam10</samp>’</td><td width="20%">‘<samp>bdver1</samp>’</td><td width="20%">‘<samp>bdver2</samp>’</td><td width="20%">‘<samp>bdver3</samp>’</td></tr> <tr><td width="20%">‘<samp>bdver4</samp>’</td><td width="20%">‘<samp>znver1</samp>’</td><td width="20%">‘<samp>znver2</samp>’</td><td width="20%">‘<samp>btver1</samp>’</td></tr> <tr><td width="20%">‘<samp>btver2</samp>’</td><td width="20%">‘<samp>generic32</samp>’</td><td width="20%">‘<samp>generic64</samp>’</td></tr> <tr><td width="20%">‘<samp>.cmov</samp>’</td><td width="20%">‘<samp>.fxsr</samp>’</td><td width="20%">‘<samp>.mmx</samp>’</td></tr> <tr><td width="20%">‘<samp>.sse</samp>’</td><td width="20%">‘<samp>.sse2</samp>’</td><td width="20%">‘<samp>.sse3</samp>’</td></tr> <tr><td width="20%">‘<samp>.ssse3</samp>’</td><td width="20%">‘<samp>.sse4.1</samp>’</td><td width="20%">‘<samp>.sse4.2</samp>’</td><td width="20%">‘<samp>.sse4</samp>’</td></tr> <tr><td width="20%">‘<samp>.avx</samp>’</td><td width="20%">‘<samp>.vmx</samp>’</td><td width="20%">‘<samp>.smx</samp>’</td><td width="20%">‘<samp>.ept</samp>’</td></tr> <tr><td width="20%">‘<samp>.clflush</samp>’</td><td width="20%">‘<samp>.movbe</samp>’</td><td width="20%">‘<samp>.xsave</samp>’</td><td width="20%">‘<samp>.xsaveopt</samp>’</td></tr> <tr><td width="20%">‘<samp>.aes</samp>’</td><td width="20%">‘<samp>.pclmul</samp>’</td><td width="20%">‘<samp>.fma</samp>’</td><td width="20%">‘<samp>.fsgsbase</samp>’</td></tr> <tr><td width="20%">‘<samp>.rdrnd</samp>’</td><td width="20%">‘<samp>.f16c</samp>’</td><td width="20%">‘<samp>.avx2</samp>’</td><td width="20%">‘<samp>.bmi2</samp>’</td></tr> <tr><td width="20%">‘<samp>.lzcnt</samp>’</td><td width="20%">‘<samp>.invpcid</samp>’</td><td width="20%">‘<samp>.vmfunc</samp>’</td><td width="20%">‘<samp>.hle</samp>’</td></tr> <tr><td width="20%">‘<samp>.rtm</samp>’</td><td width="20%">‘<samp>.adx</samp>’</td><td width="20%">‘<samp>.rdseed</samp>’</td><td width="20%">‘<samp>.prfchw</samp>’</td></tr> <tr><td width="20%">‘<samp>.smap</samp>’</td><td width="20%">‘<samp>.mpx</samp>’</td><td width="20%">‘<samp>.sha</samp>’</td><td width="20%">‘<samp>.prefetchwt1</samp>’</td></tr> <tr><td width="20%">‘<samp>.clflushopt</samp>’</td><td width="20%">‘<samp>.xsavec</samp>’</td><td width="20%">‘<samp>.xsaves</samp>’</td><td width="20%">‘<samp>.se1</samp>’</td></tr> <tr><td width="20%">‘<samp>.avx512f</samp>’</td><td width="20%">‘<samp>.avx512cd</samp>’</td><td width="20%">‘<samp>.avx512er</samp>’</td><td width="20%">‘<samp>.avx512pf</samp>’</td></tr> <tr><td width="20%">‘<samp>.avx512vl</samp>’</td><td width="20%">‘<samp>.avx512bw</samp>’</td><td width="20%">‘<samp>.avx512dq</samp>’</td><td width="20%">‘<samp>.avx512ifma</samp>’</td></tr> <tr><td width="20%">‘<samp>.avx512vbmi</samp>’</td><td width="20%">‘<samp>.avx512_4fmaps</samp>’</td><td width="20%">‘<samp>.avx512_4vnniw</samp>’</td></tr> <tr><td width="20%">‘<samp>.avx512_vpopcntdq</samp>’</td><td width="20%">‘<samp>.avx512_vbmi2</samp>’</td><td width="20%">‘<samp>.avx512_vnni</samp>’</td></tr> <tr><td width="20%">‘<samp>.avx512_bitalg</samp>’</td></tr> <tr><td width="20%">‘<samp>.clwb</samp>’</td><td width="20%">‘<samp>.rdpid</samp>’</td><td width="20%">‘<samp>.ptwrite</samp>’</td><td width="20%"></td></tr> <tr><td width="20%">‘<samp>.ibt</samp>’</td></tr> <tr><td width="20%">‘<samp>.wbnoinvd</samp>’</td><td width="20%">‘<samp>.pconfig</samp>’</td><td width="20%">‘<samp>.waitpkg</samp>’</td><td width="20%">‘<samp>.cldemote</samp>’</td></tr> <tr><td width="20%">‘<samp>.shstk</samp>’</td><td width="20%">‘<samp>.gfni</samp>’</td><td width="20%">‘<samp>.vaes</samp>’</td><td width="20%">‘<samp>.vpclmulqdq</samp>’</td></tr> <tr><td width="20%">‘<samp>.movdiri</samp>’</td><td width="20%">‘<samp>.movdir64b</samp>’</td></tr> <tr><td width="20%">‘<samp>.3dnow</samp>’</td><td width="20%">‘<samp>.3dnowa</samp>’</td><td width="20%">‘<samp>.sse4a</samp>’</td><td width="20%">‘<samp>.sse5</samp>’</td></tr> <tr><td width="20%">‘<samp>.syscall</samp>’</td><td width="20%">‘<samp>.rdtscp</samp>’</td><td width="20%">‘<samp>.svme</samp>’</td><td width="20%">‘<samp>.abm</samp>’</td></tr> <tr><td width="20%">‘<samp>.lwp</samp>’</td><td width="20%">‘<samp>.fma4</samp>’</td><td width="20%">‘<samp>.xop</samp>’</td><td width="20%">‘<samp>.cx16</samp>’</td></tr> <tr><td width="20%">‘<samp>.padlock</samp>’</td><td width="20%">‘<samp>.clzero</samp>’</td><td width="20%">‘<samp>.mwaitx</samp>’</td></tr> </table> <p>Apart from the warning, there are only two other effects on <code>as</code> operation; Firstly, if you specify a CPU other than ‘<samp>i486</samp>’, then shift by one instructions such as ‘<samp>sarl $1, %eax</samp>’ will automatically use a two byte opcode sequence. The larger three byte opcode sequence is used on the 486 (and when no architecture is specified) because it executes faster on the 486. Note that you can explicitly request the two byte opcode by writing ‘<samp>sarl %eax</samp>’. Secondly, if you specify ‘<samp>i8086</samp>’, ‘<samp>i186</samp>’, or ‘<samp>i286</samp>’, <em>and</em> ‘<samp>.code16</samp>’ or ‘<samp>.code16gcc</samp>’ then byte offset conditional jumps will be promoted when necessary to a two instruction sequence consisting of a conditional jump of the opposite sense around an unconditional jump to the target. </p> <p>Following the CPU architecture (but not a sub-architecture, which are those starting with a dot), you may specify ‘<samp>jumps</samp>’ or ‘<samp>nojumps</samp>’ to control automatic promotion of conditional jumps. ‘<samp>jumps</samp>’ is the default, and enables jump promotion; All external jumps will be of the long variety, and file-local jumps will be promoted as necessary. (see <a href="i386_002dJumps.html#i386_002dJumps">i386-Jumps</a>) ‘<samp>nojumps</samp>’ leaves external conditional jumps as byte offset jumps, and warns about file-local conditional jumps that <code>as</code> promotes. Unconditional jumps are treated as for ‘<samp>jumps</samp>’. </p> <p>For example </p> <div class="smallexample"> <pre class="smallexample"> .arch i8086,nojumps </pre></div> <hr> <div class="header"> <p> Next: <a href="i386_002dBugs.html#i386_002dBugs" accesskey="n" rel="next">i386-Bugs</a>, Previous: <a href="i386_002d16bit.html#i386_002d16bit" accesskey="p" rel="prev">i386-16bit</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> </div> </body> </html>